opencl/llvm.git
6 years agoReapply: Teach SROA how to update debug info for fragmented variables.
Adrian Prantl [Tue, 6 Jan 2015 17:14:10 +0000 (17:14 +0000)]
Reapply: Teach SROA how to update debug info for fragmented variables.
This also rolls in the changes discussed in http://reviews.llvm.org/D6766.
Defers migrating the debug info for new allocas until after all partitions
are created.

Thanks to Chandler for reviewing!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225272 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDon't loop endlessly for MachO files with 0 ncmds
Filipe Cabecinhas [Tue, 6 Jan 2015 17:08:26 +0000 (17:08 +0000)]
Don't loop endlessly for MachO files with 0 ncmds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225271 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Fix 225267. GP register is not yet fully implemented. Removing Uses ...
Colin LeMahieu [Tue, 6 Jan 2015 16:52:38 +0000 (16:52 +0000)]
[Hexagon] Fix 225267.  GP register is not yet fully implemented.  Removing Uses [GP] maintains existing behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225270 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoImplement a very basic colored syntax highlighting for llvm-dwarfdump.
Adrian Prantl [Tue, 6 Jan 2015 16:50:25 +0000 (16:50 +0000)]
Implement a very basic colored syntax highlighting for llvm-dwarfdump.
The color scheme is the same as the one used by the colorize dwarfdump
script on Darwin.
A new --color option can be used to forcibly turn color on or off.

http://reviews.llvm.org/D6852

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225269 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Add a regression test for r225251
Hal Finkel [Tue, 6 Jan 2015 16:46:37 +0000 (16:46 +0000)]
[PowerPC] Add a regression test for r225251

In r225251, I removed an old entry from the README.txt file. While there are
several contributing factors (including pieces in Clang's ABI code), upon
further reflection, the backend part deserves a regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225268 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Adding dealloc_return encoding and absolute address stores.
Colin LeMahieu [Tue, 6 Jan 2015 16:15:15 +0000 (16:15 +0000)]
[Hexagon] Adding dealloc_return encoding and absolute address stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225267 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Cleanup so_imm* tblgen defintions
Asiri Rathnayake [Tue, 6 Jan 2015 15:55:09 +0000 (15:55 +0000)]
[ARM] Cleanup so_imm* tblgen defintions

No functional changes. Support for ARM's modified immediate syntax was added
in r223113 and r223115 (review: D6408). That patch introduced the mod_imm*
tblegen definitions which renders the existing so_imm* definitions redundant.
This patch gets rid of them completely.

Reviewed as: D6722

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225266 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoConvert fcmp with 0.0 from casted integers to icmp
Matt Arsenault [Tue, 6 Jan 2015 15:50:59 +0000 (15:50 +0000)]
Convert fcmp with 0.0 from casted integers to icmp

This is already handled in general when it is known the
conversion can't lose bits with smaller integer types
casted into wider floating point types.

This pattern happens somewhat often in GPU programs that cast
workitem intrinsics to float, which are often compared with 0.

Specifically handle the special case of compares with zero which
should also be known to not lose information. I had a more general
version of this which allows equality compares if the casted float is
exactly representable in the integer, but I'm not 100% confident that
is always correct.

Also fold cases that aren't integers to true / false.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225265 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CMake] Silence stderr on "COMMAND ${CMAKE_C_COMPILER} -Wl,--version". It was noisy...
NAKAMURA Takumi [Tue, 6 Jan 2015 09:44:44 +0000 (09:44 +0000)]
[CMake] Silence stderr on "COMMAND ${CMAKE_C_COMPILER} -Wl,--version". It was noisy during configuraion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225260 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReformat.
NAKAMURA Takumi [Tue, 6 Jan 2015 09:44:29 +0000 (09:44 +0000)]
Reformat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225259 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Hide a function we only use in an assert behind NDEBUG.
Chandler Carruth [Tue, 6 Jan 2015 09:10:47 +0000 (09:10 +0000)]
[PM] Hide a function we only use in an assert behind NDEBUG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225258 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Introduce a utility pass that preserves no analyses.
Chandler Carruth [Tue, 6 Jan 2015 09:06:35 +0000 (09:06 +0000)]
[PM] Introduce a utility pass that preserves no analyses.

Use this to test that path of invalidation. This test actually shows
redundant invalidation here that is really bad. I'm going to work on
fixing that next, but wanted to commit the test harness now that its all
working.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225257 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.
Craig Topper [Tue, 6 Jan 2015 08:59:30 +0000 (08:59 +0000)]
[X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.

Requires new AsmParserOperand types that detect 16-bit and 32/64-bit mode so that we choose the right instruction based on default sizing without predicates. This is necessary since predicates mess up the disassembler table building.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225256 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoInstCombine: Bitcast call arguments from/to pointer/integer type
David Majnemer [Tue, 6 Jan 2015 08:41:31 +0000 (08:41 +0000)]
InstCombine: Bitcast call arguments from/to pointer/integer type

Try harder to get rid of bitcast'd calls by ptrtoint/inttoptr'ing
arguments and return values when DataLayout says it is safe to do so.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225254 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Simplify how we parse the outer layer of the pass pipeline text and
Chandler Carruth [Tue, 6 Jan 2015 08:37:58 +0000 (08:37 +0000)]
[PM] Simplify how we parse the outer layer of the pass pipeline text and
remove an extra, redundant pass manager wrapping every run.

I had kept seeing these when manually testing, but it was getting really
annoying and was going to cause problems with overly eager invalidation.
The root cause was an overly complex and unnecessary pile of code for
parsing the outer layer of the pass pipeline. We can instead delegate
most of this to the recursive pipeline parsing.

I've added some somewhat more basic and precise tests to catch this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225253 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Make isel select the 2-byte register form of INC/DEC even in non-64-bit mode...
Craig Topper [Tue, 6 Jan 2015 07:35:50 +0000 (07:35 +0000)]
[X86] Make isel select the 2-byte register form of INC/DEC even in non-64-bit mode. Convert to the 1-byte form in non-64-bit mode as part of MCInst lowering.

Overall this seems simpler. It reduces duplication of patterns between both modes and it simplifies the memory folding/unfolding tables as they don't need to create fake instructions just to keep track of 64-bitness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225252 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Remove old README.txt entry regarding struct passing
Hal Finkel [Tue, 6 Jan 2015 07:23:13 +0000 (07:23 +0000)]
[PowerPC] Remove old README.txt entry regarding struct passing

Because of how Clang represents structs as arrays (at least on non-Darwin
platforms), and what SROA does, etc. this is no longer a problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225251 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoX86: Don't make illegal GOTTPOFF relocations
David Majnemer [Tue, 6 Jan 2015 07:12:52 +0000 (07:12 +0000)]
X86: Don't make illegal GOTTPOFF relocations

"ELF Handling for Thread-Local Storage" specifies that R_X86_64_GOTTPOFF
relocation target a movq or addq instruction.

Prohibit the truncation of such loads to movl or addl.

This fixes PR22083.

Differential Revision: http://reviews.llvm.org/D6839

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225250 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Add some missing names in getTargetNodeName
Hal Finkel [Tue, 6 Jan 2015 07:02:15 +0000 (07:02 +0000)]
[PowerPC] Add some missing names in getTargetNodeName

These are used for debugging output; NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225249 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Improve int_to_fp(fp_to_int(x)) combining
Hal Finkel [Tue, 6 Jan 2015 06:01:57 +0000 (06:01 +0000)]
[PowerPC] Improve int_to_fp(fp_to_int(x)) combining

The old target DAG combine that allowed for performing int_to_fp(fp_to_int(x))
without a load/store pair is updated here with support for unsigned integers,
and to support single-precision values without a third rounding step, on newer
cores with the appropriate instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225248 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Add a utility pass template that synthesizes the invalidation of
Chandler Carruth [Tue, 6 Jan 2015 04:49:44 +0000 (04:49 +0000)]
[PM] Add a utility pass template that synthesizes the invalidation of
a specific analysis result.

This is quite handy to test things, and will also likely be very useful
for debugging issues. You could narrow down pass validation failures by
walking these invalidate pass runs up and down the pass pipeline, etc.
I've added support to the pass pipeline parsing to be able to create one
of these for any analysis pass desired.

Just adding this class uncovered one latent bug where the
AnalysisManager CRTP base class had a hard-coded Module type rather than
using IRUnitT.

I've also added tests for invalidation and caching of analyses in
a basic way across all the pass managers. These in turn uncovered two
more bugs where we failed to correctly invalidate an analysis -- its
results were invalidated but the key for re-running the pass was never
cleared and so it was never re-run. Quite nasty. I'm very glad to debug
this here rather than with a full system.

Also, yes, the naming here is horrid. I'm going to update some of the
names to be slightly less awful shortly. But really, I've no "good"
ideas for naming. I'll be satisfied if I can get it to "not bad".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225246 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Simplify how we use the registry by including it only once. Still
Chandler Carruth [Tue, 6 Jan 2015 04:49:38 +0000 (04:49 +0000)]
[PM] Simplify how we use the registry by including it only once. Still
more verbose than I'd like, but the code really isn't that interesting,
and this still seems vastly simpler than any other solutions I've come
up with. =] Maybe if we get to the 10th IR unit, this will be a problem
in practice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225245 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove 16-bit and 32-bit offset jump instructions from the AsmParser. We always...
Craig Topper [Tue, 6 Jan 2015 04:23:57 +0000 (04:23 +0000)]
[X86] Remove 16-bit and 32-bit offset jump instructions from the AsmParser. We always select the 8-bit size and let the assembler backend relax to the larger size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225243 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Make isel select the shorter form of jump instructions instead of the long...
Craig Topper [Tue, 6 Jan 2015 04:23:53 +0000 (04:23 +0000)]
[X86] Make isel select the shorter form of jump instructions instead of the long form.

The assembler backend will relax to the long form if necessary. This removes a swap from long form to short form in the MCInstLowering code. Selecting the long form used to be required by the old JIT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225242 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Add a collection of no-op analysis passes and switch the new pass
Chandler Carruth [Tue, 6 Jan 2015 02:50:06 +0000 (02:50 +0000)]
[PM] Add a collection of no-op analysis passes and switch the new pass
manager tests to use them and be significantly more comprehensive.

This, naturally, uncovered a bug where the CGSCC pass manager wasn't
printing analyses when they were run.

The only remaining core manipulator is I think an invalidate pass
similar to the require pass. That'll be next. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225240 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Sink the no-op pass parsing logic into the .def-based registry to
Chandler Carruth [Tue, 6 Jan 2015 02:37:55 +0000 (02:37 +0000)]
[PM] Sink the no-op pass parsing logic into the .def-based registry to
simplify things. This will become more important as I add no-op analyses
that want to re-use the logic we already have for analyses in the
registry. For now, no functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225238 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Move the analysis registry into the Passes.cpp file and provide
Chandler Carruth [Tue, 6 Jan 2015 02:21:37 +0000 (02:21 +0000)]
[PM] Move the analysis registry into the Passes.cpp file and provide
a normal interface for it in Passes.h.

This gives us essentially a single interface for running pass managers
which are provided from the bottom of the LLVM stack through interfaces
at the top of the LLVM stack that populate them with all of the
different analyses available throughout. It also means there is a single
blob of code that needs to include all of the pass headers and needs to
deal with the registry of passes and parsing names.

No functionality changed intended, should just be cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225237 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Add a utility to the new pass manager for generating a pass which
Chandler Carruth [Tue, 6 Jan 2015 02:10:51 +0000 (02:10 +0000)]
[PM] Add a utility to the new pass manager for generating a pass which
is a no-op other than requiring some analysis results be available.

This can be used in real pass pipelines to force the usually lazy
analysis running to eagerly compute something at a specific point, and
it can be used to test the pass manager infrastructure (my primary use
at the moment).

I've also added bit of pipeline parsing magic to support generating
these directly from the opt command so that you can directly use these
when debugging your analysis. The syntax is:

  require<analysis-name>

This can be used at any level of the pass manager. For example:

  cgscc(function(require<my-analysis>,no-op-function))

This would produce a no-op function pass requiring my-analysis, followed
by a fully no-op function pass, both of these in a function pass manager
which is nested inside of a bottom-up CGSCC pass manager which is in the
top-level (implicit) module pass manager.

I have zero attachment to the particular syntax I'm using here. Consider
it a straw man for use while I'm testing and fleshing things out.
Suggestions for better syntax welcome, and I'll update everything based
on any consensus that develops.

I've used this new functionality to more directly test the analysis
printing rather than relying on the cgscc pass manager running an
analysis for me. This is still minimally tested because I need to have
analyses to run first! ;] That patch is next, but wanted to keep this
one separate for easier review and discussion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225236 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd a testcase that would have found the problem in r225048.
Rafael Espindola [Tue, 6 Jan 2015 01:41:24 +0000 (01:41 +0000)]
Add a testcase that would have found the problem in r225048.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225235 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove dead variable.
Eric Christopher [Tue, 6 Jan 2015 01:12:42 +0000 (01:12 +0000)]
Remove dead variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225233 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse the same call off of the TargetMachine rather than the subtarget.
Eric Christopher [Tue, 6 Jan 2015 01:12:40 +0000 (01:12 +0000)]
Use the same call off of the TargetMachine rather than the subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225232 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRewrite the Mips16HardFloat pass to avoid using the Subtarget.
Eric Christopher [Tue, 6 Jan 2015 01:12:30 +0000 (01:12 +0000)]
Rewrite the Mips16HardFloat pass to avoid using the Subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225231 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r225048: It broke ObjC on AArch64.
Lang Hames [Tue, 6 Jan 2015 00:54:32 +0000 (00:54 +0000)]
Revert r225048: It broke ObjC on AArch64.

I've filed http://llvm.org/PR22100 to track this issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225228 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove X86 .quad workaround for buggy GNU assembler on OpenBSD / Bitrig.
Brad Smith [Tue, 6 Jan 2015 00:53:52 +0000 (00:53 +0000)]
Remove X86 .quad workaround for buggy GNU assembler on OpenBSD / Bitrig.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225227 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoIR: Don't drop MDNode uniquing on null operands
Duncan P. N. Exon Smith [Mon, 5 Jan 2015 23:31:54 +0000 (23:31 +0000)]
IR: Don't drop MDNode uniquing on null operands

Now that `LLVMContextImpl` can call `MDNode::dropAllReferences()` to
prevent teardown madness, stop dropping uniquing just because an operand
drops to null.

Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225223 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "Use the integrated assembler by default on 32-bit PowerPC and SPARC"
Duncan P. N. Exon Smith [Mon, 5 Jan 2015 23:31:51 +0000 (23:31 +0000)]
Revert "Use the integrated assembler by default on 32-bit PowerPC and SPARC"

This reverts commit r225213.  It's failing on multiple buildbots [1][2].

[1]: http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/22032
[2]: http://lab.llvm.org:8080/green/view/Clang/job/clang-stage1-cmake-RA-incremental_check/2357/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225222 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Fix test to pass on Darwin hosts
Hal Finkel [Mon, 5 Jan 2015 23:17:43 +0000 (23:17 +0000)]
[PowerPC] Fix test to pass on Darwin hosts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225220 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Remove old README.txt entry
Hal Finkel [Mon, 5 Jan 2015 22:20:22 +0000 (22:20 +0000)]
[PowerPC] Remove old README.txt entry

We no longer generate horrible code for the stated function:

void f(signed char *a, _Bool b, _Bool c) {
  signed char t = 0;
  if (b)  t = *a;
  if (c)  *a = t;
}

for which we now generate:

.L.f:
        andi. 5, 5, 1
        cmpldi 1, 4, 0
        li 5, 0
        beq 1, .LBB0_2
        lbz 5, 0(3)
.LBB0_2:                                # %if.end
        bclr 4, 1, 0
        stb 5, 0(3)
        blr

so we don't need the README.txt entry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225217 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] lowerVectorShuffleAsByteShift tidyup
Simon Pilgrim [Mon, 5 Jan 2015 22:08:48 +0000 (22:08 +0000)]
[X86][SSE] lowerVectorShuffleAsByteShift tidyup

Removed local isSequential predicate and use standard helper isSequentialOrUndefInRange instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225216 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Convert a README.txt entry into a better test
Hal Finkel [Mon, 5 Jan 2015 21:53:52 +0000 (21:53 +0000)]
[PowerPC] Convert a README.txt entry into a better test

We now produce the desired code as noted in the README.txt file (no spurious
or). Remove the README entry and improve the regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225214 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse the integrated assembler by default on 32-bit PowerPC and SPARC
Brad Smith [Mon, 5 Jan 2015 21:48:16 +0000 (21:48 +0000)]
Use the integrated assembler by default on 32-bit PowerPC and SPARC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225213 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Remove README.txt entry
Hal Finkel [Mon, 5 Jan 2015 21:41:26 +0000 (21:41 +0000)]
[PowerPC] Remove README.txt entry

This entry has been rendered irrelevant now that we have proper CR bit
tracking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225211 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Adding add/sub with carry, logical shift left by immediate and memop instru...
Colin LeMahieu [Mon, 5 Jan 2015 21:36:38 +0000 (21:36 +0000)]
[Hexagon] Adding add/sub with carry, logical shift left by immediate and memop instructions.  Removing old defs without bits and updating references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225210 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Add a test for truncating a shifted load
Hal Finkel [Mon, 5 Jan 2015 21:33:14 +0000 (21:33 +0000)]
[PowerPC] Add a test for truncating a shifted load

We now produce the desired code as noted in the README.txt file. Remove the
README entry and add a regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225209 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMake DIE.h a public CodeGen header.
Frederic Riss [Mon, 5 Jan 2015 21:29:41 +0000 (21:29 +0000)]
Make DIE.h a public CodeGen header.

dsymutil would like to use all the AsmPrinter/MCStreamer infrastructure
to stream out the DWARF. In order to do so, it will reuse the DIE object
and so this header needs to be public.

The interface exposed here has some corners that cannot be used without a
DwarfDebug object, but clients that want to stream Dwarf can just avoid
these.

Differential Revision: http://reviews.llvm.org/D6695

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225208 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[dsymutil] Implement the BinaryHolder object and gain archive support.
Frederic Riss [Mon, 5 Jan 2015 21:29:28 +0000 (21:29 +0000)]
[dsymutil] Implement the BinaryHolder object and gain archive support.

This object is meant to own the ObjectFiles and their underlying
MemoryBuffer. It is basically the equivalent of an OwningBinary
except that it efficiently handles Archives. It is optimized for
efficiently providing mappings of members of the same archive when
they are opened successively (which is standard in Darwin debug
maps, objects from the same archive will be contiguous).

Of course, the BinaryHolder will also be used by the DWARF linker
once it is commited, but for now only the debug map parser uses it.

With this change, you can run llvm-dsymutil on your Darwin debug build
of clang and get a complete debug map for it.

Differential Revision: http://reviews.llvm.org/D6690

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225207 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[autoconf] llvm/cmake/modules/Makefile: Make sure to regenerate LLVMConfig.cmake...
NAKAMURA Takumi [Mon, 5 Jan 2015 21:24:36 +0000 (21:24 +0000)]
[autoconf] llvm/cmake/modules/Makefile: Make sure to regenerate LLVMConfig.cmake whenever Makefile is updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225206 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Add another test for load/store with update
Hal Finkel [Mon, 5 Jan 2015 21:22:42 +0000 (21:22 +0000)]
[PowerPC] Add another test for load/store with update

We now produce the desired code as noted in the README.txt file. Remove the
README entry and add a regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225205 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[autoconf] Export LLVM_LIBDIR_SUFFIX with empty string in LLVMConfig.cmake. tools...
NAKAMURA Takumi [Mon, 5 Jan 2015 21:14:14 +0000 (21:14 +0000)]
[autoconf] Export LLVM_LIBDIR_SUFFIX with empty string in LLVMConfig.cmake. tools/llvm-config is also doing so.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225204 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Fold i1 extensions with other ops
Hal Finkel [Mon, 5 Jan 2015 21:10:24 +0000 (21:10 +0000)]
[PowerPC] Fold i1 extensions with other ops

Consider this function from our README.txt file:

  int foo(int a, int b) { return (a < b) << 4; }

We now explicitly track CR bits by default, so the comment in the README.txt
about not really having a SETCC is no longer accurate, but we did generate this
somewhat silly code:

        cmpw 0, 3, 4
        li 3, 0
        li 12, 1
        isel 3, 12, 3, 0
        sldi 3, 3, 4
        blr

which generates the zext as a select between 0 and 1, and then shifts the
result by a constant amount. Here we preprocess the DAG in order to fold the
results of operations on an extension of an i1 value into the SELECT_I[48]
pseudo instruction when the resulting constant can be materialized using one
instruction (just like the 0 and 1). This was not implemented as a DAGCombine
because the resulting code would have been anti-canonical and depends on
replacing chained user nodes, which does not fit well into the lowering
paradigm. Now we generate:

        cmpw 0, 3, 4
        li 3, 0
        li 12, 16
        isel 3, 12, 3, 0
        blr

which is less silly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225203 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Fixed description for isSequentialOrUndefInRange. NFC.
Simon Pilgrim [Mon, 5 Jan 2015 21:09:48 +0000 (21:09 +0000)]
[X86][SSE] Fixed description for isSequentialOrUndefInRange. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225202 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Adding rounding reg/reg variants, accumulating multiplies, and accumulating...
Colin LeMahieu [Mon, 5 Jan 2015 20:56:41 +0000 (20:56 +0000)]
[Hexagon] Adding rounding reg/reg variants, accumulating multiplies, and accumulating shifts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225201 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoIR: Prune arguments to ValueAsMetadata::ValueAsMetadata()
Duncan P. N. Exon Smith [Mon, 5 Jan 2015 20:41:25 +0000 (20:41 +0000)]
IR: Prune arguments to ValueAsMetadata::ValueAsMetadata()

`LLVMContext` isn't actually used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225200 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without encoding...
Colin LeMahieu [Mon, 5 Jan 2015 20:35:54 +0000 (20:35 +0000)]
[Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without encoding bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225199 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Adding V4 logic-logic instructions and tests.
Colin LeMahieu [Mon, 5 Jan 2015 20:14:58 +0000 (20:14 +0000)]
[Hexagon] Adding V4 logic-logic instructions and tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225198 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions.
Colin LeMahieu [Mon, 5 Jan 2015 20:04:40 +0000 (20:04 +0000)]
[Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225197 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Remove zexts after i32 ctlz
Hal Finkel [Mon, 5 Jan 2015 18:52:29 +0000 (18:52 +0000)]
[PowerPC] Remove zexts after i32 ctlz

The 64-bit semantics of cntlzw are not special, the 32-bit population count is
stored as a 64-bit value in the range [0,32]. As a result, it is always zero
extended, and it can be added to the PPCISelDAGToDAG peephole optimization as a
frontier instruction for the removal of unnecessary zero extensions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225192 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Remove zexts after byte-swapping loads
Hal Finkel [Mon, 5 Jan 2015 18:09:06 +0000 (18:09 +0000)]
[PowerPC] Remove zexts after byte-swapping loads

lhbrx and lwbrx not only load their data with byte swapping, but also clear the
upper 32 bits (at least). As a result, they can be added to the PPCISelDAGToDAG
peephole optimization as frontier instructions for the removal of unnecessary
zero extensions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225189 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Adding round reg/imm and bitsplit instructions.
Colin LeMahieu [Mon, 5 Jan 2015 18:08:21 +0000 (18:08 +0000)]
[Hexagon] Adding round reg/imm and bitsplit instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225188 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSymbolRewriter: use iplist::splice
Saleem Abdulrasool [Mon, 5 Jan 2015 17:56:32 +0000 (17:56 +0000)]
SymbolRewriter: use iplist::splice

The swap implementation for iplist is currently unsupported.  Simply splice the
old list into place, which achieves the same purpose.  This is needed in order
to thread the -frewrite-map-file frontend option correctly.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225186 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSymbolRewriter: 80-column
Saleem Abdulrasool [Mon, 5 Jan 2015 17:56:29 +0000 (17:56 +0000)]
SymbolRewriter: 80-column

Wrap a couple of lines.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225185 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Improve codegen of store lane instructions by avoiding GPR usage.
Ahmed Bougacha [Mon, 5 Jan 2015 17:10:26 +0000 (17:10 +0000)]
[AArch64] Improve codegen of store lane instructions by avoiding GPR usage.

We used to generate code similar to:

  umov.b        w8, v0[2]
  strb  w8, [x0, x1]

because the STR*ro* patterns were preferred to ST1*.
Instead, we can avoid going through GPRs, and generate:

  add   x8, x0, x1
  st1.b { v0 }[2], [x8]

This patch increases the ST1* AddedComplexity to achieve that.

rdar://16372710
Differential Revision: http://reviews.llvm.org/D6202

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225183 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Improve codegen of store lane 0 instructions by directly storing the subreg...
Ahmed Bougacha [Mon, 5 Jan 2015 17:02:28 +0000 (17:02 +0000)]
[AArch64] Improve codegen of store lane 0 instructions by directly storing the subregister.

For 0-lane stores, we used to generate code similar to:

  fmov w8, s0
  str w8, [x0, x1, lsl #2]

instead of:

  str s0, [x0, x1, lsl #2]

To correct that: for store lane 0 patterns, directly match to STR <subreg>0.

Byte-sized instructions don't have the special case for a 0 index,
because FPR8s are defined to have untyped content.

rdar://16372710
Differential Revision: http://reviews.llvm.org/D6772

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225181 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agollvm/test/lit.cfg: have_ld_plugin_support(): Use decode() for stdout.
NAKAMURA Takumi [Mon, 5 Jan 2015 14:18:04 +0000 (14:18 +0000)]
llvm/test/lit.cfg: have_ld_plugin_support(): Use decode() for stdout.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225171 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSelect lower fsub,fabs pattern to fabd on AArch64
Karthik Bhat [Mon, 5 Jan 2015 13:57:59 +0000 (13:57 +0000)]
Select lower fsub,fabs pattern to fabd on AArch64
This patch lowers patterns such as-
  fsub   v0.4s, v0.4s, v1.4s
  fabs   v0.4s, v0.4s
to
  fabd  v0.4s, v0.4s, v1.4s
on AArch64.

Review: http://reviews.llvm.org/D6791

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225169 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoParse Tag_compatibility correctly.
Charlie Turner [Mon, 5 Jan 2015 13:26:37 +0000 (13:26 +0000)]
Parse Tag_compatibility correctly.

Tag_compatibility takes two arguments, but before this patch it would
erroneously accept just one, it now produces an error in that case.

Change-Id: I530f918587620d0d5dfebf639944d6083871ef7d

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225167 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoEmit the build attribute Tag_conformance.
Charlie Turner [Mon, 5 Jan 2015 13:12:17 +0000 (13:12 +0000)]
Emit the build attribute Tag_conformance.

Claim conformance to version 2.09 of the ARM ABI.

This build attribute must be emitted first amongst the build attributes when
written to an object file. This is to simplify conformance detection by
consumers.

Change-Id: If9eddcfc416bc9ad6e5cc8cdcb05d0031af7657e

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225166 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSelect lower sub,abs pattern to sabd on AArch64
Karthik Bhat [Mon, 5 Jan 2015 13:11:07 +0000 (13:11 +0000)]
Select lower sub,abs pattern to sabd on AArch64

This patch lowers patterns such as-
  sub v0.4s, v0.4s, v1.4s
  abs v0.4s, v0.4s
to
  sabd v0.4s, v0.4s, v1.4s
on AArch64.

Review: http://reviews.llvm.org/D6781

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225165 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix broken test from r225159.
Michael Kuperstein [Mon, 5 Jan 2015 12:34:01 +0000 (12:34 +0000)]
Fix broken test from r225159.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225164 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Don't run the machinery of invalidating all the analysis passes
Chandler Carruth [Mon, 5 Jan 2015 12:32:11 +0000 (12:32 +0000)]
[PM] Don't run the machinery of invalidating all the analysis passes
when all are being preserved.

We want to short-circuit this for a couple of reasons. One, I don't
really want passes to grow a dependency on actually receiving their
invalidate call when they've been preserved. I'm thinking about removing
this entirely. But more importantly, preserving everything is likely to
be the common case in a lot of scenarios, and it would be really good to
bypass all of the invalidation and preservation machinery there.
Avoiding calling N opaque functions to try to invalidate things that are
by definition still valid seems important. =]

This wasn't really inpsired by much other than seeing the spam in the
logging for analyses, but it seems better ot get it checked in rather
than forgetting about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225163 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Add names and debug logging for analysis passes to the new pass
Chandler Carruth [Mon, 5 Jan 2015 12:21:44 +0000 (12:21 +0000)]
[PM] Add names and debug logging for analysis passes to the new pass
manager.

This starts to allow us to test analyses more easily, but it's really
only the beginning. Some of the code here is still untestable without
manual changes to create analysis passes, but I wanted to factor it into
a small of chunks as possible.

Next up in order to be able to test things are, in no particular order:
- No-op analyses passes so we don't have to use real ones to exercise
  the pass maneger itself.
- Automatic way of generating dummy passes that require an analysis be
  run, including a variant that calls a 'print' method on a pass to make
  it even easier to print out the results of an analysis.
- Dummy passes that invalidate all analyses for their IR unit so we can
  test invalidation and re-runs.
- Automatic way to print each analysis pass as it is re-run.
- Automatic but optional verification of analysis passes everywhere
  possible.

I'm not claiming I'll get to all of these immediately, but that's what
is in the pipeline at some stage. I'm fleshing out exactly what I need
and what to prioritize by working on converting analyses and then trying
to test the conversion. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225162 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReplace several 'assert(false' with 'llvm_unreachable' or fold a condition into the...
Craig Topper [Mon, 5 Jan 2015 10:15:49 +0000 (10:15 +0000)]
Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225160 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFixed a bug in memory dependence checking module of loop vectorization. The following...
Jiangning Liu [Mon, 5 Jan 2015 10:08:58 +0000 (10:08 +0000)]
Fixed a bug in memory dependence checking module of loop vectorization. The following loop should not be vectorized with current algorithm.

{code}
// loop body
   ... = a[i]          (1)
    ... = a[i+1]       (2)
 .......
a[i+1] = ....          (3)
   a[i] = ...          (4)
{code}

The algorithm tries to collect memory access candidates from AliasSetTracker, and then check memory dependences one another. The memory accesses are unique in AliasSetTracker, and a single memory access in AliasSetTracker may map to multiple entries in AccessAnalysis, which could cover both 'read' and 'write'. Originally the algorithm only checked 'write' entry in Accesses if only 'write' exists. This is incorrect and the consequence is it ignored all read access, and finally some RAW and WAR dependence are missed.

For the case given above, if we ignore two reads, the dependence between (1) and (3) would not be able to be captured, and finally this loop will be incorrectly vectorized.

The fix simply inserts a new loop to find all entries in Accesses. Since it will skip most of all other memory accesses by checking the Value pointer at the very beginning of the loop, it should not increase compile-time visibly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225159 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoConvert SmallMapVector from a class to a struct.
Michael Gottesman [Mon, 5 Jan 2015 08:55:19 +0000 (08:55 +0000)]
Convert SmallMapVector from a class to a struct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225158 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove the predicates from the register forms of the 2-byte inc and dec instruc...
Craig Topper [Mon, 5 Jan 2015 08:19:12 +0000 (08:19 +0000)]
[X86] Remove the predicates from the register forms of the 2-byte inc and dec instructions. Remove the 32-bit mode only versions that existed for the disassembler. Move the patterns out of the instructions so they can still be qualified with predicates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225157 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Simplify code a little by just summing flags instead of conditionally increment...
Craig Topper [Mon, 5 Jan 2015 08:19:10 +0000 (08:19 +0000)]
[X86] Simplify code a little by just summing flags instead of conditionally incrementing. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225156 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary redeclaration of a variable with the same assignment as...
Craig Topper [Mon, 5 Jan 2015 08:19:07 +0000 (08:19 +0000)]
[X86] Remove unnecessary redeclaration of a variable with the same assignment as the beginning of the function. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225155 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove a strange fixme referring to a hack that doesn't seem to exist since...
Craig Topper [Mon, 5 Jan 2015 08:19:05 +0000 (08:19 +0000)]
[X86] Remove a strange fixme referring to a hack that doesn't seem to exist since the code is in a comment. Can't figure out what the body of the 'if' was supposed to be anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225154 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] Reduce text duplication for similar operand class declarations in tablegen...
Craig Topper [Mon, 5 Jan 2015 08:19:03 +0000 (08:19 +0000)]
[x86] Reduce text duplication for similar operand class declarations in tablegen instruction info. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225153 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Fix the immediate size to match the address size in the operand types for the...
Craig Topper [Mon, 5 Jan 2015 08:18:59 +0000 (08:18 +0000)]
[X86] Fix the immediate size to match the address size in the operand types for the move to/from absolute memory instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225152 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unused operand type from disassembler handling. NFC
Craig Topper [Mon, 5 Jan 2015 08:18:52 +0000 (08:18 +0000)]
[X86] Remove unused operand type from disassembler handling. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225151 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Enable speculation of cttz/ctlz
Hal Finkel [Mon, 5 Jan 2015 05:24:42 +0000 (05:24 +0000)]
[PowerPC] Enable speculation of cttz/ctlz

PPC has an instruction for ctlz with defined zero behavior, and our lowering of
cttz (provided by DAGCombine) is also efficient and branchless, so speculating
these makes sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225150 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SROA] Apply a somewhat heavy and unpleasant hammer to fix PR22093, an
Chandler Carruth [Mon, 5 Jan 2015 04:17:53 +0000 (04:17 +0000)]
[SROA] Apply a somewhat heavy and unpleasant hammer to fix PR22093, an
assert out of the new pre-splitting in SROA.

This fix makes the code do what was originally intended -- when we have
a store of a load both dealing in the same alloca, we force them to both
be pre-split with identical offsets. This is really quite hard to do
because we can keep discovering problems as we go along. We have to
track every load over the current alloca which for any resaon becomes
invalid for pre-splitting, and go back to remove all stores of those
loads. I've included a couple of test cases derived from PR22093 that
cover the different ways this can happen. While that PR only really
triggered the first of these two, its the same fundamental issue.

The other challenge here is documented in a FIXME now. We end up being
quite a bit more aggressive for pre-splitting when loads and stores
don't refer to the same alloca. This aggressiveness comes at the cost of
introducing potentially redundant loads. It isn't clear that this is the
right balance. It might be considerably better to require that we only
do pre-splitting when we can presplit every load and store involved in
the entire operation. That would give more consistent if conservative
results. Unfortunately, it requires a non-trivial change to the actual
pre-splitting operation in order to correctly handle cases where we end
up pre-splitting stores out-of-order. And it isn't 100% clear that this
is the right direction, although I'm starting to suspect that it is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225149 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LangRef] Correct a typo
Hal Finkel [Mon, 5 Jan 2015 04:05:21 +0000 (04:05 +0000)]
[LangRef] Correct a typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225148 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Materialize i64 constants using rotation with masking
Hal Finkel [Mon, 5 Jan 2015 03:41:38 +0000 (03:41 +0000)]
[PowerPC] Materialize i64 constants using rotation with masking

r225135 added the ability to materialize i64 constants using rotations in order
to reduce the instruction count. Sometimes we can use a rotation only with some
extra masking, so that we take advantage of the fact that generating a bunch of
extra higher-order 1 bits is easy using li/lis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225147 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Cleanup a place where I forgot to update the header guards when
Chandler Carruth [Mon, 5 Jan 2015 03:03:31 +0000 (03:03 +0000)]
[PM] Cleanup a place where I forgot to update the header guards when
renaming a file from AssumptionTracker.h to AssumptionCache.h.

Thanks to Philip Reames for noticing and pointing it out in code review!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225146 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Switch the new pass manager to use a reference-based API for IR
Chandler Carruth [Mon, 5 Jan 2015 02:47:05 +0000 (02:47 +0000)]
[PM] Switch the new pass manager to use a reference-based API for IR
units.

This was debated back and forth a bunch, but using references is now
clearly cleaner. Of all the code written using pointers thus far, in
only one place did it really make more sense to have a pointer. In most
cases, this just removes immediate dereferencing from the code. I think
it is much better to get errors on null IR units earlier, potentially
at compile time, than to delay it.

Most notably, the legacy pass manager uses references for its routines
and so as more and more code works with both, the use of pointers was
likely to become really annoying. I noticed this when I ported the
domtree analysis over and wrote the entire thing with references only to
have it fail to compile. =/ It seemed better to switch now than to
delay. We can, of course, revisit this is we learn that references are
really problematic in the API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225145 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Wire up support for explicitly running the verifier pass.
Chandler Carruth [Mon, 5 Jan 2015 00:08:53 +0000 (00:08 +0000)]
[PM] Wire up support for explicitly running the verifier pass.

The required functionality has been there for some time, but I never
managed to actually wire it into the command line registry of passes.
Let's do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225144 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Cleanup a const_cast and other machinery left over in this code
Chandler Carruth [Sun, 4 Jan 2015 23:13:57 +0000 (23:13 +0000)]
[PM] Cleanup a const_cast and other machinery left over in this code
from before I removed thet non-const use of the function.

The unused variable that held the const_cast was already kindly removed
by Michael.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225143 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Added vector packing test for pr12412
Simon Pilgrim [Sun, 4 Jan 2015 19:08:03 +0000 (19:08 +0000)]
[X86][SSE] Added vector packing test for pr12412

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225138 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Added vector integer truncation tests - based off pr15524
Simon Pilgrim [Sun, 4 Jan 2015 17:52:00 +0000 (17:52 +0000)]
[X86][SSE] Added vector integer truncation tests - based off pr15524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225137 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Materialize i64 constants using rotation
Hal Finkel [Sun, 4 Jan 2015 15:43:55 +0000 (15:43 +0000)]
[PowerPC] Materialize i64 constants using rotation

Materializing full 64-bit constants on PPC64 can be expensive, requiring up to
5 instructions depending on the locations of the non-zero bits. Sometimes
materializing a rotated constant, and then applying the inverse rotation, requires
fewer instructions than the direct method. If so, do that instead.

In r225132, I added support for forming constants using bit inversion. In
effect, this reverts that commit and replaces it with rotation support. The bit
inversion is useful for turning constants that are mostly ones into ones that
are mostly zeros (thus enabling a more-efficient shift-based materialization),
but the same effect can be obtained by using negative constants and a rotate,
and that is at least as efficient, if not more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225135 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix unused variable warning for non-asserts builds. NFC.
Michael Kuperstein [Sun, 4 Jan 2015 13:35:44 +0000 (13:35 +0000)]
Fix unused variable warning for non-asserts builds. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225133 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Materialize i64 constants using bit inversion
Hal Finkel [Sun, 4 Jan 2015 12:35:03 +0000 (12:35 +0000)]
[PowerPC] Materialize i64 constants using bit inversion

Materializing full 64-bit constants on PPC64 can be expensive, requiring up to
5 instructions depending on the locations of the non-zero bits. Sometimes
materializing the bit-reversed constant, and then flipping the bits, requires
fewer instructions than the direct method. If so, do that instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225132 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PM] Split the AssumptionTracker immutable pass into two separate APIs:
Chandler Carruth [Sun, 4 Jan 2015 12:03:27 +0000 (12:03 +0000)]
[PM] Split the AssumptionTracker immutable pass into two separate APIs:
a cache of assumptions for a single function, and an immutable pass that
manages those caches.

The motivation for this change is two fold. Immutable analyses are
really hacks around the current pass manager design and don't exist in
the new design. This is usually OK, but it requires that the core logic
of an immutable pass be reasonably partitioned off from the pass logic.
This change does precisely that. As a consequence it also paves the way
for the *many* utility functions that deal in the assumptions to live in
both pass manager worlds by creating an separate non-pass object with
its own independent API that they all rely on. Now, the only bits of the
system that deal with the actual pass mechanics are those that actually
need to deal with the pass mechanics.

Once this separation is made, several simplifications become pretty
obvious in the assumption cache itself. Rather than using a set and
callback value handles, it can just be a vector of weak value handles.
The callers can easily skip the handles that are null, and eventually we
can wrap all of this up behind a filter iterator.

For now, this adds boiler plate to the various passes, but this kind of
boiler plate will end up making it possible to port these passes to the
new pass manager, and so it will end up factored away pretty reasonably.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225131 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoInstCombine: match can find ConstantExprs, don't assume we have a Value
David Majnemer [Sun, 4 Jan 2015 07:36:02 +0000 (07:36 +0000)]
InstCombine: match can find ConstantExprs, don't assume we have a Value

We assumed the output of a match was a Value, this would cause us to
assert because we would fail a cast<>.  Instead, use a helper in the
Operator family to hide the distinction between Value and Constant.

This fixes PR22087.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225127 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoValueTracking: ComputeNumSignBits should tolerate misshapen phi nodes
David Majnemer [Sun, 4 Jan 2015 07:06:53 +0000 (07:06 +0000)]
ValueTracking: ComputeNumSignBits should tolerate misshapen phi nodes

PHI nodes can have zero operands in the middle of a transform.  It is
expected that utilities in Analysis don't freak out when this happens.

Note that it is considered invalid to allow these misshapen phi nodes to
make it to another pass.

This fixes PR22086.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225126 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[APFloat][ADT] Fix sign handling logic for FMA results that truncate to zero.
Lang Hames [Sun, 4 Jan 2015 01:20:55 +0000 (01:20 +0000)]
[APFloat][ADT] Fix sign handling logic for FMA results that truncate to zero.

This patch adds a check for underflow when truncating results back to lower
precision at the end of an FMA. The additional sign handling logic in
APFloat::fusedMultiplyAdd should only be performed when the result of the
addition step of the FMA (in full precision) is exactly zero, not when the
result underflows to zero.

Unit tests for this case and related signed zero FMA results are included.

Fixes <rdar://problem/18925551>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225123 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agollvm-readobj: add support to dump COFF export tables
Saleem Abdulrasool [Sat, 3 Jan 2015 21:35:09 +0000 (21:35 +0000)]
llvm-readobj: add support to dump COFF export tables

This enhances llvm-readobj to print out the COFF export table, similar to the
-coff-import option.  This is useful for testing in lld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225120 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoARM: permit tail calls to weak externals on COFF
Saleem Abdulrasool [Sat, 3 Jan 2015 21:35:00 +0000 (21:35 +0000)]
ARM: permit tail calls to weak externals on COFF

Weak externals are resolved statically, so we can actually generate the tail
call on PE/COFF targets without breaking the requirements.  It is questionable
whether we want to propagate the current behaviour for MachO as the requirements
are part of the ARM ELF specifications, and it seems that prior to the SVN
r215890, we would have tail'ed the call.  For now, be conservative and only
permit it on PE/COFF where the call will always be fully resolved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225119 91177308-0d34-0410-b5e6-96231b3b80d8