opencl/llvm.git
7 years agoAttempt to increase the overall happiness of the MSCV-based buildbots.
Adrian Prantl [Fri, 1 Aug 2014 22:56:10 +0000 (22:56 +0000)]
Attempt to increase the overall happiness of the MSCV-based buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214588 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoverify-uselistorder: Make the verification logic easier to reuse
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 22:52:06 +0000 (22:52 +0000)]
verify-uselistorder: Make the verification logic easier to reuse

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214587 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInstrProf: Allow multiple functions with the same name
Justin Bogner [Fri, 1 Aug 2014 22:50:07 +0000 (22:50 +0000)]
InstrProf: Allow multiple functions with the same name

This updates the instrumentation based profiling format so that when
we have multiple functions with the same name (but different function
hashes) we keep all of them instead of rejecting the later ones.

There are a number of scenarios where this can come up where it's more
useful to keep multiple function profiles:

* Name collisions in unrelated libraries that are profiled together.
* Multiple "main" functions from multiple tools built against a common
  library.
* Combining profiles from different build configurations (ie, asserts
  and no-asserts)

The profile format now stores the number of counters between the hash
and the counts themselves, so that multiple sets of counts can be
stored. Since this is backwards incompatible, I've bumped the format
version and added some trivial logic to skip this when reading the old
format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214585 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUseListOrder: Guarantee that shuffles change use-list order
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 22:50:04 +0000 (22:50 +0000)]
UseListOrder: Guarantee that shuffles change use-list order

Change shuffleUseLists() always to change use-list order by rejecting
orders that have no changes.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214584 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUseListOrder: Fix blockaddress use-list order
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 22:27:19 +0000 (22:27 +0000)]
UseListOrder: Fix blockaddress use-list order

`parseBitcodeFile()` uses the generic `getLazyBitcodeFile()` function as
a helper.  Since `parseBitcodeFile()` isn't actually lazy -- it calls
`MaterializeAllPermanently()` -- bypass the unnecessary call to
`materializeForwardReferencedFunctions()` by extracting out a common
helper function.  This removes the last of the use-list churn caused by
blockaddresses.

This highlights that we can't reproduce use-list order of globals and
constants when parsing lazily -- but that's necessarily out of scope.
When we're parsing lazily, we never have all the functions in memory, so
the use-lists of globals (and constants that reference globals) are
always incomplete.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214581 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Simplify X87 stackifier pass.
Akira Hatanaka [Fri, 1 Aug 2014 22:19:41 +0000 (22:19 +0000)]
[X86] Simplify X87 stackifier pass.

Stop using ST registers for function returns and inline-asm instructions and use
FP registers instead. This allows removing a large amount of code in the
stackifier pass that was needed to track register liveness and handle copies
between ST and FP registers and function calls returning floating point values.

It also fixes a bug which manifests when an ST register defined by an
inline-asm instruction was live across another inline-asm instruction, as shown
in the following sequence of machine instructions:

1. INLINEASM <es:frndint> $0:[regdef], %ST0<imp-def,tied5>
2. INLINEASM <es:fldcw $0>
3. %FP0<def> = COPY %ST0

<rdar://problem/16952634>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214580 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel...
NAKAMURA Takumi [Fri, 1 Aug 2014 22:15:38 +0000 (22:15 +0000)]
llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel)-linux on 4 lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214578 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebug info: Infrastructure to support debug locations for fragmented
Adrian Prantl [Fri, 1 Aug 2014 22:11:58 +0000 (22:11 +0000)]
Debug info: Infrastructure to support debug locations for fragmented
variables (for example, by-value struct arguments passed in registers, or
large integer values split across several smaller registers).
On the IR level, this adds a new type of complex address operation OpPiece
to DIVariable that describes size and offset of a variable fragment.
On the DWARF emitter level, all pieces describing the same variable are
collected, sorted and emitted as DWARF expressions using the DW_OP_piece
and DW_OP_bit_piece operators.

http://reviews.llvm.org/D3373
rdar://problem/15928306

What this patch doesn't do / Future work:
- This patch only adds the backend machinery to make this work, patches
  that change SROA and SelectionDAG's type legalizer to actually create
  such debug info will follow. (http://reviews.llvm.org/D2680)
- Making the DIVariable complex expressions into an argument of dbg.value
  will reduce the memory footprint of the debug metadata.
- The sorting/uniquing of pieces should be moved into DebugLocEntry,
  to facilitate the merging of multi-piece entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214576 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SDAG] MorphNodeTo recursively deletes dead operands of the old
Chandler Carruth [Fri, 1 Aug 2014 22:09:43 +0000 (22:09 +0000)]
[SDAG] MorphNodeTo recursively deletes dead operands of the old
fromulation of the node, which isn't really the desired behavior from
within the combiner or legalizer, but is necessary within ISel. I've
added a hopefully helpful comment and fixed the only two places where
this took place.

Yet another step toward the combiner and legalizer not needing to use
update listeners with virtual calls to manage the worklists behind
legalization and combining.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214574 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp"
Tom Stellard [Fri, 1 Aug 2014 21:55:50 +0000 (21:55 +0000)]
Revert "R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp"

This reverts commit r214566.

I did not mean to commit this yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214572 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMS inline asm: Hide symbol to attempt to fix test failure on darwin
Reid Kleckner [Fri, 1 Aug 2014 21:54:37 +0000 (21:54 +0000)]
MS inline asm: Hide symbol to attempt to fix test failure on darwin

If the symbol comes from an external DSO, it apparently requires
indirection through a register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214571 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBitcodeReader: Change mechanics of BlockAddress forward references, NFC
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:51:52 +0000 (21:51 +0000)]
BitcodeReader: Change mechanics of BlockAddress forward references, NFC

Now that we can reliably handle forward references to `BlockAddress`
(r214563), change the mechanics to simplify predicting use-list order.

Previously, we created dummy `GlobalVariable`s to represent block
addresses.  After every function was materialized, we'd go through any
forward references to its blocks and RAUW them with a proper
`BlockAddress` constant.  This causes some (potentially a lot of)
unnecessary use-list churn, since any constant expression that it's a
part of will need to be rematerialized as well.

Instead, pre-construct a `BasicBlock` immediately -- without attaching
it to its (empty) `Function` -- and use that to construct a
`BlockAddress`.  This constant will not have to be regenerated.  When
the function body is parsed, hook this pre-constructed basic block up
in the right place using `BasicBlock::insertInto()`.

Both before and after this change, the IR is temporarily in an invalid
state that gets resolved when `materializeForwardReferencedFunctions()`
gets called.

This is a prep commit that's part of PR5680, but the only functionality
change is the reduction of churn in the constant pool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214570 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Remove leftover debugging code
Tom Stellard [Fri, 1 Aug 2014 21:51:05 +0000 (21:51 +0000)]
R600/SI: Remove leftover debugging code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214569 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp
Tom Stellard [Fri, 1 Aug 2014 21:50:47 +0000 (21:50 +0000)]
R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp

SI doesn't use REGISTER_LOAD anymore, but it was still hitting this code
path for 8-bit and 16-bit private loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214566 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodocs: Strongly recommend setting rpath when using a local GCC toolchain
Reid Kleckner [Fri, 1 Aug 2014 21:40:53 +0000 (21:40 +0000)]
docs: Strongly recommend setting rpath when using a local GCC toolchain

Users keep emailing us about the difficulties of getting LD_LIBRARY_PATH
into their environment, which should be completely unecessary. Try to
strengthen the rpath recommentation by putting in an example cmake
invocation.

Speaking of which, we might want to make CMake the recommended build
system in GettingStarted.html.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214565 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Add BasicBlock::insertInto()
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:22:04 +0000 (21:22 +0000)]
IR: Add BasicBlock::insertInto()

Although unlinked `BasicBlock`s can be created, there's currently no way
to insert them into `Function`s after the fact.  In particular,
`moveAfter()` and `moveBefore()` require that the basic block is already
linked.

Extract the logic for initially linking a `BasicBlock` out of the
constructor and into a member function that can be used for lazy
insertion.

  - Asserts that the basic block is currently unlinked.
  - Matches the logic of the constructor.
  - Changed the constructor to use it since the logic matches.

This is needed in a follow-up commit for PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214563 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dfsan] Correctly handle loads and stores of zero size.
Peter Collingbourne [Fri, 1 Aug 2014 21:18:18 +0000 (21:18 +0000)]
[dfsan] Correctly handle loads and stores of zero size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214561 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a non-const subtarget returning function to the target machine
Eric Christopher [Fri, 1 Aug 2014 21:18:01 +0000 (21:18 +0000)]
Add a non-const subtarget returning function to the target machine
so that we can use it to get the old-style JIT out of the subtarget.

This code should be removed when the old-style JIT is removed
(imminently).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214560 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBitcodeReader: Fix some BlockAddress forward reference corner cases
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:11:34 +0000 (21:11 +0000)]
BitcodeReader: Fix some BlockAddress forward reference corner cases

`BlockAddress`es are interesting in that they can reference basic blocks
from *outside* the block's function.  Since basic blocks are not global
values, this presents particular challenges for lazy parsing.

One corner case was found in PR11677 and fixed in r147425.  In that
case, a global variable references a block address.  It's necessary to
load the relevant function to resolve the forward reference before doing
anything with the module.

By inspection, I found (and have fixed here) two other cases:

  - An instruction from one function references a block address from
    another function, and only the first function is lazily loaded.

    I fixed this the same way as PR11677: by eagerly loading the
    referenced function.

  - A function whose block address is taken is dematerialized, leaving
    invalid references to it.

    I fixed this by refusing to dematerialize functions whose block
    addresses are taken (if you have to load it, you can't unload it).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214559 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTry to fix configure+make after r214556
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:06:59 +0000 (21:06 +0000)]
Try to fix configure+make after r214556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214558 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRewrite BitReaderTest, NFC
Duncan P. N. Exon Smith [Fri, 1 Aug 2014 21:01:04 +0000 (21:01 +0000)]
Rewrite BitReaderTest, NFC

Rewrite the single unit test in `BitReaderTest` so that it's easier to
add more tests.

  - Parse from an assembly string rather than using API.
  - Use more helper functions.
  - Use a separate context for the module on the other side.

Aside from relying on the assembly parser, there's no functionality
change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214556 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMS inline asm: Use memory constraints for functions instead of registers
Reid Kleckner [Fri, 1 Aug 2014 20:21:24 +0000 (20:21 +0000)]
MS inline asm: Use memory constraints for functions instead of registers

This is consistent with how we parse them in a standalone .s file, and
inline assembly shouldn't differ.

This fixes errors about requiring more registers than available in
cases like this:
  void f();
  void __declspec(naked) g() {
    __asm pusha
    __asm call f
    __asm popa
    __asm ret
  }

There are no registers available to pass the address of 'f' into the asm
blob.  The asm should now directly call 'f'.

Tests will land in Clang shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214550 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-profdata: Replace redundant tests with more targeted ones
Justin Bogner [Fri, 1 Aug 2014 19:59:48 +0000 (19:59 +0000)]
llvm-profdata: Replace redundant tests with more targeted ones

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214548 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SDAG] Begin simplifying the way in which the legalizer deletes nodes.
Chandler Carruth [Fri, 1 Aug 2014 19:49:59 +0000 (19:49 +0000)]
[SDAG] Begin simplifying the way in which the legalizer deletes nodes.

This lifts the (very few) places the legalizer would delete dead nodes
into the outer loop around the legalizer. This is significantly simpler
because it doesn't require the legalizer itself to manage the iterator
validity, and it doesn't require the legalizer to be a DAG update
listener in order to remove things from the legalized set. It also makes
the interface much less contrived for the case of the legalizer running
inside the last phase of DAG combining.

I'm working on centralizing the deletion of nodes during both legalizing
and combining as much as possible. My hope is to remove the need for DAG
update listeners from the combiner next, which would remove a costly
virtual dispatch chain on every deletion. This in turn should allow us
to more aggressively delete DAG nodes during combining which will in
turn allow us to combine more aggressively by exposing the actual nodes
which have single users to the combine phases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214546 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastISel][AArch64] Fold offset into the memory operation.
Juergen Ributzka [Fri, 1 Aug 2014 19:40:16 +0000 (19:40 +0000)]
[FastISel][AArch64] Fold offset into the memory operation.

Fold simple offsets into the memory operation:
  add x0, x0, #8
  ldr x0, [x0]
-->
  ldr x0, [x0, #8]

Fixes <rdar://problem/17887945>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214545 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInclude Archive.h
Rafael Espindola [Fri, 1 Aug 2014 19:28:15 +0000 (19:28 +0000)]
Include Archive.h

MSVC was complaining about Archive being an incomplete type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214542 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix building with in-tree libc++abi on FreeBSD
Viktor Kutuzov [Fri, 1 Aug 2014 19:23:15 +0000 (19:23 +0000)]
Fix building with in-tree libc++abi on FreeBSD
Differential Revision: http://reviews.llvm.org/D4743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214541 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove virtual method out of line.
Rafael Espindola [Fri, 1 Aug 2014 18:49:24 +0000 (18:49 +0000)]
Move virtual method out of line.

Should fix the MSVC build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214539 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd support for StackMap section for ELF/Linux systems
Philip Reames [Fri, 1 Aug 2014 18:47:09 +0000 (18:47 +0000)]
Add support for StackMap section for ELF/Linux systems

This patch adds code to emits the StackMap section on ELF systems. This section is required to support llvm.experimental.stackmap and llvm.experimental.patchpoint intrinsics.

Reviewers: ributzka, echristo

Differential Revision: http://reviews.llvm.org/D4574

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214538 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastISel][AArch64] Add branch weights.
Juergen Ributzka [Fri, 1 Aug 2014 18:39:24 +0000 (18:39 +0000)]
[FastISel][AArch64] Add branch weights.

Add branch weights to branch instructions, so that the following passes can
optimize based on it (i.e. basic block ordering).

Fixes <rdar://problem/17887137>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214537 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse object::Archive::create instead of new object::Archive.
Rafael Espindola [Fri, 1 Aug 2014 18:31:17 +0000 (18:31 +0000)]
Use object::Archive::create instead of new object::Archive.

Also fix the error handling. No testcaes, issue found by inspection.

Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214535 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoExplicitly report runtime stack realignment in StackMap section
Philip Reames [Fri, 1 Aug 2014 18:26:27 +0000 (18:26 +0000)]
Explicitly report runtime stack realignment in StackMap section

This change adds code to explicitly mark a function which requires runtime stack realignment as not having a fixed frame size in the StackMap section. As it happens, this is not actually a functional change. The size that would be reported without the check is also "-1", but as far as I can tell, that's an accident. The code change makes this explicit.

Note: There's a separate bug in handling of stackmaps and patchpoints in functions which need dynamic frame realignment. The current code assumes that offsets can be calculated from RBP, but realigned frames must use RSP. (There's a variable gap between RBP and the spill slots.) This change set does not address that issue.

Reviewers: atrick, ributzka

Differential Revision: http://reviews.llvm.org/D4572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214534 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReplace comment about ownership with std::unique_ptr.
Rafael Espindola [Fri, 1 Aug 2014 18:09:32 +0000 (18:09 +0000)]
Replace comment about ownership with std::unique_ptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214533 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastISel][ARM] Do not emit stores for undef arguments.
Juergen Ributzka [Fri, 1 Aug 2014 18:04:14 +0000 (18:04 +0000)]
[FastISel][ARM] Do not emit stores for undef arguments.

This is a followup patch for r214366, which added the same behavior to the
AArch64 and X86 FastISel code. This fix reproduces the already existing
behavior of SelectionDAG in FastISel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214531 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse range loop.
Rafael Espindola [Fri, 1 Aug 2014 18:04:14 +0000 (18:04 +0000)]
Use range loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214530 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd missing breaks to AArch64InstrInfo::isGPRCopy
Renato Golin [Fri, 1 Aug 2014 17:27:31 +0000 (17:27 +0000)]
Add missing breaks to AArch64InstrInfo::isGPRCopy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214528 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: Cleanup test
Matt Arsenault [Fri, 1 Aug 2014 17:00:29 +0000 (17:00 +0000)]
R600: Cleanup test

Remove -CHECKs, use multiple prefixes, name values,
also test the @llvm.fabs version

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214525 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake getNamedOperandIdx readonly
Matt Arsenault [Fri, 1 Aug 2014 17:00:27 +0000 (17:00 +0000)]
Make getNamedOperandIdx readonly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214524 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Don't display GDS bit for read2
Matt Arsenault [Fri, 1 Aug 2014 17:00:26 +0000 (17:00 +0000)]
R600/SI: Don't display GDS bit for read2

This isn't displayed for any other instructions anymore,
and isn't ever used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214523 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Fix test from r214518 in an attempt to appease buildbots.
Chad Rosier [Fri, 1 Aug 2014 15:30:41 +0000 (15:30 +0000)]
[AArch64] Fix test from r214518 in an attempt to appease buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214521 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove lto_codegen_set_attr.
Rafael Espindola [Fri, 1 Aug 2014 14:57:05 +0000 (14:57 +0000)]
Remove lto_codegen_set_attr.

It was never exported, so no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214519 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Generate tbz/tbnz when comparing against zero.
Chad Rosier [Fri, 1 Aug 2014 14:48:56 +0000 (14:48 +0000)]
[AArch64] Generate tbz/tbnz when comparing against zero.

The tbz/tbnz checks the sign bit to convert

op w1, w1, w10
cmp w1, #0
b.lt .LBB0_0

to

op w1, w1, w10
tbnz w1, #31, .LBB0_0

Differential Revision: http://reviews.llvm.org/D4440

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214518 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] PR20280 - Slots for byval parameters are not immutable
Ulrich Weigand [Fri, 1 Aug 2014 14:35:58 +0000 (14:35 +0000)]
[PowerPC] PR20280 - Slots for byval parameters are not immutable

Found by inspection while looking at PR20280: code would mark slots
in the parameter save area where a byval parameter is passed as
"immutable".  This is not correct since code is allowed to modify
byval parameters in place in the parameter save area.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214517 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove some calls to std::move.
Rafael Espindola [Fri, 1 Aug 2014 14:31:55 +0000 (14:31 +0000)]
Remove some calls to std::move.

Instead of moving out the data in a ErrorOr<std::unique_ptr<Foo>>, get
a reference to it.

Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214516 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[pr20127] Check for leading \1 in the Twine version of getNameWithPrefix.
Rafael Espindola [Fri, 1 Aug 2014 14:16:40 +0000 (14:16 +0000)]
[pr20127] Check for leading \1 in the Twine version of getNameWithPrefix.

No functionality change, but will simplify an upcoming patch that uses the
Twine version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214515 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSimplify the code a bit with std::unique_ptr.
Rafael Espindola [Fri, 1 Aug 2014 14:11:14 +0000 (14:11 +0000)]
Simplify the code a bit with std::unique_ptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214514 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-objdump: implement printing for MachO __compact_unwind info.
Tim Northover [Fri, 1 Aug 2014 13:07:19 +0000 (13:07 +0000)]
llvm-objdump: implement printing for MachO __compact_unwind info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214509 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAllow only disassembling of M-class MSR masks that the assembler knows how to assembl...
James Molloy [Fri, 1 Aug 2014 12:42:11 +0000 (12:42 +0000)]
Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back.

Note: The current code in DecodeMSRMask() rejects the unpredictable A/R MSR mask '0000' with Fail. The code in the patch follows this style and rejects unpredictable M-class MSR masks also with Fail (instead of SoftFail). If SoftFail is preferred in this case then additional changes to ARMInstPrinter (to print non-symbolic masks) and ARMAsmParser (to parse non-symbolic masks) will be needed.

Patch by Petr Pavlu!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214505 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImprove some const-correctness to remove a -Wcast-qual warning. No functional changes...
Aaron Ballman [Fri, 1 Aug 2014 12:34:58 +0000 (12:34 +0000)]
Improve some const-correctness to remove a -Wcast-qual warning. No functional changes intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214503 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRB/LDRSB instruc...
Tilmann Scheller [Fri, 1 Aug 2014 12:08:04 +0000 (12:08 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRB/LDRSB instructions.

The ARM ARM prohibits LDRB/LDRSB instructions with writeback into the destination register. With this commit this constraint is now enforced and we stop assembling LDRH/LDRSH instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214500 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRH/LDRSH instruc...
Tilmann Scheller [Fri, 1 Aug 2014 11:33:47 +0000 (11:33 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDRH/LDRSH instructions.

The ARM ARM prohibits LDRH/LDRSH instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling LDRH/LDRSH instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214499 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDR instructions.
Tilmann Scheller [Fri, 1 Aug 2014 11:08:51 +0000 (11:08 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM LDR instructions.

The ARM ARM prohibits LDR instructions with writeback into the destination register. With this commit this constraint is now enforced and we stop assembling LDR instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214498 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSLPVectorizer: fix build problem in Release configuration
Erik Eckstein [Fri, 1 Aug 2014 09:47:38 +0000 (09:47 +0000)]
SLPVectorizer: fix build problem in Release configuration

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214496 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSLPVectorizer: improved scheduling algorithm.
Erik Eckstein [Fri, 1 Aug 2014 09:20:42 +0000 (09:20 +0000)]
SLPVectorizer: improved scheduling algorithm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214494 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][PR19612] Fix va_arg for big-endian mode.
Daniel Sanders [Fri, 1 Aug 2014 09:17:39 +0000 (09:17 +0000)]
[mips][PR19612] Fix va_arg for big-endian mode.

Summary:
Big-endian mode was not correctly adjusting the offset for types smaller
than an ABI slot.

Fixes PR19612

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: sstankovic, llvm-commits

Differential Revision: http://reviews.llvm.org/D4556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214493 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSLP Vectorizer: added statistics counter
Erik Eckstein [Fri, 1 Aug 2014 08:14:28 +0000 (08:14 +0000)]
SLP Vectorizer: added statistics counter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214487 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSLP Vectorizer: improve canonicalize tree operands of commutitive binary operands.
Erik Eckstein [Fri, 1 Aug 2014 08:05:55 +0000 (08:05 +0000)]
SLP Vectorizer: improve canonicalize tree operands of commutitive binary operands.

This reverts r214338 (except the test file) and replaces it with a more general algorithm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214485 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert of 214418:
Sylvestre Ledru [Fri, 1 Aug 2014 06:16:03 +0000 (06:16 +0000)]
Revert of 214418:
"Create a default symver on Linux like ELF OSes."

Fails the build under Debian with ld.gold:
/usr/bin/ld.gold: --default-symver: unknown option

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214482 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Generate unaligned vector loads using intrinsics instead of regular loads
Hal Finkel [Fri, 1 Aug 2014 05:20:41 +0000 (05:20 +0000)]
[PowerPC] Generate unaligned vector loads using intrinsics instead of regular loads

Altivec vector loads on PowerPC have an interesting property: They always load
from an aligned address (by rounding down the address actually provided if
necessary). In order to generate an actual unaligned load, you can generate two
load instructions, one with the original address, one offset by one vector
length, and use a special permutation to extract the bytes desired.

When this was originally implemented, I generated these two loads using regular
ISD::LOAD nodes, now marked as aligned. Unfortunately, there is a problem with
this:

The alignment of a load does not contribute to its identity, and SDNodes
are uniqued. So, imagine that we have some unaligned load, L1, that is not
aligned. The routine will create two loads, L1(aligned) and (L1+16)(aligned).
Further imagine that there had already existed a load (L1+16)(unaligned) with
the same chain operand as the load L1. When (L1+16)(aligned) is created as part
of the lowering of L1, this load *is* also the (L1+16)(unaligned) node, just
now marked as aligned (because the new alignment overwrites the old). But the
original users of (L1+16)(unaligned) now get the data intended for the
permutation yielding the data for L1, and (L1+16)(unaligned) no longer exists
to get its own permutation-based expansion. This was PR19991.

A second potential problem has to do with the MMOs on these loads, which can be
used by AA during instruction scheduling to break chain-based dependencies. If
the new "aligned" loads get the MMO from the original unaligned load, this does
not represent the fact that it will load data from below the original address.
Normally, this would not matter, but this load might be combined with another
load pair for a previous vector, and then the dependency on the otherwise-
ignored lower bytes can matter.

To fix both problems, instead of generating the necessary loads using regular
ISD::LOAD instructions, ppc_altivec_lvx intrinsics are used instead. These are
provided with MMOs with a conservative address range.

Unfortunately, I no longer have a failing test case (since PR19991 was
reported, other changes in CodeGen have forced this bug back into hiding it
again). Nevertheless, this should fix the underlying problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214481 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThis patch implements transform for pattern "(A & ~B) ^ (~A) -> ~(A & B)".
Suyog Sarda [Fri, 1 Aug 2014 05:07:20 +0000 (05:07 +0000)]
This patch implements transform for pattern "(A & ~B) ^ (~A) -> ~(A & B)".

Differential Revision: http://reviews.llvm.org/D4653

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214479 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThis patch implements transform for pattern "(A | B) & ((~A) ^ B) -> (A & B)".
Suyog Sarda [Fri, 1 Aug 2014 04:59:26 +0000 (04:59 +0000)]
This patch implements transform for pattern "(A | B) & ((~A) ^ B) -> (A & B)".

Differential Revision: http://reviews.llvm.org/D4628

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214478 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThis patch implements transform for pattern "( A & (~B)) | (A ^ B) -> (A ^ B)"
Suyog Sarda [Fri, 1 Aug 2014 04:50:31 +0000 (04:50 +0000)]
This patch implements transform for pattern "( A & (~B)) | (A ^ B) -> (A ^ B)"

Differential Revision: http://reviews.llvm.org/D4652

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214477 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThis patch implements transform for pattern "(A & B) | ((~A) ^ B) -> (~A ^ B)".
Suyog Sarda [Fri, 1 Aug 2014 04:41:43 +0000 (04:41 +0000)]
This patch implements transform for pattern "(A & B) | ((~A) ^ B) -> (~A ^ B)".
Patch Credit to Ankit Jain !

Differential Revision: http://reviews.llvm.org/D4655

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214476 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Fix build warning
Tom Stellard [Fri, 1 Aug 2014 02:05:57 +0000 (02:05 +0000)]
R600/SI: Fix build warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214475 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FastISel][AArch64] Fix the immediate versions of the {s|u}{add|sub}.with.overflow...
Juergen Ributzka [Fri, 1 Aug 2014 01:25:55 +0000 (01:25 +0000)]
[FastISel][AArch64] Fix the immediate versions of the {s|u}{add|sub}.with.overflow intrinsics.

ADDS and SUBS cannot encode negative immediates or immediates larger than 12bit.
This fix checks if the immediate version can be used under this constraints and
if we can convert ADDS to SUBS or vice versa to support negative immediates.

Also update the test cases to test the immediate versions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214470 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Recognize consecutive memory accesses from intrinsics
Hal Finkel [Fri, 1 Aug 2014 01:02:01 +0000 (01:02 +0000)]
[PowerPC] Recognize consecutive memory accesses from intrinsics

When generating unaligned vector loads, we need to search for other loads or
stores nearby offset by one vector width. If we find one, then we know that we
can safely generate another aligned load at that address. Otherwise, we must
generate the next load using an offset of the vector width minus one byte (so
we don't read off the end of the allocation if the base unaligned address
happened to be aligned at runtime). We had previously done this using only
other vector loads and stores, but did not consider the PowerPC-specific vector
load/store intrinsics. Now we'll also consider vector intrinsics. By itself,
this change is a feature enhancement, but is a necessary step toward fixing the
underlying problem behind PR19991.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214469 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMS inline asm: Fix null SMLoc when 'ptr' is missing after dword & co
Reid Kleckner [Fri, 1 Aug 2014 00:59:22 +0000 (00:59 +0000)]
MS inline asm: Fix null SMLoc when 'ptr' is missing after dword & co

This improves the diagnostics from the regular assembler, but more
importantly it fixes an assertion when parsing inline assembly.  Test
landing in Clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214468 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Do abs/neg folding with ComplexPatterns
Tom Stellard [Fri, 1 Aug 2014 00:32:39 +0000 (00:32 +0000)]
R600/SI: Do abs/neg folding with ComplexPatterns

Abs/neg folding has moved out of foldOperands and into the instruction
selection phase using complex patterns.  As a consequence of this
change, we now prefer to select the 64-bit encoding for most
instructions and the modifier operands have been dropped from
integer VOP3 instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214467 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTableGen: Allow AddedComplexity values to be negative
Tom Stellard [Fri, 1 Aug 2014 00:32:36 +0000 (00:32 +0000)]
TableGen: Allow AddedComplexity values to be negative

This is useful for cases when stand-alone patterns are preferred to the
patterns included in the instruction definitions.  Instead of requiring
that stand-alone patterns set a larger AddedComplexity value, which
can be confusing to new developers, the allows us to reduce the
complexity of the included patterns to achieve the same result.

There will be test cases for this added to the R600 backend in a
future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214466 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Simplify and fix handling of VOP2 in SIInstrInfo::legalizeOperands
Tom Stellard [Fri, 1 Aug 2014 00:32:35 +0000 (00:32 +0000)]
R600/SI: Simplify and fix handling of VOP2 in SIInstrInfo::legalizeOperands

We were incorrectly assuming that all VOP2 instructions can read SGPRs
in Src0, but this is not true for instructions that read carry-in from
VCC.

The old logic has been replaced with new logic which checks the defined
register classes of the VOP2 instruction to determine whether or not to
legalize the operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214465 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Fold immediates when shrinking instructions
Tom Stellard [Fri, 1 Aug 2014 00:32:33 +0000 (00:32 +0000)]
R600/SI: Fold immediates when shrinking instructions

This will prevent us from using extra MOV instructions once we prefer
selecting 64-bit instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214464 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600/SI: Fix incorrect commute operation in shrink instructions pass
Tom Stellard [Fri, 1 Aug 2014 00:32:28 +0000 (00:32 +0000)]
R600/SI: Fix incorrect commute operation in shrink instructions pass

We were commuting the instruction by still shrinking it using the
original opcode.

NOTE: This is a candidate for the 3.5 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214463 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd support for the X86 secure guard extensions instructions in assembler (SGX).
Kevin Enderby [Thu, 31 Jul 2014 23:57:38 +0000 (23:57 +0000)]
Add support for the X86 secure guard extensions instructions in assembler (SGX).

This allows assembling the two new instructions, encls and enclu for the
SKX processor model.

Note the diffs are a bigger than what might think, but to fit the new
MRM_CF and MRM_D7 in things in the right places things had to be
renumbered and shuffled down causing a bit more diffs.

rdar://16228228

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214460 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86 MC: Don't crash on empty memory operand parens
Reid Kleckner [Thu, 31 Jul 2014 23:26:35 +0000 (23:26 +0000)]
X86 MC: Don't crash on empty memory operand parens

Instead, create an absolute memory operand.

Fixes PR20504.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214457 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86 MC: Reject invalid segment registers before a memory operand colon
Reid Kleckner [Thu, 31 Jul 2014 23:03:22 +0000 (23:03 +0000)]
X86 MC: Reject invalid segment registers before a memory operand colon

Previously we would execute unreachable during object emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214456 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWhite space fix.
Louis Gerbarg [Thu, 31 Jul 2014 22:57:46 +0000 (22:57 +0000)]
White space fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214455 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake classof in MemSDNode consistent with MemIntrinsicSDNode
Hal Finkel [Thu, 31 Jul 2014 22:31:33 +0000 (22:31 +0000)]
Make classof in MemSDNode consistent with MemIntrinsicSDNode

If INTRINSIC_W_CHAIN and INTRINSIC_VOID are MemIntrinsicSDNodes, and a
MemIntrinsicSDNode is a MemSDNode, then INTRINSIC_W_CHAIN and INTRINSIC_VOID
must be MemSDNodes too.

Noticed by inspection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214452 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoR600: Modernize work item intrinsics test
Jan Vesely [Thu, 31 Jul 2014 22:11:03 +0000 (22:11 +0000)]
R600: Modernize work item intrinsics test

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Matt Arsenault <Matthew.Arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214451 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake sure no loads resulting from load->switch DAGCombine are marked invariant
Louis Gerbarg [Thu, 31 Jul 2014 21:45:05 +0000 (21:45 +0000)]
Make sure no loads resulting from load->switch DAGCombine are marked invariant

Currently when DAGCombine converts loads feeding a switch into a switch of
addresses feeding a load the new load inherits the isInvariant flag of the left
side. This is incorrect since invariant loads can be reordered in cases where it
is illegal to reoarder normal loads.

This patch adds an isInvariant parameter to getExtLoad() and updates all call
sites to pass in the data if they have it or false if they don't. It also
changes the DAGCombine to use that data to make the right decision when
creating the new load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214449 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImprove the remark generated for -Rpass-missed.
Tyler Nowicki [Thu, 31 Jul 2014 21:22:22 +0000 (21:22 +0000)]
Improve the remark generated for -Rpass-missed.

The current remark is ambiguous and makes it sounds like explicitly specifying vectorization will allow the loop to be vectorized. This is not the case. The improved remark directs the user to -Rpass-analysis=loop-vectorize to determine the cause of the pass-miss.

Reviewed by Arnold Schwaighofer`

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214445 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Remove MCObjectDisassembler.cpp as it is untested and unused." as it is appar...
Eric Christopher [Thu, 31 Jul 2014 21:18:38 +0000 (21:18 +0000)]
Revert "Remove MCObjectDisassembler.cpp as it is untested and unused." as it is apparently used, but the build didn't return errors weirdly.

This reverts commits 214437 and 214438.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214444 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImprove the remark generated when a variable that is used outside the loop is not...
Tyler Nowicki [Thu, 31 Jul 2014 21:02:40 +0000 (21:02 +0000)]
Improve the remark generated when a variable that is used outside the loop is not a reduction or induction variable.

Reviewed by Arnold Schwaighofer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214440 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReplaces a few pointers with references in llvm-nm.cpp.
Rafael Espindola [Thu, 31 Jul 2014 21:00:10 +0000 (21:00 +0000)]
Replaces a few pointers with references in llvm-nm.cpp.

This opens the way for a few std::uinque_ptr cleanups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214439 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFixing CMake problems with MCObjectDisassembler.cpp not existing.
Aaron Ballman [Thu, 31 Jul 2014 20:48:54 +0000 (20:48 +0000)]
Fixing CMake problems with MCObjectDisassembler.cpp not existing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214438 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove MCObjectDisassembler.cpp as it is untested and unused.
Eric Christopher [Thu, 31 Jul 2014 20:44:46 +0000 (20:44 +0000)]
Remove MCObjectDisassembler.cpp as it is untested and unused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214437 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agomsbuild integration: remove duplicated lines and BOM from 2014 integration (PR20341)
Hans Wennborg [Thu, 31 Jul 2014 20:33:22 +0000 (20:33 +0000)]
msbuild integration: remove duplicated lines and BOM from 2014 integration (PR20341)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214435 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDWOHolder takes ownership of the argument constructor, use std::unique_ptr.
Rafael Espindola [Thu, 31 Jul 2014 20:26:42 +0000 (20:26 +0000)]
DWOHolder takes ownership of the argument constructor, use std::unique_ptr.

Thanks to David Blaikie for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214434 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse a reference instead of a pointer.
Rafael Espindola [Thu, 31 Jul 2014 20:19:36 +0000 (20:19 +0000)]
Use a reference instead of a pointer.

This makes using a std::unique_ptr in the caller more convenient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214433 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd documentation for lit's --show-unsupported flag
Eric Fiselier [Thu, 31 Jul 2014 20:11:13 +0000 (20:11 +0000)]
Add documentation for lit's --show-unsupported flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214431 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoClarify in PowerPC release notes that 32-bit PIC support is incomplete.
Bill Schmidt [Thu, 31 Jul 2014 20:04:51 +0000 (20:04 +0000)]
Clarify in PowerPC release notes that 32-bit PIC support is incomplete.

As requested, changing this wording slightly.

Thanks,
Bill

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214430 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDisable IsSub subregister assert. pr18663.
Will Schmidt [Thu, 31 Jul 2014 19:50:53 +0000 (19:50 +0000)]
Disable IsSub subregister assert.  pr18663.

This is a follow-up to the activity in the bug at
http://llvm.org/bugs/show_bug.cgi?id=18663 .  The underlying issue has
to do with how the KILL pseudo-instruction is handled.  I defer to
Hal/Jakob/Uli for additional details and background.

This will disable the (bad?) assert, add an associated fixme comment,
and add a pair of tests.

The code change and the pr18663-2.ll test are copied from the referenced
bug.  That test does not immediately fail in my environment, but I have
added the pr18663.ll test which does.

(Comment from Hal)
to provide everyone else with some context, this assert was not bad when
it was written. At that time, we only generated KILL pseudo instructions
around subregister copies. This logic, unfortunately, had its own problems.
In r199797, the relevant logic in MachineCopyPropagation was replaced to
generate KILLs for other kinds of copies too. This change in semantics broke
this now-problematic assumption in AggressiveAntiDepBreaker. The
AggressiveAntiDepBreaker really needs a proper cleanup to deal with the
change, but removing the assert (which just allows the function to return
false) is a safe conservative behavior, and should do for the time being.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214429 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused argument.
Rafael Espindola [Thu, 31 Jul 2014 19:32:04 +0000 (19:32 +0000)]
Remove unused argument.

Thanks to Justin Bogner for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214426 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove MCObjectSymbolizer.h to MC/MCAnalysis.
Rafael Espindola [Thu, 31 Jul 2014 19:29:23 +0000 (19:29 +0000)]
Move MCObjectSymbolizer.h to MC/MCAnalysis.

The cpp file is already in lib/MC/MCAnalysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214424 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix ScalarEvolutionExpander when creating a PHI in a block with duplicate predecessors
Hal Finkel [Thu, 31 Jul 2014 19:13:38 +0000 (19:13 +0000)]
Fix ScalarEvolutionExpander when creating a PHI in a block with duplicate predecessors

It seems that when I fixed this, almost exactly a year ago, I did not quite do
it correctly. When we have duplicate block predecessors, we can indeed not have
different incoming values for the same block, but we *must* have duplicate
entries. So, instead of skipping the duplicates, we explicitly add the
duplicate incoming values.

Fixes PR20442.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214423 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoverify-uselistorder: Change the default -num-shuffles=5
Duncan P. N. Exon Smith [Thu, 31 Jul 2014 18:46:24 +0000 (18:46 +0000)]
verify-uselistorder: Change the default -num-shuffles=5

Change the default for `-num-shuffles` to 5 and better document the
algorithm in the header docs of `verify-uselistorder`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214419 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCreate a default symver on Linux like ELF OSes.
Eric Christopher [Thu, 31 Jul 2014 18:43:43 +0000 (18:43 +0000)]
Create a default symver on Linux like ELF OSes.

Patch by Adam Jackson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214418 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUseListOrder: Handle self-users
Duncan P. N. Exon Smith [Thu, 31 Jul 2014 18:33:12 +0000 (18:33 +0000)]
UseListOrder: Handle self-users

Correctly sort self-users (such as PHI nodes).  I added a targeted test
in `test/Bitcode/use-list-order.ll` and the final missing RUN line to
tests in `test/Assembly`.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214417 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix loop end condition.
Eric Christopher [Thu, 31 Jul 2014 18:28:08 +0000 (18:28 +0000)]
Fix loop end condition.

Note: This code appears to be untested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214416 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWrong heading level for PowerPC changes in release notes
Bill Schmidt [Thu, 31 Jul 2014 15:20:30 +0000 (15:20 +0000)]
Wrong heading level for PowerPC changes in release notes

Oops.  Used the wrong heading level by mistake.

Thanks,
Bill

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214405 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRelease Notes: Overriding PPC64 and PPC64LE ABI defaults is not yet supported.
Bill Schmidt [Thu, 31 Jul 2014 15:17:33 +0000 (15:17 +0000)]
Release Notes: Overriding PPC64 and PPC64LE ABI defaults is not yet supported.

I wrongly included a description of a patch that came in after 3.5 branched
and has not been backported.

Thanks,
Bill

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214404 91177308-0d34-0410-b5e6-96231b3b80d8