sec: skernel: allow invalidation of BTB with ICIALLU for CVE-2017-5715
As recommended by Arm in [1], ACTLR[0] (Enable invalidates of BTB)
needs to be set[2] for BTB to be invalidated on ICIALLU. This needs to
be done unconditionally for Cortex-A15 processors. Also provide a config
option for this in case someone actually needs to disable this in
future.
[1] https://developer.arm.com/support/security-update
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
As recommended by Arm in [1], ACTLR[0] (Enable invalidates of BTB)
needs to be set[2] for BTB to be invalidated on ICIALLU. This needs to
be done unconditionally for Cortex-A15 processors. Also provide a config
option for this in case someone actually needs to disable this in
future.
[1] https://developer.arm.com/support/security-update
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
makedefs: Fix issue with setting CHECK and VERBOSE
Within the ifndef tabs are not allowed. These need
to be converted to spaces. Without this CHECK is always
set and sparse is expected to be installed.
Fixes: aba308b9868d ("Makefile: Use OBJROOT for build output to enable out-of-tree builds")
Reported-by: Denys Dmytriyenko <denys@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Denys Dmytriyenko <denys@ti.com>
Within the ifndef tabs are not allowed. These need
to be converted to spaces. Without this CHECK is always
set and sparse is expected to be installed.
Fixes: aba308b9868d ("Makefile: Use OBJROOT for build output to enable out-of-tree builds")
Reported-by: Denys Dmytriyenko <denys@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Denys Dmytriyenko <denys@ti.com>
sec: add msmc_ses_mpax settings for PMMC
Add function skern_setup_pmmc_access() to configure MSMC_SES_MPAX
to allow PMMC access to DDR3 configuration space.
Only K2G has PMMC hence the function body only defined in K2G build.
These settings originally come from PMMC firmware. We move the
settings to Boot Monitor because PMMC doesn't have enough privilege
to configure these registers on K2G HS. PMMC needs access to DDR3
configuration to enable/disable self refresh on K2G
Signed-off-by: Thanh Tran <thanh-tran@ti.com>
Add function skern_setup_pmmc_access() to configure MSMC_SES_MPAX
to allow PMMC access to DDR3 configuration space.
Only K2G has PMMC hence the function body only defined in K2G build.
These settings originally come from PMMC firmware. We move the
settings to Boot Monitor because PMMC doesn't have enough privilege
to configure these registers on K2G HS. PMMC needs access to DDR3
configuration to enable/disable self refresh on K2G
Signed-off-by: Thanh Tran <thanh-tran@ti.com>
docs: Update documentation for recent changes
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Makefile: Use OBJROOT for build output to enable out-of-tree builds
The variable OBJROOT is used for object storage, use this everywhere to
allow out-of-tree builds. Also fixup some makefile formatting while we
are here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
The variable OBJROOT is used for object storage, use this everywhere to
allow out-of-tree builds. Also fixup some makefile formatting while we
are here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
makedefs: Move definition of OBJROOT to common file
Move the definition of OBJROOT to the common definition file. Also
ensure it is always set.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Move the definition of OBJROOT to the common definition file. Also
ensure it is always set.
Signed-off-by: Andrew F. Davis <afd@ti.com>
make.rules: Fix quieting of mkdir command
The quieting '@' only needs to go before the whole command,
having it before sub-commands causes the literal "@mkdir" to
be sent to shell, causing build to fail.
Signed-off-by: Andrew F. Davis <afd@ti.com>
The quieting '@' only needs to go before the whole command,
having it before sub-commands causes the literal "@mkdir" to
be sent to shell, causing build to fail.
Signed-off-by: Andrew F. Davis <afd@ti.com>
soc: Move load address to end of MSMC
Currently different SoCs put the boot monitor and related data at
different addresses in MSMC, even SoCs with the same memory map.
This creates an inconsistency and adds a burden for the boot monitor's
loader and for the kernel to track this cut-out. Fix this by always
loading the boot monitor into the last available space in MSMC across
all SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
[t-kristo@ti.com: rebased on top of the mkimage support patch]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Currently different SoCs put the boot monitor and related data at
different addresses in MSMC, even SoCs with the same memory map.
This creates an inconsistency and adds a burden for the boot monitor's
loader and for the kernel to track this cut-out. Fix this by always
loading the boot monitor into the last available space in MSMC across
all SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
[t-kristo@ti.com: rebased on top of the mkimage support patch]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Makefile: Add support for mkimage header
Given that boot monitor image is being generated to a specific target
location depending on the SoC and U-boot relies on addr_mon env variable
to be aligned with boot monitor target location. When ever the target
address gets updated in boot monitor, it is difficult to sync between
u-boot and boot monitor and also there is no way to update user that
boot monitor target location is updated.
To avoid this problem, generate boot monitor image with a mkimage
header which can be parsed by U-boot.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Given that boot monitor image is being generated to a specific target
location depending on the SoC and U-boot relies on addr_mon env variable
to be aligned with boot monitor target location. When ever the target
address gets updated in boot monitor, it is difficult to sync between
u-boot and boot monitor and also there is no way to update user that
boot monitor target location is updated.
To avoid this problem, generate boot monitor image with a mkimage
header which can be parsed by U-boot.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
sec: skernel: Use correct number of cores for stack size calculation
When calculating the total size of the monitors stack, the stack size per
core is multiplied by 4, for most Keystone 2 devices this is the correct
number of cores, but not for all anymore, so we may over allocate stack
space. Use the ARM_NUM_CORES macro instead.
Signed-off-by: Andrew F. Davis <afd@ti.com>
When calculating the total size of the monitors stack, the stack size per
core is multiplied by 4, for most Keystone 2 devices this is the correct
number of cores, but not for all anymore, so we may over allocate stack
space. Use the ARM_NUM_CORES macro instead.
Signed-off-by: Andrew F. Davis <afd@ti.com>
sec: Move function declaration into the correct headers
Move functions defined in skern.c into new header file skern.h, then
only declare functions in skernel.h that are defined in skernel.S.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Move functions defined in skern.c into new header file skern.h, then
only declare functions in skernel.h that are defined in skernel.S.
Signed-off-by: Andrew F. Davis <afd@ti.com>
sec: Cleanup and fix minor whitespace issues
Fix typos, unify naming, add/remove whitespace, and other non-functional
changes. While here update the copyright dates.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Fix typos, unify naming, add/remove whitespace, and other non-functional
changes. While here update the copyright dates.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Makefile: Move non-secure image size definition to central location
Currently the size of the non-secure image is defined in the makedefs
file in adition to individual SoC configuration files. The size of the
padded non-secure image does not depend on the SoC and is guaranteed to
be the same size by the padding so it should not be defined per SoC.
Remove the redundant definition and export the central definition.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Currently the size of the non-secure image is defined in the makedefs
file in adition to individual SoC configuration files. The size of the
padded non-secure image does not depend on the SoC and is guaranteed to
be the same size by the padding so it should not be defined per SoC.
Remove the redundant definition and export the central definition.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Makefile: Use start address defined in config.h
Currently the linker gets the start address for the image components
from per SoC lds files, whereas the code in the components gets its
address from an included config.h. This requires the address be
stored in two places and that both these files remain in sync, can lead
to errors and confusion. Define a symbol in code that can be referenced
by the linker to determine the code offset address, eliminating the need
to redefine the start address for the linker.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Currently the linker gets the start address for the image components
from per SoC lds files, whereas the code in the components gets its
address from an included config.h. This requires the address be
stored in two places and that both these files remain in sync, can lead
to errors and confusion. Define a symbol in code that can be referenced
by the linker to determine the code offset address, eliminating the need
to redefine the start address for the linker.
Signed-off-by: Andrew F. Davis <afd@ti.com>
K2: Enable Hypervisor mode
Introduce function to switch to hypervisor mode for primary as
well as secondary CPUs. Keystone boot architecture mandates
using Boot Monitor to execute in monitor mode. The state change
from supervisor mode to hypervisor mode needs to be done in Boot
Monitor.
As part of switching modes set the Hyp Call Enable(HCE)
bit in Secure Configuration Register(SCR).
Signed-off-by: Keerthy <j-keerthy@ti.com>
Introduce function to switch to hypervisor mode for primary as
well as secondary CPUs. Keystone boot architecture mandates
using Boot Monitor to execute in monitor mode. The state change
from supervisor mode to hypervisor mode needs to be done in Boot
Monitor.
As part of switching modes set the Hyp Call Enable(HCE)
bit in Secure Configuration Register(SCR).
Signed-off-by: Keerthy <j-keerthy@ti.com>
sec: fix build warnings with -Wall
There are some un-used variables in the code, remove these to fix the
build warnings generated.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
There are some un-used variables in the code, remove these to fix the
build warnings generated.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
sec: debug: fix build failures with DEBUG=1
MPU_CFG registers were only declared internally under skern.c. Move the
register address declarations to the header, so the debug code can
access it also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
MPU_CFG registers were only declared internally under skern.c. Move the
register address declarations to the header, so the debug code can
access it also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Makefile: Fix output when building .S files
Currently nothing is output in the log when building .S files, fix the
makefile so that .S files are also listed in the simplified output when
building.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Currently nothing is output in the log when building .S files, fix the
makefile so that .S files are also listed in the simplified output when
building.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Makefile: Add header dependency check to build
Make sure to rebuild any .c or .S files that depend on header files that
have changed by generating .d dependency files for each object file. Also,
add the .d files that get generated to the .gitignore file and to the
make clean job.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Make sure to rebuild any .c or .S files that depend on header files that
have changed by generating .d dependency files for each object file. Also,
add the .d files that get generated to the .gitignore file and to the
make clean job.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
soc: Introduce support for k2g
Basic support for k2g
Based on original patch by Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Basic support for k2g
Based on original patch by Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: debug: Support DYNAMIC_DEBUG
One nice feature folks seem to want is the ability to do dynamic
enable and disable of print messages via smc instructions. This is
enabled by running make with DYNAMIC_DEBUG=1
Suggested-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
One nice feature folks seem to want is the ability to do dynamic
enable and disable of print messages via smc instructions. This is
enabled by running make with DYNAMIC_DEBUG=1
Suggested-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: skern: Abstract out PSCI commands out
This allows us to add silicon vendor specific extensions seperately
See: http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/ for more
details.
Signed-off-by: Nishanth Menon <nm@ti.com>
This allows us to add silicon vendor specific extensions seperately
See: http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/ for more
details.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: skern: Print monitor details at boot
It is very easy to mix up binaries when we build for multiple
platforms and try to ensure we have the latest solution.
To help with the same, lets add a boot print to show us the details:
K2_BM_15.07-32-ge74254a1d3a6 SoC:k2hk built:16:42:18, Sep 29 2015
While at it update the default version information as well to match with
the latest tag.
Signed-off-by: Nishanth Menon <nm@ti.com>
It is very easy to mix up binaries when we build for multiple
platforms and try to ensure we have the latest solution.
To help with the same, lets add a boot print to show us the details:
K2_BM_15.07-32-ge74254a1d3a6 SoC:k2hk built:16:42:18, Sep 29 2015
While at it update the default version information as well to match with
the latest tag.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: skern: Add basic register accessors
Simple register accessors to allow for consistent register access
functions as necessary. Add a basic barrier routine for serialization
where necessary.
NOTE: there is a bunch of cleanups needed through out the code to
ensure proper usage of accessors. we will get there eventually.
Signed-off-by: Nishanth Menon <nm@ti.com>
Simple register accessors to allow for consistent register access
functions as necessary. Add a basic barrier routine for serialization
where necessary.
NOTE: there is a bunch of cleanups needed through out the code to
ensure proper usage of accessors. we will get there eventually.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: skern: Cast pointer for default address
Just a squash of sparse warning to explicitly cast 0 as the default
address pointer.
Signed-off-by: Nishanth Menon <nm@ti.com>
Just a squash of sparse warning to explicitly cast 0 as the default
address pointer.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: skern: Make unshared functions static
Make functions that are used internally to skern to be static.
Signed-off-by: Nishanth Menon <nm@ti.com>
Make functions that are used internally to skern to be static.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: skern: Define shared functions
Define the functions in the common header. These are used between the
C and Assembly code.
Signed-off-by: Nishanth Menon <nm@ti.com>
Define the functions in the common header. These are used between the
C and Assembly code.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: skern: Fix up proto declaration
Just follow ANSI standard and use void when no parameters
are expected. Fixes sparse warning:
skern.c:271:39: warning: non-ANSI function declaration of function
'fcn_p'
Signed-off-by: Nishanth Menon <nm@ti.com>
Just follow ANSI standard and use void when no parameters
are expected. Fixes sparse warning:
skern.c:271:39: warning: non-ANSI function declaration of function
'fcn_p'
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: debug: Include header to squash sparse warning
Including debug header ensures that we have the correct prototype
for the implementation done. This also squashes the sparse warning:
debug.c:103:6: warning: symbol 'skern_printf' was not declared. Should
it be static?
Signed-off-by: Nishanth Menon <nm@ti.com>
Including debug header ensures that we have the correct prototype
for the implementation done. This also squashes the sparse warning:
debug.c:103:6: warning: symbol 'skern_printf' was not declared. Should
it be static?
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: debug: Provide option to get rid of UART options
add option of doing make NOUART=1 which will get rid of
all access to uart for debug prints. This is pretty tricky
option that makes fails hard to debug. USE WITH CARE.
Signed-off-by: Nishanth Menon <nm@ti.com>
add option of doing make NOUART=1 which will get rid of
all access to uart for debug prints. This is pretty tricky
option that makes fails hard to debug. USE WITH CARE.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: debug: Select debug prints at build
We do not need to enable debug prints all the time - using a variable
based optimization is just plain useless when we can use build time
selection.
Signed-off-by: Nishanth Menon <nm@ti.com>
We do not need to enable debug prints all the time - using a variable
based optimization is just plain useless when we can use build time
selection.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: debug: Provide option to have configuration UART base address
Currently we support debug messages only to UART0. That is not need be
the case. Uart base address can be configurable if necessary.
Now, we can override it from soc specific config file OR
while building for a specific board as needed OR use the default
UART0. The only constraint is that the clocks and basic configuration
necessary for that UART should already be done.
Signed-off-by: Nishanth Menon <nm@ti.com>
Currently we support debug messages only to UART0. That is not need be
the case. Uart base address can be configurable if necessary.
Now, we can override it from soc specific config file OR
while building for a specific board as needed OR use the default
UART0. The only constraint is that the clocks and basic configuration
necessary for that UART should already be done.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: debug: Replace existing debug prints with skern_debug
With this change, we deprecate all older debug prints in favor of
using skern_debug if we want to add debug messages OR skern_printf
if we want to print always.
While at this, make all "old exposed" data private for debug.
This allows us to control the debug entry points.
With this change, All debug messages are prefixed with DEBUG
to help differentiate with regular error messages.
Signed-off-by: Nishanth Menon <nm@ti.com>
With this change, we deprecate all older debug prints in favor of
using skern_debug if we want to add debug messages OR skern_printf
if we want to print always.
While at this, make all "old exposed" data private for debug.
This allows us to control the debug entry points.
With this change, All debug messages are prefixed with DEBUG
to help differentiate with regular error messages.
Signed-off-by: Nishanth Menon <nm@ti.com>
sec: debug: Add support for a minimal printf
Provide support for a very simple printf alternative.
Use existing primitives to achieve the same old results.
Signed-off-by: Nishanth Menon <nm@ti.com>
Provide support for a very simple printf alternative.
Use existing primitives to achieve the same old results.
Signed-off-by: Nishanth Menon <nm@ti.com>
makedefs: Cleanup unused variables
cleanup remenants of unused variables, and while at it, add a minimal
set of comments.
Signed-off-by: Nishanth Menon <nm@ti.com>
cleanup remenants of unused variables, and while at it, add a minimal
set of comments.
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile/makedefs: Export version information
Export bootmonitor version information as defines for usage in code.
Signed-off-by: Nishanth Menon <nm@ti.com>
Export bootmonitor version information as defines for usage in code.
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Add support for SoC specific make.inc
make.inc can now exist in SoC specific folders for inclusion during
build of secure and non-secure components. This allows for conditional
build of components required for various SoC specific builds.
Signed-off-by: Nishanth Menon <nm@ti.com>
make.inc can now exist in SoC specific folders for inclusion during
build of secure and non-secure components. This allows for conditional
build of components required for various SoC specific builds.
Signed-off-by: Nishanth Menon <nm@ti.com>
makedefs: Remove build-id from linker
We dont use buildid, so, remove it. Fixes, the following gcc build warning:
/opt/gcc/arm/gcc-linaro-4.9-2015.05-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/4.9.3/../../../../arm-linux-gnueabihf/bin/ld:
warning: .note.gnu.build-id section discarded, --build-id ignored.
Signed-off-by: Nishanth Menon <nm@ti.com>
We dont use buildid, so, remove it. Fixes, the following gcc build warning:
/opt/gcc/arm/gcc-linaro-4.9-2015.05-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/4.9.3/../../../../arm-linux-gnueabihf/bin/ld:
warning: .note.gnu.build-id section discarded, --build-id ignored.
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Add support for sparse check
Build with make C=1 to check with sparse. by overriding the SPARSE
variable with other static analysers, Further additional checks may be
performed.
Signed-off-by: Nishanth Menon <nm@ti.com>
Build with make C=1 to check with sparse. by overriding the SPARSE
variable with other static analysers, Further additional checks may be
performed.
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Allow build of tags and cscope output
Use tags and cscope for building browseable data. Create a softlink
Tags to the tags file to work with emacs as well.
Signed-off-by: Nishanth Menon <nm@ti.com>
Use tags and cscope for building browseable data. Create a softlink
Tags to the tags file to work with emacs as well.
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Compress even more -remove SoC specific rules
Since we now know the SoC list from the soc directory, we can just
use that list to build for all platforms. SoC specific rules make
makefile hard to deal with as SoCs explode in number in the future..
lets generate the list on the fly. The only caveat is to build with
image_<soc> instead of just <soc> as build target.. well.. not really
a big loss though..
Signed-off-by: Nishanth Menon <nm@ti.com>
Since we now know the SoC list from the soc directory, we can just
use that list to build for all platforms. SoC specific rules make
makefile hard to deal with as SoCs explode in number in the future..
lets generate the list on the fly. The only caveat is to build with
image_<soc> instead of just <soc> as build target.. well.. not really
a big loss though..
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Allow for quiet build
Spam build console only if V=1 option is provided
Signed-off-by: Nishanth Menon <nm@ti.com>
Spam build console only if V=1 option is provided
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Use $(MAKE)
See The following for more info.
https://www.gnu.org/software/make/manual/html_node/MAKE-Variable.html#MAKE-Variable
This is part of our effort to make parallel builds actually work!.
Signed-off-by: Nishanth Menon <nm@ti.com>
See The following for more info.
https://www.gnu.org/software/make/manual/html_node/MAKE-Variable.html#MAKE-Variable
This is part of our effort to make parallel builds actually work!.
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Simplify the build cleaning process
using the SOC variable we can cleanup as necessary.
Signed-off-by: Nishanth Menon <nm@ti.com>
using the SOC variable we can cleanup as necessary.
Signed-off-by: Nishanth Menon <nm@ti.com>
makedefs: Move map files to requisite directory.
No need to keep them around in old directories anymore..
Signed-off-by: Nishanth Menon <nm@ti.com>
No need to keep them around in old directories anymore..
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Build the intermediate image files in OBJDIR too
Since we build same source with various parameters, we would
reasonably want the image files to reside corresponding to the SoC as
well.
Signed-off-by: Nishanth Menon <nm@ti.com>
Since we build same source with various parameters, we would
reasonably want the image files to reside corresponding to the SoC as
well.
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Allow build so that objects are built in seperate directory
With this change the object files can be routed as necessary
Now, we can do make O=<some_path> and build objects there.
By default, we now start building the objects in corresponding SoC
specific directories.
Signed-off-by: Nishanth Menon <nm@ti.com>
With this change the object files can be routed as necessary
Now, we can do make O=<some_path> and build objects there.
By default, we now start building the objects in corresponding SoC
specific directories.
Signed-off-by: Nishanth Menon <nm@ti.com>
Make.rules: Move common make rules to make.rules
No reason to keep things duplicated when we can create common makefile
rules..
Signed-off-by: Nishanth Menon <nm@ti.com>
No reason to keep things duplicated when we can create common makefile
rules..
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Use -C to build a sub directory
cd dir;make is the wrong way to build a sub directory.
Signed-off-by: Nishanth Menon <nm@ti.com>
cd dir;make is the wrong way to build a sub directory.
Signed-off-by: Nishanth Menon <nm@ti.com>
Makefile: Get rid of linker script modification
we know that linker scripts can include other scripts. So why not just
keep the SoC specific deltas where they belong, now that we have an
SoC specific directory to work with..
Signed-off-by: Nishanth Menon <nm@ti.com>
we know that linker scripts can include other scripts. So why not just
keep the SoC specific deltas where they belong, now that we have an
SoC specific directory to work with..
Signed-off-by: Nishanth Menon <nm@ti.com>
All: Introduce SoC specific config header file
By avoiding having a single config file, we can now work towards
building all platforms in parallel.
This is part of the breakup of the build to allow parallel builds in the
system.
Signed-off-by: Nishanth Menon <nm@ti.com>
By avoiding having a single config file, we can now work towards
building all platforms in parallel.
This is part of the breakup of the build to allow parallel builds in the
system.
Signed-off-by: Nishanth Menon <nm@ti.com>
Add a .gitignore file
For the usual purpose of ignoring temporary files
Signed-off-by: Nishanth Menon <nm@ti.com>
For the usual purpose of ignoring temporary files
Signed-off-by: Nishanth Menon <nm@ti.com>
boot-monitor: fix build warning using gcc 4.9 tool chain
Fix the following build warning when using gcc 4.9 tool chain,
skern.c: In function 'skern_init':
skern.c:285:15: warning: assignment makes integer from pointer without a cast
addr[i * 2] = (unsigned int *)_skern_123_init;
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Fix the following build warning when using gcc 4.9 tool chain,
skern.c: In function 'skern_init':
skern.c:285:15: warning: assignment makes integer from pointer without a cast
addr[i * 2] = (unsigned int *)_skern_123_init;
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: fix makefile to support multiple jobs
Makefile target "all" lists targets for multiple EVMs, which cannot be
built simultaneously. This doesn't allow to use multiple jobs.
This patch makes the targets built one after another, which fixes the
issue.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Makefile target "all" lists targets for multiple EVMs, which cannot be
built simultaneously. This doesn't allow to use multiple jobs.
This patch makes the targets built one after another, which fixes the
issue.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: don't set fast-boot for ARM0 core
Setting the fast-boot RBL entry point for ARM0 prevents RBL to perform a
normal boot sequence when kernel issues the reboot command. We need to
leave the CORE_N_BASE_ADDR for ARM0 unmodified to allow it to perform normal
RBL boot.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Setting the fast-boot RBL entry point for ARM0 prevents RBL to perform a
normal boot sequence when kernel issues the reboot command. We need to
leave the CORE_N_BASE_ADDR for ARM0 unmodified to allow it to perform normal
RBL boot.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: fix up makedefs for yocto build
Newer versions of yocto build fails with all the hardcoded paths.
Fix this so that build can succeeds.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Newer versions of yocto build fails with all the hardcoded paths.
Fix this so that build can succeeds.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: add pre-built binary to support pre pg2 devices/evms
The fast boot support is not available on pre-pg2 k2hk devices and EVMs.
The current boot monitor source available is not backward compatible
with pre-pg2 socs. So to support these h/w, provide a pre-built binary
that can be used by the users. This binary is expected to be present
in the release pre-built binaries and UBI image. To build this binary
either revert the commit "boot-monitor: rework to support secondary
CPU fast-boot" and build.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
The fast boot support is not available on pre-pg2 k2hk devices and EVMs.
The current boot monitor source available is not backward compatible
with pre-pg2 socs. So to support these h/w, provide a pre-built binary
that can be used by the users. This binary is expected to be present
in the release pre-built binaries and UBI image. To build this binary
either revert the commit "boot-monitor: rework to support secondary
CPU fast-boot" and build.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: rework to support secondary CPU fast-boot
This commit changes the method of booting secondary ARM cores.
BM doesn't use anymore the same _skern_init function to initialize
all ARM cores. We have simplified _skern_123_init and corresponding
skern_123_init() for that.
When BM is being installed, it store _skern_123_init address at the
core_n_base_addr for each ARM core. When later we power on a slave core
RBL doesn't preform the complete boot, but branches directly to the
_skern_123_init()
_skern_123_init sets the monitor vectors and stack, initializes GIC
registers, and goes to non-secure SVR mode. There it initializes
non-secure SVR stack and branches to the kernel entry point.
This BM supports only fast boot mode only.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
This commit changes the method of booting secondary ARM cores.
BM doesn't use anymore the same _skern_init function to initialize
all ARM cores. We have simplified _skern_123_init and corresponding
skern_123_init() for that.
When BM is being installed, it store _skern_123_init address at the
core_n_base_addr for each ARM core. When later we power on a slave core
RBL doesn't preform the complete boot, but branches directly to the
_skern_123_init()
_skern_123_init sets the monitor vectors and stack, initializes GIC
registers, and goes to non-secure SVR mode. There it initializes
non-secure SVR stack and branches to the kernel entry point.
This BM supports only fast boot mode only.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: set L2ACTLR.8 bit
Disables DVM and cache maintenance operation message broadcast
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Disables DVM and cache maintenance operation message broadcast
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: add workaround for stream performance degradation
On Keystone II SOCs, to support IO coherency, the memory
pages have to be marked outer shareable. But this has
undesired effect on the system and there are extra
snoop related writes send on the bus which creates
pressure on the memory pipe and hence the performance.
Since this additional write traffic is for snoop-filter
which MSMC doesn't support, we can suppress those and
get back the performance.
So disables clean/evict from being pushed to external
memory by setting L2ACTLR[.3] = 1.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
On Keystone II SOCs, to support IO coherency, the memory
pages have to be marked outer shareable. But this has
undesired effect on the system and there are extra
snoop related writes send on the bus which creates
pressure on the memory pipe and hence the performance.
Since this additional write traffic is for snoop-filter
which MSMC doesn't support, we can suppress those and
get back the performance.
So disables clean/evict from being pushed to external
memory by setting L2ACTLR[.3] = 1.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
boot-monitor: clean up images for clean target
Currently make clean doesn't clean the SoC specific images. This
patch rename clean to build_clean and use clean to wipe out all of
images and objects.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Currently make clean doesn't clean the SoC specific images. This
patch rename clean to build_clean and use clean to wipe out all of
images and objects.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: set NSACR.NS_SMP bit
SMP Linux kernel sets the ACTRL.SMP bit. We need to set NSACR.NS_SMP bit
to make the ACTRL.SMP writable form non-secure world.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
SMP Linux kernel sets the ACTRL.SMP bit. We need to set NSACR.NS_SMP bit
to make the ACTRL.SMP writable form non-secure world.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: fix power on and power off sequence
Accordingly to PSCI API document the PSCI_CPU_ON just return ALREADY_ON
code for already running CPU. Otherwise it powers it on.
For POWER_OFF another CPU, the CPU just turns the DPSC off for required
CPU, but not wait for completion. If the CPU power off itself and it is not
the CPU 0. It calls WFI instruction, which has to complete the operation.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Accordingly to PSCI API document the PSCI_CPU_ON just return ALREADY_ON
code for already running CPU. Otherwise it powers it on.
For POWER_OFF another CPU, the CPU just turns the DPSC off for required
CPU, but not wait for completion. If the CPU power off itself and it is not
the CPU 0. It calls WFI instruction, which has to complete the operation.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: add and use PSCI definitions
We are converting boot-monitor to support PSCI API. This patch
adds command and error definitions from ARM DEN0022B document.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
We are converting boot-monitor to support PSCI API. This patch
adds command and error definitions from ARM DEN0022B document.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: disable SMP bit on power on
We don't know the SMP bit status of the core after RBL boots it.
It is better to disable it explicitly.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
We don't know the SMP bit status of the core after RBL boots it.
It is better to disable it explicitly.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: add support of the PSCI_CPU_OFF API
It adds support of the psci_cpu_off API. This support of powering
a particular core only, but not the entire cluster.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
It adds support of the psci_cpu_off API. This support of powering
a particular core only, but not the entire cluster.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: fix powering down cpu sequence
Accordingly to tetris spec a powering itself core has to power off
itself by turning off ots DPSC, disable caches, flushes L1 data cache.
Only after that it has to disable SMP bit and execute a WFI instruction.
This patch also adds displaying cpi_id to debug output
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Accordingly to tetris spec a powering itself core has to power off
itself by turning off ots DPSC, disable caches, flushes L1 data cache.
Only after that it has to disable SMP bit and execute a WFI instruction.
This patch also adds displaying cpi_id to debug output
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot monitor: add support for k2l and k2e devices.
boot-monitor: enable ECC and parity enable bit for L1 and L2 caches on ARM
This is disabled as this is an optional feature. This patch enables this
on ARM for K2
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
This is disabled as this is an optional feature. This patch enables this
on ARM for K2
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: fix the clobber list
The SMP disable asm instruction needs to add r8 to clobber list
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
The SMP disable asm instruction needs to add r8 to clobber list
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: fix poweron and poweroff functions
This patch fixes several bugs in the skern_poweron_cpu() and
skern_poweroff_cpu()
1. makes *addr volatile
2. uses correct bits to poll on and off status
3. If the CPU turns off itself, doesn't poll the status
4. Reser SMP bit
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
This patch fixes several bugs in the skern_poweron_cpu() and
skern_poweroff_cpu()
1. makes *addr volatile
2. uses correct bits to poll on and off status
3. If the CPU turns off itself, doesn't poll the status
4. Reser SMP bit
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: add changes for errata 799270 and 798870
Also fix up function naming in sync with rest of the file
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Also fix up function naming in sync with rest of the file
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: remove soft-float option
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: fix MPU settings to provide user space access
fix an address incrementing bug in the MPU setting code
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
fix an address incrementing bug in the MPU setting code
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: update MPU settings for user mode access
Some more settings for user mode access
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Some more settings for user mode access
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: adding conditional compile for simulator support code
This removes the access to simulator workaround memeory access to DDR
space.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
This removes the access to simulator workaround memeory access to DDR
space.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: updates for ARM errata 763126
ACTLR bit31 to be set for errata 763126.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
ACTLR bit31 to be set for errata 763126.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: set ACTLR.smp bit
SMP bit in ACTLR requires to be set to enables receiving of instruction cache, BTB,
and TLB maintenance operations. This can be done only in Secure PL1 modes. So this
change is done in boot monitor code.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
SMP bit in ACTLR requires to be set to enables receiving of instruction cache, BTB,
and TLB maintenance operations. This can be done only in Secure PL1 modes. So this
change is done in boot monitor code.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
[temp] boot-monitor: add MPU settings to allow user space access to registers
This is a temporary solution to allow user space access to BOOTCFG and
PSC registers so that DSPs can be loaded and booted from user space.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
This is a temporary solution to allow user space access to BOOTCFG and
PSC registers so that DSPs can be loaded and booted from user space.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: disable debug printouts
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: using arch_timer frequency that is passed from u-boot
The skern_init() is actually called with four parameters where
arch timer frequency is passed in R3 and dpsc_base in R2.
This patch fixes the bug by adding dpsc_base parameter before freq.
It also used the provided frequency instead of hard-coded value
to set the arch_timer_freq.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
The skern_init() is actually called with four parameters where
arch timer frequency is passed in R3 and dpsc_base in R2.
This patch fixes the bug by adding dpsc_base parameter before freq.
It also used the provided frequency instead of hard-coded value
to set the arch_timer_freq.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: add skern_putbyte() and skern_putui() functions
This patch adds debug functions to print byte and unsigned long values
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
This patch adds debug functions to print byte and unsigned long values
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
boot-monitor: update for configuring A15 for vfp, l2 latency etc
Enable l2 tag latency and enable VFP
Enable group0 for all interrupts in GIC
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Enable l2 tag latency and enable VFP
Enable group0 for all interrupts in GIC
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: update L2 cache latency values
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: update License information
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: add license file
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: set arch timer frequency register
boot-monitor: Documentation added
Initial version of the readme.txt added
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Initial version of the readme.txt added
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: add top level build infrastructure
This patch adds a top level infrastructure to build boot monitor
code. The build generates a config.h that configures the boot monitor
software.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
This patch adds a top level infrastructure to build boot monitor
code. The build generates a config.h that configures the boot monitor
software.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: non-sec: add non secure init code
This patch adds non secure init code that initialize the primary and
secondary boot monitor. On primary CPU, this is called from u-boot
that then calls the RBL API (smc #0) to execute skern_init() as a
privileged function call. As part of the primary init() call, the
secondary core entry point function gets updated at Rom Boot loader
(RBL) ARM magic address location. When secondary core is powered ON,
RBL gets executed and finally enters the secondary core entry point
function in boot monitor.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
This patch adds non secure init code that initialize the primary and
secondary boot monitor. On primary CPU, this is called from u-boot
that then calls the RBL API (smc #0) to execute skern_init() as a
privileged function call. As part of the primary init() call, the
secondary core entry point function gets updated at Rom Boot loader
(RBL) ARM magic address location. When secondary core is powered ON,
RBL gets executed and finally enters the secondary core entry point
function in boot monitor.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
boot-monitor: sec: add monitor code and power on/off smc calls
This patch implements boot monitor secure part.
boot monitor secure part is implemented in assembly(skernel.S) and C code
(skern.c). The assmembly code has the monitor vectors and provides a
init() function to do the following:-
- Replace RBL monitor code with boot monitor code including the
the vectors.
- switches from RBL monitor stack to boot monitor stack
- Calls skern_init() to initialize the secondary core entry point
to boot monitor core.
monitor vector function direct smc calls to C code to execute following monitor
services:-
- Power ON/OFF secondary CPUs
Also implements a debug function to put debug traces to UART port
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
This patch implements boot monitor secure part.
boot monitor secure part is implemented in assembly(skernel.S) and C code
(skern.c). The assmembly code has the monitor vectors and provides a
init() function to do the following:-
- Replace RBL monitor code with boot monitor code including the
the vectors.
- switches from RBL monitor stack to boot monitor stack
- Calls skern_init() to initialize the secondary core entry point
to boot monitor core.
monitor vector function direct smc calls to C code to execute following monitor
services:-
- Power ON/OFF secondary CPUs
Also implements a debug function to put debug traces to UART port
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Cyril Chemparathy <cyril@ti.com>