Introduce framework to build SYSFW and config data into an ITB
authorAndreas Dannenberg <dannenberg@ti.com>
Fri, 31 Aug 2018 18:09:00 +0000 (13:09 -0500)
committerAndreas Dannenberg <dannenberg@ti.com>
Thu, 13 Sep 2018 18:43:39 +0000 (13:43 -0500)
In order to be able to consume system firmware (SYSFW) as well as the
associated configuration data from the boot media introduce a framework
that allows building the SYSFW image itself as well as the different
domain-specific configuration fragments (board, pm, rm, and sec) into an
image tree blob (ITB) file called sysfw.itb.

To establish a known-good starting point for development and testing use
U-Boot commit 7501705610 ("arm: K3: am654: Update board config for
v2018.07a enforcement in 2018.08 release of sysfw") as a baseline for the
AM654x board configuration data. Furthermore integrate SYSFW v2018.08b as
released on 09/12/2018 by way of download URL.

See included README.md for a more complete description.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
.gitignore [new file with mode: 0644]
Makefile [new file with mode: 0644]
README.md [new file with mode: 0644]
board-cfg.c [new file with mode: 0644]
common.h [new file with mode: 0644]
gen_its.sh [new file with mode: 0755]
gen_x509_cert.sh [new file with mode: 0755]
pm-cfg.c [new file with mode: 0644]
rm-cfg.c [new file with mode: 0644]
sec-cfg.c [new file with mode: 0644]

diff --git a/.gitignore b/.gitignore
new file mode 100644 (file)
index 0000000..2c24762
--- /dev/null
@@ -0,0 +1,4 @@
+*.o
+*.bin
+*.its
+*.itb
diff --git a/Makefile b/Makefile
new file mode 100644 (file)
index 0000000..4976893
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,105 @@
+#
+# Utility to generate an image tree blob (ITB) comprising a signed System
+# Firmware (SYSFW) binary image as released by TI as well as domain-specific
+# SYSFW configuration fragments provided in the form of C sources.
+#
+# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+#      Andreas Dannenberg <dannenberg@ti.com>
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+# If using the default SYSFW make sure to manually copy/populate the unsigned
+# image into the root folder of this repository.
+SYSFW_PATH ?= ti-sci-firmware-am65x-gp.bin
+
+# Must use FULL Git hash below, as it is used as part of an URL for direct DL
+SYSFW_GIT_HASH ?= 463b1b4a50e8e361fa333f87caf74d2e05bc0a82
+
+# URL to download SYSFW release binary from if not provided otherwise
+SYSFW_DL_URL ?= https://git.ti.com/processor-firmware/ti-linux-firmware/blobs/raw/$(SYSFW_GIT_HASH)/ti-sysfw/$(SYSFW_PATH)
+
+CROSS_COMPILE ?= arm-linux-gnueabihf-
+
+CFLAGS ?= \
+       -fno-builtin \
+       -Wall
+
+BINS ?= \
+       sysfw.bin \
+       board-cfg.bin \
+       pm-cfg.bin \
+       rm-cfg.bin \
+       sec-cfg.bin
+
+ITB ?= sysfw.itb
+ITS ?= $(basename $(ITB)).its
+
+MKIMAGE ?= mkimage
+
+.PHONY: all
+all: $(ITB)
+
+%.o: %.S
+       $(CROSS_COMPILE)as -o $@ $<
+
+%.o: %.c
+       $(CROSS_COMPILE)gcc $(CFLAGS) -c -o $@ $<
+
+%.bin: %.o
+       $(CROSS_COMPILE)objcopy -S -O binary $< $@
+
+$(SYSFW_PATH):
+       @echo "Downloading SYSFW release image..."
+       wget $(SYSFW_DL_URL)
+       @echo "Download SUCCESS!"
+
+sysfw.bin: $(SYSFW_PATH) sysfw_version
+       @echo "Signing the SYSFW release image with random key..."
+       ./gen_x509_cert.sh -c m3 -b $< -o $@ -l 0x40000
+
+$(ITS): $(BINS)
+       ./gen_its.sh $(BINS) > $@
+
+$(ITB): $(ITS) $(BINS)
+       $(MKIMAGE) -f $< -r $@
+
+.PHONY: sysfw_version
+sysfw_version: $(SYSFW_PATH)
+       @echo "SYSFW Version:" `strings $(SYSFW_PATH) | grep -o 'v20[0-9][0-9]\.[0-9][0-9].*(.*'`
+
+.PHONY: clean
+clean:
+       -rm $(BINS)
+       -rm $(ITB)
+       -rm $(ITS)
+
+.PHONY: mrproper
+mrproper: clean
+       -rm $(SYSFW_PATH)
diff --git a/README.md b/README.md
new file mode 100644 (file)
index 0000000..494914d
--- /dev/null
+++ b/README.md
@@ -0,0 +1,87 @@
+System Firmware (SYSFW) and Configuration Image Generator for AM65x
+===================================================================
+
+Overview
+--------
+This tool is intended to be a simple solution to allow users to create an image
+tree blob (a.k.a. FIT image) comprising a signed System Firmware image as well
+as the binary configuration artifacts needed to bring up SYSFW as part of the
+U-Boot SPL startup. Note that the final SYSFW configuration itself is expected
+to be performed by the end user by directly modifying different C source files
+included into this project as needed for an application and board-specific use
+case. The domain-specific configuration artifacts to be tailored are:
+
+* *board-cfg.c* contains the general board configuration
+* *pm-cfg.c* contains the power management / clock related configuration
+* *rm-cfg.c* contains the resource management / allocation related configuration
+* *sec-cfg.c* contains the security configuration
+
+The build process consumes a raw (unsigned) SYSFW binary image as released by
+the SYSFW development team and signs it by adding an X.509 certificate using a
+random key.
+
+The signed SYSFW image as well as the configuration artifacts will then all get
+build into an ITB blob (FIT image) named **sysfw.itb** ready for consumption by
+U-Boot SPL.
+
+
+Building SYSFW Image and Configuration Data
+-------------------------------------------
+First, ensure you have a current mkimage tool and ARMv7 cross toolchain
+installed. The SYSFW configuration generator was developed and tested using...
+
+    $ mkimage -V
+    mkimage version 2013.10
+
+    $ arm-linux-gnueabihf-gcc --version
+    arm-linux-gnueabihf-gcc (Linaro GCC 7.2-2017.11) 7.2.1 20171011
+    Copyright (C) 2017 Free Software Foundation, Inc.
+    This is free software; see the source for copying conditions.  There is NO
+    warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+Also make sure to have a proper unsigned SYSFW image populated at the root of
+this project, otherwise a version specified in the Makefile via Git commit hash
+will be downloaded from the TI SYSFW release URL (see download location below).
+
+The default SYSFW image consumed by the build process is called
+**ti-sci-firmware-am65x-gp.bin** however this may be overwritten and customized
+using the **SYSFW_PATH** make variable. The build process will fail if the
+image can't be downloaded or no such file is provided.
+
+In order to download the SYSFW release image (if needed) and build the final
+**sysfw.itb** for consumption by U-Boot simply perform a make...
+
+    $ make
+
+To extract and show the release version of the SYSFW image being used...
+
+    $ make sysfw_version
+    SYSFW Version: v2018.08a (Curious Crow)
+
+The workspace can be cleaned up by doing...
+
+    $ make clean
+
+To also remove the SYSFW image do this...
+
+    $ make mrproper
+
+
+Important Notes
+---------------
+There is a strong dependency of the used System Firmware release version and
+how the board configuration data needs to be structured and/or filled in. Using
+config data that is not compatible with a given SYSFW release may lead to
+failures during loading of the data by U-Boot SPL, or failures later downstream
+in U-Boot or during Linux boot.
+
+It is strongly recommended to review System Firmware release documentation in
+great detail(!) to make sure suitable board configuration is provided. Common
+pitfalls preventing proper system operation include but are not limited to using
+an unsuitable or invalid resource management configuration.
+
+
+References
+----------
+* [Latest SYSFW Release Documentation](http://software-dl.ti.com/tisci/esd/latest/)
+* [Official SYSFW Release Download Location](https://git.ti.com/processor-firmware/ti-linux-firmware/trees/ti-linux-firmware-4.1.y/ti-sysfw)
diff --git a/board-cfg.c b/board-cfg.c
new file mode 100644 (file)
index 0000000..8774268
--- /dev/null
@@ -0,0 +1,82 @@
+/*
+ * K3 System Firmware Board Configuration Data
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ *     Andreas Dannenberg <dannenberg@ti.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "common.h"
+
+const struct k3_boardcfg am65_boardcfg_data = {
+       /* boardcfg_abi_rev */
+       .rev = {
+               .boardcfg_abi_maj = 0x0,
+               .boardcfg_abi_min = 0x1,
+       },
+
+       /* boardcfg_control */
+       .control = {
+               .subhdr = {
+                       .magic = BOARDCFG_CONTROL_MAGIC_NUM,
+                       .size = sizeof(struct boardcfg_control),
+               },
+               .main_isolation_enable = 0x5A,
+               .main_isolation_hostid = 0x2,
+       },
+
+       /* boardcfg sec_proxy */
+       .secproxy = {
+               .subhdr = {
+                       .magic = BOARDCFG_SECPROXY_MAGIC_NUM,
+                       .size = sizeof(struct boardcfg_secproxy),
+               },
+               .scaling_factor = 0x1,
+               .scaling_profile = 0x1,
+               .disable_main_nav_secure_proxy = 0,
+       },
+
+       /* boardcfg_msmc */
+       .msmc = {
+               .subhdr = {
+                       .magic = BOARDCFG_MSMC_MAGIC_NUM,
+                       .size = sizeof(struct boardcfg_msmc),
+               },
+               .msmc_cache_size = 0x10,
+       },
+
+       /* boardcfg_dbg_cfg */
+       .debug_cfg = {
+               .subhdr = {
+                       .magic = BOARDCFG_DBG_CFG_MAGIC_NUM,
+                       .size = sizeof(struct boardcfg_dbg_cfg),
+               },
+       },
+};
diff --git a/common.h b/common.h
new file mode 100644 (file)
index 0000000..4dd3fe5
--- /dev/null
+++ b/common.h
@@ -0,0 +1,405 @@
+/*
+ * K3 System Firmware Board Configuration Data Structures
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ *     Andreas Dannenberg <dannenberg@ti.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Standard Linux Kernel integer types
+ */
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+/**
+ * Fault tolerant boolean type (specific to SYSFW)
+ */
+typedef u8 ftbool;
+
+/**
+ * Various definitions as expected by the 'struct' declarations below
+ */
+#define BOARDCFG_RM_HOST_CFG_MAGIC_NUM         0x4C41
+#define BOARDCFG_RM_RESASG_MAGIC_NUM           0x7B25
+#define BOARDCFG_CONTROL_MAGIC_NUM             0xC1D3
+#define BOARDCFG_SECPROXY_MAGIC_NUM            0x1207
+#define BOARDCFG_MSMC_MAGIC_NUM                        0xA5C3
+#define BOARDCFG_PROC_ACL_MAGIC_NUM            0xF1EA
+#define BOARDCFG_HOST_HIERARCHY_MAGIC_NUM       0x8D27
+#define BOARDCFG_RESASG_MAGIC_NUM              0x4C41
+#define BOARDCFG_DBG_CFG_MAGIC_NUM             0x020C
+#define BOARDCFG_PMIC_CFG_MAGIC_NUM            0x3172
+
+struct boardcfg_substructure_header {
+       u16     magic;
+       u16     size;
+} __attribute__((__packed__));
+
+struct boardcfg_abi_rev {
+       u8      boardcfg_abi_maj;
+       u8      boardcfg_abi_min;
+} __attribute__((__packed__));
+
+/**
+ * Definitions, types, etc. as used for general board configuration
+ */
+struct boardcfg_control {
+       struct boardcfg_substructure_header     subhdr;
+       ftbool                                  main_isolation_enable;
+       u16                                     main_isolation_hostid;
+} __attribute__((__packed__));
+
+struct boardcfg_secproxy {
+       struct boardcfg_substructure_header     subhdr;
+       u8                                      scaling_factor;
+       u8                                      scaling_profile;
+       u8                                      disable_main_nav_secure_proxy;
+} __attribute__((__packed__));
+
+struct boardcfg_msmc {
+       struct boardcfg_substructure_header     subhdr;
+       u8                                      msmc_cache_size;
+} __attribute__((__packed__));
+
+
+#define BOARDCFG_TRACE_DST_UART0                BIT(0)
+#define BOARDCFG_TRACE_DST_ITM                  BIT(2)
+#define BOARDCFG_TRACE_DST_MEM                  BIT(3)
+
+#define BOARDCFG_TRACE_SRC_PM                   BIT(0)
+#define BOARDCFG_TRACE_SRC_RM                   BIT(1)
+#define BOARDCFG_TRACE_SRC_SEC                  BIT(2)
+#define BOARDCFG_TRACE_SRC_BASE                 BIT(3)
+#define BOARDCFG_TRACE_SRC_USER                 BIT(4)
+#define BOARDCFG_TRACE_SRC_SUPR                 BIT(5)
+
+struct boardcfg_dbg_cfg {
+       struct boardcfg_substructure_header     subhdr;
+       u16                                     trace_dst_enables;
+       u16                                     trace_src_enables;
+} __attribute__((__packed__));
+
+struct k3_boardcfg {
+       struct boardcfg_abi_rev                 rev;
+       struct boardcfg_control                 control;
+       struct boardcfg_secproxy                secproxy;
+       struct boardcfg_msmc                    msmc;
+       struct boardcfg_dbg_cfg                 debug_cfg;
+} __attribute__((__packed__));
+
+/**
+ * Definitions, types, etc. as used for resource assignment
+ */
+#define HOST_ID_DMSC                           0
+#define HOST_ID_R5_0                           3
+#define HOST_ID_R5_1                           4
+#define HOST_ID_R5_2                           5
+#define HOST_ID_R5_3                           6
+#define HOST_ID_A53_0                          10
+#define HOST_ID_A53_1                          11
+#define HOST_ID_A53_2                          12
+#define HOST_ID_A53_3                          13
+#define HOST_ID_A53_4                          14
+#define HOST_ID_A53_5                          15
+#define HOST_ID_A53_6                          16
+#define HOST_ID_A53_7                          17
+#define HOST_ID_GPU_0                          30
+#define HOST_ID_GPU_1                          31
+#define HOST_ID_ICSSG_0                                50
+#define HOST_ID_ICSSG_1                                51
+#define HOST_ID_ICSSG_2                                52
+
+struct boardcfg_rm_host_cfg_entry {
+       u8      host_id;
+       u8      allowed_atype;
+       u16     allowed_qos;
+       u32     allowed_orderid;
+       u16     allowed_priority;
+       u8      allowed_sched_priority;
+} __attribute__((__packed__));
+
+#define BOARDCFG_RM_HOST_CFG_ENTRIES (32U)
+
+struct boardcfg_rm_host_cfg {
+       struct boardcfg_substructure_header     subhdr;
+       struct boardcfg_rm_host_cfg_entry
+                                host_cfg_entries[BOARDCFG_RM_HOST_CFG_ENTRIES];
+};
+
+#define RESASG_TYPE_SHIFT                      0x0006
+#define RESASG_TYPE_MASK                       0xFFC0
+#define RESASG_SUBTYPE_SHIFT                   0x0000
+#define RESASG_SUBTYPE_MASK                    0x003F
+
+#define RESASG_UTYPE(type, subtype) \
+       (((type << RESASG_TYPE_SHIFT) & RESASG_TYPE_MASK) | \
+        ((subtype << RESASG_SUBTYPE_SHIFT) & RESASG_SUBTYPE_MASK))
+
+enum resasg_types {
+       RESASG_TYPE_MAIN_NAV_UDMASS_IA0 = 0x000,
+       RESASG_TYPE_MAIN_NAV_MODSS_IA0 = 0x001,
+       RESASG_TYPE_MAIN_NAV_MODSS_IA1 = 0x002,
+       RESASG_TYPE_MCU_NAV_UDMASS_IA0 = 0x003,
+       RESASG_TYPE_MAIN_NAV_MCRC = 0x004,
+       RESASG_TYPE_MCU_NAV_MCRC = 0x005,
+       RESASG_TYPE_MAIN_NAV_UDMAP = 0x006,
+       RESASG_TYPE_MCU_NAV_UDMAP = 0x007,
+       RESASG_TYPE_MSMC = 0x008,
+       RESASG_TYPE_MAIN_NAV_RA = 0x009,
+       RESASG_TYPE_MCU_NAV_RA = 0x00A,
+       RESASG_TYPE_GIC_IRQ = 0x00B,
+       RESASG_TYPE_PULSAR_C0_IRQ = 0x00C,
+       RESASG_TYPE_PULSAR_C1_IRQ = 0x00D,
+       RESASG_TYPE_ICSSG0_IRQ = 0x00E,
+       RESASG_TYPE_ICSSG1_IRQ = 0x00F,
+       RESASG_TYPE_ICSSG2_IRQ = 0x010,
+       RESASG_TYPE_MAX = 0x3FF
+};
+
+enum resasg_subtype_main_nav_udmass_ia0 {
+       RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_VINT = 0x00,
+       RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_SEVI = 0x01,
+       RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_MEVI = 0x02,
+       RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_GEVI = 0x03,
+       RESASG_SUBYTPE_MAIN_NAV_UDMASS_IA0_CNT = 0x04,
+};
+
+enum resasg_subtype_main_nav_modss_ia0 {
+       RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_VINT = 0x00,
+       RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_SEVI = 0x01,
+       RESASG_SUBYTPE_MAIN_NAV_MODSS_IA0_CNT = 0x02,
+};
+
+enum resasg_subtype_main_nav_modss_ia1 {
+       RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_VINT = 0x00,
+       RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_SEVI = 0x01,
+       RESASG_SUBYTPE_MAIN_NAV_MODSS_IA1_CNT = 0x02,
+};
+
+enum resasg_subtype_mcu_nav_udmass_ia0 {
+       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_VINT = 0x00,
+       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_SEVI = 0x01,
+       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_MEVI = 0x02,
+       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_GEVI = 0x03,
+       RESASG_SUBYTPE_MCU_NAV_UDMASS_IA0_CNT = 0x04,
+};
+
+enum resasg_subtype_main_nav_mcrc {
+       RESASG_SUBTYPE_MAIN_NAV_MCRC_LEVI = 0x00,
+       RESASG_SUBYTPE_MAIN_NAV_MCRC_CNT = 0x01,
+};
+
+enum resasg_subtype_mcu_nav_mcrc {
+       RESASG_SUBTYPE_MCU_NAV_MCRC_LEVI = 0x00,
+       RESASG_SUBYTPE_MCU_NAV_MCRC_CNT = 0x01,
+};
+
+enum resasg_subtype_main_nav_udmap {
+       RESASG_SUBTYPE_MAIN_NAV_UDMAP_TRIGGER = 0x00,
+       RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_HCHAN = 0x01,
+       RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_CHAN = 0x02,
+       RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_ECHAN = 0x03,
+       RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_HCHAN = 0x04,
+       RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_CHAN = 0x05,
+       RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_FLOW_COMMON = 0x06,
+       RESASG_SUBTYPE_MAIN_NAV_UDMAP_INVALID_FLOW_OES = 0x07,
+       RESASG_SUBYTPE_MAIN_NAV_UDMAP_CNT = 0x08,
+};
+
+enum resasg_subtype_mcu_nav_udmap {
+       RESASG_SUBTYPE_MCU_NAV_UDMAP_TRIGGER = 0x00,
+       RESASG_SUBTYPE_MCU_NAV_UDMAP_TX_HCHAN = 0x01,
+       RESASG_SUBTYPE_MCU_NAV_UDMAP_TX_CHAN = 0x02,
+       RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_HCHAN = 0x03,
+       RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_CHAN = 0x04,
+       RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_FLOW_COMMON = 0x05,
+       RESASG_SUBTYPE_MCU_NAV_UDMAP_INVALID_FLOW_OES = 0x06,
+       RESASG_SUBYTPE_MCU_NAV_UDMAP_CNT = 0x07,
+};
+
+enum resasg_subtype_msmc {
+       RESASG_SUBTYPE_MSMC_DRU = 0x00,
+       RESASG_SUBYTPE_MSMC_CNT = 0x01,
+};
+
+enum resasg_subtype_main_nav_ra {
+       RESASG_SUBTYPE_MAIN_NAV_RA_RING_UDMAP_TX = 0x00,
+       RESASG_SUBTYPE_MAIN_NAV_RA_RING_UDMAP_RX = 0x01,
+       RESASG_SUBTYPE_MAIN_NAV_RA_RING_GP = 0x02,
+       RESASG_SUBTYPE_MAIN_NAV_RA_ERROR_OES = 0x03,
+       RESASG_SUBYTPE_MAIN_NAV_RA_CNT = 0x04,
+};
+
+enum resasg_subtype_mcu_nav_ra {
+       RESASG_SUBTYPE_MCU_NAV_RA_RING_UDMAP_TX = 0x00,
+       RESASG_SUBTYPE_MCU_NAV_RA_RING_UDMAP_RX = 0x01,
+       RESASG_SUBTYPE_MCU_NAV_RA_RING_GP = 0x02,
+       RESASG_SUBTYPE_MCU_NAV_RA_ERROR_OES = 0x03,
+       RESASG_SUBYTPE_MCU_NAV_RA_CNT = 0x04,
+};
+
+enum resasg_subtype_gic_irq {
+       RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET0 = 0x00,
+       RESASG_SUBTYPE_GIC_IRQ_MAIN_GPIO = 0x01,
+       RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET1 = 0x02,
+       RESASG_SUBTYPE_GIC_IRQ_COMP_EVT = 0x03,
+       RESASG_SUBTYPE_GIC_IRQ_WKUP_GPIO = 0x04,
+       RESASG_SUBYTPE_GIC_IRQ_CNT = 0x05,
+};
+
+enum resasg_subtype_pulsar_c0_irq {
+       RESASG_SUBTYPE_PULSAR_C0_IRQ_MCU_NAV = 0x00,
+       RESASG_SUBTYPE_PULSAR_C0_IRQ_WKUP_GPIO = 0x01,
+       RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_LVL = 0x02,
+       RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_PLS = 0x03,
+       RESASG_SUBYTPE_PULSAR_C0_IRQ_CNT = 0x04,
+};
+
+enum resasg_subtype_pulsar_c1_irq {
+       RESASG_SUBTYPE_PULSAR_C1_IRQ_MCU_NAV = 0x00,
+       RESASG_SUBTYPE_PULSAR_C1_IRQ_WKUP_GPIO = 0x01,
+       RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_LVL = 0x02,
+       RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_PLS = 0x03,
+       RESASG_SUBYTPE_PULSAR_C1_IRQ_CNT = 0x04,
+};
+
+enum resasg_subtype_icssg0_irq {
+       RESASG_SUBTYPE_ICSSG0_IRQ_MAIN_NAV = 0x00,
+       RESASG_SUBTYPE_ICSSG0_IRQ_MAIN_GPIO = 0x01,
+       RESASG_SUBYTPE_ICSSG0_IRQ_CNT = 0x02,
+};
+
+enum resasg_subtype_icssg1_irq {
+       RESASG_SUBTYPE_ICSSG1_IRQ_MAIN_NAV = 0x00,
+       RESASG_SUBTYPE_ICSSG1_IRQ_MAIN_GPIO = 0x01,
+       RESASG_SUBYTPE_ICSSG1_IRQ_CNT = 0x02,
+};
+
+enum resasg_subtype_icssg2_irq {
+       RESASG_SUBTYPE_ICSSG2_IRQ_MAIN_NAV = 0x00,
+       RESASG_SUBTYPE_ICSSG2_IRQ_MAIN_GPIO = 0x01,
+       RESASG_SUBYTPE_ICSSG2_IRQ_CNT = 0x02,
+};
+
+struct boardcfg_rm_resasg_entry {
+       u16                                     start_resource;
+       u16                                     num_resource;
+       u16                                     type;
+       u8                                      host_id;
+       u8                                      reserved;
+};
+
+struct boardcfg_rm_resasg {
+       struct boardcfg_substructure_header     subhdr;
+       u16                                     resasg_entries_size;
+       u16                                     reserved;
+       struct boardcfg_rm_resasg_entry         resasg_entries[];
+} __attribute__((__packed__));
+
+struct k3_boardcfg_rm {
+       struct boardcfg_abi_rev                 rev;
+       struct boardcfg_rm_host_cfg             host_cfg;
+       struct boardcfg_rm_resasg               resasg;
+} __attribute__((__packed__));
+
+#define AM65_BOARDCFG_RM_RESASG_ENTRIES                59
+
+/*
+ * This is essentially 'struct k3_boardcfg_rm', but modified to pull
+ * .resasg_entries which is a member of 'struct boardcfg_rm_resasg' into
+ * the outer structure for easier explicit initialization.
+ */
+struct am65_boardcfg_rm_local {
+       struct k3_boardcfg_rm                   rm_boardcfg;
+       struct boardcfg_rm_resasg_entry
+                               resasg_entries[AM65_BOARDCFG_RM_RESASG_ENTRIES];
+} __attribute__((__packed__));
+
+/**
+ * Definitions, types, etc. as used for the security configuration
+ */
+#define PROCESSOR_ACL_SECONDARY_MASTERS_MAX    3
+
+struct boardcfg_proc_acl_entry {
+       u8                                      processor_id;
+       u8                                      proc_access_master;
+       u8           proc_access_secondary[PROCESSOR_ACL_SECONDARY_MASTERS_MAX];
+} __attribute__((__packed__));
+
+#define PROCESSOR_ACL_ENTRIES                  32
+
+struct boardcfg_proc_acl {
+       struct boardcfg_substructure_header     subhdr;
+       struct boardcfg_proc_acl_entry  proc_acl_entries[PROCESSOR_ACL_ENTRIES];
+} __attribute__((__packed__));
+
+struct boardcfg_host_hierarchy_entry {
+       u8                                      host_id;
+       u8                                      supervisor_host_id;
+} __attribute__((__packed__));
+
+#define HOST_HIERARCHY_ENTRIES                 32
+
+struct boardcfg_host_hierarchy {
+       struct boardcfg_substructure_header     subhdr;
+       struct boardcfg_host_hierarchy_entry
+                                host_hierarchy_entries[HOST_HIERARCHY_ENTRIES];
+} __attribute__((__packed__));
+
+struct k3_boardcfg_security {
+       struct boardcfg_abi_rev                 rev;
+       struct boardcfg_proc_acl                processor_acl_list;
+       struct boardcfg_host_hierarchy          host_hierarchy;
+} __attribute__((__packed__));
+
+/**
+ * Definitions, types, etc. as used for PM configuration
+ */
+struct k3_boardcfg_pm {
+       struct boardcfg_abi_rev                 rev;
+} __attribute__((__packed__));
+
+/**
+ * Export different board configuration structures
+ */
+extern const struct k3_boardcfg am65_boardcfg_data;
+extern const struct am65_boardcfg_rm_local am65_boardcfg_rm_data;
+extern const struct k3_boardcfg_security am65_boardcfg_security_data;
+extern const struct k3_boardcfg_pm am65_boardcfg_pm_data;
diff --git a/gen_its.sh b/gen_its.sh
new file mode 100755 (executable)
index 0000000..3f7d576
--- /dev/null
@@ -0,0 +1,68 @@
+#!/bin/sh
+#
+# Script to generate FIT image source for System Firmware (SYSFW) and
+# associated configuration data based on a given SYSFW binary image plus
+# multiple domain-specific fragments in binary format all specified via
+# command line.
+#
+# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+#      Andreas Dannenberg <dannenberg@ti.com>
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# usage: $0 <bin_name> [<bin_name> [<bin_name] ...]
+#
+
+cat << __HEADER_EOF
+/dts-v1/;
+
+/ {
+       description = "SYSFW and Config Fragments";
+       #address-cells = <1>;
+
+       images {
+__HEADER_EOF
+
+for bin_name in $*
+do
+       cat << __CFG_IMAGE_EOF
+               $(basename $bin_name) {
+                       description = "$(basename $bin_name .bin)";
+                       data = /incbin/("$bin_name");
+                       type = "firmware";
+                       arch = "arm";
+                       compression = "none";
+               };
+__CFG_IMAGE_EOF
+done
+
+cat << __ITS_EOF
+       };
+};
+__ITS_EOF
diff --git a/gen_x509_cert.sh b/gen_x509_cert.sh
new file mode 100755 (executable)
index 0000000..e5ce09b
--- /dev/null
@@ -0,0 +1,341 @@
+#!/bin/bash
+#
+# Script to add x509 certificate to binary/ELF
+#
+# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+#
+#  Redistribution and use in source and binary forms, with or without
+#  modification, are permitted provided that the following conditions
+#  are met:
+#
+#    Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+#
+#    Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the
+#    distribution.
+#
+#    Neither the name of Texas Instruments Incorporated nor the names of
+#    its contributors may be used to endorse or promote products derived
+#    from this software without specific prior written permission.
+#
+#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+# Variables
+VALID_SHAS="sha256 sha384 sha512 sha224"
+OUTPUT=x509-firmware.bin
+TEMP_X509=x509-temp.cert
+CERT=certificate.bin
+RAND_KEY=eckey.pem
+VALID_ROM_CORES="r5 m3"
+VALID_DMSC_CORES="r5-00 r5-01 a53-00 a53-01 a53-10 a53-11"
+SHA=sha512
+CORE=m3
+LOADADDR=0x00040000
+VALID_MASTERS="rom dmsc"
+
+declare -A sha_oids
+sha_oids["sha256"]=2.16.840.1.101.3.4.2.1
+sha_oids["sha384"]=2.16.840.1.101.3.4.2.2
+sha_oids["sha512"]=2.16.840.1.101.3.4.2.3
+sha_oids["sha224"]=2.16.840.1.101.3.4.2.4
+
+declare -A core_ids
+core_ids["a53-00"]=0x20
+core_ids["a53-01"]=0x21
+core_ids["a53-10"]=0x22
+core_ids["a53-11"]=0x23
+core_ids["r5-00"]=0x01
+core_ids["r5-01"]=0x02
+
+gen_key() {
+       openssl ecparam -out $RAND_KEY -name prime256v1 -genkey
+       KEY=$RAND_KEY
+}
+
+declare -A options_help
+usage() {
+       if [ -n "$*" ]; then
+               echo "ERROR: $*"
+       fi
+       echo -n "Usage: $0 "
+       for option in "${!options_help[@]}"
+       do
+               arg=`echo ${options_help[$option]}|cut -d ':' -f1`
+               if [ -n "$arg" ]; then
+                       arg=" $arg"
+               fi
+               echo -n "[-$option$arg] "
+       done
+       echo
+       echo -e "\nWhere:"
+       for option in "${!options_help[@]}"
+       do
+               arg=`echo ${options_help[$option]}|cut -d ':' -f1`
+               txt=`echo ${options_help[$option]}|cut -d ':' -f2`
+               tb="\t\t\t"
+               if [ -n "$arg" ]; then
+                       arg=" $arg"
+                       tb="\t"
+               fi
+               echo -e "   -$option$arg:$tb$txt"
+       done
+       echo
+       echo "Examples of usage:-"
+       echo "# Generate x509 certificate with random key from elf"
+       echo "    CROSS_COMPILE=arm-linux-gnueabihf- $0 -b ti-sci-firmware-am6x.elf -o dmsc.bin -l 0x40000"
+       echo "# Generate x509 certificate with random key from bin"
+       echo "    $0 -b ti-sci-firmware-am6x.bin -o dmsc.bin -l 0x40000"
+       echo "# Example of signing the DMSC binary"
+       echo "    $0 -m rom -c m3 -b ti-sci-firmware-am6x.bin -o dmsc.bin -l 0x40000"
+       echo "# Example of signing the SPL binary"
+       echo "    $0 -m rom -c r5 -b spl/u-boot-spl.bin -o tiboot3.bin -l 0x41c00000"
+       echo "# Example of signing the ATF binary to run on A53"
+       echo "    $0 -m dmsc -c a53-00 -b bl31.bin -o atf.bin -l 0x70000000"
+}
+
+options_help[e]="elf_file:ELF file that needs to be signed"
+options_help[b]="bin_file:Bin file that needs to be signed"
+options_help[k]="key_file:file with key inside it. If not provided script generates a random key."
+options_help[o]="output_file:Name of the final output file. default x509-firmware.bin"
+options_help[c]="core:target core on which the image would be running. Default is m3. Valid option for rom are $VALID_ROM_CORES. Valid options for DMSC are $VALID_DMSC_CORES"
+options_help[d]=":Countersign DMSC firmware image. This signs a previously signed image for a second time."
+options_help[s]="sha_type:sha type to be used for certificate generation. Default is sha512. Valid option are $VALID_SHAS"
+options_help[l]="loadaddr: Target load address of the binary in hex. Default to $LOADADDR"
+options_help[m]="master: Master name for which the image is created. This master software parses the certificate and load the images accordingly. Default to rom. valid options are $VALID_MASTERS"
+
+while getopts "e:b:k:o:c:ds:l:m:h" opt
+do
+       case $opt in
+       e)
+               ELF=$OPTARG
+       ;;
+       b)
+               BIN=$OPTARG
+       ;;
+       k)
+               KEY=$OPTARG
+       ;;
+       o)
+               OUTPUT=$OPTARG
+       ;;
+       l)
+               LOADADDR=$OPTARG
+       ;;
+       s)
+               SHA=$OPTARG
+               sha_valid=0
+               for tsha in $VALID_SHAS
+               do
+                       if [ "$tsha" == "$SHA" ]; then
+                               sha_valid=1
+                       fi
+               done
+               if [ $sha_valid == 0 ]; then
+                       usage "Invalid sha input $SHA"
+                       exit 1
+               fi
+       ;;
+       c)
+               CORE=$OPTARG
+       ;;
+       d)
+               CERTTYPE=3      # CERT_TYPE_FIRMWARE_COUNTERSIGN
+       ;;
+       m)
+               MASTER=$OPTARG
+               master_valid=0
+               for vmaster in $VALID_MASTERS
+               do
+                       if [ "$vmaster" == "$MASTER" ]; then
+                               master_valid=1
+                       fi
+               done
+               if [ $master_valid == 0 ]; then
+                       usage "Invalid master input $MASTER"
+                       exit 1
+               fi
+       ;;
+       h)
+               usage
+               exit 0
+       ;;
+       \?)
+               usage "Invalid Option '-$OPTARG'"
+               exit 1
+       ;;
+       :)
+               usage "Option '-$OPTARG' Needs an argument."
+               exit 1
+       ;;
+       esac
+done
+
+if [ "$#" -eq 0 ]
+then
+       usage "Arguments missing"
+       exit 1
+fi
+
+if [ -z "$BIN" -a -z "$ELF" ]; then
+       usage "Either Input bin file or ELF file to sign"
+       exit 1
+fi
+
+if [ "$MASTER" == "dmsc" ]; then
+       VALID_CORES=$VALID_DMSC_CORES
+else
+       # Defaut to ROM image
+       VALID_CORES=$VALID_ROM_CORES
+       MASTER="rom"
+fi
+
+# Verify for valid core inputs
+core_valid=0
+for tcore in $VALID_CORES
+do
+       if [ "$tcore" == "$CORE" ]; then
+               core_valid=1
+       fi
+done
+if [ $core_valid == 0 ]; then
+       usage "Invalid target core $CORE"
+       exit 1
+fi
+
+# Generate random key if user doesn't provide a key
+if [ -z "$KEY" ]; then
+       gen_key
+fi
+
+if [ "$MASTER" == "dmsc" ]; then
+       BOOTCORE=${core_ids["$CORE"]}
+       BOOTCORE_OPTS_VER=$(printf "%01x" 1)
+       # Add input args option for SET and CLR flags.
+       BOOTCORE_OPTS_SETFLAG=$(printf "%08x" 0)
+       BOOTCORE_OPTS_CLRFLAG=$(printf "%08x" 0x100) # Clear FLAG_ARMV8_AARCH32
+       BOOTCORE_OPTS="0x$BOOTCORE_OPTS_VER$BOOTCORE_OPTS_SETFLAG$BOOTCORE_OPTS_CLRFLAG"
+       # Set the cert type to zero.
+       # We are not using public/private key store now
+       CERTTYPE=$(printf "0x%08x" 0)
+else
+       if [ "$CORE" == "m3" ]; then
+               if [ -z "$CERTTYPE" ]; then
+                       CERTTYPE=2      # CERT_TYPE_FIRMWARE_IMAGE_BIN
+               fi
+               BOOTCORE=0              # DMSC Controller (M3)
+               BOOTCORE_OPTS=32
+       else
+               CERTTYPE=1              # CERT_TYPE_PRIMARY_IMAGE_BIN
+               BOOTCORE=16             # MCU (R5)
+               BOOTCORE_OPTS=32
+       fi
+fi
+
+if [ -z "$BIN" ]; then
+       echo "Generating bin from elf $ELF"
+       BIN=firmware.bin
+       ${CROSS_COMPILE}objcopy -g -S --gap-fill 0x0 -O binary $ELF $BIN
+       if [ "$?" != "0" ]; then
+               echo "ERROR: Generating bin from $ELF failed. CROSS_COMPILE?"
+               exit 1
+       fi
+fi
+
+SHA_OID=${sha_oids["$SHA"]}
+SHA_VAL=`openssl dgst -$SHA -hex $BIN | sed -e "s/^.*= //g"`
+BIN_SIZE=`cat $BIN | wc -c`
+ADDR=`printf "%08x" $LOADADDR`
+
+# Generate x509 Template
+gen_template() {
+cat << 'EOF' > x509-template.txt
+ [ req ]
+ distinguished_name     = req_distinguished_name
+ x509_extensions        = v3_ca
+ prompt                 = no
+ dirstring_type         = nobmp
+
+ [ req_distinguished_name ]
+ C                      = US
+ ST                     = SC
+ L                      = New York
+ O                      = Texas Instruments, Inc.
+ OU                     = DSP
+ CN                     = Albert
+ emailAddress           = Albert@gt.ti.com
+
+ [ v3_ca ]
+ basicConstraints = CA:true
+ 1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq
+ 1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity
+ 1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
+# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption
+ 1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug
+
+ [ boot_seq ]
+ certType = INTEGER:TEST_CERT_TYPE
+ bootCore = INTEGER:TEST_BOOT_CORE
+ bootCoreOpts = INTEGER:TEST_BOOT_CORE_OPTS
+ destAddr = FORMAT:HEX,OCT:TEST_BOOT_ADDR
+ imageSize = INTEGER:TEST_IMAGE_LENGTH
+
+ [ image_integrity ]
+ shaType = OID:TEST_IMAGE_SHA_OID
+ shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL
+
+ [ swrv ]
+ swrv = INTEGER:0
+
+# [ encryption ]
+# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV
+# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS
+# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX
+# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT
+
+ [ debug ]
+ debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000
+ debugType = INTEGER:4
+ coreDbgEn = INTEGER:0
+ coreDbgSecEn = INTEGER:0
+EOF
+}
+
+gen_cert() {
+       echo "Certificate being generated :"
+       echo "  LOADADDR = 0x$ADDR"
+       echo "  IMAGE_SIZE = $BIN_SIZE"
+       echo "  CERT_TYPE = $CERTTYPE"
+       sed -e "s/TEST_IMAGE_LENGTH/$BIN_SIZE/" \
+               -e "s/TEST_IMAGE_SHA_OID/$SHA_OID/" \
+               -e "s/TEST_IMAGE_SHA_VAL/$SHA_VAL/" \
+               -e "s/TEST_CERT_TYPE/$CERTTYPE/" \
+               -e "s/TEST_BOOT_CORE_OPTS/$BOOTCORE_OPTS/" \
+               -e "s/TEST_BOOT_CORE/$BOOTCORE/" \
+               -e "s/TEST_BOOT_ADDR/$ADDR/" x509-template.txt > $TEMP_X509
+       openssl req -new -x509 -key $KEY -nodes -outform DER -out $CERT -config $TEMP_X509 -$SHA
+}
+
+gen_template
+gen_cert
+cat $CERT $BIN > $OUTPUT
+
+echo "SUCCESS: Image $OUTPUT generated."
+
+# Remove all intermediate files
+rm $TEMP_X509 $CERT x509-template.txt
+if [ "$KEY" == "$RAND_KEY" ]; then
+       rm $RAND_KEY
+fi
diff --git a/pm-cfg.c b/pm-cfg.c
new file mode 100644 (file)
index 0000000..ae8983f
--- /dev/null
+++ b/pm-cfg.c
@@ -0,0 +1,44 @@
+/*
+ * K3 System Firmware Power Management Configuration Data
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ *     Andreas Dannenberg <dannenberg@ti.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "common.h"
+
+const struct k3_boardcfg_pm am65_boardcfg_pm_data = {
+       /* boardcfg_abi_rev */
+       .rev = {
+               .boardcfg_abi_maj = 0x0,
+               .boardcfg_abi_min = 0x1,
+       },
+};
diff --git a/rm-cfg.c b/rm-cfg.c
new file mode 100644 (file)
index 0000000..90cb017
--- /dev/null
+++ b/rm-cfg.c
@@ -0,0 +1,484 @@
+/*
+ * K3 System Firmware Resource Management Configuration Data
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ *     Andreas Dannenberg <dannenberg@ti.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "common.h"
+
+const struct am65_boardcfg_rm_local am65_boardcfg_rm_data = {
+       .rm_boardcfg = {
+               /* boardcfg_abi_rev */
+               .rev = {
+                       .boardcfg_abi_maj = 0x0,
+                       .boardcfg_abi_min = 0x1,
+               },
+
+               /* boardcfg_rm_host_cfg */
+               .host_cfg = {
+                       .subhdr = {
+                               .magic = BOARDCFG_RM_HOST_CFG_MAGIC_NUM,
+                               .size = sizeof(struct boardcfg_rm_host_cfg),
+                       },
+                       .host_cfg_entries = {{ 0 } },
+               },
+
+               /* boardcfg_rm_resasg */
+               .resasg = {
+                       .subhdr = {
+                               .magic = BOARDCFG_RM_RESASG_MAGIC_NUM,
+                               .size = sizeof(struct boardcfg_rm_resasg),
+                       },
+                       .resasg_entries_size = AM65_BOARDCFG_RM_RESASG_ENTRIES *
+                                       sizeof(struct boardcfg_rm_resasg_entry),
+                       .reserved = 0,
+                       /* .resasg_entries is set via k3_boardcfg_rm_local */
+               },
+       },
+
+       /* This is actually part of .resasg */
+       .resasg_entries = {
+               {
+                       .start_resource = 16,
+                       .num_resource = 240,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMASS_IA0,
+                                      RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_VINT),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 16,
+                       .num_resource = 4592,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMASS_IA0,
+                                      RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_SEVI),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 32768,
+                       .num_resource = 512,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMASS_IA0,
+                                      RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_MEVI),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 36864,
+                       .num_resource = 512,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMASS_IA0,
+                                      RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_GEVI),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 64,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MODSS_IA0,
+                                       RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_VINT),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 20480,
+                       .num_resource = 1024,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MODSS_IA0,
+                                       RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_SEVI),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 64,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MODSS_IA1,
+                                       RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_VINT),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 22528,
+                       .num_resource = 1024,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MODSS_IA1,
+                                       RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_SEVI),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 8,
+                       .num_resource = 248,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
+                                       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_VINT),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 16392,
+                       .num_resource = 992,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
+                                       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_SEVI),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 17384,
+                       .num_resource = 536,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
+                                       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_SEVI),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 34816,
+                       .num_resource = 128,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
+                                       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_MEVI),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 39936,
+                       .num_resource = 256,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
+                                       RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_GEVI),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 43008,
+                       .num_resource = 4,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MCRC,
+                                            RESASG_SUBTYPE_MAIN_NAV_MCRC_LEVI),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 43136,
+                       .num_resource = 4,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_MCRC,
+                                            RESASG_SUBTYPE_MCU_NAV_MCRC_LEVI),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 49152,
+                       .num_resource = 1024,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
+                                        RESASG_SUBTYPE_MAIN_NAV_UDMAP_TRIGGER),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 1,
+                       .num_resource = 7,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
+                                       RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_HCHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 8,
+                       .num_resource = 112,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
+                                        RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_CHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 120,
+                       .num_resource = 32,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
+                                       RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_ECHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 2,
+                       .num_resource = 6,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
+                                       RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_HCHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 8,
+                       .num_resource = 142,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
+                                        RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_CHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 150,
+                       .num_resource = 150,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
+                                 RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_FLOW_COMMON),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 1,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
+                               RESASG_SUBTYPE_MAIN_NAV_UDMAP_INVALID_FLOW_OES),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 56320,
+                       .num_resource = 256,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
+                                         RESASG_SUBTYPE_MCU_NAV_UDMAP_TRIGGER),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 2,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
+                                        RESASG_SUBTYPE_MCU_NAV_UDMAP_TX_HCHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 2,
+                       .num_resource = 46,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
+                                         RESASG_SUBTYPE_MCU_NAV_UDMAP_TX_CHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 2,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
+                                        RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_HCHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 2,
+                       .num_resource = 46,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
+                                         RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_CHAN),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 48,
+                       .num_resource = 48,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
+                                  RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_FLOW_COMMON),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 1,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
+                                RESASG_SUBTYPE_MCU_NAV_UDMAP_INVALID_FLOW_OES),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 61440,
+                       .num_resource = 64,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MSMC,
+                                            RESASG_SUBTYPE_MSMC_DRU),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 1,
+                       .num_resource = 151,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_RA,
+                                     RESASG_SUBTYPE_MAIN_NAV_RA_RING_UDMAP_TX),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 153,
+                       .num_resource = 149,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_RA,
+                                     RESASG_SUBTYPE_MAIN_NAV_RA_RING_UDMAP_RX),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 304,
+                       .num_resource = 464,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_RA,
+                                           RESASG_SUBTYPE_MAIN_NAV_RA_RING_GP),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 1,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_RA,
+                                         RESASG_SUBTYPE_MAIN_NAV_RA_ERROR_OES),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 48,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_RA,
+                                      RESASG_SUBTYPE_MCU_NAV_RA_RING_UDMAP_TX),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 48,
+                       .num_resource = 48,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_RA,
+                                      RESASG_SUBTYPE_MCU_NAV_RA_RING_UDMAP_RX),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 96,
+                       .num_resource = 160,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_RA,
+                                            RESASG_SUBTYPE_MCU_NAV_RA_RING_GP),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 0,
+                       .num_resource = 1,
+                       .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_RA,
+                                          RESASG_SUBTYPE_MCU_NAV_RA_ERROR_OES),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 80,
+                       .num_resource = 48,
+                       .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
+                                         RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET0),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 392,
+                       .num_resource = 32,
+                       .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
+                                            RESASG_SUBTYPE_GIC_IRQ_MAIN_GPIO),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 448,
+                       .num_resource = 50,
+                       .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
+                                         RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET1),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 498,
+                       .num_resource = 6,
+                       .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
+                                         RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET1),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 544,
+                       .num_resource = 16,
+                       .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
+                                            RESASG_SUBTYPE_GIC_IRQ_COMP_EVT),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 712,
+                       .num_resource = 16,
+                       .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
+                                            RESASG_SUBTYPE_GIC_IRQ_WKUP_GPIO),
+                       .host_id = HOST_ID_A53_2,
+               },
+               {
+                       .start_resource = 68,
+                       .num_resource = 28,
+                       .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
+                                         RESASG_SUBTYPE_PULSAR_C0_IRQ_MCU_NAV),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 124,
+                       .num_resource = 16,
+                       .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
+                                       RESASG_SUBTYPE_PULSAR_C0_IRQ_WKUP_GPIO),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 160,
+                       .num_resource = 64,
+                       .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
+                                    RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_LVL),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 224,
+                       .num_resource = 48,
+                       .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
+                                    RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_PLS),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 68,
+                       .num_resource = 28,
+                       .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
+                                         RESASG_SUBTYPE_PULSAR_C1_IRQ_MCU_NAV),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 124,
+                       .num_resource = 16,
+                       .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
+                                       RESASG_SUBTYPE_PULSAR_C1_IRQ_WKUP_GPIO),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 160,
+                       .num_resource = 64,
+                       .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
+                                    RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_LVL),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 224,
+                       .num_resource = 48,
+                       .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
+                                    RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_PLS),
+                       .host_id = HOST_ID_R5_0,
+               },
+               {
+                       .start_resource = 46,
+                       .num_resource = 8,
+                       .type = RESASG_UTYPE(RESASG_TYPE_ICSSG0_IRQ,
+                                           RESASG_SUBTYPE_ICSSG0_IRQ_MAIN_NAV),
+                       .host_id = HOST_ID_ICSSG_0,
+               },
+               {
+                       .start_resource = 88,
+                       .num_resource = 8,
+                       .type = RESASG_UTYPE(RESASG_TYPE_ICSSG0_IRQ,
+                                          RESASG_SUBTYPE_ICSSG0_IRQ_MAIN_GPIO),
+                       .host_id = HOST_ID_ICSSG_0,
+               },
+               {
+                       .start_resource = 46,
+                       .num_resource = 8,
+                       .type = RESASG_UTYPE(RESASG_TYPE_ICSSG1_IRQ,
+                                           RESASG_SUBTYPE_ICSSG1_IRQ_MAIN_NAV),
+                       .host_id = HOST_ID_ICSSG_1,
+               },
+               {
+                       .start_resource = 88,
+                       .num_resource = 8,
+                       .type = RESASG_UTYPE(RESASG_TYPE_ICSSG1_IRQ,
+                                          RESASG_SUBTYPE_ICSSG1_IRQ_MAIN_GPIO),
+                       .host_id = HOST_ID_ICSSG_1,
+               },
+               {
+                       .start_resource = 46,
+                       .num_resource = 8,
+                       .type = RESASG_UTYPE(RESASG_TYPE_ICSSG2_IRQ,
+                                           RESASG_SUBTYPE_ICSSG2_IRQ_MAIN_NAV),
+                       .host_id = HOST_ID_ICSSG_2,
+               },
+               {
+                       .start_resource = 88,
+                       .num_resource = 8,
+                       .type = RESASG_UTYPE(RESASG_TYPE_ICSSG2_IRQ,
+                                          RESASG_SUBTYPE_ICSSG2_IRQ_MAIN_GPIO),
+                       .host_id = HOST_ID_ICSSG_2,
+               },
+       },
+};
diff --git a/sec-cfg.c b/sec-cfg.c
new file mode 100644 (file)
index 0000000..8541e8f
--- /dev/null
+++ b/sec-cfg.c
@@ -0,0 +1,62 @@
+/*
+ * K3 System Firmware Security Configuration Data
+ *
+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ *     Andreas Dannenberg <dannenberg@ti.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "common.h"
+
+const struct k3_boardcfg_security am65_boardcfg_security_data = {
+       /* boardcfg_abi_rev */
+       .rev = {
+               .boardcfg_abi_maj = 0x0,
+               .boardcfg_abi_min = 0x1,
+       },
+
+       /* boardcfg_proc_acl */
+       .processor_acl_list = {
+               .subhdr = {
+                       .magic = BOARDCFG_PROC_ACL_MAGIC_NUM,
+                       .size = sizeof(struct boardcfg_proc_acl),
+               },
+               .proc_acl_entries = {{ 0 } },
+       },
+
+       /* boardcfg_host_hierarchy */
+       .host_hierarchy = {
+                       .subhdr = {
+                               .magic = BOARDCFG_HOST_HIERARCHY_MAGIC_NUM,
+                               .size = sizeof(struct boardcfg_host_hierarchy),
+                       },
+                       .host_hierarchy_entries = {{ 0 } },
+       },
+};