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raw | patch | inline | side by side (parent: ef6f0b6)
author | Vignesh Raghavendra <vigneshr@ti.com> | |
Fri, 19 Jul 2019 12:51:26 +0000 (18:21 +0530) | ||
committer | Andreas Dannenberg <dannenberg@ti.com> | |
Wed, 31 Jul 2019 17:52:44 +0000 (12:52 -0500) |
ROM boots up MCU R5 in secure context and R5 SPL continues to run in the
same context. In order for R5 SPL to use DMA (e.g: with OSPI) add MCU
NAVSS resources with MCU R5 secure host ID that is used by R5 SPL.
Resources allocated are same as those allocated for non secure context.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
same context. In order for R5 SPL to use DMA (e.g: with OSPI) add MCU
NAVSS resources with MCU R5 secure host ID that is used by R5 SPL.
Resources allocated are same as those allocated for non secure context.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
soc/j721e/evm/rm-cfg.c | patch | blob | history | |
soc/j721e/evm/sysfw_img_cfg.h | patch | blob | history |
diff --git a/soc/j721e/evm/rm-cfg.c b/soc/j721e/evm/rm-cfg.c
index 5d69018e6b98f0b2ce686930f8700b312d021109..c149c56f5af85f7f656825f717134477e1447849 100644 (file)
--- a/soc/j721e/evm/rm-cfg.c
+++ b/soc/j721e/evm/rm-cfg.c
RESASG_SUBTYPE_UDMAP_TX_CHAN),
.host_id = HOST_ID_MCU_0_R5_0,
},
+ {
+ .start_resource = 25,
+ .num_resource = 2,
+ .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
+ RESASG_SUBTYPE_UDMAP_TX_CHAN),
+ .host_id = HOST_ID_MCU_0_R5_1,
+ },
{
.start_resource = 25,
.num_resource = 2,
RESASG_SUBTYPE_UDMAP_RX_CHAN),
.host_id = HOST_ID_MCU_0_R5_0,
},
+ {
+ .start_resource = 25,
+ .num_resource = 2,
+ .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
+ RESASG_SUBTYPE_UDMAP_RX_CHAN),
+ .host_id = HOST_ID_MCU_0_R5_1,
+ },
{
.start_resource = 25,
.num_resource = 2,
RESASG_SUBTYPE_RA_UDMAP_TX),
.host_id = HOST_ID_MCU_0_R5_0,
},
+ {
+ .start_resource = 25,
+ .num_resource = 2,
+ .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0,
+ RESASG_SUBTYPE_RA_UDMAP_TX),
+ .host_id = HOST_ID_MCU_0_R5_1,
+ },
{
.start_resource = 25,
.num_resource = 2,
RESASG_SUBTYPE_RA_UDMAP_RX),
.host_id = HOST_ID_MCU_0_R5_0,
},
+ {
+ .start_resource = 73,
+ .num_resource = 2,
+ .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0,
+ RESASG_SUBTYPE_RA_UDMAP_RX),
+ .host_id = HOST_ID_MCU_0_R5_1,
+ },
{
.start_resource = 73,
.num_resource = 2,
RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON),
.host_id = HOST_ID_MCU_0_R5_0,
},
+ {
+ .start_resource = 68,
+ .num_resource = 4,
+ .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
+ RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON),
+ .host_id = HOST_ID_MCU_0_R5_1,
+ },
{
.start_resource = 68,
.num_resource = 4,
RESASG_SUBTYPE_RA_GP),
.host_id = HOST_ID_MCU_0_R5_0,
},
+ {
+ .start_resource = 156,
+ .num_resource = 12,
+ .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0,
+ RESASG_SUBTYPE_RA_GP),
+ .host_id = HOST_ID_MCU_0_R5_1,
+ },
{
.start_resource = 156,
.num_resource = 12,
index b1f6afe3effa3ec67d05326a1edfb0743177ebf7..5a626875a2ded403dac02a549d7890fe6062fa7b 100644 (file)
#ifndef SYSFW_IMG_CFG_H
#define SYSFW_IMG_CFG_H
-#define BOARDCFG_RM_RESASG_ENTRIES 252
+#define BOARDCFG_RM_RESASG_ENTRIES 258
#endif /* SYSFW_IMG_CFG_H */