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raw | patch | inline | side by side (parent: 8641afa)
raw | patch | inline | side by side (parent: 8641afa)
author | Sam Nelson <sam.nelson@ti.com> | |
Tue, 23 Oct 2018 15:52:05 +0000 (10:52 -0500) | ||
committer | Andreas Dannenberg <dannenberg@ti.com> | |
Mon, 29 Oct 2018 16:56:46 +0000 (11:56 -0500) |
Partitioning the MCU R5F IRQs to be distributed between R5F context 0
and context 1.
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
and context 1.
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
rm-cfg.c | patch | blob | history |
diff --git a/rm-cfg.c b/rm-cfg.c
index 90cb017abf04949dd6a5532ddf248799549ad9a3..9adaf311f3e694dde50a40f1e8af4c0dde64b393 100644 (file)
--- a/rm-cfg.c
+++ b/rm-cfg.c
},
{
.start_resource = 160,
- .num_resource = 64,
+ .num_resource = 32,
.type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_LVL),
.host_id = HOST_ID_R5_0,
.host_id = HOST_ID_R5_0,
},
{
- .start_resource = 160,
- .num_resource = 64,
+ .start_resource = 192,
+ .num_resource = 32,
.type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_LVL),
- .host_id = HOST_ID_R5_0,
+ .host_id = HOST_ID_R5_1,
},
{
.start_resource = 224,