j721e: am65x: sec-cfg: Add otp_config section

Update the common.h headers to add new defines from SYSFW 2019.12.

Starting from SYSFW v2019.12, an otp_config section is mandatory in
the security config. Otherwise the boot fails.

Fix this by adding a section for opt_config with no other host
having permission to OTP array.

Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>

diff --git a/include/common.h b/include/common.h
index 83c900cab1e986bd6b551ee36a99324668fa0866..03e88e2a938df28377b90391daccb570f5683063 100644 (file)
--- a/include/common.h
+++ b/include/common.h
@@ -1,7 +1,7 @@
 /*
  * K3 System Firmware Board Configuration Data Structures
  *
- * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com/
  *     Andreas Dannenberg <dannenberg@ti.com>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -79,6 +79,7 @@ typedef u8 ftbool;
 #define BOARDCFG_RESASG_MAGIC_NUM              0x4C41
 #define BOARDCFG_DBG_CFG_MAGIC_NUM             0x020C
 #define BOARDCFG_PMIC_CFG_MAGIC_NUM            0x3172
+#define BOARDCFG_OTP_CFG_MAGIC_NUM             0x4081
 
 struct boardcfg_substructure_header {
        u16     magic;
@@ -217,10 +218,24 @@ struct boardcfg_host_hierarchy {
                                 host_hierarchy_entries[HOST_HIERARCHY_ENTRIES];
 } __attribute__((__packed__));
 
+struct boardcfg_extended_otp_entry {
+       u8      host_id;
+       u8      host_perms;
+} __attribute__((__packed__));
+
+#define MAX_NUM_EXT_OTP_MMRS                   32
+
+struct boardcfg_extended_otp {
+       struct boardcfg_substructure_header     subhdr;
+       struct boardcfg_extended_otp_entry      otp_entry[MAX_NUM_EXT_OTP_MMRS];
+       u8                                      write_host_id;
+} __attribute__((__packed__));
+
 struct boardcfg_security {
        struct boardcfg_abi_rev                 rev;
        struct boardcfg_proc_acl                processor_acl_list;
        struct boardcfg_host_hierarchy          host_hierarchy;
+       struct boardcfg_extended_otp            otp_config;
 } __attribute__((__packed__));
 
 /**

diff --git a/soc/am65x/evm/sec-cfg.c b/soc/am65x/evm/sec-cfg.c
index 055eb8eda9371df89dcd06a4cbfa06fa0f15e52f..291b2af65ccc5d90ae5bf8cc99d4738434c0dcbb 100644 (file)
--- a/soc/am65x/evm/sec-cfg.c
+++ b/soc/am65x/evm/sec-cfg.c
@@ -1,7 +1,7 @@
 /*
  * K3 System Firmware Security Configuration Data
  *
- * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com/
  *     Andreas Dannenberg <dannenberg@ti.com>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -59,4 +59,16 @@ const struct boardcfg_security am65_boardcfg_security_data = {
                        },
                        .host_hierarchy_entries = {{ 0 } },
        },
+
+       /* OTP access configuration */
+       .otp_config = {
+               .subhdr = {
+                       .magic = BOARDCFG_OTP_CFG_MAGIC_NUM,
+                       .size = sizeof(struct boardcfg_extended_otp),
+               },
+               /* Host ID 0 is DMSC. This means no host has write access to OTP array */
+               .write_host_id = 0,
+               /* This is an array with 32 entries */
+               .otp_entry = {{ 0 } },
+       },
 };

diff --git a/soc/j721e/evm/sec-cfg.c b/soc/j721e/evm/sec-cfg.c
index b628d8b340da61ff9a14e7f09fd0c210edbe3e21..4392a318897356d2b98500113460fe4a4ae08596 100644 (file)
--- a/soc/j721e/evm/sec-cfg.c
+++ b/soc/j721e/evm/sec-cfg.c
@@ -1,7 +1,7 @@
 /*
  * K3 System Firmware Security Configuration Data
  *
- * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2019-2020 Texas Instruments Incorporated - http://www.ti.com/
  *     Andreas Dannenberg <dannenberg@ti.com>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -59,4 +59,16 @@ const struct boardcfg_security j721e_boardcfg_security_data = {
                        },
                        .host_hierarchy_entries = {{ 0 } },
        },
+
+       /* OTP access configuration */
+       .otp_config = {
+               .subhdr = {
+                       .magic = BOARDCFG_OTP_CFG_MAGIC_NUM,
+                       .size = sizeof(struct boardcfg_extended_otp),
+               },
+               /* Host ID 0 is DMSC. This means no host has write access to OTP array */
+               .write_host_id = 0,
+               /* This is an array with 32 entries */
+               .otp_entry = {{ 0 } },
+       },
 };