]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - processor-firmware/ti-amx3-cm3-pm-firmware.git/commitdiff
CM3: Move state_data into it's own file
authorRuss Dill <Russ.Dill@ti.com>
Tue, 20 Aug 2013 05:58:58 +0000 (22:58 -0700)
committerRuss Dill <Russ.Dill@ti.com>
Fri, 23 Aug 2013 11:19:19 +0000 (04:19 -0700)
This reduces clutter in prcm_core.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
src/include/low_power.h
src/include/pm_state_data.h [new file with mode: 0644]
src/pm_services/pm_handlers.c
src/pm_services/pm_state_data.c [new file with mode: 0644]
src/pm_services/powerdomain.c
src/pm_services/prcm_core.c
src/sys_exec/msg.c

index cb1c5a12f5e119fa934b2cee2e9e89f5c51235f4..e56fd99e060a95ae97f20d9233569ce84eba110b 100644 (file)
 #define RTC_TIMEOUT_DEFAULT    0x2
 #define RTC_TIMEOUT_MAX                0xf
 
-struct rtc_data {
-       unsigned int rtc_timeout_val :4;        /* Delay for RTC alarm timeout. Default = 2secs */
-};
-
-struct deep_sleep_data {
-       unsigned int mosc_state :1;             /* MOSC to be kept on (1) or off (0) */
-       unsigned int deepsleep_count :16;       /* Count of how many OSC clocks needs to be seen \
-                                               before exiting deep sleep mode */
-
-       unsigned int vdd_mpu_val :15;           /* If vdd_mpu is to be lowered, vdd_mpu in mV */
-
-       unsigned int pd_mpu_state :2;           /* Powerstate of PD_MPU */
-       unsigned int pd_mpu_ram_ret_state :1;   /* Sabertooth RAM in retention state */
-       unsigned int pd_mpu_l1_ret_state :1;    /* L1 memory in retention state */
-       unsigned int pd_mpu_l2_ret_state :1;    /* L2 memory in retention state */
-       unsigned int res1 :2;
-
-       unsigned int pd_per_state :2;           /* Powerstate of PD_PER */
-       unsigned int pd_per_icss_mem_ret_state :1; /* ICSS memory in retention state */
-       unsigned int pd_per_mem_ret_state :1;   /* Other memories in retention state */
-       unsigned int pd_per_ocmc_ret_state :1;  /* OCMC memory in retention state */
-       unsigned int pd_per_ocmc2_ret_state :1; /* OCMC bank 2 in retention state */
-       unsigned int res2 :5;
-
-       unsigned int wake_sources :13;          /* Wake sources */
-                                               /* USB, I2C0, RTC_ALARM, TIMER1 \
-                                                  UART0, GPIO0_WAKE0, GPIO0_WAKE1, \
-                                                  WDT1, ADTSC, RTC_TIMER, USBWOUT0, \
-                                                  MPU, USBWOUT1 */
-       unsigned int reserved :1;               /* Internal use */
-};
-
-union state_data {
-       struct deep_sleep_data deep_sleep;
-       struct rtc_data rtc;
-       struct {
-               unsigned int param1;
-               unsigned int param2;
-       } raw;
-};
-
 int disable_master_oscillator(void);
 int enable_master_oscillator(void);
 
diff --git a/src/include/pm_state_data.h b/src/include/pm_state_data.h
new file mode 100644 (file)
index 0000000..1408883
--- /dev/null
@@ -0,0 +1,66 @@
+/*
+ * AM33XX-CM3 firmware
+ *
+ * Cortex-M3 (CM3) firmware for power management on Texas Instruments' AM33XX series of SoCs
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  This software is licensed under the  standard terms and conditions in the Texas Instruments  Incorporated
+ *  Technology and Software Publicly Available Software License Agreement , a copy of which is included in the
+ *  software download.
+*/
+
+#ifndef __PM_STATE_DATA_H__
+#define __PM_STATE_DATA_H__
+
+struct rtc_data {
+       unsigned int rtc_timeout_val :4;        /* Delay for RTC alarm timeout. Default = 2secs */
+};
+
+struct deep_sleep_data {
+       unsigned int mosc_state :1;             /* MOSC to be kept on (1) or off (0) */
+       unsigned int deepsleep_count :16;       /* Count of how many OSC clocks needs to be seen \
+                                               before exiting deep sleep mode */
+
+       unsigned int vdd_mpu_val :15;           /* If vdd_mpu is to be lowered, vdd_mpu in mV */
+
+       unsigned int pd_mpu_state :2;           /* Powerstate of PD_MPU */
+       unsigned int pd_mpu_ram_ret_state :1;   /* Sabertooth RAM in retention state */
+       unsigned int pd_mpu_l1_ret_state :1;    /* L1 memory in retention state */
+       unsigned int pd_mpu_l2_ret_state :1;    /* L2 memory in retention state */
+       unsigned int res1 :2;
+
+       unsigned int pd_per_state :2;           /* Powerstate of PD_PER */
+       unsigned int pd_per_icss_mem_ret_state :1; /* ICSS memory in retention state */
+       unsigned int pd_per_mem_ret_state :1;   /* Other memories in retention state */
+       unsigned int pd_per_ocmc_ret_state :1;  /* OCMC memory in retention state */
+       unsigned int pd_per_ocmc2_ret_state :1; /* OCMC bank 2 in retention state */
+       unsigned int res2 :5;
+
+       unsigned int wake_sources :13;          /* Wake sources */
+                                               /* USB, I2C0, RTC_ALARM, TIMER1 \
+                                                  UART0, GPIO0_WAKE0, GPIO0_WAKE1, \
+                                                  WDT1, ADTSC, RTC_TIMER, USBWOUT0, \
+                                                  MPU, USBWOUT1 */
+       unsigned int reserved :1;               /* Internal use */
+};
+
+union state_data {
+       struct deep_sleep_data deep_sleep;
+       struct rtc_data rtc;
+       struct {
+               unsigned int param1;
+               unsigned int param2;
+       } raw;
+};
+
+extern union state_data rtc_mode_data;
+extern union state_data standby_data;
+extern union state_data ds0_data;
+extern union state_data ds0_data_hs;
+extern union state_data ds1_data;
+extern union state_data ds1_data_hs;
+extern union state_data ds2_data;
+extern union state_data idle_data;
+
+#endif
index ee7f7a1e2340f4ae1642c2d214feee3dda60002f..c3405c9f83631be039a1e539d5335bfe64ce36ad 100644 (file)
@@ -22,6 +22,7 @@
 #include <powerdomain.h>
 #include <dpll.h>
 #include <ldo.h>
+#include <pm_state_data.h>
 
 /* Enter RTC mode */
 void a8_lp_rtc_handler(struct cmd_data *data)
diff --git a/src/pm_services/pm_state_data.c b/src/pm_services/pm_state_data.c
new file mode 100644 (file)
index 0000000..566c965
--- /dev/null
@@ -0,0 +1,129 @@
+/*
+ * AM33XX-CM3 firmware
+ *
+ * Cortex-M3 (CM3) firmware for power management on Texas Instruments' AM33XX series of SoCs
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *  This software is licensed under the  standard terms and conditions in the Texas Instruments  Incorporated
+ *  Technology and Software Publicly Available Software License Agreement , a copy of which is included in the
+ *  software download.
+*/
+
+#include <powerdomain.h>
+#include <low_power.h>
+#include <pm_state_data.h>
+
+union state_data rtc_mode_data = {
+       .rtc = {
+               .rtc_timeout_val                = RTC_TIMEOUT_DEFAULT
+       },
+};
+
+union state_data ds0_data = {
+       .deep_sleep = {
+               .mosc_state                     = MOSC_OFF,
+               .deepsleep_count                = DS_COUNT_DEFAULT,
+
+               .pd_mpu_state                   = PD_OFF,
+               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_OFF,
+               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
+               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
+
+               .pd_per_state                   = PD_RET,
+               .pd_per_icss_mem_ret_state      = MEM_BANK_RET_ST_OFF,
+               .pd_per_mem_ret_state           = MEM_BANK_RET_ST_OFF,
+               .pd_per_ocmc_ret_state          = MEM_BANK_RET_ST_RET,
+
+               .wake_sources                   = WAKE_ALL,
+       },
+};
+
+/* In case of HS devices MPU RAM must be held in retention */
+union state_data ds0_data_hs = {
+       .deep_sleep = {
+               .mosc_state                     = MOSC_OFF,
+               .deepsleep_count                = DS_COUNT_DEFAULT,
+
+               .pd_mpu_state                   = PD_RET,
+               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_RET,
+               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
+               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
+
+               .pd_per_state                   = PD_RET,
+               .pd_per_icss_mem_ret_state      = MEM_BANK_RET_ST_OFF,
+               .pd_per_mem_ret_state           = MEM_BANK_RET_ST_OFF,
+               .pd_per_ocmc_ret_state          = MEM_BANK_RET_ST_RET,
+
+               .wake_sources                   = WAKE_ALL,
+       },
+};
+
+union state_data ds1_data = {
+       .deep_sleep = {
+               .mosc_state                     = MOSC_OFF,
+               .deepsleep_count                = DS_COUNT_DEFAULT,
+
+               .pd_mpu_state                   = PD_OFF,
+               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_OFF,
+               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
+               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
+
+               .pd_per_state                   = PD_ON,
+
+               .wake_sources                   = WAKE_ALL,
+       },
+};
+
+/* In case of HS devices MPU RAM must be held in retention */
+union state_data ds1_data_hs = {
+       .deep_sleep = {
+               .mosc_state                     = MOSC_OFF,
+               .deepsleep_count                = DS_COUNT_DEFAULT,
+
+               .pd_mpu_state                   = PD_RET,
+               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_RET,
+               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
+               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
+
+               .pd_per_state                   = PD_ON,
+
+               .wake_sources                   = WAKE_ALL,
+       },
+};
+
+union state_data ds2_data = {
+       .deep_sleep = {
+               .mosc_state                     = MOSC_OFF,
+               .deepsleep_count                = DS_COUNT_DEFAULT,
+
+               .pd_mpu_state                   = PD_ON,
+
+               .pd_per_state                   = PD_ON,
+
+               .wake_sources                   = WAKE_ALL,
+       },
+};
+
+union state_data standby_data = {
+       .deep_sleep = {
+               .mosc_state                     = MOSC_ON,
+               .deepsleep_count                = DS_COUNT_DEFAULT,
+
+               .pd_mpu_state                   = PD_OFF,
+               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_OFF,
+               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
+               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
+
+               .wake_sources                   = WAKE_ALL | MPU_WAKE,
+       },
+};
+
+union state_data idle_data = {
+       .deep_sleep = {
+               .mosc_state                     = MOSC_ON,
+               .pd_mpu_state                   = PD_ON,
+               .pd_per_state                   = PD_ON,
+               .wake_sources                   = MPU_WAKE,
+       },
+};
index 2dbe206cbfec59a949ed709239bde3734471d95a..85c42b822e55cf99cc90c4ab93725cac0445f7b9 100644 (file)
@@ -13,6 +13,7 @@
 #include <device_am335x.h>
 #include <low_power.h>
 #include <system_am335.h>
+#include <pm_state_data.h>
 #include <powerdomain.h>
 #include <powerdomain_335x.h>
 #include <powerdomain_43xx.h>
index b4f3e439bfca0fa9c90d71068c03d1cb6e8ac27b..156bc965e3780fce7cb070553ac798db2183ba7f 100644 (file)
 #include <cm3.h>
 #include <device_am335x.h>
 #include <low_power.h>
-#include <prcm.h>
-#include <prmam335x.h>
-#include <prm43xx.h>
 #include <system_am335.h>
-#include <clockdomain.h>
 #include <hwmod.h>
 #include <powerdomain.h>
+#include <clockdomain.h>
 #include <dpll.h>
 #include <ddr.h>
 #include <ldo.h>
 
-union state_data rtc_mode_data = {
-       .rtc = {
-               .rtc_timeout_val                = RTC_TIMEOUT_DEFAULT
-       },
-};
-
-union state_data ds0_data = {
-       .deep_sleep = {
-               .mosc_state                     = MOSC_OFF,
-               .deepsleep_count                = DS_COUNT_DEFAULT,
-
-               .pd_mpu_state                   = PD_OFF,
-               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_OFF,
-               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
-               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
-
-               .pd_per_state                   = PD_RET,
-               .pd_per_icss_mem_ret_state      = MEM_BANK_RET_ST_OFF,
-               .pd_per_mem_ret_state           = MEM_BANK_RET_ST_OFF,
-               .pd_per_ocmc_ret_state          = MEM_BANK_RET_ST_RET,
-
-               .wake_sources                   = WAKE_ALL,
-       },
-};
-
-/* In case of HS devices MPU RAM must be held in retention */
-union state_data ds0_data_hs = {
-       .deep_sleep = {
-               .mosc_state                     = MOSC_OFF,
-               .deepsleep_count                = DS_COUNT_DEFAULT,
-
-               .pd_mpu_state                   = PD_RET,
-               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_RET,
-               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
-               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
-
-               .pd_per_state                   = PD_RET,
-               .pd_per_icss_mem_ret_state      = MEM_BANK_RET_ST_OFF,
-               .pd_per_mem_ret_state           = MEM_BANK_RET_ST_OFF,
-               .pd_per_ocmc_ret_state          = MEM_BANK_RET_ST_RET,
-
-               .wake_sources                   = WAKE_ALL,
-       },
-};
-
-union state_data ds1_data = {
-       .deep_sleep = {
-               .mosc_state                     = MOSC_OFF,
-               .deepsleep_count                = DS_COUNT_DEFAULT,
-
-               .pd_mpu_state                   = PD_OFF,
-               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_OFF,
-               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
-               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
-
-               .pd_per_state                   = PD_ON,
-
-               .wake_sources                   = WAKE_ALL,
-       },
-};
-
-/* In case of HS devices MPU RAM must be held in retention */
-union state_data ds1_data_hs = {
-       .deep_sleep = {
-               .mosc_state                     = MOSC_OFF,
-               .deepsleep_count                = DS_COUNT_DEFAULT,
-
-               .pd_mpu_state                   = PD_RET,
-               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_RET,
-               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
-               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
-
-               .pd_per_state                   = PD_ON,
-
-               .wake_sources                   = WAKE_ALL,
-       },
-};
-
-union state_data ds2_data = {
-       .deep_sleep = {
-               .mosc_state                     = MOSC_OFF,
-               .deepsleep_count                = DS_COUNT_DEFAULT,
-
-               .pd_mpu_state                   = PD_ON,
-
-               .pd_per_state                   = PD_ON,
-
-               .wake_sources                   = WAKE_ALL,
-       },
-};
-
-union state_data standby_data = {
-       .deep_sleep = {
-               .mosc_state                     = MOSC_ON,
-               .deepsleep_count                = DS_COUNT_DEFAULT,
-
-               .pd_mpu_state                   = PD_OFF,
-               .pd_mpu_ram_ret_state           = MEM_BANK_RET_ST_OFF,
-               .pd_mpu_l1_ret_state            = MEM_BANK_RET_ST_OFF,
-               .pd_mpu_l2_ret_state            = MEM_BANK_RET_ST_OFF,
-
-               .wake_sources                   = WAKE_ALL | MPU_WAKE,
-       },
-};
-
-union state_data idle_data = {
-       .deep_sleep = {
-               .mosc_state                     = MOSC_ON,
-               .pd_mpu_state                   = PD_ON,
-               .pd_per_state                   = PD_ON,
-               .wake_sources                   = MPU_WAKE,
-       },
-};
-
 /* Clear out the global variables here */
 void pm_reset(void)
 {
index b4b37995eb135250a8960f3ff24c9e79224ada23..3eb0e9d2d6c5e950806c0a600fd7802a65de7114 100644 (file)
 #include <device_am335x.h>
 #include <low_power.h>
 #include <system_am335.h>
-
-extern union state_data rtc_mode_data;
-extern union state_data standby_data;
-extern union state_data ds0_data;
-extern union state_data ds0_data_hs;
-extern union state_data ds1_data;
-extern union state_data ds1_data_hs;
-extern union state_data ds2_data;
-extern union state_data idle_data;
+#include <pm_state_data.h>
 
 static union state_data custom_state_data;