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raw | patch | inline | side by side (parent: 09a1ca8)
author | Russ Dill <Russ.Dill@ti.com> | |
Tue, 20 Aug 2013 13:55:12 +0000 (06:55 -0700) | ||
committer | Russ Dill <Russ.Dill@ti.com> | |
Fri, 23 Aug 2013 11:19:21 +0000 (04:19 -0700) |
Collect together the function prototypes, structs, and macros associated with
msg.c into an msg.h header.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
msg.c into an msg.h header.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
14 files changed:
index a70ba19e56c9726326f2b5c30544f34bde958d03..8716f68a20c563546887192b1792b5b37fc6426c 100644 (file)
#include <cm3.h>
#include <device_am335x.h>
#include <system_am335.h>
+#include <msg.h>
/*
* PRCM_M3_IRQ1: Triggered for events like PLL needs recalibration,
index 1d94daa79ae645a5eea118b13a8ba761101244d2..3e533fc589d22f5a917f2c26befa8df547c1bfe0 100644 (file)
#define GPIO_CLEARDATAOUT 0x0190
#define GPIO_SETDATAOUT 0x0194
-/*
- * 9-4 = VTT GPIO PIN (6 Bits)
- * 3 = VTT Status (1 Bit)
- * 2-0 = Memory Type (2 Bits)
-*/
-#define MEM_TYPE_SHIFT (0x0)
-#define MEM_TYPE_MASK (0x7 << 0)
-#define VTT_STAT_SHIFT (0x3)
-#define VTT_STAT_MASK (0x1 << 3)
-#define VTT_GPIO_PIN_SHIFT (0x4)
-#define VTT_GPIO_PIN_MASK (0x2f << 4)
-
-/* Memory type passed in IPC register */
-#define MEM_TYPE_DDR2 2
-#define MEM_TYPE_DDR3 3
-
/* VTP0_CTRL_REG bits */
#define VTP_CTRL_START_EN (1 << 0)
#define VTP_CTRL_LOCK_EN (1 << 4)
diff --git a/src/include/msg.h b/src/include/msg.h
--- /dev/null
+++ b/src/include/msg.h
@@ -0,0 +1,150 @@
+/*
+ * AM33XX-CM3 firmware
+ *
+ * Cortex-M3 (CM3) firmware for power management on Texas Instruments' AM33XX series of SoCs
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This software is licensed under the standard terms and conditions in the Texas Instruments Incorporated
+ * Technology and Software Publicly Available Software License Agreement , a copy of which is included in the
+ * software download.
+*/
+
+#ifndef __MSG_H__
+#define __MSG_H__
+
+#include <stddef.h>
+
+#define CM3_VERSION 0x181
+
+/*
+ * 9-4 = VTT GPIO PIN (6 Bits)
+ * 3 = VTT Status (1 Bit)
+ * 2-0 = Memory Type (2 Bits)
+*/
+#define MEM_TYPE_SHIFT (0x0)
+#define MEM_TYPE_MASK (0x7 << 0)
+#define VTT_STAT_SHIFT (0x3)
+#define VTT_STAT_MASK (0x1 << 3)
+#define VTT_GPIO_PIN_SHIFT (0x4)
+#define VTT_GPIO_PIN_MASK (0x2f << 4)
+
+/* Memory type passed in IPC register */
+#define MEM_TYPE_DDR2 2
+#define MEM_TYPE_DDR3 3
+
+#define RESUME_REG 0x0
+#define STAT_ID_REG 0x1
+#define PARAM1_REG 0x2
+#define PARAM2_REG 0x3
+#define PARAM3_REG 0x4
+#define PARAM4_REG 0x5
+#define TRACE_REG 0x6
+#define CUST_REG 0x7
+
+#define DS_IPC_DEFAULT 0xffffffff
+
+#define CMD_STAT_PASS 0x0
+#define CMD_STAT_FAIL 0x1
+#define CMD_STAT_WAIT4OK 0x2
+
+
+enum cmd_ids {
+ CMD_ID_INVALID = 0x0,
+ CMD_ID_RTC = 0x1,
+ CMD_ID_RTC_FAST = 0x2,
+ CMD_ID_DS0 = 0x3,
+ CMD_ID_DS0_V2 = 0x4,
+ CMD_ID_DS1 = 0x5,
+ CMD_ID_DS1_V2 = 0x6,
+ CMD_ID_DS2 = 0x7,
+ CMD_ID_DS2_V2 = 0x8,
+ CMD_ID_STANDALONE = 0x9,
+ CMD_ID_STANDBY = 0xb,
+ CMD_ID_STANDBY_V2 = 0xc,
+ CMD_ID_RESET = 0xe,
+ CMD_ID_VERSION = 0xf,
+ CMD_ID_CPUIDLE = 0x10,
+ CMD_ID_COUNT,
+};
+
+struct rtc_data {
+ unsigned int rtc_timeout_val :4; /* Delay for RTC alarm timeout. Default = 2secs */
+};
+
+struct deep_sleep_data {
+ unsigned int mosc_state :1; /* MOSC to be kept on (1) or off (0) */
+ unsigned int deepsleep_count :16; /* Count of how many OSC clocks needs to be seen \
+ before exiting deep sleep mode */
+
+ unsigned int vdd_mpu_val :15; /* If vdd_mpu is to be lowered, vdd_mpu in mV */
+
+ unsigned int pd_mpu_state :2; /* Powerstate of PD_MPU */
+ unsigned int pd_mpu_ram_ret_state :1; /* Sabertooth RAM in retention state */
+ unsigned int pd_mpu_l1_ret_state :1; /* L1 memory in retention state */
+ unsigned int pd_mpu_l2_ret_state :1; /* L2 memory in retention state */
+ unsigned int res1 :2;
+
+ unsigned int pd_per_state :2; /* Powerstate of PD_PER */
+ unsigned int pd_per_icss_mem_ret_state :1; /* ICSS memory in retention state */
+ unsigned int pd_per_mem_ret_state :1; /* Other memories in retention state */
+ unsigned int pd_per_ocmc_ret_state :1; /* OCMC memory in retention state */
+ unsigned int pd_per_ocmc2_ret_state :1; /* OCMC bank 2 in retention state */
+ unsigned int res2 :5;
+
+ unsigned int wake_sources :13; /* Wake sources */
+ /* USB, I2C0, RTC_ALARM, TIMER1 \
+ UART0, GPIO0_WAKE0, GPIO0_WAKE1, \
+ WDT1, ADTSC, RTC_TIMER, USBWOUT0, \
+ MPU, USBWOUT1 */
+ unsigned int reserved :1; /* Internal use */
+};
+
+union state_data {
+ struct deep_sleep_data deep_sleep;
+ struct rtc_data rtc;
+ struct {
+ unsigned int param1;
+ unsigned int param2;
+ } raw;
+};
+
+struct cmd_data {
+ enum cmd_ids cmd_id;
+ union state_data *data;
+ unsigned short i2c_sleep_offset;
+ unsigned short i2c_wake_offset;
+};
+
+struct state_handler {
+ union state_data *gp_data;
+ union state_data *hs_data;
+ void (*cmd_handler)(struct cmd_data *data);
+ void (*wake_handler)(void);
+ bool needs_trigger;
+ bool fast_trigger;
+ bool do_ddr;
+};
+
+extern struct cmd_data cmd_global_data;
+extern struct state_handler cmd_handlers[];
+
+/* Board specifics populated in IPC_REG4 */
+int mem_type; /* Memory Type 2 = DDR2, 3 = DDR3 */
+bool vtt_toggle; /* VTT Toggle true = required */
+int vtt_gpio_pin; /* VTT GPIO Pin */
+
+void m3_firmware_version(void);
+
+unsigned int msg_read(char);
+void msg_write(unsigned int, char);
+
+void msg_cmd_read_id(void);
+bool msg_cmd_is_valid(void);
+bool msg_cmd_needs_trigger(void);
+bool msg_cmd_fast_trigger(void);
+void msg_cmd_dispatcher(void);
+void msg_cmd_stat_update(int);
+void msg_cmd_wakeup_reason_update(int);
+
+#endif
index 140888383d97741a3327149d01d211b512c23df2..edd2b8d4ed52f1a592fb9948ca725907496fc02d 100644 (file)
#ifndef __PM_STATE_DATA_H__
#define __PM_STATE_DATA_H__
-struct rtc_data {
- unsigned int rtc_timeout_val :4; /* Delay for RTC alarm timeout. Default = 2secs */
-};
-
-struct deep_sleep_data {
- unsigned int mosc_state :1; /* MOSC to be kept on (1) or off (0) */
- unsigned int deepsleep_count :16; /* Count of how many OSC clocks needs to be seen \
- before exiting deep sleep mode */
-
- unsigned int vdd_mpu_val :15; /* If vdd_mpu is to be lowered, vdd_mpu in mV */
-
- unsigned int pd_mpu_state :2; /* Powerstate of PD_MPU */
- unsigned int pd_mpu_ram_ret_state :1; /* Sabertooth RAM in retention state */
- unsigned int pd_mpu_l1_ret_state :1; /* L1 memory in retention state */
- unsigned int pd_mpu_l2_ret_state :1; /* L2 memory in retention state */
- unsigned int res1 :2;
-
- unsigned int pd_per_state :2; /* Powerstate of PD_PER */
- unsigned int pd_per_icss_mem_ret_state :1; /* ICSS memory in retention state */
- unsigned int pd_per_mem_ret_state :1; /* Other memories in retention state */
- unsigned int pd_per_ocmc_ret_state :1; /* OCMC memory in retention state */
- unsigned int pd_per_ocmc2_ret_state :1; /* OCMC bank 2 in retention state */
- unsigned int res2 :5;
-
- unsigned int wake_sources :13; /* Wake sources */
- /* USB, I2C0, RTC_ALARM, TIMER1 \
- UART0, GPIO0_WAKE0, GPIO0_WAKE1, \
- WDT1, ADTSC, RTC_TIMER, USBWOUT0, \
- MPU, USBWOUT1 */
- unsigned int reserved :1; /* Internal use */
-};
-
-union state_data {
- struct deep_sleep_data deep_sleep;
- struct rtc_data rtc;
- struct {
- unsigned int param1;
- unsigned int param2;
- } raw;
-};
+union state_data;
extern union state_data rtc_mode_data;
extern union state_data standby_data;
index 4d364d1a57fcfded2949749dad4ddc9aedd9ea56..727c0e475d064c881aaf6f565db901f276159615 100644 (file)
--- a/src/include/prcm_core.h
+++ b/src/include/prcm_core.h
#include <stdint.h>
-#define CM3_VERSION 0x181
-
#define MOSC_OFF 0x0
#define MOSC_ON 0x1
index b64b8fe335f9ac63c6cfdc89c998d2db8453c9f1..1c94b5366483ba0b0df1bdb48d4715da6d479608 100644 (file)
#include <stdint.h>
#include <stddef.h>
-enum cmd_ids {
- CMD_ID_INVALID = 0x0,
- CMD_ID_RTC = 0x1,
- CMD_ID_RTC_FAST = 0x2,
- CMD_ID_DS0 = 0x3,
- CMD_ID_DS0_V2 = 0x4,
- CMD_ID_DS1 = 0x5,
- CMD_ID_DS1_V2 = 0x6,
- CMD_ID_DS2 = 0x7,
- CMD_ID_DS2_V2 = 0x8,
- CMD_ID_STANDALONE = 0x9,
- CMD_ID_STANDBY = 0xb,
- CMD_ID_STANDBY_V2 = 0xc,
- CMD_ID_RESET = 0xe,
- CMD_ID_VERSION = 0xf,
- CMD_ID_CPUIDLE = 0x10,
- CMD_ID_COUNT,
-};
-
-struct cmd_data {
- enum cmd_ids cmd_id;
- union state_data *data;
- unsigned short i2c_sleep_offset;
- unsigned short i2c_wake_offset;
-};
-
-struct cmd_data cmd_global_data;
-
-struct state_handler {
- union state_data *gp_data;
- union state_data *hs_data;
- void (*cmd_handler)(struct cmd_data *data);
- void (*wake_handler)(void);
- bool needs_trigger;
- bool fast_trigger;
- bool do_ddr;
-};
-
-extern struct state_handler cmd_handlers[];
-
-/* Board specifics populated in IPC_REG4 */
-int mem_type; /* Memory Type 2 = DDR2, 3 = DDR3 */
-bool vtt_toggle; /* VTT Toggle true = required */
-int vtt_gpio_pin; /* VTT GPIO Pin */
+struct cmd_data;
/* Debug info */
bool halt_on_resume;
void system_init(void);
void system_core_clock_update(void);
-unsigned int msg_read(char);
-void msg_write(unsigned int, char);
-
-void msg_cmd_read_id(void);
-bool msg_cmd_is_valid(void);
-bool msg_cmd_needs_trigger(void);
-bool msg_cmd_fast_trigger(void);
-void msg_cmd_dispatcher(void);
-void msg_cmd_stat_update(int);
-void msg_cmd_wakeup_reason_update(int);
-
void a8_notify(int);
void a8_m3_low_power_sync(int);
void a8_m3_low_power_fast(int);
void a8_wake_standby_handler(void);
void a8_wake_cpuidle_handler(void);
-void m3_firmware_version(void);
void init_m3_state_machine(void);
void trace_init(void);
#define BB_MPU_WAKE *((volatile int *)(BITBAND_SRAM(&cmd_wake_sources, 11)))
#define BB_USBWOUT1 *((volatile int *)(BITBAND_SRAM(&cmd_wake_sources, 12)))
-#define RESUME_REG 0x0
-#define STAT_ID_REG 0x1
-#define PARAM1_REG 0x2
-#define PARAM2_REG 0x3
-#define PARAM3_REG 0x4
-#define PARAM4_REG 0x5
-#define TRACE_REG 0x6
-#define CUST_REG 0x7
-
-#define DS_IPC_DEFAULT 0xffffffff
-
-#define CMD_STAT_PASS 0x0
-#define CMD_STAT_FAIL 0x1
-#define CMD_STAT_WAIT4OK 0x2
-
#define SET_BIT(x) (1<<x)
#define CLR_BIT(x) (0<<x)
diff --git a/src/pm_services/ddr.c b/src/pm_services/ddr.c
index cfc14be9f04e187a61679d595fde3174b2b94090..81e6500dd700050edb7b78abff9d2ed217bd0476 100644 (file)
--- a/src/pm_services/ddr.c
+++ b/src/pm_services/ddr.c
#include <system_am335.h>
#include <hwmod.h>
#include <ddr.h>
+#include <msg.h>
void ddr_io_suspend(void)
{
index 825e78eb818a33d799346d9170756e24da964479..c59087183c0a1af54dec90e23ae42a123640288d 100644 (file)
#include <cm3.h>
#include <device_am335x.h>
#include <prcm_core.h>
+#include <msg.h>
#include <prmam335x.h>
#include <system_am335.h>
#include <clockdomain.h>
index 3a0f3233460a9d81aadf436519924f5c562177b5..0272f7844702f64c358fc4e7bbd684ea7b39244b 100644 (file)
#include <powerdomain.h>
#include <prcm_core.h>
+#include <msg.h>
#include <pm_state_data.h>
union state_data rtc_mode_data = {
index b1b94fe4f99f0f26d8b5f81feed9fc99a31cf545..4949067bd684dd705ecb5a0d6cdef8951e522eca 100644 (file)
#include <device_am335x.h>
#include <system_am335.h>
+#include <msg.h>
#include <pm_state_data.h>
#include <powerdomain.h>
#include <powerdomain_335x.h>
index 6ccf8c9b258c692b6ea52fc6d83b6f291a09718a..6499c0da4b03e4fa9e9f1ab4655fb24b4cc71943 100644 (file)
#include <dpll.h>
#include <ddr.h>
#include <ldo.h>
+#include <msg.h>
/* Clear out the global variables here */
void pm_reset(void)
diff --git a/src/sys_exec/msg.c b/src/sys_exec/msg.c
index e3f9045adf133cb0a70a92a87c46687a4877234e..189855b4307b8b603745c9161f6d2b0de5809964 100644 (file)
--- a/src/sys_exec/msg.c
+++ b/src/sys_exec/msg.c
#include <stddef.h>
#include <device_am335x.h>
-#include <prcm_core.h>
+#include <msg.h>
#include <system_am335.h>
#include <pm_state_data.h>
+struct cmd_data cmd_global_data;
+
static union state_data custom_state_data;
static void a8_version_handler(struct cmd_data *data)
diff --git a/src/sys_exec/sync.c b/src/sys_exec/sync.c
index b9f4a2a7d458bd8a86d5695dcc7cd1b471ab891f..5b057925ba105428d653f2d86178d2d095593179 100644 (file)
--- a/src/sys_exec/sync.c
+++ b/src/sys_exec/sync.c
#include <cm3.h>
#include <device_am335x.h>
#include <system_am335.h>
+#include <msg.h>
#include <hwmod.h>
void a8_notify(int cmd_stat_value)
index f470f163a5d187c1270828c7b0c56b8dbcf4faa1..f67fda47f5aeac0866c9f1f9ba683ef93d38b82a 100644 (file)
--- a/src/sys_exec/sys_init.c
+++ b/src/sys_exec/sys_init.c
#include <cm3.h>
#include <device_am335x.h>
#include <system_am335.h>
+#include <msg.h>
int am335_init(void)
{