index 982aa1ff3941a773ad26b6ca9b94276b3627487d..9c3f34bff93fd8bde6df3fdf4dca70c2db0c0c3b 100644 (file)
{\r
80, /* ADC gain */\r
CMB_ADC_INL_SE_VINL1, /* Left input mux for ADC1L */\r
- CMB_ADC_INL_SE_VINL2, /* Left input mux for ADC2L */\r
+ CMB_ADC_INL_SE_VINL3, /* Left input mux for ADC2L */\r
CMB_ADC_INR_SE_VINR1, /* Right input mux for ADC1R */\r
- CMB_ADC_INR_SE_VINR2, /* Right input mux for ADC2R */\r
+ CMB_ADC_INR_SE_VINR3, /* Right input mux for ADC2R */\r
CMB_ADC_RX_WLEN_24BIT, /* ADC word length */\r
CMB_ADC_DATA_FORMAT_I2S, /* ADC data format */\r
0\r
testRet(1);\r
}\r
\r
+ /* reset Audio ADC module 0 */\r
+ status = cmb_AudioAdcReset(CMB_ADC_DEVICE_0);\r
+ cmb_delay(10000);\r
+ /* reset Audio ADC module 1 */\r
+ status = cmb_AudioAdcReset(CMB_ADC_DEVICE_1);\r
+ cmb_delay(10000);\r
+\r
/* Initialize Audio ADC module */\r
status = audioAdcConfig(CMB_ADC_DEVICE_0, &adcCfg);\r
if(status != Cmb_EOK)\r