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raw | patch | inline | side by side (from parent 1: 36eddcc)
author | Ming Wei <a0868762@ti.com> | |
Thu, 18 May 2017 17:42:31 +0000 (12:42 -0500) | ||
committer | Ming Wei <a0868762@ti.com> | |
Thu, 18 May 2017 17:42:31 +0000 (12:42 -0500) |
Signed-off-by: Ming Wei <a0868762@ti.com>
58 files changed:
diff --git a/realtime_demo_bios/omapl137/OMAPL137_bf_rt.cfg b/realtime_demo_bios/omapl137/OMAPL137_bf_rt.cfg
--- /dev/null
@@ -0,0 +1,130 @@
+/**
+ * \file audiosample.cfg
+ *
+ * \brief Sysbios config file for mcasp audio test project on OMAPL137 EVM.
+ *
+ */
+
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/* ========================================================================== */
+/* CFG script for the Audio sample */
+/* ========================================================================== */
+
+/* load the required files and packages */
+var GIO = xdc.useModule('ti.sysbios.io.GIO');
+var Task = xdc.useModule ("ti.sysbios.knl.Task");
+var BIOS = xdc.useModule ("ti.sysbios.BIOS");
+var System = xdc.useModule ("xdc.runtime.System");
+var SysStd = xdc.useModule('xdc.runtime.SysStd');
+var cache = xdc.useModule ("ti.sysbios.hal.Cache");
+var Timestamp = xdc.useModule ("xdc.runtime.Timestamp");
+var ECM = xdc.useModule ("ti.sysbios.family.c64p.EventCombiner");
+var Hwi = xdc.useModule ("ti.sysbios.family.c64p.Hwi");
+var Sem = xdc.useModule("ti.sysbios.knl.Semaphore");
+var Log = xdc.useModule('xdc.runtime.Log');
+var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
+var Memory = xdc.useModule('xdc.runtime.Memory')
+var SysMin = xdc.useModule('xdc.runtime.SysMin');
+var System = xdc.useModule('xdc.runtime.System');
+var Defaults = xdc.useModule('xdc.runtime.Defaults');
+var Main = xdc.useModule('xdc.runtime.Main');
+var Diags = xdc.useModule('xdc.runtime.Diags');
+var HeapMem = xdc.useModule ("ti.sysbios.heaps.HeapMem");
+
+var Edma = xdc.loadPackage ("ti.sdo.edma3.drv.sample");
+var drv = xdc.loadPackage ("ti.sdo.edma3.drv");
+var rm = xdc.loadPackage ("ti.sdo.edma3.rm");
+
+/* Load and use the CSL package */
+var devType = "omapl137"
+var Csl = xdc.useModule('ti.csl.Settings');
+Csl.deviceType = devType;
+
+/* Load the packages */
+var socType = "omapl137";
+var McASP = xdc.loadPackage('ti.drv.mcasp');
+McASP.Settings.socType = socType;
+
+/* Load the i2c package */
+var I2C = xdc.loadPackage('ti.drv.i2c');
+I2C.Settings.socType = socType;
+
+
+/* Load the OSAL package */
+var osType = "tirtos"
+var Osal = xdc.useModule('ti.osal.Settings');
+Osal.osType = osType;
+Osal.socType = socType;
+
+/* Load the uart package */
+var Uart = xdc.loadPackage('ti.drv.uart');
+Uart.Settings.socType = socType;
+
+/* Load the Board package and set the board name */
+var Board = xdc.loadPackage('ti.board');
+Board.Settings.boardName = "evmOMAPL137";
+
+/*
+ * The BIOS module will create the default heap for the system.
+ * Specify the size of this default heap.
+ */
+BIOS.heapSize = 0x2000;
+
+
+/* System stack size (used by ISRs and Swis) */
+Program.stack = 0x1000;
+
+System.SupportProxy = SysStd;
+
+/* allocate a config-params object */
+var HeapParam = new HeapMem.Params;
+
+/* optionally assign per-instance configs */
+HeapParam.size = 200000;
+HeapParam.sectionName = "app_heap";
+Program.sectMap["app_heap"] = "SDRAM";
+
+/* create an instance-object */
+Program.global.myHeap = HeapMem.create(HeapParam);
+
+ECM.eventGroupHwiNum[0] = 7;
+ECM.eventGroupHwiNum[1] = 8;
+ECM.eventGroupHwiNum[2] = 9;
+ECM.eventGroupHwiNum[3] = 5;
+
+var task0Params = new Task.Params();
+task0Params.priority = 5;
+task0Params.instance.name = "task0";
+
+Program.global.task0 = Task.create("&Audio_echo_Task", task0Params);
diff --git a/realtime_demo_bios/omapl137/bflinker.cmd b/realtime_demo_bios/omapl137/bflinker.cmd
--- /dev/null
@@ -0,0 +1,22 @@
+/*
+ * bflinker.cmd: Linker command file for Beamformer
+ */
+
+SECTIONS
+{
+ .bferam: load >> IRAM
+ .bfiram: load >> IRAM
+ .uiaLoggerBuffers load >> SDRAM
+ filOutBuf0 >> SDRAM
+ filBuf0 >> SDRAM
+ filBuf1 >> SDRAM
+ filBuf2 >> SDRAM
+ filBuf3 >> SDRAM
+ filBuf4 >> SDRAM
+ filBuf5 >> SDRAM
+ filBuf6 >> SDRAM
+ filBuf7 >> SDRAM
+ .far >> SDRAM
+}
+/* nothing past this point */
+
diff --git a/realtime_demo_bios/omapl137/build/.ccsproject b/realtime_demo_bios/omapl137/build/.ccsproject
--- /dev/null
@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<?ccsproject version="1.0"?>
+<projectOptions>
+ <deviceVariant value="com.ti.ccstudio.deviceModel.C6000.GenericC66xxDevice"/>
+ <deviceFamily value="C6000"/>
+ <deviceEndianness value="little"/>
+ <codegenToolVersion value="7.4.11"/>
+ <isElfFormat value="true"/>
+ <rts value="libc.a"/>
+ <templateProperties value="id=org.eclipse.rtsc.project.templates.EmptyRtscApplication,buildProfile=release,isHybrid=true,"/>
+ <isTargetManual value="false"/>
+</projectOptions>
diff --git a/realtime_demo_bios/omapl137/build/.cproject b/realtime_demo_bios/omapl137/build/.cproject
--- /dev/null
@@ -0,0 +1,262 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">\r
+ <storageModule configRelations="2" moduleId="org.eclipse.cdt.core.settings">\r
+ <cconfiguration id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1301012910">\r
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1301012910" moduleId="org.eclipse.cdt.core.settings" name="Debug">\r
+ <macros>\r
+ <stringMacro name="PDK_INSTALL_PATH" type="VALUE_PATH_ANY" value="${PROJECT_LOC}\..\..\..\..\..\..\pdk_omapl13x_1_0_0\packages"/>\r
+ </macros>\r
+ <externalSettings/>\r
+ <extensions>\r
+ <extension id="com.ti.ccstudio.errorparser.CoffErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+ <extension id="com.ti.ccstudio.errorparser.LinkErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+ <extension id="com.ti.ccstudio.errorparser.AsmErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+ <extension id="org.eclipse.rtsc.xdctools.parsers.ErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>\r
+ <extension id="com.ti.ccstudio.binaryparser.CoffParser" point="org.eclipse.cdt.core.BinaryParser"/>\r
+ </extensions>\r
+ </storageModule>\r
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">\r
+ <configuration artifactExtension="out" artifactName="${ProjName}" buildProperties="" cleanCommand="${CG_CLEAN_CMD}" description="" errorParsers="org.eclipse.rtsc.xdctools.parsers.ErrorParser;com.ti.ccstudio.errorparser.CoffErrorParser;com.ti.ccstudio.errorparser.LinkErrorParser;com.ti.ccstudio.errorparser.AsmErrorParser;org.eclipse.cdt.core.GmakeErrorParser" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1301012910" name="Debug" parent="com.ti.ccstudio.buildDefinitions.C6000.Debug">\r
+ <folderInfo id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1301012910." name="/" resourcePath="">\r
+ <toolChain id="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.DebugToolchain.2134606993" name="TI Build Tools" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.DebugToolchain" targetTool="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.linkerDebug.1454548373">\r
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS.616151995" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS" valueType="stringList">\r
+ <listOptionValue builtIn="false" value="DEVICE_CONFIGURATION_ID=TMS320C67XX.OMAPL137"/>\r
+ <listOptionValue builtIn="false" value="DEVICE_ENDIANNESS=little"/>\r
+ <listOptionValue builtIn="false" value="OUTPUT_FORMAT=ELF"/>\r
+ <listOptionValue builtIn="false" value="CCS_MBS_VERSION=6.1.3"/>\r
+ <listOptionValue builtIn="false" value="LINKER_COMMAND_FILE=OMAPL137.cmd"/>\r
+ <listOptionValue builtIn="false" value="RUNTIME_SUPPORT_LIBRARY=libc.a"/>\r
+ <listOptionValue builtIn="false" value="RTSC_MBS_VERSION=2.2.0"/>\r
+ <listOptionValue builtIn="false" value="XDC_VERSION=3.32.1.22_core"/>\r
+ <listOptionValue builtIn="false" value="RTSC_PRODUCTS=ti.mas.aer.c64Px:17.0.0;com.ti.sdo.edma3:2.12.3;com.ti.rtsc.SYSBIOS:6.46.4.53;com.ti.uia:2.0.6.52;ti.mas.volib.C64P:2.1.0.1;com.ti.rtsc.XDAIS:7.24.0.04;com.ti.pdk.omapl13x:1.0.0;"/>\r
+ <listOptionValue builtIn="false" value="INACTIVE_REPOS="/>\r
+ <listOptionValue builtIn="false" value="EXPANDED_REPOS="/>\r
+ <listOptionValue builtIn="false" value="OUTPUT_TYPE=rtscApplication:executable"/>\r
+ </option>\r
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.535598041" name="Compiler version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="8.1.3" valueType="string"/>\r
+ <targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.targetPlatformDebug.589082563" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.targetPlatformDebug"/>\r
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.builderDebug.1469447502" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.builderDebug"/>\r
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.compilerDebug.1949135310" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.compilerDebug">\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DEFINE.988925055" name="Pre-define NAME (--define, -D)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DEFINE" valueType="definedSymbols">\r
+ <listOptionValue builtIn="false" value="DEVICE_OMAPL137"/>\r
+ <listOptionValue builtIn="false" value="SOC_OMAPL137"/>\r
+ <listOptionValue builtIn="false" value="evmOMAPL137"/>\r
+ <listOptionValue builtIn="false" value="PLATFORM_INIT_IN"/>\r
+ <listOptionValue builtIn="false" value="BUILD_DSP"/>\r
+ <listOptionValue builtIn="false" value="CMB_AUDIO_DAC=1"/>\r
+ <listOptionValue builtIn="false" value="AIC_CODEC"/>\r
+ <listOptionValue builtIn="false" value="MCASP_MASTER"/>\r
+ <listOptionValue builtIn="false" value="omapl137"/>\r
+ <listOptionValue builtIn="false" value="ti_targets_C64P"/>\r
+ </option>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.SILICON_VERSION.310378026" name="Target processor version (--silicon_version, -mv)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.SILICON_VERSION" value="6740" valueType="string"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.ABI.2057721500" name="Application binary interface (coffabi not supported) (--abi)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.ABI" value="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.ABI.eabi" valueType="enumerated"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.OPT_FOR_SPEED.1228384430" name="Speed vs. size trade-offs (--opt_for_speed, -mf)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.OPT_FOR_SPEED" value="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.OPT_FOR_SPEED.5" valueType="enumerated"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.INCLUDE_PATH.1173232760" name="Add dir to #include search path (--include_path, -I)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.INCLUDE_PATH" valueType="includePath">\r
+ <listOptionValue builtIn="false" value=""${CG_TOOL_ROOT}/include""/>\r
+ <listOptionValue builtIn="false" value=""${PROJECT_ROOT}/../include""/>\r
+ <listOptionValue builtIn="false" value=""${PDK_INSTALL_PATH}/ti/drv/mcasp""/>\r
+ <listOptionValue builtIn="false" value=""${PDK_INSTALL_PATH}/ti/board""/>\r
+ <listOptionValue builtIn="false" value=""${PDK_INSTALL_PATH}/ti/addon/cmb""/>\r
+ <listOptionValue builtIn="false" value=""${PDK_INSTALL_PATH}/ti/addon/cmb/src/evmOMAPL137/include""/>\r
+ <listOptionValue builtIn="false" value=""${PDK_INSTALL_PATH}""/>\r
+ <listOptionValue builtIn="false" value=""${CSL_INSTALL_PATH}""/>\r
+ <listOptionValue builtIn="false" value=""${PROJECT_ROOT}/../../../common/components""/>\r
+ </option>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DEBUGGING_MODEL.1308981231" name="Debugging model" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DEBUGGING_MODEL" value="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DEBUGGING_MODEL.SYMDEBUG__DWARF" valueType="enumerated"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DIAG_WRAP.407271056" name="Wrap diagnostic messages (--diag_wrap)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DIAG_WRAP" value="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DIAG_WRAP.off" valueType="enumerated"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DIAG_WARNING.1685356400" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DIAG_WARNING" valueType="stringList">\r
+ <listOptionValue builtIn="false" value="225"/>\r
+ </option>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DISPLAY_ERROR_NUMBER.1768983988" name="Emit diagnostic identifier numbers (--display_error_number, -pden)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.DISPLAY_ERROR_NUMBER" value="true" valueType="boolean"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.OTHER_FLAGS.1061650506" name="Other flags" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compilerID.OTHER_FLAGS" valueType="stringList">\r
+ <listOptionValue builtIn="false" value=""/>\r
+ </option>\r
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_8.1.compiler.inputType__C_SRCS.1605735524" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.compiler.inputType__C_SRCS"/>\r
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+ </tool>\r
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.linkerDebug.1454548373" name="C6000 Linker" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.exe.linkerDebug">\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.DEFINE.1914938361" name="Pre-define preprocessor macro _name_ to _value_ (--define)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.DEFINE" valueType="definedSymbols">\r
+ <listOptionValue builtIn="false" value="DSP_CORE=1"/>\r
+ </option>\r
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+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.HEAP_SIZE.1054250994" name="Heap size for C/C++ dynamic memory allocation (--heap_size, -heap)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.HEAP_SIZE" value="0x800" valueType="string"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.MAP_FILE.1456387420" name="Link information (map) listed into <file> (--map_file, -m)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.MAP_FILE" value=""${ProjName}.map"" valueType="string"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.OUTPUT_FILE.1997005263" name="Specify output file name (--output_file, -o)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.OUTPUT_FILE" value=""${ProjName}.out"" valueType="string"/>\r
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+ <listOptionValue builtIn="false" value="ti.addon.cmb.ae674"/>\r
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+ <listOptionValue builtIn="false" value="ti.drv.mcasp.ae674"/>\r
+ <listOptionValue builtIn="false" value=""ti.drv.i2c.ae674""/>\r
+ <listOptionValue builtIn="false" value="ti.csl.ae674"/>\r
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+ <listOptionValue builtIn="false" value=""vpe/lib/vpe_c.ae64P""/>\r
+ <listOptionValue builtIn="false" value=""util/lib/util_c.ae64P""/>\r
+ <listOptionValue builtIn="false" value=""mhm/lib/mhm_c.ae64P""/>\r
+ <listOptionValue builtIn="false" value=""libc.a""/>\r
+ </option>\r
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+ <listOptionValue builtIn="false" value=""${CG_TOOL_ROOT}/lib""/>\r
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+ <listOptionValue builtIn="false" value=""${PDK_INSTALL_PATH}/ti/drv/i2c/lib/omapl137/c674/release""/>\r
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+ <listOptionValue builtIn="false" value=""${TI_MAS_AER_C64PX_INSTALL_DIR}/packages/ti/mas/aer/lib""/>\r
+ <listOptionValue builtIn="false" value=""${TI_MAS_VOLIB_C64P_INSTALL_DIR}/packages/ti/mas/""/>\r
+ </option>\r
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+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.DISPLAY_ERROR_NUMBER.1162370170" name="Emit diagnostic identifier numbers (--display_error_number)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.DISPLAY_ERROR_NUMBER" value="true" valueType="boolean"/>\r
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.XML_LINK_INFO.1562266183" name="Detailed link information data-base into <file> (--xml_link_info, -xml_link_info)" superClass="com.ti.ccstudio.buildDefinitions.C6000_8.1.linkerID.XML_LINK_INFO" value=""${ProjName}_linkInfo.xml"" valueType="string"/>\r
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diff --git a/realtime_demo_bios/omapl137/build/.project b/realtime_demo_bios/omapl137/build/.project
--- /dev/null
@@ -0,0 +1,155 @@
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+ </link>\r
+ <link>\r
+ <name>sysbfflt.h</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-3-PROJECT_LOC/common/components/sysbfflt.h</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>sysdrc.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-3-PROJECT_LOC/common/components/sysdrc.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>syseram.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-3-PROJECT_LOC/common/components/syseram.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>syseram.h</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-3-PROJECT_LOC/common/components/syseram.h</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>sysiram.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-3-PROJECT_LOC/common/components/sysiram.c</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>sysiram.h</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-3-PROJECT_LOC/common/components/sysiram.h</locationURI>\r
+ </link>\r
+ <link>\r
+ <name>sysmss.c</name>\r
+ <type>1</type>\r
+ <locationURI>PARENT-3-PROJECT_LOC/common/components/sysmss.c</locationURI>\r
+ </link>\r
+ </linkedResources>\r
+ <variableList>\r
+ <variable>\r
+ <name>CSL_INSTALL_PATH</name>\r
+ <value>$%7BPDK_INSTALL_PATH%7D/ti/csl</value>\r
+ </variable>\r
+ <variable>\r
+ <name>PDK_INSTALL_PATH</name>\r
+ <value>$%7BPROJECT_LOC%7D/../../../../../../pdk_omapl13x_1_0_0/packages</value>\r
+ </variable>\r
+ </variableList>\r
+</projectDescription>\r
diff --git a/realtime_demo_bios/omapl137/include/Aic31.h b/realtime_demo_bios/omapl137/include/Aic31.h
--- /dev/null
@@ -0,0 +1,184 @@
+/*
+ * Aic31.h
+ *
+ * This file contains Application programming interface for the Aic3106 codec
+ * driver and command/macro definitions used by the Aic3106 Codec driver.
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/*
+ * ======== platforms/codec/include/Aic31.h ========
+ */
+
+
+#ifndef _AIC31_H_
+#define _AIC31_H_
+
+#include <xdc/std.h>
+#include <ICodec.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* -------- constants -------- */
+#define Aic31_I2CTIMEOUT (0xFFFFFFFF)
+
+/**
+ * \brief Aic31 Ioctl commands
+ *
+ * Aic31 Ioctl commands
+ */
+typedef enum Aic31_ioctlCmd {
+ Aic31_AC_IOCTL_MUTE_ON = 128,
+ Aic31_AC_IOCTL_MUTE_OFF,
+ Aic31_AC_IOCTL_SET_VOLUME,
+ Aic31_AC_IOCTL_SET_LOOPBACK,
+ Aic31_AC_IOCTL_SET_SAMPLERATE,
+ Aic31_AC_IOCTL_REG_WRITE,
+ Aic31_AC_IOCTL_REG_READ,
+ Aic31_AC_IOCTL_REG_WRITE_MULTIPLE,
+ Aic31_AC_IOCTL_REG_READ_MULTIPLE,
+ Aic31_AC_IOCTL_SELECT_OUTPUT_SOURCE,
+ Aic31_AC_IOCTL_SELECT_INPUT_SOURCE,
+ Aic31_AC_IOCTL_GET_CODEC_INFO
+}Aic31_ioctlCmd;
+
+/* -------- per-instance configs -------- */
+/**
+ * \brief Aic31_Params
+ *
+ * This structure contains the parameters required during the creation of the
+ * codec driver,
+ */
+
+typedef struct Aic31_Params
+{
+ ICodec_CodecType acType;
+ /**< Audio codec type (Aic31/Aic33 etc) */
+
+ ICodec_ControlBusType acControlBusType;
+ /**< Control bus to be used for the configuring of the codec */
+
+ String acCtrlBusName;
+ /**< Name of the control bus driver in the driver table */
+
+ ICodec_OpMode acOpMode;
+ /**< Operational mode of the codec (Master or slave) */
+
+ ICodec_DataType acSerialDataType;
+ /**< Data transport format to be used (TDM/DSP etc) */
+
+ uint32_t acSlotWidth;
+ /**< Slot width of the data to be used */
+
+ ICodec_DataPath acDataPath;
+ /**< Mode in which the codec has to be used (TX/RX/ RXTX) */
+
+ Bool isRxTxClockIndependent;
+ /**<
+ * Variable to indicate whether the RX and TX clock are to be independent or
+ * synchronous to each other.
+ */
+ uint8_t acCtrlBusInstNum;
+ /**< I2C instance used to configure codec */
+
+ uint32_t acBaseAddress;
+ /**< CtrlBus Base Address used to configure codec */
+
+}Aic31_Params;
+
+
+/**
+ * \brief Default Aic31_Params struct
+ *
+ * Aic31_Params Aic31_PARAMS = {
+ *
+ * ICodec_CodecType_AIC31, acType
+ *
+ * ICodec_ControlBusType_I2C, acControlBusType
+ *
+ * "NONE", acCtrlBusName
+ *
+ * ICodec_OpMode_MASTER, acOpMode
+ *
+ * ICodec_DataType_DSP, acSerialDataType
+ *
+ * (uint32_t)0x20, acSlotWidth
+ *
+ * ICodec_DataPath_TXRX, acDataPath
+ *
+ * 0, isRxTxClockIndependent
+ *
+ * };
+ */
+extern const Aic31_Params Aic31_PARAMS;
+
+/**
+ * \brief Aic31 IOM_Fxns table
+ *
+ * Driver function table to be used by applications.
+ */
+extern const IOM_Fxns Aic31_IOMFXNS;
+
+/**
+ * \brief Initializes Aic31 instances which are statically allocated
+ *
+ * This function needs to ve be called at part of BIOS initialization by
+ * setting initFxn for that particular UDEV instance or by calling this
+ * function as part of user specific initFxn.
+ */
+Void Aic31_init(Void);
+
+
+ Int aic31MdBindDev(Ptr *devp, Int devId, Ptr devParams);
+ Int aic31MdUnBindDev(Ptr devp);
+ Int aic31MdCreateChan(
+ Ptr *chanp,
+ Ptr devp,
+ String name,
+ Int mode,
+ Ptr chanParams,
+ IOM_TiomCallback cbFxn,
+ Ptr cbArg
+ );
+ Int aic31MdDeleteChan(Ptr chanp);
+ Int aic31MdSubmitChan(Ptr chanp, IOM_Packet *ioPacket);
+ Int aic31MdControlChan(Ptr chanp, Uns cmd, Ptr cmdArgs);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*_AIC31_H_ */
diff --git a/realtime_demo_bios/omapl137/include/Aic31Local.h b/realtime_demo_bios/omapl137/include/Aic31Local.h
--- /dev/null
@@ -0,0 +1,409 @@
+/*
+ * Aic31Local.h
+ *
+ * Aic3106 Codec Driver internal header file
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/*
+ * ======== platforms/codec/include/Aic31Local.h ========
+ *
+ */
+
+#ifndef _AIC31LOCAL_H_
+#define _AIC31LOCAL_H_
+
+#include <xdc/std.h>
+#include <ti/sysbios/io/GIO.h>
+#include <ti/sysbios/io/DEV.h>
+
+#include <ICodec.h>
+#include <Aic31.h>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* -------- constants -------- */
+
+#define Aic31_P0_REG0 (uint8_t)(0) /**< Page Select */
+#define Aic31_P0_REG1 (uint8_t)(1) /**< Software Reset */
+#define Aic31_P0_REG2 (uint8_t)(2) /**< Codec Sample Rate Select */
+#define Aic31_P0_REG3 (uint8_t)(3) /**< PLL Programming A */
+#define Aic31_P0_REG4 (uint8_t)(4) /**< PLL Programming B */
+#define Aic31_P0_REG5 (uint8_t)(5) /**< PLL Programming C */
+#define Aic31_P0_REG6 (uint8_t)(6) /**< PLL Programming D */
+#define Aic31_P0_REG7 (uint8_t)(7) /**< Codec Datapath Setup */
+#define Aic31_P0_REG8 (uint8_t)(8) /**< Audio Serial Data Interface Control A */
+#define Aic31_P0_REG9 (uint8_t)(9) /**< Audio Serial Data Interface Control B */
+#define Aic31_P0_REG10 (uint8_t)(10) /**< Audio Serial Data Interface Control C */
+#define Aic31_P0_REG11 (uint8_t)(11) /**< Audio Codec Overflow Flag */
+#define Aic31_P0_REG12 (uint8_t)(12) /**< Audio Codec Digital Filter Control */
+#define Aic31_P0_REG13 (uint8_t)(13) /**< Headset / Button Press Detection A */
+#define Aic31_P0_REG14 (uint8_t)(14) /**< Headset / Button Press Detection B */
+#define Aic31_P0_REG15 (uint8_t)(15) /**< Left ADC PGA Gain Control */
+#define Aic31_P0_REG16 (uint8_t)(16) /**< Right ADC PGA Gain Control */
+#define Aic31_P0_REG17 (uint8_t)(17) /**< MIC3L/R to Left ADC Control */
+#define Aic31_P0_REG18 (uint8_t)(18) /**< MIC3L/R to Right ADC Control */
+#define Aic31_P0_REG19 (uint8_t)(19) /**< LINE1L to Left ADC Control */
+#define Aic31_P0_REG20 (uint8_t)(20) /**< LINE2L to Left ADC Control */
+#define Aic31_P0_REG21 (uint8_t)(21) /**< LINE1R to Left ADC Control */
+#define Aic31_P0_REG22 (uint8_t)(22) /**< LINE1R to Right ADC Control */
+#define Aic31_P0_REG23 (uint8_t)(23) /**< LINE2R to Right ADC Control */
+#define Aic31_P0_REG24 (uint8_t)(24) /**< LINE1L to Right ADC Control */
+#define Aic31_P0_REG25 (uint8_t)(25) /**< MICBIAS Control */
+#define Aic31_P0_REG26 (uint8_t)(26) /**< Left AGC Control A */
+#define Aic31_P0_REG27 (uint8_t)(27) /**< Left AGC Control B */
+#define Aic31_P0_REG28 (uint8_t)(28) /**< Left AGC Control C */
+#define Aic31_P0_REG29 (uint8_t)(29) /**< Right AGC Control A */
+#define Aic31_P0_REG30 (uint8_t)(30) /**< Right AGC Control B */
+#define Aic31_P0_REG31 (uint8_t)(31) /**< Right AGC Control C */
+#define Aic31_P0_REG32 (uint8_t)(32) /**< Left AGC Gain */
+#define Aic31_P0_REG33 (uint8_t)(33) /**< Right AGC Gain */
+#define Aic31_P0_REG34 (uint8_t)(34) /**< Left AGC Noise Gate Debounce */
+#define Aic31_P0_REG35 (uint8_t)(35) /**< Right AGC Noise Gate Debounce */
+#define Aic31_P0_REG36 (uint8_t)(36) /**< ADC Flag */
+#define Aic31_P0_REG37 (uint8_t)(37) /**< DAC Power and Output Driver Control */
+#define Aic31_P0_REG38 (uint8_t)(38) /**< High Power Output Driver Control */
+#define Aic31_P0_REG40 (uint8_t)(40) /**< High Power Output Stage Control */
+#define Aic31_P0_REG41 (uint8_t)(41) /**< DAC Output Switching Control */
+#define Aic31_P0_REG42 (uint8_t)(42) /**< Output Driver Pop Reduction */
+#define Aic31_P0_REG43 (uint8_t)(43) /**< Left DAC Digital Volume Control */
+#define Aic31_P0_REG44 (uint8_t)(44) /**< Right DAC Digital Volume Control */
+#define Aic31_P0_REG45 (uint8_t)(45) /**< LINE2L to HPLOUT Volume Control */
+#define Aic31_P0_REG46 (uint8_t)(46) /**< PGA_L to HPLOUT Volume Control */
+#define Aic31_P0_REG47 (uint8_t)(47) /**< DAC_L1 to HPLOUT Volume Control */
+#define Aic31_P0_REG48 (uint8_t)(48) /**< LINE2R to HPLOUT Volume Control */
+#define Aic31_P0_REG49 (uint8_t)(49) /**< PGA_R to HPLOUT Volume Control */
+#define Aic31_P0_REG50 (uint8_t)(50) /**< DAC_R1 to HPLOUT Volume Control */
+#define Aic31_P0_REG51 (uint8_t)(51) /**< HPLOUT Output Level Control */
+#define Aic31_P0_REG52 (uint8_t)(52) /**< LINE2L to HPLCOM Volume Control */
+#define Aic31_P0_REG53 (uint8_t)(53) /**< PGA_L to HPLCOM Volume Control */
+#define Aic31_P0_REG54 (uint8_t)(54) /**< DAC_L1 to HPLCOM Volume Control */
+#define Aic31_P0_REG55 (uint8_t)(55) /**< LINE2R to HPLCOM Volume Control */
+#define Aic31_P0_REG56 (uint8_t)(56) /**< PGA_R to HPLCOM Volume Control */
+#define Aic31_P0_REG57 (uint8_t)(57) /**< DAC_R1 to HPLCOM Volume Control */
+#define Aic31_P0_REG58 (uint8_t)(58) /**< HPLCOM Output Level Control */
+#define Aic31_P0_REG59 (uint8_t)(59) /**< LINE2L to HPROUT Volume Control */
+#define Aic31_P0_REG60 (uint8_t)(60) /**< PGA_L to HPROUT Volume Control */
+#define Aic31_P0_REG61 (uint8_t)(61) /**< DAC_L1 to HPROUT Volume Control */
+#define Aic31_P0_REG62 (uint8_t)(62) /**< LINE2R to HPROUT Volume Control */
+#define Aic31_P0_REG63 (uint8_t)(63) /**< PGA_R to HPROUT Volume Control */
+#define Aic31_P0_REG64 (uint8_t)(64) /**< DAC_R1 to HPROUT Volume Control */
+#define Aic31_P0_REG65 (uint8_t)(65) /**< HPROUT Output Level Control */
+#define Aic31_P0_REG66 (uint8_t)(66) /**< LINE2L to HPRCOM Volume Control */
+#define Aic31_P0_REG67 (uint8_t)(67) /**< PGA_L to HPRCOM Volume Control */
+#define Aic31_P0_REG68 (uint8_t)(68) /**< DAC_L1 to HPRCOM Volume Control */
+#define Aic31_P0_REG69 (uint8_t)(69) /**< LINE2R to HPRCOM Volume Control */
+#define Aic31_P0_REG70 (uint8_t)(70) /**< PGA_R to HPRCOM Volume Control */
+#define Aic31_P0_REG71 (uint8_t)(71) /**< DAC_R1 to HPRCOM Volume Control */
+#define Aic31_P0_REG72 (uint8_t)(72) /**< HPRCOM Output Level Control */
+#define Aic31_P0_REG73 (uint8_t)(73) /**< LINE2L to MONO_LOP/M Volume Control */
+#define Aic31_P0_REG74 (uint8_t)(74) /**< PGA_L to MONO_LOP/M Volume Control */
+#define Aic31_P0_REG75 (uint8_t)(75) /**< DAC_L1 to MONO_LOP/M Volume Control */
+#define Aic31_P0_REG76 (uint8_t)(76) /**< LINE2R to MONO_LOP/M Volume Control */
+#define Aic31_P0_REG77 (uint8_t)(77) /**< PGA_R to MONO_LOP/M Volume Control */
+#define Aic31_P0_REG78 (uint8_t)(78) /**< DAC_R1 to MONO_LOP/M Volume Control */
+#define Aic31_P0_REG79 (uint8_t)(79) /**< MONO_LOP/M Output Level Control */
+#define Aic31_P0_REG80 (uint8_t)(80) /**< LINE2L to LEFT_LOP/M Volume Control */
+#define Aic31_P0_REG81 (uint8_t)(81) /**< PGA_L to LEFT_LOP/M Volume Control */
+#define Aic31_P0_REG82 (uint8_t)(82) /**< DAC_L1 to LEFT_LOP/M Volume Control */
+#define Aic31_P0_REG83 (uint8_t)(83) /**< LINE2R to LEFT_LOP/M Volume Control */
+#define Aic31_P0_REG84 (uint8_t)(84) /**< PGA_R to LEFT_LOP/M Volume Control */
+#define Aic31_P0_REG85 (uint8_t)(85) /**< DAC_R1 to LEFT_LOP/M Volume Control */
+#define Aic31_P0_REG86 (uint8_t)(86) /**< LEFT_LOP/M Output Level Control */
+#define Aic31_P0_REG87 (uint8_t)(87) /**< LINE2L to RIGHT_LOP/M Volume Control */
+#define Aic31_P0_REG88 (uint8_t)(88) /**< PGA_L to RIGHT_LOP/M Volume Control */
+#define Aic31_P0_REG89 (uint8_t)(89) /**< DAC_L1 to RIGHT_LOP/M Volume Control */
+#define Aic31_P0_REG90 (uint8_t)(90) /**< LINE2R to RIGHT_LOP/M Volume Control */
+#define Aic31_P0_REG91 (uint8_t)(91) /**< PGA_R to RIGHT_LOP/M Volume Control */
+#define Aic31_P0_REG92 (uint8_t)(92) /**< DAC_R1 to RIGHT_LOP/M Volume Control */
+#define Aic31_P0_REG93 (uint8_t)(93) /**< RIGHT_LOP/M Output Level Control */
+#define Aic31_P0_REG94 (uint8_t)(94) /**< Module Power Status */
+#define Aic31_P0_REG95 (uint8_t)(95) /**< O/P Driver Short Circuit Detection Status*/
+#define Aic31_P0_REG96 (uint8_t)(96) /**< Sticky Interrupt Flags */
+#define Aic31_P0_REG97 (uint8_t)(97) /**< Real-time Interrupt Flags */
+#define Aic31_P0_REG98 (uint8_t)(98) /**< GPIO1 Control */
+#define Aic31_P0_REG99 (uint8_t)(99) /**< GPIO2 Control */
+#define Aic31_P0_REG100 (uint8_t)(100) /**< Additional GPIO Control A */
+#define Aic31_P0_REG101 (uint8_t)(101) /**< Additional GPIO Control B */
+#define Aic31_P0_REG102 (uint8_t)(102) /**< Clock Generation Control */
+
+#define Aic31_PAGE_SELECT_ADDR (uint8_t)(0x0000)
+#define Aic31_RESET_ADDR (uint8_t)(0x0001)
+#define Aic31_CODEC_SAMPLE_RATE_ADDR (uint8_t)(0x0002)
+#define Aic31_PLLA_PROG_ADDR (uint8_t)(0x0003)
+#define Aic31_PLLB_PROG_ADDR (uint8_t)(0x0004)
+#define Aic31_PLLC_PROG_ADDR (uint8_t)(0x0005)
+#define Aic31_PLLD_PROG_ADDR (uint8_t)(0x0006)
+#define Aic31_CODEC_DATAPATH_SETUP_ADDR (uint8_t)(0x0007)
+#define Aic31_SERIAL_INTERFACEA_ADDR (uint8_t)(0x0008)
+#define Aic31_SERIAL_INTERFACEB_ADDR (uint8_t)(0x0009)
+#define Aic31_SERIAL_INTERFACEC_ADDR (uint8_t)(0x000A)
+#define Aic31_CODEC_OVERFLOW_FLAG_ADDR (uint8_t)(0x000B)
+#define Aic31_CODEC_DIGIFILTER_CTRL_ADDR (uint8_t)(0x000C)
+#define Aic31_CODEC_HEADSET_DETA_ADDR (uint8_t)(0x000D)
+#define Aic31_CODEC_HEADSET_DETB_ADDR (uint8_t)(0x000E)
+#define Aic31_LEFT_ADCPGA_GAIN_CTRL_ADDR (uint8_t)(0x000F)
+#define Aic31_RIGHT_ADCPGA_GAIN_CTRL_ADDR (uint8_t)(0x0010)
+#define Aic31_MIC3LR_TO_LEFTADC_CTRL_ADDR (uint8_t)(0x0011)
+#define Aic31_MIC3LR_TO_RIGHTADC_CTRL_ADDR (uint8_t)(0x0012)
+#define Aic31_LINE1L_TO_LEFT_ADC_CTRL_ADDR (uint8_t)(0x0013)
+#define Aic31_LINE2L_TO_LEFT_ADC_CTRL_ADDR (uint8_t)(0x0014)
+#define Aic31_LINE1R_TO_LEFT_ADC_CTRL_ADDR (uint8_t)(0x0015)
+#define Aic31_LINE1R_TO_RIGHT_ADC_CTL_ADDR (uint8_t)(0x0016)
+#define Aic31_LINE2R_TO_RIGTH_ADC_CTRL_ADDR (uint8_t)(0x0017)
+#define Aic31_LINE1L_TO_RIGTH_ADC_CTRL_ADDR (uint8_t)(0x0018)
+#define Aic31_MICBIAS_CTRL_ADDR (uint8_t)(0x0019)
+#define Aic31_LEFT_AGC_CTRLA_ADDR (uint8_t)(0x001A)
+#define Aic31_LEFT_AGC_CTRLB_ADDR (uint8_t)(0x001B)
+#define Aic31_LEFT_AGC_CTRLC_ADDR (uint8_t)(0x001C)
+#define Aic31_RIGHT_AGC_CTRLA_ADDR (uint8_t)(0x001D)
+#define Aic31_RIGHT_AGC_CTRLB_ADDR (uint8_t)(0x001E)
+#define Aic31_RIGHT_AGC_CTRLC_ADDR (uint8_t)(0x001F)
+#define Aic31_LEFT_AGC_GAIN_ADDR (uint8_t)(0x0020)
+#define Aic31_RIGHT_AGC_GAIN_ADDR (uint8_t)(0x0021)
+#define Aic31_LEFT_AGC_NOISE_GATE_DEBOUNCE_ADDR (uint8_t)(0x0022)
+#define Aic31_RIGHT_AGC_NOISE_GATE_DEBOUNCE_ADDR (uint8_t)(0x0023)
+#define Aic31_ADC_FLAG_ADDR (uint8_t)(0x0024)
+#define Aic31_DAC_POWER_OUTPUT_DRIVER_CTRL_ADDR (uint8_t)(0x0025)
+#define Aic31_HP_OUTPUT_DRIVER_CTRL_ADDR (uint8_t)(0x0026)
+#define Aic31_RESERVE (uint8_t)(0x0027)
+#define Aic31_HP_OUTPUT_STAGE_CTRL_ADDR (uint8_t)(0x0028)
+#define Aic31_DAC_OUTPUT_SWITCH_CTRL_ADDR (uint8_t)(0x0029)
+#define Aic31_OUTPUT_DRV_POP_REDUCTION_ADDR (uint8_t)(0x002A)
+#define Aic31_LEFT_DAC_VOL_CTRL_ADDR (uint8_t)(0x002B)
+#define Aic31_RIGHT_DAC_VOL_CTRL_ADDR (uint8_t)(0x002C)
+#define Aic31_LINE2L_TO_HPLOUT_VOL_CTRL_ADDR (uint8_t)(0x002D)
+#define Aic31_PGA_L_TO_HPLOUT_VOL_CTRL_ADDR (uint8_t)(0x002E)
+#define Aic31_DAC_L1_TO_HPLOUT_VOL_CTRL_ADDR (uint8_t)(0x002F)
+#define Aic31_LINE2R_TO_HPLOUT_VOL_CTRL_ADDR (uint8_t)(0x0030)
+#define Aic31_PGA_R_TO_HPLOUT_VOL_CTRL_ADDR (uint8_t)(0x0031)
+#define Aic31_DAC_R1_TO_HPLOUT_VOL_CTRL_ADDR (uint8_t)(0x0032)
+#define Aic31_HPLOUT_OUTPUT_LEVEL_CTRL_ADDR (uint8_t)(0x0033)
+#define Aic31_LIN2L_TO_HPLCOM_VOL_CTRL_ADDR (uint8_t)(0x0034)
+#define Aic31_PGA_L_TO_HPLCOM_VOL_CTRL_ADDR (uint8_t)(0x0035)
+#define Aic31_DAC_L1_TO_HPLCOM_VOL_CTRL_ADDR (uint8_t)(0x0036)
+#define Aic31_LINE2R_TO_HPLCOM_VOL_CTRL_ADDR (uint8_t)(0x0037)
+#define Aic31_PGA_R_TO_HPLCOM_VOL_CTRL_ADDR (uint8_t)(0x0038)
+#define Aic31_DAC_R1_TO_HPLCOM_VOL_CTRL_ADDR (uint8_t)(0x0039)
+#define Aic31_HPLCOM_OUTPUT_LEVEL_CTRL_ADDR (uint8_t)(0x003A)
+#define Aic31_LINE2L_TO_HPROUT_VOL_CTRL_ADDR (uint8_t)(0x003B)
+#define Aic31_PGA_L_TO_HPROUT_VOL_CTRL_ADDR (uint8_t)(0x003C)
+#define Aic31_DAC_L1_TO_HPROUT_VOL_CTRL_ADDR (uint8_t)(0x003D)
+#define Aic31_LINE2R_TO_HPROUT_VOL_CTRL_ADDR (uint8_t)(0x003E)
+#define Aic31_PGA_R_TO_HPROUT_VOL_CTRL_ADDR (uint8_t)(0x003F)
+#define Aic31_DAC_R1_TO_HPROUT_VOL_CTRL_ADDR (uint8_t)(0x0040)
+#define Aic31_HPROUT_OUTPUT_LEVEL_CTRL_ADDR (uint8_t)(0x0041)
+#define Aic31_LIN2L_TO_HPRCOM_VOL_CTRL_ADDR (uint8_t)(0x0042)
+#define Aic31_PGA_L_TO_HPRCOM_VOL_CTRL_ADDR (uint8_t)(0x0043)
+#define Aic31_DAC_L1_TO_HPRCOM_VOL_CTRL_ADDR (uint8_t)(0x0044)
+#define Aic31_LINE2R_TO_HPRCOM_VOL_CTRL_ADDR (uint8_t)(0x0045)
+#define Aic31_PGA_R_TO_HPRCOM_VOL_CTRL_ADDR (uint8_t)(0x0046)
+#define Aic31_DAC_R1_TO_HPRCOM_VOL_CTRL_ADDR (uint8_t)(0x0047)
+#define Aic31_HPRCOM_OUTPUT_LEVEL_CTRL_ADDR (uint8_t)(0x0048)
+#define Aic31_LIN2L_TO_MONO_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0049)
+#define Aic31_PGA_L_TO_MONO_LOPM_VOL_CTRL_ADDR (uint8_t)(0x004A)
+#define Aic31_DAC_L1_TO_MONO_LOPM_VOL_CTRL_ADDR (uint8_t)(0x004B)
+#define Aic31_LINE2R_TO_MONO_LOPM_VOL_CTRL_ADDR (uint8_t)(0x004C)
+#define Aic31_PGA_R_TO_MONO_LOPM_VOL_CTRL_ADDR (uint8_t)(0x004D)
+#define Aic31_DAC_R1_TO_MONO_LOPM_VOL_CTRL_ADDR (uint8_t)(0x004E)
+#define Aic31_MONO_LOPM_OUTPUT_LEVEL_CTRL_ADDR (uint8_t)(0x004F)
+#define Aic31_LIN2L_TO_LEFT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0050)
+#define Aic31_PGA_L_TO_LEFT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0051)
+#define Aic31_DAC_L1_TO_LEFT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0052)
+#define Aic31_LINE2R_TO_LEFT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0053)
+#define Aic31_PGA_R_TO_LEFT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0054)
+#define Aic31_DAC_R1_TO_LEFT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0055)
+#define Aic31_LEFT_LOPM_OUTPUT_LEVEL_CTRL_ADDR (uint8_t)(0x0056)
+#define Aic31_LIN2L_TO_RIGHT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0057)
+#define Aic31_PGA_L_TO_RIGHT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0058)
+#define Aic31_DAC_L1_TO_RIGHT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x0059)
+#define Aic31_LINE2R_TO_RIGHT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x005A)
+#define Aic31_PGA_R_TO_RIGHT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x005B)
+#define Aic31_DAC_R1_TO_RIGHT_LOPM_VOL_CTRL_ADDR (uint8_t)(0x005C)
+#define Aic31_RIGHT_LOPM_OUTPUT_LEVEL_CTRL_ADDR (uint8_t)(0x005D)
+#define Aic31_MODULE_POWER_STAT_ADDR (uint8_t)(0x005E)
+#define Aic31_OUTPUT_DRV_SHORTCKT_DET_STAT_ADDR (uint8_t)(0x005F)
+#define Aic31_STICKY_INTR_FLAGS_ADDR (uint8_t)(0x0060)
+#define Aic31_REALTIME_INTR_FLAGS_ADDR (uint8_t)(0x0061)
+#define Aic31_GPIO1_CTRL_ADDR (uint8_t)(0x0062)
+#define Aic31_GPIO2_CTRL_ADDR (uint8_t)(0x0063)
+#define Aic31_ADDITIONAL_GPIOCTRLA_ADDR (uint8_t)(0x0064)
+#define Aic31_ADDITIONAL_GPIOCTRLB_ADDR (uint8_t)(0x0065)
+#define Aic31_CLKGEN_CTRL_ADDR (uint8_t)(0x0066)
+
+
+
+
+/* Selct Aic31 page 0 registers */
+#define Aic31_PAGE_0 (uint8_t)(0x00)
+
+/* Max value of gain to be programmed to the DAC */
+#define Aic31_MAX_DAC_GAIN_VALUE (uint8_t)(0x7F)
+
+/* Max value of gain to be programmed to the AGC */
+#define Aic31_MAX_AGC_GAIN_VALUE (uint8_t)(0x77)
+
+/* Max value of gain to be programmed to the PGA */
+#define Aic31_MAX_PGA_GAIN_VALUE (uint8_t)(0x77)
+
+/* MAX percent of the gain allowed */
+#define Aic31_MAX_GAIN_PERCENT (uint8_t)(100u)
+
+
+#define Aic31_REG_READ_PASS (Bool)0
+
+#define Aic31_REG_READ_FAIL (Bool)1
+
+#define Aic31_REG_WRITE_PASS (Bool)0
+
+#define Aic31_REG_WRITE_FAIL (Bool)1
+
+
+/* -------- structs -------- */
+
+/**
+ * \brief Channel Object which stores the channel related information.
+ *
+ * This structure defines the audio codec channel specific data.it defines
+ * the state of the channel and stores the information required by the
+ * channel.
+ */
+typedef struct Aic31_Channel_Object
+{
+ ICodec_DriverState chanStatus;
+ /**< The state of the channel. It could be opened or closed. */
+
+ ICodec_Channel channelMode;
+ /**< The channe mode. It could be transmit or recieve */
+
+ Ptr devHandle;
+ /**< Pointer to the audio codec object */
+
+ uint32_t samplingRate;
+ /**< Current sampling rate of the channel */
+
+ uint32_t chanGain;
+ /**< The current gain of the channel in percentage */
+}Aic31_Channel_Object;
+
+/**
+ * \brief Hardware information structure
+ *
+ * Aic31 structure containing the instance specific data.This data is
+ * loaded from the platform.xs file(this file contains the information
+ * specific to the platform).
+ */
+typedef struct Aic31_HwInfo {
+ uint32_t deviceAddress;
+}Aic31_HwInfo;
+
+/* -------- module-wide state -------- */
+
+/**
+ * \brief Moule state object
+ */
+typedef struct {
+ Bool *inUse;
+} Aic31_Module_State;
+
+/* -------- per-instance state -------- */
+
+/**
+ * \brief Instance State object
+ */
+typedef struct
+{
+ uint8_t instNum;
+ /**< Instance number of the current codec type to be opened */
+
+ ICodec_DriverState devState;
+ /**< The state of the audio codec. It could created or deleted state */
+
+ ICodec_CodecType acType;
+ /**< Identifies the type of audio codec (AIC12 / AIC23 / TP) */
+
+ ICodec_ControlBusType acControlBusType;
+ /**< Type of the control bus (SPI or I2C) */
+
+ String acCtrlBusName;
+ /**< Instance number of the control bus (I2C or SPI) */
+
+ DEV_Handle acCtrlBusHandle;
+ /* pointer to the driver object of the control bus */
+
+ uint32_t acCodecId;
+ /**< I2C slave address or SPI CS number */
+
+ ICodec_OpMode acOpMode;
+ /**< Audio Codec operating mode */
+
+ ICodec_DataType acSerialDataType;
+ /**< Audio Codec serial data type */
+
+ uint32_t acSlotWidth;
+ /**< Slot width of each channel */
+
+ ICodec_DataPath acDataPath;
+ /**< Data paths (Tx / Rx / Both Tx and Rx ) */
+
+ Bool isRxTxClockIndependent;
+ /**< Defines if the serial clock is common for both Tx and Rx data paths */
+
+ Aic31_Channel_Object ChanObj[ICodec_Channel_MAX];
+ /**< The audio codec channel objects of transmit and receive channels */
+
+ Ptr hCtrlBus;
+ /**< Handle of the control bus instance created and opened */
+
+ Semaphore_Struct semObj;
+ /**< Semaphore Handle used while doing I2C transfer */
+
+ uint8_t acCtrlBusInstNum;
+ /**< I2C instance used to configure codec */
+
+ uint32_t acBaseAddress;
+ /**< CtrlBus Base Address used to configure codec */
+
+} Aic31_Object;
+
+//#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*_AIC31LOCAL_H_ */
diff --git a/realtime_demo_bios/omapl137/include/Audio_evmInit.h b/realtime_demo_bios/omapl137/include/Audio_evmInit.h
--- /dev/null
@@ -0,0 +1,71 @@
+/*
+ * Audio_evmInit.h
+ *
+ * This file contains Application programming interface for the Audio application
+ * related EVM (platform) specifc initialization routines
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/**
+ * \file Audio_evmInit.h
+ *
+ * \brief This file contains the board level functions of Audio driver.
+ *
+ * (C) Copyright 2009, Texas Instruments, Inc
+ *
+ */
+
+#ifndef _AUDIO_EVMINIT_H_
+#define _AUDIO_EVMINIT_H_
+
+#include <xdc/std.h>
+#include "board.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+Void configureAudio(Void);
+Void audioUserI2cInit(Void);
+void configMcASP_SocHwInfo(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _AUDIO_EVMINIT_H_ */
+/* ========================================================================== */
+/* END OF FILE */
+/* ========================================================================== */
diff --git a/realtime_demo_bios/omapl137/include/ICodec.h b/realtime_demo_bios/omapl137/include/ICodec.h
--- /dev/null
@@ -0,0 +1,265 @@
+/*
+ * ICodec.h
+ *
+ * This file contains interface definition for a generic codec interface which
+ * can be used/implemented by various codec drivers.
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/**
+ * \mainpage ICodec Interface for codec drivers for BIOS 6.x
+ *
+ * \section Introduction
+ *
+ * \subsection xxx Purpose and Scope
+ * The purpose of this document is to explain the ICodec interface written for
+ * SYS/BIOS 6.x codec drivers
+ *
+ * \subsection bbb ICodec interface
+ *
+ * Interface for codec drivers.
+ *
+ * A Codec Driver manages a codec(s) that provide channels for input and
+ * output of audio data. All the instances of the same codec are managed
+ * by a single driver. For example all the Aic31 codecs for a platform
+ * are managed by a single driver(with a different driver instance
+ *
+ * The ICodec interface provides the generic data structures required by the
+ * codec driver and also provides the list of the basic control commands that
+ * need to be provided by the codec drivers inheriting this interface.
+ *
+ * \subsection ccc SYS/BIOS System
+ * SYS/BIOS is a real time kernel provided by TI to use with its
+ * DSP processors.
+ *
+ * \subsection References
+ * -# SYS/BIOS driver development <b>SPRU616.pdf</b>
+ *
+ * \file ICodec.h
+ *
+ * \brief Codec interface definition
+ *
+ * This file contains the interfaces, data types and symbolic definitions
+ * that are needed by the application to utilize the serivces of the codec
+ * device driver.
+ */
+
+#ifndef ICodec_
+#define ICodec_
+
+#include <xdc/std.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* -------- typedef enums -------- */
+
+typedef enum ICodec_Channel {
+ ICodec_Channel_INPUT,
+ ICodec_Channel_OUTPUT,
+ ICodec_Channel_MAX
+}ICodec_Channel;
+
+/**
+ * \brief Codec types defintion
+ *
+ * This enum defines the audio codec types supported in the Audio Framework.
+ */
+typedef enum ICodec_CodecType {
+ ICodec_CodecType_AIC12, /**< TI's AIC12 Audio Codec */
+ ICodec_CodecType_AIC23, /**< TI's AIC23 Audio Codec */
+ ICodec_CodecType_AIC31, /**< TI's AIC31 Audio Codec */
+ ICodec_CodecType_AIC33, /**< TI's AIC33 Audio Codec */
+ ICodec_CodecType_TYPE2, /**< User defined Audio Codec */
+ ICodec_CodecType_TYPE3, /**< User defined Audio Codec */
+ ICodec_CodecType_TYPE4, /**< User defined Audio Codec */
+ ICodec_CodecType_UNKNOWN /**< Delimiter Enum */
+}ICodec_CodecType;
+
+/**
+ * \brief Control bus type to be used for configure the codec.
+ *
+ * This enum defines the audio codec control bus type.
+ */
+typedef enum ICodec_ControlBusType {
+ ICodec_ControlBusType_I2C, /**< Control Bus for Audio Codec is I2C */
+ ICodec_ControlBusType_SPI, /**< Control Bus for Audio Codec is SPI */
+ ICodec_ControlBusType_UNKNOWN /**< Delimiter Enum */
+}ICodec_ControlBusType;
+
+/**
+ * \brief Data path to be used by the codec.
+ *
+ * This enum defines the audio codec data paths possible.
+ */
+typedef enum ICodec_DataPath {
+ ICodec_DataPath_TX, /**< Only Tx path of audio codec is used */
+ ICodec_DataPath_RX, /**< Only Rx path of audio codec is used */
+ ICodec_DataPath_TXRX /**< Both Tx and Rx path of audio codec is used */
+}ICodec_DataPath;
+
+/**
+ * \brief Audio data type to be transferred.
+ *
+ * This enum defines the audio codec serial data type.This is used to
+ * configure the data transfer type.
+ */
+typedef enum ICodec_DataType {
+ ICodec_DataType_LEFTJ, /**<Audio Codec serial data type is left justified */
+ ICodec_DataType_RIGHTJ,/**<Audio Codec serial data type is right justified*/
+ ICodec_DataType_I2S, /**<Audio Codec serial data type is I2S */
+ ICodec_DataType_DSP, /**<Audio Codec serial data type is DSP */
+ ICodec_DataType_TDM /**<Audio Codec serial data type is TDM */
+}ICodec_DataType;
+
+/**
+ * \brief Codec driver and channel status enumeration.
+ *
+ * codec driver state enums used to track the current state of the driver
+ * and also the channels.
+ */
+typedef enum ICodec_DriverState {
+ ICodec_DriverState_DELETED,
+ ICodec_DriverState_CREATED,
+ ICodec_DriverState_INITIALIZED,
+ ICodec_DriverState_OPENED,
+ ICodec_DriverState_CLOSED,
+ ICodec_DriverState_DEINITIALIZED,
+ ICodec_DriverState_POWERED_DOWN
+}ICodec_DriverState;
+
+/**
+ * \brief Codec operating Mode
+ *
+ * This enum defines the audio codec operating mode.
+ */
+typedef enum ICodec_OpMode
+{
+ ICodec_OpMode_MASTER, /**< Audio Codec operates in Master mode */
+ ICodec_OpMode_SLAVE /**< Audio Codec operates in Slave mode */
+}ICodec_OpMode;
+
+
+/*! Audio output selection
+ *
+ * This enum specifies the source to be used for the audio data output.
+ */
+enum ICodec_OutputDest
+{
+ ICodec_OutputDest_LINEOUT, /*! Audio is output to the lineout pins */
+ ICodec_OutputDest_HPOUT, /*! Audio is output to the HP out pins */
+ ICodec_OutputDest_BOTH /*! Audio is output to both the pins */
+};
+
+
+/**
+ * \brief Audio input selection
+ *
+ * This enum specifies the source to be used as the audio data input source.
+ */
+enum ICodec_InputDest
+{
+ ICodec_InputDest_MICIN, /**< Audio is input from MIC in */
+ ICodec_InputDest_LINEIN /**< Audio is input from line in */
+};
+
+
+
+/*!
+ * \brief Audio codec data slot size.
+ *
+ * This enum specifies the Audio data slot width.This is used to configure
+ * the individual channel slot width.
+ */
+enum ICodec_SlotWidth
+{
+ ICodec_SlotWidth_16, /**< channel slotwidth is 16 bit */
+ ICodec_SlotWidth_20, /**< channel slotwidth is 20 bit */
+ ICodec_SlotWidth_24, /**< channel slotwidth is 24 bit */
+ ICodec_SlotWidth_32 /**< channel slotwidth is 32 bit */
+};
+
+
+/* -------- typedef structs -------- */
+/**
+ * \brief Channel parameters required during the channel opening
+ *
+ * This structure defines the channel parameters. This parameter is
+ * supplied with the open call of the Audio Codec. This configures the
+ * parameters required by the channels.
+ */
+typedef struct ICodec_ChannelConfig {
+ uint32_t samplingRate; /**< Audio data sampling rate */
+ uint32_t chanGain; /**< The intial gain for the channel */
+ uint32_t bitClockFreq; /**< Bit Clock speed */
+ uint32_t numSlots; /**< Number of slots */
+}ICodec_ChannelConfig;
+
+/**
+ * \brief Structure used during read and write to the codec registers.
+ *
+ * This structure specifies the codec register write or read
+ * information. The regIndex element specifies the starting index
+ * of the codec register. The regData element specifies the register
+ * data to be read/written. The regCount element specifies the
+ * total number of registers to be read/written.
+ */
+typedef struct ICodec_RegData {
+ uint32_t regIndex; /**< Starting index and codec register */
+ Ptr regData; /**< Register data written/read */
+ uint32_t regCount; /**< Number of registers written/read */
+}ICodec_RegData;
+
+
+/**
+ * \brief Structure used to pass information related to the codec to the audio
+ * layer.
+ *
+ * This structure contains the data that will be required by the audio
+ * interface layer.This infromation is required by the audio interface to
+ * interface with the codec and sending IOCTLs etc.
+ */
+typedef struct ICodec_CodecData
+{
+ ICodec_OpMode acOpMode;
+ /**< Audio Codec operating mode */
+
+}ICodec_CodecData;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/realtime_demo_bios/omapl137/include/MCASP_log.h b/realtime_demo_bios/omapl137/include/MCASP_log.h
--- /dev/null
@@ -0,0 +1,78 @@
+/**
+ * \file log.h
+ *
+ * \brief This file contains the prototypes for the log print functions. By
+ default the prints will be directed to serial console using UART.
+ *
+ */
+
+/*
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MCASP_LOG_H
+#define _MCASP_LOG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdio.h>
+
+/* UART Header files */
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/csl/soc/am571x/src/cslr_control_core_pad_io.h>
+
+/**********************************************************************
+ ************************** Global Variables **************************
+ **********************************************************************/
+extern void UART_printf(const char *pcString, ...);
+extern void ConsoleUtilsInit(void);
+
+/**********************************************************************
+ ************************** Macros ************************************
+ **********************************************************************/
+/* Enable the below macro to have prints on the IO Console */
+//#define IO_CONSOLE
+
+#ifndef IO_CONSOLE
+#define MCASP_log UART_printf
+#else
+#define MCASP_log printf
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _MCASP_LOG_H */
diff --git a/realtime_demo_bios/omapl137/include/aic31_if.h b/realtime_demo_bios/omapl137/include/aic31_if.h
--- /dev/null
@@ -0,0 +1,82 @@
+/**
+ * \file Aic31_if.h
+ *
+ * \brief The macro definitions and function prototypes for
+ * configuring AIC31 codec
+ *
+ * This file contains the implementation of the AIC31 audio codec driver for
+ * DSP BIOS operating system.
+ *
+ * (C) Copyright 2012, Texas Instruments, Inc
+ */
+
+/*
+* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the
+* distribution.
+*
+* Neither the name of Texas Instruments Incorporated nor the names of
+* its contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*/
+
+#ifndef _AIC31_IF_H_
+#define _AIC31_IF_H_
+
+/**************************************************************************
+** Macro Definitions
+**************************************************************************/
+/*
+** Macros for the dataType variable to pass to AIC31DataConfig function
+*/
+#define AIC31_DATATYPE_I2S (0u << 6u) /* I2S Mode */
+#define AIC31_DATATYPE_DSP (1u << 6u) /* DSP Mode */
+#define AIC31_DATATYPE_RIGHTJ (2u << 6u) /* Right Aligned Mode */
+#define AIC31_DATATYPE_LEFTJ (3u << 6u) /* Left Aligned Mode */
+
+/*
+** Macros for the mode variable for the AIC31SampleRateConfig function
+*/
+#define AIC31_MODE_ADC (0xF0u)
+#define AIC31_MODE_DAC (0x0Fu)
+#define AIC31_MODE_BOTH (0xFFu)
+
+/**************************************************************************
+** API function Prototypes
+**************************************************************************/
+extern void AIC31Reset(unsigned int baseAddr);
+extern void AIC31DataConfig(unsigned int baseAddr, unsigned char dataType,
+ unsigned char slotWidth, unsigned char dataOff);
+extern void AIC31SampleRateConfig(unsigned int baseAddr, unsigned int mode,
+ unsigned int sampleRate);
+extern void AIC31ADCInit(unsigned int baseAddr);
+extern void AIC31DACInit(unsigned int baseAddr);
+extern void AIC31ADCDeInit (unsigned int baseAddr);
+extern void AIC31DACDeInit (unsigned int baseAddr);
+
+#endif
+
+/***************************** End Of File ***********************************/
diff --git a/realtime_demo_bios/omapl137/include/mcasp_audiodc_bios.h b/realtime_demo_bios/omapl137/include/mcasp_audiodc_bios.h
--- /dev/null
@@ -0,0 +1,315 @@
+/**
+ * \file mcasp_audiodc_test.h
+ *
+ * \brief The macro definitions and function prototypes for
+ * configuring mcasp
+ *
+ */
+
+/*
+* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the
+* distribution.
+*
+* Neither the name of Texas Instruments Incorporated nor the names of
+* its contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _MCASP_AUDIODC_TEST_H_
+#define _MCASP_AUDIODC_TEST_H_
+
+/* ========================================================================== */
+/* Macros & Typedefs */
+/* ========================================================================== */
+
+/*
+ ** Pin Multiplexing masks for the mandatory pins to be used to operate
+ ** McASP.
+ */
+#define PINMUX12_MCASP1_ACLKR_ENABLE (CSL_SYSCFG_PINMUX12_PINMUX12_7_4_ACLKR1 << \
+ CSL_SYSCFG_PINMUX12_PINMUX12_7_4_SHIFT)
+
+#define PINMUX11_MCASP1_ACLKX_ENABLE (CSL_SYSCFG_PINMUX11_PINMUX11_27_24_ACLKX1 << \
+ CSL_SYSCFG_PINMUX11_PINMUX11_27_24_SHIFT)
+
+#define PINMUX12_MCASP1_AFSR_ENABLE (CSL_SYSCFG_PINMUX12_PINMUX12_11_8_AFSR1 << \
+ CSL_SYSCFG_PINMUX12_PINMUX12_11_8_SHIFT)
+
+#define PINMUX11_MCASP1_AFSX_ENABLE (CSL_SYSCFG_PINMUX11_PINMUX11_31_28_AFSX1 << \
+ CSL_SYSCFG_PINMUX11_PINMUX11_31_28_SHIFT)
+
+#define PINMUX12_MCASP1_AHCLKR_ENABLE (CSL_SYSCFG_PINMUX12_PINMUX12_3_0_AHCLKR1 << \
+ CSL_SYSCFG_PINMUX12_PINMUX12_3_0_SHIFT)
+
+#define PINMUX11_MCASP1_AHCLKX_ENABLE (CSL_SYSCFG_PINMUX11_PINMUX11_23_20_AHCLKX1 << \
+ CSL_SYSCFG_PINMUX11_PINMUX11_23_20_SHIFT)
+
+#define PINMUX12_MCASP1_AMUTE_ENABLE (CSL_SYSCFG_PINMUX12_PINMUX12_15_12_AMUTE1 << \
+ CSL_SYSCFG_PINMUX12_PINMUX12_15_12_SHIFT)
+
+/* Pin Multiplexing masks for AXR[5] and AXR[0]. */
+
+#define PINMUX13_MCASP1_AXR5_ENABLE (CSL_SYSCFG_PINMUX13_PINMUX13_7_4_AXR1_5 <<\
+ CSL_SYSCFG_PINMUX13_PINMUX13_7_4_SHIFT)
+
+#define PINMUX12_MCASP1_AXR0_ENABLE (CSL_SYSCFG_PINMUX12_PINMUX12_19_16_AXR1_0 << \
+ CSL_SYSCFG_PINMUX12_PINMUX12_19_16_SHIFT)
+
+#define PINMUX12_MCASP1_AXR1_ENABLE (CSL_SYSCFG_PINMUX12_PINMUX12_23_20_AXR1_1 << \
+ CSL_SYSCFG_PINMUX12_PINMUX12_23_20_SHIFT)
+
+#define PINMUX12_MCASP1_AXR2_ENABLE (CSL_SYSCFG_PINMUX12_PINMUX12_27_24_AXR1_2 << \
+ CSL_SYSCFG_PINMUX12_PINMUX12_27_24_SHIFT)
+
+#define PINMUX12_MCASP1_AXR3_ENABLE (CSL_SYSCFG_PINMUX12_PINMUX12_31_28_AXR1_3 << \
+ CSL_SYSCFG_PINMUX12_PINMUX12_31_28_SHIFT)
+
+#define PINMUX8_MCASP1_AXR10_ENABLE (CSL_SYSCFG_PINMUX8_PINMUX8_23_20_AXR1_10 << \
+ CSL_SYSCFG_PINMUX8_PINMUX8_23_20_SHIFT)
+
+/* Pin multiplexing bit masks for SPI0 pins. */
+#define PINMUX3_SPI0_CLK_ENABLE (CSL_SYSCFG_PINMUX3_PINMUX3_3_0_EMB_D_23 << \
+ CSL_SYSCFG_PINMUX3_PINMUX3_3_0_SHIFT)
+
+#define PINMUX3_SPI0_SIMO_ENABLE (CSL_SYSCFG_PINMUX3_PINMUX3_15_12_EMB_D_26 << \
+ CSL_SYSCFG_PINMUX3_PINMUX3_15_12_SHIFT)
+
+#define PINMUX3_SPI0_SOMI_ENABLE (CSL_SYSCFG_PINMUX3_PINMUX3_11_8_EMB_D_25 << \
+ CSL_SYSCFG_PINMUX3_PINMUX3_11_8_SHIFT)
+
+#define PINMUX3_SPI0_ENA_ENABLE (CSL_SYSCFG_PINMUX3_PINMUX3_7_4_EMB_D_24 << \
+ CSL_SYSCFG_PINMUX3_PINMUX3_7_4_SHIFT)
+
+/* Pin multiplexing bit masks for SPI1 pins. */
+
+#define PINMUX8_SPI1_CLK_ENABLE (CSL_SYSCFG_PINMUX8_PINMUX8_11_8_SPI1_CLK << \
+ CSL_SYSCFG_PINMUX8_PINMUX8_11_8_SHIFT)
+
+#define PINMUX8_SPI1_SIMO_ENABLE (CSL_SYSCFG_PINMUX8_PINMUX8_7_4_SPI1_SIMO0 << \
+ CSL_SYSCFG_PINMUX8_PINMUX8_7_4_SHIFT)
+
+#define PINMUX8_SPI1_SOMI_ENABLE (CSL_SYSCFG_PINMUX8_PINMUX8_3_0_SPI1_SOMI0 << \
+ CSL_SYSCFG_PINMUX8_PINMUX8_3_0_SHIFT)
+
+#define PINMUX8_SPI1_ENA_ENABLE (CSL_SYSCFG_PINMUX8_PINMUX8_31_28_SPI1_ENA << \
+ CSL_SYSCFG_PINMUX8_PINMUX8_31_28_SHIFT)
+
+/* Pin Multiplexing bit mask to select GP3[10] pin. */
+#define PINMUX11_GPIO3_10_ENABLE (CSL_SYSCFG_PINMUX11_PINMUX11_15_12_GPIO3_10 << \
+ CSL_SYSCFG_PINMUX11_PINMUX11_15_12_SHIFT)
+/* Pin Multiplexing bit mask to select AMUTE0 */
+#define PINMUX10_AMUTE0_ENABLE (CSL_SYSCFG_PINMUX10_PINMUX10_3_0_AMUTE0 << \
+ CSL_SYSCFG_PINMUX10_PINMUX10_3_0_SHIFT)
+
+#define LOOP_BACK_BIT_VALUE 0U
+#define POWER_DOWN_BIT_VALUE 0U
+#define CLK_MST_BIT_VALUE 3U
+
+#define ENAFUN_BIT_VALUE 1U
+
+#define SPI_ENABLE_CHIP_SEL_0 0U
+
+#define SOMIFUN_BIT_VALUE 1U
+#define SIMOFUN_BIT_VALUE 1U
+#define CLKFUN_BIT_VALUE 1U
+
+#define SHIFTDIR_BIT_VALUE 0U
+
+#define POLARITY_BIT_SHIFT_VALUE (0 << 17)
+#define PHASE_BIT_SHIFT_VALUE (1 << 16)
+
+#define CLOCK_MODE (POLARITY_BIT_SHIFT_VALUE | PHASE_BIT_SHIFT_VALUE)
+
+#define PRESCALE_BIT_VALUE 19U
+#define CHARLEN_BIT_VALUE 8U
+
+#define DATA_FORMAT_SELECT_VALUE 03U
+
+#define DATA_HOLD_VALUE 1U
+
+#define CSNUM_BIT_VALUE 2U
+#define WDEL_BIT_VALUE 0U
+
+#define SPI1_BASE_ADDR 0x01E12000
+
+#define C2TDELAY_BIT_FIELD_VALUE 8U
+#define T2CDELAY_BIT_FIELD_VALUE 8U
+
+#define SPI_INPUT_CLK_FREQ 4000000U/*4MHz*/
+
+#define SPI_OUTPUT_CLK_FREQ 150000000U/*150MHz*/
+
+#define SOC_EDMA3_CC_BASE CSL_EDMA3CC_0_REGS
+#define SOC_MCASP_CFG_BASE CSL_MCASP_1_CFG_REGS
+#define SOC_MCASP0_CFG_BASE CSL_MCASP_0_CFG_REGS
+
+#define SOC_MCASP_BASE (CSL_MCASP_1_CFG_REGS + 0x00002000)
+#define SOC_MCASP_1_FIFO_REGS CSL_MCASP_1_FIFO_CFG_REGS
+
+#define MCASP_TX_FRAME_SYNC_MODE 2u
+#define MCASP_TX_FRAME_SYNC_WIDTH 1u
+#define MCASP_TX_FRAME_SYNC_POLARITY 2u
+#define MCASP_TX_FRAM_SYNC_GENERATION 1u
+
+#define SPI_SPIFMT_DF_SEL 0
+
+#define MCASP_TX_FRAME_SYNC_SELECT (MCASP_TX_FRAM_SYNC_GENERATION | \
+ MCASP_TX_FRAME_SYNC_POLARITY)
+#ifdef BUILD_ARM
+
+#endif
+/*
+** Values which are configurable
+*/
+/* Slot size to send/receive data */
+#define SLOT_SIZE (32u)
+
+/* Word size to send/receive data. Word size <= Slot size */
+#define WORD_SIZE (32u)
+
+/* Number of channels, L & R */
+#define NUM_I2S_CHANNELS (8U)
+
+/* Sampling Rate which will be used by both transmit and receive sections */
+#define SAMPLING_RATE (48000u)
+
+/* Number of samples to be used per audio buffer */
+#define NUM_SAMPLES_PER_AUDIO_BUF (480u)
+
+/* Number of buffers used per tx/rx */
+#define NUM_BUF (2U)
+
+/* Number of linked parameter set used per tx/rx */
+#define NUM_PAR (2U)
+
+/* Specify where the parameter set starting is */
+#define PAR_ID_START (40U)
+
+/* Number of samples in loop buffer */
+#define NUM_SAMPLES_LOOP_BUF (10U)
+
+/* McASP Serializer 0 for Transmit */
+#define MCASP_XSER_TX (5U)
+
+/* McASP Serializer 1 for Transmit */
+#define MCASP_XSER_RX (0U)
+
+/*
+** Below Macros are calculated based on the above inputs
+*/
+
+#define I2S_SLOTS ((1 << NUM_TIMESLOTS_PER_SERIALIZER) - 1)
+
+#define BYTES_PER_SAMPLE ((WORD_SIZE >> 3) \
+ * NUM_I2S_CHANNELS)
+
+#define AUDIO_BUF_SIZE (NUM_SAMPLES_PER_AUDIO_BUF \
+ * BYTES_PER_SAMPLE)
+
+#define EDMA3_CHA_MCASP_RX (2U)
+
+#define EDMA3_CHA_MCASP_TX (3U)
+
+#if 0
+#define TX_DMA_INT_ENABLE ((((EDMA_TPCC_OPT_TCC_MASK >> EDMA_TPCC_OPT_TCC_SHIFT ) & EDMA3_CHA_MCASP_TX) << EDMA_TPCC_OPT_TCC_SHIFT) | \
+ (1 << EDMA_TPCC_OPT_TCINTEN_SHIFT))
+
+#define RX_DMA_INT_ENABLE ((((EDMA_TPCC_OPT_TCC_MASK >> EDMA_TPCC_OPT_TCC_SHIFT ) & EDMA3_CHA_MCASP_RX) << EDMA_TPCC_OPT_TCC_SHIFT) | \
+ (1 << EDMA_TPCC_OPT_TCINTEN_SHIFT))
+
+#else
+
+#define EDMA3CC_OPT_TCINTEN_SHIFT (0x00000014u)
+
+#define TX_DMA_INT_ENABLE (EDMA3CC_OPT_TCC_SET(1) | (1 \
+ << EDMA3CC_OPT_TCINTEN_SHIFT))
+#define RX_DMA_INT_ENABLE (EDMA3CC_OPT_TCC_SET(0) | (1 \
+ << EDMA3CC_OPT_TCINTEN_SHIFT))
+#endif
+
+#define PAR_RX_START (PAR_ID_START)
+#define PAR_TX_START (PAR_ID_START + NUM_PAR)
+
+#define NUM_TIMESLOTS_PER_SERIALIZER (2u)
+
+/*
+** Below Macros are calculated based on the above inputs
+*/
+#define NUM_TX_SERIALIZERS (NUM_I2S_CHANNELS >> 1)
+#define NUM_RX_SERIALIZERS (NUM_I2S_CHANNELS >> 1)
+
+/* McASP Serializers for Receive */
+#define MCASP_XSER_RX1 (0u)
+#define MCASP_XSER_RX2 (1u)
+#define MCASP_XSER_RX3 (2u)
+#define MCASP_XSER_RX4 (10u)
+
+/* McASP Serializers for Transmit */
+#define MCASP_XSER_TX1 (5u)
+#define MCASP_XSER_TX2 (6u)
+#define MCASP_XSER_TX3 (7u)
+#define MCASP_XSER_TX4 (8u)
+#define MCASP_XSER_TX5 (9u)
+
+#define EDMA3CC_OPT_TCC (0x0003F000u)
+
+#define EDMA3CC_OPT_TCC_SHIFT (0x0000000Cu)
+
+/*
+** Definitions which are not configurable
+*/
+#define EDMA3CC_OPT_DAM (0x00000002u)
+#define EDMA3CC_OPT_SAM (0x00000001u)
+
+#define SIZE_PARAMSET (32U)
+#define OPT_FIFO_WIDTH (0x02 << 8U)
+
+/*
+** Definitions which are configurable depending on the core to be used(ARM or DSP)
+*/
+#ifdef BUILD_DSP
+#define EDMA3_CC_REGION (1U)
+#else
+#define EDMA3_CC_REGION (0U)
+#endif
+
+#define EDMA3_CC_QUEUE (0U)
+
+#define SOC_I2Cx_BASE (CSL_I2C_0_DATA_CFG)
+
+/* Interrupt channels to map in AINTC */
+#define INT_CHANNEL_I2C (2u)
+#define INT_CHANNEL_MCASP (2u)
+#define INT_CHANNEL_EDMACC (2u)
+
+
+/* AIC3106 codec address */
+#define I2C_SLAVE_CODEC_AIC31 (0x18u)
+
+/* ========================================================================== */
+/* Function prototypes */
+/* ========================================================================== */
+#endif //_MCASP_AUDIODC_TEST_H_
diff --git a/realtime_demo_bios/omapl137/include/mcasp_cfg.h b/realtime_demo_bios/omapl137/include/mcasp_cfg.h
--- /dev/null
@@ -0,0 +1,103 @@
+/*
+ * mcasp_cfg.h
+ *
+ * This file contains Application programming interface for the Audio application
+ * related EVM (platform) specifc initialization routines
+ *
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/**
+ * \file Audio_evmInit.h
+ *
+ * \brief This file contains the board level functions of Audio driver.
+ *
+ * (C) Copyright 2009, Texas Instruments, Inc
+ *
+ */
+
+#ifndef _MCASP_CFG_H_
+#define _MCASP_CFG_H_
+
+#include <xdc/std.h>
+#include <string.h>
+#include <xdc/runtime/Log.h>
+#include <ti/sysbios/knl/Task.h>
+#include <ti/sysbios/io/GIO.h>
+#include <ti/sysbios/BIOS.h>
+#include <xdc/runtime/System.h>
+
+#include <mcasp_drv.h>
+#include <ti/sysbios/io/IOM.h>
+#include <Aic31.h>
+
+//#include <Audio.h>
+#include <ti/sdo/edma3/drv/edma3_drv.h>
+#include <ti/csl/csl_edma3.h>
+#include <ti/csl/soc.h>
+#include <ti/csl/csl_bootcfg.h>
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define MCASP_NUM 1
+#define EDMACC_NUM 0
+#define SOC_I2C_1_REGS CSL_I2C_0_DATA_CFG
+#define I2C_MCASP_INSTANCE 0
+
+#define AIC31_NUM_INSTANCES 1
+#define AIC31_INST0_ADDRESS 0x18
+
+#define MCASP_RX_DMA_CH 0
+#define MCASP_TX_DMA_CH 5
+
+extern void GblErr(int arg);
+extern Mcasp_HwSetupData mcaspRcvSetup;
+extern Mcasp_HwSetupData mcaspXmtSetup;
+extern Mcasp_ChanParams mcasp_chanparam[];
+extern ICodec_ChannelConfig AIC31_config;
+
+/** Number of serializers configured for record */
+
+#define RX_NUM_SERIALIZER (4u)
+#define TX_NUM_SERIALIZER (1u)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _AUDIO_EVMINIT_H_ */
+/* ========================================================================== */
+/* END OF FILE */
+/* ========================================================================== */
diff --git a/realtime_demo_bios/omapl137/include/mcasp_tune.h b/realtime_demo_bios/omapl137/include/mcasp_tune.h
--- /dev/null
@@ -0,0 +1,67 @@
+/*
+ * audioSample_io.c
+ *
+ * This file contains the test / demo code to demonstrate the Audio component
+ * driver functionality on SYS/BIOS 6.
+ *
+ * Copyright (C) 2009-2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/** \file mcasp_tune.h
+ *
+ * \brief sample application for demostration of audio playing
+ *
+ * This file contains the definitions for tuning the McASP performance.
+ *
+ * (C) Copyright 2009-2017, Texas Instruments, Inc
+ */
+
+/* ========================================================================== */
+/* INCLUDE FILES */
+/* ========================================================================== */
+#ifndef _MCASP_TUNE_H_
+#define _MCASP_TUNE_H_
+
+#include <xdc/std.h>
+#include "mcasp_osal.h"
+#include "mcasp_cfg.h"
+
+/* DMA event pacing. Only one in two DMA_REQ is sent to the EDMA controller. This
+ is an application specific configuration. This
+ should be a non zero number such that
+ (this ratio * num_serializers* mcasp word_size) <= Afifo_size_in_bytes (256).
+ In this demo we have chosen 2, but application may change this to fine tune their demo */
+#define TX_FIFO_EVENT_DMA_RATIO 1
+#define RX_FIFO_EVENT_DMA_RATIO 1
+
+#endif /* __MCASP_TUNE_H_ */
diff --git a/realtime_demo_bios/omapl137/include/pcm186x_if.h b/realtime_demo_bios/omapl137/include/pcm186x_if.h
--- /dev/null
@@ -0,0 +1,76 @@
+/**
+ * \file pcm186x_if.h
+ *
+ * \brief The macro definitions and function prototypes for
+ * configuring PCM186x ADC
+ *
+ * This file contains the implementation of the PCM186x ADC driver for
+ * DSP BIOS operating system.
+ *
+ * (C) Copyright 2017, Texas Instruments, Inc
+ */
+
+/*
+* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the
+* distribution.
+*
+* Neither the name of Texas Instruments Incorporated nor the names of
+* its contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*/
+
+#ifndef _PCM186X_IF_H_
+#define _PCM186X_IF_H_
+
+/**************************************************************************
+** Macro Definitions
+**************************************************************************/
+/*
+** Macros for the clock tree for the audio input and output
+*/
+// AUXCLK master mode
+// AUXCLK (24Mhz, master) --> McASP1 (RX) --> PCM1864 (CMB U1/U2, slave)
+// AUXCLK (24Mhz, master) --> McASP1 (TX) --> AIC3106 (slave)
+#define AUXCLK_MASTER_MODE
+
+/*
+** Macros for the dataType variable to pass to AIC31DataConfig function
+*/
+#define PCM186X_DATATYPE_I2S (0u << 6u) /* I2S Mode */
+#define PCM186X_DATATYPE_DSP (1u << 6u) /* DSP Mode */
+#define PCM186X_DATATYPE_RIGHTJ (2u << 6u) /* Right Aligned Mode */
+#define PCM186X_DATATYPE_LEFTJ (3u << 6u) /* Left Aligned Mode */
+
+/**************************************************************************
+** API function Prototypes
+**************************************************************************/
+extern void PCM186XReset(unsigned int baseAddr);
+extern void PCM186XADCInit(void);
+
+#endif
+
+/***************************** End Of File ***********************************/
diff --git a/realtime_demo_bios/omapl137/make/makefile b/realtime_demo_bios/omapl137/make/makefile
--- /dev/null
@@ -0,0 +1,566 @@
+VOLIB_INSTALL_PATH ?= $(SDK_INSTALL_PATH)/volib_C64P_2_1_0_1\r
+AER_INSTALL_PATH ?= $(SDK_INSTALL_PATH)/aer_c64Px_obj_17_0_0_0\r
+\r
+GEN_OPTS__FLAG := --cmd_file="configPkg/compiler.opt"\r
+GEN_CMDS__FLAG := -l"configPkg/linker.cmd"\r
+\r
+ORDERED_OBJS += \
+"./I2C_soc.obj" \
+"./fil.obj" \
+"./mcasp_soc.obj" \
+"./mhm.obj" \
+"./mss.obj" \
+"./mssproc.obj" \
+"./sys.obj" \
+"./sysasnr.obj" \
+"./sysbf.obj" \
+"./sysbfflt.obj" \
+"./sysdrc.obj" \
+"./syseram.obj" \
+"./sysiram.obj" \
+"./sysmss.obj" \
+"./aic31.obj" \\r
+"./aic3106_if.obj" \\r
+"./audioSample_io.obj" \\r
+"./audioSample_main.obj" \\r
+"./audio_evmInit.obj" \\r
+"./mcasp_cfg.obj" \\r
+"./pcm186x_if.obj" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/BIOS.obj" \
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c62_TaskSupport_asm.obj" \
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c64p_Exception_asm.obj" \
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c64p_Hwi_asm.obj" \
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c64p_Hwi_asm_switch.obj" \
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c64p_Hwi_disp_always.obj" \
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/ti_tls_get_tp.obj" \
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/timer64_Timer_asm.obj" \
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/bflinker.cmd" \
+$(GEN_CMDS__FLAG) \
+-lti.addon.cmb.ae674 \
+-lti.board.ae674 \
+-lti.drv.mcasp.ae674 \
+-lti.drv.i2c.ae674 \
+-lti.csl.ae674 \
+-laer_c.ae64P \
+-lvau/lib/vau_c.ae64P \
+-lvpe/lib/vpe_a.ae64P \
+-lvpe/lib/vpe_c.ae64P \
+-lutil/lib/util_c.ae64P \
+-lmhm/lib/mhm_c.ae64P \
+-llibc.a \
+\r
+-include ../makefile.init\r
+\r
+OS := $(shell uname)\r
+ifeq ($(OS), Linux)\r
+RM := rm -f\r
+RMDIR := rm -d -f -r\r
+else\r
+RM := rm -f\r
+RMDIR := rm -r -f\r
+endif\r
+\r
+# All of the sources participating in the build are defined here\r
+## -include sources.mk\r
+\r
+\r
+## -include subdir_vars.mk\r
+# Add inputs and outputs from these tool invocations to the build variables \r
+CMD_SRCS += \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/bflinker.cmd \r
+\r
+CFG_SRCS += \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/OMAPL137_bf_rt.cfg \r
+\r
+C_SRCS += \\r
+$(PDK_INSTALL_PATH)/packages/ti/drv/i2c/soc/omapl137/I2C_soc.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/fil.c \\r
+$(PDK_INSTALL_PATH)/packages/ti/drv/mcasp/soc/omapl137/mcasp_soc.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mhm/src/mhm.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mss/src/mss.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mss/src/mssproc.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sys.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysasnr.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysbf.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysbfflt.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysdrc.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/syseram.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysiram.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysmss.c \r
+\r
+OBJS += \\r
+./I2C_soc.obj \\r
+./fil.obj \\r
+./mcasp_soc.obj \\r
+./mhm.obj \\r
+./mss.obj \\r
+./mssproc.obj \\r
+./sys.obj \\r
+./sysasnr.obj \\r
+./sysbf.obj \\r
+./sysbfflt.obj \\r
+./sysdrc.obj \\r
+./syseram.obj \\r
+./sysiram.obj \\r
+./sysmss.obj \r
+\r
+C_DEPS += \\r
+./I2C_soc.d \\r
+./fil.d \\r
+./mcasp_soc.d \\r
+./mhm.d \\r
+./mss.d \\r
+./mssproc.d \\r
+./sys.d \\r
+./sysasnr.d \\r
+./sysbf.d \\r
+./sysbfflt.d \\r
+./sysdrc.d \\r
+./syseram.d \\r
+./sysiram.d \\r
+./sysmss.d \r
+\r
+GEN_MISC_DIRS += \\r
+./configPkg/ \r
+\r
+GEN_CMDS += \\r
+./configPkg/linker.cmd \r
+\r
+GEN_OPTS += \\r
+./configPkg/compiler.opt \r
+\r
+GEN_FILES += \\r
+./configPkg/linker.cmd \\r
+./configPkg/compiler.opt \r
+\r
+GEN_FILES__QUOTED += \\r
+"configPkg\linker.cmd" \\r
+"configPkg\compiler.opt" \r
+\r
+GEN_MISC_DIRS__QUOTED += \\r
+"configPkg\" \r
+\r
+C_DEPS__QUOTED += \\r
+"I2C_soc.d" \\r
+"fil.d" \\r
+"mcasp_soc.d" \\r
+"mhm.d" \\r
+"mss.d" \\r
+"mssproc.d" \\r
+"sys.d" \\r
+"sysasnr.d" \\r
+"sysbf.d" \\r
+"sysbfflt.d" \\r
+"sysdrc.d" \\r
+"syseram.d" \\r
+"sysiram.d" \\r
+"sysmss.d" \r
+\r
+OBJS__QUOTED += \\r
+"I2C_soc.obj" \\r
+"fil.obj" \\r
+"mcasp_soc.obj" \\r
+"mhm.obj" \\r
+"mss.obj" \\r
+"mssproc.obj" \\r
+"sys.obj" \\r
+"sysasnr.obj" \\r
+"sysbf.obj" \\r
+"sysbfflt.obj" \\r
+"sysdrc.obj" \\r
+"syseram.obj" \\r
+"sysiram.obj" \\r
+"sysmss.obj" \r
+\r
+C_SRCS__QUOTED += \\r
+"$(PDK_INSTALL_PATH)/packages/ti/drv/i2c/soc/omapl137/I2C_soc.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/fil.c" \\r
+"$(PDK_INSTALL_PATH)/packages/ti/drv/mcasp/soc/omapl137/mcasp_soc.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mhm/src/mhm.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mss/src/mss.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mss/src/mssproc.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sys.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysasnr.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysbf.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysbfflt.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysdrc.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/syseram.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysiram.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysmss.c" \r
+\r
+\r
+## -include src/subdir_vars.mk\r
+# Add inputs and outputs from these tool invocations to the build variables \r
+C_SRCS += \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/aic31.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/aic3106_if.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audioSample_io.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audioSample_main.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audio_evmInit.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/mcasp_cfg.c \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/pcm186x_if.c \r
+\r
+OBJS += \\r
+./aic31.obj \\r
+./aic3106_if.obj \\r
+./audioSample_io.obj \\r
+./audioSample_main.obj \\r
+./audio_evmInit.obj \\r
+./mcasp_cfg.obj \\r
+./pcm186x_if.obj \r
+\r
+C_DEPS += \\r
+./aic31.d \\r
+./aic3106_if.d \\r
+./audioSample_io.d \\r
+./audioSample_main.d \\r
+./audio_evmInit.d \\r
+./mcasp_cfg.d \\r
+./pcm186x_if.d \r
+\r
+C_DEPS__QUOTED += \\r
+"aic31.d" \\r
+"aic3106_if.d" \\r
+"audioSample_io.d" \\r
+"audioSample_main.d" \\r
+"audio_evmInit.d" \\r
+"mcasp_cfg.d" \\r
+"pcm186x_if.d" \r
+\r
+OBJS__QUOTED += \\r
+"aic31.obj" \\r
+"aic3106_if.obj" \\r
+"audioSample_io.obj" \\r
+"audioSample_main.obj" \\r
+"audio_evmInit.obj" \\r
+"mcasp_cfg.obj" \\r
+"pcm186x_if.obj" \r
+\r
+C_SRCS__QUOTED += \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/aic31.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/aic3106_if.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audioSample_io.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audioSample_main.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audio_evmInit.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/mcasp_cfg.c" \\r
+"$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/pcm186x_if.c" \r
+\r
+\r
+## -include src/sysbios/subdir_vars.mk\r
+# Add inputs and outputs from these tool invocations to the build variables \r
+OBJ_SRCS += \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/BIOS.obj \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c62_TaskSupport_asm.obj \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c64p_Exception_asm.obj \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c64p_Hwi_asm.obj \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c64p_Hwi_asm_switch.obj \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/c64p_Hwi_disp_always.obj \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/ti_tls_get_tp.obj \\r
+$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/sysbios/timer64_Timer_asm.obj \r
+\r
+\r
+## -include subdir_rules.mk\r
+# Each subdirectory must supply rules for building sources it contributes\r
+I2C_soc.obj: $(PDK_INSTALL_PATH)/ti/drv/i2c/soc/omapl137/I2C_soc.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="I2C_soc.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+configPkg/linker.cmd: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/OMAPL137_bf_rt.cfg\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: XDCtools'\r
+ "$(XDC_INSTALL_PATH)/xs" --xdcpath="$(EDMA3LLD_BIOS6_INSTALLDIR)/packages;C:/ti/ccsv6/ccs_base;$(BIOS_INSTALL_PATH)/packages;$(UIA_INSTALL_PATH)/packages;$(PDK_INSTALL_PATH);$(XDAIS_INSTALL_PATH)/packages;$(XDAIS_INSTALL_PATH)/examples;$(VOLIB_INSTALL_PATH)/packages;$(AER_INSTALL_PATH)/packages;" xdc.tools.configuro -o configPkg -t ti.targets.elf.C674 -p ti.platforms.evmOMAPL137 -r debug -c "$(C6X_GEN_INSTALL_PATH)" "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+configPkg/compiler.opt: | configPkg/linker.cmd\r
+configPkg/: | configPkg/linker.cmd\r
+\r
+fil.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/fil.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="fil.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+mcasp_soc.obj: $(PDK_INSTALL_PATH)/ti/drv/mcasp/soc/omapl137/mcasp_soc.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="mcasp_soc.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+mhm.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mhm/src/mhm.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="mhm.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+mss.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mss/src/mss.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="mss.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+mssproc.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/mss/src/mssproc.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="mssproc.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+sys.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sys.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="sys.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+sysasnr.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysasnr.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="sysasnr.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+sysbf.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysbf.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="sysbf.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+sysbfflt.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysbfflt.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="sysbfflt.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+sysdrc.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysdrc.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="sysdrc.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+syseram.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/syseram.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="syseram.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+sysiram.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysiram.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="sysiram.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+sysmss.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components/sysmss.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="sysmss.d" $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+\r
+## -include src/subdir_rules.mk\r
+./aic31.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/aic31.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="aic31.d" --obj_directory="." $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+aic3106_if.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/aic3106_if.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="aic3106_if.d" --obj_directory="." $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+audioSample_io.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audioSample_io.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="audioSample_io.d" --obj_directory="." $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+audioSample_main.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audioSample_main.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="audioSample_main.d" --obj_directory="." $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+audio_evmInit.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/audio_evmInit.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="audio_evmInit.d" --obj_directory="." $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+mcasp_cfg.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/mcasp_cfg.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="mcasp_cfg.d" --obj_directory="." $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+pcm186x_if.obj: $(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/src/pcm186x_if.c $(GEN_OPTS) $(GEN_HDRS)\r
+ @echo 'Building file: $<'\r
+ @echo 'Invoking: C6000 Compiler'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 --include_path="$(C6X_GEN_INSTALL_PATH)/include" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/realtime_demo_bios/omapl137/include" --include_path="$(PDK_INSTALL_PATH)/ti/drv/mcasp" --include_path="$(PDK_INSTALL_PATH)/ti/board" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb" --include_path="$(PDK_INSTALL_PATH)/ti/addon/cmb/src/evmOMAPL137/include" --include_path="$(PDK_INSTALL_PATH)" --include_path="$(PDK_INSTALL_PATH)/ti/csl" --include_path="$(PROC_SDK_INSTALL_PATH)/demos/audio_preprocessing/common/components" -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number --preproc_with_compile --preproc_dependency="pcm186x_if.d" --obj_directory="." $(GEN_OPTS__FLAG) "$<"\r
+ @echo 'Finished building: $<'\r
+ @echo ' '\r
+\r
+\r
+## -include objects.mk\r
+USER_OBJS :=\r
+\r
+LIBS := -lti.addon.cmb.ae674 -lti.board.ae674 -lti.drv.mcasp.ae674 -lti.drv.i2c.ae674 -lti.csl.ae674 -laer_c.ae64P -lvau/lib/vau_c.ae64P -lvpe/lib/vpe_a.ae64P -lvpe/lib/vpe_c.ae64P -lutil/lib/util_c.ae64P -lmhm/lib/mhm_c.ae64P -llibc.a\r
+\r
+\r
+ifneq ($(MAKECMDGOALS),clean)\r
+ifneq ($(strip $(S_DEPS)),)\r
+-include $(S_DEPS)\r
+endif\r
+ifneq ($(strip $(S_UPPER_DEPS)),)\r
+-include $(S_UPPER_DEPS)\r
+endif\r
+ifneq ($(strip $(S62_DEPS)),)\r
+-include $(S62_DEPS)\r
+endif\r
+ifneq ($(strip $(C64_DEPS)),)\r
+-include $(C64_DEPS)\r
+endif\r
+ifneq ($(strip $(ASM_DEPS)),)\r
+-include $(ASM_DEPS)\r
+endif\r
+ifneq ($(strip $(CC_DEPS)),)\r
+-include $(CC_DEPS)\r
+endif\r
+ifneq ($(strip $(SV7A_DEPS)),)\r
+-include $(SV7A_DEPS)\r
+endif\r
+ifneq ($(strip $(S55_DEPS)),)\r
+-include $(S55_DEPS)\r
+endif\r
+ifneq ($(strip $(C67_DEPS)),)\r
+-include $(C67_DEPS)\r
+endif\r
+ifneq ($(strip $(CLA_DEPS)),)\r
+-include $(CLA_DEPS)\r
+endif\r
+ifneq ($(strip $(C??_DEPS)),)\r
+-include $(C??_DEPS)\r
+endif\r
+ifneq ($(strip $(CPP_DEPS)),)\r
+-include $(CPP_DEPS)\r
+endif\r
+ifneq ($(strip $(S??_DEPS)),)\r
+-include $(S??_DEPS)\r
+endif\r
+ifneq ($(strip $(C_DEPS)),)\r
+-include $(C_DEPS)\r
+endif\r
+ifneq ($(strip $(C62_DEPS)),)\r
+-include $(C62_DEPS)\r
+endif\r
+ifneq ($(strip $(CXX_DEPS)),)\r
+-include $(CXX_DEPS)\r
+endif\r
+ifneq ($(strip $(C++_DEPS)),)\r
+-include $(C++_DEPS)\r
+endif\r
+ifneq ($(strip $(ASM_UPPER_DEPS)),)\r
+-include $(ASM_UPPER_DEPS)\r
+endif\r
+ifneq ($(strip $(K_DEPS)),)\r
+-include $(K_DEPS)\r
+endif\r
+ifneq ($(strip $(C43_DEPS)),)\r
+-include $(C43_DEPS)\r
+endif\r
+ifneq ($(strip $(INO_DEPS)),)\r
+-include $(INO_DEPS)\r
+endif\r
+ifneq ($(strip $(S67_DEPS)),)\r
+-include $(S67_DEPS)\r
+endif\r
+ifneq ($(strip $(SA_DEPS)),)\r
+-include $(SA_DEPS)\r
+endif\r
+ifneq ($(strip $(S43_DEPS)),)\r
+-include $(S43_DEPS)\r
+endif\r
+ifneq ($(strip $(OPT_DEPS)),)\r
+-include $(OPT_DEPS)\r
+endif\r
+ifneq ($(strip $(PDE_DEPS)),)\r
+-include $(PDE_DEPS)\r
+endif\r
+ifneq ($(strip $(S64_DEPS)),)\r
+-include $(S64_DEPS)\r
+endif\r
+ifneq ($(strip $(C_UPPER_DEPS)),)\r
+-include $(C_UPPER_DEPS)\r
+endif\r
+ifneq ($(strip $(C55_DEPS)),)\r
+-include $(C55_DEPS)\r
+endif\r
+endif\r
+\r
+-include ../makefile.defs\r
+\r
+# Add inputs and outputs from these tool invocations to the build variables \r
+EXE_OUTPUTS += \
+OMAPL137_bf_rt.out \
+\r
+EXE_OUTPUTS__QUOTED += \
+"OMAPL137_bf_rt.out" \
+\r
+BIN_OUTPUTS += \
+OMAPL137_bf_rt.hex \
+\r
+BIN_OUTPUTS__QUOTED += \
+"OMAPL137_bf_rt.hex" \
+\r
+\r
+# All Target\r
+all: OMAPL137_bf_rt.out\r
+\r
+# Tool invocations\r
+OMAPL137_bf_rt.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)\r
+ @echo 'Building target: $@'\r
+ @echo 'Invoking: C6000 Linker'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/cl6x" -mv6740 --abi=eabi --opt_for_speed=5 -g --define=DEVICE_OMAPL137 --define=SOC_OMAPL137 --define=evmOMAPL137 --define=PLATFORM_INIT_IN --define=BUILD_DSP --define=CMB_AUDIO_DAC=1 --define=AIC_CODEC --define=MCASP_MASTER --define=omapl137 --define=ti_targets_C64P --diag_wrap=off --diag_warning=225 --display_error_number -z -m"OMAPL137_bf_rt.map" --stack_size=0x2000 --heap_size=0x800 -i"$(C6X_GEN_INSTALL_PATH)/lib" -i"$(XDC_INSTALL_PATH)/lib" -i"$(C6X_GEN_INSTALL_PATH)/include" -i"$(PDK_INSTALL_PATH)/ti/board/lib/evmOMAPL137/c674/release" -i"$(PDK_INSTALL_PATH)/ti/addon/cmb/lib/omapl137/c674/release" -i"$(PDK_INSTALL_PATH)/ti/drv/mcasp/lib/omapl137/c674/release" -i"$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/omapl137/c674/release" -i"$(PDK_INSTALL_PATH)/ti/csl/lib/omapl137/c674/release" -i"$(AER_INSTALL_PATH)/packages/ti/mas/aer/lib" -i"$(VOLIB_INSTALL_PATH)/packages/ti/mas/" --reread_libs --define=DSP_CORE=1 --diag_wrap=off --warn_sections --display_error_number --xml_link_info="OMAPL137_bf_rt_linkInfo.xml" --rom_model -o "OMAPL137_bf_rt.out" $(ORDERED_OBJS)\r
+ @echo 'Finished building target: $@'\r
+ @echo ' '\r
+\r
+OMAPL137_bf_rt.hex: $(EXE_OUTPUTS)\r
+ @echo 'Invoking: C6000 Hex Utility'\r
+ "$(C6X_GEN_INSTALL_PATH)/bin/hex6x" -o "OMAPL137_bf_rt.hex" $(EXE_OUTPUTS__QUOTED)\r
+ @echo 'Finished building: $@'\r
+ @echo ' '\r
+\r
+# Other Targets\r
+clean:\r
+ -$(RM) $(GEN_MISC_FILES__QUOTED)$(EXE_OUTPUTS__QUOTED)$(GEN_FILES__QUOTED)$(BIN_OUTPUTS__QUOTED)$(GEN_OPTS__QUOTED)$(GEN_CMDS__QUOTED)\r
+ -$(RMDIR) $(GEN_MISC_DIRS__QUOTED)\r
+ -$(RM) "I2C_soc.d" "fil.d" "mcasp_soc.d" "mhm.d" "mss.d" "mssproc.d" "sys.d" "sysasnr.d" "sysbf.d" "sysbfflt.d" "sysdrc.d" "syseram.d" "sysiram.d" "sysmss.d" "aic31.d" "aic3106_if.d" "audioSample_io.d" "audioSample_main.d" "audio_evmInit.d" "mcasp_cfg.d" "pcm186x_if.d" \r
+ -$(RM) "I2C_soc.obj" "fil.obj" "mcasp_soc.obj" "mhm.obj" "mss.obj" "mssproc.obj" "sys.obj" "sysasnr.obj" "sysbf.obj" "sysbfflt.obj" "sysdrc.obj" "syseram.obj" "sysiram.obj" "sysmss.obj" "aic31.obj" "aic3106_if.obj" "audioSample_io.obj" "audioSample_main.obj" "audio_evmInit.obj" "mcasp_cfg.obj" "pcm186x_if.obj" \r
+ -@echo 'Finished clean'\r
+ -@echo ' '\r
+\r
+.PHONY: all clean dependents\r
+.SECONDARY:\r
+\r
+-include ../makefile.targets\r
+\r
diff --git a/realtime_demo_bios/omapl137/src/.exclude b/realtime_demo_bios/omapl137/src/.exclude
--- /dev/null
@@ -0,0 +1 @@
+This file exists to prevent Eclipse/CDT from adding the C sources contained in this directory (or below) to any enclosing project.
diff --git a/realtime_demo_bios/omapl137/src/aic31.c b/realtime_demo_bios/omapl137/src/aic31.c
--- /dev/null
@@ -0,0 +1,2360 @@
+/*
+ * Aic31.c
+ *
+ * This file contains Driver Layer Interface implementation for Aic3106 codec
+ * Driver. Aic3106 Codec Driver provides Driver Layer Interface to do operations
+ * on the Aic3106 peripheral like device initialization, channel creation,
+ * control commands for peripheral specific operations etc
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/** \file Aic31.c
+ *
+ * \brief Implementation of the IOM for the AIC31 audio codec.
+ *
+ * This file contains the implementation of the AIC31 audio codec driver for
+ * DSP BIOS operating system.
+ *
+ * (C) Copyright 2009, Texas Instruments, Inc
+ */
+
+/* ========================================================================== */
+/* INCLUDE FILES */
+/* ========================================================================== */
+#define SW_I2C
+#include <xdc/std.h>
+#include <ti/sysbios/io/IOM.h>
+#include <assert.h>
+#include <string.h>
+#include <ti/sysbios/knl/Semaphore.h>
+#include <ti/sysbios/io/GIO.h>
+
+#ifndef SW_I2C
+#include <i2c/include/I2c.h>
+#else
+//#include <include/i2c.h>
+#endif /* SW_I2C */
+
+
+#include <Aic31.h>
+#include <ICodec.h>
+#include <Aic31Local.h>
+
+#ifdef SW_I2C
+#include <ti/csl/cslr_device.h>
+#include <codec_if.h>
+#include <mcasp_cfg.h>
+#include <aic31_if.h>
+#include "cmb.h"
+
+#endif /* SW_I2C */
+
+#ifdef SW_I2C
+extern void I2CCodecIsr(void);
+extern unsigned int I2C_slaveAddr;
+#endif /* SW_I2C */
+
+/* -------- constants -------- */
+const Aic31_Params Aic31_PARAMS = {
+ ICodec_CodecType_AIC31, /* acType */
+ ICodec_ControlBusType_I2C, /* acControlBusType */
+ "NONE", /* acCtrlBusName */
+#if defined (MCASP_MASTER)
+ ICodec_OpMode_SLAVE, /* acOpMode */
+#else // MCASP is slave
+ ICodec_OpMode_MASTER, /* acOpMode */
+#endif
+#if defined DSP_MODE
+ ICodec_DataType_DSP,
+ (uint32_t)ICodec_SlotWidth_16, /* acSlotWidth */
+#else
+ ICodec_DataType_I2S, /* acSerialDataType */
+ (uint32_t)ICodec_SlotWidth_32, /* acSlotWidth */
+#endif
+ ICodec_DataPath_TX, /* acDataPath */
+ 0, /* isRxTxClockIndependent */
+};
+
+/* ========================================================================== */
+/* GLOBAL MODULE STATE */
+/* ========================================================================== */
+/**
+ * \brief Array which is part of Aic31 Module State
+ */
+static Bool inUse[AIC31_NUM_INSTANCES];
+/**
+ * \brief Aic31 Module State Object
+ */
+static Aic31_Module_State Aic31_module = {&inUse[0]};
+/**
+ * \brief Array of Aic31 instance State objects array
+ */
+static Aic31_Object Aic31_Instances[AIC31_NUM_INSTANCES];
+/**
+ * \brief Array for per instance device information
+ */
+Aic31_HwInfo Aic31_deviceInstInfo[AIC31_NUM_INSTANCES];
+
+/* ========================================================================== */
+/* Aic31 Local Functions Definitions */
+/* ========================================================================== */
+/* ========================================================================== */
+/* LOCAL FUNCTION PROTOTYPES */
+/* ========================================================================== */
+ Int aic31MdBindDev(Ptr *devp, Int devId, Ptr devParams);
+ Int aic31MdUnBindDev(Ptr devp);
+ Int aic31MdCreateChan(
+ Ptr *chanp,
+ Ptr devp,
+ String name,
+ Int mode,
+ Ptr chanParams,
+ IOM_TiomCallback cbFxn,
+ Ptr cbArg
+ );
+ Int aic31MdDeleteChan(Ptr chanp);
+ Int aic31MdSubmitChan(Ptr chanp, IOM_Packet *ioPacket);
+ Int aic31MdControlChan(Ptr chanp, Uns cmd, Ptr cmdArgs);
+
+
+static Bool aic31I2cWrite(Aic31_Object *instHandle,
+ uint32_t deviceId,
+ ICodec_RegData *wrRegData);
+
+static Bool aic31RegWrite(Aic31_Object *instHandle,
+ uint8_t regAddr,
+ uint8_t regData);
+
+static Bool aic31I2cRead(Aic31_Object *instHandle,
+ uint32_t deviceId,
+ ICodec_RegData *rdRegData);
+
+static Bool aic31RegRead(Aic31_Object *instHandle,
+ uint8_t regAddr,
+ uint8_t *regData);
+
+static Bool aic31CtrlBusWrite(Aic31_Object *instHandle,
+ ICodec_RegData *wrRegData);
+
+static Bool aic31CtrlBusRead(Aic31_Object *instHandle,
+ ICodec_RegData *rdRegData);
+
+static int32_t aic31MuteConfig(Aic31_Object *instHandle,
+ ICodec_Channel acChannel,
+ Bool muteConfig);
+
+static int32_t aic31SetSamplingRate(Aic31_Object *instHandle,
+ ICodec_Channel acChannel,
+ uint32_t sampleRate);
+
+#ifndef SW_I2C
+static int32_t aic31InitAdc (Aic31_Object *instHandle);
+
+static int32_t aic31InitDac (Aic31_Object *instHandle);
+
+static int32_t aic31DeinitAdc(Aic31_Object *instHandle);
+
+static int32_t aic31DeinitDac(Aic31_Object *instHandle);
+
+static Void aic31CallBack (Ptr semHandle, IOM_Packet * ioPacket);
+#endif /* SW_I2C */
+
+static Bool aic31RegWriteBf(Aic31_Object *instHandle,
+ uint8_t regAddr,
+ uint8_t bfPosition,
+ uint8_t bfSize,
+ uint8_t bfData);
+
+static int32_t aic31SelectInputSource(Aic31_Object *instHandle,
+ Ptr srcOption);
+
+static int32_t aic31SelectOutputDest(Aic31_Object *instHandle,
+ Ptr destOption);
+
+
+/**
+ * \brief IOM function pointer table.
+ *
+ * This variables is the array of function pointers of all the IOM
+ * functions implemented by the codec driver.
+ *
+ */
+
+const IOM_Fxns Aic31_IOMFXNS =
+{
+ &aic31MdBindDev,
+ &aic31MdUnBindDev,
+ &aic31MdControlChan,
+ &aic31MdCreateChan,
+ &aic31MdDeleteChan,
+ &aic31MdSubmitChan,
+};
+
+
+
+/* ========================================================================== */
+/* FUNCTION DEFINTIONS */
+/* ========================================================================== */
+/**
+ * \brief Function called by Bios during instance initialisation
+ *
+ */
+Void Aic31_init(Void)
+{
+ Int i;
+
+ for (i = 0; i < AIC31_NUM_INSTANCES; i++)
+ {
+ /* have to initialize statically */
+ Aic31_module.inUse[i] = FALSE;
+ memset((Void *)&Aic31_Instances[i], 0x0, sizeof(Aic31_Object));
+ }
+
+ Aic31_deviceInstInfo[0].deviceAddress = (uint32_t)AIC31_INST0_ADDRESS;
+
+}
+
+/**
+ * \brief Function called by Bios during instance initialisation
+ *
+ * \param devp [OUT] Pointer to the codec driver object
+ * \param devId [IN] instance number of the codec
+ * \param devParams [IN] Device parameters passed by the user
+ *
+ * \return IOM_COMPLETED if success
+ * Error ID in case of error
+ */
+ Int aic31MdBindDev(Ptr *devp, Int devId, Ptr devParams)
+{
+ int32_t retVal = IOM_COMPLETED;
+ Aic31_Params *params = NULL;
+ uint32_t count = 0;
+ Aic31_Object *instHandle = NULL;
+
+/* Begin parameter checking */
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if ((NULL == devp) ||
+ (AIC31_NUM_INSTANCES <= devId) ||
+ (TRUE == Aic31_module.inUse[devId]))
+ {
+ retVal = IOM_EBADARGS;
+ }
+#endif /* PSP_DISABLE_INPUT_PARAMETER_CHECK */
+/* End parameter checking */
+
+ if (IOM_COMPLETED == retVal)
+ {
+ instHandle = &Aic31_Instances[devId];
+
+ if (devParams == NULL)
+ {
+ params = (Aic31_Params*)&Aic31_PARAMS;
+ }
+ else
+ {
+ params = (Aic31_Params*) devParams;
+ }
+
+ Aic31_module.inUse[devId] = TRUE;
+
+ /* copy the initialization parameters */
+ instHandle->acType = params->acType;
+ instHandle->instNum = (uint8_t)devId;
+ instHandle->acControlBusType = params->acControlBusType;
+ instHandle->acCtrlBusName = params->acCtrlBusName;
+ instHandle->acOpMode = params->acOpMode;
+ instHandle->acSerialDataType = params->acSerialDataType;
+ instHandle->acSlotWidth = params->acSlotWidth;
+ instHandle->acDataPath = params->acDataPath;
+ instHandle->isRxTxClockIndependent = params->isRxTxClockIndependent;
+ instHandle->acCodecId = Aic31_deviceInstInfo[devId].deviceAddress;
+
+#ifdef SW_I2C
+ instHandle->acCtrlBusInstNum = params->acCtrlBusInstNum;
+
+ if (instHandle->acControlBusType == ICodec_ControlBusType_I2C)
+ {
+ if (instHandle->acCtrlBusInstNum == 0)
+ {
+ instHandle->acBaseAddress = SOC_I2C_1_REGS;
+ }
+ else
+ {
+ retVal = IOM_EBADARGS;
+ }
+ }
+ else
+ {
+ /* Only 'ICodec_ControlBusType_I2C' suppoted currently */
+ retVal = IOM_EBADARGS;
+ }
+#endif /* SW_I2C */
+
+ for (count = 0; count < ICodec_Channel_MAX; count++)
+ {
+ /* Set the state of both the channels as closed */
+ instHandle->ChanObj[count].chanStatus = ICodec_DriverState_CLOSED;
+ instHandle->ChanObj[count].channelMode = ICodec_Channel_MAX;
+ instHandle->ChanObj[count].samplingRate = 0;
+ instHandle->ChanObj[count].chanGain = 0;
+ instHandle->ChanObj[count].devHandle = NULL;
+ }
+
+ instHandle->hCtrlBus = NULL;
+ instHandle->acCtrlBusHandle = NULL;
+
+ /* set the state of the driver as created */
+ instHandle->devState = ICodec_DriverState_CREATED;
+ *devp = instHandle;
+ }
+ else
+ {
+ retVal = IOM_EBADIO;
+
+ if (NULL != devp)
+ {
+ *devp = NULL;
+ }
+ }
+
+ return (retVal);
+}
+
+/**
+ * \brief Function called by Bios during closing of the instance
+ *
+ * \param devp [IN] Pointer to the driver instance object.
+ *
+ * \return None
+ */
+
+ Int aic31MdUnBindDev(Ptr devp)
+{
+ Aic31_Object *instHandle = NULL;
+ int32_t retVal = IOM_COMPLETED;
+
+/* Begin parameter checking */
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if (NULL == devp)
+ {
+ retVal = IOM_EBADARGS;
+ }
+ else
+ {
+#endif
+ instHandle = (Aic31_Object *)devp;
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if ((NULL == instHandle) ||
+ (AIC31_NUM_INSTANCES <= instHandle->instNum) ||
+ (ICodec_DriverState_CREATED != instHandle->devState) ||
+ (instHandle->ChanObj[0].chanStatus != ICodec_DriverState_CLOSED) ||
+ (instHandle->ChanObj[1].chanStatus != ICodec_DriverState_CLOSED))
+ {
+ retVal = IOM_EBADARGS;
+ }
+ }
+#endif /* PSP_DISABLE_INPUT_PARAMETER_CHECK */
+/* End parameter checking */
+
+ if (IOM_COMPLETED == retVal)
+ {
+ instHandle->devState = ICodec_DriverState_DELETED;
+ Aic31_module.inUse[instHandle->instNum] = FALSE;
+ }
+
+ return (retVal);
+}
+
+/* ========================================================================== */
+/* IOM FUNCTIONS */
+/* ========================================================================== */
+
+/**
+ * \brief This function configures the RX or TX portion of the Aic31 codec
+ *
+ * This function internally uses a control bus to configure the codec. The
+ * control bus could be either SPI or I2c etc.The open function configures the
+ * DAC and ADC sections of the codec accordingly
+ *
+ * \param chanp [OUT] pointer to Aic31 driver channel handle
+ * \param devp [IN] pointer to Aic31 driver object
+ * \param name [IN] Aic31 Instance name
+ * \param mode [IN] channel mode -> input or output
+ * \param chanParams [IN] channel parameters from user
+ * \param cbFxn [IN] callback function pointer
+ * \param cbArg [IN] callback function Arguments
+ *
+ * \return Channel handle if successful
+ * NULL in case of error
+ */
+ Int aic31MdCreateChan(Ptr *chanp,
+ Ptr devp,
+ String name,
+ Int mode,
+ Ptr chanParams,
+ IOM_TiomCallback cbFxn,
+ Ptr cbArg)
+{
+ Aic31_Object *instHandle = NULL;
+ ICodec_ChannelConfig *acChanConfig = NULL;
+ Aic31_Channel_Object *chanHandle = NULL;
+ int32_t result = IOM_COMPLETED;
+ Cmb_STATUS status;
+
+#ifndef SW_I2C
+ String remName = NULL;
+ uint8_t tempData = 0;
+ I2c_ChanParams i2cChanPrms = {0};
+ Bool retVal = (Bool)Aic31_REG_WRITE_FAIL;
+ IOM_Fxns *iomFxns;
+ Ptr devicepointer;
+#endif /* SW_I2C */
+
+
+/* Begin parameter checking */
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if ((NULL == devp) ||
+ (NULL == chanParams) ||
+ ((IOM_INPUT != mode) && (IOM_OUTPUT != mode)))
+ {
+ result = IOM_EBADARGS;
+ }
+ else
+ {
+#endif
+ instHandle = (Aic31_Object *)devp;
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if ((NULL == instHandle) ||
+ (ICodec_DriverState_CREATED != instHandle->devState) ||
+ (ICodec_DriverState_CLOSED != instHandle->ChanObj[mode-1].chanStatus))
+ {
+ result = IOM_EBADARGS;
+ }
+ }
+#endif /* PSP_DISABLE_INPUT_PARAMETER_CHECK */
+/* End parameter checking */
+
+ /* mode is mode-1 because IOM.h defines input=1; output=2 */
+ mode = mode -1;
+
+ /* validate the input parameters and return in case of error */
+ if (IOM_COMPLETED == result)
+ {
+#ifdef SW_I2C
+
+ acChanConfig = (ICodec_ChannelConfig *)chanParams;
+
+ /* To remove the compiler warning */
+ if ((NULL != cbFxn) && (NULL != cbArg))
+ {
+ //cbFxn = cbFxn;
+ //cbArg = cbArg;
+ }
+
+ /* copy the initial parameters to the channel */
+ instHandle->ChanObj[mode].samplingRate = acChanConfig->samplingRate;
+ instHandle->ChanObj[mode].chanGain = acChanConfig->chanGain;
+
+ /* Configure I2C interface for CODEC */
+ I2CCodecIfInit (instHandle->acBaseAddress, 2, instHandle->acCodecId);
+ I2C_slaveAddr = instHandle->acCodecId;
+
+ /* Configure the Codec for I2S mode */
+ AIC31Reset(instHandle->acBaseAddress);
+
+ /* Configure the data format and sampling rate */
+ AIC31DataConfig(instHandle->acBaseAddress,
+ instHandle->acSerialDataType,
+ instHandle->acSlotWidth,
+ 0);
+
+ if (instHandle->acDataPath == ICodec_DataPath_TX)
+ {
+ if (ICodec_OpMode_MASTER == instHandle->acOpMode)
+ {
+ AIC31SampleRateConfig(instHandle->acBaseAddress,
+ AIC31_MODE_DAC,
+ acChanConfig->samplingRate);
+ }
+
+#if 0
+ /* Initialize DAC */
+ AIC31DACInit(instHandle->acBaseAddress);
+#else
+ status = (Cmb_STATUS)cmb_AudioDacInit(CMB_DAC_DEVICE_0);
+ if(status != Cmb_EOK)
+ {
+ IFPRINT(cmb_write("audioDacConfig : audioDacConfig Failed\n"));
+ return status;
+ }
+#endif
+ }
+ else if (instHandle->acDataPath == ICodec_DataPath_RX)
+ {
+ if (ICodec_OpMode_MASTER == instHandle->acOpMode)
+ {
+ AIC31SampleRateConfig(instHandle->acBaseAddress,
+ AIC31_MODE_ADC,
+ acChanConfig->samplingRate);
+ }
+
+ /* Initialize ADC */
+ AIC31ADCInit(instHandle->acBaseAddress);
+ }
+ else
+ {
+ if (ICodec_OpMode_MASTER == instHandle->acOpMode)
+ {
+ AIC31SampleRateConfig(instHandle->acBaseAddress,
+ AIC31_MODE_BOTH,
+ acChanConfig->samplingRate);
+ }
+
+ /* Do the default configuration for ADC section */
+ AIC31ADCInit(instHandle->acBaseAddress);
+ /* Do the default initialization for DAC section */
+#if 0
+ AIC31DACInit(instHandle->acBaseAddress);
+#else
+ status = (Cmb_STATUS)cmb_AudioDacInit(CMB_DAC_DEVICE_0);
+ if(status != Cmb_EOK)
+ {
+ IFPRINT(cmb_write("audioDacConfig : audioDacConfig Failed\n"));
+ return status;
+ }
+#endif
+ }
+#else
+ acChanConfig = (ICodec_ChannelConfig *)chanParams;
+
+ /* To remove the compiler warning */
+ if ((NULL != cbFxn) && (NULL != cbArg))
+ {
+ cbFxn = cbFxn;
+ cbArg = cbArg;
+ }
+
+ /* copy the initial parameters to the channel */
+ instHandle->ChanObj[mode].samplingRate = acChanConfig->samplingRate;
+ instHandle->ChanObj[mode].chanGain = acChanConfig->chanGain;
+
+ /* If either of the Tx or Rx channel is already open, then in this*
+ * function call, there is no need to do any configuration. */
+ if ((instHandle->ChanObj[0].chanStatus == ICodec_DriverState_CLOSED)
+ &&(instHandle->ChanObj[1].chanStatus == ICodec_DriverState_CLOSED))
+ {
+
+ Semaphore_construct(&(instHandle->semObj), 0, NULL);
+
+ /* These variables are not used as no callback is required by *
+ * the codec since it does not support the submit call.hence *
+ * to remove the warning by compiler of unused variables we *
+ * do a dummy assign */
+ if (NULL != name)
+ {
+ name = name;
+ }
+
+ /* we have to open the control bus to the codec so that we can*
+ * use the handle and configure the codec */
+ remName = DEV_match(
+ instHandle->acCtrlBusName,
+ &instHandle->acCtrlBusHandle);
+
+ if ((NULL == instHandle->acCtrlBusHandle) ||
+ (NULL == remName))
+ {
+ result = IOM_EBADARGS;
+ }
+ else
+ {
+ iomFxns = DEV_getFxns(instHandle->acCtrlBusHandle);
+ devicepointer = DEV_getDevp(instHandle->acCtrlBusHandle);
+
+ if (ICodec_ControlBusType_I2C == instHandle->acControlBusType)
+ {
+ i2cChanPrms.hEdma = NULL;
+ i2cChanPrms.masterOrSlave = I2c_CommMode_MASTER;
+
+ /* driver handle obtained from the name of the device */
+ result = ((IOM_Fxns*)iomFxns)-> \
+ mdCreateChan(
+ &instHandle->hCtrlBus,
+ devicepointer,
+ remName,
+ IOM_INOUT,
+ &i2cChanPrms,
+ &aic31CallBack,
+ (Ptr)(&instHandle->semObj));
+ }
+ else
+ {
+ result = IOM_EBADMODE;
+ }
+
+ if (NULL == instHandle->hCtrlBus)
+ {
+ result = IOM_EBADARGS;
+ }
+
+ }
+
+ /* if the control bus was opened sucesfully then we will *
+ * start the configuration of the codec */
+ if (IOM_COMPLETED == result)
+ {
+ /* Select Register Page 0 of Aic31 */
+ retVal = aic31RegWrite(
+ instHandle,
+ Aic31_PAGE_SELECT_ADDR,
+ Aic31_PAGE_0);
+
+ /* Reset the Aic31 */
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_P0_REG1,
+ (uint8_t)0x80);
+
+ /* If Aic31 is master mode then set the direction of *
+ * the bit clock and word clock as output */
+ if (ICodec_OpMode_MASTER == instHandle->acOpMode)
+ {
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_SERIAL_INTERFACEA_ADDR,
+ (uint8_t)6,
+ (uint8_t)2,
+ (uint8_t)3);
+ }
+
+ /* Configure the audio serial data interface mode */
+ switch (instHandle->acSerialDataType)
+ {
+ case ICodec_DataType_I2S: tempData = (0u << 6u); break;
+ case ICodec_DataType_DSP: tempData = (1u << 6u); break;
+ case ICodec_DataType_RIGHTJ: tempData = (2u << 6u); break;
+ case ICodec_DataType_LEFTJ: tempData = (3u << 6u); break;
+ default: tempData = (0u << 6u); break;
+ }
+
+ /* configure the slot width */
+ switch (instHandle->acSlotWidth)
+ {
+ case ICodec_SlotWidth_16: tempData |= (0u << 4u); break;
+ case ICodec_SlotWidth_20: tempData |= (1u << 4u); break;
+ case ICodec_SlotWidth_24: tempData |= (2u << 4u); break;
+ case ICodec_SlotWidth_32: tempData |= (3u << 4u); break;
+ default: tempData |= (0x00 << 4); break;
+ }
+
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_SERIAL_INTERFACEB_ADDR,
+ tempData);
+
+ if (Aic31_REG_WRITE_FAIL == retVal)
+ {
+ result = IOM_EBADARGS;
+ }
+ }
+ }
+
+ if (IOM_COMPLETED == result)
+ {
+ /* Configure the sampling rate of the audio codec */
+ result = aic31SetSamplingRate(
+ instHandle,
+ (ICodec_Channel)(mode),
+ acChanConfig->samplingRate);
+
+ /* Complete the default initialization for Tx and RX channels */
+ if (IOM_COMPLETED == result)
+ {
+ if (ICodec_Channel_INPUT == mode)
+ {
+ /* Do the default configuration for ADC section */
+ result = aic31InitAdc(instHandle);
+ }
+ else
+ {
+ /* Do the default initialization for DAC section */
+ result = aic31InitDac(instHandle);
+ }
+ }
+ }
+#endif /* SW_I2C */
+ }
+
+ /* Return the result of opening the audio codec */
+ if (IOM_COMPLETED == result )
+ {
+ /* The channel creation is successful hence update the handle */
+ instHandle->ChanObj[mode].chanStatus = ICodec_DriverState_OPENED;
+ instHandle->ChanObj[mode].channelMode = (ICodec_Channel)(mode);
+ instHandle->ChanObj[mode].devHandle = instHandle;
+
+ chanHandle = &instHandle->ChanObj[mode];
+ *chanp = chanHandle;
+ }
+ else
+ {
+ chanHandle = NULL;
+ *chanp = NULL;
+ }
+
+ /* Return the channel handle */
+ return (result);
+}
+
+
+/**
+ * This function executes a control command specified by the application. The
+ * channel handle obtained after the channel open call should be passed as the
+ * parameter.
+ *
+ * \param instHandle [IN] Pointer to the Aic31 driver instance object
+ * \param chanp [IN] Handle to the channel
+ * \param cmd [IN] command to be executed
+ * \param cmdArgs [IN] Arguments for the command(if required)
+ * \param eb [OUT] error block
+ *
+ * \return None
+ */
+ Int aic31MdControlChan(Ptr chanp, Uns cmd, Ptr cmdArgs)
+{
+ Aic31_Object *instHandle = NULL;
+ Aic31_Channel_Object *chanHandle = NULL;
+ ICodec_RegData *wRegPtr = NULL;
+ Int status = IOM_COMPLETED;
+ uint32_t tempVal = 0;
+ ICodec_CodecData *codecData = NULL;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+/* Begin parameter checking */
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if (NULL == chanp)
+ {
+ status = IOM_EBADARGS;
+ }
+ else
+ {
+#endif /* PSP_DISABLE_INPUT_PARAMETER_CHECK */
+ chanHandle = (Aic31_Channel_Object*)chanp;
+ instHandle = (Aic31_Object *)chanHandle->devHandle;
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if (NULL == instHandle)
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+#endif /* PSP_DISABLE_INPUT_PARAMETER_CHECK */
+/* End parameter checking */
+
+ if (IOM_COMPLETED == status)
+ {
+ /* Interpret the control command and execute the comnand */
+ if (Aic31_AC_IOCTL_MUTE_ON == cmd)
+ {
+ status = aic31MuteConfig(instHandle,chanHandle->channelMode,TRUE);
+ }
+
+ else if (Aic31_AC_IOCTL_MUTE_OFF == cmd)
+ {
+ status = aic31MuteConfig(instHandle,chanHandle->channelMode,FALSE);
+ }
+
+ else if (Aic31_AC_IOCTL_SET_VOLUME == cmd)
+ {
+ if (NULL != cmdArgs)
+ {
+ if (ICodec_Channel_OUTPUT == chanHandle->channelMode)
+ {
+ /* calculate the actual values to be set depending on the *
+ * percentage of the values requested */
+ tempVal =
+ ((*(uint32_t*)cmdArgs) * Aic31_MAX_DAC_GAIN_VALUE)/100u;
+
+ tempVal = Aic31_MAX_DAC_GAIN_VALUE - tempVal;
+
+ retVal = aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG43,
+ (uint8_t)0,
+ (uint8_t)7,
+ (uint8_t)tempVal);
+
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG44,
+ (uint8_t)0,
+ (uint8_t)7,
+ (uint8_t)tempVal);
+ }
+ else if (ICodec_Channel_INPUT == chanHandle->channelMode)
+ {
+ /* calculate the actual values to be set depending on the *
+ * percentage of the values requested */
+ tempVal =
+ ((*(uint32_t*)cmdArgs) * Aic31_MAX_AGC_GAIN_VALUE)/100u;
+
+ /* modify the ADC volume */
+ retVal = aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG27,
+ (uint8_t)1,
+ (uint8_t)7,
+ (uint8_t)tempVal);
+
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG30,
+ (uint8_t)1,
+ (uint8_t)7,
+ (uint8_t)tempVal);
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+
+ if (Aic31_REG_WRITE_PASS != retVal)
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+ else if (Aic31_AC_IOCTL_SET_LOOPBACK == cmd)
+ {
+ /* Loopback not supported in Aic31 */
+ status = IOM_ENOTIMPL;
+ }
+
+ else if (Aic31_AC_IOCTL_SET_SAMPLERATE == cmd)
+ {
+ /* set the sample rate for the codec */
+ if (NULL != cmdArgs)
+ {
+ status = aic31SetSamplingRate(
+ instHandle,chanHandle->channelMode,
+ *(uint32_t *)cmdArgs);
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+
+ else if (Aic31_AC_IOCTL_REG_WRITE == cmd)
+ {
+ /* cmdArgs should be pointer to type ICodec_RegData */
+ if (NULL != cmdArgs)
+ {
+ /* Write a single Aic31 registe */
+ wRegPtr = (ICodec_RegData*)cmdArgs;
+ retVal = aic31RegWrite(
+ instHandle,
+ (uint8_t)wRegPtr->regIndex,
+ *(uint8_t*)(wRegPtr->regData));
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+
+ if (Aic31_REG_WRITE_PASS != retVal)
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+
+ else if (Aic31_AC_IOCTL_REG_WRITE_MULTIPLE == cmd)
+ {
+ /* Write multiple Aic31 register. */
+ /* cmdArgs should be pointer to type ICodec_RegData */
+ if (NULL != cmdArgs)
+ {
+ /* Write multiple Aic31 registers */
+ retVal = aic31CtrlBusWrite(
+ instHandle->hCtrlBus,
+ (ICodec_RegData *)cmdArgs);
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+
+ if (Aic31_REG_WRITE_PASS != retVal)
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+
+ else if (Aic31_AC_IOCTL_REG_READ == cmd)
+ {
+ /* cmdArgs should be pointer to type ICodec_RegData */
+ if (NULL != cmdArgs)
+ {
+ /* Write a single Aic31 registe */
+ wRegPtr = (ICodec_RegData*)cmdArgs;
+ retVal = aic31RegRead(
+ instHandle,
+ (uint8_t)wRegPtr->regIndex,
+ (uint8_t*)(wRegPtr->regData));
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+
+ if (Aic31_REG_WRITE_PASS != retVal)
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+ else if (Aic31_AC_IOCTL_REG_READ_MULTIPLE == cmd)
+ {
+ /* Read multiple Aic31 register. */
+ /* cmdArgs should be pointer to type ICodec_RegData */
+ if (NULL != cmdArgs)
+ {
+ /* Read multiple Aic31 registers */
+ retVal = aic31CtrlBusRead(
+ instHandle,
+ (ICodec_RegData *)cmdArgs);
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+ if (Aic31_REG_WRITE_PASS != retVal)
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+ else if (Aic31_AC_IOCTL_SELECT_OUTPUT_SOURCE == cmd)
+ {
+ aic31SelectOutputDest(instHandle,cmdArgs);
+ }
+ else if (Aic31_AC_IOCTL_SELECT_INPUT_SOURCE == cmd)
+ {
+ aic31SelectInputSource(instHandle,cmdArgs);
+ }
+ else if (Aic31_AC_IOCTL_GET_CODEC_INFO == cmd)
+ {
+ /* command is the request for the codec information */
+ if (NULL != cmdArgs)
+ {
+ codecData = (ICodec_CodecData *)cmdArgs;
+
+ /* update the required information to the provided pointer */
+ codecData->acOpMode = instHandle->acOpMode;
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+ }
+ else
+ {
+ /* The IOCTL is unrecognised or not implemented */
+ status = IOM_ENOTIMPL;
+ }
+ if (IOM_COMPLETED != status)
+ {
+ status = IOM_EBADARGS;
+ }
+ else
+ {
+ /* DO NOTHING */
+ }
+ }
+
+ /* return the status of the IOCTL executed */
+ return (status);
+}
+
+
+/**
+ * \brief This function is not implemented as codec does not perform any read
+ * or write operations
+ *
+ * \param instHandle [IN] Aic31 driver object
+ * \param chanp [IN] handle to the channel
+ * \param packet [IN] driver packet
+ * \param eb [OUT] error block
+ *
+ * \return IOM_ERROR - error as not implemeted.
+ */
+ Int aic31MdSubmitChan(Ptr chanp, IOM_Packet *ioPacket)
+{
+ /* to remove compiler warning */
+ if (NULL != chanp)
+ {
+ //chanp = chanp;
+ }
+
+ if (NULL != ioPacket)
+ {
+ //ioPacket = ioPacket;
+ }
+
+ /* not implemented */
+ return IOM_EBADIO;
+}
+
+
+/**
+ * \brief aic31MdDeleteChan
+ *
+ * This function closes an specified Audio Codec Channel. The audio codec
+ * is moved into programming mode and then reset when both the channels
+ * are closed. It deinitalizes the control bus instance.
+ *
+ * \param instHandle [IN] Aic31 driver object
+ * \param chanp [IN] handle to the channel
+ * \param eb [OUT] error block
+ *
+ * \return None
+ */
+ Int aic31MdDeleteChan(Ptr chanp)
+{
+ Aic31_Object *instHandle = NULL;
+ Aic31_Channel_Object *chanHandle = NULL;
+ Int retVal = IOM_COMPLETED;
+#ifndef SW_I2C
+ Bool status = Aic31_REG_WRITE_FAIL;
+ IOM_Fxns *iomFxns;
+#endif /* SW_I2C */
+
+/* Begin parameter checking */
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if (NULL == chanp)
+ {
+ retVal = IOM_EBADARGS;
+ }
+ else
+ {
+#endif /* PSP_DISABLE_INPUT_PARAMETER_CHECK */
+ chanHandle = (Aic31_Channel_Object*)chanp;
+ instHandle = chanHandle->devHandle;
+#ifndef PSP_DISABLE_INPUT_PARAMETER_CHECK
+ if ((NULL == instHandle) ||
+ (ICodec_DriverState_CLOSED == chanHandle->chanStatus))
+ {
+ retVal = IOM_EBADARGS;
+ }
+ }
+#endif /* PSP_DISABLE_INPUT_PARAMETER_CHECK */
+/* End parameter checking */
+
+ if (IOM_COMPLETED == retVal)
+ {
+ /* Write the reset value of Aic31 channel registers */
+ if (chanHandle->channelMode == ICodec_Channel_INPUT )
+ {
+ /* Reset the ADC registers */
+#ifndef SW_I2C
+ retVal = aic31DeinitAdc(instHandle);
+#else
+ AIC31ADCDeInit (instHandle->acBaseAddress);
+#endif /* SW_I2C */
+ }
+ else
+ {
+ /* Reset the DAC registers */
+#ifndef SW_I2C
+ retVal = aic31DeinitDac(instHandle);
+#else
+ AIC31DACDeInit (instHandle->acBaseAddress);
+#endif /* SW_I2C */
+ }
+ }
+
+
+ if (IOM_COMPLETED == retVal)
+ {
+ /* Set the state of the channel as closed */
+ chanHandle->chanStatus = ICodec_DriverState_CLOSED;
+
+ /* Reset Aic31 only if both the channels are closed. */
+ if ((ICodec_DriverState_CLOSED == instHandle->ChanObj[0].chanStatus)
+ && (ICodec_DriverState_CLOSED == instHandle->ChanObj[1].chanStatus))
+ {
+#ifndef SW_I2C
+ /* Select Register Page 0 of Aic31 */
+ status = aic31RegWrite(
+ instHandle,
+ Aic31_PAGE_SELECT_ADDR,
+ Aic31_PAGE_0);
+
+ /* Reset the Aic31 */
+ status |= aic31RegWrite(
+ instHandle,
+ Aic31_RESET_ADDR,
+ (uint8_t)0x80);
+
+ if (Aic31_REG_WRITE_FAIL == status)
+ {
+ retVal = IOM_EBADARGS;
+ }
+
+ iomFxns = DEV_getFxns(instHandle->acCtrlBusHandle);
+ ((IOM_Fxns*)iomFxns)->mdDeleteChan(
+ instHandle->hCtrlBus);
+#else
+ /* Configure the Codec for I2S mode */
+ AIC31Reset(instHandle->acBaseAddress);
+#endif /* SW_I2C */
+
+ /* The control bus handle is not valid anymore */
+ instHandle->hCtrlBus = NULL;
+ }
+ }
+
+ return (retVal);
+}
+
+/* ========================================================================== */
+/* Local Interface for Aic31 audio codec driver */
+/* ========================================================================== */
+
+
+/**
+ * \brief This function sets the sampling rate for the ADC and DAC. The ADC
+ * sampling rate is configured when called for input channel. The DAC
+ * sampling rate is configured when called for ouput channel.
+ *
+ * \param instHandle [IN] pointer to the aci31 instance handle
+ * \param acChannel [IN] operational mode of the channel
+ * \param sampleRate [IN] sample rate to be configured
+ * \param eb [OUT] Error block
+ */
+static int32_t aic31SetSamplingRate(Aic31_Object *instHandle,
+ ICodec_Channel acChannel,
+ uint32_t sampleRate)
+{
+ uint8_t pllPValue = 0;
+ uint8_t pllRValue = 0;
+ uint8_t pllJValue = 0;
+ uint8_t pllDLowValue = 0;
+ uint8_t pllDHighValue = 0;
+ uint8_t dualRate = 0x00;
+ uint8_t sampleRateDiv = 0;
+ uint8_t fsRef = 0;
+ int32_t status = IOM_COMPLETED;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+ assert(NULL != instHandle);
+
+ if ((ICodec_Channel_INPUT == acChannel) ||
+ (ICodec_Channel_OUTPUT == acChannel))
+ {
+
+ switch (sampleRate)
+ {
+ case 8000:
+ /* Set sampling rate to 8000Hz */
+ pllPValue = 4u;
+ pllRValue = 1u;
+ pllJValue = 16u;
+ pllDLowValue = 0u;
+ pllDHighValue = 0u;
+ dualRate = 0u;
+ fsRef = 0u;
+ sampleRateDiv = 10u;
+ break;
+
+ case 11025:
+ /* Set sampling rate to 11025Hz */
+ pllPValue = 2u;
+ pllRValue = 1u;
+ pllJValue = 7u;
+ pllDLowValue = 44u;
+ pllDHighValue = 54u;
+ dualRate = 0u;
+ fsRef = 1u;
+ sampleRateDiv = 6u;
+ break;
+
+ case 16000:
+ /* Set sampling rate to 16000Hz */
+ pllPValue = 4u;
+ pllRValue = 1u;
+ pllJValue = 16u;
+ pllDLowValue = 0u;
+ pllDHighValue = 0u;
+ dualRate = 0u;
+ fsRef = 0u;
+ sampleRateDiv = 4u;
+ break;
+
+ case 22050:
+ /* Set sampling rate to 22050Hz */
+ pllPValue = 2u;
+ pllRValue = 1u;
+ pllJValue = 7u;
+ pllDLowValue = 44u;
+ pllDHighValue = 54u;
+ dualRate = 0u;
+ fsRef = 1u;
+ sampleRateDiv = 2u;
+ break;
+
+ case 24000:
+ /* Set sampling rate to 24000Hz */
+ pllPValue = 4u;
+ pllRValue = 1u;
+ pllJValue = 16u;
+ pllDLowValue = 0u;
+ pllDHighValue = 0u;
+ dualRate = 0u;
+ fsRef = 0u;
+ sampleRateDiv = 2u;
+ break;
+
+ case 32000:
+ /* Set sampling rate to 32000Hz */
+ pllPValue = 4u;
+ pllRValue = 1u;
+ pllJValue = 16u;
+ pllDLowValue = 0u;
+ pllDHighValue = 0u;
+ dualRate = 0u;
+ fsRef = 0u;
+ sampleRateDiv = 1u;
+ break;
+
+ case 44100:
+ /* Set sampling rate to 44100Hz */
+ pllPValue = 2u;
+ pllRValue = 1u;
+ pllJValue = 7u;
+ pllDLowValue = 44u;
+ pllDHighValue = 54u;
+ dualRate = 0u;
+ fsRef = 1u;
+ sampleRateDiv = 0u;
+ break;
+
+ case 48000:
+ /* Set sampling rate to 48000Hz */
+ pllPValue = 4u;
+ pllRValue = 1u;
+ pllJValue = 16u;
+ pllDLowValue = 0u;
+ pllDHighValue = 0u;
+ dualRate = 0u;
+ fsRef = 0u;
+ sampleRateDiv = 0u;
+ break;
+
+ case 96000:
+ /* Set sampling rate to 96000Hz */
+ pllPValue = 4u;
+ pllRValue = 1u;
+ pllJValue = 16u;
+ pllDLowValue = 0u;
+ pllDHighValue = 0u;
+ dualRate = 1u;
+ fsRef = 0u;
+ sampleRateDiv = 0u;
+ break;
+ default:
+ /* Sampling rate is not supported */
+ status = IOM_EBADARGS;
+ break;
+ }
+
+ if (IOM_COMPLETED == status)
+ {
+ if (ICodec_Channel_INPUT == acChannel)
+ {
+ /* Write the ADC sample rate divisor value in Reg2 */
+ retVal= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG2,
+ (uint8_t)4,
+ (uint8_t)4,
+ sampleRateDiv);
+
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG7,
+ (uint8_t)6,
+ (uint8_t)1,
+ dualRate);
+ }
+ else
+ {
+ /* Write the DAC sample rate divisor value in Reg2 */
+ retVal = aic31RegWriteBf(
+ instHandle,Aic31_P0_REG2,
+ (uint8_t)0,
+ (uint8_t)4,
+ sampleRateDiv);
+
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG7,
+ (uint8_t)5,
+ (uint8_t)1,
+ dualRate);
+ }
+
+ /* enable the PLL */
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG3,
+ (uint8_t)7,
+ (uint8_t)1,
+ (uint8_t)1);
+
+ /* select the MCLK as the input for the PLL and CLKDIV(N = 16)*/
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG102,
+ (uint8_t)4,
+ (uint8_t)2,
+ (uint8_t)0x00);
+ /* select the PLL_IN as codec input */
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG101,
+ (uint8_t)0,
+ (uint8_t)1,
+ (uint8_t)0x00);
+
+
+ /* selec the GPIO to output the divided PLL_IN clock(test purpose)*/
+ retVal |= aic31RegWrite(instHandle,
+ Aic31_P0_REG98,
+ (uint8_t)0x20);
+
+ /* Write to PLL programming register A */
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG3,
+ (uint8_t)0,
+ (uint8_t)3,
+ pllPValue);
+
+ /* Write to PLL programming register B */
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG4,
+ (uint8_t)2,
+ (uint8_t)6,
+ pllJValue);
+
+ /* write the high and low bits of the D value */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG5,pllDHighValue);
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_P0_REG6,
+ (uint8_t)(pllDLowValue << 2));
+
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG11,
+ (uint8_t)0,
+ (uint8_t)4,
+ pllRValue);
+
+ /* Write to codec datapath setup register */
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG7,
+ (uint8_t)7,
+ (uint8_t)1,
+ fsRef);
+ }
+ }
+
+
+ if (Aic31_REG_WRITE_PASS == retVal)
+ {
+ status = IOM_COMPLETED;
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+
+ /* Return the result of setting the sampling rate */
+ return (status);
+}
+
+/**
+ * This function perfroms a register write(s) to the audio codec. The control
+ * bus is selected based on the parameter value selected.
+ *
+ * \param instHandle [IN] pointer to the aci31 instance handle
+ * \param wrRegData [OUT] data to be written to codec
+ *
+ * \return Aic31_REG_WRITE_PASS in case of success
+ * Aic31_REG_WRITE_FAIL in case of error
+ */
+static Bool aic31CtrlBusWrite(Aic31_Object *instHandle,
+ ICodec_RegData *wrRegData)
+{
+ ICodec_ControlBusType acCtrlBusType;
+ uint32_t deviceId;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+ assert((NULL != instHandle) && (NULL != wrRegData));
+
+ /* Initialize the local variables */
+ acCtrlBusType = instHandle->acControlBusType;
+ deviceId = instHandle->acCodecId;
+
+ if (ICodec_ControlBusType_I2C == acCtrlBusType)
+ {
+ retVal = aic31I2cWrite(instHandle,deviceId,wrRegData);
+ }
+ else if (ICodec_ControlBusType_SPI == acCtrlBusType)
+ {
+ /* Add SPI call here */
+ retVal = Aic31_REG_WRITE_FAIL;
+ }
+ else
+ {
+ retVal = Aic31_REG_WRITE_FAIL;
+ }
+ return (retVal);
+}
+
+/**
+ * \brief This function perfroms a register write(s) to the audio codec using
+ * the I2C control bus.
+ *
+ * \param instHandle [IN] pointer to the device instance object
+ * \param deviceId [IN] slave device address
+ * \param wrRegData [IN] data to write to slave
+ *
+ * \return Aic31_REG_WRITE_PASS in case of success
+ * Aic31_REG_WRITE_FAIL in case of error
+ */
+static Bool aic31I2cWrite(Aic31_Object *instHandle,
+ uint32_t deviceId,
+ ICodec_RegData *wrRegData)
+{
+ uint8_t count; /* Local count variable */
+ uint32_t regIndex; /* Register indec to be written */
+ uint8_t *regData; /* Pointer to array of register write data */
+#ifndef SW_I2C
+ uint8_t data[2]; /* Temporary data */
+ IOM_Packet ioPacket;
+ I2c_DataParam dataBuffer;
+ int32_t result = IOM_EBADARGS; /* Result */
+ IOM_Fxns *iomFxns;
+#endif /* SW_I2C */
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+ assert((NULL != instHandle) && (NULL != wrRegData));
+
+ /* Initialize the local variables */
+ regIndex = wrRegData->regIndex;
+ regData = (uint8_t*)wrRegData->regData;
+
+ assert(NULL != regData);
+
+ /* Write all the registers */
+ for (count = 0; count < wrRegData->regCount; count++)
+ {
+#ifndef SW_I2C
+ /* Prepare the data to be written to the audio codec */
+ data[0] = regIndex;
+ data[1] = ((*regData) & 0xFF);
+
+ dataBuffer.slaveAddr = deviceId;
+ dataBuffer.buffer = &data[0];
+ dataBuffer.bufLen = 2u;
+ dataBuffer.flags = I2c_DEFAULT_WRITE;
+
+ memset(&ioPacket,0x00,sizeof(IOM_Packet));
+
+ ioPacket.addr = &dataBuffer;
+ ioPacket.size = 2u;
+ ioPacket.cmd = (Uns)IOM_WRITE;
+ ioPacket.status = IOM_COMPLETED;
+
+ /* Write the data to Aic31 register */
+ iomFxns = DEV_getFxns(instHandle->acCtrlBusHandle);
+ result = ((IOM_Fxns*)iomFxns)-> \
+ mdSubmitChan(
+ instHandle->hCtrlBus,
+ &ioPacket);
+
+ if (IOM_PENDING == result)
+ {
+ Semaphore_pend(Semaphore_handle(&(instHandle->semObj)), Aic31_I2CTIMEOUT);
+ }
+
+ /* Validate the number of words written to Aic31 codec. */
+ if ((IOM_COMPLETED == ioPacket.status) ||
+ (IOM_PENDING == ioPacket.status))
+ {
+ retVal = Aic31_REG_WRITE_PASS;
+ }
+ else
+ {
+ break;
+ }
+#else
+ CodecRegWrite(instHandle->acBaseAddress, regIndex, ((*regData) & 0xFF));
+ retVal = Aic31_REG_WRITE_PASS;
+#endif /* SW_I2C */
+ /* Maintain the register data pointer and register index */
+ regIndex++;
+ regData++;
+ }
+
+ /* Return the result of writting to Aic31 registers */
+ return (retVal);
+}
+
+
+/**
+ * \brief This function writes a value to a single Aic31 register. This
+ * function is a wrapper for faclitating single register writes in the
+ * Aic31 codec driver. It internally calls aic31CtrlBusWrite function.
+ *
+ * \param instHandle [IN] pointer to the device driver instance object
+ * \param regAddr [IN] register address
+ * \param regData [IN] register data to be written
+ *
+ * \return FALSE in case of success
+ * Error code in case of error
+ */
+static Bool aic31RegWrite(Aic31_Object *instHandle,
+ uint8_t regAddr,
+ uint8_t regData)
+{
+ ICodec_RegData acRegData; /* Register data structure */
+ Bool retVal = Aic31_REG_WRITE_FAIL;/* Result of write */
+
+ assert(NULL != instHandle);
+
+ /* Write the data from the Aic31 register */
+ acRegData.regCount = 1u;
+ acRegData.regIndex = regAddr;
+ acRegData.regData = (Ptr)®Data;
+
+ retVal = aic31CtrlBusWrite(instHandle,&acRegData);
+
+ /* Return the result of reading the register */
+ return (retVal);
+}
+
+
+/**
+ * \brief This function perfroms a register read(s) to the audio codec.
+ * The control bus is selected based on the parameter value selected.
+ *
+ * \param instHandle [IN] pointer to the device driver instance object
+ * \param rdRegData [OUT] pointer to the register data read structure
+ *
+ * \return Aic31_REG_READ_PASS in case of success
+ * Aic31_REG_READ_FAIL in case of error
+ */
+static Bool aic31CtrlBusRead(Aic31_Object *instHandle,
+ ICodec_RegData *rdRegData)
+{
+ Bool retVal = Aic31_REG_READ_FAIL;
+ ICodec_ControlBusType acCtrlBusType;
+ uint32_t deviceId;
+
+ assert(NULL != instHandle);
+
+ /* Initialize the local variables */
+ acCtrlBusType = instHandle->acControlBusType;
+ deviceId = instHandle->acCodecId;
+
+ /* Determine the control bus and invoke the corresponding read function */
+ if (ICodec_ControlBusType_I2C == acCtrlBusType)
+ {
+ /* Control bus is I2C. Read from I2c bus. */
+ retVal = aic31I2cRead(instHandle,deviceId,rdRegData);
+ }
+ else if (ICodec_ControlBusType_SPI == acCtrlBusType)
+ {
+ /* Add SPI call here */
+ retVal = Aic31_REG_READ_FAIL;
+ }
+ else
+ {
+ retVal = Aic31_REG_READ_FAIL;
+ }
+ /* Return the result of reading register data */
+ return (retVal);
+}
+
+/**
+ * \brief This function perfroms a register reads(s) from the audio codec
+ * using the I2C control bus. This function first writes the address
+ * of the register address without issuing a I2C stop. It then issues
+ * a I2C restart and reads the value of the register.
+ *
+ * \param instHandle [IN] pointer to the driver instance object
+ * \param deviceId [IN] I2c slave device address
+ * \param rdRegData [OUT] register data read
+ *
+ * \return Aic31_REG_READ_PASS in case of success
+ * Aic31_REG_READ_FAIL in case of error
+ */
+static Bool aic31I2cRead(Aic31_Object *instHandle,
+ uint32_t deviceId,
+ ICodec_RegData *rdRegData)
+{
+ uint8_t count; /* Local count variable */
+ uint32_t regIndex; /* Register index to be written */
+ uint8_t *regData; /* Pointer to array of register write data */
+#ifndef SW_I2C
+ uint8_t data[10]; /* Temporary data */
+ I2c_DataParam dataBuffer;
+ IOM_Packet ioPacket;
+ int32_t status = IOM_COMPLETED;
+ IOM_Fxns *iomFxns;
+#endif /* SW_I2C */
+ Bool retVal = Aic31_REG_READ_FAIL;
+
+ assert(NULL != rdRegData);
+
+ /* Initialize the local variables */
+ regIndex = rdRegData->regIndex;
+ regData = (uint8_t*)rdRegData->regData;
+
+ assert(NULL != regData);
+
+ assert(NULL != instHandle);
+
+ /* Read all the registers */
+ for (count = 0; count < rdRegData->regCount; count++)
+ {
+#ifndef SW_I2C
+ /* The following the procedure to read data from Aic31 codec
+
+ Step A: Write the address of the register to be read.
+ Note: The I2C stop should not be issued.
+ Step B: Issue I2C restart.
+ Step C: Read the value of the register. */
+ data[0] = regIndex;
+
+ /* Prepare the data to be written to the audio codec */
+ dataBuffer.slaveAddr = deviceId;
+ dataBuffer.buffer = &data[0];
+ dataBuffer.bufLen = 1u;
+ dataBuffer.flags = I2c_WRITE | I2c_MASTER | I2c_START;
+
+ memset(&ioPacket,0x00,sizeof(IOM_Packet));
+
+ ioPacket.addr = &dataBuffer;
+ ioPacket.size = 2u;
+ ioPacket.cmd = (Uns)IOM_WRITE;
+ ioPacket.status = IOM_COMPLETED;
+
+
+ iomFxns = DEV_getFxns(instHandle->acCtrlBusHandle);
+ status = ((IOM_Fxns*)iomFxns)->mdSubmitChan(
+ instHandle->hCtrlBus,
+ &ioPacket);
+
+ if (IOM_PENDING == status)
+ {
+ Semaphore_pend(Semaphore_handle(&(instHandle->semObj)), Aic31_I2CTIMEOUT);
+ }
+
+ /* If the write command is complete, read the registers of Aic31 */
+ if ((IOM_COMPLETED == ioPacket.status )||
+ (IOM_PENDING == ioPacket.status))
+ {
+ ioPacket.cmd = IOM_READ;
+
+ dataBuffer.flags = I2c_READ
+ | I2c_MASTER
+ | I2c_STOP
+ | I2c_RESTART;
+
+ status = ((IOM_Fxns *)iomFxns)-> \
+ mdSubmitChan(instHandle->hCtrlBus,&ioPacket);
+ }
+
+ if (IOM_PENDING == status)
+ {
+ Semaphore_pend(Semaphore_handle(&(instHandle->semObj)), Aic31_I2CTIMEOUT);
+ }
+
+ /* If read is complete, then copy the required register values*/
+ if ((IOM_COMPLETED == ioPacket.status )||
+ (IOM_PENDING == ioPacket.status))
+ {
+ *regData = data[0];
+ regData++;
+ regIndex++;
+ retVal= Aic31_REG_READ_PASS;
+ }
+ else
+ {
+ break;
+ }
+#else
+ CodecRegRead(instHandle->acBaseAddress, regIndex);
+ retVal= Aic31_REG_READ_PASS;
+#endif /* SW_I2C */
+ }
+
+ /* Return the result of reading the Aic31 registers */
+ return (retVal);
+}
+
+/**
+ * This function reads the value of a single Aic31 register. This function
+ * is a wrapper for faclitating single register reads in the Aic31 codec
+ * driver. It internally calls aic31CtrlBusRead function.
+ *
+ * \param instHandle [IN] pointer to the driver instance object
+ * \param regAddr [IN] register address
+ * \param regData [OUT] register data read
+ *
+ * \return Aic31_REG_READ_PASS in case of success
+ * Aic31_REG_READ_FAIL in case of error
+ */
+static Bool aic31RegRead(Aic31_Object *instHandle,
+ uint8_t regAddr,
+ uint8_t *regData)
+{
+ ICodec_RegData acRegData; /* Register data structure */
+ Bool retVal = IOM_COMPLETED; /* Result of read */
+
+ assert((NULL != instHandle) && (NULL != regData));
+
+ /* Read the data from the Aic31 register */
+ acRegData.regCount = 1u;
+ acRegData.regIndex = regAddr;
+ acRegData.regData = (Ptr)regData;
+
+ retVal = aic31CtrlBusRead(instHandle, &acRegData);
+
+ /* Return the result of reading the register */
+ return (retVal);
+}
+
+
+/**
+ * \brief This function writes data into a bit field of Aic31 register. This
+ * function reads the value of the register, modifies the value of the
+ * specified register and writes the value back to the register.
+ *
+ * \param instHandle [IN] pointer to the driver instance object
+ * \param regAddr [IN] register address
+ * \param bfPosition [IN] bit field position
+ * \param bfSize [IN] bit field size
+ * \param bfData [IN] data to be written to the bit field
+ *
+ * \return Aic31_REG_WRITE_PASS in case of success
+ * Aic31_REG_WRITE_FAIL in case of error
+
+ */
+static Bool aic31RegWriteBf(Aic31_Object *instHandle,
+ uint8_t regAddr,
+ uint8_t bfPosition,
+ uint8_t bfSize,
+ uint8_t bfData)
+{
+ uint8_t regData = 0; /* Temporary Register data */
+ uint8_t mask = 0; /* Bit field mask */
+ Bool bFalseWhile = TRUE;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+ assert(NULL != instHandle);
+
+ do
+ {
+ bFalseWhile = FALSE;
+
+ /* Read the current value of the register */
+ retVal = aic31RegRead( instHandle , regAddr , ®Data );
+
+ if (Aic31_REG_WRITE_PASS != retVal)
+ {
+ break;
+ }
+
+ /* Update the value of the bit field */
+ mask = ((1 << bfSize) - 1) << bfPosition;
+ regData = (regData & (uint8_t)(~(mask)));
+ regData = (regData | (uint8_t)( bfData << bfPosition));
+
+ /* Write the data back into the register */
+ retVal= aic31RegWrite(instHandle,regAddr,regData);
+
+ }while (bFalseWhile);
+
+ /* Return the result of writing data into the bit field */
+ return (retVal);
+}
+
+#ifndef SW_I2C
+
+/**
+ * \brief This function writes the initialization values for Aic31 ADC
+ * registers. This function should be called to initialize the registers
+ * of the ADC.
+ *
+ * \param instHandle [IN] Pointer to the driver instance object
+ *
+ * \return IOM_COMPLETED
+ */
+static int32_t aic31InitAdc(Aic31_Object *instHandle)
+{
+ int32_t status = IOM_EBADARGS;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+ uint8_t gain = 0;
+
+ assert(NULL != instHandle);
+
+ /* Write the initialization values for the ADC registers */
+ retVal = aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG7,
+ (uint8_t)1,
+ (uint8_t)4,
+ (uint8_t)5);
+
+ /* enable the programmable PGA for left and right ADC */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG15, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG16, (uint8_t)0x00);
+
+ /* MIC3L/R is not connected to the left ADC PGA */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG17,(uint8_t)0xFF);
+
+ /* MIC3L/R is not connected to the right ADC PGA */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG18,(uint8_t)0xFF);
+
+ /* power on the Line L1R */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG19,(uint8_t)0x04);
+
+ /* REG20 (not required) */
+ /* REG21 (not required) */
+
+ /* power on the Line LIL */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG22,(uint8_t)0x04);
+
+ /* check if the user requested gain in less than 100 % */
+ if (instHandle ->ChanObj[0].chanGain <= Aic31_MAX_GAIN_PERCENT)
+ {
+ gain = (uint8_t)((instHandle ->ChanObj[0].chanGain *
+ Aic31_MAX_PGA_GAIN_VALUE)/ Aic31_MAX_GAIN_PERCENT);
+
+ /* Left AGC control */
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_LEFT_AGC_CTRLA_ADDR,
+ (uint8_t)0x80);
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_LEFT_AGC_CTRLB_ADDR,
+ (uint8_t)(gain << 1));
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_LEFT_AGC_CTRLC_ADDR,
+ (uint8_t)0x00);
+
+ /* Right AGC control */
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_RIGHT_AGC_CTRLA_ADDR,
+ (uint8_t)0x80);
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_RIGHT_AGC_CTRLB_ADDR,
+ (uint8_t)(gain << 1));
+ retVal |= aic31RegWrite(
+ instHandle,
+ Aic31_RIGHT_AGC_CTRLC_ADDR,
+ (uint8_t)0x00);
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+
+ if (Aic31_REG_WRITE_PASS == retVal)
+ {
+ status = IOM_COMPLETED;
+ }
+
+ return (status);
+}
+
+/**
+ *
+ * \brief This function writes the initialization values for Aic31 DAC
+ * registers. This function should be called to initialize the
+ * registers of the DAC.
+ *
+ * \param instHandle [IN] Pointer to the driver instance object
+ *
+ * \return IOM_COMPLETED
+ */
+static int32_t aic31InitDac(Aic31_Object *instHandle)
+{
+ int32_t status = IOM_EBADARGS;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+ uint8_t gain = 0;
+
+ assert(NULL != instHandle);
+
+ /* Write the initialization values for the DAC registers */
+ retVal = aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG7,
+ (uint8_t)1,
+ (uint8_t)4,
+ (uint8_t)5);
+
+ /* power up the left and right DACs */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG37, (uint8_t)0xE0);
+
+ /* select the DAC L1 R1 Paths */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG41, (uint8_t)0x02);
+
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG42, (uint8_t)0x6C);
+
+ /* unmute the DAC */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG43, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG44, (uint8_t)0x00);
+
+ /* DAC L to HPL OUT Is connected */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG47, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG51, (uint8_t)0x09);
+
+ /* DAC R to HPROUT is connected */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG64, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG65, (uint8_t)0x09);
+
+ /* DACL1 connected to LINE1 LOUT */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG82, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG86, (uint8_t)0x09);
+
+ /* DACR1 connected to LINE1 ROUT */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG92, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG93, (uint8_t)0x09);
+
+ /* check if the user requested gain in less than 100 % */
+ if (instHandle ->ChanObj[1].chanGain <= Aic31_MAX_GAIN_PERCENT)
+ {
+ gain = (uint8_t)((instHandle->ChanObj[1].chanGain *
+ Aic31_MAX_PGA_GAIN_VALUE) / Aic31_MAX_GAIN_PERCENT);
+
+ gain = Aic31_MAX_PGA_GAIN_VALUE - gain;
+
+ /* Left/Right DAC digital volume gain */
+ retVal |= aic31RegWrite(instHandle,Aic31_LEFT_DAC_VOL_CTRL_ADDR, gain);
+ retVal |= aic31RegWrite(instHandle,Aic31_RIGHT_DAC_VOL_CTRL_ADDR, gain);
+ }
+ else
+ {
+ status = IOM_EBADARGS;
+ }
+
+ if (Aic31_REG_WRITE_PASS == retVal)
+ {
+ status = IOM_COMPLETED;
+ }
+
+ return (status);
+}
+
+/**
+ * \brief This function writes the reset values for Aic31 ADC registers.
+ * This function should be called to reset the registers of the ADC.
+ * It is recommended to write reset values explicitly.
+ *
+ * \param instHandle [IN] Pointer to the driver instance object
+ *
+ * \return IOM_COMPLETED
+ */
+static int32_t aic31DeinitAdc(Aic31_Object *instHandle)
+{
+ int32_t status = IOM_EBADARGS;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+ assert(NULL != instHandle);
+
+ /* Write the reset values to ADC registers */
+ retVal = aic31RegWrite(instHandle, Aic31_P0_REG15, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG16, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG17, (uint8_t)0xFF);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG18, (uint8_t)0xFF);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG19, (uint8_t)0x78);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG22, (uint8_t)0x78);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG26, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG27, (uint8_t)0xFE);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG28, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG29, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG30, (uint8_t)0xFE);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG31, (uint8_t)0x00);
+
+ if (Aic31_REG_WRITE_PASS == retVal)
+ {
+ status = IOM_COMPLETED;
+ }
+
+ return (status);
+}
+
+/**
+ * \brief This function writes the reset values for Aic31 DAC registers.
+ * This function should be called to reset the registers of the DAC.
+ * It is recommended to write reset values explicitly.
+ *
+ * \param instHandle [IN] Pointer to the driver instance object
+ *
+ * \return IOM_COMPLETED
+ */
+static int32_t aic31DeinitDac(Aic31_Object *instHandle)
+{
+ int32_t status = IOM_EBADARGS;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+ assert(NULL != instHandle);
+
+ /* Write the reset values to DAC registers */
+ retVal = aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG7,
+ (uint8_t)1,
+ (uint8_t)4,
+ (uint8_t)0);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG37, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG38, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG41, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG42, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG43, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG44, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG51, (uint8_t)0x04);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG64, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG65, (uint8_t)0x04);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG82, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG86, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG92, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG93, (uint8_t)0x00);
+
+ if (Aic31_REG_WRITE_PASS == retVal)
+ {
+ status = IOM_COMPLETED;
+ }
+
+ return (status);
+}
+
+#endif /* SW_I2C */
+
+/**
+ *
+ * \brief This function configures the mute for ADC and DAC. The mute
+ * functionality can be enabled or disabled for input (ADC) or output
+ * (DAC) channels.
+ *
+ * \param instHandle [IN] pointer to the driver instance object
+ * \param acChannel [IN] channel type input or output
+ * \param muteconfig [IN] mute configuration value TRUE or FALSE
+ *
+ * \return IOM_COMPLETED if success
+ * IOM_EBADARGS in case of error
+ */
+static int32_t aic31MuteConfig(Aic31_Object *instHandle,
+ ICodec_Channel acChannel,
+ Bool muteConfig)
+{
+ /* Intialize the local variables */
+ int32_t status = IOM_COMPLETED;
+ Bool notMuteConfig = FALSE;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+ assert(NULL != instHandle);
+
+ if (ICodec_Channel_INPUT == acChannel)
+ {
+ if (TRUE == muteConfig)
+ {
+ notMuteConfig = FALSE;
+ }
+ else
+ {
+ notMuteConfig = TRUE;
+ }
+
+ /* Mute the left and right input channels */
+ retVal = aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG26,
+ (uint8_t)7,
+ (uint8_t)1,
+ (uint8_t)(notMuteConfig));
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG15,
+ (uint8_t)7,
+ (uint8_t)1,
+ (uint8_t)muteConfig);
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG29,
+ (uint8_t)7,
+ (uint8_t)1,
+ (uint8_t)(notMuteConfig));
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG16,
+ (uint8_t)7,
+ (uint8_t)1,
+ (uint8_t)muteConfig);
+ }
+ else if (ICodec_Channel_OUTPUT == acChannel)
+ {
+ /* Mute the left and right output channels */
+ retVal = aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG43,
+ (uint8_t)7,
+ (uint8_t)1,
+ (uint8_t)muteConfig);
+ retVal |= aic31RegWriteBf(
+ instHandle,
+ Aic31_P0_REG44,
+ (uint8_t)7,
+ (uint8_t)1,
+ (uint8_t)muteConfig);
+ }
+ else
+ {
+ /* Invalid parameter */
+ status = IOM_EBADARGS;
+ }
+
+ if (Aic31_REG_WRITE_PASS == retVal)
+ {
+ status = IOM_COMPLETED;
+ }
+
+ /* Return the result of the mute operation */
+ return (status);
+}
+
+#ifndef SW_I2C
+
+/**
+
+ *
+ * \brief This function is the codec call back function invoked from the I2c
+ * driver on transfer completion.
+ *
+ * \param semHandle [IN] pointer to the Semaphore Handle
+ * \param ioPacket [IN] pointer to the completed ioPacket
+ *
+ * \return none
+ *
+ */
+static Void aic31CallBack (Ptr semHandle, IOM_Packet * ioPacket)
+{
+ assert((NULL != semHandle) && (NULL != ioPacket));
+
+ if (NULL != ioPacket)
+ {
+ ioPacket = ioPacket;
+ }
+
+ Semaphore_post(Semaphore_handle(semHandle));
+ return;
+}
+
+#endif /* #ifndef SW_I2C */
+
+/**
+ *
+ * \brief This function selects the output source of the audio data among the
+ * line out,hp out or both options
+ *
+ * \param instHandle [IN] pointer to the driver object
+ * \param destOption [IN] pointer to Enum specifying the output destination
+ *
+ * \return IOM_COMPLETED in case of success.
+ * IOM_EBADARGS in case of error.
+ */
+static int32_t aic31SelectOutputDest(Aic31_Object *instHandle,
+ Ptr destOption)
+{
+ Int *dest = 0;
+ int32_t status = IOM_EBADARGS;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+
+ assert((NULL != instHandle) && (NULL != destOption));
+
+ dest = (Int *)destOption;
+
+ switch (*dest)
+ {
+ case ICodec_OutputDest_LINEOUT:
+ /* disconnect the HPOUT and conect the lINE OUT */
+
+ /* disconnect and power down the HPOUT L */
+ retVal = aic31RegWrite(instHandle, Aic31_P0_REG47, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG51, (uint8_t)0x06);
+
+ /* disconnect and powerdown HPOUT R */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG64, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG65, (uint8_t)0x06);
+
+ /* DACL1 connected to LINE1 LOUT */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG82, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG86, (uint8_t)0x09);
+
+ /* DACR1 connected to LINE1 ROUT */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG92, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG93, (uint8_t)0x09);
+ break;
+
+ case ICodec_OutputDest_HPOUT:
+ /* DACL1 disconnected from LINE1 LOUT */
+ retVal = aic31RegWrite(instHandle, Aic31_P0_REG82, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG86, (uint8_t)0x06);
+
+ /* DACR1 disconnected from LINE1 ROUT */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG92, (uint8_t)0x00);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG93, (uint8_t)0x06);
+
+ /* DAC L to HPL OUT Is connected */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG47, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG51, (uint8_t)0x09);
+
+ /* DAC R to HPROUT is connected */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG64, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG65, (uint8_t)0x09);
+ break;
+ case ICodec_OutputDest_BOTH:
+ /* DAC L to HPL OUT Is connected */
+ retVal = aic31RegWrite(instHandle, Aic31_P0_REG47, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG51, (uint8_t)0x09);
+
+ /* DAC R to HPROUT is connected */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG64, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG65, (uint8_t)0x09);
+
+ /* DACL1 connected to LINE1 LOUT */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG82, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG86, (uint8_t)0x09);
+
+ /* DACR1 connected to LINE1 ROUT */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG92, (uint8_t)0x80);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG93, (uint8_t)0x09);
+ break;
+ default:
+ status = IOM_EBADARGS;
+ break;
+ }
+
+ if (Aic31_REG_WRITE_PASS == retVal)
+ {
+ status = IOM_COMPLETED;
+ }
+
+ return (status);
+}
+
+/**
+ *
+ * \brief This function selects the input source of the audio data among the
+ * available sources of Mic in and line in
+ *
+ * \param instHandle [IN] pointer to the driver object
+ * \param srcOption [IN] Enum specifying the output destination
+ *
+ * \return IOM_COMPLETED in case of success.
+ * IOM_EBADARGS in case of error.(write failed)
+ *
+ */
+static int32_t aic31SelectInputSource(Aic31_Object *instHandle,
+ Ptr srcOption)
+{
+ Int *src = 0;
+ Bool retVal = Aic31_REG_WRITE_FAIL;
+ int32_t status = IOM_EBADARGS;
+
+ assert((NULL != instHandle) && (NULL != srcOption));
+
+ src = (Int *)srcOption;
+
+ if (ICodec_InputDest_MICIN == (*src))
+ {
+ /* disable the LINE IN connected to the ADC */
+ retVal = aic31RegWrite(instHandle, Aic31_P0_REG19, (uint8_t)0x7C);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG22, (uint8_t)0x7C);
+
+ /* connect the MIC IN to the ADC */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG17, (uint8_t)0x0F);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG18, (uint8_t)0xF0);
+ }
+ else if (ICodec_InputDest_LINEIN == (*src))
+ {
+ /* disable the MIC IN connected to the ADC */
+ retVal = aic31RegWrite(instHandle, Aic31_P0_REG17, (uint8_t)0xFF);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG18, (uint8_t)0xFF);
+
+ /* connect the LINE IN to the ADC */
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG19, (uint8_t)0x04);
+ retVal |= aic31RegWrite(instHandle, Aic31_P0_REG22, (uint8_t)0x04);
+ }
+ else
+ {
+ /* Invalid parameter */
+ status = IOM_EBADARGS;
+ }
+
+ /* if all the reg writes have passed we will send the status as completed */
+ if (Aic31_REG_WRITE_PASS == retVal)
+ {
+ status = IOM_COMPLETED;
+ }
+
+ return (status);
+}
+/* ========================================================================== */
+/* END OF FILE */
+/* ========================================================================== */
diff --git a/realtime_demo_bios/omapl137/src/aic3106_if.c b/realtime_demo_bios/omapl137/src/aic3106_if.c
--- /dev/null
@@ -0,0 +1,591 @@
+/**
+ * \file aic3106_if.c
+ *
+ * \brief APIs to configure the AIC3106 codec
+ *
+ * This file contains the implementation of the AIC3106 audio codec driver for
+ * DSP BIOS operating system.
+ *
+ * (C) Copyright 2012, Texas Instruments, Inc
+ */
+
+/*
+* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the
+* distribution.
+*
+* Neither the name of Texas Instruments Incorporated nor the names of
+* its contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*/
+
+/* ========================================================================== */
+/* INCLUDE FILES */
+/* ========================================================================== */
+#include <codec_if.h>
+#include "aic31_if.h"
+#include <ICodec.h>
+
+/******************************************************************************
+** INTERNAL MACRO DEFINITIONS
+*******************************************************************************/
+/*
+** Register Address for AIC31 Codec
+*/
+#define AIC31_P0_REG0 (0) /* Page Select */
+#define AIC31_P0_REG1 (1) /* Software Reset */
+#define AIC31_P0_REG2 (2) /* Codec Sample Rate Select */
+#define AIC31_P0_REG3 (3) /* PLL Programming A */
+#define AIC31_P0_REG4 (4) /* PLL Programming B */
+#define AIC31_P0_REG5 (5) /* PLL Programming C */
+#define AIC31_P0_REG6 (6) /* PLL Programming D */
+#define AIC31_P0_REG7 (7) /* Codec Datapath Setup */
+#define AIC31_P0_REG8 (8) /* Audio Serial Data I/f Control A */
+#define AIC31_P0_REG9 (9) /* Audio Serial Data I/f Control B */
+#define AIC31_P0_REG10 (10) /* Audio Serial Data I/f Control C */
+#define AIC31_P0_REG11 (11) /* Audio Codec Overflow Flag */
+#define AIC31_P0_REG12 (12) /* Audio Codec Digital Filter Ctrl */
+#define AIC31_P0_REG13 (13) /* Headset / Button Press Detect A */
+#define AIC31_P0_REG14 (14) /* Headset / Button Press Detect B */
+#define AIC31_P0_REG15 (15) /* Left ADC PGA Gain Control */
+#define AIC31_P0_REG16 (16) /* Right ADC PGA Gain Control */
+#define AIC31_P0_REG17 (17) /* MIC3L/R to Left ADC Control */
+#define AIC31_P0_REG18 (18) /* MIC3L/R to Right ADC Control */
+#define AIC31_P0_REG19 (19) /* LINE1L to Left ADC Control */
+#define AIC31_P0_REG20 (20) /* LINE2L to Left ADC Control */
+#define AIC31_P0_REG21 (21) /* LINE1R to Left ADC Control */
+#define AIC31_P0_REG22 (22) /* LINE1R to Right ADC Control */
+#define AIC31_P0_REG23 (23) /* LINE2R to Right ADC Control */
+#define AIC31_P0_REG24 (24) /* LINE1L to Right ADC Control */
+#define AIC31_P0_REG25 (25) /* MICBIAS Control */
+#define AIC31_P0_REG26 (26) /* Left AGC Control A */
+#define AIC31_P0_REG27 (27) /* Left AGC Control B */
+#define AIC31_P0_REG28 (28) /* Left AGC Control C */
+#define AIC31_P0_REG29 (29) /* Right AGC Control A */
+#define AIC31_P0_REG30 (30) /* Right AGC Control B */
+#define AIC31_P0_REG31 (31) /* Right AGC Control C */
+#define AIC31_P0_REG32 (32) /* Left AGC Gain */
+#define AIC31_P0_REG33 (33) /* Right AGC Gain */
+#define AIC31_P0_REG34 (34) /* Left AGC Noise Gate Debounce */
+#define AIC31_P0_REG35 (35) /* Right AGC Noise Gate Debounce */
+#define AIC31_P0_REG36 (36) /* ADC Flag */
+#define AIC31_P0_REG37 (37) /* DAC Power and Output Driver Control */
+#define AIC31_P0_REG38 (38) /* High Power Output Driver Control*/
+#define AIC31_P0_REG40 (40) /* High Power Output Stage Control*/
+#define AIC31_P0_REG41 (41) /* DAC Output Switching Control */
+#define AIC31_P0_REG42 (42) /* Output Driver Pop Reduction */
+#define AIC31_P0_REG43 (43) /* Left DAC Digital Volume Control */
+#define AIC31_P0_REG44 (44) /* Right DAC Digital Volume Control */
+#define AIC31_P0_REG45 (45) /* LINE2L to HPLOUT Volume Control */
+#define AIC31_P0_REG46 (46) /* PGA_L to HPLOUT Volume Control */
+#define AIC31_P0_REG47 (47) /* DAC_L1 to HPLOUT Volume Control */
+#define AIC31_P0_REG48 (48) /* LINE2R to HPLOUT Volume Control */
+#define AIC31_P0_REG49 (49) /* PGA_R to HPLOUT Volume Control */
+#define AIC31_P0_REG50 (50) /* DAC_R1 to HPLOUT Volume Control */
+#define AIC31_P0_REG51 (51) /* HPLOUT Output Level Control */
+#define AIC31_P0_REG52 (52) /* LINE2L to HPLCOM Volume Control */
+#define AIC31_P0_REG53 (53) /* PGA_L to HPLCOM Volume Control */
+#define AIC31_P0_REG54 (54) /* DAC_L1 to HPLCOM Volume Control */
+#define AIC31_P0_REG55 (55) /* LINE2R to HPLCOM Volume Control */
+#define AIC31_P0_REG56 (56) /* PGA_R to HPLCOM Volume Control */
+#define AIC31_P0_REG57 (57) /* DAC_R1 to HPLCOM Volume Control */
+#define AIC31_P0_REG58 (58) /* HPLCOM Output Level Control */
+#define AIC31_P0_REG59 (59) /* LINE2L to HPROUT Volume Control */
+#define AIC31_P0_REG60 (60) /* PGA_L to HPROUT Volume Control */
+#define AIC31_P0_REG61 (61) /* DAC_L1 to HPROUT Volume Control */
+#define AIC31_P0_REG62 (62) /* LINE2R to HPROUT Volume Control */
+#define AIC31_P0_REG63 (63) /* PGA_R to HPROUT Volume Control */
+#define AIC31_P0_REG64 (64) /* DAC_R1 to HPROUT Volume Control */
+#define AIC31_P0_REG65 (65) /* HPROUT Output Level Control */
+#define AIC31_P0_REG66 (66) /* LINE2L to HPRCOM Volume Control */
+#define AIC31_P0_REG67 (67) /* PGA_L to HPRCOM Volume Control */
+#define AIC31_P0_REG68 (68) /* DAC_L1 to HPRCOM Volume Control */
+#define AIC31_P0_REG69 (69) /* LINE2R to HPRCOM Volume Control */
+#define AIC31_P0_REG70 (70) /* PGA_R to HPRCOM Volume Control */
+#define AIC31_P0_REG71 (71) /* DAC_R1 to HPRCOM Volume Control */
+#define AIC31_P0_REG72 (72) /* HPRCOM Output Level Control */
+#define AIC31_P0_REG73 (73) /* LINE2L to MONO_LOP/M Volume Control*/
+#define AIC31_P0_REG74 (74) /* PGA_L to MONO_LOP/M Volume Control */
+#define AIC31_P0_REG75 (75) /* DAC_L1 to MONO_LOP/M Volume Control */
+#define AIC31_P0_REG76 (76) /* LINE2R to MONO_LOP/M Volume Control */
+#define AIC31_P0_REG77 (77) /* PGA_R to MONO_LOP/M Volume Control */
+#define AIC31_P0_REG78 (78) /* DAC_R1 to MONO_LOP/M Volume Control */
+#define AIC31_P0_REG79 (79) /* MONO_LOP/M Output Level Control */
+#define AIC31_P0_REG80 (80) /* LINE2L to LEFT_LOP/M Volume Control */
+#define AIC31_P0_REG81 (81) /* PGA_L to LEFT_LOP/M Volume Control */
+#define AIC31_P0_REG82 (82) /* DAC_L1 to LEFT_LOP/M Volume Control */
+#define AIC31_P0_REG83 (83) /* LINE2R to LEFT_LOP/M Volume Control */
+#define AIC31_P0_REG84 (84) /* PGA_R to LEFT_LOP/M Volume Control */
+#define AIC31_P0_REG85 (85) /* DAC_R1 to LEFT_LOP/M Volume Control */
+#define AIC31_P0_REG86 (86) /* LEFT_LOP/M Output Level Control */
+#define AIC31_P0_REG87 (87) /* LINE2L to RIGHT_LOP/M Volume Control */
+#define AIC31_P0_REG88 (88) /* PGA_L to RIGHT_LOP/M Volume Control */
+#define AIC31_P0_REG89 (89) /* DAC_L1 to RIGHT_LOP/M Volume Control */
+#define AIC31_P0_REG90 (90) /* LINE2R to RIGHT_LOP/M Volume Control */
+#define AIC31_P0_REG91 (91) /* PGA_R to RIGHT_LOP/M Volume Control */
+#define AIC31_P0_REG92 (92) /* DAC_R1 to RIGHT_LOP/M Volume Control*/
+#define AIC31_P0_REG93 (93) /* RIGHT_LOP/M Output Level Control */
+#define AIC31_P0_REG94 (94) /* Module Power Status */
+#define AIC31_P0_REG95 (95) /**< O/P Driver Short Circuit Detection Status*/
+#define AIC31_P0_REG96 (96) /* Sticky Interrupt Flags */
+#define AIC31_P0_REG97 (97) /* Real-time Interrupt Flags */
+#define AIC31_P0_REG98 (98) /* GPIO1 Control */
+#define AIC31_P0_REG99 (99) /* GPIO2 Control */
+#define AIC31_P0_REG100 (100) /* Additional GPIO Control A */
+#define AIC31_P0_REG101 (101) /* Additional GPIO Control B */
+#define AIC31_P0_REG102 (102) /* Clock Generation Control */
+#define AIC31_P0_REG109 (109) /* DAC Quiescent Current Adjustment */
+
+#define AIC31_RESET (0x80)
+
+#define AIC31_SLOT_WIDTH_16 (0u << 4u)
+#define AIC31_SLOT_WIDTH_20 (1u << 4u)
+#define AIC31_SLOT_WIDTH_24 (2u << 4u)
+#define AIC31_SLOT_WIDTH_32 (3u << 4u)
+
+/******************************************************************************
+** FUNCTION DEFINITIONS
+*******************************************************************************/
+/**
+ * \brief Resets the AIC31 Codec
+ *
+ * \param baseAddr Base Address of the interface connected to AIC31
+ *
+ * \return None.
+ *
+ **/
+void AIC31Reset(unsigned int baseAddr)
+{
+ /* Select Page 0 */
+ CodecRegWrite(baseAddr, AIC31_P0_REG0, 0);
+
+ /* Reset the codec */
+ CodecRegWrite(baseAddr, AIC31_P0_REG1, AIC31_RESET);
+}
+
+/**
+ * \brief Configures the data format and slot width
+ *
+ * \param baseAddr Base Address of the interface connected to AIC31
+ * \param dataType Data type for the codec operation
+ * \param slotWidth Slot width in bits
+ * \param dataOff The number of clocks from the word clock rising edge
+ * to capture the actual data
+ * dataType can take the values \n
+ * AIC31_DATATYPE_I2S - for I2S mode \n
+ * AIC31_DATATYPE_DSP - for DSP mode \n
+ * AIC31_DATATYPE_RIGHTJ - for right aligned data \n
+ * AIC31_DATATYPE_LEFTJ - for left aligned data \n
+ *
+ * \return None.
+ *
+ **/
+void AIC31DataConfig(unsigned int baseAddr, unsigned char dataType,
+ unsigned char slotWidth, unsigned char dataOff)
+{
+ unsigned char slot = 0, cDataType = 0;
+
+ /* configure the slot width */
+ switch(slotWidth)
+ {
+ case ICodec_SlotWidth_16: slot = AIC31_SLOT_WIDTH_16; break;
+ case ICodec_SlotWidth_20: slot = AIC31_SLOT_WIDTH_20; break;
+ case ICodec_SlotWidth_24: slot = AIC31_SLOT_WIDTH_24; break;
+ case ICodec_SlotWidth_32: slot = AIC31_SLOT_WIDTH_32; break;
+ default: slot = AIC31_SLOT_WIDTH_16; break;
+ }
+
+ /* Configure the audio serial data interface mode */
+ switch(dataType)
+ {
+ case ICodec_DataType_I2S : cDataType = AIC31_DATATYPE_I2S; break;
+ case ICodec_DataType_DSP : cDataType = AIC31_DATATYPE_DSP; break;
+ case ICodec_DataType_RIGHTJ : cDataType = AIC31_DATATYPE_RIGHTJ; break;
+ case ICodec_DataType_LEFTJ : cDataType = AIC31_DATATYPE_LEFTJ; break;
+ default : cDataType = AIC31_DATATYPE_I2S; break;
+ }
+
+ /* Write the data type and slot width */
+ CodecRegWrite(baseAddr, AIC31_P0_REG9, (cDataType | slot));
+
+ /* valid data after dataOff number of clock cycles */
+ CodecRegWrite(baseAddr, AIC31_P0_REG10, dataOff);
+
+
+}
+
+#ifdef MCASP_MASTER
+/**
+ * \brief Configures the data format and slot width
+ *
+ * \param baseAddr Base Address of the interface connected to AIC31
+ * \param mode section of the codec (ADC/DAC) for which the sample
+ * rate needs to be configured
+ * \param sampleRate Sample rate in samples per second
+ * mode can take the values \n
+ * AIC31_MODE_ADC - for selecting ADC \n
+ * AIC31_MODE_DAC - for selecting DAC \n
+ * AIC31_MODE_BOTH - for both ADC and DAC \n
+ * sampleRate can be \n
+ * 8000, 11025, 16000, 22050, 24000, 32000, 44100,
+ * 48000 or 96000. \n
+ * The fs is derived from the equation
+ * fs = (PLL_IN * [pllJval.pllDval] * pllRval) /(2048 * pllPval).
+ * So the values are set for PLL_IN = 24576 kHz
+ *
+ * \return None.
+ *
+ **/
+void AIC31SampleRateConfig(unsigned int baseAddr, unsigned int mode,
+ unsigned int sampleRate)
+{
+ unsigned char fs;
+ unsigned char ref = 0x0Au;
+ unsigned char temp;
+ unsigned char pllPval = 4u;
+ unsigned char pllRval = 1u;
+ unsigned char pllJval = 16u;
+ unsigned short pllDval = 0u;
+
+ /* Select the configuration for the given sampling rate */
+ switch(sampleRate)
+ {
+ case 8000:
+ fs = 0xAAu;
+ break;
+
+ case 11025:
+ fs = 0x66u;
+ ref = 0x8Au;
+ pllJval = 14u;
+ pllDval = 7000u;
+ break;
+
+ case 16000:
+ fs = 0x44u;
+ pllPval = 1u;
+ pllJval = 4u;
+ pllDval = 0u;
+ break;
+
+ case 22050:
+ fs = 0x22u;
+ ref = 0x8Au;
+ pllJval = 14u;
+ pllDval = 7000u;
+ break;
+
+ case 24000:
+ fs = 0x22u;
+ break;
+
+ case 32000:
+ fs = 0x11u;
+ break;
+
+ case 44100:
+ ref = 0x8Au;
+ fs = 0x00u;
+ pllJval = 14u;
+ pllDval = 7000u;
+ break;
+
+ case 48000:
+ fs = 0x00u;
+ break;
+
+ case 96000:
+ ref = 0x6Au;
+ fs = 0x00u;
+ break;
+
+ default:
+ fs = 0x00u;
+ break;
+ }
+
+ temp = (mode & fs);
+
+ /* Set the sample Rate */
+ CodecRegWrite(baseAddr, AIC31_P0_REG2, temp);
+
+ CodecRegWrite(baseAddr, AIC31_P0_REG3, 0x80 | pllPval);
+
+ /* use PLL_CLK_IN as MCLK */
+ CodecRegWrite(baseAddr, AIC31_P0_REG102, 0x08);
+
+ /* Use PLL DIV OUT as codec CLK IN */
+ ///CodecRegBitClr(baseAddr, AIC31_P0_REG101, 0x01);
+ CodecRegBitClr(baseAddr, AIC31_P0_REG101, 0x00);
+
+ /* Select GPIO to output the divided PLL IN */
+ ///CodecRegWrite(baseAddr, AIC31_P0_REG98, 0x20);
+
+ temp = (pllJval << 2);
+ CodecRegWrite(baseAddr, AIC31_P0_REG4, temp);
+
+ /* Configure the PLL divide registers */
+ CodecRegWrite(baseAddr, AIC31_P0_REG5, (pllDval >> 6) & 0xFF);
+ CodecRegWrite(baseAddr, AIC31_P0_REG6, (pllDval & 0x3F) << 2);
+
+ temp = pllRval;
+ CodecRegWrite(baseAddr, AIC31_P0_REG11, temp);
+
+ /* Enable the codec to be slave for fs and bclk */
+ CodecRegWrite(baseAddr, AIC31_P0_REG8, 0x10);
+
+ CodecRegWrite(baseAddr, AIC31_P0_REG7, ref);
+}
+#else
+
+/**
+ * \brief Configures the data format and slot width
+ *
+ * \param baseAddr Base Address of the interface connected to AIC31
+ * \param mode section of the codec (ADC/DAC) for which the sample
+ * rate needs to be configured
+ * \param sampleRate Sample rate in samples per second
+ * mode can take the values \n
+ * AIC31_MODE_ADC - for selecting ADC \n
+ * AIC31_MODE_DAC - for selecting DAC \n
+ * AIC31_MODE_BOTH - for both ADC and DAC \n
+ * sampleRate can be \n
+ * 8000, 11025, 16000, 22050, 24000, 32000, 44100,
+ * 48000 or 96000. \n
+ * The fs is derived from the equation
+ * fs = (PLL_IN * [pllJval.pllDval] * pllRval) /(2048 * pllPval).
+ * So the values are set for PLL_IN = 24576 kHz
+ *
+ * \return None.
+ *
+ **/
+void AIC31SampleRateConfig(unsigned int baseAddr, unsigned int mode,
+ unsigned int sampleRate)
+{
+ unsigned char temp;
+ unsigned char fsDivVal;
+ unsigned char nVal;
+ unsigned char mVal = 8;
+ unsigned short osrVal = 128;
+ unsigned char ref = 0x0A;
+ unsigned char pllPval = 1;
+ unsigned char pllRval = 1;
+ unsigned char pllJval = 7;
+ unsigned short pllDval = 5264;
+
+
+ /* Select the configuration for the given sampling rate */
+ /* Select the configuration for the given sampling rate */
+ switch(sampleRate)
+ {
+ case 8000:
+ pllJval = 8u;
+ pllDval = 1920u;
+ fsDivVal = 6;
+ break;
+
+ case 11025:
+ ref = 0x8Au;
+ fsDivVal = 4;
+ break;
+
+ case 16000:
+ pllJval = 4u;
+ pllDval = 0u;
+ fsDivVal = 3;
+ break;
+
+ case 22050:
+ ref = 0x8Au;
+ fsDivVal = 2;
+ break;
+
+ case 24000:
+ pllJval = 8u;
+ pllDval = 1920u;
+ fsDivVal = 2;
+ break;
+
+ case 44100:
+ ref = 0x8Au;
+ fsDivVal = 1;
+ break;
+
+ case 48000:
+ pllJval = 8u;
+ pllDval = 1920u;
+ fsDivVal = 1;
+ break;
+
+ default:
+ fsDivVal = 1;
+ break;
+ }
+
+ /* Set the sample Rate */
+ fsDivVal = (fsDivVal-1)<<1;
+ temp = ( mode & ((fsDivVal<<0) | (fsDivVal<<4)) );
+ /* Set the sample Rate */
+ CodecRegWrite(baseAddr, AIC31_P0_REG2, temp);
+
+ CodecRegWrite(baseAddr, AIC31_P0_REG3, 0x80 | pllPval);
+
+ /* use PLL_CLK_IN as MCLK */
+ CodecRegWrite(baseAddr, AIC31_P0_REG102, 0x08);
+
+ /* Use PLL DIV OUT as codec CLK IN */
+ // CodecRegBitClr(baseAddr, AIC31_P0_REG101, 0x01);
+ CodecRegWrite(baseAddr, AIC31_P0_REG101, 0xC0);
+
+ /* Select GPIO to output the divided PLL IN */
+ // CodecRegWrite(baseAddr, AIC31_P0_REG98, 0x20);
+
+ temp = (pllJval << 2);
+ CodecRegWrite(baseAddr, AIC31_P0_REG4, temp);
+
+ /* Configure the PLL divide registers */
+ CodecRegWrite(baseAddr, AIC31_P0_REG5, (pllDval >> 6) & 0xFF);
+ CodecRegWrite(baseAddr, AIC31_P0_REG6, (pllDval & 0x3F) << 2);
+
+ temp = pllRval;
+ CodecRegWrite(baseAddr, AIC31_P0_REG11, temp);
+
+ /* Enable the codec to be master for fs and bclk */
+ CodecRegWrite(baseAddr, AIC31_P0_REG8, 0xD0);
+
+ CodecRegWrite(baseAddr, AIC31_P0_REG7, ref);
+}
+#endif
+/**
+ * \brief Initializes the ADC section of the AIC31 Codec
+ *
+ * \param baseAddr Base Address of the interface connected to AIC31
+ *
+ * \return None.
+ *
+ **/
+void AIC31ADCInit(unsigned int baseAddr)
+{
+ /* enable the programmable PGA for left and right ADC */
+ CodecRegWrite(baseAddr, AIC31_P0_REG15, 0x00);
+ CodecRegWrite(baseAddr, AIC31_P0_REG16, 0x00);
+
+ /* MIC3L/R is not connected to the left ADC PGA */
+ CodecRegWrite(baseAddr, AIC31_P0_REG17, 0xFF);
+
+ /* MIC3L/R is not connected to the right ADC PGA */
+ CodecRegWrite(baseAddr, AIC31_P0_REG18, 0xFF);
+
+ /* power on the Line L1R */
+ CodecRegWrite(baseAddr, AIC31_P0_REG19, 0x04);
+
+ /* power on the Line LIL */
+ CodecRegWrite(baseAddr, AIC31_P0_REG22, 0x04);
+}
+
+/**
+ * \brief Initializes the DAC section of the AIC31 Codec
+ *
+ * \param baseAddr Base Address of the interface connected to AIC31
+ *
+ * \return None.
+ *
+ **/
+void AIC31DACInit(unsigned int baseAddr)
+{
+
+ /* Codec Datapath Setup */
+ CodecRegWrite(baseAddr, AIC31_P0_REG7, 0x8A);
+
+ /* select the DAC L1 R1 Paths */
+ CodecRegWrite(baseAddr, AIC31_P0_REG41, 0x02);
+ CodecRegWrite(baseAddr, AIC31_P0_REG42, 0x6C);
+
+
+ /* DAC L to HPLOUT Is connected */
+ CodecRegWrite(baseAddr, AIC31_P0_REG47, 0x80);
+ CodecRegWrite(baseAddr, AIC31_P0_REG51, 0x09);
+
+ /* DAC R to HPROUT is connected */
+ CodecRegWrite(baseAddr, AIC31_P0_REG64, 0x80);
+ CodecRegWrite(baseAddr, AIC31_P0_REG65, 0x09);
+
+ /* DACL1 connected to LINE1 LOUT */
+ CodecRegWrite(baseAddr, AIC31_P0_REG82, 0x80);
+ CodecRegWrite(baseAddr, AIC31_P0_REG86, 0x09);
+
+ /* DACR1 connected to LINE1 ROUT */
+ CodecRegWrite(baseAddr, AIC31_P0_REG92, 0x80);
+ CodecRegWrite(baseAddr, AIC31_P0_REG93, 0x09);
+
+ /* unmute the DAC */
+ CodecRegWrite(baseAddr, AIC31_P0_REG43, 0x00);
+ CodecRegWrite(baseAddr, AIC31_P0_REG44, 0x00);
+
+ /* DAC Quiescent Current Adjustment */
+ //CodecRegWrite(baseAddr, AIC31_P0_REG109, 0xC0);
+ /* power up the left and right DACs */
+ CodecRegWrite(baseAddr, AIC31_P0_REG37, 0xE0);
+}
+
+void AIC31ADCDeInit (unsigned int baseAddr)
+{
+ /* Write the reset values to ADC registers */
+ CodecRegWrite (baseAddr, AIC31_P0_REG15, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG16, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG17, (uint8_t)0xFF);
+ CodecRegWrite (baseAddr, AIC31_P0_REG18, (uint8_t)0xFF);
+ CodecRegWrite (baseAddr, AIC31_P0_REG19, (uint8_t)0x78);
+ CodecRegWrite (baseAddr, AIC31_P0_REG22, (uint8_t)0x78);
+ CodecRegWrite (baseAddr, AIC31_P0_REG26, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG27, (uint8_t)0xFE);
+ CodecRegWrite (baseAddr, AIC31_P0_REG28, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG29, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG30, (uint8_t)0xFE);
+ CodecRegWrite (baseAddr, AIC31_P0_REG31, (uint8_t)0x00);
+}
+
+void AIC31DACDeInit (unsigned int baseAddr)
+{
+ /* Write the reset values to DAC registers */
+
+ CodecRegBitClr (baseAddr, AIC31_P0_REG101, (uint8_t)0x1E);
+ CodecRegWrite (baseAddr, AIC31_P0_REG37, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG38, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG41, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG42, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG43, (uint8_t)0x80);
+ CodecRegWrite (baseAddr, AIC31_P0_REG44, (uint8_t)0x80);
+ CodecRegWrite (baseAddr, AIC31_P0_REG51, (uint8_t)0x04);
+ CodecRegWrite (baseAddr, AIC31_P0_REG64, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG65, (uint8_t)0x04);
+ CodecRegWrite (baseAddr, AIC31_P0_REG82, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG86, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG92, (uint8_t)0x00);
+ CodecRegWrite (baseAddr, AIC31_P0_REG93, (uint8_t)0x00);
+}
+
+/***************************** End Of File ***********************************/
diff --git a/realtime_demo_bios/omapl137/src/audioSample_io.c b/realtime_demo_bios/omapl137/src/audioSample_io.c
--- /dev/null
@@ -0,0 +1,983 @@
+/*
+ * audioSample_io.c
+ *
+ * This file contains the test / demo code to demonstrate the Audio component
+ * driver functionality on SYS/BIOS 6.
+ *
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/** \file audioSample_io.c
+ *
+ * \brief sample application for demostration of audio playing
+ *
+ * This file contains the implementation of the sample appliation for the
+ * demonstration of audio playing through the audio interface layer.
+ *
+ * (C) Copyright 2017, Texas Instruments, Inc
+ */
+
+/* ========================================================================== */
+/* INCLUDE FILES */
+/* ========================================================================== */
+
+#include "fil.h" /* FILE I/O implementation */
+#include "sys.h" /* System API and structures */
+#include "sysbfflt.h" /* System support for BF filters */
+
+#include "cmb.h"
+
+#include <ti/mas/types/types.h>
+#include <ti/mas/aer/bf.h>
+#include "../../../common/components/mss/mss.h" /* local version used */
+#include <ti/mas/vpe/asnr.h>
+#if (SYS_USE_DRC)
+#include <ti/mas/vau/vau.h>
+#include <ti/mas/aer/drc.h>
+#endif
+
+#include <xdc/std.h>
+#include <ti/sysbios/io/IOM.h>
+#include <xdc/runtime/Memory.h>
+#include <ti/sysbios/heaps/HeapMem.h>
+#include <xdc/runtime/IHeap.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/Log.h>
+#include <xdc/runtime/System.h>
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/knl/Semaphore.h>
+#include <mcasp_drv.h>
+#include <ti/csl/csl_chip.h>
+#include <ti/sdo/edma3/drv/edma3_drv.h>
+#include <ti/sdo/edma3/rm/edma3_rm.h>
+#include <ti/sdo/edma3/drv/sample/bios6_edma3_drv_sample.h>
+#include "mcasp_osal.h"
+#include "ICodec.h"
+#include "mcasp_cfg.h"
+#include "MCASP_log.h"
+#include "stdio.h"
+#include "string.h"
+
+#include <ti/csl/cslr_mcasp.h>
+#ifdef MEASURE_TIME
+ #include "profiling.h"
+#endif
+
+#include <ti/sysbios/knl/Task.h>
+#include <ti/sysbios/hal/Cache.h>
+#include <xdc/runtime/System.h> /* for System_printf, and similar */
+#include <xdc/runtime/Timestamp.h> /* for benchmarking/profiling */
+
+#include "pcm186x_if.h"
+
+/* ========================================================================== */
+/* IMPORTED VARIABLES */
+/* ========================================================================== */
+
+extern EDMA3_DRV_Handle hEdma;
+extern HeapMem_Handle myHeap;
+/* ========================================================================== */
+/* MACRO DEFINITIONS */
+/* ========================================================================== */
+
+#define Timestamp_get Timestamp_get32 /* use 32-bit time stamps */
+
+#define MIN(a,b) (((a)>(b))?(b):(a)) /* Min/Max macros */
+#define MAX(a,b) (((a)<(b))?(b):(a))
+#define loop while(1) /* endless loop for the task */
+
+/*
+ * Buffers placed in external memory are aligned on a 128 bytes boundary.
+ * In addition, the buffer should be of a size multiple of 128 bytes for
+ * the cache work optimally on the C6x.
+ */
+#define BUFLEN 160*2 /* number of samples in the frame */
+#define BUFALIGN 128 /* alignment of buffer for use of L2 cache */
+
+
+/** Number of serializers configured for record */
+
+#define BUFSIZE (BUFLEN * 4) // 4 bytes per word
+
+/* This is the number of buffers used by the application to be issued and reclaimed
+ This number can be higher than 2 (Ping pong) also. The McASP driver puts them in
+ a queue internally and process them in order and give back to the application */
+#define NUM_BUFS 2
+
+#if defined(AIC_CODEC)
+#include <Aic31.h>
+Ptr hAicDev;
+Ptr hAicChannel;
+#endif
+
+
+/* Function prototype */
+static Void createStreams();
+static Void prime();
+
+Ptr rxbuf[NUM_BUFS];
+Ptr txbuf[NUM_BUFS];
+Ptr wkbuf[NUM_BUFS];
+Ptr outbuf[NUM_BUFS];
+
+/* channel 0 (serilizer 1 left) - mic1 */
+/* channel 1 (serilizer 1 right) - mic2 */
+/* channel 2 (serilizer 2 left) - mic5 */
+/* channel 3 (serilizer 2 right) - mic6 */
+/* channel 4 (serilizer 3 left) - mic3 */
+/* channel 5 (serilizer 3 right) - mic4 */
+/* channel 6 (serilizer 4 left) - mic8 */
+/* channel 7 (serilizer 4 right) - mic7 */
+int chanToMicMapping[8] = {0, 4, 3, 7, 1, 5, 2, 6};
+
+/* McASP Device handles */
+Ptr hMcaspDev0;
+Ptr hMcaspDev;
+
+/* McASP Device parameters */
+Mcasp_Params mcaspParams;
+Mcasp_Params mcaspParams0;
+
+
+/* Channel Handles */
+Ptr hMcaspTxChan;
+Ptr hMcaspRxChan;
+Ptr hMcaspTxChan0;
+Ptr hMcaspRxChan0;
+
+int rxFrameIndex=(NUM_BUFS-1), txFrameIndex=(NUM_BUFS-1);
+volatile int RxFlag=0,TxFlag=0;
+Semaphore_Handle semR,semT;
+Semaphore_Params params;
+
+Error_Block eb;
+
+typedef struct txBfDebug_stc {
+ tulong frmcnt; /* normal frames */
+ tulong silcnt; /* silence frames */
+ tuint invsrc; /* no mic active, invalid output */
+ tuint invopt; /* >1 mic active, invalid output */
+} txBfDebug_t;
+
+typedef struct txTaskDebug_stc {
+ tuint overrun; /* counts how many times we ran out of MIPS */
+ txBfDebug_t bf[SYS_VMICS_MAX]; /* beamformer statistics */
+} txTaskDebug_t;
+
+txTaskDebug_t txTaskDebug; /* Tx task debug stats */
+
+/* Profiling/benchmarking information for the Tx task */
+typedef struct txTaskProfileData_stc {
+ tulong min; /* Minimum number of cycles */
+ tulong max; /* Maximum number of cycles */
+ tulong n; /* Number of measurements */
+ float total; /* Total number of cycles */
+} txTaskProfileData_t;
+
+typedef struct txTaskProfile_stc {
+ txTaskProfileData_t bf; /* Beamformer profile */
+ txTaskProfileData_t asnr; /* ASNR profile */
+ txTaskProfileData_t mss; /* MSS profile */
+ txTaskProfileData_t drc; /* DRC profile */
+ txTaskProfileData_t vau; /* VAU profile */
+} txTaskProfile_t;
+volatile txTaskProfile_t txTaskProfile = {
+ {~(0uL), 0, 0, 0.0f},
+ {~(0uL), 0, 0, 0.0f},
+ {~(0uL), 0, 0, 0.0f},
+ {~(0uL), 0, 0, 0.0f},
+ {~(0uL), 0, 0, 0.0f}
+};
+
+/* To be used for debug trace */
+mssSrc_t mssDbgCurSrc = {
+ -1, -1 /* Current source group/index */
+};
+mssSrc_t mssDbgNewSrc = {
+ -1, -1 /* New source group/index */
+};
+
+#if (SYS_USE_DRC)
+/* Output frame for MSS, input for DRC */
+#pragma DATA_ALIGN(txOutFrame1,8)
+linSample txOutFrame1[SYS_FRAME_LENGTH];
+
+/* Output frame for DRC, input for VAU */
+#pragma DATA_ALIGN(txOutFrame2,8)
+linSample txOutFrame2[SYS_FRAME_LENGTH];
+#endif
+
+/**************************************************************************************/
+/* FUNCTION DESCRIPTION: This utility function converts local GEM L2 address in to global
+ memory addresses used by the EDMA inside McASP
+*/
+/**************************************************************************************/
+static uint32_t getGlobalAddr (uint32_t addr)
+{
+ if ((addr >= 0x800000) && (addr < 0x1000000))
+ {
+#ifdef _TMS320C6X
+ uint32_t coreNum;
+
+ /* Get the core number. */
+ coreNum = CSL_chipReadReg(CSL_CHIP_DNUM);
+
+#if defined(SOC_AM572x) || defined(SOC_AM571x)
+ /* Compute the global address. */
+ return ((1 << 30) | (coreNum << 24) | (addr & 0x00ffffff));
+
+#else
+ /* Compute the global address. */
+ return ((1 << 28) | (coreNum << 24) | (addr & 0x00ffffff));
+#endif
+#else
+ return addr;
+#endif
+ }
+ else
+ {
+ /* non-L2 address range */
+ return addr;
+ }
+}
+/*********************** APPLICATION DEFINED FUNCTIONS: Begin ****************************/
+/* The below functions need to be defined by the application and are registered to the
+ McASP driver during instantiation
+ */
+/*
+ * This call back function is provided to the McASP driver during mcaspCreateChan()
+ * and is called at the end of a transaction. This example uses the same call back function
+ * for both TX and RX transfers and the call back argument is not being used in this
+ * application and hence we pass NULL during mcaspCreateChan() as the call back argument.
+ * This need not be the case for other applications where they could use a seperate
+ * call back function for TX and RX. Also they could provide a non-NULL argument as
+ * the call back argument and use it in their implementation of the call back function(s).
+ */
+void mcaspAppCallback(void* arg, MCASP_Packet *ioBuf)
+{
+
+ if(ioBuf->cmd == MCASP_READ)
+ {
+ RxFlag++;
+ rxFrameIndex=((rxFrameIndex+1) %NUM_BUFS);
+
+ if(ioBuf->addr != (void *)getGlobalAddr((uint32_t)rxbuf[rxFrameIndex])) {
+ MCASP_log("Rx Buf Address mismatch\n");
+ }
+ /* post semaphore */
+ Semaphore_post(semR);
+ }
+ if(ioBuf->cmd == MCASP_WRITE)
+ {
+ txFrameIndex=((txFrameIndex+1) % NUM_BUFS);
+ if(ioBuf->addr != (void *)getGlobalAddr((uint32_t)txbuf[txFrameIndex])) {
+ MCASP_log("Tx Buf Address mismatch\n");
+ }
+ TxFlag++;
+ /* post semaphore */
+ Semaphore_post(semT);
+ }
+
+}
+
+/*
+ * This call back is used during interrupt processing and is defined by the
+ * application for error handling. These functions are called back from within the
+ * mcasp driver when an error interrupt happens and macspIsr() is being called.
+ * The sample error handling functions just records these errors which
+ * are later used for analyzing the errors seen.
+ */
+/* The below variables are used to quit the frame processing loop if an error occurs */
+int gblErrFlagXmt=0;
+int gblErrFlagRcv=0;
+/* The below variables are used to analyze the errors if an error interrupt happens */
+Mcasp_errCbStatus errCbStatusXmt;
+Mcasp_errCbStatus errCbStatusRcv;
+
+/* Error handler for Transmit side */
+void GblErrXmt(Mcasp_errCbStatus errCbStat)
+{
+ gblErrFlagXmt=1;
+ errCbStatusXmt=errCbStat;
+}
+/* Error handler for Rcv side */
+void GblErrRcv(Mcasp_errCbStatus errCbStat)
+{
+ gblErrFlagRcv=1;
+ errCbStatusRcv=errCbStat;
+}
+/*********************** APPLICATION DEFINED FUNCTIONS: End ****************************/
+
+
+
+
+/**************************************************************************************/
+/* FUNCTION DESCRIPTION: This function analyzes the result of error interrupts, if it
+ * happened
+*/
+/**************************************************************************************/
+void mcaspAnalyzeErrors(Mcasp_errCbStatus *errCbStat)
+{
+ MCASP_log("***** --------- Error Interrupt details \n -----------");
+ MCASP_log("***** Error Callback:isClkFailErr : %d\n",errCbStat->isClkFailErr);
+ MCASP_log("***** Error Callback: isDMAErr : %d\n",errCbStat->isDMAErr);
+ MCASP_log("***** Error Callback: isSyncErr : %d\n",errCbStat->isSyncErr);
+ MCASP_log("***** Error Callback: retVal : %d \n",errCbStat->retVal);
+ MCASP_log("***** Error Callback: isRcvOvrRunOrTxUndRunErr : %d \n",errCbStat->isRcvOvrRunOrTxUndRunErr);
+}
+
+/**************************************************************************************/
+/* FUNCTION DESCRIPTION: This function creates the McASP channels for Tx and Rx
+ This function also creates the codec channels (if any)
+*/
+/**************************************************************************************/
+static Void createStreams()
+{
+ int status;
+
+ int mode = IOM_INPUT;
+ char remName[10]="aic";
+#if !defined(MCASP_MASTER)
+/* Configure the external clock: In Slave mode, McASP is not the master, start initializing the external clock provider (AIC codec below),
+ before configuring McASP clocks (in mcaspCreateChan() below)
+*/
+#if defined(AIC_CODEC)
+/* In this case AIC provides the frame clocks, hence we need to start it first */
+ status = aic31MdCreateChan(
+ &hAicChannel,
+ hAicDev,
+ remName,
+ mode,
+ (Ptr)(&AIC31_config),
+ mcaspAppCallback,
+ NULL);
+
+ if ((NULL == hAicChannel) &&
+ (IOM_COMPLETED != status))
+ {
+ MCASP_log("AIC Create Channel Failed\n");
+ BIOS_exit(0);
+ }
+#endif
+
+#endif
+
+
+ mcasp_chanparam[0].edmaHandle = hEdma;
+ mcasp_chanparam[1].edmaHandle = hEdma;
+
+ /* Create Mcasp channel for Tx */
+ status = mcaspCreateChan(&hMcaspTxChan, hMcaspDev,
+ MCASP_OUTPUT,
+ &mcasp_chanparam[1],
+ mcaspAppCallback, NULL);
+
+ if((status != MCASP_COMPLETED) || (hMcaspTxChan == NULL))
+ {
+ MCASP_log("mcaspCreateChan for McASP1 Tx Failed\n");
+ BIOS_exit(0);
+ }
+
+ /* Create Mcasp channel for Rx */
+ status = mcaspCreateChan(&hMcaspRxChan, hMcaspDev,
+ MCASP_INPUT,
+ &mcasp_chanparam[0],
+ mcaspAppCallback, NULL);
+ if((status != MCASP_COMPLETED) || (hMcaspRxChan == NULL))
+ {
+ MCASP_log("mcaspCreateChan for McASP1 Rx Failed\n");
+ BIOS_exit(0);
+ }
+
+#if defined(MCASP_MASTER)
+/* If MCASP master, configure the clock of the slave device attached to McASP now.
+ In the below case, it is the AIC codec */
+
+#if defined(AIC_CODEC)
+ status = aic31MdCreateChan(
+ &hAicChannel,
+ hAicDev,
+ remName,
+ mode,
+ (Ptr)(&AIC31_config),
+ (IOM_TiomCallback)&mcaspAppCallback,
+ NULL);
+
+ if ((NULL == hAicChannel) &&
+ (IOM_COMPLETED != status))
+ {
+ MCASP_log("AIC Create Channel Failed\n");
+ }
+ else
+ {
+
+ }
+#endif
+
+#endif
+
+}
+
+/*
+ * ======== prime ========
+ */
+MCASP_Packet rxFrame[NUM_BUFS];
+MCASP_Packet txFrame[NUM_BUFS];
+#include <ti/sysbios/family/c64p/Hwi.h>
+
+Hwi_Handle myHwi;
+static Void prime()
+{
+ Error_Block eb;
+ int32_t count = 0, status;
+ IHeap_Handle iheap;
+
+ iheap = HeapMem_Handle_to_xdc_runtime_IHeap(myHeap);
+ Error_init(&eb);
+
+ /* Allocate buffers for the SIO buffer exchanges */
+ for(count = 0; count < (NUM_BUFS ); count ++)
+ {
+ rxbuf[count] = Memory_calloc(iheap, BUFSIZE * RX_NUM_SERIALIZER,
+ BUFALIGN, &eb);
+ if(NULL == rxbuf[count])
+ {
+ MCASP_log("\r\nMEM_calloc failed.\n");
+ }
+ }
+
+ /* Allocate work buffers for signal processing */
+ for(count = 0; count < NUM_BUFS; count++)
+ {
+ wkbuf[count] = Memory_calloc(iheap, (BUFSIZE * RX_NUM_SERIALIZER/(SYS_FS_RATIO*2)),
+ BUFALIGN, &eb);
+ if(NULL == wkbuf[count])
+ {
+ IFPRINT(cmb_write("\r\nMEM_calloc failed for Wk\n"));
+ IFPRINT(UART_printf("\r\nMEM_calloc failed for Wk\n"));
+ }
+ }
+
+ /* Allocate buffers for the SIO buffer exchanges */
+ for(count = 0; count < (NUM_BUFS); count ++)
+ {
+ txbuf[count] = Memory_calloc(iheap, BUFSIZE * TX_NUM_SERIALIZER,
+ BUFALIGN, &eb);
+ if(NULL == txbuf[count])
+ {
+ MCASP_log("\r\nMEM_calloc failed.\n");
+ }
+ }
+
+ /* Allocate output buffers for the MSS */
+ for(count = 0; count < NUM_BUFS; count++)
+ {
+ outbuf[count] = Memory_calloc(iheap, (BUFSIZE * TX_NUM_SERIALIZER/(SYS_FS_RATIO*2)),
+ BUFALIGN, &eb);
+ if(NULL == outbuf[count])
+ {
+ IFPRINT(cmb_write("\r\nMEM_calloc failed for Out\n"));
+ IFPRINT(UART_printf("\r\nMEM_calloc failed for Out\n"));
+ }
+ }
+
+ for(count = 0; count < NUM_BUFS; count ++)
+ {
+ /* Issue the first & second empty buffers to the input stream */
+ memset((uint8_t *)rxbuf[count], 0xFF, BUFSIZE * RX_NUM_SERIALIZER);
+ memset((uint8_t *)wkbuf[count], 0xBB, (BUFSIZE * RX_NUM_SERIALIZER/(SYS_FS_RATIO*2)));
+
+ /* RX frame processing */
+ rxFrame[count].cmd = MCASP_READ;
+ rxFrame[count].addr = (void*)(getGlobalAddr((uint32_t)rxbuf[count]));
+ rxFrame[count].size = BUFSIZE * RX_NUM_SERIALIZER;
+ rxFrame[count].arg = (uint32_t) hMcaspRxChan;
+ rxFrame[count].status = 0;
+ rxFrame[count].misc = 1; /* reserved - used in callback to indicate asynch packet */
+
+ /* Submit McASP packet for Rx */
+ status = mcaspSubmitChan(hMcaspRxChan, &rxFrame[count]);
+ if((status != MCASP_PENDING))
+ MCASP_log ("Debug: Error McASP2 RX : Prime buffer #%d submission FAILED\n", count);
+
+
+ }
+
+ for(count = 0; count < (NUM_BUFS); count ++)
+ {
+ memset((uint8_t *)txbuf[count], 0xF0, BUFSIZE * TX_NUM_SERIALIZER);
+ memset((uint8_t *)outbuf[count], 0xDD, (BUFSIZE * TX_NUM_SERIALIZER/(SYS_FS_RATIO*2)));
+
+ /* TX frame processing */
+ txFrame[count].cmd = MCASP_WRITE;
+ txFrame[count].addr = (void*)(getGlobalAddr((uint32_t)txbuf[count]));
+ txFrame[count].size = BUFSIZE * TX_NUM_SERIALIZER;
+ txFrame[count].arg = (uint32_t) hMcaspTxChan;
+ txFrame[count].status = 0;
+ txFrame[count].misc = 1; /* reserved - used in callback to indicate asynch packet */
+ /* Submit McASP packet for Tx */
+ status = mcaspSubmitChan(hMcaspTxChan, &txFrame[count]);
+ if((status != MCASP_PENDING))
+ MCASP_log ("Debug: Error McASP2 TX : Prime buffer #%d submission FAILED\n", count);
+ }
+
+}
+
+extern EDMA3_DRV_GblConfigParams sampleEdma3GblCfgParams[];
+/* EnableEDMA event in the SampleCfg*/
+static void enableEDMAHwEvent(uint32_t edmaNum, uint32_t eventNo) {
+ sampleEdma3GblCfgParams[edmaNum].dmaChannelHwEvtMap[eventNo/32] |= (1 << (eventNo%32));
+}
+
+/*
+ * ======== echo ========
+ * This function copies from the input SIO to the output SIO. You could
+ * easily replace the copy function with a signal processing algorithm.
+ */
+extern Int aic31MdBindDev(Ptr *, Int, Ptr);
+
+int gtxFrameIndexCount=0;
+int grxFrameIndexCount=0;
+int itemp;
+int result, pwr_status, fs_status, bck_status;
+int total_frames_sent=0;
+
+#define audDumpSec 10
+#define sampNumSec 16000
+#define audDumpSampleNum = audDumpSec*sampNumSec*TX_NUM_SERIALIZER
+int *audDumpBufPtr = (int *)0xc3800000;
+int audDumpBufIdx = 0;
+Void Audio_echo_Task()
+{
+ volatile int32_t i32Count, status = 0;
+ hMcaspDev = NULL;
+ int count, serNum;
+ int32_t i, j, k;
+ int *tmpTxPtr, *tmpRxPtr;
+ unsigned char *tempTxPtr, *tempRxPtr, *tempWkPtr;
+ unsigned char *tempOutPtr, *tempMicPtr;
+ tint nmics, nvmics, err, angle;
+ volatile tulong t1, t2; /* for profiling */
+ tulong delta;
+
+ void *inst_p;
+ linSample *in_r; /* pointer to current microphone input buffer */
+ linSample *frame_p; /* pointer to signal frame */
+ linSample *outframe_p; /* Output frame pointer for VAU */
+ linSample *mics_in[SYS_MICS_MAX+1]; /* pointers to microphone inputs */
+
+ mssDebugStat_t mssDbg;
+
+
+#ifdef MEASURE_TIME
+ profiling_init();
+#endif
+
+ /* 1. EDMA Initializations */
+ EDMA3_DRV_Result edmaResult = 0;
+
+ enableEDMAHwEvent(EDMACC_NUM,MCASP_RX_DMA_CH);
+ enableEDMAHwEvent(EDMACC_NUM,MCASP_TX_DMA_CH);
+
+ hEdma = edma3init(EDMACC_NUM, &edmaResult);
+
+ if (edmaResult != EDMA3_DRV_SOK)
+ {
+ /* Report EDMA Error
+ */
+ MCASP_log("\nEDMA driver initialization unsuccessful\n");
+ }
+ else
+ {
+ MCASP_log("\nEDMA driver initialization successful.\n");
+ }
+
+ /* 2. SEM Initializations */
+ Semaphore_Params_init(¶ms);
+
+ /* Create semaphores to wait for buffer reclaiming */
+ semR = Semaphore_create(0, ¶ms, &eb);
+ semT = Semaphore_create(0, ¶ms, &eb);
+
+ /* 3. McASP Initializations */
+ /* Initialize McASP Tx and Rx parameters */
+
+ mcaspParams = Mcasp_PARAMS;
+
+ status = mcaspBindDev(&hMcaspDev, MCASP_NUM, &mcaspParams);
+ if((status != MCASP_COMPLETED) || (hMcaspDev == NULL))
+ {
+ MCASP_log("mcaspBindDev for McASP1 Failed\n");
+ abort();
+ }
+
+#if defined(AIC_CODEC)
+ /* Bind AIC Codec */
+ aic31MdBindDev(&hAicDev, 0, (Ptr)&Aic31_PARAMS);
+#endif
+
+ /* Call createStream function to create I/O streams */
+ createStreams();
+
+ // set up the CMB for audio input
+ PCM186XADCInit();
+
+ MCASP_log("Initialization complete. priming about to begin \n");
+ /* Call prime function to do priming */
+ prime();
+
+ MCASP_log("priming complete.\n");
+
+
+
+ MCASP_log("\n******** Audio Loopback demo ********\n");
+ MCASP_log("Send audio signals in to the EVM's audio-in port and hear the same audio in the audio-out port\n");
+
+ /* Forever loop to continously receviec and transmit audio data */
+ for (i32Count = 0; i32Count >= 0; i32Count++)
+ {
+
+ if(gblErrFlagXmt || gblErrFlagRcv)
+ break;
+
+ Semaphore_pend(semR, BIOS_WAIT_FOREVER);
+ Semaphore_pend(semT, BIOS_WAIT_FOREVER);
+
+#ifdef MEASURE_TIME
+ profiling_end();
+#endif
+ /* Reclaim full buffer from the input stream */
+ gtxFrameIndexCount=txFrameIndex;
+ grxFrameIndexCount=rxFrameIndex;
+
+ Cache_inv(rxbuf[grxFrameIndexCount],BUFSIZE * RX_NUM_SERIALIZER,Cache_Type_ALL, TRUE);
+ /******************************* Sample Processing Begins ***************************/
+ /* (BUFLEN* RX_NUM_SERIALIZER) 32-bit samples samples have been accumulated in rxbuf[grxFrameIndexCount] now.
+ Application specific processing on these samples, before sending it back to McASP via
+ txbuf[grxFrameIndexCount].
+ APPLICATION SPECIFIC PROCESSING could be done here. Below are the few audio demos and their
+ application specific processing shown below.
+ */
+
+ /* DEFAULT CASE: Copy the frame received and send it back to Tx buffer.
+ This way the audio received by McASP from the remote device, is loopbacked and sent back
+ to the device here.
+ */
+ // dump RX buffer to TX buffer
+ ///memcpy(txbuf[gtxFrameIndexCount],rxbuf[grxFrameIndexCount],BUFSIZE * RX_NUM_SERIALIZER);
+
+ // Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1
+#if 0
+ // loopback one serilizer (0[mic1/5], 1[mic4/8], 2[mic2/6] or 3[mic3/7]) of RX to TX
+ serNum = 0; // loopback mic1/5
+ tmpRxPtr = (int *)rxbuf[grxFrameIndexCount];
+ tmpRxPtr += serNum*2;
+ tmpTxPtr = (int *)txbuf[gtxFrameIndexCount];
+ for (count=0; count<BUFLEN/2; count++)
+ {
+ *tmpTxPtr = *tmpRxPtr;
+ tmpTxPtr++;
+ tmpRxPtr++;
+ *tmpTxPtr = *tmpRxPtr;
+ tmpTxPtr++;
+ tmpRxPtr += RX_NUM_SERIALIZER*2-1;
+ }
+#else
+ // SYS_ADC_FS_HZ to SYS_FS_HZ, 24bit to 16bit conversion
+ nmics = sysContext.nmics; /* fetch number of mics */
+ // for each channel, convert and copy the RX buffer to WK buffer
+ for (j=0; j<(nmics+1); j++)
+ {
+ // set the RX start pointer
+ tempRxPtr = (unsigned char *)rxbuf[grxFrameIndexCount] + j*sizeof(Ptr) + sizeof(short);
+ // set the WK start pointer
+ tempWkPtr = (unsigned char *)wkbuf[grxFrameIndexCount] + j*BUFSIZE/(SYS_FS_RATIO*2*2);
+ // convert and copy RX to WK every SYS_FS_RATIO sample
+ for (i=0; i<BUFLEN/2; i+=SYS_FS_RATIO)
+ {
+ // only copy the two most significant bytes (Q31 to Q15 conversion)
+ memcpy(tempWkPtr, tempRxPtr, sizeof(short));
+ tempWkPtr += sizeof(short);
+ tempRxPtr += sizeof(Ptr)*2*SYS_FS_RATIO*RX_NUM_SERIALIZER;
+ }
+ }
+
+ // set the sysContext.in_r
+ sysContext.in_r = wkbuf[grxFrameIndexCount];
+ in_r = (linSample *)sysContext.in_r;
+ for (k = 0; k < (nmics+1); k++) {
+ mics_in[chanToMicMapping[k]] = &in_r[k*SYS_FRAME_LENGTH]; /* find the frame start for each microphone */
+ }
+ /* consume samples pointed to by read pointer in_r as provided in misc_in[] */
+
+ // BF+ASNR+MSS processing
+ /* Here comes a lot of work */
+ /* We start with beamformers */
+
+ /* Start the beamformers */
+ // get the number of virtual mics
+ nvmics = sysContext.nvmics;
+ t1 = Timestamp_get();
+ for (k = 0; k < nvmics; k++) {
+ inst_p = sysContext.bfInst_p[k]; /* fetch the bf instance pointer */
+ frame_p = sysContext.vmicfrm[k]; /* point to the output frame buffer */
+
+ err = bfProcess(inst_p, (void*)&mics_in[0], (void*)frame_p);
+
+ if (err != bf_NOERR) {
+ SYS_CHECK_ERROR(SYS_ERR_BFERROR);
+ }
+ } /* for */
+ t2 = Timestamp_get();
+ delta = t2-t1;
+ txTaskProfile.bf.min = MIN(txTaskProfile.bf.min,delta);
+ txTaskProfile.bf.max = MAX(txTaskProfile.bf.max,delta);
+ txTaskProfile.bf.n++;
+ txTaskProfile.bf.total += (float)delta;
+
+ /* At this point we have consumed all input samples. Currently we did not implement
+ * any protection to prevent the swiDataIn from stepping over while we were doing this.
+ * We could let this task to handle the read pointer and SWI to handle write pointer which
+ * could be used to detect if such overrun would happen. */
+ /* Done with the beamformers */
+
+ /* Start ASNR's */
+ t1 = Timestamp_get();
+ for (k = 0; k < nvmics; k++) {
+ inst_p = sysContext.asnrInst_p[k]; /* fetch the bf instance pointer */
+ frame_p = sysContext.vmicfrm[k]; /* point to the output frame buffer */
+
+ err = asnrProcess(inst_p, (void*)frame_p, (void*)frame_p);
+
+ if (err != asnr_NOERR) {
+ SYS_CHECK_ERROR(SYS_ERR_ASNRERROR);
+ } /* if */
+ } /* for */
+ t2 = Timestamp_get();
+ delta = t2-t1;
+ txTaskProfile.asnr.min = MIN(txTaskProfile.asnr.min,delta);
+ txTaskProfile.asnr.max = MAX(txTaskProfile.asnr.max,delta);
+ txTaskProfile.asnr.n++;
+ txTaskProfile.asnr.total += (float)delta;
+ /* Done with the ASNR's */
+
+ /* Run MSS */
+ t1 = Timestamp_get();
+ inst_p = sysContext.mssInst_p; /* fetch the MSS instance pointer */
+#if (SYS_USE_DRC)
+ frame_p = txOutFrame1; /* point to the output frame buffer */
+#else
+ frame_p = outbuf[gtxFrameIndexCount]; /* point to the output frame buffer */
+#endif
+
+ err = mssProcess(inst_p, /* instance */
+ (void*)frame_p, /* output frame pointers */
+ (void*)frame_p, /* WORKAROUND (not used, but no NULL) */
+ (void**)sysContext.vmicfrm, /* Virtual microphones (beams) */
+ NULL, /* No remote mics */
+ NULL, /* No clean mics */
+ (void**)mics_in, /* Raw microphone array inputs */
+ NULL); /* Beam not supported (see fixed inputs) */
+
+ if (err != mss_NOERR) {
+ SYS_CHECK_ERROR(SYS_ERR_MSSERROR);
+ } /* if */
+ t2 = Timestamp_get();
+ delta = t2-t1;
+ txTaskProfile.mss.min = MIN(txTaskProfile.mss.min,delta);
+ txTaskProfile.mss.max = MAX(txTaskProfile.mss.max,delta);
+ txTaskProfile.mss.n++;
+ txTaskProfile.mss.total += (float)delta;
+
+ /* Trace source selection */
+ /* Write Args:
+ * arg2: (value) Angle in degrees
+ * arg3: (aux1) 0 - current source, 1 - new source
+ * arg4: (aux2) source index
+ */
+ err = mssDebugStat(inst_p, &mssDbg);
+ if (err !=mss_NOERR) {
+ SYS_CHECK_ERROR(SYS_ERR_MSSDEBUG);
+ }
+ /* mssDbg.cur_src.group/.index has the current source */
+ /* mssDbg.new_src.group/.index has "proposed" source */
+ if (mssDbg.cur_src.group != mssDbgCurSrc.group ||
+ mssDbg.cur_src.index != mssDbgCurSrc.index)
+ {
+ mssDbgCurSrc = mssDbg.cur_src;
+ angle = sysBfFilterAngles[sysBfVMicAngles[mssDbgCurSrc.index]];
+ ///Log_write6(UIAEvt_intWithKey, angle, 0, mssDbgCurSrc.index, (IArg)"MSS-C: %d, G:%d", 0, mssDbgCurSrc.group);
+ }
+ if (mssDbg.new_src.group != mssDbgNewSrc.group ||
+ mssDbg.new_src.index != mssDbgNewSrc.index)
+ {
+ mssDbgNewSrc = mssDbg.new_src;
+ angle = sysBfFilterAngles[sysBfVMicAngles[mssDbgNewSrc.index]];
+ ///Log_write6(UIAEvt_intWithKey, angle, 1, mssDbgNewSrc.index, (IArg)"MSS-N: %d, G:%d", 1, mssDbgNewSrc.group);
+ }
+ /* Done with MSS */
+
+#if (SYS_USE_DRC)
+ /* Run DRC */
+ t1 = Timestamp_get();
+ inst_p = sysContext.drcInst_p; /* fetch the DRC instance pointer */
+ frame_p = txOutFrame1; /* point to the MSS output frame buffer and use it as input */
+ outframe_p = txOutFrame2; /* point to DRC output frame */
+ err = drcProcess(inst_p, frame_p, /* instance and input frame pointers */
+ outframe_p); /* pointer to output buffer pointer */
+ t2 = Timestamp_get();
+ delta = t2-t1;
+ txTaskProfile.drc.min = MIN(txTaskProfile.drc.min,delta);
+ txTaskProfile.drc.max = MAX(txTaskProfile.drc.max,delta);
+ txTaskProfile.drc.n++;
+ txTaskProfile.drc.total += (float)delta;
+ /* Done with DRC */
+#endif
+
+ /*---------------------------------*/
+ /* Save samples to the TX buffer */
+ /*---------------------------------*/
+ // copy MSS output to TX left channel and RX mic 5 to TX right channel
+ // set the tempOutPtr to MSS output
+#if (SYS_USE_DRC)
+ tempOutPtr = txOutFrame2;
+#else
+ tempOutPtr = (unsigned char *)outbuf[gtxFrameIndexCount];
+#endif
+ // set the tempMicPtr to mic_in[7] (mic8)
+ tempMicPtr = (unsigned char *)mics_in[7];
+ // set the TX pointer to left channel
+ tempTxPtr = txbuf[gtxFrameIndexCount];
+ // copy upsampled and Q15 to Q31 converted MSS output to TX left channel
+ // copy upsampled and Q15 to Q31 converted mics_in[4] to TX right channel
+ for (i=0; i<BUFLEN/(SYS_FS_RATIO*2); i++)
+ {
+ // up sampling by SYS_FS_RATIO (SYS_FS_HZ to SYS_ADC_FS_HZ)
+ for (k=0; k<SYS_FS_RATIO; k++)
+ {
+ // MSS output
+ // Q15 to Q31
+ memset(tempTxPtr, 0, sizeof(short));
+ tempTxPtr += sizeof(short);
+ // copy the MSS output to the left channel of TX buffer
+ memcpy(tempTxPtr, tempOutPtr, sizeof(short));
+ tempTxPtr += sizeof(short);
+
+ // mics_in[7]
+ // Q15 to Q31
+ memset(tempTxPtr, 0, sizeof(short));
+ tempTxPtr += sizeof(short);
+ // copy the mics_in[7] to the right channel of TX buffer
+ memcpy(tempTxPtr, tempMicPtr, sizeof(short));
+ tempTxPtr += sizeof(short);
+ }
+ // move to next sample
+ tempOutPtr += sizeof(short);
+ tempMicPtr += sizeof(short);
+ }
+
+#endif
+
+ /******************************* Sample Processing End ***************************/
+
+ Cache_wbInv(txbuf[gtxFrameIndexCount],BUFSIZE * TX_NUM_SERIALIZER,Cache_Type_ALL, TRUE);
+
+ /* Issue full buffer to the output stream */
+ /* TX frame processing */
+ txFrame[gtxFrameIndexCount].cmd = MCASP_WRITE;
+ txFrame[gtxFrameIndexCount].addr = (void*)getGlobalAddr((uint32_t)txbuf[gtxFrameIndexCount]);
+ txFrame[gtxFrameIndexCount].size = BUFSIZE * TX_NUM_SERIALIZER;
+ txFrame[gtxFrameIndexCount].arg = (uint32_t) hMcaspTxChan;
+ txFrame[gtxFrameIndexCount].status = 0;
+ txFrame[gtxFrameIndexCount].misc = 1; /* reserved - used in callback to indicate asynch packet */
+
+ status = mcaspSubmitChan(hMcaspTxChan, &txFrame[gtxFrameIndexCount]);
+ if((status != MCASP_PENDING))
+ MCASP_log ("Debug: Error McASP TX : Prime buffer #%d submission FAILED\n", i32Count);
+
+ /* Issue an empty buffer to the input stream */
+ rxFrame[grxFrameIndexCount].cmd = MCASP_READ;
+ rxFrame[grxFrameIndexCount].addr = (void*)getGlobalAddr((uint32_t)rxbuf[grxFrameIndexCount]);
+ rxFrame[grxFrameIndexCount].size = BUFSIZE * RX_NUM_SERIALIZER;
+ rxFrame[grxFrameIndexCount].arg = (uint32_t) hMcaspRxChan;
+ rxFrame[grxFrameIndexCount].status = 0;
+ rxFrame[grxFrameIndexCount].misc = 1; /* reserved - used in callback to indicate asynch packet */
+
+ status = mcaspSubmitChan(hMcaspRxChan, &rxFrame[grxFrameIndexCount]);
+ if((status != MCASP_PENDING))
+ MCASP_log ("Debug: Error McASP RX : buffer #%d submission FAILED\n", i32Count);
+
+#ifdef MEASURE_TIME
+ profiling_start();
+#endif
+ total_frames_sent++;
+
+}
+
+ MCASP_log("\nTotal %d frames sent",total_frames_sent);
+ if(gblErrFlagXmt) {
+ MCASP_log("\n Transmit ERROR occured\n");
+ mcaspAnalyzeErrors(&errCbStatusXmt);
+ }
+
+ if(gblErrFlagRcv) {
+ MCASP_log("\n Receive ERROR occured\n");
+ mcaspAnalyzeErrors(&errCbStatusRcv);
+ }
+
+ MCASP_log("\nDeleting Rx channel");
+ status = mcaspDeleteChan(hMcaspRxChan);
+ MCASP_log("\nDeleting Tx channel");
+ status = mcaspDeleteChan(hMcaspTxChan);
+ MCASP_log("\nUnBinding Mcasp");
+ status = mcaspUnBindDev(hMcaspDev);
+
+ {
+ IHeap_Handle iheap;
+
+ iheap = HeapMem_Handle_to_xdc_runtime_IHeap(myHeap);
+ Error_init(&eb);
+ for(i32Count = 0; i32Count < (NUM_BUFS); i32Count ++)
+ {
+ Memory_free(iheap,rxbuf[i32Count],BUFSIZE * RX_NUM_SERIALIZER);
+ Memory_free(iheap,txbuf[i32Count],BUFSIZE * TX_NUM_SERIALIZER);
+ }
+ }
+ /* Display profiling results */
+#ifdef MEASURE_TIME
+ profiling_display_results();
+#endif
+
+ BIOS_exit(0);
+}
+
diff --git a/realtime_demo_bios/omapl137/src/audioSample_main.c b/realtime_demo_bios/omapl137/src/audioSample_main.c
--- /dev/null
@@ -0,0 +1,210 @@
+/*
+ * audioSample_main.c
+ *
+ * This file contains the test / demo code to demonstrate the Audio component
+ * driver functionality on SYS/BIOS 6.
+ *
+ * Copyright (C) 20017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/** \file audioSample_main.c
+ *
+ * \brief sample application for demonstration of audio driver usage
+ *
+ * This file contains the implementation of the sample appliation for the
+ * demonstration of audio playing through the audio interface layer.
+ *
+ * (C) Copyright 2017, Texas Instruments, Inc
+ */
+
+/* ========================================================================== */
+/* INCLUDE FILES */
+/* ========================================================================== */
+
+#include <xdc/std.h>
+#include <string.h>
+#include <xdc/runtime/Log.h>
+#include <ti/sysbios/knl/Task.h>
+#include <ti/sysbios/io/GIO.h>
+#include <ti/sysbios/BIOS.h>
+#include <xdc/runtime/System.h>
+#include <ti/sysbios/knl/Semaphore.h>
+#include <mcasp_drv.h>
+#include <ti/sysbios/io/IOM.h>
+#ifdef AIC_CODEC
+#include <Aic31.h>
+#endif
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+
+#include <ti/sdo/edma3/drv/edma3_drv.h>
+#include <ti/csl/csl_edma3.h>
+#include <ti/csl/csl_bootcfg.h>
+
+/* Portable data types */
+#include <ti/mas/types/types.h>
+#include <ti/mas/util/ecomem.h>
+
+#include "../../../common/components/fil.h"
+#include "../../../common/components/sys.h"
+
+#include "cmb.h"
+
+/* ========================================================================== */
+/* MACRO DEFINTIONS */
+/* ========================================================================== */
+
+
+
+
+/* Handle to the EDMA driver instance */
+EDMA3_DRV_Handle hEdma;
+
+extern void configureAudio(void);
+extern void McaspDevice_init(void);
+extern void configMcASP_SocHwInfo(void);
+
+/* Global System Configuration Structure */
+sysConfig_t sysConfig = {
+ SYS_MICS_MAX, /* #microphones */
+ SYS_VMICS_MAX, /* #virtual microphones */
+ 5, /* 5ms ASNR delay */
+ { 12, 9, 6}, /* ASNR band1=12dB, band2=9dB, band3=6dB */
+ TRUE, /* Enable ASNR */
+ FALSE, /* Do not use file I/O to load files (must use GEL to load into memory) */
+ TRUE, /* Use default angles for microphone configurations */
+ FALSE, /* Enable VAD */
+ -50, /* drc expansion knee point in dBm0 (dBFS is dBm0-3dB */
+ 6, /* drc max gain in dB */
+ FALSE /* Disable DRC */
+};
+
+/* Global FILE I/O Configuration Structure (must be configured even when file I/O not used */
+filConfig_t filConfig = {
+ FIL_LENGTH_MAX, /* number of samples to load from a file */
+ SYS_MICS_MAX, /* number of files to use */
+ TRUE, /* big endian */
+ FALSE, /* do not wrap around */
+ 40*SYS_FS_HZ /* Process 40s of the signal (current mic input file length */
+};
+
+/* ========================================================================== */
+/* FUNCTION DEFINITIONS */
+/* ========================================================================== */
+
+/* Initialize FILE I/O, system context */
+static void system_init(void)
+{
+ int err;
+
+ err = sysCreate(&sysConfig); /* Create system context */
+ SYS_CHECK_ERROR(err);
+
+ err = sysPrintConfig(SYSM_SCOPE_STATIC|SYSM_SCOPE_DYNAMIC);
+ SYS_CHECK_ERROR(err);
+
+} /* system_init */
+
+/**
+ * \brief Void main(Void)
+ *
+ * Main function of the sample application. This function enables
+ * the mcasp instance in the power sleep controller and also
+ * enables the pinmux for the mcasp instance. This also powers up
+ * any codecs if attached to McASP like the AIC codec, before switching to
+ * the task to Audio_echo_task().
+ *
+ * \param None
+ * \return None
+ */
+
+Void main(Void)
+{
+ /* enable the pinmux & PSC-enable for the mcasp device */
+ configureAudio();
+
+ system_init(); /* initialize system context, etc. */
+
+ sysBfCreate(); /* Create beamformers */
+ sysAsnrCreate(); /* Create ASNR's */
+ sysMssCreate(); /* Create MSS */
+#if (SYS_USE_DRC)
+ sysDrcCreate(); /* Create DRC */
+#endif
+
+ cmb_write("\n******************************************\n");
+ cmb_write( " Audio Preprocessing Demo \n");
+ cmb_write( "******************************************\n");
+
+ cmb_write("\nThis Demo Takes the Audio Input from 8 Mics from CMB\n");
+ cmb_write("Runs the BF+ASNR+MSS+DRC Signal Processing Chain on Mic1 through Mic7\n");
+ cmb_write("The Processed Audio Output will be Sent to Left Channels of OMAPL137 EVM On-Board Line-Out\n");
+ cmb_write("The Mic8 will be Sent to Right Channels of OMAPL137 EVM On-Board Line-Out\n");
+ cmb_write("Please Plug a Headphone to OMAPL137 EVM On-Board Line-Out\n");
+
+ UART_printf("\n******************************************\n");
+ UART_printf( " Audio Preprocessing Demo \n");
+ UART_printf( "******************************************\n");
+
+ UART_printf("\nThis Demo Takes the Audio Input from 8 Mics from CMB\n");
+ UART_printf("Runs the BF+ASNR+MSS+DRC Signal Processing Chain on Mic1 through Mic7\n");
+ UART_printf("The Processed Audio Output will be Sent to Left Channels of OMAPL137 EVM On-Board Line-Out\n");
+ UART_printf("The Mic8 will be Sent to Right Channels of OMAPL137 EVM On-Board Line-Out\n");
+ UART_printf("Please Plug a Headphone to OMAPL137 EVM On-Board Line-Out\n");
+
+ /* Initializing McASP HwInfo parameters */
+ McaspDevice_init();
+
+ /* Perform SOC specific McASP HwInfo Configuration for non-default parameters
+ * using the socGetConfig() and socSetConfig(). Please note that
+ this is being called AFTER McaspDevice_init() which initializes with the
+ default parameters */
+ configMcASP_SocHwInfo();
+#if defined(AIC_CODEC)
+ Aic31_init();
+#endif
+
+ BIOS_start();
+
+ return;
+}
+/*
+ * Mcasp init function called when creating the driver.
+ */
+
+
+
+
+/* ========================================================================== */
+/* END OF FILE */
+/* ========================================================================== */
diff --git a/realtime_demo_bios/omapl137/src/audio_evmInit.c b/realtime_demo_bios/omapl137/src/audio_evmInit.c
--- /dev/null
@@ -0,0 +1,204 @@
+/*
+ * audio_evmInit.c
+ *
+ * This file contains Audio application related EVM (platform) specific routines
+ * implementation.
+ * This is part of the EVM Initialization library (evmInit) which contains pinmux
+ * enabling routines for peripherals used by the application, and may contain
+ * related device pre-driver initialization routines.
+ *
+ * Copyright (C) 2009-2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/**
+ * \file audio_evmInit.c
+ *
+ * \brief This file contains the board specific code for enabling the use of
+ * audio driver.
+ *
+ * (C) Copyright 2009-2017, Texas Instruments, Inc
+ *
+ */
+#include "stdint.h"
+#include "stdio.h"
+#include "string.h"
+#include <stdbool.h>
+#include <ti/csl/hw_types.h>
+#include <ti/csl/csl_mcasp.h>
+#include <ti/csl/csl_edma.h>
+#include <ti/csl/src/ip/mcspi/V1/spi.h>
+#include <ti/csl/src/ip/gpio/V0/gpio.h>
+#include <ti/csl/src/ip/i2c/V0/i2c.h>
+#ifdef _TMS320C6X
+#include <ti/csl/arch/c67x/interrupt.h>
+#else
+#include <ti/csl/arch/arm9/interrupt.h>
+#endif
+#include <ti/csl/soc.h>
+#include <ti/csl/csl_syscfg.h>
+#include <ti/csl/csl_syscfgAux.h>
+#include "mcasp_audiodc_bios.h"
+
+#include <xdc/std.h>
+#define SW_I2C
+#ifndef SW_I2C
+#include <ti/drv/i2c/I2c.h>
+#endif
+
+#include <Audio_evmInit.h>
+#include <mcasp_cfg.h>
+#include <ti/drv/mcasp/soc/mcasp_soc.h>
+#include <ti/csl/cslr_device.h>
+#include <ti/csl/csl_bootcfg.h>
+#include <board.h>
+#include <ti/csl/cslr_syscfg.h>
+
+#include <ti/csl/hw_types.h>
+#include <ti/drv/uart/UART_stdio.h>
+
+#include "cmb.h"
+
+extern Board_STATUS Board_init(Board_initCfg);
+
+/*
+ ** Configures McASP pin muxing
+ */
+void configMcaspPinMux(void)
+{
+ // Pinmux settings for for McASP1
+ /*
+ ** Clearing the bits in context and retaining the other bit values
+ ** of PINMUX8 register.
+ */
+ hSysCfg->PINMUX8 &= (~(CSL_SYSCFG_PINMUX8_PINMUX8_23_20_MASK));
+
+ /*
+ ** Performing the actual Pin Multiplexing to select mandatory pins in
+ ** PINMUX8 register.
+ */
+ hSysCfg->PINMUX8 |= PINMUX8_MCASP1_AXR10_ENABLE;
+
+ // Pinmux settings for for McASP1
+ /*
+ ** Clearing the bits in context and retaining the other bit values
+ ** of PINMUX11 register.
+ */
+ hSysCfg->PINMUX11 &= (~(CSL_SYSCFG_PINMUX11_PINMUX11_31_28_MASK
+ | CSL_SYSCFG_PINMUX11_PINMUX11_27_24_MASK
+ | CSL_SYSCFG_PINMUX11_PINMUX11_23_20_MASK));
+
+ /*
+ ** Performing the actual Pin Multiplexing to select mandatory pins in
+ ** PINMUX11 register.
+ */
+ hSysCfg->PINMUX11 |= (PINMUX11_MCASP1_AFSX_ENABLE
+ | PINMUX11_MCASP1_ACLKX_ENABLE |
+ PINMUX11_MCASP1_AHCLKX_ENABLE);
+
+ /*
+ ** Clearing the bits in context and retaining the other bit values
+ ** of PINMUX12 register.
+ */
+ hSysCfg->PINMUX12 &= (~(CSL_SYSCFG_PINMUX12_PINMUX12_19_16_MASK
+ | CSL_SYSCFG_PINMUX12_PINMUX12_15_12_MASK
+ | CSL_SYSCFG_PINMUX12_PINMUX12_11_8_MASK
+ | CSL_SYSCFG_PINMUX12_PINMUX12_7_4_MASK
+ | CSL_SYSCFG_PINMUX12_PINMUX12_3_0_MASK
+ | CSL_SYSCFG_PINMUX12_PINMUX12_23_20_MASK
+ | CSL_SYSCFG_PINMUX12_PINMUX12_27_24_MASK
+ | CSL_SYSCFG_PINMUX12_PINMUX12_31_28_MASK));
+
+ /*
+ ** Performing the actual Pin Multiplexing to select mandatory pins in
+ ** PINMUX12 register.
+ */
+ hSysCfg->PINMUX12 |= (PINMUX12_MCASP1_AXR0_ENABLE |
+ PINMUX12_MCASP1_AMUTE_ENABLE | PINMUX12_MCASP1_AFSR_ENABLE |
+ PINMUX12_MCASP1_ACLKR_ENABLE | PINMUX12_MCASP1_AHCLKR_ENABLE |
+ PINMUX12_MCASP1_AXR0_ENABLE | PINMUX12_MCASP1_AXR1_ENABLE |
+ PINMUX12_MCASP1_AXR2_ENABLE | PINMUX12_MCASP1_AXR3_ENABLE);
+
+ /*
+ ** Clearing the bits in context and retaining the other bit values
+ ** of PINMUX13 register.
+ */
+ hSysCfg->PINMUX13 &= (~(CSL_SYSCFG_PINMUX13_PINMUX13_7_4_MASK));
+
+ /*
+ ** Performing the actual Pin Multiplexing to select mandatory pins in
+ ** PINMUX13 register.
+ */
+ hSysCfg->PINMUX13 |= (PINMUX13_MCASP1_AXR5_ENABLE);
+
+ // Pinmux settings for enable AMUTE0
+ /*
+ ** Clearing the bits in context and retaining the other bit values
+ ** of PINMUX10 register.
+ */
+ hSysCfg->PINMUX10 &= (~(CSL_SYSCFG_PINMUX10_PINMUX10_3_0_MASK));
+
+ /*
+ ** Performing the actual Pin Multiplexing to select mandatory pins in
+ ** PINMUX10 register.
+ */
+ hSysCfg->PINMUX10 |= (PINMUX10_AMUTE0_ENABLE);
+}
+
+void configureAudio(void)
+{
+ Board_STATUS stat = BOARD_SOK;
+ Board_initCfg arg = BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_UART_STDIO;
+ stat = Board_init(arg);
+
+ configMcaspPinMux();
+
+ cmb_AudioInit();
+
+ return;
+}
+
+void configMcASP_SocHwInfo(void)
+{
+ /* Configure the interrupts for the McASP Instance MCASP_NUM */
+ Mcasp_HwInfo hwInfo;
+
+ Mcasp_socGetInitCfg(MCASP_NUM, &hwInfo);
+
+
+/* Change anything if needed */
+ Mcasp_socSetInitCfg(MCASP_NUM,&hwInfo);
+}
+
+/* ========================================================================== */
+/* END OF FILE */
+/* ========================================================================== */
diff --git a/realtime_demo_bios/omapl137/src/makefile.libs b/realtime_demo_bios/omapl137/src/makefile.libs
--- /dev/null
@@ -0,0 +1,62 @@
+#
+# This file was generated based on the configuration script:
+# C:\ti\processor_sdk_rtos_omapl13x_3_03_00_04\demos\audio_preprocessing\realtime_demo_bios\omapl137\OMAPL137_bf_rt.cfg
+#
+# This makefile may be included in other makefiles that need to build
+# the libraries containing the compiled source files generated as
+# part of the configuration step.
+
+#
+# ======== GEN_SRC_DIR =========
+# The path to the sources generated during configuration
+#
+# This path must be either absolute or relative to the build directory.
+#
+# The absolute path to the generated source directory (at the time the
+# sources were generated) is:
+# C:\ti\processor_sdk_rtos_omapl13x_3_03_00_04\demos\audio_preprocessing\realtime_demo_bios\omapl137\src
+#
+GEN_SRC_DIR ?= ../src
+
+ifeq (,$(wildcard $(GEN_SRC_DIR)))
+$(error "ERROR: GEN_SRC_DIR must be set to the directory containing the generated sources")
+endif
+
+#
+# ======== .force ========
+# The .force goal is used to force the build of any goal that names it as
+# a prerequisite
+#
+.PHONY: .force
+
+#
+# ======== library macros ========
+#
+sysbios_SRC = $(GEN_SRC_DIR)/sysbios
+sysbios_LIB = $(GEN_SRC_DIR)/sysbios/sysbios.ae674
+
+#
+# ======== dependencies ========
+#
+all: $(sysbios_LIB)
+clean: .sysbios_clean
+
+
+# ======== convenient build goals ========
+.PHONY: sysbios
+sysbios: $(GEN_SRC_DIR)/sysbios/sysbios.ae674
+
+# CDT managed make executables depend on $(OBJS)
+OBJS += $(sysbios_LIB)
+
+#
+# ======== rules ========
+#
+$(sysbios_LIB): .force
+ @echo making $@ ...
+ @$(MAKE) -C $(sysbios_SRC)
+
+.sysbios_clean:
+ @echo cleaning $(sysbios_SRC) ...
+ -@$(MAKE) --no-print-directory -C $(sysbios_SRC) clean
+
diff --git a/realtime_demo_bios/omapl137/src/mcasp_cfg.c b/realtime_demo_bios/omapl137/src/mcasp_cfg.c
--- /dev/null
@@ -0,0 +1,306 @@
+/*
+ * mcasp_cfg.c
+ *
+ * This file contains the test / demo code to demonstrate the Audio component
+ * driver functionality on SYS/BIOS 6.
+ *
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/** \file mcasp_cfg.c
+ *
+ * \brief sample application for demostration of audio playing
+ *
+ * This file contains the implementation of the sample appliation for the
+ * demonstration of audio playing through the audio interface layer.
+ *
+ * (C) Copyright 2017, Texas Instruments, Inc
+ */
+
+/* ========================================================================== */
+/* INCLUDE FILES */
+/* ========================================================================== */
+
+#include <xdc/std.h>
+#include <ti/sysbios/io/IOM.h>
+#include <xdc/runtime/Memory.h>
+#include <ti/sysbios/heaps/HeapMem.h>
+#include <xdc/runtime/IHeap.h>
+#include <xdc/runtime/Error.h>
+#include <xdc/runtime/Log.h>
+#include <xdc/runtime/System.h>
+#include <ti/sysbios/BIOS.h>
+#include <ti/sysbios/knl/Semaphore.h>
+#include <mcasp_drv.h>
+#include <mcasp_cfg.h>
+#include <mcasp_tune.h>
+#include <ti/csl/csl_chip.h>
+#include <ti/sdo/edma3/drv/edma3_drv.h>
+#include <ti/sdo/edma3/rm/edma3_rm.h>
+#include <ti/sdo/edma3/drv/sample/bios6_edma3_drv_sample.h>
+#include "ICodec.h"
+#include "stdio.h"
+#include "string.h"
+
+
+void GblErrXmt(Mcasp_errCbStatus errCbStat);
+void GblErrRcv(Mcasp_errCbStatus errCbStat);
+
+/* ========================================================================== */
+/* IMPORTED VARIABLES */
+/* ========================================================================== */
+
+
+extern EDMA3_DRV_Handle hEdma;
+extern HeapMem_Handle myHeap;
+
+/* ========================================================================== */
+/* McASP Init config */
+/* ========================================================================== */
+
+
+
+Mcasp_HwSetupData mcaspRcvSetup = {
+ /* .rmask = */ 0xFFFFFFFF, /* All the data bits are to be used */
+#if defined (DSP_MODE)
+ /* .rfmt = */ 0x000080f0,
+#else /* I2S MODE*/
+ /* .rfmt = */ 0x000180F0,
+#endif /* 0/1 bit delay from framsync
+ * MSB first
+ * No extra bit padding
+ * Padding bit (ignore)
+ * slot Size is 32
+ * Reads from DMA port
+ * NO rotation
+ */
+#if defined (MCASP_MASTER)
+ #if defined (DSP_MODE)
+ /* .afsrctl = */ 0x00000002, /* burst mode,
+ * Frame sync is one bit
+ * internally generated frame sync
+ * Rising edge is start of frame
+ */
+
+ #else /* I2S MODE*/
+ /* .afsrctl = */ 0x00000113, /* I2S mode,
+ * Frame sync is one word
+ * Internally generated frame sync
+ * Falling edge is start of frame
+ */
+ #endif
+#else
+ #if defined (DSP_MODE)
+ /* .afsrctl = */ 0x00000000, /* burst mode,
+ * Frame sync is one bit
+ * Externally generated frame sync
+ * Rising edge is start of frame
+ */
+
+ #else /* I2S MODE*/
+ /* .afsrctl = */ 0x00000111, /* I2S mode,
+ * Frame sync is one word
+ * Externally generated frame sync
+ * Falling edge is start of frame
+ */
+ #endif
+#endif
+
+#if defined (DSP_MODE)
+/* .rtdm = */ 0x00000001, /* slot 1 is active (DSP)
+ * */
+
+#else /* I2S MODE*/
+ /* .rtdm = */ 0x00000003, /* 2 slots are active (I2S)
+ * */
+#endif
+ /* .rintctl = */ 0x00000000, /* sync error and overrun error */
+ /* .rstat = */ 0x000001FF, /* reset any existing status bits */
+ /* .revtctl = */ 0x00000000, /* DMA request is enabled or disabled */
+ {
+#if defined (MCASP_MASTER)
+ #if defined (DSP_MODE)
+ /* .aclkrctl = */ 0x00000020,
+ /* .ahclkrctl = */ 0x00008001,
+ #else /* I2S MODE*/
+ /* .aclkrctl = */ 0x000000A3, /* Div (4), Internal Source, rising edge */
+ /* .ahclkrctl = */ 0x00008005, /* Div (6), Internal AUX_CLK Source */
+ #endif
+#else
+ #if defined (DSP_MODE)
+ /* .aclkrctl = */ 0x00000000,
+ #else /* I2S MODE*/
+ /* .aclkrctl = */ 0x00000080, /* External Source, rising edge */
+ #endif
+ /* .ahclkrctl = */ 0x00000000, /* Don't Care */
+#endif
+ /* .rclkchk = */ 0x00000000
+ }
+} ;
+
+Mcasp_HwSetupData mcaspXmtSetup = {
+ /* .xmask = */ 0xFFFFFFFF, /* All the data bits are to be used */
+ #if defined (DSP_MODE)
+ /* .xfmt = */ 0x000080F0,
+ #else /* I2S MODE*/
+ /* .xfmt = */ 0x000180F0,
+ #endif /*
+ * 0/1 bit delay from framsync
+ * MSB first
+ * No extra bit padding
+ * Padding bit (ignore)
+ * slot Size is 32
+ * Reads from DMA port
+ * 0-bit rotation
+ */
+#if defined (MCASP_MASTER)
+ #if defined (DSP_MODE)
+ /* .afsxctl = */ 0x00000002, /* burst mode,
+ * Frame sync is one bit
+ * Internally generated frame sync
+ * Rising edge is start of frame
+ */
+ /* .xtdm = */ 0x00000001, /* slot 1 is active (DSP) */
+ #else /*I2S MODE*/
+ /* .afsxctl = */ 0x00000113, /* I2S mode,
+ * Frame sync is one word
+ * internally generated frame sync
+ * Falling edge is start of frame
+ */
+ /* .xtdm = */ 0x00000003, /* 2 slots are active (I2S) */
+ #endif
+#else
+ #if defined (DSP_MODE)
+ /* .afsxctl = */ 0x00000000, /* burst mode,
+ * Frame sync is one bit
+ * Rising edge is start of frame
+ * externally generated frame sync
+ */
+ /* .xtdm = */ 0x00000001, /* slot 1 is active (DSP) */
+ #else /*I2S MODE*/
+ /* .afsxctl = */ 0x00000111, /* I2S mode,
+ * Frame sync is one word
+ * Externally generated frame sync
+ * Falling edge is start of frame
+ */
+ /* .xtdm = */ 0x00000003, /* 2 slots are active (I2S) */
+ #endif
+#endif
+ /* .xintctl = */ 0x00000000, /* sync error,overrun error,clK error */
+ /* .xstat = */ 0x000001FF, /* reset any existing status bits */
+ /* .xevtctl = */ 0x00000000, /* DMA request is enabled or disabled */
+ {
+#if defined (MCASP_MASTER)
+ #if defined (DSP_MODE)
+ /* .aclkxctl = */ 0x00000027,
+ /* .ahclkxctl = */ 0x00008001,
+
+ #else /* I2S MODE*/
+ /* .aclkxctl = */ 0x000000E3, /* Div (4), Internal Source, SYNC, Falling edge */
+ /* .ahclkxctl = */ 0x00008005, /* Div (6), Internal AUX_CLK Source */
+ #endif
+#else
+ #if defined (DSP_MODE)
+ /* .aclkxctl = */ 0x00000000, /* External Source, SYNC */
+
+ #else /* I2S MODE*/
+ /* .aclkxctl = */ 0x00000080, /* External Source, SYNC, Falling edge */
+ #endif
+#endif
+ /* .xclkchk = */ 0x00000000
+ },
+
+};
+
+/* McAsp channel parameters */
+Mcasp_ChanParams mcasp_chanparam[2]=
+{
+ {
+ RX_NUM_SERIALIZER, /* number of serialisers */
+ {Mcasp_SerializerNum_1, /* serialiser index */
+ Mcasp_SerializerNum_3,
+ Mcasp_SerializerNum_2,
+ Mcasp_SerializerNum_10},
+ &mcaspRcvSetup,
+ TRUE,
+ Mcasp_OpMode_TDM, /* Mode (TDM/DIT) */
+ Mcasp_WordLength_32,
+ NULL,
+ 0,
+ NULL,
+ (Mcasp_GblCallback)&GblErrRcv,
+#if defined (DSP_MODE)
+ 1,
+ Mcasp_BufferFormat_1SER_1SLOT,
+#else /* I2S MODE*/
+ 2, /* number of TDM channels */
+ Mcasp_BufferFormat_MULTISER_MULTISLOT_SEMI_INTERLEAVED_1,
+#endif
+ TRUE,
+ RX_FIFO_EVENT_DMA_RATIO,
+ FALSE
+ },
+ {
+ TX_NUM_SERIALIZER, /* number of serialisers */
+ {Mcasp_SerializerNum_5,},
+ &mcaspXmtSetup,
+ TRUE,
+ Mcasp_OpMode_TDM,
+ Mcasp_WordLength_32, /* word width */
+ NULL,
+ 0,
+ NULL,
+ (Mcasp_GblCallback)&GblErrXmt,
+#if defined (DSP_MODE)
+ 1,
+ Mcasp_BufferFormat_1SER_1SLOT,
+#else /* I2S MODE*/
+ 2, /* number of TDM channels */
+ Mcasp_BufferFormat_1SER_MULTISLOT_INTERLEAVED,
+#endif
+ TRUE,
+ TX_FIFO_EVENT_DMA_RATIO,
+ FALSE
+ }
+};
+
+/*
+ * ======== createStreams ========
+ */
+ICodec_ChannelConfig AIC31_config =
+{
+ 16000, /* sampling rate for codec */
+ 70, /* gain (%) for codec */
+ 0x00,
+ 0x00
+};
diff --git a/realtime_demo_bios/omapl137/src/pcm186x_if.c b/realtime_demo_bios/omapl137/src/pcm186x_if.c
--- /dev/null
@@ -0,0 +1,378 @@
+/**
+ * \file pcm186x_if.c
+ *
+ * \brief APIs to configure the PCM186X ADC
+ *
+ * This file contains the implementation of the PCM186X ADC driver for
+ * DSP BIOS operating system.
+ *
+ * (C) Copyright 2017, Texas Instruments, Inc
+ */
+
+/*
+* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the
+* distribution.
+*
+* Neither the name of Texas Instruments Incorporated nor the names of
+* its contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*/
+
+/* ========================================================================== */
+/* INCLUDE FILES */
+/* ========================================================================== */
+#include <codec_if.h>
+#include "pcm186x_if.h"
+#include <ICodec.h>
+#include <mcasp_cfg.h>
+#include "cmb.h"
+
+/******************************************************************************
+** INTERNAL MACRO DEFINITIONS
+*******************************************************************************/
+#define I2C_CODEC_U1_ADDR (0x4A)
+#define I2C_CODEC_U2_ADDR (0x4B)
+// micr gain in dB (0 dB to 32 dB)
+#define MIC_GAIN_DB 32
+
+/*
+** Register Address for PCM186X Codec
+*/
+#define PCM186X_P0_REG0 (0) /* Page Select */
+#define PCM186X_P0_REG1 (1) /* Software Reset */
+#define PCM186X_P0_REG2 (2) /* Codec Sample Rate Select */
+#define PCM186X_P0_REG3 (3) /* PLL Programming A */
+#define PCM186X_P0_REG4 (4) /* PLL Programming B */
+#define PCM186X_P0_REG5 (5) /* PLL Programming C */
+#define PCM186X_P0_REG6 (6) /* PLL Programming D */
+#define PCM186X_P0_REG7 (7) /* Codec Datapath Setup */
+#define PCM186X_P0_REG8 (8) /* Audio Serial Data I/f Control A */
+#define PCM186X_P0_REG9 (9) /* Audio Serial Data I/f Control B */
+#define PCM186X_P0_REG10 (10) /* Audio Serial Data I/f Control C */
+#define PCM186X_P0_REG11 (11) /* Audio Codec Overflow Flag */
+#define PCM186X_P0_REG12 (12) /* Audio Codec Digital Filter Ctrl */
+#define PCM186X_P0_REG13 (13) /* Headset / Button Press Detect A */
+#define PCM186X_P0_REG14 (14) /* Headset / Button Press Detect B */
+#define PCM186X_P0_REG15 (15) /* Left ADC PGA Gain Control */
+#define PCM186X_P0_REG16 (16) /* Right ADC PGA Gain Control */
+#define PCM186X_P0_REG17 (17) /* MIC3L/R to Left ADC Control */
+#define PCM186X_P0_REG18 (18) /* MIC3L/R to Right ADC Control */
+#define PCM186X_P0_REG19 (19) /* LINE1L to Left ADC Control */
+#define PCM186X_P0_REG20 (20) /* LINE2L to Left ADC Control */
+#define PCM186X_P0_REG21 (21) /* LINE1R to Left ADC Control */
+#define PCM186X_P0_REG22 (22) /* LINE1R to Right ADC Control */
+#define PCM186X_P0_REG23 (23) /* LINE2R to Right ADC Control */
+#define PCM186X_P0_REG24 (24) /* LINE1L to Right ADC Control */
+#define PCM186X_P0_REG25 (25) /* MICBIAS Control */
+#define PCM186X_P0_REG26 (26) /* Left AGC Control A */
+#define PCM186X_P0_REG27 (27) /* Left AGC Control B */
+#define PCM186X_P0_REG28 (28) /* Left AGC Control C */
+#define PCM186X_P0_REG29 (29) /* Right AGC Control A */
+#define PCM186X_P0_REG30 (30) /* Right AGC Control B */
+#define PCM186X_P0_REG31 (31) /* Right AGC Control C */
+#define PCM186X_P0_REG32 (32) /* Left AGC Gain */
+#define PCM186X_P0_REG33 (33) /* Right AGC Gain */
+#define PCM186X_P0_REG34 (34) /* Left AGC Noise Gate Debounce */
+#define PCM186X_P0_REG35 (35) /* Right AGC Noise Gate Debounce */
+#define PCM186X_P0_REG36 (36) /* ADC Flag */
+#define PCM186X_P0_REG37 (37) /* DAC Power and Output Driver Control */
+#define PCM186X_P0_REG38 (38) /* High Power Output Driver Control*/
+#define PCM186X_P0_REG40 (40) /* High Power Output Stage Control*/
+#define PCM186X_P0_REG41 (41) /* DAC Output Switching Control */
+#define PCM186X_P0_REG42 (42) /* Output Driver Pop Reduction */
+#define PCM186X_P0_REG43 (43) /* Left DAC Digital Volume Control */
+#define PCM186X_P0_REG44 (44) /* Right DAC Digital Volume Control */
+#define PCM186X_P0_REG45 (45) /* LINE2L to HPLOUT Volume Control */
+#define PCM186X_P0_REG46 (46) /* PGA_L to HPLOUT Volume Control */
+#define PCM186X_P0_REG47 (47) /* DAC_L1 to HPLOUT Volume Control */
+#define PCM186X_P0_REG48 (48) /* LINE2R to HPLOUT Volume Control */
+#define PCM186X_P0_REG49 (49) /* PGA_R to HPLOUT Volume Control */
+#define PCM186X_P0_REG50 (50) /* DAC_R1 to HPLOUT Volume Control */
+#define PCM186X_P0_REG51 (51) /* HPLOUT Output Level Control */
+#define PCM186X_P0_REG52 (52) /* LINE2L to HPLCOM Volume Control */
+#define PCM186X_P0_REG53 (53) /* PGA_L to HPLCOM Volume Control */
+#define PCM186X_P0_REG54 (54) /* DAC_L1 to HPLCOM Volume Control */
+#define PCM186X_P0_REG55 (55) /* LINE2R to HPLCOM Volume Control */
+#define PCM186X_P0_REG56 (56) /* PGA_R to HPLCOM Volume Control */
+#define PCM186X_P0_REG57 (57) /* DAC_R1 to HPLCOM Volume Control */
+#define PCM186X_P0_REG58 (58) /* HPLCOM Output Level Control */
+#define PCM186X_P0_REG59 (59) /* LINE2L to HPROUT Volume Control */
+#define PCM186X_P0_REG60 (60) /* PGA_L to HPROUT Volume Control */
+#define PCM186X_P0_REG61 (61) /* DAC_L1 to HPROUT Volume Control */
+#define PCM186X_P0_REG62 (62) /* LINE2R to HPROUT Volume Control */
+#define PCM186X_P0_REG63 (63) /* PGA_R to HPROUT Volume Control */
+#define PCM186X_P0_REG64 (64) /* DAC_R1 to HPROUT Volume Control */
+#define PCM186X_P0_REG65 (65) /* HPROUT Output Level Control */
+#define PCM186X_P0_REG66 (66) /* LINE2L to HPRCOM Volume Control */
+#define PCM186X_P0_REG67 (67) /* PGA_L to HPRCOM Volume Control */
+#define PCM186X_P0_REG68 (68) /* DAC_L1 to HPRCOM Volume Control */
+#define PCM186X_P0_REG69 (69) /* LINE2R to HPRCOM Volume Control */
+#define PCM186X_P0_REG70 (70) /* PGA_R to HPRCOM Volume Control */
+#define PCM186X_P0_REG71 (71) /* DAC_R1 to HPRCOM Volume Control */
+#define PCM186X_P0_REG72 (72) /* HPRCOM Output Level Control */
+#define PCM186X_P0_REG73 (73) /* LINE2L to MONO_LOP/M Volume Control*/
+#define PCM186X_P0_REG74 (74) /* PGA_L to MONO_LOP/M Volume Control */
+#define PCM186X_P0_REG75 (75) /* DAC_L1 to MONO_LOP/M Volume Control */
+#define PCM186X_P0_REG76 (76) /* LINE2R to MONO_LOP/M Volume Control */
+#define PCM186X_P0_REG77 (77) /* PGA_R to MONO_LOP/M Volume Control */
+#define PCM186X_P0_REG78 (78) /* DAC_R1 to MONO_LOP/M Volume Control */
+#define PCM186X_P0_REG79 (79) /* MONO_LOP/M Output Level Control */
+#define PCM186X_P0_REG80 (80) /* LINE2L to LEFT_LOP/M Volume Control */
+#define PCM186X_P0_REG81 (81) /* PGA_L to LEFT_LOP/M Volume Control */
+#define PCM186X_P0_REG82 (82) /* DAC_L1 to LEFT_LOP/M Volume Control */
+#define PCM186X_P0_REG83 (83) /* LINE2R to LEFT_LOP/M Volume Control */
+#define PCM186X_P0_REG84 (84) /* PGA_R to LEFT_LOP/M Volume Control */
+#define PCM186X_P0_REG85 (85) /* DAC_R1 to LEFT_LOP/M Volume Control */
+#define PCM186X_P0_REG86 (86) /* LEFT_LOP/M Output Level Control */
+#define PCM186X_P0_REG87 (87) /* LINE2L to RIGHT_LOP/M Volume Control */
+#define PCM186X_P0_REG88 (88) /* PGA_L to RIGHT_LOP/M Volume Control */
+#define PCM186X_P0_REG89 (89) /* DAC_L1 to RIGHT_LOP/M Volume Control */
+#define PCM186X_P0_REG90 (90) /* LINE2R to RIGHT_LOP/M Volume Control */
+#define PCM186X_P0_REG91 (91) /* PGA_R to RIGHT_LOP/M Volume Control */
+#define PCM186X_P0_REG92 (92) /* DAC_R1 to RIGHT_LOP/M Volume Control*/
+#define PCM186X_P0_REG93 (93) /* RIGHT_LOP/M Output Level Control */
+#define PCM186X_P0_REG94 (94) /* Module Power Status */
+#define PCM186X_P0_REG95 (95) /**< O/P Driver Short Circuit Detection Status*/
+#define PCM186X_P0_REG96 (96) /* Sticky Interrupt Flags */
+#define PCM186X_P0_REG97 (97) /* Real-time Interrupt Flags */
+#define PCM186X_P0_REG98 (98) /* GPIO1 Control */
+#define PCM186X_P0_REG99 (99) /* GPIO2 Control */
+#define PCM186X_P0_REG100 (100) /* Additional GPIO Control A */
+#define PCM186X_P0_REG101 (101) /* Additional GPIO Control B */
+#define PCM186X_P0_REG102 (102) /* Clock Generation Control */
+#define PCM186X_P0_REG109 (109) /* DAC Quiescent Current Adjustment */
+
+#define PCM186X_RESET (0x80)
+
+#define PCM186X_SLOT_WIDTH_16 (0u << 4u)
+#define PCM186X_SLOT_WIDTH_20 (1u << 4u)
+#define PCM186X_SLOT_WIDTH_24 (2u << 4u)
+#define PCM186X_SLOT_WIDTH_32 (3u << 4u)
+
+extern unsigned int I2C_slaveAddr;
+
+/******************************************************************************
+** FUNCTION DEFINITIONS
+*******************************************************************************/
+/**
+ * \brief Resets the PCM186X Codec
+ *
+ * \param baseAddr Base Address of the interface connected to PCM186X
+ *
+ * \return None.
+ *
+ **/
+void PCM186XReset(unsigned int baseAddr)
+{
+ /* Select Page 0 */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG0, 0);
+
+ /* Reset the codec */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG1, PCM186X_RESET);
+}
+
+/**
+ * \brief Initializes the ADC section of the PCM186X Codec
+ *
+ * \param baseAddr Base Address of the interface connected to PCM186X
+ *
+ * \return None.
+ *
+ **/
+void PCM186XADCInit(void)
+{
+#if 0
+ unsigned int baseAddr = SOC_I2C_1_REGS;
+ volatile int looper;
+
+ //
+ // U1 set up
+ //
+ // initialize U1 on CMB
+ ///I2CCodecIfInit(baseAddr, 2, I2C_CODEC_U1_ADDR);
+ I2C_slaveAddr = I2C_CODEC_U1_ADDR;
+
+#ifdef AUXCLK_MASTER_MODE
+ // changae to page 0
+ CodecRegWrite(baseAddr, PCM186X_P0_REG0, 0x00);
+
+ // {0x01, 0x40}, /** PGA CH1_L to MIC_GAIN_DB */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG1, (MIC_GAIN_DB*2)&0x7F);
+
+ // {0x02, 0x40}, /** PGA CH1_R to MIC_GAIN_DB */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG2, (MIC_GAIN_DB*2)&0x7F);
+
+ // {0x03, 0x40}, /** PGA CH2_L to MIC_GAIN_DB */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG3, (MIC_GAIN_DB*2)&0x7F);
+
+ // {0x04, 0x40}, /** PGA CH2_R to MIC_GAIN_DB */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG4, (MIC_GAIN_DB*2)&0x7F);
+
+ // {0x06, 0x41}, /** Polarity : Normal, Channel : VINL1[SE] */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG6, 0x41);
+
+ // {0x07, 0x41}, /** Polarity : Normal, Channel : VINR1[SE] */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG7, 0x41);
+
+ // {0x08, 0x44}, /** Polarity : Normal, Channel : VINL3[SE] */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG8, 0x44);
+
+ // {0x09, 0x44}, /** Polarity : Normal, Channel : VINR3[SE] */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG9, 0x44);
+
+ // {0x0B, 0x0C}, /** TX_WLEN: 16, FMT: I2S */
+ ///CodecRegWrite(baseAddr, PCM186X_P0_REG11, 0x0C);
+ // {0x0B, 0x0B}, /** RX WLEN : 24bit, TDM_LRCK_MODE : Duty cycle of LRCK is 50%, TX WLEN : 24 bit, FMT : I2S format */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG11, 0x44);
+
+ // {0x10, 0x00}, /** GPIO0_FUNC - GPIO0, GPIO0_POL - Normal
+ // GPIO1_FUNC - GPIO1, GPIO1_POL - Normal */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG16, 0x00);
+
+ // {0x11, 0x50}, /** GPIO2_FUNC - GPIO2, GPIO2_POL - Normal
+ // GPIO3_FUNC - DOUT2, GPIO3_POL - Normal */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG17, 0x50);
+
+ // {0x12, 0x00}, /** GPIO0_DIR - GPIO0 - Input
+ // GPIO1_DIR - GPIO1 - Input */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG18, 0x00);
+
+ // {0x13, 0x40}, /** GPIO2_DIR - GPIO2 - Input
+ // GPIO3_DIR - GPIO3 - Output */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG19, 0x40);
+
+ // {0x20, 0x01}, /** SCK_XI_SEL : SCK or XTAL, MST_SCK_SRC : SCK or XI,
+ // MST_MODE : Slave, CMB_ADC_CLK_SRC : SCK,DSP2_CLK_SRC : SCK,
+ // DSP1_CLK_SRC : SCK,CLKDET_EN : Enable */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG32, 0x41);
+
+ // wait for coec to be ready
+ for (looper = 0; looper < 20000; looper++)
+ {
+ ; // Wait
+ }
+
+ //
+ // U2 set up
+ //
+ // initialize U2 on CMB
+ ///I2CCodecIfInit(baseAddr, 2, I2C_CODEC_U2_ADDR);
+ I2C_slaveAddr = I2C_CODEC_U2_ADDR;
+ // changae to page 0
+ CodecRegWrite(baseAddr, PCM186X_P0_REG0, 0x00);
+
+ // {0x01, 0x40}, /** PGA CH1_L to MIC_GAIN_DB */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG1, (MIC_GAIN_DB*2)&0x7F);
+
+ // {0x02, 0x40}, /** PGA CH1_R to MIC_GAIN_DB */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG2, (MIC_GAIN_DB*2)&0x7F);
+
+ // {0x03, 0x40}, /** PGA CH2_L to MIC_GAIN_DB */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG3, (MIC_GAIN_DB*2)&0x7F);
+
+ // {0x04, 0x40}, /** PGA CH2_R to MIC_GAIN_DB */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG4, (MIC_GAIN_DB*2)&0x7F);
+
+ // {0x06, 0x41}, /** Polarity : Normal, Channel : VINL1[SE] */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG6, 0x41);
+
+ // {0x07, 0x41}, /** Polarity : Normal, Channel : VINR1[SE] */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG7, 0x41);
+
+ // {0x08, 0x44}, /** Polarity : Normal, Channel : VINL3[SE] */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG8, 0x44);
+
+ // {0x09, 0x44}, /** Polarity : Normal, Channel : VINR3[SE] */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG9, 0x44);
+
+ // {0x0B, 0x0C}, /** TX_WLEN: 16, FMT: I2S */
+ ///CodecRegWrite(baseAddr, PCM186X_P0_REG11, 0x0C);
+ // {0x0B, 0x0B}, /** RX WLEN : 24bit, TDM_LRCK_MODE : Duty cycle of LRCK is 50%, TX WLEN : 24 bit, FMT : I2S format */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG11, 0x44);
+
+ // {0x10, 0x00}, /** GPIO0_FUNC - GPIO0, GPIO0_POL - Normal
+ // GPIO1_FUNC - GPIO1, GPIO1_POL - Normal */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG16, 0x00);
+
+ // {0x11, 0x50}, /** GPIO2_FUNC - GPIO2, GPIO2_POL - Normal
+ // GPIO3_FUNC - DOUT2, GPIO3_POL - Normal */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG17, 0x50);
+
+ // {0x12, 0x00}, /** GPIO0_DIR - GPIO0 - Input
+ // GPIO1_DIR - GPIO1 - Input */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG18, 0x00);
+
+ // {0x13, 0x40}, /** GPIO2_DIR - GPIO2 - Input
+ // GPIO3_DIR - GPIO3 - Output */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG19, 0x40);
+
+ // {0x20, 0x01}, /** SCK_XI_SEL : SCK or XTAL, MST_SCK_SRC : SCK or XI,
+ // MST_MODE : Slave, CMB_ADC_CLK_SRC : SCK,DSP2_CLK_SRC : SCK,
+ // DSP1_CLK_SRC : SCK,CLKDET_EN : Enable */
+ CodecRegWrite(baseAddr, PCM186X_P0_REG32, 0x41);
+
+ // wait for coec to be ready
+ for (looper = 0; looper < 2000; looper++)
+ {
+ ; // Wait
+ }
+#endif
+#else
+ Cmb_STATUS status;
+ volatile int looper;
+
+ I2C_slaveAddr = I2C_CODEC_U1_ADDR;
+ status = (Cmb_STATUS)cmb_AudioAdcInit(CMB_ADC_DEVICE_0);
+ if(status != Cmb_EOK)
+ {
+ IFPRINT(cmb_write("audioAdcConfig : audioAdcConfig Failed\n"));
+ return;
+ }
+
+ // wait for coec to be ready
+ for (looper = 0; looper < 20000; looper++)
+ {
+ ; // Wait
+ }
+
+ I2C_slaveAddr = I2C_CODEC_U2_ADDR;
+ status = (Cmb_STATUS)cmb_AudioAdcInit(CMB_ADC_DEVICE_1);
+ if(status != Cmb_EOK)
+ {
+ IFPRINT(cmb_write("audioAdcConfig : audioAdcConfig Failed\n"));
+ return;
+ }
+
+ // wait for coec to be ready
+ for (looper = 0; looper < 20000; looper++)
+ {
+ ; // Wait
+ }
+#endif
+}
+
+/***************************** End Of File ***********************************/
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/.dlls b/realtime_demo_bios/platforms/packages/dskDA830Custom/.dlls
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/.executables b/realtime_demo_bios/platforms/packages/dskDA830Custom/.executables
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/.interfaces b/realtime_demo_bios/platforms/packages/dskDA830Custom/.interfaces
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/.libraries b/realtime_demo_bios/platforms/packages/dskDA830Custom/.libraries
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/.xdcenv.mak b/realtime_demo_bios/platforms/packages/dskDA830Custom/.xdcenv.mak
--- /dev/null
@@ -0,0 +1,16 @@
+#
+_XDCBUILDCOUNT = 1
+ifneq (,$(findstring path,$(_USEXDCENV_)))
+override XDCPATH = C:/ti/volib_C66_2_1_0_1/packages;C:/ti/pdk_k2g_1_0_2/packages;C:/ti/ipc_3_43_01_03/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/uia_2_00_03_43/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/ndk_2_24_03_35/packages;C:/ti/framework_components_3_40_02_07/packages;C:/ti/framework_components_3_40_02_07/examples;C:/ti/xdctools_3_32_00_06_core/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/pdk_k2hk_4_0_0/packages;C:/ti/dsplib_c66x_3_4_0_0/packages;C:/ti/aer_c64Px_obj_17_0_0_0/packages;C:/ti/openmp_dsp_k2g_2_03_01_00/packages;C:/ti/ctoolslib_2_2_0_0/packages;C:/ti/imglib_c66x_3_1_1_0/packages;C:/ti/mathlib_c66x_3_1_1_0/packages;C:/ti/bios_6_45_01_29/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/xdais_7_24_00_04/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/xdais_7_24_00_04/examples;C:/c55_lp/ti_c55_csl/bios_5_42_02_10/packages;C:/ti/volib_C64P_2_1_0_1/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/edma3_lld_02_12_01_22/packages
+override XDCROOT = C:/ti/xdctools_3_32_00_06_core
+override XDCBUILDCFG = ./config.bld
+endif
+ifneq (,$(findstring args,$(_USEXDCENV_)))
+override XDCARGS =
+override XDCTARGETS =
+endif
+#
+ifeq (0,1)
+PKGPATH = C:/ti/volib_C66_2_1_0_1/packages;C:/ti/pdk_k2g_1_0_2/packages;C:/ti/ipc_3_43_01_03/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/uia_2_00_03_43/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/ndk_2_24_03_35/packages;C:/ti/framework_components_3_40_02_07/packages;C:/ti/framework_components_3_40_02_07/examples;C:/ti/xdctools_3_32_00_06_core/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/pdk_k2hk_4_0_0/packages;C:/ti/dsplib_c66x_3_4_0_0/packages;C:/ti/aer_c64Px_obj_17_0_0_0/packages;C:/ti/openmp_dsp_k2g_2_03_01_00/packages;C:/ti/ctoolslib_2_2_0_0/packages;C:/ti/imglib_c66x_3_1_1_0/packages;C:/ti/mathlib_c66x_3_1_1_0/packages;C:/ti/bios_6_45_01_29/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/xdais_7_24_00_04/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/xdais_7_24_00_04/examples;C:/c55_lp/ti_c55_csl/bios_5_42_02_10/packages;C:/ti/volib_C64P_2_1_0_1/packages;C:/procsdk/download/ti_k2hk_2.0.1.7/edma3_lld_02_12_01_22/packages;C:/ti/xdctools_3_32_00_06_core/packages;..
+HOSTOS = Windows
+endif
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/Platform.xdc b/realtime_demo_bios/platforms/packages/dskDA830Custom/Platform.xdc
--- /dev/null
@@ -0,0 +1,67 @@
+/*!
+ * File generated by platform wizard. DO NOT MODIFY
+ *
+ */
+
+metaonly module Platform inherits xdc.platform.IPlatform {
+
+ config ti.platforms.generic.Platform.Instance CPU =
+ ti.platforms.generic.Platform.create("CPU", {
+ clockRate: 456,
+ catalogName: "ti.catalog.c6000",
+ deviceName: "TMS320DA830",
+ customMemoryMap:
+ [
+ ["IRAM",
+ {
+ name: "IRAM",
+ base: 0x11800000,
+ len: 0x00040000,
+ space: "code/data",
+ access: "RWX",
+ }
+ ],
+ ["IROM",
+ {
+ name: "IROM",
+ base: 0x11700000,
+ len: 0x00100000,
+ space: "code/data",
+ access: "RX",
+ }
+ ],
+ ["L3_CBA_RAM",
+ {
+ name: "L3_CBA_RAM",
+ base: 0x80000000,
+ len: 0x00020000,
+ space: "code/data",
+ access: "RWX",
+ }
+ ],
+ ["EXT_RAM",
+ {
+ name: "EXT_RAM",
+ base: 0xC0000000,
+ len: 0x20000000,
+ space: "code/data",
+ access: "RWX",
+ }
+ ],
+ ],
+ l2Mode: "0k",
+ l1PMode: "32k",
+ l1DMode: "32k",
+
+ });
+
+instance :
+
+ override config string codeMemory = "IRAM";
+ override config string dataMemory = "IRAM";
+ override config string stackMemory = "IRAM";
+
+ config String l2Mode = "0k";
+ config String l1PMode = "32k";
+ config String l1DMode = "32k";
+}
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/Platform.xs b/realtime_demo_bios/platforms/packages/dskDA830Custom/Platform.xs
--- /dev/null
@@ -0,0 +1,33 @@
+/*!
+ * File generated by platform wizard. DO NOT MODIFY.
+ *
+ */
+
+function getCpuDataSheet(cpuId)
+{
+ return this.$module.CPU.getCpuDataSheet(cpuId);
+}
+
+function getCreateArgs()
+{
+ return this.$module.CPU;
+}
+
+function getExeContext(prog)
+{
+ return this.$module.CPU.getExeContext(prog);
+}
+
+
+function getExecCmd(prog)
+{
+ return this.$module.CPU.getExecCmd(prog);
+}
+
+
+function getLinkTemplate(prog)
+{
+ return this.$module.CPU.getLinkTemplate(prog);
+}
+
+
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/config.bld b/realtime_demo_bios/platforms/packages/dskDA830Custom/config.bld
--- /dev/null
@@ -0,0 +1,6 @@
+/*!
+ * File generated by platform wizard. DO NOT MODIFY
+ *
+ */
+
+Build.useTargets = null;
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/dskDA830Custom.zip b/realtime_demo_bios/platforms/packages/dskDA830Custom/dskDA830Custom.zip
new file mode 100644 (file)
index 0000000..7871bcf
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index 0000000..7871bcf
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diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package.bld b/realtime_demo_bios/platforms/packages/dskDA830Custom/package.bld
--- /dev/null
@@ -0,0 +1,9 @@
+/*!
+ * File generated by platform wizard. DO NOT MODIFY.
+ *
+ */
+
+Pkg.attrs.archiver = "zip";
+Pkg.attrs.exportAll = true;
+
+
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package.mak b/realtime_demo_bios/platforms/packages/dskDA830Custom/package.mak
--- /dev/null
@@ -0,0 +1,161 @@
+#
+# Do not edit this file. This file is generated from
+# package.bld. Any modifications to this file will be
+# overwritten whenever makefiles are re-generated.
+#
+
+unexport MAKEFILE_LIST
+MK_NOGENDEPS := $(filter clean,$(MAKECMDGOALS))
+override PKGDIR = dskDA830Custom
+XDCINCS = -I. -I$(strip $(subst ;, -I,$(subst $(space),\$(space),$(XPKGPATH))))
+XDCCFGDIR = package/cfg/
+
+#
+# The following dependencies ensure package.mak is rebuilt
+# in the event that some included BOM script changes.
+#
+ifneq (clean,$(MAKECMDGOALS))
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/utils.js:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/utils.js
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/xdc.tci:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/xdc.tci
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/template.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/template.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/om2.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/om2.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/xmlgen.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/xmlgen.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/xmlgen2.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/xmlgen2.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/Warnings.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/Warnings.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/IPackage.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/IPackage.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/package.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/package.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/global/Clock.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/global/Clock.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/global/Trace.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/global/Trace.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/bld.js:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/bld.js
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/BuildEnvironment.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/BuildEnvironment.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/PackageContents.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/PackageContents.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/_gen.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/_gen.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Library.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Library.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Executable.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Executable.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Repository.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Repository.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Configuration.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Configuration.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Script.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Script.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Manifest.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Manifest.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Utils.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/Utils.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/ITarget.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/ITarget.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/ITarget2.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/ITarget2.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/ITarget3.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/ITarget3.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/ITargetFilter.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/ITargetFilter.xs
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/package.xs:
+package.mak: C:/ti/xdctools_3_32_00_06_core/packages/xdc/bld/package.xs
+package.mak: config.bld
+package.mak: package.bld
+endif
+
+
+all: .executables
+.executables: .libraries .dlls
+.libraries: .interfaces
+
+PKGCFGS := $(wildcard package.xs) package/build.cfg
+.interfaces: package/package.xdc.inc package/package.defs.h package.xdc $(PKGCFGS)
+
+-include package/package.xdc.dep
+package/%.xdc.inc package/%_dskDA830Custom.c package/%.defs.h: %.xdc $(PKGCFGS)
+ @$(MSG) generating interfaces for package dskDA830Custom" (because $@ is older than $(firstword $?))" ...
+ $(XSRUN) -f xdc/services/intern/cmd/build.xs $(MK_IDLOPTS) -m package/package.xdc.dep -i package/package.xdc.inc package.xdc
+
+ifeq (,$(MK_NOGENDEPS))
+-include package/package.cfg.dep
+endif
+
+package/package.cfg.xdc.inc: .interfaces $(XDCROOT)/packages/xdc/cfg/cfginc.js package.xdc
+ @$(MSG) generating schema include file list ...
+ $(CONFIG) -f $(XDCROOT)/packages/xdc/cfg/cfginc.js dskDA830Custom $@
+
+test:;
+%,copy:
+ @$(if $<,,$(MSG) don\'t know how to build $*; exit 1)
+ @$(MSG) cp $< $@
+ $(RM) $@
+ $(CP) $< $@
+
+$(XDCCFGDIR)%.c $(XDCCFGDIR)%.h $(XDCCFGDIR)%.xdl: $(XDCCFGDIR)%.cfg $(XDCROOT)/packages/xdc/cfg/Main.xs | .interfaces
+ @$(MSG) "configuring $(_PROG_NAME) from $< ..."
+ $(CONFIG) $(_PROG_XSOPTS) xdc.cfg $(_PROG_NAME) $(XDCCFGDIR)$*.cfg $(XDCCFGDIR)$*
+
+.PHONY: release,dskDA830Custom
+ifeq (,$(MK_NOGENDEPS))
+-include package/rel/dskDA830Custom.zip.dep
+endif
+package/rel/dskDA830Custom/dskDA830Custom/package/package.rel.xml: package/package.bld.xml
+package/rel/dskDA830Custom/dskDA830Custom/package/package.rel.xml: package/build.cfg
+package/rel/dskDA830Custom/dskDA830Custom/package/package.rel.xml: package/package.xdc.inc
+package/rel/dskDA830Custom/dskDA830Custom/package/package.rel.xml: package/package.cfg.xdc.inc
+package/rel/dskDA830Custom/dskDA830Custom/package/package.rel.xml: .force
+ @$(MSG) generating external release references $@ ...
+ $(XS) $(JSENV) -f $(XDCROOT)/packages/xdc/bld/rel.js $(MK_RELOPTS) . $@
+
+dskDA830Custom.zip: package/rel/dskDA830Custom.xdc.inc package/rel/dskDA830Custom/dskDA830Custom/package/package.rel.xml
+ @$(MSG) making release file $@ "(because of $(firstword $?))" ...
+ -$(RM) $@
+ $(call MKRELZIP,package/rel/dskDA830Custom.xdc.inc,package/rel/dskDA830Custom.zip.dep)
+
+
+release release,dskDA830Custom: all dskDA830Custom.zip
+clean:: .clean
+ -$(RM) dskDA830Custom.zip
+ -$(RM) package/rel/dskDA830Custom.xdc.inc
+ -$(RM) package/rel/dskDA830Custom.zip.dep
+
+clean:: .clean
+ -$(RM) .libraries $(wildcard .libraries,*)
+clean::
+ -$(RM) .dlls $(wildcard .dlls,*)
+#
+# The following clean rule removes user specified
+# generated files or directories.
+#
+
+ifneq (clean,$(MAKECMDGOALS))
+ifeq (,$(wildcard package))
+ $(shell $(MKDIR) package)
+endif
+ifeq (,$(wildcard package/cfg))
+ $(shell $(MKDIR) package/cfg)
+endif
+ifeq (,$(wildcard package/lib))
+ $(shell $(MKDIR) package/lib)
+endif
+ifeq (,$(wildcard package/rel))
+ $(shell $(MKDIR) package/rel)
+endif
+ifeq (,$(wildcard package/internal))
+ $(shell $(MKDIR) package/internal)
+endif
+endif
+clean::
+ -$(RMDIR) package
+
+
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package.xdc b/realtime_demo_bios/platforms/packages/dskDA830Custom/package.xdc
--- /dev/null
@@ -0,0 +1,9 @@
+/*!
+ * File generated by platform wizard. DO NOT MODIFY.
+ *
+ */
+
+package dskDA830Custom {
+ module Platform;
+}
+
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/.vers_b160 b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/.vers_b160
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/.vers_g180 b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/.vers_g180
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/.vers_r170 b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/.vers_r170
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/.xdc-B06 b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/.xdc-B06
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/build.cfg b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/build.cfg
--- /dev/null
@@ -0,0 +1,9 @@
+if (pkg.$vers.length >= 3) {
+ pkg.$vers.push(Packages.xdc.services.global.Vers.getDate(xdc.csd() + '/..'));
+}
+
+pkg.build.libraries = [
+];
+
+pkg.build.libDesc = [
+];
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/dskDA830Custom.ccs b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/dskDA830Custom.ccs
new file mode 100644 (file)
index 0000000..d95e073
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index 0000000..d95e073
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diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/dskDA830Custom.class b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/dskDA830Custom.class
new file mode 100644 (file)
index 0000000..aba9106
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diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/dskDA830Custom.java b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/dskDA830Custom.java
--- /dev/null
@@ -0,0 +1,365 @@
+/*
+ * Do not modify this file; it is automatically
+ * generated and any modifications will be overwritten.
+ *
+ * @(#) xdc-B06
+ */
+import java.util.*;
+import org.mozilla.javascript.*;
+import xdc.services.intern.xsr.*;
+import xdc.services.spec.Session;
+
+public class dskDA830Custom
+{
+ static final String VERS = "@(#) xdc-B06\n";
+
+ static final Proto.Elm $$T_Bool = Proto.Elm.newBool();
+ static final Proto.Elm $$T_Num = Proto.Elm.newNum();
+ static final Proto.Elm $$T_Str = Proto.Elm.newStr();
+ static final Proto.Elm $$T_Obj = Proto.Elm.newObj();
+
+ static final Proto.Fxn $$T_Met = new Proto.Fxn(null, null, 0, -1, false);
+ static final Proto.Map $$T_Map = new Proto.Map($$T_Obj);
+ static final Proto.Arr $$T_Vec = new Proto.Arr($$T_Obj);
+
+ static final XScriptO $$DEFAULT = Value.DEFAULT;
+ static final Object $$UNDEF = Undefined.instance;
+
+ static final Proto.Obj $$Package = (Proto.Obj)Global.get("$$Package");
+ static final Proto.Obj $$Module = (Proto.Obj)Global.get("$$Module");
+ static final Proto.Obj $$Instance = (Proto.Obj)Global.get("$$Instance");
+ static final Proto.Obj $$Params = (Proto.Obj)Global.get("$$Params");
+
+ static final Object $$objFldGet = Global.get("$$objFldGet");
+ static final Object $$objFldSet = Global.get("$$objFldSet");
+ static final Object $$proxyGet = Global.get("$$proxyGet");
+ static final Object $$proxySet = Global.get("$$proxySet");
+ static final Object $$delegGet = Global.get("$$delegGet");
+ static final Object $$delegSet = Global.get("$$delegSet");
+
+ Scriptable xdcO;
+ Session ses;
+ Value.Obj om;
+
+ boolean isROV;
+ boolean isCFG;
+
+ Proto.Obj pkgP;
+ Value.Obj pkgV;
+
+ ArrayList<Object> imports = new ArrayList<Object>();
+ ArrayList<Object> loggables = new ArrayList<Object>();
+ ArrayList<Object> mcfgs = new ArrayList<Object>();
+ ArrayList<Object> icfgs = new ArrayList<Object>();
+ ArrayList<String> inherits = new ArrayList<String>();
+ ArrayList<Object> proxies = new ArrayList<Object>();
+ ArrayList<Object> sizes = new ArrayList<Object>();
+ ArrayList<Object> tdefs = new ArrayList<Object>();
+
+ void $$IMPORTS()
+ {
+ Global.callFxn("loadPackage", xdcO, "xdc");
+ Global.callFxn("loadPackage", xdcO, "xdc.corevers");
+ Global.callFxn("loadPackage", xdcO, "xdc.platform");
+ Global.callFxn("loadPackage", xdcO, "ti.platforms.generic");
+ }
+
+ void $$OBJECTS()
+ {
+ pkgP = (Proto.Obj)om.bind("dskDA830Custom.Package", new Proto.Obj());
+ pkgV = (Value.Obj)om.bind("dskDA830Custom", new Value.Obj("dskDA830Custom", pkgP));
+ }
+
+ void Platform$$OBJECTS()
+ {
+ Proto.Obj po, spo;
+ Value.Obj vo;
+
+ po = (Proto.Obj)om.bind("dskDA830Custom.Platform.Module", new Proto.Obj());
+ vo = (Value.Obj)om.bind("dskDA830Custom.Platform", new Value.Obj("dskDA830Custom.Platform", po));
+ pkgV.bind("Platform", vo);
+ // decls
+ om.bind("dskDA830Custom.Platform.Board", om.findStrict("xdc.platform.IPlatform.Board", "dskDA830Custom"));
+ om.bind("dskDA830Custom.Platform.Memory", om.findStrict("xdc.platform.IPlatform.Memory", "dskDA830Custom"));
+ // insts
+ Object insP = om.bind("dskDA830Custom.Platform.Instance", new Proto.Obj());
+ po = (Proto.Obj)om.bind("dskDA830Custom.Platform$$Object", new Proto.Obj());
+ om.bind("dskDA830Custom.Platform.Object", new Proto.Str(po, true));
+ po = (Proto.Obj)om.bind("dskDA830Custom.Platform$$Params", new Proto.Obj());
+ om.bind("dskDA830Custom.Platform.Params", new Proto.Str(po, true));
+ }
+
+ void Platform$$CONSTS()
+ {
+ // module Platform
+ }
+
+ void Platform$$CREATES()
+ {
+ Proto.Fxn fxn;
+ StringBuilder sb;
+
+ fxn = (Proto.Fxn)om.bind("dskDA830Custom.Platform$$create", new Proto.Fxn(om.findStrict("dskDA830Custom.Platform.Module", "dskDA830Custom"), om.findStrict("dskDA830Custom.Platform.Instance", "dskDA830Custom"), 2, 1, false));
+ fxn.addArg(0, "name", $$T_Str, $$UNDEF);
+ fxn.addArg(1, "__params", (Proto)om.findStrict("dskDA830Custom.Platform.Params", "dskDA830Custom"), Global.newObject());
+ sb = new StringBuilder();
+ sb.append("dskDA830Custom$Platform$$create = function( name, __params ) {\n");
+ sb.append("var __mod = xdc.om['dskDA830Custom.Platform'];\n");
+ sb.append("var __inst = xdc.om['dskDA830Custom.Platform.Instance'].$$make();\n");
+ sb.append("__inst.$$bind('$package', xdc.om['dskDA830Custom']);\n");
+ sb.append("__inst.$$bind('$index', __mod.$instances.length);\n");
+ sb.append("__inst.$$bind('$category', 'Instance');\n");
+ sb.append("__inst.$$bind('$args', {name:name});\n");
+ sb.append("__inst.$$bind('$module', __mod);\n");
+ sb.append("__mod.$instances.$add(__inst);\n");
+ sb.append("__inst.externalMemoryMap = __mod.PARAMS.externalMemoryMap;\n");
+ sb.append("__inst.customMemoryMap = __mod.PARAMS.customMemoryMap;\n");
+ sb.append("__inst.renameMap = __mod.PARAMS.renameMap;\n");
+ sb.append("__inst.dataMemory = __mod.PARAMS.dataMemory;\n");
+ sb.append("__inst.codeMemory = __mod.PARAMS.codeMemory;\n");
+ sb.append("__inst.stackMemory = __mod.PARAMS.stackMemory;\n");
+ sb.append("__inst.sectMap = __mod.PARAMS.sectMap;\n");
+ sb.append("__inst.peripherals = __mod.PARAMS.peripherals;\n");
+ sb.append("for (var __p in __params) __inst[__p] = __params[__p];\n");
+ sb.append("var save = xdc.om.$curpkg;\n");
+ sb.append("xdc.om.$$bind('$curpkg', __mod.$package.$name);\n");
+ sb.append("__mod.instance$meta$init.$fxn.apply(__inst, [name]);\n");
+ sb.append("xdc.om.$$bind('$curpkg', save);\n");
+ sb.append("__inst.$$bless();\n");
+ sb.append("return __inst;\n");
+ sb.append("}\n");
+ Global.eval(sb.toString());
+ fxn = (Proto.Fxn)om.bind("dskDA830Custom.Platform$$construct", new Proto.Fxn(om.findStrict("dskDA830Custom.Platform.Module", "dskDA830Custom"), null, 3, 1, false));
+ fxn.addArg(0, "__obj", (Proto)om.findStrict("dskDA830Custom.Platform$$Object", "dskDA830Custom"), null);
+ fxn.addArg(1, "name", $$T_Str, $$UNDEF);
+ fxn.addArg(2, "__params", (Proto)om.findStrict("dskDA830Custom.Platform.Params", "dskDA830Custom"), Global.newObject());
+ sb = new StringBuilder();
+ sb.append("dskDA830Custom$Platform$$construct = function( __obj, name, __params ) {\n");
+ sb.append("var __mod = xdc.om['dskDA830Custom.Platform'];\n");
+ sb.append("var __inst = __obj;\n");
+ sb.append("__inst.$$bind('$args', {name:name});\n");
+ sb.append("__inst.$$bind('$module', __mod);\n");
+ sb.append("__mod.$objects.$add(__inst);\n");
+ sb.append("__inst.externalMemoryMap = __mod.PARAMS.externalMemoryMap;\n");
+ sb.append("__inst.customMemoryMap = __mod.PARAMS.customMemoryMap;\n");
+ sb.append("__inst.renameMap = __mod.PARAMS.renameMap;\n");
+ sb.append("__inst.dataMemory = __mod.PARAMS.dataMemory;\n");
+ sb.append("__inst.codeMemory = __mod.PARAMS.codeMemory;\n");
+ sb.append("__inst.stackMemory = __mod.PARAMS.stackMemory;\n");
+ sb.append("__inst.sectMap = __mod.PARAMS.sectMap;\n");
+ sb.append("__inst.peripherals = __mod.PARAMS.peripherals;\n");
+ sb.append("for (var __p in __params) __inst[__p] = __params[__p];\n");
+ sb.append("__inst.$$bless();\n");
+ sb.append("return null;\n");
+ sb.append("}\n");
+ Global.eval(sb.toString());
+ }
+
+ void Platform$$FUNCTIONS()
+ {
+ Proto.Fxn fxn;
+
+ }
+
+ void Platform$$SIZES()
+ {
+ }
+
+ void Platform$$TYPES()
+ {
+ Scriptable cap;
+ Proto.Obj po;
+ Proto.Str ps;
+ Proto.Typedef pt;
+ Object fxn;
+
+ cap = (Scriptable)Global.callFxn("loadCapsule", xdcO, "dskDA830Custom/Platform.xs");
+ om.bind("dskDA830Custom.Platform$$capsule", cap);
+ po = (Proto.Obj)om.findStrict("dskDA830Custom.Platform.Module", "dskDA830Custom");
+ po.init("dskDA830Custom.Platform.Module", om.findStrict("xdc.platform.IPlatform.Module", "dskDA830Custom"));
+ po.addFld("$hostonly", $$T_Num, 1, "r");
+ po.addFld("CPU", (Proto)om.findStrict("ti.platforms.generic.Platform.Instance", "dskDA830Custom"), $$UNDEF, "wh");
+ po.addFxn("create", (Proto.Fxn)om.findStrict("dskDA830Custom.Platform$$create", "dskDA830Custom"), Global.get("dskDA830Custom$Platform$$create"));
+ po.addFxn("construct", (Proto.Fxn)om.findStrict("dskDA830Custom.Platform$$construct", "dskDA830Custom"), Global.get("dskDA830Custom$Platform$$construct"));
+ fxn = Global.get(cap, "module$use");
+ if (fxn != null) om.bind("dskDA830Custom.Platform$$module$use", true);
+ if (fxn != null) po.addFxn("module$use", $$T_Met, fxn);
+ fxn = Global.get(cap, "module$meta$init");
+ if (fxn != null) om.bind("dskDA830Custom.Platform$$module$meta$init", true);
+ if (fxn != null) po.addFxn("module$meta$init", $$T_Met, fxn);
+ fxn = Global.get(cap, "instance$meta$init");
+ if (fxn != null) om.bind("dskDA830Custom.Platform$$instance$meta$init", true);
+ if (fxn != null) po.addFxn("instance$meta$init", $$T_Met, fxn);
+ fxn = Global.get(cap, "module$validate");
+ if (fxn != null) om.bind("dskDA830Custom.Platform$$module$validate", true);
+ if (fxn != null) po.addFxn("module$validate", $$T_Met, fxn);
+ po = (Proto.Obj)om.findStrict("dskDA830Custom.Platform.Instance", "dskDA830Custom");
+ po.init("dskDA830Custom.Platform.Instance", om.findStrict("xdc.platform.IPlatform.Instance", "dskDA830Custom"));
+ po.addFld("$hostonly", $$T_Num, 1, "r");
+ po.addFld("codeMemory", $$T_Str, "IRAM", "wh");
+ po.addFld("dataMemory", $$T_Str, "IRAM", "wh");
+ po.addFld("stackMemory", $$T_Str, "IRAM", "wh");
+ po.addFld("l2Mode", $$T_Str, "0k", "wh");
+ po.addFld("l1PMode", $$T_Str, "32k", "wh");
+ po.addFld("l1DMode", $$T_Str, "32k", "wh");
+ fxn = Global.get(cap, "getCpuDataSheet");
+ if (fxn != null) po.addFxn("getCpuDataSheet", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getCpuDataSheet", "dskDA830Custom"), fxn);
+ fxn = Global.get(cap, "getCreateArgs");
+ if (fxn != null) po.addFxn("getCreateArgs", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getCreateArgs", "dskDA830Custom"), fxn);
+ fxn = Global.get(cap, "getExeContext");
+ if (fxn != null) po.addFxn("getExeContext", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getExeContext", "dskDA830Custom"), fxn);
+ fxn = Global.get(cap, "getExecCmd");
+ if (fxn != null) po.addFxn("getExecCmd", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getExecCmd", "dskDA830Custom"), fxn);
+ fxn = Global.get(cap, "getLinkTemplate");
+ if (fxn != null) po.addFxn("getLinkTemplate", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getLinkTemplate", "dskDA830Custom"), fxn);
+ po = (Proto.Obj)om.findStrict("dskDA830Custom.Platform$$Params", "dskDA830Custom");
+ po.init("dskDA830Custom.Platform.Params", om.findStrict("xdc.platform.IPlatform$$Params", "dskDA830Custom"));
+ po.addFld("$hostonly", $$T_Num, 1, "r");
+ po.addFld("codeMemory", $$T_Str, "IRAM", "wh");
+ po.addFld("dataMemory", $$T_Str, "IRAM", "wh");
+ po.addFld("stackMemory", $$T_Str, "IRAM", "wh");
+ po.addFld("l2Mode", $$T_Str, "0k", "wh");
+ po.addFld("l1PMode", $$T_Str, "32k", "wh");
+ po.addFld("l1DMode", $$T_Str, "32k", "wh");
+ po = (Proto.Obj)om.findStrict("dskDA830Custom.Platform$$Object", "dskDA830Custom");
+ po.init("dskDA830Custom.Platform.Object", om.findStrict("dskDA830Custom.Platform.Instance", "dskDA830Custom"));
+ fxn = Global.get(cap, "getCpuDataSheet");
+ if (fxn != null) po.addFxn("getCpuDataSheet", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getCpuDataSheet", "dskDA830Custom"), fxn);
+ fxn = Global.get(cap, "getCreateArgs");
+ if (fxn != null) po.addFxn("getCreateArgs", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getCreateArgs", "dskDA830Custom"), fxn);
+ fxn = Global.get(cap, "getExeContext");
+ if (fxn != null) po.addFxn("getExeContext", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getExeContext", "dskDA830Custom"), fxn);
+ fxn = Global.get(cap, "getExecCmd");
+ if (fxn != null) po.addFxn("getExecCmd", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getExecCmd", "dskDA830Custom"), fxn);
+ fxn = Global.get(cap, "getLinkTemplate");
+ if (fxn != null) po.addFxn("getLinkTemplate", (Proto.Fxn)om.findStrict("xdc.platform.IPlatform$$getLinkTemplate", "dskDA830Custom"), fxn);
+ }
+
+ void Platform$$ROV()
+ {
+ }
+
+ void $$SINGLETONS()
+ {
+ pkgP.init("dskDA830Custom.Package", (Proto.Obj)om.findStrict("xdc.IPackage.Module", "dskDA830Custom"));
+ pkgP.bind("$capsule", $$UNDEF);
+ pkgV.init2(pkgP, "dskDA830Custom", Value.DEFAULT, false);
+ pkgV.bind("$name", "dskDA830Custom");
+ pkgV.bind("$category", "Package");
+ pkgV.bind("$$qn", "dskDA830Custom.");
+ pkgV.bind("$vers", Global.newArray());
+ Value.Map atmap = (Value.Map)pkgV.getv("$attr");
+ atmap.seal("length");
+ imports.clear();
+ pkgV.bind("$imports", imports);
+ StringBuilder sb = new StringBuilder();
+ sb.append("var pkg = xdc.om['dskDA830Custom'];\n");
+ sb.append("if (pkg.$vers.length >= 3) {\n");
+ sb.append("pkg.$vers.push(Packages.xdc.services.global.Vers.getDate(xdc.csd() + '/..'));\n");
+ sb.append("}\n");
+ sb.append("if ('dskDA830Custom$$stat$base' in xdc.om) {\n");
+ sb.append("pkg.packageBase = xdc.om['dskDA830Custom$$stat$base'];\n");
+ sb.append("pkg.packageRepository = xdc.om['dskDA830Custom$$stat$root'];\n");
+ sb.append("}\n");
+ sb.append("pkg.build.libraries = [\n");
+ sb.append("];\n");
+ sb.append("pkg.build.libDesc = [\n");
+ sb.append("];\n");
+ Global.eval(sb.toString());
+ }
+
+ void Platform$$SINGLETONS()
+ {
+ Proto.Obj po;
+ Value.Obj vo;
+
+ vo = (Value.Obj)om.findStrict("dskDA830Custom.Platform", "dskDA830Custom");
+ po = (Proto.Obj)om.findStrict("dskDA830Custom.Platform.Module", "dskDA830Custom");
+ vo.init2(po, "dskDA830Custom.Platform", $$DEFAULT, false);
+ vo.bind("Module", po);
+ vo.bind("$category", "Module");
+ vo.bind("$capsule", om.findStrict("dskDA830Custom.Platform$$capsule", "dskDA830Custom"));
+ vo.bind("Instance", om.findStrict("dskDA830Custom.Platform.Instance", "dskDA830Custom"));
+ vo.bind("Params", om.findStrict("dskDA830Custom.Platform.Params", "dskDA830Custom"));
+ vo.bind("PARAMS", ((Proto.Str)om.findStrict("dskDA830Custom.Platform.Params", "dskDA830Custom")).newInstance());
+ vo.bind("$package", om.findStrict("dskDA830Custom", "dskDA830Custom"));
+ tdefs.clear();
+ proxies.clear();
+ mcfgs.clear();
+ icfgs.clear();
+ inherits.clear();
+ vo.bind("Board", om.findStrict("xdc.platform.IPlatform.Board", "dskDA830Custom"));
+ tdefs.add(om.findStrict("xdc.platform.IPlatform.Board", "dskDA830Custom"));
+ vo.bind("Memory", om.findStrict("xdc.platform.IPlatform.Memory", "dskDA830Custom"));
+ tdefs.add(om.findStrict("xdc.platform.IPlatform.Memory", "dskDA830Custom"));
+ vo.bind("MemoryMap", om.findStrict("xdc.platform.IPlatform.MemoryMap", "dskDA830Custom"));
+ vo.bind("$$tdefs", Global.newArray(tdefs.toArray()));
+ vo.bind("$$proxies", Global.newArray(proxies.toArray()));
+ vo.bind("$$mcfgs", Global.newArray(mcfgs.toArray()));
+ vo.bind("$$icfgs", Global.newArray(icfgs.toArray()));
+ inherits.add("xdc.platform");
+ vo.bind("$$inherits", Global.newArray(inherits.toArray()));
+ ((Value.Arr)pkgV.getv("$modules")).add(vo);
+ ((Value.Arr)om.findStrict("$modules", "dskDA830Custom")).add(vo);
+ vo.bind("$$instflag", 1);
+ vo.bind("$$iobjflag", 1);
+ vo.bind("$$sizeflag", 1);
+ vo.bind("$$dlgflag", 0);
+ vo.bind("$$iflag", 1);
+ vo.bind("$$romcfgs", "|");
+ vo.bind("$$nortsflag", 0);
+ Proto.Str ps = (Proto.Str)vo.find("Module_State");
+ if (ps != null) vo.bind("$object", ps.newInstance());
+ vo.bind("$$meta_iobj", om.has("dskDA830Custom.Platform$$instance$static$init", null) ? 1 : 0);
+ vo.bind("$$fxntab", Global.newArray());
+ vo.bind("$$logEvtCfgs", Global.newArray());
+ vo.bind("$$errorDescCfgs", Global.newArray());
+ vo.bind("$$assertDescCfgs", Global.newArray());
+ Value.Map atmap = (Value.Map)vo.getv("$attr");
+ atmap.seal("length");
+ vo.bind("Object", om.findStrict("dskDA830Custom.Platform.Object", "dskDA830Custom"));
+ pkgV.bind("Platform", vo);
+ ((Value.Arr)pkgV.getv("$unitNames")).add("Platform");
+ }
+
+ void $$INITIALIZATION()
+ {
+ Value.Obj vo;
+
+ if (isCFG) {
+ }//isCFG
+ Global.callFxn("module$meta$init", (Scriptable)om.findStrict("dskDA830Custom.Platform", "dskDA830Custom"));
+ vo = (Value.Obj)om.findStrict("dskDA830Custom.Platform", "dskDA830Custom");
+ Global.put(vo, "CPU", Global.callFxn("create", (Scriptable)om.find("ti.platforms.generic.Platform"), "CPU", Global.newObject("clockRate", 456L, "catalogName", "ti.catalog.c6000", "deviceName", "TMS320DA830", "customMemoryMap", Global.newArray(new Object[]{Global.newArray(new Object[]{"IRAM", Global.newObject("name", "IRAM", "base", 0x11800000L, "len", 0x00040000L, "space", "code/data", "access", "RWX")}), Global.newArray(new Object[]{"IROM", Global.newObject("name", "IROM", "base", 0x11700000L, "len", 0x00100000L, "space", "code/data", "access", "RX")}), Global.newArray(new Object[]{"L3_CBA_RAM", Global.newObject("name", "L3_CBA_RAM", "base", 0x80000000L, "len", 0x00020000L, "space", "code/data", "access", "RWX")}), Global.newArray(new Object[]{"EXT_RAM", Global.newObject("name", "EXT_RAM", "base", 0xC0000000L, "len", 0x20000000L, "space", "code/data", "access", "RWX")})}), "l2Mode", "0k", "l1PMode", "32k", "l1DMode", "32k")));
+ Global.callFxn("init", pkgV);
+ ((Value.Obj)om.getv("dskDA830Custom.Platform")).bless();
+ ((Value.Arr)om.findStrict("$packages", "dskDA830Custom")).add(pkgV);
+ }
+
+ public void exec( Scriptable xdcO, Session ses )
+ {
+ this.xdcO = xdcO;
+ this.ses = ses;
+ om = (Value.Obj)xdcO.get("om", null);
+
+ Object o = om.geto("$name");
+ String s = o instanceof String ? (String)o : null;
+ isCFG = s != null && s.equals("cfg");
+ isROV = s != null && s.equals("rov");
+
+ $$IMPORTS();
+ $$OBJECTS();
+ Platform$$OBJECTS();
+ Platform$$CONSTS();
+ Platform$$CREATES();
+ Platform$$FUNCTIONS();
+ Platform$$SIZES();
+ Platform$$TYPES();
+ if (isROV) {
+ Platform$$ROV();
+ }//isROV
+ $$SINGLETONS();
+ Platform$$SINGLETONS();
+ $$INITIALIZATION();
+ }
+}
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/dskDA830Custom.sch b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/dskDA830Custom.sch
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.bld.xml b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.bld.xml
--- /dev/null
@@ -0,0 +1,40 @@
+<?xml version="1.0" encoding="windows-1252"?>
+<!-- This file conforms to the DTD xdc/bld/build.dtd -->
+<package name="dskDA830Custom" version="" producerId="undefined">
+ <units>
+ <module name="Platform"/>
+ </units>
+ <sources>
+ </sources>
+ <configscripts>
+ </configscripts>
+ <makefiles>
+ <srcFile name="package.mak" src="package.bld"/>
+ <srcFile name="package/package.xdc.dep" src="package.xdc"/>
+ <srcFile name="package/package.cfg.dep" src="package.xdc"/>
+ <srcFile name="package/rel/dskDA830Custom.zip.dep" src="package/rel/dskDA830Custom.xdc.inc"/>
+ </makefiles>
+ <targets>
+ </targets>
+ <libraries>
+ </libraries>
+ <configurations>
+ </configurations>
+ <executables>
+ </executables>
+ <tests>
+ </tests>
+ <releases relDir="package/rel/">
+ <release name="dskDA830Custom"
+ pname="dskDA830Custom.zip"
+ label="default"
+ >
+ <file name="package/package.bld.xml"/>
+ <file name="package/build.cfg"/>
+ <file name="package/package.xdc.inc"/>
+ <file name="package/package.cfg.xdc.inc"/>
+ </release>
+ </releases>
+ <repositories>
+ </repositories>
+</package>
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.cfg.dep b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.cfg.dep
--- /dev/null
@@ -0,0 +1,61 @@
+#
+# The following is generated by utils.genDep for package/package.cfg
+#
+package/package.cfg.c package/package.cfg.h package/package.cfg.xdl:Platform.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/Arctic.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/DRA7XX.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IAntara.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IDaVinci.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IHimalaya.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IOMAP2x3x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IOMAP3xxx.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITI811X.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITI8148.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITI8168.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C642x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C64_128K.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C64_1M.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C64_256K.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C64_512K.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C6655.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C6x0x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C6x1x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CDM6467.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CDRA44x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CDRA45x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CDRx40x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CTCI6484.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CTCI6486.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CTCI648x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CTCI6497.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320DA8xx.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320TCI6608.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320TCI6616.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320TCI663x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/Kepler.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/OMAP4430.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/OMAP5430.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TCI66AK2G02.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TDA3XX.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6421.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6428.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6452.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6454.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6654.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C66AK2E02.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C66AK2E05.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CDM6431.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CDM647.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CDM648.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CF761990.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CTNETV2685.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320TCI6630K2L.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TNETV107X.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/Vayu.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/c6x.xs C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/package.xs C:/ti/bios_6_45_01_29/packages/ti/platforms/generic/Platform.xs C:/ti/bios_6_45_01_29/packages/ti/platforms/generic/package.xs
+
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/Arctic.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/DRA7XX.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IAntara.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IDaVinci.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IHimalaya.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IOMAP2x3x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/IOMAP3xxx.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITI811X.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITI8148.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITI8168.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C642x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C64_128K.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C64_1M.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C64_256K.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C64_512K.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C6655.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C6x0x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320C6x1x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CDM6467.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CDRA44x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CDRA45x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CDRx40x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CTCI6484.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CTCI6486.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CTCI648x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320CTCI6497.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320DA8xx.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320TCI6608.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320TCI6616.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/ITMS320TCI663x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/Kepler.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/OMAP4430.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/OMAP5430.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TCI66AK2G02.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TDA3XX.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6421.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6428.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6452.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6454.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C6654.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C66AK2E02.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320C66AK2E05.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CDM6431.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CDM647.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CDM648.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CF761990.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320CTNETV2685.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TMS320TCI6630K2L.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/TNETV107X.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/Vayu.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/c6x.xs:
+C:/ti/bios_6_45_01_29/packages/ti/catalog/c6000/package.xs:
+C:/ti/bios_6_45_01_29/packages/ti/platforms/generic/Platform.xs:
+C:/ti/bios_6_45_01_29/packages/ti/platforms/generic/package.xs:
+
+
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.cfg.xdc.inc b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.cfg.xdc.inc
--- /dev/null
@@ -0,0 +1 @@
+Platform.xs
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.defs.h b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.defs.h
--- /dev/null
@@ -0,0 +1,13 @@
+/*
+ * Do not modify this file; it is automatically
+ * generated and any modifications will be overwritten.
+ *
+ * @(#) xdc-B06
+ */
+
+#ifndef dskDA830Custom__
+#define dskDA830Custom__
+
+
+
+#endif /* dskDA830Custom__ */
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.xdc.dep b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.xdc.dep
--- /dev/null
@@ -0,0 +1,69 @@
+clean::\r
+ $(RM) package/dskDA830Custom.sch\r
+ $(RM) package/.vers_g180\r
+ $(RM) package/.vers_r170\r
+ $(RM) package/.vers_b160\r
+ $(RM) package/.xdc-B06\r
+ $(RM) package/dskDA830Custom.java\r
+ $(RM) package/dskDA830Custom.class\r
+ $(RM) package/package_dskDA830Custom.c\r
+ $(RM) package/package.defs.h\r
+ $(RM) package/dskDA830Custom.ccs\r
+
+.interfaces: package/dskDA830Custom.sch package/.vers_g180 package/.vers_r170 package/.vers_b160 package/.xdc-B06 package/dskDA830Custom.java package/package_dskDA830Custom.c package/package.defs.h package/dskDA830Custom.ccs
+package/package.xdc.inc: package/.vers_g180
+package/.vers_g180:
+package/package.xdc.inc: package/.vers_r170
+package/.vers_r170:
+package/package.xdc.inc: package/.vers_b160
+package/.vers_b160:
+
+.interfaces: Platform.xdc
+
+# schema include file dependencies
+Platform.xs:\r
+package/package.xdc.inc: Platform.xs\r
+
+# schema update dependencies
+package/package.xdc.inc: Platform.xdc\r
+package/package.xdc.inc: xdc/IPackage.xdc\r
+xdc/IPackage.xdc:\r
+vpath xdc/IPackage.xdc $(XPKGVPATH)\r
+package/package.xdc.inc: xdc/platform/IPlatform.xdc\r
+xdc/platform/IPlatform.xdc:\r
+vpath xdc/platform/IPlatform.xdc $(XPKGVPATH)\r
+package/package.xdc.inc: xdc/platform/IPeripheral.xdc\r
+xdc/platform/IPeripheral.xdc:\r
+vpath xdc/platform/IPeripheral.xdc $(XPKGVPATH)\r
+package/package.xdc.inc: xdc/platform/ICpuDataSheet.xdc\r
+xdc/platform/ICpuDataSheet.xdc:\r
+vpath xdc/platform/ICpuDataSheet.xdc $(XPKGVPATH)\r
+package/package.xdc.inc: ti/platforms/generic/Platform.xdc\r
+ti/platforms/generic/Platform.xdc:\r
+vpath ti/platforms/generic/Platform.xdc $(XPKGVPATH)\r
+package/package.xdc.inc: xdc/platform/IExeContext.xdc\r
+xdc/platform/IExeContext.xdc:\r
+vpath xdc/platform/IExeContext.xdc $(XPKGVPATH)\r
+
+ifneq (clean,$(MAKECMDGOALS))
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/shelf/java/ecj.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/shelf/java/ecj.jar\r
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/intern/gen/java/package.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/intern/gen/java/package.jar\r
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/intern/cmd/java/package.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/intern/cmd/java/package.jar\r
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/shelf/java/js.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/shelf/java/js.jar\r
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/global/java/package.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/global/java/package.jar\r
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/shelf/java/antlr.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/shelf/java/antlr.jar\r
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/intern/xsr/java/package.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/intern/xsr/java/package.jar\r
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/shelf/java/tar.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/shelf/java/tar.jar\r
+C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/spec/java/package.jar:\r
+package/package.xdc.inc: C:/ti/xdctools_3_32_00_06_core/packages/xdc/services/spec/java/package.jar\r
+endif
+# goals for files generated during schema generation but unspecified by schema's pattern rule
+
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.xdc.inc b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package.xdc.inc
--- /dev/null
@@ -0,0 +1,13 @@
+package.xdc\r
+Platform.xdc\r
+Platform.xs\r
+package/dskDA830Custom.sch\r
+package/.vers_g180\r
+package/.vers_r170\r
+package/.vers_b160\r
+package/.xdc-B06\r
+package/dskDA830Custom.java\r
+package/dskDA830Custom.class\r
+package/package_dskDA830Custom.c\r
+package/package.defs.h\r
+package/dskDA830Custom.ccs\r
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package_dskDA830Custom.c b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/package_dskDA830Custom.c
--- /dev/null
@@ -0,0 +1,21 @@
+/*
+ * Do not modify this file; it is automatically
+ * generated and any modifications will be overwritten.
+ *
+ * @(#) xdc-B06
+ */
+
+#include <xdc/std.h>
+
+__FAR__ char dskDA830Custom__dummy__;
+
+#define __xdc_PKGVERS null
+#define __xdc_PKGNAME dskDA830Custom
+#define __xdc_PKGPREFIX dskDA830Custom_
+
+#ifdef __xdc_bld_pkg_c__
+#define __stringify(a) #a
+#define __local_include(a) __stringify(a)
+#include __local_include(__xdc_bld_pkg_c__)
+#endif
+
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.xdc.inc b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.xdc.inc
--- /dev/null
@@ -0,0 +1,9 @@
+config.bld
+package.bld
+package.xdc
+Platform.xdc
+Platform.xs
+package/package.bld.xml
+package/build.cfg
+package/package.xdc.inc
+package/package.cfg.xdc.inc
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.xdc.inc.manifest b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.xdc.inc.manifest
--- /dev/null
+++ b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.xdc.inc.manifest
@@ -0,0 +1,17 @@
+dskDA830Custom/Platform.xdc
+dskDA830Custom/Platform.xs
+dskDA830Custom/config.bld
+dskDA830Custom/package/.vers_b160
+dskDA830Custom/package/.vers_g180
+dskDA830Custom/package/.vers_r170
+dskDA830Custom/package/.xdc-B06
+dskDA830Custom/package/build.cfg
+dskDA830Custom/package/dskDA830Custom.ccs
+dskDA830Custom/package/dskDA830Custom.class
+dskDA830Custom/package/dskDA830Custom.java
+dskDA830Custom/package/dskDA830Custom.sch
+dskDA830Custom/package/package.bld.xml
+dskDA830Custom/package/package.defs.h
+dskDA830Custom/package/package_dskDA830Custom.c
+dskDA830Custom/package.bld
+dskDA830Custom/package.xdc
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.xdc.ninc b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.xdc.ninc
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.zip.dep b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom.zip.dep
--- /dev/null
@@ -0,0 +1,34 @@
+dskDA830Custom.zip: Platform.xdc
+Platform.xdc:
+dskDA830Custom.zip: Platform.xs
+Platform.xs:
+dskDA830Custom.zip: config.bld
+config.bld:
+dskDA830Custom.zip: package/.vers_b160
+package/.vers_b160:
+dskDA830Custom.zip: package/.vers_g180
+package/.vers_g180:
+dskDA830Custom.zip: package/.vers_r170
+package/.vers_r170:
+dskDA830Custom.zip: package/.xdc-B06
+package/.xdc-B06:
+dskDA830Custom.zip: package/build.cfg
+package/build.cfg:
+dskDA830Custom.zip: package/dskDA830Custom.ccs
+package/dskDA830Custom.ccs:
+dskDA830Custom.zip: package/dskDA830Custom.class
+package/dskDA830Custom.class:
+dskDA830Custom.zip: package/dskDA830Custom.java
+package/dskDA830Custom.java:
+dskDA830Custom.zip: package/dskDA830Custom.sch
+package/dskDA830Custom.sch:
+dskDA830Custom.zip: package/package.bld.xml
+package/package.bld.xml:
+dskDA830Custom.zip: package/package.defs.h
+package/package.defs.h:
+dskDA830Custom.zip: package/package_dskDA830Custom.c
+package/package_dskDA830Custom.c:
+dskDA830Custom.zip: package.bld
+package.bld:
+dskDA830Custom.zip: package.xdc
+package.xdc:
diff --git a/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom/dskDA830Custom/package/package.rel.xml b/realtime_demo_bios/platforms/packages/dskDA830Custom/package/rel/dskDA830Custom/dskDA830Custom/package/package.rel.xml
--- /dev/null
@@ -0,0 +1,98 @@
+<?xml version="1.0" encoding="windows-1252"?>
+<!-- This file conforms to the DTD xdc/bld/release.dtd -->
+<release name="dskDA830Custom" label="default" date="1468358644557" buildCount="1" producerId="undefined">
+<package name="dskDA830Custom"
+ version=""/>
+<imports>
+</imports>
+<references>
+ <package name="xdc"
+ version="1, 1, 1, 1449624895255"
+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="IPackage.xdc"/>
+ <file name="IPackage.xs"/>
+ <file name="Warnings.xs"/>
+ <file name="om2.xs"/>
+ <file name="package.xs"/>
+ <file name="template.xs"/>
+ <file name="utils.js"/>
+ <file name="xdc.tci"/>
+ <file name="xmlgen.xs"/>
+ <file name="xmlgen2.xs"/>
+ </package>
+ <package name="xdc.services.global"
+ version="1, 0, 0, 1449625038320"
+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="Clock.xs"/>
+ <file name="Trace.xs"/>
+ <file name="java\package.jar"/>
+ </package>
+ <package name="xdc.bld"
+ version="1, 0, 2, 1449624907828"
+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="BuildEnvironment.xs"/>
+ <file name="Configuration.xs"/>
+ <file name="Executable.xs"/>
+ <file name="ITarget.xs"/>
+ <file name="ITarget2.xs"/>
+ <file name="ITarget3.xs"/>
+ <file name="ITargetFilter.xs"/>
+ <file name="Library.xs"/>
+ <file name="Manifest.xs"/>
+ <file name="PackageContents.xs"/>
+ <file name="Repository.xs"/>
+ <file name="Script.xs"/>
+ <file name="Utils.xs"/>
+ <file name="_gen.xs"/>
+ <file name="bld.js"/>
+ <file name="package.xs"/>
+ </package>
+ <package name="xdc.platform"
+ version="1, 0, 1, 1449624947821"
+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="ICpuDataSheet.xdc"/>
+ <file name="IExeContext.xdc"/>
+ <file name="IPeripheral.xdc"/>
+ <file name="IPlatform.xdc"/>
+ </package>
+ <package name="ti.platforms.generic"
+ version="1, 0, 0, 1, 1454090561812"
+ providerId="C:/ti/bios_6_45_01_29/packages">
+ <file name="Platform.xdc"/>
+ </package>
+ <package name="xdc.shelf"
+ version="1, 0, 0, 1449625162069"
+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="java\antlr.jar"/>
+ <file name="java\ecj.jar"/>
+ <file name="java\js.jar"/>
+ <file name="java\tar.jar"/>
+ </package>
+ <package name="xdc.services.intern.gen"
+ version="1, 0, 0, 1449625079795"
+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="java\package.jar"/>
+ </package>
+ <package name="xdc.services.intern.cmd"
+ version="1, 0, 0, 1449625073074"
+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="java\package.jar"/>
+ </package>
+ <package name="xdc.services.intern.xsr"
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+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="java\package.jar"/>
+ </package>
+ <package name="xdc.services.spec"
+ version="1, 0, 0, 1449625113628"
+ providerId="C:/ti/xdctools_3_32_00_06_core/packages">
+ <file name="java\package.jar"/>
+ </package>
+ <xdcRoot base="C:/ti/xdctools_3_32_00_06_core/">
+ <file name="/packages/xdc/package.xdc"/>
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+ </xdcRoot>
+</references>
+<orphans>
+</orphans>
+</release>