From: Sam Nelson Date: Thu, 2 Mar 2017 21:28:43 +0000 (-0500) Subject: idkAM571x: Add board config file for idkAM571x X-Git-Tag: 01.00.00.00^2~4 X-Git-Url: https://git.ti.com/gitweb?p=processor-sdk%2Fbig-data-ipc-examples.git;a=commitdiff_plain;h=91309afb403c045247bf99dfd61de243546aee97;ds=inline idkAM571x: Add board config file for idkAM571x Signed-off-by: Sam Nelson --- diff --git a/host_bios/simple_buffer_example/host/idkAM571x/board.cfg.xs b/host_bios/simple_buffer_example/host/idkAM571x/board.cfg.xs new file mode 100644 index 0000000..da2a08d --- /dev/null +++ b/host_bios/simple_buffer_example/host/idkAM571x/board.cfg.xs @@ -0,0 +1,54 @@ + +var socType = "am571x"; + +/*use CSL package*/ +var Csl = xdc.loadPackage('ti.csl'); +Csl.Settings.deviceType = socType; + +/* Load the osal package -- required by board & interrupt example */ +var osType = "tirtos" +var Osal = xdc.loadPackage('ti.osal'); +Osal.Settings.osType = osType; + +/* Load the I2C package - required by board */ +var I2c = xdc.loadPackage('ti.drv.i2c'); +I2c.Settings.socType = socType; + +/* Load the uart package -- required by board */ +var Uart = xdc.loadPackage('ti.drv.uart'); +Uart.Settings.socType = socType; + +/* Load the Board package and set the board name */ +var Board = xdc.loadPackage('ti.board'); +Board.Settings.boardName = "idkAM571x"; + +/* ================ Cache configuration ================ */ +var Cache = xdc.useModule('ti.sysbios.family.arm.a15.Cache'); + +/* Enable the cache */ +Cache.enableCache = true; + +/* ================ MMU configuration ================ */ +var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu'); + +/* Enable the MMU (Required for L1 data caching) */ +Mmu.enableMMU = true; + +var attrs = new Mmu.DescriptorAttrs(); +Mmu.initDescAttrsMeta(attrs); +attrs.type = Mmu.DescriptorType_BLOCK; +attrs.noExecute = true; +attrs.accPerm = 0; // R/W at PL1 +attrs.attrIndx = 3; // Use MAIR0 Byte2 +Mmu.setMAIRMeta(3, 0x04); +Mmu.setSecondLevelDescMeta(0x43200000, 0x43200000, attrs); + +/* Set IO Delay configuration areas as non-cache */ +attrs.attrIndx = 1; +Mmu.setSecondLevelDescMeta(0x4844a000, 0x4844a000, attrs); +Mmu.setSecondLevelDescMeta(0x4ae07d00, 0x4ae07d00, attrs); + +/* ================ Memory sections configuration ================ */ +Program.sectMap["BOARD_IO_DELAY_DATA"] = "OCMC_RAM1"; +Program.sectMap["BOARD_IO_DELAY_CODE"] = "OCMC_RAM1"; +