1 /* Linker script for Xilinx Zynq-7000\r
2 *\r
3 * Version: Sourcery CodeBench Lite 2013.11-24\r
4 * Support: https://sourcery.mentor.com/GNUToolchain/\r
5 *\r
6 * Copyright (c) 2007-2010 CodeSourcery, Inc.\r
7 * Copyright (c) 2010-2013 Mentor Graphics, Inc.\r
8 *\r
9 * The authors hereby grant permission to use, copy, modify, distribute,\r
10 * and license this software and its documentation for any purpose, provided\r
11 * that existing copyright notices are retained in all copies and that this\r
12 * notice is included verbatim in any distributions. No written agreement,\r
13 * license, or royalty fee is required for any of the authorized uses.\r
14 * Modifications to this software may be copyrighted by their authors\r
15 * and need not follow the licensing terms described here, provided that\r
16 * the new terms are clearly indicated on the first page of each file where\r
17 * they apply.\r
18 */\r
19 OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")\r
20 ENTRY(__cs3_reset)\r
21 SEARCH_DIR(.)\r
22 GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3arm)\r
23 \r
24 MEMORY\r
25 {\r
26 ram (rwx) : ORIGIN = 0x00000000, LENGTH = 256M\r
27 rom (rx) : ORIGIN = 0xe4000000, LENGTH = 64M\r
28 }\r
29 \r
30 /* These force the linker to search for particular symbols from\r
31 * the start of the link process and thus ensure the user's\r
32 * overrides are picked up\r
33 */\r
34 EXTERN(__cs3_reset __cs3_reset_zynq7000_ram)\r
35 EXTERN(__cs3_start_asm _start)\r
36 /* Bring in the interrupt routines & vector */\r
37 INCLUDE arm-names.inc\r
38 EXTERN(__cs3_interrupt_vector_arm)\r
39 EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)\r
40 \r
41 /* Provide fall-back values */\r
42 PROVIDE(__cs3_heap_start = _end);\r
43 PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);\r
44 PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);\r
45 PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);\r
46 \r
47 SECTIONS\r
48 {\r
49 _binary_firmware1_start = 0;\r
50 _binary_firmware1_end = 0;\r
51 _binary_firmware2_start = 0;\r
52 _binary_firmware2_end = 0;\r
53 \r
54 .text :\r
55 {\r
56 CREATE_OBJECT_SYMBOLS\r
57 __cs3_region_start_ram = .;\r
58 _ftext = .;\r
59 *(.cs3.region-head.ram)\r
60 ASSERT (. == __cs3_region_start_ram, ".cs3.region-head.ram not permitted");\r
61 __cs3_interrupt_vector = __cs3_interrupt_vector_arm;\r
62 *(.cs3.interrupt_vector)\r
63 /* Make sure we pulled in an interrupt vector. */\r
64 ASSERT (. != __cs3_interrupt_vector_arm, "No interrupt vector");\r
65 \r
66 PROVIDE(__cs3_reset = __cs3_reset_zynq7000_ram);\r
67 *(.cs3.reset)\r
68 _start = DEFINED(__cs3_start_asm) ? __cs3_start_asm : _start;\r
69 \r
70 *(.text.cs3.init)\r
71 *(.text .text.* .gnu.linkonce.t.*)\r
72 *(.plt)\r
73 *(.gnu.warning)\r
74 *(.glue_7t) *(.glue_7) *(.vfp11_veneer)\r
75 \r
76 *(.ARM.extab* .gnu.linkonce.armextab.*)\r
77 *(.gcc_except_table)\r
78 } >ram\r
79 .eh_frame_hdr : ALIGN (4)\r
80 {\r
81 KEEP (*(.eh_frame_hdr))\r
82 *(.eh_frame_entry .eh_frame_entry.*)\r
83 } >ram\r
84 .eh_frame : ALIGN (4)\r
85 {\r
86 KEEP (*(.eh_frame)) *(.eh_frame.*)\r
87 } >ram\r
88 /* .ARM.exidx is sorted, so has to go in its own output section. */\r
89 PROVIDE_HIDDEN (__exidx_start = .);\r
90 .ARM.exidx :\r
91 {\r
92 *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
93 } >ram\r
94 PROVIDE_HIDDEN (__exidx_end = .);\r
95 .rodata : ALIGN (4)\r
96 {\r
97 *(.rodata .rodata.* .gnu.linkonce.r.*)\r
98 \r
99 . = ALIGN(4);\r
100 KEEP(*(.init))\r
101 \r
102 . = ALIGN(4);\r
103 __preinit_array_start = .;\r
104 KEEP (*(.preinit_array))\r
105 __preinit_array_end = .;\r
106 \r
107 . = ALIGN(4);\r
108 __init_array_start = .;\r
109 KEEP (*(SORT(.init_array.*)))\r
110 KEEP (*(.init_array))\r
111 __init_array_end = .;\r
112 \r
113 . = ALIGN(4);\r
114 KEEP(*(.fini))\r
115 \r
116 . = ALIGN(4);\r
117 __fini_array_start = .;\r
118 KEEP (*(.fini_array))\r
119 KEEP (*(SORT(.fini_array.*)))\r
120 __fini_array_end = .;\r
121 \r
122 . = ALIGN(0x4);\r
123 KEEP (*crtbegin.o(.ctors))\r
124 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))\r
125 KEEP (*(SORT(.ctors.*)))\r
126 KEEP (*crtend.o(.ctors))\r
127 \r
128 . = ALIGN(0x4);\r
129 KEEP (*crtbegin.o(.dtors))\r
130 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))\r
131 KEEP (*(SORT(.dtors.*)))\r
132 KEEP (*crtend.o(.dtors))\r
133 \r
134 . = ALIGN(4);\r
135 __cs3_regions = .;\r
136 LONG (0)\r
137 LONG (__cs3_region_init_ram)\r
138 LONG (__cs3_region_start_ram)\r
139 LONG (__cs3_region_init_size_ram)\r
140 LONG (__cs3_region_zero_size_ram)\r
141 __cs3_regions_end = .;\r
142 . = ALIGN (8);\r
143 _etext = .;\r
144 } >ram\r
145 \r
146 ASSERT (!(__cs3_region_init_ram & 7), "__cs3_region_init_ram not aligned")\r
147 ASSERT (!(__cs3_region_start_ram & 7), "__cs3_region_start_ram not aligned")\r
148 ASSERT (!(__cs3_region_init_size_ram & 7), "__cs3_region_init_size_ram not aligned")\r
149 ASSERT (!(__cs3_region_zero_size_ram & 7), "__cs3_region_zero_size_ram not aligned")\r
150 .cs3.rom : ALIGN (8)\r
151 {\r
152 __cs3_region_start_rom = .;\r
153 *(.cs3.region-head.rom)\r
154 *(.rom)\r
155 . = ALIGN (8);\r
156 } >rom\r
157 .cs3.rom.bss :\r
158 {\r
159 *(.rom.b .bss.rom)\r
160 . = ALIGN (8);\r
161 } >rom\r
162 /* __cs3_region_end_rom is deprecated */\r
163 __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);\r
164 __cs3_region_size_rom = LENGTH(rom);\r
165 __cs3_region_init_rom = LOADADDR (.cs3.rom);\r
166 __cs3_region_init_size_rom = LOADADDR (.cs3.rom.bss) - LOADADDR (.cs3.rom);\r
167 __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss);\r
168 \r
169 .data : ALIGN (8)\r
170 {\r
171 KEEP(*(.jcr))\r
172 *(.got.plt) *(.got)\r
173 *(.shdata)\r
174 *(.data .data.* .gnu.linkonce.d.*)\r
175 . = ALIGN (8);\r
176 *(.ram)\r
177 . = ALIGN (8);\r
178 _edata = .;\r
179 } >ram\r
180 .bss : ALIGN (8)\r
181 {\r
182 *(.shbss)\r
183 *(.bss .bss.* .gnu.linkonce.b.*)\r
184 *(COMMON)\r
185 . = ALIGN (8);\r
186 *(.ram.b .bss.ram)\r
187 . = ALIGN (8);\r
188 _end = .;\r
189 __end = .;\r
190 } >ram\r
191 /* __cs3_region_end_ram is deprecated */\r
192 __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);\r
193 __cs3_region_size_ram = LENGTH(ram);\r
194 __cs3_region_init_ram = LOADADDR (.text);\r
195 __cs3_region_init_size_ram = _edata - ADDR (.text);\r
196 __cs3_region_zero_size_ram = _end - _edata;\r
197 \r
198 .stab 0 (NOLOAD) : { *(.stab) }\r
199 .stabstr 0 (NOLOAD) : { *(.stabstr) }\r
200 /* DWARF debug sections.\r
201 * Symbols in the DWARF debugging sections are relative to\r
202 * the beginning of the section so we begin them at 0.\r
203 */\r
204 /* DWARF 1 */\r
205 .debug 0 : { *(.debug) }\r
206 .line 0 : { *(.line) }\r
207 /* GNU DWARF 1 extensions */\r
208 .debug_srcinfo 0 : { *(.debug_srcinfo) }\r
209 .debug_sfnames 0 : { *(.debug_sfnames) }\r
210 /* DWARF 1.1 and DWARF 2 */\r
211 .debug_aranges 0 : { *(.debug_aranges) }\r
212 .debug_pubnames 0 : { *(.debug_pubnames) }\r
213 /* DWARF 2 */\r
214 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
215 .debug_abbrev 0 : { *(.debug_abbrev) }\r
216 .debug_line 0 : { *(.debug_line) }\r
217 .debug_frame 0 : { *(.debug_frame) }\r
218 .debug_str 0 : { *(.debug_str) }\r
219 .debug_loc 0 : { *(.debug_loc) }\r
220 .debug_macinfo 0 : { *(.debug_macinfo) }\r
221 /* DWARF 2.1 */\r
222 .debug_ranges 0 : { *(.debug_ranges) }\r
223 /* SGI/MIPS DWARF 2 extensions */\r
224 .debug_weaknames 0 : { *(.debug_weaknames) }\r
225 .debug_funcnames 0 : { *(.debug_funcnames) }\r
226 .debug_typenames 0 : { *(.debug_typenames) }\r
227 .debug_varnames 0 : { *(.debug_varnames) }\r
228 \r
229 .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }\r
230 .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }\r
231 /DISCARD/ : { *(.note.GNU-stack) }\r
232 }\r
233 /* checksum: b15b0bf76673e544380111 */\r