[processor-sdk/open-amp.git] / libs / system / zynq7 / linux / patches / linux / petalinux2013.10 / system.dts
1 /*
2 * Device Tree Generator version: 1.1
3 *
4 * (C) Copyright 2007-2013 Xilinx, Inc.
5 * (C) Copyright 2007-2013 Michal Simek
6 * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
7 *
8 * Michal SIMEK <monstr@monstr.eu>
9 *
10 * CAUTION: This file is automatically generated by libgen.
11 * Version: Xilinx EDK 2013.3 EDK_P.20131013
12 * Today is: Friday, the 15 of November, 2013; 14:38:16
13 *
14 * XPS project directory: .
15 */
17 /dts-v1/;
18 / {
19 #address-cells = <1>;
20 #size-cells = <1>;
21 compatible = "xlnx,zynq-7000";
22 model = ".";
23 aliases {
24 ethernet0 = &ps7_ethernet_0;
25 i2c0 = &ps7_i2c_0;
26 serial0 = &ps7_uart_1;
27 spi0 = &ps7_qspi_0;
28 } ;
29 chosen {
30 bootargs = "console=ttyPS0,115200";
31 linux,stdout-path = "/amba@0/serial@e0001000";
32 } ;
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36 ps7_cortexa9_0: cpu@0 {
37 bus-handle = <&ps7_axi_interconnect_0>;
38 compatible = "arm,cortex-a9";
39 d-cache-line-size = <0x20>;
40 d-cache-size = <0x8000>;
41 device_type = "cpu";
42 i-cache-line-size = <0x20>;
43 i-cache-size = <0x8000>;
44 interrupt-handle = <&ps7_scugic_0>;
45 reg = <0x1>;
46 } ;
47 } ;
48 pmu {
49 compatible = "arm,cortex-a9-pmu";
50 interrupt-parent = <&ps7_scugic_0>;
51 interrupts = <0 5 4>, <0 6 4>;
52 reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
53 reg-names = "cpu1";
54 } ;
55 ps7_ddr_0: memory@0 {
56 device_type = "memory";
57 reg = <0x0 0x08000000>;
58 } ;
59 ps7_axi_interconnect_0: amba@0 {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
63 ranges ;
64 leds_4bits: gpio@41200000 {
65 #gpio-cells = <2>;
66 compatible = "xlnx,axi-gpio-2.0", "xlnx,xps-gpio-1.00.a";
67 gpio-controller ;
68 reg = <0x41200000 0x10000>;
69 xlnx,all-inputs = <0x0>;
70 xlnx,all-inputs-2 = <0x0>;
71 xlnx,all-outputs = <0x1>;
72 xlnx,all-outputs-2 = <0x0>;
73 xlnx,dout-default = <0x0>;
74 xlnx,dout-default-2 = <0x0>;
75 xlnx,gpio-width = <0x4>;
76 xlnx,gpio2-width = <0x20>;
77 xlnx,interrupt-present = <0x0>;
78 xlnx,is-dual = <0x0>;
79 xlnx,tri-default = <0xffffffff>;
80 xlnx,tri-default-2 = <0xffffffff>;
81 } ;
82 ps7_afi_0: ps7-afi@f8008000 {
83 compatible = "xlnx,ps7-afi-1.00.a";
84 reg = <0xf8008000 0x1000>;
85 } ;
86 ps7_afi_1: ps7-afi@f8009000 {
87 compatible = "xlnx,ps7-afi-1.00.a";
88 reg = <0xf8009000 0x1000>;
89 } ;
90 ps7_afi_2: ps7-afi@f800a000 {
91 compatible = "xlnx,ps7-afi-1.00.a";
92 reg = <0xf800a000 0x1000>;
93 } ;
94 ps7_afi_3: ps7-afi@f800b000 {
95 compatible = "xlnx,ps7-afi-1.00.a";
96 reg = <0xf800b000 0x1000>;
97 } ;
98 ps7_can_0: ps7-can@e0008000 {
99 clock-names = "ref_clk", "aper_clk";
100 clocks = <&clkc 19>, <&clkc 36>;
101 compatible = "xlnx,ps7-can-1.00.a", "xlnx,ps7-can";
102 interrupt-parent = <&ps7_scugic_0>;
103 interrupts = <0 28 4>;
104 reg = <0xe0008000 0x1000>;
105 } ;
106 ps7_coresight_comp_0: ps7-coresight-comp@f8800000 {
107 compatible = "xlnx,ps7-coresight-comp-1.00.a";
108 reg = <0xf8800000 0x100000>;
109 } ;
110 ps7_ddrc_0: ps7-ddrc@f8006000 {
111 compatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
112 reg = <0xf8006000 0x1000>;
113 xlnx,has-ecc = <0x0>;
114 } ;
115 ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
116 clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
117 clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
118 compatible = "xlnx,ps7-dev-cfg-1.00.a";
119 interrupt-parent = <&ps7_scugic_0>;
120 interrupts = <0 8 4>;
121 reg = <0xf8007000 0x100>;
122 } ;
123 ps7_dma_s: ps7-dma@f8003000 {
124 #dma-cells = <1>;
125 #dma-channels = <8>;
126 #dma-requests = <4>;
127 arm,primecell-periphid = <0x41330>;
128 clock-names = "apb_pclk";
129 clocks = <&clkc 27>;
130 compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
131 interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
132 "dma4", "dma5", "dma6", "dma7";
133 interrupt-parent = <&ps7_scugic_0>;
134 interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
135 reg = <0xf8003000 0x1000>;
136 } ;
137 ps7_ethernet_0: ps7-ethernet@e000b000 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 clock-names = "ref_clk", "aper_clk";
141 clocks = <&clkc 13>, <&clkc 30>;
142 compatible = "xlnx,ps7-ethernet-1.00.a";
143 interrupt-parent = <&ps7_scugic_0>;
144 interrupts = <0 22 4>;
145 local-mac-address = [ 00 0a 35 00 ac 79 ];
146 phy-handle = <&phy0>;
147 phy-mode = "rgmii-id";
148 reg = <0xe000b000 0x1000>;
149 xlnx,enet-reset = "MIO 11";
150 xlnx,eth-mode = <0x1>;
151 xlnx,has-mdio = <0x1>;
152 xlnx,ptp-enet-clock = <111111115>;
153 mdio {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 phy0: phy@7 {
157 compatible = "marvell,88e1116r";
158 device_type = "ethernet-phy";
159 reg = <7>;
160 } ;
161 } ;
162 } ;
163 ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
164 compatible = "xlnx,ps7-globaltimer-1.00.a";
165 reg = <0xf8f00200 0x100>;
166 } ;
167 ps7_gpio_0: ps7-gpio@e000a000 {
168 #gpio-cells = <2>;
169 clocks = <&clkc 42>;
170 compatible = "xlnx,ps7-gpio-1.00.a";
171 emio-gpio-width = <64>;
172 gpio-controller ;
173 gpio-mask-high = <0x0>;
174 gpio-mask-low = <0x5600>;
175 interrupt-parent = <&ps7_scugic_0>;
176 interrupts = <0 20 4>;
177 reg = <0xe000a000 0x1000>;
178 } ;
179 ps7_gpv_0: ps7-gpv@f8900000 {
180 compatible = "xlnx,ps7-gpv-1.00.a";
181 reg = <0xf8900000 0x100000>;
182 } ;
183 ps7_i2c_0: ps7-i2c@e0004000 {
184 bus-id = <0>;
185 clocks = <&clkc 38>;
186 compatible = "xlnx,ps7-i2c-1.00.a";
187 i2c-clk = <400000>;
188 interrupt-parent = <&ps7_scugic_0>;
189 interrupts = <0 25 4>;
190 reg = <0xe0004000 0x1000>;
191 xlnx,has-interrupt = <0x0>;
192 xlnx,i2c-reset = "MIO 13";
193 #address-cells = <1>;
194 #size-cells = <0>;
195 i2cswitch@74 {
196 compatible = "nxp,pca9548";
197 #address-cells = <1>;
198 #size-cells = <0>;
199 reg = <0x74>;
200 i2c@2 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 reg = <2>;
204 eeprom@54 {
205 compatible = "at,24c08";
206 reg = <0x54>;
207 };
208 };
209 i2c@7 {
210 #address-cells = <1>;
211 #size-cells = <0>;
212 reg = <7>;
213 hwmon@52{
214 compatible = "pmbus,ucd9248";
215 reg = <52>;
216 };
217 hwmon@53{
218 compatible = "pmbus,ucd9248";
219 reg = <53>;
220 };
221 hwmon@54{
222 compatible = "pmbus,ucd9248";
223 reg = <54>;
224 };
225 };
226 };
227 } ;
228 ps7_intc_dist_0: ps7-intc-dist@f8f01000 {
229 compatible = "xlnx,ps7-intc-dist-1.00.a";
230 reg = <0xf8f01000 0x1000>;
231 } ;
232 ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
233 compatible = "xlnx,ps7-iop-bus-config-1.00.a";
234 reg = <0xe0200000 0x1000>;
235 } ;
236 ps7_l2cachec_0: ps7-l2cachec@f8f02000 {
237 compatible = "xlnx,ps7-l2cachec-1.00.a";
238 reg = <0xf8f02000 0x1000>;
239 } ;
240 ps7_ocmc_0: ps7-ocmc@f800c000 {
241 compatible = "xlnx,ps7-ocmc-1.00.a";
242 reg = <0xf800c000 0x1000>;
243 } ;
244 ps7_pl310_0: ps7-pl310@f8f02000 {
245 arm,data-latency = <3 2 2>;
246 arm,tag-latency = <2 2 2>;
247 cache-level = <2>;
248 cache-unified ;
249 compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
250 interrupt-parent = <&ps7_scugic_0>;
251 interrupts = <0 2 4>;
252 reg = <0xf8f02000 0x1000>;
253 } ;
254 ps7_qspi_0: ps7-qspi@e000d000 {
255 #address-cells = <1>;
256 #size-cells = <0>;
257 clock-names = "ref_clk", "aper_clk";
258 clocks = <&clkc 10>, <&clkc 43>;
259 compatible = "xlnx,ps7-qspi-1.00.a";
260 interrupt-parent = <&ps7_scugic_0>;
261 interrupts = <0 19 4>;
262 is-dual = <0>;
263 num-chip-select = <1>;
264 reg = <0xe000d000 0x1000>;
265 xlnx,fb-clk = <0x1>;
266 xlnx,qspi-mode = <0x0>;
267 primary_flash: ps7-qspi@0 {
268 #address-cells = <1>;
269 #size-cells = <1>;
270 reg = <0x0>;
271 spi-max-frequency = <50000000>;
272 compatible = "micron,n25q128";
273 partition@0x00000000 {
274 label = "boot";
275 reg = <0x00000000 0x00500000>;
276 };
277 partition@0x00500000 {
278 label = "bootenv";
279 reg = <0x00500000 0x00020000>;
280 };
281 partition@0x00520000 {
282 label = "image";
283 reg = <0x00520000 0x00a80000>;
284 };
285 partition@0x00fa0000 {
286 label = "spare";
287 reg = <0x00fa0000 0x00000000>;
288 };
289 } ;
290 } ;
291 ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
292 clock-names = "ref_clk", "aper_clk";
293 clocks = <&clkc 10>, <&clkc 43>;
294 compatible = "xlnx,ps7-qspi-linear-1.00.a";
295 reg = <0xfc000000 0x1000000>;
296 } ;
297 ps7_ram_0: ps7-ram@0 {
298 compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
299 interrupt-parent = <&ps7_scugic_0>;
300 interrupts = <0 3 4>;
301 reg = <0xfffc0000 0x40000>;
302 } ;
303 ps7_scuc_0: ps7-scuc@f8f00000 {
304 compatible = "xlnx,ps7-scuc-1.00.a";
305 reg = <0xf8f00000 0xfd>;
306 } ;
307 ps7_scugic_0: ps7-scugic@f8f01000 {
308 #address-cells = <2>;
309 #interrupt-cells = <3>;
310 #size-cells = <1>;
311 compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
312 interrupt-controller ;
313 num_cpus = <1>;
314 num_interrupts = <96>;
315 reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
316 } ;
317 ps7_scutimer_0: ps7-scutimer@f8f00600 {
318 clocks = <&clkc 4>;
319 compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
320 interrupt-parent = <&ps7_scugic_0>;
321 interrupts = <1 13 0x301>;
322 reg = <0xf8f00600 0x20>;
323 } ;
324 ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
325 clocks = <&clkc 4>;
326 compatible = "xlnx,ps7-scuwdt-1.00.a";
327 device_type = "watchdog";
328 interrupt-parent = <&ps7_scugic_0>;
329 interrupts = <1 14 0x301>;
330 reg = <0xf8f00620 0xe0>;
331 } ;
332 ps7_sd_0: ps7-sdio@e0100000 {
333 clock-frequency = <50000000>;
334 clock-names = "ref_clk", "aper_clk";
335 clocks = <&clkc 21>, <&clkc 32>;
336 compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci";
337 interrupt-parent = <&ps7_scugic_0>;
338 interrupts = <0 24 4>;
339 reg = <0xe0100000 0x1000>;
340 xlnx,has-cd = <0x1>;
341 xlnx,has-power = <0x0>;
342 xlnx,has-wp = <0x1>;
343 } ;
344 ps7_slcr_0: ps7-slcr@f8000000 {
345 compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
346 reg = <0xf8000000 0x1000>;
347 clocks {
348 #address-cells = <1>;
349 #size-cells = <0>;
350 clkc: clkc {
351 #clock-cells = <1>;
352 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
353 "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
354 "lqspi", "smc", "pcap", "gem0", "gem1",
355 "fclk0", "fclk1", "fclk2", "fclk3", "can0",
356 "can1", "sdio0", "sdio1", "uart0", "uart1",
357 "spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
358 "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
359 "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
360 "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
361 "swdt", "dbg_trc", "dbg_apb";
362 compatible = "xlnx,ps7-clkc";
363 fclk-enable = <0xf>;
364 ps-clk-frequency = <33333333>;
365 } ;
366 } ;
367 } ;
368 ps7_ttc_0: ps7-ttc@f8001000 {
369 clocks = <&clkc 6>;
370 compatible = "xlnx,ps7-ttc-1.00.a", "cdns,ttc";
371 interrupt-names = "ttc0", "ttc1", "ttc2";
372 interrupt-parent = <&ps7_scugic_0>;
373 interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
374 reg = <0xf8001000 0x1000>;
375 } ;
376 ps7_uart_1: serial@e0001000 {
377 clock-names = "ref_clk", "aper_clk";
378 clocks = <&clkc 24>, <&clkc 41>;
379 compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
380 current-speed = <115200>;
381 device_type = "serial";
382 interrupt-parent = <&ps7_scugic_0>;
383 interrupts = <0 50 4>;
384 port-number = <0>;
385 reg = <0xe0001000 0x1000>;
386 xlnx,has-modem = <0x0>;
387 } ;
388 ps7_usb_0: ps7-usb@e0002000 {
389 clocks = <&clkc 28>;
390 compatible = "xlnx,ps7-usb-1.00.a";
391 dr_mode = "host";
392 interrupt-parent = <&ps7_scugic_0>;
393 interrupts = <0 21 4>;
394 phy_type = "ulpi";
395 reg = <0xe0002000 0x1000>;
396 usb-reset = <&ps7_gpio_0 7 0>;
397 } ;
398 ps7_xadc: ps7-xadc@f8007100 {
399 clocks = <&clkc 12>;
400 compatible = "xlnx,ps7-xadc-1.00.a";
401 interrupt-parent = <&ps7_scugic_0>;
402 interrupts = <0 7 4>;
403 reg = <0xf8007100 0x20>;
404 } ;
406 zynq_rpmsg_instance: zynq-rpmsg_driver@0 {
407 compatible = "xlnx,zynq_rpmsg_driver";
408 reg = < 0x08000000 0x00208000 >;
409 dev-feature = <0x00000001>;
410 gen-feature = <0x00000000>;
411 num-vrings = <2>;
412 num-descs = <256>;
413 alignment = <4096>;
414 vring0 = <6>;
415 vring1 = <3>;
416 virtioid = <7>;
417 ringtx = <0x08000000>;
418 ringrx = <0x08004000>;
419 } ;
420 } ;
421 } ;