diff --git a/apps/system/generic/machine/zynq7/linker_remote.ld b/apps/system/generic/machine/zynq7/linker_remote.ld
index 103535e230557648e1f9b5e917ff444564c17057..1f1501ce3e1de71554a9611bf8a2b559394fed82 100644 (file)
-/* Linker script for Xilinx Zynq-7000\r
- *\r
- * Version: Sourcery CodeBench Lite 2013.11-24\r
- * Support: https://sourcery.mentor.com/GNUToolchain/\r
- *\r
- * Copyright (c) 2007-2010 CodeSourcery, Inc.\r
- * Copyright (c) 2010-2013 Mentor Graphics, Inc.\r
- *\r
- * The authors hereby grant permission to use, copy, modify, distribute,\r
- * and license this software and its documentation for any purpose, provided\r
- * that existing copyright notices are retained in all copies and that this\r
- * notice is included verbatim in any distributions. No written agreement,\r
- * license, or royalty fee is required for any of the authorized uses.\r
- * Modifications to this software may be copyrighted by their authors\r
- * and need not follow the licensing terms described here, provided that\r
- * the new terms are clearly indicated on the first page of each file where\r
- * they apply.\r
- */\r
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")\r
-ENTRY(__cs3_reset)\r
-SEARCH_DIR(.)\r
-GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3arm)\r
-\r
-MEMORY\r
-{\r
- ram (rwx) : ORIGIN = 0x00000000, LENGTH = 256M\r
- rom (rx) : ORIGIN = 0xe4000000, LENGTH = 64M\r
-}\r
-\r
-/* These force the linker to search for particular symbols from\r
- * the start of the link process and thus ensure the user's\r
- * overrides are picked up\r
- */\r
-EXTERN(__cs3_reset __cs3_reset_zynq7000_ram)\r
-EXTERN(__cs3_start_asm _start)\r
-/* Bring in the interrupt routines & vector */\r
-INCLUDE arm-names.inc\r
-EXTERN(__cs3_interrupt_vector_arm)\r
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)\r
-\r
-/* Provide fall-back values */\r
-PROVIDE(__cs3_heap_start = _end);\r
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);\r
-PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);\r
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);\r
-\r
-SECTIONS\r
-{\r
- _binary_firmware1_start = 0;\r
- _binary_firmware1_end = 0;\r
- _binary_firmware2_start = 0;\r
- _binary_firmware2_end = 0;\r
-\r
- .text :\r
- {\r
- CREATE_OBJECT_SYMBOLS\r
- __cs3_region_start_ram = .;\r
- _ftext = .;\r
- *(.cs3.region-head.ram)\r
- ASSERT (. == __cs3_region_start_ram, ".cs3.region-head.ram not permitted");\r
- __cs3_interrupt_vector = __cs3_interrupt_vector_arm;\r
- *(.cs3.interrupt_vector)\r
- /* Make sure we pulled in an interrupt vector. */\r
- ASSERT (. != __cs3_interrupt_vector_arm, "No interrupt vector");\r
-\r
- PROVIDE(__cs3_reset = __cs3_reset_zynq7000_ram);\r
- *(.cs3.reset)\r
- _start = DEFINED(__cs3_start_asm) ? __cs3_start_asm : _start;\r
-\r
- *(.text.cs3.init)\r
- *(.text .text.* .gnu.linkonce.t.*)\r
- *(.plt)\r
- *(.gnu.warning)\r
- *(.glue_7t) *(.glue_7) *(.vfp11_veneer)\r
-\r
- *(.ARM.extab* .gnu.linkonce.armextab.*)\r
- *(.gcc_except_table)\r
- } >ram\r
- .eh_frame_hdr : ALIGN (4)\r
- {\r
- KEEP (*(.eh_frame_hdr))\r
- *(.eh_frame_entry .eh_frame_entry.*)\r
- } >ram\r
- .eh_frame : ALIGN (4)\r
- {\r
- KEEP (*(.eh_frame)) *(.eh_frame.*)\r
- } >ram\r
- /* .ARM.exidx is sorted, so has to go in its own output section. */\r
- PROVIDE_HIDDEN (__exidx_start = .);\r
- .ARM.exidx :\r
- {\r
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
- } >ram\r
- PROVIDE_HIDDEN (__exidx_end = .);\r
- .rodata : ALIGN (4)\r
- {\r
- *(.rodata .rodata.* .gnu.linkonce.r.*)\r
-\r
- . = ALIGN(4);\r
- KEEP(*(.init))\r
-\r
- . = ALIGN(4);\r
- __preinit_array_start = .;\r
- KEEP (*(.preinit_array))\r
- __preinit_array_end = .;\r
-\r
- . = ALIGN(4);\r
- __init_array_start = .;\r
- KEEP (*(SORT(.init_array.*)))\r
- KEEP (*(.init_array))\r
- __init_array_end = .;\r
-\r
- . = ALIGN(4);\r
- KEEP(*(.fini))\r
-\r
- . = ALIGN(4);\r
- __fini_array_start = .;\r
- KEEP (*(.fini_array))\r
- KEEP (*(SORT(.fini_array.*)))\r
- __fini_array_end = .;\r
-\r
- . = ALIGN(0x4);\r
- KEEP (*crtbegin.o(.ctors))\r
- KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))\r
- KEEP (*(SORT(.ctors.*)))\r
- KEEP (*crtend.o(.ctors))\r
-\r
- . = ALIGN(0x4);\r
- KEEP (*crtbegin.o(.dtors))\r
- KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))\r
- KEEP (*(SORT(.dtors.*)))\r
- KEEP (*crtend.o(.dtors))\r
-\r
- . = ALIGN(4);\r
- __cs3_regions = .;\r
- LONG (0)\r
- LONG (__cs3_region_init_ram)\r
- LONG (__cs3_region_start_ram)\r
- LONG (__cs3_region_init_size_ram)\r
- LONG (__cs3_region_zero_size_ram)\r
- __cs3_regions_end = .;\r
- . = ALIGN (8);\r
- _etext = .;\r
- } >ram\r
-\r
- ASSERT (!(__cs3_region_init_ram & 7), "__cs3_region_init_ram not aligned")\r
- ASSERT (!(__cs3_region_start_ram & 7), "__cs3_region_start_ram not aligned")\r
- ASSERT (!(__cs3_region_init_size_ram & 7), "__cs3_region_init_size_ram not aligned")\r
- ASSERT (!(__cs3_region_zero_size_ram & 7), "__cs3_region_zero_size_ram not aligned")\r
- .cs3.rom : ALIGN (8)\r
- {\r
- __cs3_region_start_rom = .;\r
- *(.cs3.region-head.rom)\r
- *(.rom)\r
- . = ALIGN (8);\r
- } >rom\r
- .cs3.rom.bss :\r
- {\r
- *(.rom.b .bss.rom)\r
- . = ALIGN (8);\r
- } >rom\r
- /* __cs3_region_end_rom is deprecated */\r
- __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);\r
- __cs3_region_size_rom = LENGTH(rom);\r
- __cs3_region_init_rom = LOADADDR (.cs3.rom);\r
- __cs3_region_init_size_rom = LOADADDR (.cs3.rom.bss) - LOADADDR (.cs3.rom);\r
- __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss);\r
-\r
- .data : ALIGN (8)\r
- {\r
- KEEP(*(.jcr))\r
- *(.got.plt) *(.got)\r
- *(.shdata)\r
- *(.data .data.* .gnu.linkonce.d.*)\r
- . = ALIGN (8);\r
- *(.ram)\r
- . = ALIGN (8);\r
- _edata = .;\r
- } >ram\r
- .bss : ALIGN (8)\r
- {\r
- *(.shbss)\r
- *(.bss .bss.* .gnu.linkonce.b.*)\r
- *(COMMON)\r
- . = ALIGN (8);\r
- *(.ram.b .bss.ram)\r
- . = ALIGN (8);\r
- _end = .;\r
- __end = .;\r
- } >ram\r
- /* __cs3_region_end_ram is deprecated */\r
- __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);\r
- __cs3_region_size_ram = LENGTH(ram);\r
- __cs3_region_init_ram = LOADADDR (.text);\r
- __cs3_region_init_size_ram = _edata - ADDR (.text);\r
- __cs3_region_zero_size_ram = _end - _edata;\r
-\r
- .stab 0 (NOLOAD) : { *(.stab) }\r
- .stabstr 0 (NOLOAD) : { *(.stabstr) }\r
- /* DWARF debug sections.\r
- * Symbols in the DWARF debugging sections are relative to\r
- * the beginning of the section so we begin them at 0.\r
- */\r
- /* DWARF 1 */\r
- .debug 0 : { *(.debug) }\r
- .line 0 : { *(.line) }\r
- /* GNU DWARF 1 extensions */\r
- .debug_srcinfo 0 : { *(.debug_srcinfo) }\r
- .debug_sfnames 0 : { *(.debug_sfnames) }\r
- /* DWARF 1.1 and DWARF 2 */\r
- .debug_aranges 0 : { *(.debug_aranges) }\r
- .debug_pubnames 0 : { *(.debug_pubnames) }\r
- /* DWARF 2 */\r
- .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
- .debug_abbrev 0 : { *(.debug_abbrev) }\r
- .debug_line 0 : { *(.debug_line) }\r
- .debug_frame 0 : { *(.debug_frame) }\r
- .debug_str 0 : { *(.debug_str) }\r
- .debug_loc 0 : { *(.debug_loc) }\r
- .debug_macinfo 0 : { *(.debug_macinfo) }\r
- /* DWARF 2.1 */\r
- .debug_ranges 0 : { *(.debug_ranges) }\r
- /* SGI/MIPS DWARF 2 extensions */\r
- .debug_weaknames 0 : { *(.debug_weaknames) }\r
- .debug_funcnames 0 : { *(.debug_funcnames) }\r
- .debug_typenames 0 : { *(.debug_typenames) }\r
- .debug_varnames 0 : { *(.debug_varnames) }\r
-\r
- .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }\r
- .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }\r
- /DISCARD/ : { *(.note.GNU-stack) }\r
-}\r
-/* checksum: b15b0bf76673e544380111 */\r
+/*******************************************************************/
+/* */
+/* This file is automatically generated by linker script generator.*/
+/* */
+/* Version: */
+/* */
+/* Copyright (c) 2010 Xilinx, Inc. All rights reserved. */
+/* */
+/* Description : Cortex-A9 Linker Script */
+/* */
+/*******************************************************************/
+
+_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000;
+_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x4000;
+
+_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024;
+_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048;
+_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 4096;
+_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024;
+_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024;
+
+/* Define Memories in the system */
+
+MEMORY
+{
+ ps7_ddr_0_S_AXI_BASEADDR : ORIGIN = 0x00100000, LENGTH = 0x00080000
+ ps7_ram_0_S_AXI_BASEADDR : ORIGIN = 0x00000000, LENGTH = 0x00030000
+ ps7_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0x0000FE00
+}
+
+/* Specify the default entry point to the program */
+
+ENTRY(_vector_table)
+
+/* Define the sections, and where they are mapped in memory */
+
+SECTIONS
+{
+.text : {
+
+_binary_firmware1_start = 0;
+_binary_firmware1_end = 0;
+_binary_firmware2_start = 0;
+_binary_firmware2_end = 0;
+
+ *(.vectors)
+ *(.boot)
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t.*)
+ *(.plt)
+ *(.gnu_warning)
+ *(.gcc_execpt_table)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.vfp11_veneer)
+ *(.ARM.extab)
+ *(.gnu.linkonce.armextab.*)
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.init : {
+ KEEP (*(.init))
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.fini : {
+ KEEP (*(.fini))
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.rodata : {
+ __rodata_start = .;
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r.*)
+ __rodata_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.rodata1 : {
+ __rodata1_start = .;
+ *(.rodata1)
+ *(.rodata1.*)
+ __rodata1_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.sdata2 : {
+ __sdata2_start = .;
+ *(.sdata2)
+ *(.sdata2.*)
+ *(.gnu.linkonce.s2.*)
+ __sdata2_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.sbss2 : {
+ __sbss2_start = .;
+ *(.sbss2)
+ *(.sbss2.*)
+ *(.gnu.linkonce.sb2.*)
+ __sbss2_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.data : {
+ __data_start = .;
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d.*)
+ *(.jcr)
+ *(.got)
+ *(.got.plt)
+ __data_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.data1 : {
+ __data1_start = .;
+ *(.data1)
+ *(.data1.*)
+ __data1_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.got : {
+ *(.got)
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.ctors : {
+ __CTOR_LIST__ = .;
+ ___CTORS_LIST___ = .;
+ KEEP (*crtbegin.o(.ctors))
+ KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ __CTOR_END__ = .;
+ ___CTORS_END___ = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.dtors : {
+ __DTOR_LIST__ = .;
+ ___DTORS_LIST___ = .;
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ __DTOR_END__ = .;
+ ___DTORS_END___ = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.fixup : {
+ __fixup_start = .;
+ *(.fixup)
+ __fixup_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.eh_frame : {
+ *(.eh_frame)
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.eh_framehdr : {
+ __eh_framehdr_start = .;
+ *(.eh_framehdr)
+ __eh_framehdr_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.gcc_except_table : {
+ *(.gcc_except_table)
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.mmu_tbl (ALIGN(16384)) : {
+ __mmu_tbl_start = .;
+ *(.mmu_tbl)
+ __mmu_tbl_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.ARM.exidx : {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ *(.gnu.linkonce.armexidix.*.*)
+ __exidx_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.preinit_array : {
+ __preinit_array_start = .;
+ KEEP (*(SORT(.preinit_array.*)))
+ KEEP (*(.preinit_array))
+ __preinit_array_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.init_array : {
+ __init_array_start = .;
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ __init_array_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.fini_array : {
+ __fini_array_start = .;
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array))
+ __fini_array_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.ARM.attributes : {
+ __ARM.attributes_start = .;
+ *(.ARM.attributes)
+ __ARM.attributes_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.sdata : {
+ __sdata_start = .;
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ __sdata_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.sbss (NOLOAD) : {
+ __sbss_start = .;
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ __sbss_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.tdata : {
+ __tdata_start = .;
+ *(.tdata)
+ *(.tdata.*)
+ *(.gnu.linkonce.td.*)
+ __tdata_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.tbss : {
+ __tbss_start = .;
+ *(.tbss)
+ *(.tbss.*)
+ *(.gnu.linkonce.tb.*)
+ __tbss_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.bss (NOLOAD) : {
+ __bss_start = .;
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ __bss_end = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );
+
+_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
+
+/* Generate Stack and Heap definitions */
+
+.heap (NOLOAD) : {
+ . = ALIGN(16);
+ _heap = .;
+ HeapBase = .;
+ _heap_start = .;
+ . += _HEAP_SIZE;
+ _heap_end = .;
+ HeapLimit = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+.stack (NOLOAD) : {
+ . = ALIGN(16);
+ _stack_end = .;
+ . += _STACK_SIZE;
+ _stack = .;
+ __stack = _stack;
+ . = ALIGN(16);
+ _irq_stack_end = .;
+ . += _IRQ_STACK_SIZE;
+ __irq_stack = .;
+ _supervisor_stack_end = .;
+ . += _SUPERVISOR_STACK_SIZE;
+ . = ALIGN(16);
+ __supervisor_stack = .;
+ _abort_stack_end = .;
+ . += _ABORT_STACK_SIZE;
+ . = ALIGN(16);
+ __abort_stack = .;
+ _fiq_stack_end = .;
+ . += _FIQ_STACK_SIZE;
+ . = ALIGN(16);
+ __fiq_stack = .;
+ _undef_stack_end = .;
+ . += _UNDEF_STACK_SIZE;
+ . = ALIGN(16);
+ __undef_stack = .;
+} > ps7_ddr_0_S_AXI_BASEADDR
+
+_end = .;
+}