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raw | patch | inline | side by side (parent: d838080)
raw | patch | inline | side by side (parent: d838080)
author | Wendy Liang <jliang@xilinx.com> | |
Thu, 22 Jan 2015 05:33:07 +0000 (21:33 -0800) | ||
committer | Wendy Liang <jliang@xilinx.com> | |
Mon, 6 Apr 2015 07:23:15 +0000 (17:23 +1000) |
Use IPI for the communication between APU and RPU
Signed-off-by: Wendy Liang <jliang@xilinx.com>
Signed-off-by: Wendy Liang <jliang@xilinx.com>
porting/zynqMP_r5/platform.c | patch | blob | history | |
porting/zynqMP_r5/platform.h | patch | blob | history | |
porting/zynqMP_r5/platform_info.c | patch | blob | history |
index 5d6411844efbd015b281f7a6928036257a0d05e7..9f78463cc1ff3f2f6a59190da436bcbe7daee65b 100644 (file)
**************************************************************************/
#include "platform.h"
+#include "baremetal.h"
/*--------------------------- Globals ---------------------------------- */
struct hil_platform_ops proc_ops = {
int _enable_interrupt(struct proc_vring *vring_hw) {
- /* Register ISR*/
- env_register_isr(vring_hw->intr_info.vect_id, vring_hw, platform_isr);
+ if (vring_hw->intr_info.vect_id < 0)
+ return 0;
- /* Enable the interrupts */
- env_enable_interrupt(vring_hw->intr_info.vect_id,
- vring_hw->intr_info.priority,
- vring_hw->intr_info.trigger_type);
- return 0;
+ /* Register ISR*/
+ env_register_isr(vring_hw->intr_info.vect_id, vring_hw, platform_isr);
+
+ /* Enable IPI interrupt */
+ struct ipi_info *chn_ipi_info = (struct ipi_info *)(vring_hw->intr_info.data);
+ HIL_MEM_WRITE32((chn_ipi_info->ipi_base_addr + IPI_IER_OFFSET), chn_ipi_info->ipi_chn_mask);
+
+ /* Enable the interrupts */
+ env_enable_interrupt(vring_hw->intr_info.vect_id,
+ vring_hw->intr_info.priority,
+ vring_hw->intr_info.trigger_type);
+ return 0;
}
void _notify(int cpu_id, struct proc_intr *intr_info) {
- unsigned long mask = 0;
-
- /* FIX ME -- TO be implemented */
+ struct ipi_info *chn_ipi_info = (struct ipi_info *)(intr_info->data);
+ if (chn_ipi_info == NULL)
+ return;
+ /* Trigger IPI */
+ HIL_MEM_WRITE32((chn_ipi_info->ipi_base_addr + IPI_TRIG_OFFSET), chn_ipi_info->ipi_chn_mask);
}
int _boot_cpu(int cpu_id, unsigned int load_addr) {
}
void platform_isr(int vect_id, void *data) {
- hil_isr(((struct proc_vring *) data));
+ struct proc_vring *vring_hw = (struct proc_vring *) data;
+ struct ipi_info *chn_ipi_info = (struct ipi_info *)(vring_hw->intr_info.data);
+ unsigned int ipi_intr_status = (unsigned int)HIL_MEM_READ32(chn_ipi_info->ipi_base_addr + IPI_ISR_OFFSET);
+ if ((ipi_intr_status & chn_ipi_info->ipi_chn_mask)) {
+ hil_isr(vring_hw);
+ HIL_MEM_WRITE32((chn_ipi_info->ipi_base_addr + IPI_ISR_OFFSET), chn_ipi_info->ipi_chn_mask);
+ }
}
index 9ea4b0ffc7a9b22ee39e9538b5e5e5086a585d3e..6d4936af90428cad5c73b5b82bbf6321979441bb 100644 (file)
/* -- FIX ME: ipi info is to be defined -- */
struct ipi_info {
- uint32_t preserved;
+ uint32_t ipi_base_addr;
+ uint32_t ipi_chn_mask;
};
int _enable_interrupt(struct proc_vring *vring_hw);
index 2712188c228f2ad09b3c01c34a2ff27363ed0946..b096b9aaa9e48d240b0f3e44dcb59f6a6029d817 100644 (file)
/* IPC Device parameters */
#define SHM_ADDR (void *)0x3ED08000
#define SHM_SIZE 0x00200000
-#define VRING0_IPI_VECT 15
-#define VRING1_IPI_VECT 14
+#define IPI_BASEADDR 0xff310000
+#define IPI_CHN_BITMASK 0x00000001 /* IPI channel bit mask APU<->RPU0 */
+#define VRING0_IPI_INTR_VECT -1
+#define VRING1_IPI_INTR_VECT 79
#define MASTER_CPU_ID 0
#define REMOTE_CPU_ID 1
-static struct ipi_info vring0_ipi_info = {0};
-static struct ipi_info vring1_ipi_info = {1};
+static struct ipi_info chn_ipi_info = {IPI_BASEADDR, IPI_CHN_BITMASK};
/**
* This array provdes defnition of CPU nodes for master and remote
*/
NULL, NULL, 0, 0,
{
- VRING0_IPI_VECT,0x1006,1,(void *)(&vring0_ipi_info),
+ VRING0_IPI_INTR_VECT,0x1006,1,(void *)(&chn_ipi_info),
}
},
{
NULL, NULL, 0, 0,
{
- VRING1_IPI_VECT,0x1006,1,(void *)(&vring1_ipi_info),
+ VRING1_IPI_INTR_VECT,0x1006,1,(void *)(&chn_ipi_info),
}
}
}
*/
NULL, NULL, 0, 0,
{
- VRING0_IPI_VECT,0x1006,1,(void *)(&vring0_ipi_info)
+ VRING0_IPI_INTR_VECT,0x1006,1,(void *)(&chn_ipi_info)
}
},
{
NULL, NULL, 0, 0,
{
- VRING1_IPI_VECT,0x1006,1,(void *)(&vring1_ipi_info)
+ VRING1_IPI_INTR_VECT,0x1006,1,(void *)(&chn_ipi_info)
}
}
}