[UART] bool and unsigned macros implementation previously we have used TRUE/FALSE macros both as boolean and unsigned int Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation Signed-off-by: Asha <x1101668@ti.com>
Revert bool/Bool implementation for the below mentioned Modules: [KERNEL] 168a794f16611ed035572a5f762eed4682de5bbc. [LPM] b0b358e538cb5f4ca789811104f30c860b34ba71. [MCASP] 45ab3cde1d55d53fe485232b6da61e480166aa47. [DSS] 12834e4c8356ba4e5def1ca0bd1162eaa21f253f. [FATFS] 4ffe346cbaac27889735c06a394b4192de5fdb34. [PCIE] 9f050385cca0190fd62072ed9f055a35e3283b77. [MMCSD] 24d7fb2f0ed97548232bd5d9851862ad00fda3a1. [OSPI] 48d37a010a7d9bd10a58666d96620c010092afa8. [BOOT] 9ead181e998c40022c278e3d35bf8fbf4fa5cca6. [UART] a8f8d2c5bf89a43d68ea6cdd303afeee4c558f3d. [GPIO] 0cbf515ffe5cd03a773246aad9c2f1e2df6b1dad. [SCICLIENT] f03d71041062bc1eface645578dc0c78549da64d. [SCICLIENT] d16aa73f2c5ca5d5cccc04af156a4df9a722d254. [UDMA] 52a05193ea58876972841210cafdf20efb0808f3. [UDMA_UTILS] 33c50581ba869ef93e1c6346c97c82cd2888f34d. [BOARD] b080da2ff6810fdff885b3cdcaac00c6c2ebcc3b. [BOARD] 5fb6d7b418b17c47714e1fa0311af2b27b7641e9. [BOARD] 691f99e27ed48234092937baeaee8e780b10e2d0. [OSAL] fbe051cd3323133274a989018655ddb0b1f3b06c. [I2C] 6e8661d9de64f2cf00095b2219ba9a7d2780f136. [IPC] b0e2470359a073ff2f4aa98e34f453000a9fde2c. [FVID2] 075b6d9268fa3790aa1b73779bc4349e99c40dd0.
[UART] bool and unsigned macros implementation previously we have used TRUE/FALSE macros both as boolean and unsigned int Now BTRUE/BFALSE macros gets used for boolean implementation and UTRUE/UFALSE macros for the unsigned int implementation Signed-off-by: Asha <x1101668@ti.com>
PDK-9829: set frequency for awr294x based on efuse Signed-off-by: Prasad Konnur <prasadkonnur@ti.com>
ti/drv/uart: SCI bug fixes and UART test enhancements tpr12/soc: MSS domain: add DSS SCI instance uartsci.c: fix the following two bugs - UartSci_write: need to wait for TxFree prior to the first ch write - UartSci_close: Wait for Tx empty to ensure all pending transmission are completed Uart test: TPR12: UART_RX_LOOPBAK_ONLY valid for SIM_BUILD only TPR12: Verify DSS UART instance at R5F Increase UART_TEST_TIMEOUT to 10 seconds to be consistent with test description Replace sizeof(const string array) to strlen(const string array) to provide the accurate length for UART_write() Add cache alignments to all output buffers restrict the Tx profile test for QT only because the test requires CCS console output and the baudrate does not match th eone at the terminal UART build: add tpr12_qt Signed-off-by: Eric Ruei <e-ruei1@ti.com>
UART: lib/test cleanup for TPR12 - Introduce 2ms delay when loopback is enabled. - Use common MACRO UART_test_log for debugging log - UART_test_profile_tx() was designed for TPR12 only Include it for TPR12 only until other UART implementations are enhanced to support UART stats Signed-off-by: Eric Ruei <e-ruei1@ti.com>
drv/uart: porting SCI driver as UART v3 Porting the UART(SCI) driver from mmWave SDK to PDK UART/v3 with minimum changes as described below: - Move the IP-specific configuration parameters from UART_Params to SoC-specific UART_HwAttrs - Add EDMA Rx support - Add Callback, polling timeout support - Add interrupt control Signed-off-by: Eric Ruei <e-ruei1@ti.com>