9f09ad929f7a48526ccfe63e5edee912dac49627
1 /******************************************************************************\r
2 * Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com\r
3 *\r
4 * Redistribution and use in source and binary forms, with or without\r
5 * modification, are permitted provided that the following conditions\r
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11 * Redistributions in binary form must reproduce the above copyright\r
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20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
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31 *\r
32 *****************************************************************************/\r
33 \r
34 \r
35 /**\r
36 * \file csirx_test_tpr12.c\r
37 *\r
38 * \brief csirx diagnostic test file.\r
39 *\r
40 * Targeted Functionality: Verification of csirx interface by receiving fixed\r
41 * pattern data from Radar sensor.\r
42 *\r
43 * Operation: This test verifies CSIRX interface by receiving the userDefinedMapping\r
44 * user defined from IWR143 radar sensor.\r
45 *\r
46 * Supported SoCs: TPR12.\r
47 *\r
48 * Supported Platforms: tp12_evm.\r
49 */\r
50 \r
51 \r
52 \r
53 #include <csirx_test_tpr12.h>\r
54 \r
55 BoardDaig_State gTestState = {0};\r
56 volatile bool gFrameReceived = 0;\r
57 uint32_t gErrorCode = 0;\r
58 uint32_t gFrameCounter = 0;\r
59 \r
60 #define BOARD_DIAG_CSIRX_A_TEST (1U)\r
61 #define BOARD_DIAG_TEST_BUF_INIT_PATTERN (0xBE)\r
62 #define BOARD_DIAG_TEST_PAYLOAD_PATTERN_NUM_BYTES_PER_FRAME (128U)\r
63 #define BOARD_DIAG_INIT_PATTERN_SIZE (BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED + 32U)\r
64 /* Ping */\r
65 #pragma DATA_SECTION(testPingBufL3, ".l3ram");\r
66 uint8_t testPingBufL3[BOARD_DIAG_INIT_PATTERN_SIZE] \\r
67 __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
68 \r
69 #pragma DATA_SECTION(testPingBufHWA, ".hwaram");\r
70 uint8_t testPingBufHWA[BOARD_DIAG_INIT_PATTERN_SIZE] \\r
71 __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
72 \r
73 #pragma DATA_SECTION(testPingBufL2, ".l2ram");\r
74 uint8_t testPingBufL2[BOARD_DIAG_INIT_PATTERN_SIZE] \\r
75 __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
76 \r
77 /* Pong */\r
78 #pragma DATA_SECTION(testPongBufL3, ".l3ram");\r
79 uint8_t testPongBufL3[BOARD_DIAG_INIT_PATTERN_SIZE] \\r
80 __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
81 \r
82 #pragma DATA_SECTION(testPongBufHWA, ".hwaram");\r
83 uint8_t testPongBufHWA[BOARD_DIAG_INIT_PATTERN_SIZE] \\r
84 __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
85 \r
86 #pragma DATA_SECTION(testPongBufL2, ".l2ram");\r
87 uint8_t testPongBufL2[BOARD_DIAG_INIT_PATTERN_SIZE] \\r
88 __attribute__ ((aligned(BOARD_DIAG_PING_PONG_ALIGNMENT)));\r
89 \r
90 /**\r
91 * \brief Used to read the payload data from the ping-pong buffers\r
92 * This function comapres the data received from the buffers\r
93 * to expected value.\r
94 *\r
95 * \param handle [IN] CSIRX Handler\r
96 *\r
97 * \return NULL\r
98 *\r
99 */\r
100 void BoardDiag_CheckPayloadReceived(CSIRX_Handle handle)\r
101 {\r
102 uint32_t numBytes = 0;\r
103 uint32_t buffer, bufIndx = 0;\r
104 uint8_t *buf;\r
105 \r
106 gErrorCode = CSIRX_getContextReceivedBuffer(handle, BOARD_DIAG_TEST_CONTEXT, &buffer);\r
107 DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
108 buffer = CSL_globToLocAddr(buffer);\r
109 buf = (uint8_t *)buffer;\r
110 CacheP_Inv(buf,BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED);\r
111 #if defined(PAYLOAD_PATTERN_CHECK)\r
112 for(numBytes = 0; numBytes < BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED; numBytes++)\r
113 {\r
114 if(buf[bufIndx++] != BOARD_DIAG_TEST_PATTERN)\r
115 {\r
116 gTestState.isReceivedPayloadCorrect = false;\r
117 DebugP_log1("Frame - %d is invalid\n",\r
118 gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);\r
119 break;\r
120 }\r
121 }\r
122 #else\r
123 numBytes = BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED;\r
124 bufIndx = BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED;\r
125 #endif\r
126 if (numBytes == BOARD_DIAG_PING_OR_PONG_BUF_SIZE_ALIGNED)\r
127 {\r
128 for (; numBytes < (BOARD_DIAG_INIT_PATTERN_SIZE);numBytes++)\r
129 {\r
130 if(buf[bufIndx++] != BOARD_DIAG_TEST_BUF_INIT_PATTERN)\r
131 {\r
132 gTestState.isReceivedPayloadCorrect = false;\r
133 UART_printf("Buffer corruption - %d is invalid\n",\r
134 gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);\r
135 break;\r
136 }\r
137 }\r
138 }\r
139 }\r
140 \r
141 /**\r
142 * \brief Callback function for common.irq interrupt, generated when\r
143 * end of frame code and line code detected.\r
144 *\r
145 * \param handle [IN] CSIRX Handler\r
146 * arg [IN] CALLBACK function argument\r
147 * IRQ [OUT] CSIRX common irq\r
148 *\r
149 */\r
150 void BoardDiag_commonCallback(CSIRX_Handle handle, uint32_t arg,\r
151 CSIRX_CommonIRQ_t *IRQ)\r
152 {\r
153 uint8_t i;\r
154 uint32_t frameCounter =\r
155 gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect + 1;\r
156 \r
157 DebugP_assert(handle != NULL);\r
158 DebugP_assert(arg == BOARD_DIAG_TEST_COMMON_CB_ARG);\r
159 gTestState.callbackCount.common++;\r
160 \r
161 gTestState.IRQ.common = *IRQ;\r
162 \r
163 /* Counts book-keeping */\r
164 if(IRQ->isOCPerror == true)\r
165 {\r
166 gTestState.commonIRQcount.isOCPerror++;\r
167 }\r
168 if(IRQ->isComplexIOerror == true)\r
169 {\r
170 gTestState.commonIRQcount.isComplexIOerror++;\r
171 }\r
172 if(IRQ->isFIFOoverflow == true)\r
173 {\r
174 gTestState.commonIRQcount.isFIFOoverflow++;\r
175 }\r
176 \r
177 if(IRQ->isComplexIOerror)\r
178 {\r
179 gErrorCode = CSIRX_getComplexIOlanesIRQ(handle,\r
180 &gTestState.IRQ.complexIOlanes);\r
181 if(gErrorCode != CSIRX_NO_ERROR)\r
182 {\r
183 DebugP_log1("Error occured while recieving the frame-%d\n", frameCounter);\r
184 }\r
185 DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
186 \r
187 gErrorCode = CSIRX_clearAllcomplexIOlanesIRQ(handle);\r
188 DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
189 }\r
190 \r
191 for(i = 0; i < CSIRX_NUM_CONTEXTS; i++)\r
192 {\r
193 if(IRQ->isContext[i] == true)\r
194 {\r
195 gErrorCode = CSIRX_getContextIRQ(handle, i,\r
196 &gTestState.IRQ.context[i]);\r
197 DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
198 \r
199 if(gTestState.IRQ.context[i].isFrameEndCodeDetect == true)\r
200 {\r
201 gTestState.contextIRQcounts[i].frameEndCodeDetect++;\r
202 /* Single frame is received */\r
203 gFrameReceived = true;\r
204 \r
205 }\r
206 \r
207 if(gTestState.IRQ.context[i].isLineEndCodeDetect == true)\r
208 {\r
209 gTestState.contextIRQcounts[i].lineEndCodeDetect++;\r
210 }\r
211 \r
212 gErrorCode = CSIRX_clearAllcontextIRQ(handle, i);\r
213 DebugP_assert(gErrorCode == CSIRX_NO_ERROR);\r
214 }\r
215 }\r
216 }\r
217 \r
218 void BoardDiag_CheckStateError(bool *isTestPass)\r
219 {\r
220 if(gTestState.commonIRQcount.isOCPerror != 0)\r
221 {\r
222 DebugP_log1("OCP error has occured %d number of times \n", gTestState.commonIRQcount.isOCPerror);\r
223 *isTestPass = false;\r
224 }\r
225 if(gTestState.commonIRQcount.isComplexIOerror != 0)\r
226 {\r
227 DebugP_log1("Complex IO error has occured %d number of times \n", gTestState.commonIRQcount.isComplexIOerror);\r
228 *isTestPass = false;\r
229 }\r
230 if(gTestState.commonIRQcount.isFIFOoverflow != 0)\r
231 {\r
232 DebugP_log1("FIFO Overflow error has occured %d number of times \n",gTestState.commonIRQcount.isFIFOoverflow);\r
233 *isTestPass = false;\r
234 }\r
235 }\r
236 \r
237 void BoardDiag_combinedEOFcallback(CSIRX_Handle handle, uint32_t arg)\r
238 {\r
239 DebugP_assert(handle != NULL);\r
240 DebugP_assert(arg == BOARD_DIAG_TEST_COMBINED_EOF_CB_ARG);\r
241 gTestState.callbackCount.combinedEOF++;\r
242 }\r
243 \r
244 Board_DiagConfig testConfig =\r
245 {\r
246 /* DDR clock set to 300 MHz */\r
247 .DPHYcfg.ddrClockInHz = 300000000U,\r
248 .DPHYcfg.isClockMissingDetectionEnabled = true,\r
249 .DPHYcfg.triggerEscapeCode[0] = 0x0,\r
250 .DPHYcfg.triggerEscapeCode[1] = 0x0,\r
251 .DPHYcfg.triggerEscapeCode[2] = 0x0,\r
252 .DPHYcfg.triggerEscapeCode[3] = 0x0,\r
253 \r
254 .complexIOcfg.lanesConfig.dataLane[0].polarity = 0,\r
255 .complexIOcfg.lanesConfig.dataLane[0].position = CSIRX_LANE_POSITION_1,\r
256 .complexIOcfg.lanesConfig.dataLane[1].polarity = 0,\r
257 .complexIOcfg.lanesConfig.dataLane[1].position = CSIRX_LANE_POSITION_2,\r
258 .complexIOcfg.lanesConfig.dataLane[2].polarity = 0,\r
259 .complexIOcfg.lanesConfig.dataLane[2].position = CSIRX_LANE_POSITION_4,\r
260 .complexIOcfg.lanesConfig.dataLane[3].polarity = 0,\r
261 .complexIOcfg.lanesConfig.dataLane[3].position = CSIRX_LANE_POSITION_5,\r
262 .complexIOcfg.lanesConfig.clockLane.polarity = 0,\r
263 .complexIOcfg.lanesConfig.clockLane.position = CSIRX_LANE_POSITION_3,\r
264 .complexIOcfg.lanesIRQ.isAllLanesULPMenter = true,\r
265 .complexIOcfg.lanesIRQ.isAllLanesULPMexit = true,\r
266 .complexIOcfg.lanesIRQ.dataLane[0].isStateTransitionToULPM = true,\r
267 .complexIOcfg.lanesIRQ.dataLane[0].isControlError = true,\r
268 .complexIOcfg.lanesIRQ.dataLane[0].isEscapeEntryError = true,\r
269 .complexIOcfg.lanesIRQ.dataLane[0].isStartOfTransmisionSyncError = true,\r
270 .complexIOcfg.lanesIRQ.dataLane[0].isStartOfTransmisionError = true,\r
271 .complexIOcfg.lanesIRQ.dataLane[1].isStateTransitionToULPM = true,\r
272 .complexIOcfg.lanesIRQ.dataLane[1].isControlError = true,\r
273 .complexIOcfg.lanesIRQ.dataLane[1].isEscapeEntryError = true,\r
274 .complexIOcfg.lanesIRQ.dataLane[1].isStartOfTransmisionSyncError = true,\r
275 .complexIOcfg.lanesIRQ.dataLane[1].isStartOfTransmisionError = true,\r
276 .complexIOcfg.lanesIRQ.dataLane[2].isStateTransitionToULPM = true,\r
277 .complexIOcfg.lanesIRQ.dataLane[2].isControlError = true,\r
278 .complexIOcfg.lanesIRQ.dataLane[2].isEscapeEntryError = true,\r
279 .complexIOcfg.lanesIRQ.dataLane[2].isStartOfTransmisionSyncError = true,\r
280 .complexIOcfg.lanesIRQ.dataLane[2].isStartOfTransmisionError = true,\r
281 .complexIOcfg.lanesIRQ.dataLane[3].isStateTransitionToULPM = true,\r
282 .complexIOcfg.lanesIRQ.dataLane[3].isControlError = true,\r
283 .complexIOcfg.lanesIRQ.dataLane[3].isEscapeEntryError = true,\r
284 .complexIOcfg.lanesIRQ.dataLane[3].isStartOfTransmisionSyncError = true,\r
285 .complexIOcfg.lanesIRQ.dataLane[3].isStartOfTransmisionError = true,\r
286 .complexIOcfg.lanesIRQ.clockLane.isStateTransitionToULPM = true,\r
287 .complexIOcfg.lanesIRQ.clockLane.isControlError = true,\r
288 .complexIOcfg.lanesIRQ.clockLane.isEscapeEntryError = true,\r
289 .complexIOcfg.lanesIRQ.clockLane.isStartOfTransmisionSyncError = true,\r
290 .complexIOcfg.lanesIRQ.clockLane.isStartOfTransmisionError = true,\r
291 \r
292 .commonCfg.isSoftStoppingOnInterfaceDisable = true,\r
293 .commonCfg.isECCenabled = false,\r
294 .commonCfg.isEXP16SignExtensionEnabled = false,\r
295 .commonCfg.isBurstSizeExpand = false,\r
296 .commonCfg.isNonPostedWrites = true,\r
297 .commonCfg.isOCPautoIdle = true,\r
298 .commonCfg.stopStateFSMtimeoutInNanoSecs = 200000U,\r
299 .commonCfg.burstSize = 8,\r
300 .commonCfg.endianness = CSIRX_ALL_LITTLE_ENDIAN,\r
301 .commonCfg.startOfFrameIRQ0contextId = BOARD_DIAG_TEST_CONTEXT,\r
302 .commonCfg.startOfFrameIRQ1contextId = 0,\r
303 .commonCfg.endOfFrameIRQ0contextId = BOARD_DIAG_TEST_CONTEXT,\r
304 .commonCfg.endOfFrameIRQ1contextId = 0,\r
305 .commonCfg.IRQ.isOCPerror = true,\r
306 .commonCfg.IRQ.isGenericShortPacketReceive = false,\r
307 .commonCfg.IRQ.isECConeBitShortPacketErrorCorrect = false,\r
308 .commonCfg.IRQ.isECCmoreThanOneBitCannotCorrect = false,\r
309 .commonCfg.IRQ.isComplexIOerror = true,\r
310 .commonCfg.IRQ.isFIFOoverflow = true,\r
311 .commonCfg.IRQ.isContext[0] = false,\r
312 .commonCfg.IRQ.isContext[1] = false,\r
313 .commonCfg.IRQ.isContext[2] = false,\r
314 .commonCfg.IRQ.isContext[3] = false,\r
315 .commonCfg.IRQ.isContext[4] = false,\r
316 .commonCfg.IRQ.isContext[5] = false,\r
317 .commonCfg.IRQ.isContext[6] = false,\r
318 .commonCfg.IRQ.isContext[7] = false,\r
319 .commonCfg.IRQcallbacks.common.fxn = BoardDiag_commonCallback,\r
320 .commonCfg.IRQcallbacks.common.arg = BOARD_DIAG_TEST_COMMON_CB_ARG,\r
321 .commonCfg.IRQcallbacks.combinedEndOfLine.fxn = NULL,\r
322 .commonCfg.IRQcallbacks.combinedEndOfLine.arg = 0,\r
323 #ifdef BUILD_DSP_1\r
324 .commonCfg.IRQcallbacks.combinedEndOfFrame.fxn = NULL,\r
325 .commonCfg.IRQcallbacks.combinedEndOfFrame.arg = 0,\r
326 #else\r
327 .commonCfg.IRQcallbacks.combinedEndOfFrame.fxn =\r
328 BoardDiag_combinedEOFcallback,\r
329 .commonCfg.IRQcallbacks.combinedEndOfFrame.arg =\r
330 BOARD_DIAG_TEST_COMBINED_EOF_CB_ARG,\r
331 #endif\r
332 .commonCfg.IRQcallbacks.startOfFrameIRQ0.fxn = NULL,\r
333 .commonCfg.IRQcallbacks.startOfFrameIRQ0.arg = 0,\r
334 .commonCfg.IRQcallbacks.startOfFrameIRQ1.fxn = NULL,\r
335 .commonCfg.IRQcallbacks.startOfFrameIRQ1.arg = 0,\r
336 .commonCfg.IRQcallbacks.endOfFrameIRQ0.fxn = NULL,\r
337 .commonCfg.IRQcallbacks.endOfFrameIRQ0.arg = 0,\r
338 .commonCfg.IRQcallbacks.endOfFrameIRQ1.fxn = NULL,\r
339 .commonCfg.IRQcallbacks.endOfFrameIRQ1.arg = 0,\r
340 \r
341 .contextCfg.virtualChannelId = BOARD_DIAG_TEST_VC,\r
342 .contextCfg.format = BOARD_DIAG_TEST_FORMAT,\r
343 .contextCfg.userDefinedMapping = BOARD_DIAG_TEST_USER_DEFINED_MAPPING,\r
344 .contextCfg.isByteSwapEnabled = false,\r
345 .contextCfg.isGenericEnabled = false,\r
346 .contextCfg.isTranscodingEnabled = false,\r
347 .contextCfg.transcodeConfig.transcodeFormat =\r
348 CSIRX_TRANSCODE_FORMAT_NO_TRANSCODE,\r
349 .contextCfg.transcodeConfig.isHorizontalDownscalingBy2Enabled = false,\r
350 .contextCfg.transcodeConfig.crop.horizontalCount = 0,\r
351 .contextCfg.transcodeConfig.crop.horizontalSkip = 0,\r
352 .contextCfg.transcodeConfig.crop.verticalCount = 0,\r
353 .contextCfg.transcodeConfig.crop.verticalSkip = 0,\r
354 .contextCfg.alpha = 0,\r
355 .contextCfg.pingPongConfig.pingPongSwitchMode = CSIRX_PING_PONG_FRAME_SWITCHING,\r
356 .contextCfg.pingPongConfig.numFramesForFrameBasedPingPongSwitching = 1,\r
357 .contextCfg.pingPongConfig.lineOffset =\r
358 CSIRX_LINEOFFSET_CONTIGUOUS_STORAGE,\r
359 .contextCfg.pingPongConfig.pingAddress = NULL,\r
360 .contextCfg.pingPongConfig.pongAddress = NULL,\r
361 .contextCfg.numFramesToAcquire = CSIRX_NUM_FRAMES_TO_ACQUIRE_INFINITE,\r
362 .contextCfg.IRQ.isNumLines = false,\r
363 .contextCfg.isNumLinesForIRQmoduloWithinFrame = false,\r
364 .contextCfg.numLinesForIRQ = 0,\r
365 .contextCfg.IRQ.isFramesToAcquire = false,\r
366 .contextCfg.IRQ.isPayloadChecksumMismatch = false,\r
367 .contextCfg.IRQ.isFrameStartCodeDetect = true,\r
368 .contextCfg.IRQ.isFrameEndCodeDetect = true,\r
369 .contextCfg.IRQ.isLineStartCodeDetect = false,\r
370 .contextCfg.IRQ.isLineEndCodeDetect = true,\r
371 .contextCfg.IRQ.isECConeBitLongPacketCorrect = false,\r
372 .contextCfg.endOfLineIRQcallback.fxn = NULL,\r
373 .contextCfg.endOfLineIRQcallback.arg = NULL,\r
374 .contextCfg.isEndOfFramePulseEnabled = true,\r
375 .contextCfg.isEndOfLinePulseEnabled = false,\r
376 .contextCfg.isChecksumEnabled = true\r
377 };\r
378 \r
379 /**\r
380 * \brief Initialize the ping pong buffers to reset values\r
381 * \param pingBuf [OUT] Ping buffer\r
382 * pongBuf [OUT] Pong buffer\r
383 * sizeBuf [OUT] Size of the buffer\r
384 *\r
385 * \retval\r
386 * none\r
387 */\r
388 void BoardDiag_InitBuf(uint32_t pingBuf, uint32_t pongBuf, uint32_t sizeBuf)\r
389 {\r
390 /* initialize ping/pong bufs to known failing pattern */\r
391 memset((void *)pingBuf, BOARD_DIAG_TEST_BUF_INIT_PATTERN, sizeBuf);\r
392 CacheP_wbInv((void *)pingBuf, sizeBuf);\r
393 memset((void *)pongBuf, BOARD_DIAG_TEST_BUF_INIT_PATTERN, sizeBuf);\r
394 CacheP_wbInv((void *)pongBuf, sizeBuf);\r
395 }\r
396 \r
397 /**\r
398 * \brief This function initializes test state variable.\r
399 */\r
400 void BoardDiag_TestInit(void)\r
401 {\r
402 memset(&gTestState, 0, sizeof(gTestState));\r
403 \r
404 gTestState.isReceivedPayloadCorrect = true;\r
405 \r
406 }\r
407 \r
408 /**\r
409 * \brief Gets test buffer address from a bunch of input parameters\r
410 * \param BoardDiag_RAMtype [IN] Type of buffer RAM\r
411 * buf [OUT] Pointer to where the buffer address is returned\r
412 * isPing [IN] true if ping buffer else pong buffer\r
413 *\r
414 *\r
415 * \retval\r
416 * none\r
417 */\r
418 void BoardDiag_getBuf(BoardDiag_RAMtype bufRAMtype, uint32_t *buf, bool isPing)\r
419 {\r
420 if(isPing == true)\r
421 {\r
422 switch(bufRAMtype)\r
423 {\r
424 case BOARD_DIAG_L3RAM:\r
425 *buf = (uint32_t) &testPingBufL3;\r
426 break;\r
427 case BOARD_DIAG_HWARAM:\r
428 *buf = (uint32_t) &testPingBufHWA;\r
429 break;\r
430 case BOARD_DIAG_L2RAM:\r
431 *buf = (uint32_t) &testPingBufL2;\r
432 break;\r
433 }\r
434 }\r
435 else\r
436 {\r
437 switch(bufRAMtype)\r
438 {\r
439 case BOARD_DIAG_L3RAM:\r
440 *buf = (uint32_t) &testPongBufL3;\r
441 break;\r
442 case BOARD_DIAG_HWARAM:\r
443 *buf = (uint32_t) &testPongBufHWA;\r
444 break;\r
445 case BOARD_DIAG_L2RAM:\r
446 *buf = (uint32_t) &testPongBufL2;\r
447 break;\r
448 }\r
449 }\r
450 }\r
451 \r
452 /**\r
453 * \brief The function performs the CSI-Rx Diagnostic\r
454 * test.\r
455 *\r
456 * \return int8_t\r
457 * 0 - in case of success\r
458 * -1 - in case of failure.\r
459 *\r
460 */\r
461 bool BoardDiag_CsirxTestRun(uint8_t instanceId)\r
462 {\r
463 CSIRX_Handle handle;\r
464 int32_t errorCode;\r
465 uint32_t pingBuf, pongBuf;\r
466 CSIRX_InstanceInfo_t instanceInfo;\r
467 bool isTestPass = true;\r
468 CSL_rcss_rcmRegs *rcss_rcm = (CSL_rcss_rcmRegs *)CSL_RCSS_RCM_U_BASE;\r
469 volatile bool isComplexIOresetDone, isForceRxModeDeasserted;\r
470 volatile uint32_t numComplexIOresetDonePolls, numComplexIOPowerStatusPolls,\r
471 numForceRxModeDeassertedPolls;\r
472 volatile uint8_t isComplexIOpowerStatus;\r
473 volatile bool isForceRxModeOnComplexIOdeasserted;\r
474 \r
475 /* get ping-pong buffer addresses based on the RAM type and context */\r
476 BoardDiag_getBuf(BOARD_DIAG_HWARAM, &pingBuf, true);\r
477 BoardDiag_getBuf(BOARD_DIAG_HWARAM, &pongBuf, false);\r
478 \r
479 BoardDiag_InitBuf(pingBuf, pongBuf, BOARD_DIAG_INIT_PATTERN_SIZE);\r
480 /* initialize the ping-pong buffers */\r
481 BoardDiag_TestInit();\r
482 \r
483 CSL_FINS(rcss_rcm->RCSS_CSI2A_RST_CTRL, RCSS_RCM_RCSS_CSI2A_RST_CTRL_RCSS_CSI2A_RST_CTRL_ASSERT, 0x7);\r
484 \r
485 CSL_FINS(rcss_rcm->RCSS_CSI2A_RST_CTRL, RCSS_RCM_RCSS_CSI2A_RST_CTRL_RCSS_CSI2A_RST_CTRL_ASSERT, 0U);\r
486 \r
487 \r
488 /* Initialize CSIRX */\r
489 errorCode = CSIRX_init();\r
490 if(errorCode != CSIRX_NO_ERROR)\r
491 {\r
492 DebugP_log1("CSIRX_init failed with errorCode = %d\n", errorCode);\r
493 isTestPass = false;\r
494 return isTestPass;\r
495 }\r
496 \r
497 /* Open the CSI Instance */\r
498 handle = CSIRX_open(instanceId, NULL, &errorCode, &instanceInfo);\r
499 if(handle == NULL)\r
500 {\r
501 if(errorCode == CSIRX_E_INVALID__INSTANCE_ID)\r
502 {\r
503 printf("Csirx Instance not supported\n");\r
504 }\r
505 else\r
506 {\r
507 printf("Unable to open the csirx Instance, erorCode = %d\n", errorCode);\r
508 }\r
509 isTestPass = false;\r
510 return isTestPass;\r
511 }\r
512 DebugP_log3("Instance opened, Revision = %d.%d, Number of "\r
513 "Contexts = %d\n", instanceInfo.majorRevisionId,\r
514 instanceInfo.minorRevisionId,\r
515 instanceInfo.numContexts);\r
516 \r
517 /* reset csi */\r
518 errorCode = CSIRX_reset(handle);\r
519 if(errorCode != CSIRX_NO_ERROR)\r
520 {\r
521 DebugP_log1("CSIRX_reset failed, errorCode = %d\n", errorCode);\r
522 isTestPass = false;\r
523 return isTestPass;\r
524 }\r
525 /* config complex IO - lanes and IRQ */\r
526 errorCode = CSIRX_configComplexIO(handle, &testConfig.complexIOcfg);\r
527 if(errorCode != CSIRX_NO_ERROR)\r
528 {\r
529 DebugP_log1("CSIRX_configComplexIO failed, errorCode = %d\n",\r
530 errorCode);\r
531 isTestPass = false;\r
532 return isTestPass;\r
533 }\r
534 \r
535 /* deassert complex IO reset */\r
536 errorCode = CSIRX_deassertComplexIOreset(handle);\r
537 if(errorCode != CSIRX_NO_ERROR)\r
538 {\r
539 DebugP_log1("CSIRX_deassertComplexIOreset failed, errorCode = %d\n",\r
540 errorCode);\r
541 isTestPass = false;\r
542 return isTestPass;\r
543 }\r
544 \r
545 /* config DPHY */\r
546 errorCode = CSIRX_configDPHY(handle, &testConfig.DPHYcfg);\r
547 if(errorCode != CSIRX_NO_ERROR)\r
548 {\r
549 DebugP_log1("CSIRX_configDPHY failed, errorCode = %d\n", errorCode);\r
550 isTestPass = false;\r
551 return isTestPass;\r
552 }\r
553 \r
554 errorCode = CSIRX_setComplexIOpowerCommand(handle, 1);\r
555 if(errorCode != CSIRX_NO_ERROR)\r
556 {\r
557 DebugP_log1("CSIRX_setComplexIOpowerCommand failed, errorCode = %d\n",\r
558 errorCode);\r
559 isTestPass = false;\r
560 return isTestPass;\r
561 }\r
562 \r
563 numComplexIOPowerStatusPolls = 0;\r
564 do\r
565 {\r
566 errorCode = CSIRX_getComplexIOpowerStatus(handle,\r
567 (uint8_t*)&isComplexIOpowerStatus);\r
568 if(errorCode != CSIRX_NO_ERROR)\r
569 {\r
570 DebugP_log1("CSIRX_getComplexIOpowerStatus failed, errorCode = "\r
571 " %d\n", errorCode);\r
572 isTestPass = false;\r
573 return isTestPass;\r
574 }\r
575 if (isComplexIOpowerStatus == 0)\r
576 {\r
577 Osal_delay(1);\r
578 }\r
579 numComplexIOPowerStatusPolls++;\r
580 } while((isComplexIOpowerStatus == 0));\r
581 \r
582 /* config common */\r
583 testConfig.commonCfg.IRQ.isContext[BOARD_DIAG_TEST_CONTEXT] = true,\r
584 errorCode = CSIRX_configCommon(handle, &testConfig.commonCfg);\r
585 if(errorCode != CSIRX_NO_ERROR)\r
586 {\r
587 DebugP_log1("CSIRX_configCommon failed, errorCode = %d\n", errorCode);\r
588 isTestPass = false;\r
589 return isTestPass;\r
590 }\r
591 \r
592 /* config contexts */\r
593 /* assign ping pong address */\r
594 testConfig.contextCfg.pingPongConfig.pingAddress =\r
595 (uint32_t) CSL_locToGlobAddr(pingBuf);\r
596 testConfig.contextCfg.pingPongConfig.pongAddress =\r
597 (uint32_t) CSL_locToGlobAddr(pongBuf);\r
598 \r
599 errorCode = CSIRX_configContext(handle, BOARD_DIAG_TEST_CONTEXT,\r
600 &testConfig.contextCfg);\r
601 if(errorCode != CSIRX_NO_ERROR)\r
602 {\r
603 DebugP_log1("CSIRX_configContext failed, errorCode = %d\n", errorCode);\r
604 \r
605 isTestPass = false;\r
606 return isTestPass;\r
607 }\r
608 \r
609 /* enable context */\r
610 errorCode = CSIRX_enableContext(handle, BOARD_DIAG_TEST_CONTEXT);\r
611 if(errorCode != CSIRX_NO_ERROR)\r
612 {\r
613 DebugP_log1("CSIRX_enableContext failed, errorCode = %d\n", errorCode);\r
614 isTestPass = false;\r
615 return isTestPass;\r
616 }\r
617 \r
618 /* enable interface */\r
619 errorCode = CSIRX_enableInterface(handle);\r
620 if(errorCode != CSIRX_NO_ERROR)\r
621 {\r
622 DebugP_log1("CSIRX_enableInterface failed, errorCode = %d\n",\r
623 errorCode);\r
624 isTestPass = false;\r
625 return isTestPass;\r
626 }\r
627 \r
628 /* Wait until complex IO reset complete */\r
629 numComplexIOresetDonePolls = 0;\r
630 do\r
631 {\r
632 errorCode = CSIRX_isComplexIOresetDone(handle,\r
633 (bool *)&isComplexIOresetDone);\r
634 if(errorCode != CSIRX_NO_ERROR)\r
635 {\r
636 DebugP_log1("CSIRX_isComplexIOresetDone failed, errorCode = "\r
637 " %d\n", errorCode);\r
638 isTestPass = false;\r
639 return isTestPass;\r
640 }\r
641 if (isComplexIOresetDone == false)\r
642 {\r
643 /* NOTE: This delay should be much smaller than frame time, default BIOS tick = 1 ms */\r
644 Osal_delay(1);\r
645 }\r
646 numComplexIOresetDonePolls++;\r
647 }while((isComplexIOresetDone == false));\r
648 \r
649 if(isComplexIOresetDone == false)\r
650 {\r
651 DebugP_log0("CSIRX_isComplexIOresetDone attempts exceeded\n");\r
652 isTestPass = false;\r
653 return isTestPass;\r
654 }\r
655 \r
656 /*Wait csirx receive the data */\r
657 while(gFrameCounter !=\r
658 BOARD_DIAG_TEST_NUM_FRAMES)\r
659 {\r
660 if(gFrameReceived)\r
661 {\r
662 /* TODO: Added global variable counter to check the while loop is not optimized */\r
663 gFrameCounter++;\r
664 BoardDiag_CheckPayloadReceived(handle);\r
665 DebugP_log1("Frame - %d received\n" ,\r
666 gTestState.contextIRQcounts[BOARD_DIAG_TEST_CONTEXT].frameEndCodeDetect);\r
667 gFrameReceived = false;\r
668 \r
669 /* Test is considered as failed even if any one of the frame\r
670 received is invalid */\r
671 if(isTestPass != false)\r
672 {\r
673 isTestPass = isTestPass & gTestState.isReceivedPayloadCorrect;\r
674 }\r
675 }\r
676 Osal_delay(1);\r
677 }\r
678 \r
679 if(gFrameCounter != BOARD_DIAG_TEST_NUM_FRAMES)\r
680 {\r
681 DebugP_log0("Number of frames recieved does not match\n");\r
682 isTestPass = false;\r
683 }\r
684 \r
685 BoardDiag_CheckStateError(&isTestPass);\r
686 \r
687 /* disable context */\r
688 errorCode = CSIRX_disableContext(handle, BOARD_DIAG_TEST_CONTEXT);\r
689 if(errorCode != CSIRX_NO_ERROR)\r
690 {\r
691 DebugP_log1("CSIRX_disableContext failed,errorCode = %d\n", errorCode);\r
692 isTestPass = false;\r
693 return isTestPass;\r
694 }\r
695 \r
696 /* disable interface */\r
697 errorCode = CSIRX_disableInterface(handle);\r
698 if(errorCode != CSIRX_NO_ERROR)\r
699 {\r
700 DebugP_log1("CSIRX_disableInterface failed, errorCode = %d\n",\r
701 errorCode);\r
702 isTestPass = false;\r
703 return isTestPass;\r
704 }\r
705 \r
706 /* close instance */\r
707 errorCode = CSIRX_close(handle);\r
708 if(errorCode != CSIRX_NO_ERROR)\r
709 {\r
710 DebugP_log1("CSIRX_close failed, errorCode = %d\n", errorCode);\r
711 isTestPass = false;\r
712 return isTestPass;\r
713 }\r
714 \r
715 return(isTestPass);\r
716 }\r
717 \r
718 /**\r
719 * \brief The function performs the CSIRX Diagnostic\r
720 * test.\r
721 *\r
722 * \return int8_t\r
723 * 0 - in case of success\r
724 * -1 - in case of failure.\r
725 *\r
726 */\r
727 int8_t BoardDiag_CsirxTest()\r
728 {\r
729 uint8_t result;\r
730 /* TPR12_TODO: Update this to menu based after initial testing */\r
731 #if defined (BOARD_DIAG_CSIRX_A_TEST)\r
732 uint8_t instanceId = CSIRX_INST_ID_FIRST;\r
733 #else\r
734 uint8_t instanceId = CSIRX_INST_ID_LAST;\r
735 #endif\r
736 char instName[25];\r
737 \r
738 UART_printf("\n**********************************************\n");\r
739 UART_printf ("* CSI-Rx Test *\n");\r
740 UART_printf ("**********************************************\n");\r
741 \r
742 CSIRX_getInstanceName(instanceId, &instName[0], sizeof(instName));\r
743 \r
744 UART_printf("Receiving data from CSIRX instance #%d: %s\n", instanceId,\r
745 instName);\r
746 \r
747 result = BoardDiag_CsirxTestRun(instanceId);\r
748 if(result != true)\r
749 {\r
750 UART_printf("Failed to receive data from CSIRX instance #%d\n",\r
751 instanceId);\r
752 return -1;\r
753 }\r
754 else\r
755 {\r
756 UART_printf("CSIRX diag test passed\n");\r
757 }\r
758 UART_printf("csirx test finished\n");\r
759 \r
760 return 0;\r
761 \r
762 }\r
763 \r
764 /**\r
765 * \brief CSIRX Diagnostic test main function\r
766 *\r
767 * \return int - CSIRX Diagnostic test status.\r
768 * 0 - in case of success\r
769 * -1 - in case of failure.\r
770 *\r
771 */\r
772 int main (void)\r
773 {\r
774 Board_STATUS status;\r
775 Board_initCfg boardCfg;\r
776 int8_t ret;\r
777 \r
778 #ifdef PDK_RAW_BOOT\r
779 boardCfg = BOARD_INIT_MODULE_CLOCK |\r
780 BOARD_INIT_PINMUX_CONFIG |\r
781 BOARD_INIT_UART_STDIO;\r
782 #else\r
783 boardCfg = BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_UART_STDIO | BOARD_INIT_MODULE_CLOCK;\r
784 #endif\r
785 \r
786 status = Board_init(boardCfg);\r
787 if(status != BOARD_SOK)\r
788 {\r
789 return -1;\r
790 }\r
791 \r
792 ret = BoardDiag_CsirxTest();\r
793 if(ret != 0)\r
794 {\r
795 UART_printf("\nCSIRX Test Failed\n");\r
796 return -1;\r
797 }\r
798 else\r
799 {\r
800 UART_printf("\nCSIRX Test Passed\n");\r
801 }\r
802 \r
803 return 0;\r
804 }\r