1 /******************************************************************************\r
2 * Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com\r
3 *\r
4 * Redistribution and use in source and binary forms, with or without\r
5 * modification, are permitted provided that the following conditions\r
6 * are met:\r
7 *\r
8 * Redistributions of source code must retain the above copyright\r
9 * notice, this list of conditions and the following disclaimer.\r
10 *\r
11 * Redistributions in binary form must reproduce the above copyright\r
12 * notice, this list of conditions and the following disclaimer in the\r
13 * documentation and/or other materials provided with the\r
14 * distribution.\r
15 *\r
16 * Neither the name of Texas Instruments Incorporated nor the names of\r
17 * its contributors may be used to endorse or promote products derived\r
18 * from this software without specific prior written permission.\r
19 *\r
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
31 *\r
32 *****************************************************************************/\r
33 \r
34 #ifndef BOARD_INTERNAL_H_\r
35 #define BOARD_INTERNAL_H_\r
36 \r
37 #ifdef __cplusplus\r
38 extern "C" {\r
39 #endif\r
40 \r
41 /*****************************************************************************\r
42 * Include Files *\r
43 *****************************************************************************/\r
44 #include <ti/csl/csl_types.h>\r
45 #include <ti/csl/cslr_device.h>\r
46 \r
47 #include <ti/drv/i2c/I2C.h>\r
48 #include <ti/drv/i2c/soc/I2C_soc.h>\r
49 \r
50 #include <ti/drv/uart/UART.h>\r
51 #include <ti/drv/uart/UART_stdio.h>\r
52 #include <ti/drv/uart/soc/UART_soc.h>\r
53 \r
54 #include <ti/board/board.h>\r
55 #include <ti/csl/tistdtypes.h>\r
56 #include <stdio.h>\r
57 #include <stdbool.h>\r
58 \r
59 #undef ENABLE_LOGS\r
60 \r
61 #if !defined(BOARD_DEBUG_LOG)\r
62 #if defined(ENABLE_LOGS)\r
63 #define BOARD_DEBUG_LOG UART_printf\r
64 #else\r
65 #define BOARD_DEBUG_LOG(x, ...)\r
66 #endif\r
67 #endif /* #if !defined(BOARD_DEBUG_LOG) */\r
68 \r
69 #define MODE_PIN_MASK (0xFU)\r
70 #define PINMUX_BIT_MASK (0xFFF8FFF0U)\r
71 #define GPIO_PIN_MUX_CFG (0x50007U)\r
72 \r
73 #define BOARD_PADCFG_PMUX_OFFSET (0x4000)\r
74 /* MAIN CTRL pinmux base address */\r
75 #define BOARD_MAIN_PMUX_CTRL (CSL_PADCFG_CTRL0_CFG0_BASE + BOARD_PADCFG_PMUX_OFFSET)\r
76 \r
77 /* WKUP CTRL pinmux base address */\r
78 #define BOARD_WKUP_PMUX_CTRL (CSL_MCU_PADCFG_CTRL0_CFG0_BASE + BOARD_PADCFG_PMUX_OFFSET)\r
79 \r
80 /*****************************************************************************\r
81 * Internal Objects *\r
82 *****************************************************************************/\r
83 extern I2C_config_list I2C_config;\r
84 \r
85 typedef struct Board_I2cObj_s\r
86 {\r
87 I2C_Handle i2cHandle;\r
88 uint8_t i2cDomain;\r
89 uint32_t instNum;\r
90 uint32_t i2cBaseAddr;\r
91 } Board_I2cObj_t;\r
92 \r
93 /****************************************************************************/\r
94 \r
95 #define KICK0_UNLOCK_VAL (0x68EF3490U)\r
96 #define KICK1_UNLOCK_VAL (0xD172BC5AU)\r
97 \r
98 #define BOARD_I2C_PORT_CNT (I2C_HWIP_MAX_CNT)\r
99 \r
100 /*****************************************************************************\r
101 * Function Prototypes *\r
102 *****************************************************************************/\r
103 \r
104 /**\r
105 *\r
106 * \brief Board pinmuxing enable function\r
107 *\r
108 * Enables pinmux for the Maxwell idk board interfaces. Pin mux is done based on the\r
109 * default/primary functionality of the board. Any pins shared by multiple\r
110 * interfaces need to be reconfigured to access the secondary functionality.\r
111 *\r
112 * \return BOARD_SOK in case of success or appropriate error code\r
113 *\r
114 */\r
115 Board_STATUS Board_pinmuxConfig(void);\r
116 \r
117 /**\r
118 *\r
119 * \brief Board PLL initialization function\r
120 *\r
121 * Configures different PLL controller modules. This enables all the PLL\r
122 * controllers on the SoC with default configurations.\r
123 *\r
124 * \return BOARD_SOK in case of success or appropriate error code\r
125 */\r
126 Board_STATUS Board_PLLInit(uint32_t modId, uint32_t clkId, uint64_t clkRate);\r
127 \r
128 /**\r
129 *\r
130 * \brief DDR4 Initialization function\r
131 *\r
132 * Initializes the DDR timing parameters. Sets the DDR timing parameters\r
133 * based in the DDR PLL controller configuration done by the board library.\r
134 * Any changes to DDR PLL requires change to DDR timing. Also supports\r
135 * enabling ECC\r
136 *\r
137 * \return BOARD_SOK in case of success or appropriate error code\r
138 *\r
139 */\r
140 Board_STATUS Board_DDRInit(Bool eccEnable);\r
141 \r
142 /**\r
143 *\r
144 * \brief clock Initialization function\r
145 *\r
146 * Enables different power domains and peripheral clocks of the SoC.\r
147 * Some of the power domains and peripherals will be off by default.\r
148 * Enabling the power domains is mandatory before accessing using\r
149 * board interfaces connected to those peripherals.\r
150 *\r
151 * \return BOARD_SOK in case of success or appropriate error code\r
152 *\r
153 */\r
154 Board_STATUS Board_moduleClockInit(void);\r
155 \r
156 /**\r
157 * \brief Board specific configurations for Gigabit Ethernet PHYs\r
158 *\r
159 * This function takes care of configuring the internal delays for gigabit\r
160 * Ethernet PHY. 2.25ns delay is configured for Rx, and .25ns delay is\r
161 * configured for Tx\r
162 *\r
163 * \return none\r
164 */\r
165 Board_STATUS Board_mcuEthConfig(void);\r
166 \r
167 /**\r
168 * \brief Board specific configurations for ICSS EMAC Ethernet PHYs\r
169 *\r
170 * This function takes care of making several board level configurations\r
171 * required for ICSS EMAC PHY as listed below.\r
172 * - Disabling internal SoC pull up/down for the pins used for strapping\r
173 * - Setting the GPIOs for PHY reset, routing ICSS signals to PHYs,\r
174 * PHY interrupt lines.\r
175 * - Resetting the PHYs for proper address latching\r
176 * - MDIO initialization\r
177 * - MDIO configuration for setting MII mode\r
178 *\r
179 * \return none\r
180 */\r
181 Board_STATUS Board_icssEthConfig(void);\r
182 \r
183 /**\r
184 * \brief This function initializes the default UART instance for use for\r
185 * console operations.\r
186 *\r
187 * \return Board_STATUS in case of success or appropriate error code.\r
188 *\r
189 */\r
190 Board_STATUS Board_uartStdioInit(void);\r
191 \r
192 /**\r
193 * \brief This function is used to de-initialize board UART handles.\r
194 */\r
195 Board_STATUS Board_uartDeInit(void);\r
196 \r
197 /**\r
198 * \brief This function initializes the i2c instance connected to the\r
199 * board Id EEPROM.\r
200 * This function disables the interrupt mode as the Board i2c instance\r
201 * doesn't require interrupt mode and restores back original at the end.\r
202 *\r
203 * \param i2cInst [IN] i2c instance connected to board Id EEPROM and\r
204 * IO expander device.\r
205 *\r
206 * \return Board_STATUS in case of success or appropriate error code.\r
207 *\r
208 */\r
209 Board_STATUS Board_internalInitI2C(uint8_t i2cInst);\r
210 \r
211 /**\r
212 * \brief This function is used to close all the initialized board I2C handles.\r
213 *\r
214 * \return Board_STATUS in case of success or appropriate error code.\r
215 */\r
216 Board_STATUS Board_i2cDeInit(void);\r
217 \r
218 /**\r
219 * \brief This function initializes the i2c instance connected to\r
220 * different control modules on the board\r
221 *\r
222 * This function disables the interrupt mode as the Board i2c instance\r
223 * doesn't require interrupt mode and restores back original at the end.\r
224 *\r
225 * \return Board_STATUS in case of success or appropriate error code.\r
226 *\r
227 */\r
228 Board_STATUS Board_i2cInit(void);\r
229 \r
230 /**\r
231 * \brief This function is to get the i2c handle of the requested\r
232 * instance of the specifed domain\r
233 *\r
234 * \param domainType [IN] Domain of I2C controller\r
235 * BOARD_SOC_DOMAIN_MAIN - Main Domain\r
236 * BOARD_SOC_DOMAIN_WKUP - Wakeup domain\r
237 * BOARD_SOC_DOMAIN_MCU - MCU domain\r
238 *\r
239 * \param i2cInst [IN] I2C instance\r
240 *\r
241 * \return Board_STATUS in case of success or appropriate error code.\r
242 *\r
243 */\r
244 I2C_Handle Board_getI2CHandle(uint8_t domainType,\r
245 uint32_t i2cInst);\r
246 \r
247 /**\r
248 * \brief Unlocks MMR registers\r
249 *\r
250 * \return Board_STATUS\r
251 */\r
252 Board_STATUS Board_unlockMMR(void);\r
253 \r
254 /**\r
255 * \brief Locks MMR registers\r
256 *\r
257 * \return Board_STATUS\r
258 */\r
259 Board_STATUS Board_lockMMR(void);\r
260 \r
261 /**\r
262 * \brief Serdes configurations\r
263 *\r
264 * The function detects the personality boards connected and configures the\r
265 * respective module.\r
266 *\r
267 * \return BOARD_SOK in case of success or appropriate error code\r
268 *\r
269 */\r
270 Board_STATUS Board_serdesCfg(void);\r
271 \r
272 /**\r
273 *\r
274 * \brief Board PLL initialization function\r
275 *\r
276 * Configures different PLL controller modules. This enables all the PLL\r
277 * controllers on the SoC with default configurations.\r
278 *\r
279 * \return BOARD_SOK in case of success or appropriate error code\r
280 */\r
281 Board_STATUS Board_PLLInitAll(void);\r
282 \r
283 /**\r
284 * \brief Sets padconfig register of a pin at given offset\r
285 *\r
286 * Configures whole padconfig register of the pin at given offset\r
287 * with the value in 'muxData'.\r
288 *\r
289 * \param domain [IN] SoC domain for pinmux\r
290 * \n BOARD_SOC_DOMAIN_MAIN - Main domain\r
291 *\r
292 * \param offset [IN] Pad config offset of the pin\r
293 * \param muxData [IN] Value to be written to padconfig register\r
294 *\r
295 * \return BOARD_SOK in case of success or appropriate error code\r
296 *\r
297 */\r
298 Board_STATUS Board_pinmuxSetReg(uint8_t domain,\r
299 uint32_t offset,\r
300 uint32_t muxData);\r
301 \r
302 #ifdef __cplusplus\r
303 }\r
304 #endif /* __cplusplus */\r
305 \r
306 #endif /* BOARD_INTERNAL_H_ */\r