1 /******************************************************************************
2 * Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com
3 *
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20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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32 *****************************************************************************/
34 /**
35 * \brief board_internal.h
36 *
37 * This file contains the unlock register, ethernet related macros definitions
38 * and basic init function prototypes.
39 *
40 */
42 #ifndef BOARD_INTERNAL_H_
43 #define BOARD_INTERNAL_H_
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
49 /* Include files */
50 #include <ti/csl/csl_types.h>
51 #include <ti/csl/cslr_device.h>
52 #include <ti/csl/soc.h>
54 #include <ti/drv/i2c/I2C.h>
55 #include <ti/drv/i2c/soc/I2C_soc.h>
57 #include <ti/drv/uart/UART.h>
58 #include <ti/drv/uart/UART_stdio.h>
59 #include <ti/drv/uart/soc/UART_soc.h>
60 #include <ti/drv/uart/src/v3/uartsci.h>
62 #include <ti/board/board.h>
63 #include <ti/csl/tistdtypes.h>
64 #include <stdio.h>
65 #include <stdbool.h>
67 /* Internal objects */
68 extern I2C_config_list I2C_config;
70 typedef struct Board_I2cObj_s
71 {
72 I2C_Handle i2cHandle;
73 uint8_t i2cDomain;
74 uint32_t instNum;
75 uint32_t i2cBaseAddr;
76 } Board_I2cObj_t;
78 #define BOARD_KICK0_UNLOCK_VAL (0x01234567U)
79 #define BOARD_KICK1_UNLOCK_VAL (0x0FEDCBA8U)
81 #define BOARD_IOMUX_KICK0_UNLOCK_VAL (0x83E70B13U)
82 #define BOARD_IOMUX_KICK1_UNLOCK_VAL (0x95A4F1E0U)
84 /* Domain specific base adress */
85 #define BOARD_MSS_TOPRCM_U_BASE (CSL_MSS_TOPRCM_U_BASE)
86 #define BOARD_MSS_RCM_U_BASE (CSL_MSS_RCM_U_BASE)
87 #define BOARD_MSS_CTRL_U_BASE (CSL_MSS_CTRL_U_BASE)
88 #define BOARD_DSS_RCM_U_BASE (CSL_DSS_RCM_U_BASE)
89 #define BOARD_DSS_CTRL_U_BASE (CSL_DSS_CTRL_U_BASE)
90 #define BOARD_RCSS_RCM_U_BASE (CSL_RCSS_RCM_U_BASE)
91 #define BOARD_RCSS_CTRL_U_BASE (CSL_RCSS_CTRL_U_BASE)
93 /* Unlock kick registers base addresses */
94 #define BOARD_MSS_TOPRCM_LOCK0_KICK0 (CSL_MSS_TOPRCM_LOCK0_KICK0)
95 #define BOARD_MSS_TOPRCM_LOCK0_KICK1 (CSL_MSS_TOPRCM_LOCK0_KICK1)
97 #define BOARD_MSS_RCM_LOCK0_KICK0 (CSL_MSS_RCM_LOCK0_KICK0)
98 #define BOARD_MSS_RCM_LOCK0_KICK1 (CSL_MSS_RCM_LOCK0_KICK1)
99 #define BOARD_MSS_CTRL_LOCK0_KICK0 (CSL_MSS_CTRL_LOCK0_KICK0)
100 #define BOARD_MSS_CTRL_LOCK0_KICK1 (CSL_MSS_CTRL_LOCK0_KICK1)
102 #define BOARD_DSS_RCM_LOCK0_KICK0 (CSL_DSS_RCM_LOCK0_KICK0)
103 #define BOARD_DSS_RCM_LOCK0_KICK1 (CSL_DSS_RCM_LOCK0_KICK1)
104 #define BOARD_DSS_CTRL_LOCK0_KICK0 (CSL_DSS_CTRL_LOCK0_KICK0)
105 #define BOARD_DSS_CTRL_LOCK0_KICK1 (CSL_DSS_CTRL_LOCK0_KICK1)
107 #define BOARD_RCSS_RCM_LOCK0_KICK0 (CSL_RCSS_RCM_LOCK0_KICK0)
108 #define BOARD_RCSS_RCM_LOCK0_KICK1 (CSL_RCSS_RCM_LOCK0_KICK1)
109 #define BOARD_RCSS_CTRL_LOCK0_KICK0 (CSL_RCSS_CTRL_LOCK0_KICK0)
110 #define BOARD_RCSS_CTRL_LOCK0_KICK1 (CSL_RCSS_CTRL_LOCK0_KICK1)
112 #define BOARD_IOMUX_CFG_LOCK0_KICK0 (CSL_MSS_IOMUX_IOCFGKICK0)
113 #define BOARD_IOMUX_CFG_LOCK0_KICK1 (CSL_MSS_IOMUX_IOCFGKICK1)
115 /* AWR294X_EVM MCU and DSS domain clock frequencies */
116 #define BOARD_MCU_PLL_CLK_FREQ (400000000U)
117 #define BOARD_DSS_PLL_CLK_FREQ (450000000U)
119 #define BOARD_I2C_PORT_CNT (CSL_MSS_I2C_PER_CNT)
121 /* Ethernet module base address */
122 #define BOARD_ETH_BASE_ADDR (CSL_MSS_CPSW_U_BASE)
123 /* Etherent control registers */
124 #define BOARD_CPSW_CTRL_REG_ADDR (CSL_MSS_CTRL_U_BASE + 0x16C)
126 #define BOARD_ETH_PHY_SPEED_MASK (0x2040U)
127 #define BOARD_ETH_PHY_AUTONEG_MASK (0x1000U)
128 #define BOARD_ETH_PHY_SPEED_1000MPBS (0x0040U)
129 #define BOARD_ETH_PHY_SPEED_100MPBS (0x2000U)
131 #define BOARD_ETHPHY_REGCR_REG_ADDR (0xDU)
132 #define BOARD_ETHPHY_REGCR_ADDR_EN (0x1FU)
133 #define BOARD_ETHPHY_REGCR_DATA_EN (0x401FU)
134 #define BOARD_ETHPHY_ADDAR_REG_ADDR (0xEU)
136 #define BOARD_ETHPHY_LEDCR1_REG_ADDR (0x18U)
138 #define BOARD_ETHPHY_FLD_THRESH_REG_ADDR (0x2EU)
140 #define BOARD_ETHPHY_RGMIICTL_REG_ADDR (0x32U)
141 #define BOARD_ETHPHY_RGMIICTL_CLKDELAY_MASK (0x3U)
142 #define BOARD_ETHPHY_RGMIICTL_TXDELAY_EN (0x2U)
143 #define BOARD_ETHPHY_RGMIICTL_RXDELAY_EN (0x1U)
145 #define BOARD_ETHPHY_STRAP_STS1_REG_ADDR (0x6EU)
146 #define BOARD_ETHPHY_STRAP_STS2_REG_ADDR (0x6FU)
148 #define BOARD_ETHPHY_RGMIIDCTL_REG_ADDR (0x86U)
150 #define BOARD_ETHPHY_GPIO_MUX_CTRL2_REG_ADDR (0x172U)
152 #define BOARD_EEPROM_MEM_ACCESS_DELAY (10U)
154 /*****************************************************************************
155 * Function Prototypes *
156 *****************************************************************************/
158 /**
159 *
160 * \brief Board pinmuxing enable function
161 *
162 * Enables pinmux for the Maxwell idk board interfaces. Pin mux is done based
163 * on the default/primary functionality of the board. Any pins shared by
164 * multiple interfaces need to be reconfigured to access the secondary
165 * functionality.
166 *
167 * \return BOARD_SOK in case of success or appropriate error code
168 *
169 */
170 Board_STATUS Board_pinmuxConfig(void);
172 /**
173 *
174 * \brief Board PLL initialization function
175 *
176 * Configures different PLL controller modules. This enables all the PLL
177 * controllers on the SoC with default configurations.
178 *
179 * \return BOARD_SOK in case of success or appropriate error code
180 */
181 Board_STATUS Board_PLLInit(uint32_t modId, uint32_t clkId, uint64_t clkRate);
183 /**
184 *
185 * \brief clock Initialization function
186 *
187 * Enables different power domains and peripheral clocks of the SoC.
188 * Some of the power domains and peripherals will be off by default.
189 * Enabling the power domains is mandatory before accessing using
190 * board interfaces connected to those peripherals.
191 *
192 * \return BOARD_SOK in case of success or appropriate error code
193 *
194 */
195 Board_STATUS Board_moduleClockInit(void);
197 /**
198 * \brief Sets the Ethernet subsytem board specific configurations
199 *
200 * \param mode [IN] Mode selection for the specified port number
201 * 001 - RMII
202 * 010 - RGMII
203 * \return none
204 */
205 Board_STATUS Board_ethConfig(uint8_t mode);
207 /**
208 * \brief Board specific configurations for Ethernet PHY
209 *
210 * \return none
211 */
212 Board_STATUS Board_ethPhyConfig(void);
214 /**
215 * \brief This function initializes the default UART instance for use for
216 * console operations.
217 *
218 * \return Board_STATUS in case of success or appropriate error code.
219 *
220 */
221 Board_STATUS Board_uartStdioInit(void);
223 /**
224 * \brief This function is to get the i2c handle of the requested
225 * instance of the specifed domain
226 *
227 * \param domainType [IN] Domain of I2C controller
228 * BOARD_SOC_DOMAIN_MAIN - Main Domain
229 * BOARD_SOC_DOMAIN_WKUP - Wakeup domain
230 * BOARD_SOC_DOMAIN_MCU - MCU domain
231 *
232 * \param i2cInst [IN] I2C instance
233 *
234 * \return Board_STATUS in case of success or appropriate error code.
235 *
236 */
237 I2C_Handle Board_getI2CHandle(uint8_t domainType,
238 uint32_t i2cInst);
240 /**
241 * \brief Unlocks MMR registers
242 *
243 * \return Board_STATUS
244 */
245 Board_STATUS Board_unlockMMR(void);
247 /**
248 *
249 * \brief PLL Initialization function
250 *
251 * Initialize all system PLLs .
252 *
253 * \return BOARD_SOK in case of success or appropriate error code
254 *
255 */
256 Board_STATUS Board_PLLInitAll(void);
258 /**
259 * \brief This function is used to de-initialize board UART handles.
260 */
261 Board_STATUS Board_uartDeInit(void);
263 /**
264 * \brief This function initializes the i2c instance set using
265 * Board_setI2cInitConfig API.
266 *
267 * \return Board_STATUS in case of success or appropriate error code.
268 *
269 */
270 Board_STATUS Board_i2cInit(void);
272 /**
273 * \brief This function is used to close the initialized board I2C handle.
274 */
275 Board_STATUS Board_i2cDeInit(void);
277 #ifdef __cplusplus
278 }
279 #endif /* __cplusplus */
281 #endif /* BOARD_INTERNAL_H_ */