1 /******************************************************************************\r
2 * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com\r
3 *\r
4 * Redistribution and use in source and binary forms, with or without\r
5 * modification, are permitted provided that the following conditions\r
6 * are met:\r
7 *\r
8 * Redistributions of source code must retain the above copyright\r
9 * notice, this list of conditions and the following disclaimer.\r
10 *\r
11 * Redistributions in binary form must reproduce the above copyright\r
12 * notice, this list of conditions and the following disclaimer in the\r
13 * documentation and/or other materials provided with the\r
14 * distribution.\r
15 *\r
16 * Neither the name of Texas Instruments Incorporated nor the names of\r
17 * its contributors may be used to endorse or promote products derived\r
18 * from this software without specific prior written permission.\r
19 *\r
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
31 *\r
32 *****************************************************************************/\r
33 \r
34 #ifndef PINMUX_H\r
35 #define PINMUX_H\r
36 \r
37 #ifdef __cplusplus\r
38 extern "C" {\r
39 #endif\r
40 \r
41 /* ========================================================================== */\r
42 /* Macros & Typedefs */\r
43 /* ========================================================================== */\r
44 \r
45 /* Below boundary check macros are not avaialable for C++ compilers */\r
46 #ifdef __cplusplus\r
47 \r
48 #ifndef INT_MAX\r
49 #define INT_MAX (0x7FFFFFFF)\r
50 #endif\r
51 \r
52 #ifndef UINT32_MAX\r
53 #define UINT32_MAX (0xFFFFFFFFU)\r
54 #endif\r
55 \r
56 #endif\r
57 \r
58 /**\r
59 * \brief Invalid Frequency\r
60 */\r
61 #define CHIPDB_INVALID_FREQUENCY (uint32_t)0x0U\r
62 \r
63 /**\r
64 * \brief Invalid Temperature\r
65 */\r
66 #define CHIPDB_INVALID_TEMPERATURE (int32_t)INT_MAX\r
67 \r
68 /**\r
69 * \brief Invalid Address\r
70 */\r
71 #define CHIPDB_INVALID_ADDRESS (uint32_t)UINT32_MAX\r
72 \r
73 /**\r
74 * \brief Invalid Interrupt Number\r
75 */\r
76 #define CHIPDB_INVALID_INTERRUPT_NUM (UINT32_MAX)\r
77 \r
78 /**\r
79 * \brief Invalid instance Number\r
80 */\r
81 #define CHIPDB_INVALID_INSTANCE_NUM (-1)\r
82 \r
83 /**\r
84 * \brief Invalid pinmux pin\r
85 */\r
86 #define PINMUX_INVALID_PIN (-1)\r
87 \r
88 typedef enum\r
89 {\r
90 CHIPDB_MOD_ID_PRU_ICSS,\r
91 CHIPDB_MOD_ID_PWMSS,\r
92 CHIPDB_MOD_ID_GPIO,\r
93 CHIPDB_MOD_ID_UART,\r
94 CHIPDB_MOD_ID_PCIE,\r
95 CHIPDB_MOD_ID_MMCSD,\r
96 CHIPDB_MOD_ID_DEBUGSS,\r
97 CHIPDB_MOD_ID_EMAC,\r
98 CHIPDB_MOD_ID_CPSW,\r
99 CHIPDB_MOD_ID_DDR,\r
100 CHIPDB_MOD_ID_MCSPI,\r
101 CHIPDB_MOD_ID_SYSTEM,\r
102 CHIPDB_MOD_ID_I2C,\r
103 CHIPDB_MOD_ID_QSPI,\r
104 CHIPDB_MOD_ID_INVALID = UINT32_MAX\r
105 } chipdbModuleID_t;\r
106 \r
107 /* ========================================================================== */\r
108 /* Structures and Enums */\r
109 /* ========================================================================== */\r
110 \r
111 /**\r
112 * \brief Structure defining the pin configuration parameters.\r
113 *\r
114 */\r
115 typedef struct pinmuxPerCfg\r
116 {\r
117 int16_t pinOffset;\r
118 /**< Register offset for configuring the pin */\r
119 int16_t optParam;\r
120 /**< Optional param to hold the peripheral specific data */\r
121 int32_t pinSettings;\r
122 /**< Value to be configured,\r
123 - Active mode configurations like Mux mode, pull config, Rx enable &\r
124 slew rate\r
125 - Sleep mode configurations like Deep sleep enable, o/p value &\r
126 pull config\r
127 - Wake up enable/disable\r
128 Refer TRM section "7.2.1 Pad Control Registers" for more details.\r
129 */\r
130 }pinmuxPerCfg_t;\r
131 \r
132 /**\r
133 * \brief Structure defining the pin configuration for different instances of\r
134 * a module.\r
135 */\r
136 typedef struct pinmuxModuleCfg\r
137 {\r
138 int16_t modInstNum;\r
139 /**< Instance number of the ip */\r
140 int16_t doPinConfig;\r
141 /**< Flag indicating whether this instance has to be configured. This flag\r
142 can be altered with separate API (PinMuxConfigEnable()).\r
143 Default configuration will be set to TRUE, but can be altered for\r
144 different scenarios (like power management). */\r
145 pinmuxPerCfg_t* instPins;\r
146 /**< Pointer to list of pins corresponding to this instance */\r
147 }pinmuxModuleCfg_t;\r
148 \r
149 /**\r
150 * \brief Structure defining the pin configuration of a board.\r
151 */\r
152 typedef struct pinmuxBoardCfg\r
153 {\r
154 chipdbModuleID_t moduleId;\r
155 /**< Module ID */\r
156 pinmuxModuleCfg_t* modulePinCfg;\r
157 /**< Pin config info of a module: #pinmuxModuleCfg_t */\r
158 }pinmuxBoardCfg_t;\r
159 \r
160 #ifdef __cplusplus\r
161 }\r
162 #endif\r
163 \r
164 #endif\r