1 @******************************************************************************
2 @
3 @ sbl_init.S - Init code routines
4 @
5 @******************************************************************************
6 @
7 @ Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
8 @
9 @
10 @ Redistribution and use in source and binary forms, with or without
11 @ modification, are permitted provided that the following conditions
12 @ are met:
13 @
14 @ Redistributions of source code must retain the above copyright
15 @ notice, this list of conditions and the following disclaimer.
16 @
17 @ Redistributions in binary form must reproduce the above copyright
18 @ notice, this list of conditions and the following disclaimer in the
19 @ documentation and/or other materials provided with the
20 @ distribution.
21 @
22 @ Neither the name of Texas Instruments Incorporated nor the names of
23 @ its contributors may be used to endorse or promote products derived
24 @ from this software without specific prior written permission.
25 @
26 @ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 @ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 @ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 @ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 @ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 @ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 @ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 @ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 @ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 @ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 @ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 @
38 @******************************************************************************
40 @****************************** Global Symbols*********************************
41 .global Entry
42 .global _stack
43 .global _bss_start
44 .global _bss_end
45 .global start_boot
47 @************************ Internal Definitions ********************************
48 @
49 @ Define the stack sizes for different modes. The user/system mode will use
50 @ the rest of the total stack size
51 @
52 .set UND_STACK_SIZE, 0x8
53 .set ABT_STACK_SIZE, 0x8
54 .set FIQ_STACK_SIZE, 0x8
55 .set IRQ_STACK_SIZE, 0x1000
56 .set SVC_STACK_SIZE, 0x100
58 @
59 @ to set the mode bits in CPSR for different modes
60 @
61 .set MODE_USR, 0x10
62 .set MODE_FIQ, 0x11
63 .set MODE_IRQ, 0x12
64 .set MODE_SVC, 0x13
65 .set MODE_ABT, 0x17
66 .set MODE_UND, 0x1B
67 .set MODE_SYS, 0x1F
69 .equ I_F_BIT, 0xC0
70 .equ MASK_SVC_NUM, 0x1
72 @**************************** Code Seection ***********************************
73 .text
75 @
76 @ This code is assembled for ARM instructions
77 @
78 .code 32
80 @******************************************************************************
81 @
82 @******************************************************************************
83 @
84 @ The reset handler in PDK is named as 'Entry'.
85 @ The reset handler sets up the stack pointers for all the modes. The FIQ and
86 @ IRQ shall be disabled during this. Then clear the BSS sections and finally
87 @ switch to the function calling the main() function.
88 @
89 Entry:
90 @
91 @ Set up the Stack for Undefined mode
92 @
93 LDR r0, =_stack @ Read the stack address
94 MSR cpsr_c, #MODE_UND|I_F_BIT @ switch to undef mode
95 MOV sp,r0 @ write the stack pointer
96 SUB r0, r0, #UND_STACK_SIZE @ give stack space
97 @
98 @ Set up the Stack for abort mode
99 @
100 MSR cpsr_c, #MODE_ABT|I_F_BIT @ Change to abort mode
101 MOV sp, r0 @ write the stack pointer
102 SUB r0,r0, #ABT_STACK_SIZE @ give stack space
103 @
104 @ Set up the Stack for FIQ mode
105 @
106 MSR cpsr_c, #MODE_FIQ|I_F_BIT @ change to FIQ mode
107 MOV sp,r0 @ write the stack pointer
108 SUB r0,r0, #FIQ_STACK_SIZE @ give stack space
109 @
110 @ Set up the Stack for IRQ mode
111 @
112 MSR cpsr_c, #MODE_IRQ|I_F_BIT @ change to IRQ mode
113 MOV sp,r0 @ write the stack pointer
114 SUB r0,r0, #IRQ_STACK_SIZE @ give stack space
116 @
117 @ Set up the Stack for SVC mode
118 @
119 MSR cpsr_c, #MODE_SVC|I_F_BIT @ change to SVC mode
120 MOV sp,r0 @ write the stack pointer
121 SUB r0,r0, #SVC_STACK_SIZE @ give stack space
123 @ Set up the Stack for User/System mode
124 @
125 MSR cpsr_c, #MODE_SYS|I_F_BIT @ change to system mode
126 MOV sp,r0 @ write the stack pointer
128 @ Invalidate and Enable Branch Prediction
129 MOV r0, #0
130 MCR p15, #0, r0, c7, c5, #6
131 ISB
132 MRC p15, #0, r0, c1, c0, #0
133 ORR r0, r0, #0x00000800
134 MCR p15, #0, r0, c1, c0, #0
136 @
137 @ Clear the BSS section here
138 @
139 Clear_Bss_Section:
141 LDR r0, =_bss_start @ Start address of BSS
142 LDR r1, =(_bss_end - 0x04) @ End address of BSS
143 MOV r2, #0
144 Loop:
145 STR r2, [r0], #4 @ Clear one word in BSS
146 CMP r0, r1
147 BLE Loop @ Clear till BSS end
149 @
150 @ Enter the start_boot function. The execution still happens in system mode.
151 @
152 Enter_main:
153 LDR r10,=main
154 MOV lr,pc @ Dummy return from start_boot
155 BX r10 @ Branch to start_boot
156 SUB pc, pc, #0x08 @ looping
158 @
159 @ Go to infinite loop.
160 @
161 loop0:
162 B loop0
164 @
165 @ End of the file
166 @
167 .end