1 /**
2 * \file sbl_rprc.h
3 *
4 * \brief This file contains function prototypes of RPRC image parse functions.
5 *
6 */
8 /*
9 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the
21 * distribution.
22 *
23 * Neither the name of Texas Instruments Incorporated nor the names of
24 * its contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 */
41 #ifndef SBL_RPRC_H_
42 #define SBL_RPRC_H_
44 /* ========================================================================== */
45 /* Include Files */
46 /* ========================================================================== */
47 #include <ti/drv/uart/UART_stdio.h>
48 #include <ti/csl/cslr_device.h>
49 #include <ti/csl/arch/csl_arch.h>
50 #include <soc/sbl_soc.h>
51 #include <stdio.h>
53 #if defined(SOC_AM65XX) || defined (SOC_J721E)
54 #include "sbl_log.h"
55 #include "sbl_soc_cfg.h"
56 #include <ti/board/board.h>
57 #include <ti/drv/pm/include/pm_types.h>
58 #include <ti/drv/pm/include/pmlib_clkrate.h>
59 #endif
61 #ifdef __cplusplus
62 extern "C"
63 {
64 #endif
66 /* ========================================================================== */
67 /* Macros & Typedefs */
68 /* ========================================================================== */
69 /* Magic numbers for gforge and sourceforge */
70 #define MAGIC_NUM_GF (0xA1ACED00)
71 #define MAGIC_NUM_SF (0x55424CBB)
73 /* Magic number and tokens for RPRC format */
74 #define RPRC_MAGIC_NUMBER 0x43525052
75 #define RPRC_RESOURCE 0
76 #define RPRC_BOOTADDR 5
78 #define MAX_INPUT_FILES 10
79 #define META_HDR_MAGIC_STR 0x5254534D /* MSTR in ascii */
80 #define META_HDR_MAGIC_END 0x444E454D /* MEND in ascii */
82 #if !defined(OMAPL137_BUILD)
83 #define SOC_OCMC_RAM1_SIZE ((uint32_t) 0x80000) /*OCMC1 512KB*/
84 #define SOC_OCMC_RAM2_SIZE ((uint32_t) 0x100000) /*OCMC2 1MB */
85 #define SOC_OCMC_RAM3_SIZE ((uint32_t) 0x100000) /*OCMC3 1MB */
87 #define MPU_IPU1_ROM (CSL_IPU_IPU1_TARGET_REGS)
89 #define MPU_IPU1_RAM (CSL_IPU_IPU1_TARGET_REGS + \
90 (uint32_t) 0x20000)
92 #define MPU_IPU2_ROM (CSL_IPU_IPU1_ROM_REGS)
94 #define MPU_IPU2_RAM (CSL_IPU_IPU1_ROM_REGS + \
95 (uint32_t) 0x20000)
97 #define MPU_DSP1_L2_RAM (0x40800000)
98 #define MPU_DSP1_L1P_CACHE (0x40E00000)
99 #define MPU_DSP1_L1D_CACHE (0x40F00000)
100 #define MPU_DSP2_L2_RAM (0x41000000)
101 #define MPU_DSP2_L1P_CACHE (0x41600000)
102 #define MPU_DSP2_L1D_CACHE (0x41700000)
104 #if !defined(SOC_AM574x)
105 #define SOC_DSP_L2_BASE (0x800000)
106 #define SOC_DSP_L1P_BASE (0xe00000)
107 #define SOC_DSP_L1D_BASE (0xf00000)
108 #endif
109 #endif
111 /* ========================================================================== */
112 /* Structures and Enums */
113 /* ========================================================================== */
115 typedef struct rprcFileHeader {
116 uint32_t magic;
117 uint32_t entry;
118 uint32_t rsvd_addr;
119 uint32_t SectionCount;
120 uint32_t version;
121 } rprcFileHeader_t;
123 typedef struct rprcSectionHeader {
124 uint32_t addr;
125 uint32_t rsvd_addr;
126 uint32_t size;
127 uint32_t rsvdCrc;
128 uint32_t rsvd;
129 } rprcSectionHeader_t;
131 typedef struct meta_header_start
132 {
133 uint32_t magic_str;
134 uint32_t num_files;
135 uint32_t dev_id;
136 uint32_t rsvd;
137 }meta_header_start_t;
139 typedef struct meta_header_core
140 {
141 uint32_t core_id;
142 uint32_t image_offset;
143 }meta_header_core_t;
145 typedef struct meta_header_end
146 {
147 uint32_t rsvd;
148 uint32_t magic_string_end;
149 }meta_header_end_t;
151 /* ========================================================================== */
152 /* Function Declarations */
153 /* ========================================================================== */
154 /**
155 * \brief SBL_RprcImageParse function parse the RPRC executable image.
156 * Copies individual section into destination location
157 *
158 * \param[in] srcAddr - Pointer RPRC image
159 * \param[out] entryPoint - CPU entry point address
160 * \param[in] CoreId - CPU ID to identify the CPU core
161 *
162 *
163 * \return uint32_t: Status (success or failure)
164 */
165 static int32_t SBL_RprcImageParse(void *srcAddr, uint32_t *entryPoint,
166 int32_t CoreId);
168 /**
169 * \brief SBL_BootCore function stores the CPU entry location into
170 * global pointer.
171 *
172 * \param[in] entry - CPU Entry location
173 * \param[in] entryPoint - CPU ID
174 *
175 * \return none
176 */
177 void SBL_BootCore(uint32_t entry, uint32_t CoreID, sblEntryPoint_t *pAppEntry);
179 uint32_t GetDeviceId(void);
181 #ifdef __cplusplus
182 }
183 #endif
185 #endif /*SBL_RPRC_PARSE_H_*/