1 ;
2 ; TEXAS INSTRUMENTS TEXT FILE LICENSE
3 ;
4 ; Copyright (c) 2018-2019 Texas Instruments Incorporated
5 ;
6 ; All rights reserved not granted herein.
7 ;
8 ; Limited License.
9 ;
10 ; Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
11 ; license under copyrights and patents it now or hereafter owns or controls to
12 ; make, have made, use, import, offer to sell and sell ("Utilize") this software
13 ; subject to the terms herein. With respect to the foregoing patent license,
14 ; such license is granted solely to the extent that any such patent is necessary
15 ; to Utilize the software alone. The patent license shall not apply to any
16 ; combinations which include this software, other than combinations with devices
17 ; manufactured by or for TI (“TI Devices”). No hardware patent is licensed hereunder.
18 ;
19 ; Redistributions must preserve existing copyright notices and reproduce this license
20 ; (including the above copyright notice and the disclaimer and (if applicable) source
21 ; code license limitations below) in the documentation and/or other materials provided
22 ; with the distribution.
23 ;
24 ; Redistribution and use in binary form, without modification, are permitted provided
25 ; that the following conditions are met:
26 ; No reverse engineering, decompilation, or disassembly of this software is
27 ; permitted with respect to any software provided in binary form.
28 ; Any redistribution and use are licensed by TI for use only with TI Devices.
29 ; Nothing shall obligate TI to provide you with source code for the software
30 ; licensed and provided to you in object code.
31 ;
32 ; If software source code is provided to you, modification and redistribution of the
33 ; source code are permitted provided that the following conditions are met:
34 ; Any redistribution and use of the source code, including any resulting derivative
35 ; works, are licensed by TI for use only with TI Devices.
36 ; Any redistribution and use of any object code compiled from the source code
37 ; and any resulting derivative works, are licensed by TI for use only with TI Devices.
38 ;
39 ; Neither the name of Texas Instruments Incorporated nor the names of its suppliers
40 ; may be used to endorse or promote products derived from this software without
41 ; specific prior written permission.
42 ;
43 ; DISCLAIMER.
44 ;
45 ; THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED
46 ; WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
47 ; AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S
48 ; LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
50 ; GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
51 ; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
53 ; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55 ;---------------------------
56 ;file: regalias.h
57 ;----------------------------
59 ;==========================================================================
60 Struct_RXTASK .struct
61 pq_cur .ushort ;
62 res1 .ubyte ;
63 res2 .ubyte ;
64 vlanc .uint ;
65 ; state aux
66 aux_flags .ubyte ;
67 priority .ubyte ;0-7
68 dcs .ubyte ;ipc contol
69 res3 .ubyte ;spare1
70 ; state info
71 def_flow .ushort ;base flow for port
72 state_flags .ubyte ;
73 port_state .ubyte ;
74 .endstruct ;Struct_RXTASK
76 RxRegs .sassign r20, Struct_RXTASK ; r20-r23
78 ; aux flags definitions
79 f_fh .set 0 ;half of rx fifo we are working in
80 f_vstrip .set 1 ;hard strip of vlan tag needed
81 f_vadd .set 2 ;hard add of vlan tag needed
82 f_untag .set 3 ;set if pkt arrived un-tagged so we are running with "virtual internal tag"
83 f_dcpp .set 4
84 f_b1_seen .set 5
85 ; info flags
87 f_vlan .set 0 ;vlan enabled
88 f_unitohost .set 1 ;ukn unicast to host (switch)
89 f_promiscuous .set 2 ;promiscuous mode (mac)
90 f_m_promiscuous .set 3 ;mcast promiscuous (mac)
91 f_preemptive .set 4 ;preemption active
92 f_prm .set 5 ;priority remap
95 ;==========================================================================
96 Struct_TXTASK .struct
97 res .ushort
98 ds_flags .ushort ;descriptor info
99 stash_ds_flags .ushort
100 stash_tx_len .ushort
101 pp_afs_tx .ubyte ;cnt of bytes sent so far
102 pp_afs_rem .ubyte ;addFragSz of remote (64-256)
103 pp_ppok .ubyte ;flags
104 pp_count .ubyte ;[256] counter of preemptions
105 .endstruct ;Struct_TXTASK
107 f_pp_active .set 0 ;preemption featue active on this port
108 f_pp_enufsent .set 1 ;enough bytes sent
109 f_pp_enufleft .set 2 ;enough bytes remain
110 PPOK .set 0x7
112 TxRegs .sassign r21, Struct_TXTASK
114 ;==========================================================================
115 ;---BG TASK
116 ;r0 temp
117 ;r1 temp
118 ;r2-r9 various
119 ;r10 - r19
121 Struct_BGTASK .struct
122 bg_cnt .uint ; BG loop counter
123 psi2h_active .ubyte ; 1 - active, 0 - idle
124 res9 .ubyte ;
125 len2host .ushort ;
126 borg_limit .ushort ;
127 len_orig .ushort ;
128 .endstruct ;Struct_BGTASK
130 BgRegs .sassign r20, Struct_BGTASK
132 ;==========================================================================
133 Struct_GLOBAL .struct
134 rx .union
135 x .uint
136 s .struct
137 fl_n_state .ushort
138 pkt_len .ushort
139 .endstruct
140 b .struct
141 flags .ubyte
142 state .ubyte
143 pkt_len .ushort
144 .endstruct
145 .endunion ;rx
147 scratch .uint
149 tx .union
150 x .uint
151 b .struct
152 state .ubyte
153 flags .ubyte
154 len .ushort
155 .endstruct ;b
156 .endunion ;tx
158 pkt_cnt .union
159 x .uint
160 w .struct
161 rx .ushort
162 tx .ushort
163 .endstruct ;w
164 .endunion ;pkt_cnt
166 snf .union ; psi store and forward
167 x .uint
168 b .struct
169 wr_cur .ubyte ; current write slot
170 wr_orig .ubyte ; original write slot
171 rd_cur .ubyte ; current read slot
172 dbg_cnt .ubyte
173 .endstruct
174 .endunion ;snf
176 psiq .union
177 x .uint
178 b .struct
179 head .ubyte
180 tail .ubyte
181 num_elem .ubyte
182 res .ubyte
183 .endstruct ;b
184 .endunion ; psiq
185 .endstruct ;Struct_GLOBAL
187 GRegs .sassign r24, Struct_GLOBAL
189 ;RX flags
190 f_tohost .set 0
191 f_rx_sof .set 7
193 ;TX states
194 TX_S_IDLE .set 0
195 TX_S_ACTIVE .set 1
196 TX_S_ERR .set 2
197 TX_S_W_EOF .set 3
198 ;TX_S_W_CEOF .set 3
199 TX_S_W_PEOF .set 4
200 ;TX_S_DC .set 5
201 ;TX_S_CUT .set 6
202 TX_S_LOOP .set 7
204 ; TX flags
205 ;f_tx_spare0 .set 0
206 f_tx_stash .set 1 ;if set then there is a preempted packet present in stash
207 f_tx_hold .set 2 ;set if hold active
208 f_tx_efq .set 3 ;express frame is queued! (from portq)
209 f_tx_efqd .set 4 ;express frame is queued! (from DC queue)
210 f_next_dma .set 5 ;dma to check next (non PSA=ping/pong case)
213 ;==========================================================================
214 Struct_PktCtx .struct
215 ; -0-
216 ippc_flags .ubyte
217 ippc_forward .ubyte
218 ippc_totlen .ushort ;expected length of packet
219 ; -1-
220 ippc_curlen .ushort ;current length of pkt
221 ippc_res .ubyte ;resource (queue number)
222 ippc_es .ubyte ;extra state (details on what we might stall on)
223 ; -2-
224 he_flags .ubyte ;seebelow
225 ;bits 0-3: 1 => thread x uses rate limiter
226 ;bits 4: spare
227 ;bit 6: Shutting_down (clear out any ongoing/stalled transfers)
228 ;bit 7: PSI DOWN (no host egress)
229 he_dq01 .ubyte ;default port queues for threads 0 (high nibble), 1
230 he_dq23 .ubyte ; "" for threads 2 (high nibble), 3
231 he_spare .ubyte
232 ; -3 & 4 -
233 ippx_ptr0 .uint ;buffer pointer0 - this slice
234 ippx_ptr1 .uint ;buffer pointer1 - other slice
236 .endstruct
238 ;;r_pix2
239 ; .if $isdefed("HE_CS_SUPPORT") ;not in pg1.0
240 ; .asg r_pix2, ippx_cw2 ;control word2
241 ; .asg b3, cs_loc ;offset to where csum should be placed (should contain partial cs already (1 relative)
242 ; .asg b2, cs_start ;offset where to start checksum (1 relative)
243 ; .asg t15, cs_inv ;if st then 0 cs qqill eb inverted and sent as 0xffff
244 ; .asg w0, cs_bc ; bytes to checksum (>0 => do checksum so test this to see if checksum needed
245 ; .endif
247 ; Struct_RCtx is alias of the Struct_PktCtx and used
248 ; only to save or restore some of the struct registers
249 Struct_RCtx .struct
250 pix0 .uint
251 pix1 .uint
252 pix2 .uint
253 pix3 .uint
254 pix4 .uint
255 .endstruct
257 Ctx .sassign R20, Struct_PktCtx
258 RCtx .sassign R20, Struct_RCtx
260 f_rts .set 7 ;request egress timestamp
261 f_crcinpkt .set 6 ;if set, crc is already included in packet so hw shouldn't add
262 f_vadd2 .set 5 ;if set, vlan tag needs to be added
263 f_vrem2 .set 4 ;if set, vlan tag needs to be removed
264 f_cs .set 3 ;checksum needed (see ippc_cw2)
265 f_eop .set 2 ;eop seen
267 f_ippc_spare0 .set 0 ;to line up with forward macro 'res' format
268 f_port0 .set 1 ;egress port 0
269 f_port1 .set 2 ;egress port 1
270 f_is_unicast .set 3
271 f_is_broadcast .set 4
272 f_is_multicast .set 5
273 f_is_express .set 6 ;future
275 f_es_b0 .set 0 ;buffer for this slice
276 f_es_b1 .set 1 ;buffer for other slice
277 f_es_q0 .set 2 ;queue slot for this slice
278 f_es_q1 .set 3 ;queue slot for the other slice
280 HE_SPARE .set 4
281 HE_SHUT .set 6 ;
282 HE_DOWN .set 7 ;no host egress
284 ; for switch we have our and other ports
285 .if $isdefed("SLICE0")
286 our_port .set 1
287 other_port .set 2
288 .else
289 our_port .set 2
290 other_port .set 1
291 .endif
293 ;==========================================================================
295 ;--- Tasks:TASK1(block0), RX_TASK4 (eof)
296 ; --highest priority
297 .asg r14, R_PSI_FLAGS ;overlay w/scratch4
298 .asg r15, R_TS_HI
299 .asg r16, R_TS_LO
300 .asg r16, R_BASIC_F ;overlay w/ TS_LO
301 .asg r17, R_CLASSI ;overlay
302 .asg r21, R_RX_STATE_INFO
303 .asg r22, R_RX_STATE
305 ;==========================================================================
306 Struct_RTU_GLOBAL .struct
307 ;-1-
308 ret_addr .ushort
309 res1 .ushort
310 ;-2-
311 StallMask .ubyte
312 ActThrdNum .ubyte
313 StallReason .ubyte
314 ResLock .ubyte
315 ;-3-
316 pqmap .ubyte ;bit i=1 => queue i has something
317 state .ubyte
318 flags .ushort
319 ;-4-
320 qmask .ubyte ;mask of queues to check
321 qmask_old .ubyte ;preserved queue mask
322 spare .ubyte
323 seq_num .ubyte ; save seq number for mgr packet
324 ;-5-
325 save1 .ubyte ;
326 save2 .ubyte ;
327 save3 .ubyte ;
328 save4 .ubyte ;
330 .endstruct ;Struct_RTU_GLOBAL
332 f_dmau .set 0 ; next dma unit
333 f_hold .set 1 ; hold set=> means only queues HOLDQ mask will be serviced (these are 'express' queues)
334 f_cut .set 2 ; cut-thru set
335 f_dma0 .set 3 ; dma1 active
336 f_dma1 .set 4 ; dma0 active
337 f_tstx_ready .set 5
338 f_pend .set 6 ;true if hold/resume transision pending
339 f_pactive .set 7 ;true if preempt active (assume this can only be changed when scheduler is in idle state..
340 f_tx0_complete .set 8
341 f_tx1_complete .set 9
342 f_tx0_preempt .set 10 ;tbd if need
344 ;scheduler state/shadow state (s_state)GRrtu
345 ;Note: only 00 and 30 used currently (with PSA feature)
346 SCHED_STATE_00 .set 0
347 SCHED_STATE_10 .set 1
348 SCHED_STATE_20 .set 2
349 SCHED_STATE_30 .set 3
350 SCHED_STATE_31 .set 4
351 SCHED_STATE_34 .set 5
353 NORM_QMASK .set 0xff
354 HOLD_QMASK .set 0x80
355 EPKT_QMASK .set (HOLD_QMASK) ; same
357 GRrtu .sassign r25, Struct_RTU_GLOBAL