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55 ;----------------------------------------------------------
56 ; spin.h: defines and macros for SPINLOCK engine on ICSSG
57 ;-----------------------------------------------------------
59 ;-----------------DEFINES-------------------------
61 ;XIDs
62 SPIN_XID_LOC .set 0x90
63 ;#define SPIN_XID_LOC 90 ;local lock
64 SPIN_XID_REM1 .set 0x91
65 SPIN_XID_REM2 .set 0x92
67 ;spin lock flag defines
68 SPIN_FDB_FLAG .set 0x1
69 SPIN_FDB_HOST_FLAG .set 0x2
71 .if $isdefed("SLICE0")
72 PRU_RTU_EOD_P_FLAG .set 0x6
73 PRU_RTU_EOD_E_FLAG .set 0x7
74 PSI_GLITCH_FLAG .set 0xa
75 PRU_RTU_SOF_FLAG .set 0xa
76 PRU_RTU_EOF_FLAG .set 0xb
77 RTU_RTU_IPC_FLAG .set 0xc
78 PRU_RTU_TX_TS_READY .set 0x10
79 .endif
80 .if $isdefed("SLICE1")
81 PRU_RTU_EOD_P_FLAG .set 0x8
82 PRU_RTU_EOD_E_FLAG .set 0x9
83 PSI_GLITCH_FLAG .set 0xd
84 PRU_RTU_SOF_FLAG .set 0xd
85 PRU_RTU_EOF_FLAG .set 0xe
86 RTU_RTU_IPC_FLAG .set 0xf
87 PRU_RTU_TX_TS_READY .set 0x11
88 .endif
90 ;-----------------STRUCTURES-----------------------------
92 ;-----------------STRUCTURE OVERLAYS-----------
94 ;------------------MACROS--------------------------
96 SPIN_SET_LOCK_LOC .macro flagno
97 ldi r1.b0, flagno
98 xin SPIN_XID_LOC, &r1.b3, 1
99 .endm
101 ;spin lock with fail label and bit to test
102 ;testbit == flagno
103 SPIN_SET_LOCK_LOC_LAB .macro flagno, lab_fail
104 ldi r1.b0, flagno
105 xin SPIN_XID_LOC, &r1.b3, 1
106 qbbc lab_fail, r1, 24 ;replaced: qbbc lab_fail, r1.t24
107 .endm
109 SPIN_CLR_LOCK_LOC .macro flagno
110 ldi r1.b0, flagno
111 xout SPIN_XID_LOC, &r1.b3, 1
112 .endm
114 SPIN_TOG_LOCK_LOC .macro flagno
115 ldi r1.b0, flagno
116 xin SPIN_XID_LOC, &r1.b3, 1
117 xout SPIN_XID_LOC, &r1.b3, 1
118 .endm