1 /*
2 * Copyright (C) 2010-2017 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /*******************************************************************************
35 * FILE PURPOSE: EMAC LLD Header Local Definitions
36 *
37 ********************************************************************************
38 * FILE NAME: emacloc.h
39 *
40 * DESCRIPTION: This file contains all Local definitions for EMAC LLD.
41 *******************************************************************************/
42 #ifndef __EMACLOC_H__
43 #define __EMACLOC_H__
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
49 #include <ti/drv/emac/emac_drv.h>
50 #include <ti/drv/emac/emac_hwcfg.h>
51 #include <ti/csl/csl_emac.h>
52 /******************************************************************************
53 * EMAC Driver Version Definitions
54 ******************************************************************************/
55 #define EMAC_VERSION_STR " EMAC Driver Revision: 01.00.03.00"
58 /**********************************************************************
59 *********************** Common Local Definitions *********************
60 **********************************************************************/
61 /**
62 * @brief Maximum number of channel can be used by a core on one port
63 */
64 #define MAX_NUM_EMAC_CHANS_PER_CORE 8
66 /**
67 * @brief Maximum number of MAC address per channel
68 */
69 #define MAX_NUM_EMAC_MAC_ADDR_PER_CHAN 4
71 /**
72 * @brief Maximum number of channel per EMAC port
73 */
74 #define MAX_NUM_EMAC_CHANS_PER_PORT 8
76 /**
77 * @brief Max packet descriptors allocated for RX channel
78 * # of packet descriptors allocated for TX channel
79 * is (64-MAX_EMAC_RX_PKT_DESC) on CPPI memory
80 */
81 #define MAX_EMAC_RX_PKT_DESC 8
84 /**
85 * @brief EMAC application handle number
86 */
87 #define EMAC_APP_HANDLE 0x12345678
89 /**
90 * @brief External memory base address
91 */
92 #define EMAC_INVALID_CORE_NUM 0xff
94 /**
95 * @brief EMAC master channel number (RX filter configuration)
96 */
97 #define EMAC_MASTER_CHAN_NUM 0
100 /**
101 * @brief EMAC MCB field functions
102 */
103 #define EMAC_CORE_NUM emac_mcb.core_num
105 #define EMAC_MASTER_CORE(port_num) emac_mcb.core_pcb[port_num].master_core_flag
106 #define EMAC_MDIO(port_num) emac_mcb.core_pcb[port_num].mdio_flag
107 #define EMAC_NUM_RX_PKTS(port_num) emac_mcb.core_pcb[port_num].num_of_rx_pkt_desc
108 #define EMAC_NUM_TXRX_PKTS(port_num) emac_mcb.core_pcb[port_num].num_of_txrx_pkt_desc
109 #define EMAC_PKT_SIZE(port_num) emac_mcb.core_pcb[port_num].max_pkt_size
110 #define EMAC_NUM_CHANS(port_num) emac_mcb.core_pcb[port_num].num_of_chans
111 #define EMAC_CHAN_CFG(port_num) emac_mcb.core_pcb[port_num].chan_cfg
112 #define EMAC_NUM_MACADDRS(port_num) emac_mcb.core_pcb[port_num].total_num_of_macaddrs
113 #define EMAC_MACADDR_CFG(port_num) emac_mcb.core_pcb[port_num].macaddr_cfg
114 #define EMAC_CHAN_BITMAP(port_num) emac_mcb.core_pcb[port_num].chan_bitmap
115 #define EMAC_PKT_DESC(port_num) emac_mcb.core_pcb[port_num].pkt_desc
117 #define EMAC_RX_QUEUE(port_num) emac_mcb.core_pcb[port_num].rxQueue
118 #define EMAC_TX_QUEUE(port_num) emac_mcb.core_pcb[port_num].txQueue
120 #define EMAC_CSL_ERROR(port_num) emac_mcb.core_pcb[port_num].csl_error
121 #define EMAC_MEM_ERROR(port_num) emac_mcb.core_pcb[port_num].memory_error
122 #define EMAC_PORT_ERROR(port_num) emac_mcb.core_pcb[port_num].port_error
123 #define EMAC_FATAL_ERROR(port_num) emac_mcb.core_pcb[port_num].fatal_error
125 #define EMAC_RX_PKT(port_num, pkt) emac_mcb.core_pcb[port_num].rx_pkt_cb(port_num, pkt)
126 #define EMAC_ALLOC_PKT(port_num, size) emac_mcb.core_pcb[port_num].alloc_pkt_cb(port_num, size)
127 #define EMAC_FREE_PKT(port_num, pkt) emac_mcb.core_pcb[port_num].free_pkt_cb(port_num, pkt)
129 #define EMAC_CORE_CFG(port_num) emac_mcb.core_pcb[port_num].core_cfg
132 #define EMAC_COMM_PCB(port_num) emac_mcb.comm_pcb[port_num]
133 #define EMAC_COMM_DEV(port_num) emac_mcb.comm_dev[port_num]
136 /**********************************************************************
137 ****************** EMAC Local Data structure ********************
138 **********************************************************************/
140 /**
141 * @brief
142 * EMAC_Pkt Queue Data Structure
143 *
144 * @details
145 * Maintains the count of queued elements and head and tail to EMAC_Pkt queue.
146 */
147 typedef struct EMAC_PKT_QUEUE_tag
148 {
149 Uint32 Count;
150 /**< Number of packets in queue */
151 EMAC_Pkt *pHead;
152 /**< Pointer to the first packet */
153 EMAC_Pkt *pTail;
154 /**< Pointer to the last packet */
155 } EMAC_PKT_QUEUE_T;
157 /**
158 * @brief
159 * EMAC channel configuration
160 *
161 * @details
162 * Maintains the channel number and number of MAC addresses assigned for this channel.
163 */
164 typedef struct EMAC_CHAN_CFG_tag
165 {
166 Uint16 chan_num;
167 /**< channel number configured for this core */
168 Uint16 num_of_mac_addrs;
169 /**< Total number of MAC addresses configured for this channel */
171 } EMAC_CHAN_CFG_T;
173 /**
174 * @brief
175 * Core specific EMAC port control block
176 *
177 * @details
178 * Maintains the EMAC port control information of a core
179 */
180 typedef struct EMAC_CORE_PCB_tag
181 {
182 Bool master_core_flag;
183 /**< Ture: master core configuration */
184 Bool mdio_flag;
185 /**< Ture: EMAC Managed Data I/O enabled */
186 Uint32 num_of_rx_pkt_desc;
187 /**< Total number of packet descriptors initialized in the RX queues */
188 Uint32 num_of_txrx_pkt_desc;
189 /**< Total number of packet descriptors initialized in both TX and RX queues */
190 Uint32 max_pkt_size;
191 /**< Maximum size of the packet in bytes */
192 Uint32 num_of_chans;
193 /**< Total number of TX/RX channels configured for this core */
194 EMAC_CHAN_CFG_T chan_cfg[MAX_NUM_EMAC_CHANS_PER_CORE];
195 /**< Channels configuration */
196 Uint32 total_num_of_macaddrs;
197 /**< Total number of MAC addresses for all the channels configured for this core */
198 EMAC_AddrConfig** macaddr_cfg;
199 /**< CSL MAC address configuration */
200 Uint32 chan_bitmap;
201 /**< Bit map of TX/RX channels enabled */
202 EMAC_Pkt pkt_desc[MAX_EMAC_INIT_PKT_DESC];
203 /**< Pre-allocated/initialized EMAC packet descriptiors for both TX and RX queues */
204 EMAC_PKT_QUEUE_T txQueue;
205 /**< TX packet queue */
206 EMAC_PKT_QUEUE_T rxQueue;
207 /**< RX packet queue */
209 EMAC_RX_PKT_CALLBACK_FN_T* rx_pkt_cb;
210 /**< RX packet call back function */
211 EMAC_ALLOC_PKT_CALLBACK_FN_T* alloc_pkt_cb;
212 /**< Allocate packet call back function */
213 EMAC_FREE_PKT_CALLBACK_FN_T* free_pkt_cb;
214 /**< Free packet call back function */
216 EMAC_Core core_cfg;
217 /**< CSL core_configuration */
220 Uint32 csl_error;
221 /**< CSL API call returned error */
222 Uint32 memory_error;
223 /**< Out of memory error */
224 Uint32 port_error;
225 /**< CSL returned EMAC port number error */
226 Uint32 fatal_error;
227 /**< EMAC MAC or link down error */
229 } EMAC_CORE_PCB_T;
231 /**
232 * @brief
233 * Common EMAC Port Control Block used by all the cores
234 *
235 * @details
236 * Maintains the common control information (channel/MAC address, etc).
237 */
238 typedef struct EMAC_COMMON_PCB_tag
239 {
240 Uint32 chans_used;
241 /**< Number of channels used */
242 EMAC_LINK_INFO_T link_info;
243 /**< Link status infomation */
244 Uint8 core_num[MAX_NUM_EMAC_CHANS_PER_PORT];
245 /**< DSP core number of the core that is using the channel,
246 if the channel is free, core_num is set to EMAC_INVALID_CORE_NUM */
248 /**< To support local packet switching, we also need to add local switching queue,
249 channel/MAC address table, the packet descriptor should include # of channels
250 completed switch, etc.*/
252 } EMAC_COMMON_PCB_T;
254 /**
255 * @brief
256 * EMAC Master Control Block
257 *
258 * @details
259 * Maintains the EMAC control information and error statistics.
260 */
261 typedef struct EMAC_MCB_tag
262 {
263 Uint32 core_num;
264 /**< DSP core number */
265 EMAC_CORE_PCB_T core_pcb[MAX_NUM_EMAC_PORTS];
266 /**< EMAC port control block */
268 EMAC_COMMON_PCB_T* comm_pcb[MAX_NUM_EMAC_PORTS];
269 /**< EMAC common port control block accessed by all the cores */
270 EMAC_Device* comm_dev[MAX_NUM_EMAC_PORTS];
271 /**< EMAC common device data passed to CSL */
272 } EMAC_MCB_T;
275 /**********************************************************************
276 ****************** EMAC Local Functions ********************
277 **********************************************************************/
279 static EMAC_Pkt*
280 emac_queue_pop
281 (
282 Uint32 port_num,
283 EMAC_PKT_QUEUE_T* pq
284 );
286 static void
287 emac_queue_push
288 (
289 Uint32 port_num,
290 EMAC_PKT_QUEUE_T* pq,
291 EMAC_Pkt* pPktHdr
292 );
294 uint32_t MDIO_open( int instNum, uint32_t mdioModeFlags, uint32_t phyAddr, Handle hMDIO,uint32_t macSel);
295 void MDIO_close( Handle hMDIO );
296 void MDIO_getStatus( Handle hMDIO, uint32_t *pPhy, uint32_t *pLinkStatus );
297 uint32_t MDIO_phyRegWrite( volatile uint32_t phyIdx, volatile uint32_t phyReg, Uint16 data );
298 uint32_t MDIO_timerTick( Handle hMDIO);
299 uint32_t MDIO_initPHY( Handle hMDIO, volatile uint32_t phyAddr );
301 Uint32 EMAC_commonInit( int instNum, EMAC_Common_Config *pEMACCommonConfig, Handle hEMAC, Uint32 macsel);
302 Uint32 EMAC_coreDeInit(Handle hEMAC);
303 Uint32 EMAC_coreInit(Handle hEMAC, Handle hApplication, EMAC_Core_Config *pEMACCoreConfig, Handle hCore);
304 Uint32 EMAC_close(Handle hEMAC);
305 Uint32 EMAC_setReceiveFilter(Handle hEMAC, Uint32 ReceiveFilter, Uint8 masterChannel);
306 Uint32 EMAC_setMulticast(Handle hEMAC, Uint32 AddrCnt, Uint8 *pMCastList);
307 Uint32 EMAC_sendPacket(Handle hEMAC, EMAC_Pkt *pPkt);
308 Uint32 EMAC_getStatistics(Handle hEMAC, EMAC_Statistics *pStatistics);
309 Uint32 EMAC_TxServiceCheck(Handle hEMAC);
310 Uint32 EMAC_RxServiceCheck(Handle hEMAC);
312 /**********************************************************************
313 ***************************** EMAC Macros ****************************
314 **********************************************************************/
315 #ifdef EMAC_DEBUG
316 #define emac_debug_print(args) printf args
317 #else
318 #define emac_debug_print(args) /* Do nothing */
319 #endif
321 #ifdef __cplusplus
322 }
323 #endif
326 #endif /* __EMACLOC_H__ */