1 /*
2 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /*******************************************************************************
35 * FILE PURPOSE: EMAC LLD Header Local Definitions
36 *
37 ********************************************************************************
38 * FILE NAME: emacloc.h
39 *
40 * DESCRIPTION: This file contains all Local definitions for EMAC LLD.
41 *******************************************************************************/
42 #ifndef EMAC_V1__H
43 #define EMAC_V1__H
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
50 #include <stdint.h>
52 /* CSL include file */
53 #include <ti/csl/src/ip/mdio/V3/csl_mdio.h> /* directly using V3 version for re-use of existing state machine implementation below*/
55 /* QMSS LLD include */
56 #include <ti/drv/qmss/qmss_drv.h>
57 /* CPPI LLD include */
58 #include <ti/drv/cppi/cppi_drv.h>
59 #include <ti/drv/cppi/cppi_desc.h>
61 /* EMAC_DRV LLD include */
62 #include <ti/drv/emac/emac_drv.h>
63 #include <ti/drv/emac/nss_if.h>
64 #include <ti/drv/emac/soc/emac_soc_v1.h>
66 /* EMAC function table pointer */
67 extern const EMAC_FxnTable EMAC_FxnTable_v1;
69 #define EMAC_MAX_NUM_EMAC_PORTS 1
70 #define EMAC_ETHHDR_SIZE 14
71 #define EMAC_MIN_ETHERNET_PKT_SIZE 60U
72 /**
73 * \brief EMAC_Common_Config
74 *
75 * The EMAC_Common_Config structure defines configurations common to all the cors
76 * when the EMAC device is operating. It is passed to the device when the device is
77 * initialized one time by the master core (EMAC_commonInit()), and remains in effect
78 * until the device is de-initialized by the master core (EMAC_commonDeInit()).
79 *
80 * The following is a short description of the configuration fields:
81 *
82 * UseMdio - Uses MDIO configuration if required. In case of SGMII
83 * MAC to MAC communication MDIO is not required. If this
84 * field is one (1) configures MDIO
85 * zero (0) does not configure MDIO
86 *
87 * ModeFlags - Specify the Fixed Operating Mode of the Device:
88 * - EMAC_CONFIG_MODEFLG_CHPRIORITY - Treat TX channels as Priority Levels
89 * (Channel 7 is highest, 0 is lowest)
90 * - EMAC_CONFIG_MODEFLG_MACLOOPBACK - Set MAC in Internal Loopback for
91 * Testing
92 * - EMAC_CONFIG_MODEFLG_RXCRC - Include the 4 byte EtherCRC in RX
93 * frames
94 * - EMAC_CONFIG_MODEFLG_TXCRC - Assume TX Frames Include 4 byte
95 * EtherCRC
96 * - EMAC_CONFIG_MODEFLG_PASSERROR - Receive Error Frames for Testing
97 * - EMAC_CONFIG_MODEFLG_PASSCONTROL - Receive Control Frames for
98 * Testing
99 *
100 * MdioModeFlags - Specify the MDIO/PHY Operation (See csl_MDIO.H)
101 *
102 * CoreNum - Specify the master core which does common initialization
103 * and de-initialization
104 *
105 * PktMTU - Specify the maximal physical packet size
106 */
107 typedef struct _EMAC_Common_Config {
108 Uint8 UseMdio;
109 /**< MDIO Configuation select. User has to pass one (1) if MDIO
110 Configuration is needed, if not should pass zero (0) */
111 Uint32 ModeFlags;
112 /**< Configuation Mode Flags */
113 Uint32 MdioModeFlags;
114 /**< CSL_MDIO Mode Flags (see CSL_MDIO.H) */
115 Uint32 MdioPhyAddr;
116 /**< PHY address (0-31) to be monitored by MDIO, specified by user
117 when MDIO_MODEFLG_SPECPHYADDR is set in MdioModeFlags */
118 Uint8 CoreNum;
119 /**< This member is for core selction to does the EMAC configuration
120 i.e user can select the specific core to configure EMAC one time */
121 Uint32 PktMTU;
122 /**< Max physical packet size */
123 } EMAC_Common_Config;
126 /******************************************************************************
127 * EMAC Driver Version Definitions
128 ******************************************************************************/
129 //#define EMAC_VERSION_STR " EMAC Driver Revision: 01.00.03.00"
132 //#define EMAC_CHIP_STR "SOC_K2G"
134 /**********************************************************************
135 *********************** Common Local Definitions *********************
136 **********************************************************************/
137 /* Initial RX queue number */
138 #define EMAC_RX_QUEUE_NUM_INIT 120 /* K2G */
140 /**
141 * @brief EMAC MCB field functions
142 */
143 #define EMAC_CORE_NUM emac_mcb.core_num
145 #define EMAC_MASTER_CORE(port_num) emac_mcb.port_cb[port_num].master_core_flag
146 #define EMAC_MDIO(port_num) emac_mcb.port_cb[port_num].mdio_flag
147 #define EMAC_NUM_RX_PKTS(port_num) emac_mcb.port_cb[port_num].num_of_rx_pkt_desc
148 #define EMAC_NUM_TX_PKTS(port_num) emac_mcb.port_cb[port_num].num_of_tx_pkt_desc
149 #define EMAC_NUM_TXRX_PKTS(port_num) emac_mcb.port_cb[port_num].num_of_rxtx_pkt_desc
150 #define EMAC_PKT_SIZE(port_num) emac_mcb.port_cb[port_num].max_pkt_size
151 #define EMAC_MACADDR_CFG(port_num) emac_mcb.port_cb[port_num].macaddr_cfg.addr
152 #define EMAC_PKT_DESC(port_num) emac_mcb.port_cb[port_num].pkt_desc
154 #define EMAC_RX_QUEUE(port_num) emac_mcb.port_cb[port_num].rxQueue
155 #define EMAC_TX_QUEUE(port_num) emac_mcb.port_cb[port_num].txQueue
159 #define EMAC_CSL_ERROR(port_num) emac_mcb.port_cb[port_num].csl_error
160 #define EMAC_MEM_ERROR(port_num) emac_mcb.port_cb[port_num].memory_error
161 #define EMAC_PORT_ERROR(port_num) emac_mcb.port_cb[port_num].port_error
162 #define EMAC_FATAL_ERROR(port_num) emac_mcb.port_cb[port_num].fatal_error
164 #define EMAC_RX_PKT(port_num, pkt) emac_mcb.port_cb[port_num].rx_pkt_cb(port_num, pkt)
165 #define EMAC_ALLOC_PKT(port_num, size) emac_mcb.port_cb[port_num].alloc_pkt_cb(port_num, size)
166 #define EMAC_FREE_PKT(port_num, pkt) emac_mcb.port_cb[port_num].free_pkt_cb(port_num, pkt)
170 #define EMAC_COMM_PCB(port_num) emac_mcb.comm_pcb[port_num]
173 #define EMAC_GLOBAL_FREE_QUEUE emac_mcb.gGlobalFreeQHnd
175 #define EMAC_CPDMA_GLOBAL_HND emac_mcb.gCppiHandle
177 #define EMAC_CPDMA_TX_CHAN_HND(chan_num) emac_mcb.gCpdmaTxChanHnd[chan_num]
178 #define EMAC_CPDMA_RX_CHAN_HND(chan_num) emac_mcb.gCpdmaRxChanHnd[chan_num]
179 #define EMAC_GLOBAL_CPPI_FLOW_HND emac_mcb.gRxFlowHnd
182 #define EMAC_GLOBAL_QMSS_MEMORY_REGION emac_mcb.memRegion
183 #define EMAC_GLOBAL_TX_QUEUE_HND(chan_num) emac_mcb.gPaTxQHnd[chan_num]
185 #define EMAC_GLOBAL_TX_FREE_QUEUE_HND emac_mcb.gTxFreeQHnd
187 #define EMAC_GLOBAL_TX_RETURN_QUEUE_HND emac_mcb.gTxReturnQHnd
189 #define EMAC_GLOBAL_RX_FREE_QUEUE_HND emac_mcb.gRxFreeQHnd
191 #define EMAC_GLOBAL_RX_QUEUE_HND emac_mcb.gRxQHnd
193 #define EMAC_GLOBAL_DIV_QUEUE_HND emac_mcb.gDivQHnd
196 #define EMAC_GLOBAL_RX_SEM_HANDLE(port_num) emac_mcb.port_cb[port_num].rxSemaphoreHandle
197 #define EMAC_GLOBAL_RX_HWI_HANDLE(port_num) emac_mcb.port_cb[port_num].hwi
200 /**********************************************************************
201 ****************** EMAC Local Data structure ********************
202 **********************************************************************/
205 /**
206 * @brief
207 * EMAC channel configuration
208 *
209 * @details
210 * Maintains the channel number and number of MAC addresses assigned for this channel.
211 */
212 typedef struct EMAC_CHAN_CFG_tag
213 {
214 Uint16 chan_num;
215 /**< channel number configured for this core */
216 Uint16 num_of_mac_addrs;
217 /**< Total number of MAC addresses configured for this channel, should always be 1 for K2 devices*/
219 } EMAC_CHAN_CFG_T;
221 /**
222 * @brief
223 * Core specific EMAC port control block
224 *
225 * @details
226 * Maintains the EMAC port control information of a core
227 */
228 typedef struct EMAC_PORT_CB_V1_tag
229 {
230 Bool master_core_flag;
231 /**< Ture: master core configuration */
232 Bool mdio_flag;
233 /**< True: configure MDIO */
234 void* hwi; /* Hwi object */
235 Uint32 num_of_rx_pkt_desc;
236 /**< Total number of packet descriptors initialized in the RX queues */
237 Uint32 num_of_tx_pkt_desc;
238 /**< Total number of packet descriptors initialized in the TX queues */
239 Uint32 num_of_rxtx_pkt_desc;
240 /**< Total number of packet descriptors initialized in both TX and RX queues */
241 Uint32 max_pkt_size;
242 /**< MAC address for the port */
243 EMAC_MAC_ADDR_T macaddr_cfg;
244 /**< MAC address configuration */
245 Bool loop_back;
246 /**< True: packets loop back */
247 /**< RX packet call back function */
248 EMAC_RX_PKT_CALLBACK_FN_T* rx_pkt_cb;
250 /**< Allocate packet call back function */
251 EMAC_ALLOC_PKT_CALLBACK_FN_T* alloc_pkt_cb;
252 /**< Free packet call back function */
253 EMAC_FREE_PKT_CALLBACK_FN_T* free_pkt_cb;
255 /*! Rx Semaphore Handle for the emac instance.Required for receiving packets */
256 void* rxSemaphoreHandle;
257 /*! emac open == 1, emac closed == 0 */
258 int32_t emacState;
259 } EMAC_PORT_CB_V1_T;
262 /*
263 have 1 memRegion, have 1 gGlobalFreeQHnd, gTxFreeQHnd and gRxFreeeQHnd, gTxReturnQHnd is per port,
264 gCpdmaTxChanHndand gCpdmaRxChanHnd is only 1,
265 */
266 typedef struct EMAC_MCB_V1_T {
268 Qmss_MemRegion memRegion; /* QMSS memory region */
269 Qmss_QueueHnd gGlobalFreeQHnd; /*Global free queue handle with pre-initialized descriptors done by application,
270 emac-lld will be passed this to then
271 populate gTxFreeQHnd and gRxFreeQHnd*/
272 Qmss_QueueHnd gTxFreeQHnd; /* Tx Free Queue handle, this will get initally populated with descriptors from gGlobalFreeQHnd
273 during emac_setup_tx_subsysem inside of emac_open */
274 Qmss_QueueHnd gTxReturnQHnd; /* This queue will be used to hold Tx completed decriptors that can be filled
275 later with data buffers for transmission onto wire.*/
276 Qmss_QueueHnd gRxFreeQHnd; /* Rx Free Queue handle, this will get initally populated with descriptors from gGlobalFreeQHnd
277 during emac_setup_rx_subsysem inside of emac_open */
278 Qmss_QueueHnd gRxQHnd; /* Rx queue to receive all packets from CPSW for K2G */
279 Qmss_QueueHnd gDivQHnd;
280 Qmss_QueueHnd gPaTxQHnd [NSS_NUM_TX_QUEUES]; /* NOt really Queues used by PA, used to send packets to CPSW fo K2G */
282 Cppi_Handle gCppiHandle;
283 Cppi_ChHnd gCpdmaTxChanHnd [NSS_NUM_TX_PKTDMA_CHANNELS];
284 Cppi_ChHnd gCpdmaRxChanHnd [NSS_NUM_RX_PKTDMA_CHANNELS];
285 Cppi_FlowHnd gRxFlowHnd;
286 MDIO_Device MdioDev;
287 EMAC_PORT_CB_V1_T port_cb[EMAC_MAX_NUM_EMAC_PORTS];
288 EMAC_HwAttrs_V1 hwAttrs[EMAC_MAX_NUM_EMAC_PORTS];
289 } EMAC_MCB_V1_T;
291 /**********************************************************************
292 ***************************** EMAC Macros ****************************
293 **********************************************************************/
294 #ifdef EMAC_DEBUG
295 #define emac_debug_print(args) printf args
296 #else
297 #define emac_debug_print(args) /* Do nothing */
298 #endif
301 /**********************************************************************
302 ****************** EMAC local/internal functions ********************
303 **********************************************************************/
305 int32_t emac_init_cppi (uint32_t port_num, EMAC_OPEN_CONFIG_INFO_T* p_config, EMAC_HwAttrs_V1* p_hwAttrs);
306 int32_t emac_init_qmss (uint32_t port_num, EMAC_OPEN_CONFIG_INFO_T* p_config, EMAC_HwAttrs_V1 *p_hwAttrs);
307 int32_t emac_setup_rx_subsysem (uint32_t port_num, EMAC_OPEN_CONFIG_INFO_T* p_config, EMAC_HwAttrs_V1 *hwAttrs);
308 int32_t emac_setup_tx_subsysem (uint32_t port_num, EMAC_OPEN_CONFIG_INFO_T* p_config, EMAC_HwAttrs_V1 *hwAttrs);
309 int32_t emac_init_cpsw (uint32_t mtu, EMAC_MAC_ADDR_T* pMacAddr, Bool loop_back);
310 int32_t emac_qmss_qpop(Qmss_QueueHnd handler, Cppi_HostDesc **pHostDescriptor);
311 void emac_qmss_qpush (Qmss_QueueHnd handler,void *descAddr, uint32_t packetSize, uint32_t descSize, Qmss_Location location);
312 void emac_qmss_qpush_descsize(Qmss_QueueHnd handler, void *descAddr, uint32_t descSize);
313 uint32_t emac_convert_coreLocal2GlobalAddr (uint32_t addr);
315 uint32_t MDIO_open( int instNum, uint32_t mdioModeFlags, uint32_t phyAddr, Handle hMDIO,uint32_t macSel);
316 uint32_t MDIO_timerTick( Handle hMDIO );
317 void MDIO_getStatus( Handle hMDIO, uint32_t *pPhy, uint32_t *pLinkStatus );
318 Uint32 MDIO_initPHY( Handle hMDIO, volatile Uint32 phyAddr );
319 int32_t emac_deinit_qmss (uint32_t port_num);
320 int32_t emac_deinit_cppi (uint32_t port_num);
322 #ifdef __cplusplus
323 }
324 #endif
326 #endif /* EMAC_V1__H */