f429417e256b1dea79da9b94cc36ad818323671f
1 /**
2 * @file main_am65xx.c
3 *
4 * @brief This file tests the EMAC driver APIs using loopback mode of operation
5 */
6 /*
7 * Copyright (c) 2018, Texas Instruments Incorporated
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 *
14 * * Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 *
17 * * Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * * Neither the name of Texas Instruments Incorporated nor the names of
22 * its contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
32 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
34 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
35 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
39 #include <stdio.h>
40 #include <string.h>
43 /* XDCtools Header files */
44 #include <xdc/std.h>
45 #include <xdc/runtime/Error.h>
47 /* BIOS Header files */
48 #include <ti/sysbios/BIOS.h>
49 #include <ti/sysbios/knl/Task.h>
50 #include <ti/sysbios/family/arm/v8a/Mmu.h>
52 /* CSL Header files */
53 #include <ti/csl/soc.h>
55 /* OSAL Header files */
56 #include <ti/osal/osal.h>
58 /* BOARD Header files */
59 #include <ti/board/board.h>
61 /* UART Header files */
62 #include <ti/drv/uart/UART.h>
63 #include <ti/drv/uart/UART_stdio.h>
65 /* EMAC Driver Header File. */
66 #include <ti/drv/emac/emac_drv.h>
67 #include <ti/drv/emac/soc/emac_soc_v5.h>
69 extern uint32_t app_test_recv_port;
71 /* UDMA Driver Header File. */
72 #include <ti/drv/udma/udma.h>
73 /* Test application local header file */
74 #include "ti/drv/emac/test/EmacLoopbackTest/test_loc.h"
75 #include "ti/drv/emac/test/EmacLoopbackTest/test_utils.h"
77 extern void app_test_task_verify_ut_dual_mac_cpsw(UArg arg0, UArg arg1);
78 extern void app_test_task_benchmark(UArg arg0, UArg arg1);
79 /*
80 * ======== Globals========
81 */
83 const char* rxTaskName[7] = {"rxPort0","rxPort1","rxPort2","rxPort3","rxPort4","rxPort5","rxPort6"};
84 const char* rxMgmtTaskName[7] = {"rxMgmtPort0","rxMgmtPort1","rxMgmtPort2","rxMgmtPort3","rxMgmtPort4","rxMgmtPort5","rxMgmtPort6"};
86 #ifdef EMAC_TEST_APP_WITHOUT_DDR
87 int32_t port_en[EMAC_PORT_CPSW + 1] = {1, 1, 0, 0, 0, 0, 0};
88 #else
89 #ifdef EMAC_BENCHMARK
90 #ifdef EMAC_TEST_APP_ICSSG
91 int32_t port_en[EMAC_PORT_CPSW + 1] = {0, 0, 0, 0, 1, 0, 0};
92 #else /* CPSW use case */
93 int32_t port_en[EMAC_PORT_CPSW + 1] = {0, 0, 0, 0, 0, 0, 1};
94 #endif
95 #else
96 #ifdef EMAC_TEST_APP_ICSSG
97 int32_t port_en[EMAC_PORT_CPSW + 1] = {1, 1, 1, 1, 1, 1, 0};
98 #else /* CPSW use case */
99 int32_t port_en[EMAC_PORT_CPSW + 1] = {0, 0, 0, 0, 0, 0, 1};
100 #endif
101 #endif
102 #endif
104 #ifdef EMAC_TEST_APP_CPSW
105 uint32_t portNum = EMAC_PORT_CPSW;
106 uint32_t endPort = EMAC_PORT_CPSW;
107 #else
108 /* ICSSG case */
109 #ifdef am65xx_idk
110 uint32_t portNum = EMAC_PORT_ICSS;
111 uint32_t endPort = EMAC_PORT_ICSS + 5;
112 #else
113 uint32_t portNum = EMAC_PORT_ICSS + 4;
114 uint32_t endPort = EMAC_PORT_ICSS + 5;
115 #endif
116 #endif
117 #ifdef BUILD_MCU
118 uint32_t AsmReadActlr(void);
119 void AsmWriteActlr(uint32_t);
120 #endif
122 #ifdef APP_TEST_ENABLE_POLL_CTRL_TIMER
123 extern uint32_t initComplete;
124 void * gTimerHandle;
125 SemaphoreP_Params emac_app_timer_sem_params;
126 SemaphoreP_Handle gAppTestPollCtrlTimerSem;
128 void app_test_timer_isr (UArg arg)
129 {
130 if (initComplete != 0)
131 {
132 SemaphoreP_post(gAppTestPollCtrlTimerSem);
133 }
134 }
135 #endif
137 /*
138 * ======== main ========
139 */
140 int main(void)
141 {
142 Task_Params taskParams;
143 Error_Block eb;
144 Error_init(&eb);
146 #ifdef APP_TEST_ENABLE_POLL_CTRL_TIMER
147 TimerP_Params timerParams;
149 TimerP_Params_init(&timerParams);
150 timerParams.runMode = TimerP_RunMode_CONTINUOUS;
151 timerParams.startMode = TimerP_StartMode_AUTO;
152 timerParams.periodType = TimerP_PeriodType_MICROSECS;
153 timerParams.period = 500;
154 timerParams.arg = (void*)portNum;
155 gTimerHandle = TimerP_create(TimerP_ANY, (TimerP_Fxn)app_test_timer_isr, &timerParams);
156 if ( gTimerHandle == NULL)
157 {
158 UART_printf("timer create failed\n");
159 while(1);
160 }
162 SemaphoreP_Params emac_app_timer_sem_params;
163 EMAC_osalSemParamsInit(&emac_app_timer_sem_params);
164 emac_app_timer_sem_params.mode = SemaphoreP_Mode_BINARY;
165 gAppTestPollCtrlTimerSem = EMAC_osalCreateBlockingLock(0,&emac_app_timer_sem_params);
166 #endif
168 #ifndef EMAC_BENCHMARK
169 /* Create the task start the unit test.*/
170 Task_Params_init(&taskParams);
171 taskParams.priority = 10;
172 taskParams.instance->name = "app_test_task_verify_ut_dual_mac_cpsw";
173 Task_create( app_test_task_verify_ut_dual_mac_cpsw, &taskParams, NULL);
176 #ifndef EMAC_BENCHMARK
177 /* Create the task to poll driver to rx cfg responses.*/
178 Task_Params_init(&taskParams);
179 taskParams.arg0 = 0;
180 taskParams.priority = 10;
181 taskParams.instance->name = rxMgmtTaskName[0];
182 Task_create(app_test_task_poll_ctrl, &taskParams, NULL);
183 #endif
185 #else
186 /* Create the task to start BENCHMARK testing.*/
187 Task_Params_init(&taskParams);
188 taskParams.priority = 10;
189 taskParams.arg0 = EMAC_PORT_ICSS + 4;
190 taskParams.instance->name = "app_test_task_benchmark";
191 Task_create( app_test_task_benchmark, &taskParams, NULL);
192 #endif
194 int i;
195 for (i = portNum; i <=endPort; i++)
196 {
197 /* will poll on app_test_recv_port */
198 #ifdef EMAC_BENCHMARK
199 if ((!port_en[i]) || (i != app_test_recv_port))
200 #else
201 if (!port_en[i])
202 #endif
203 continue;
204 /* Create the task to poll driver to rx packets driver.*/
205 Task_Params_init(&taskParams);
206 taskParams.arg0 = i;
207 taskParams.priority = 10;
208 taskParams.instance->name = rxTaskName[i];
209 Task_create(app_test_task_poll_pkt, &taskParams, NULL);
212 }
214 {
215 #ifdef BUILD_MCU
216 uint32_t actlrRegVal = AsmReadActlr();
217 actlrRegVal |= (1 << 13);
218 AsmWriteActlr(actlrRegVal);
219 #endif
220 }
221 /* Start BIOS */
222 BIOS_start();
223 return 0;
224 }
227 #if defined (__aarch64__)
228 struct MmuCfg_t {
229 uint64_t vaddr;
230 uint64_t paddr;
231 size_t size;
232 int attrInd;
233 } MmuCfgTbl[] = {
234 { 0x00100000, 0x00100000, 0x00900000, 0 }, /* Main MMR0 */
235 { 0x00400000, 0x00400000, 0x00001000, 0 }, /* PSC0 */
236 { 0x01800000, 0x01800000, 0x00100000, 0 }, /* gicv3 */
237 { 0x02400000, 0x02400000, 0x000c0000, 0 }, /* dmtimer */
238 { 0x02800000, 0x02800000, 0x00001000, 0 }, /* uart */
239 { 0x02000000, 0x02000000, 0x00100000, 0 }, /* I2C */
240 { 0x02100000, 0x02100000, 0x00080000, 0 }, /* McSPI */
241 { 0x40F00000, 0x40F00000, 0x00020000, 0 }, /* MCU MMR0 */
242 { 0x40d00000, 0x40d00000, 0x00002000, 0 }, /* PLL0 */
243 { 0x43000000, 0x43000000, 0x00020000, 0 }, /* WKUP MMR0 */
244 { 0x02C40000, 0x02C40000, 0x00100000, 0 }, /* pinmux ctrl */
245 { 0x30800000, 0x30800000, 0x0C000000, 0 }, /* main navss */
246 { 0x28380000, 0x28380000, 0x03880000, 0 }, /* mcu navss */
247 { 0x30000000, 0x30000000, 0x0F000000, 0 }, /* ctrcontrol0 */
248 { CSL_MCU_CPSW0_NUSS_BASE, CSL_MCU_CPSW0_NUSS_BASE,
249 (CSL_MCU_CPSW0_NUSS_SIZE*2), 0 }, /* for CPSW */
250 { 0x0b000000, 0x0b000000, 0x00100000, 0 }, /* ICSS-G 0 */
251 { 0x0b100000, 0x0b100000, 0x00100000, 0 }, /* ICSS-G 1 */
252 { 0x0b200000, 0x0b200000, 0x00100000, 0 }, /* ICSS-G 2 */
253 { 0x42000000, 0x42000000, 0x00001000, 0 }, /* PSC WKUP */
254 { 0x03802000, 0x03802000, 0x00001000, 0 }, /* NB0_CFG_MMRS */
255 { 0x70000000, 0x70000000, 0x04000000, 7 }, /* msmc */
256 { 0x41C00000, 0x41C00000, 0x00080000, 7 }, /* ocmc */
257 { 0x80000000, 0x80000000, 0x10000000, 7 }, /* ddr_0 */
258 { 0, 0, 0, 8 } /* attrInd = 8 -> end of table */
259 };
261 void InitMmu(void)
262 {
263 bool retVal = FALSE;
264 uint32_t j = 0;
265 Mmu_MapAttrs attrs;
266 Mmu_initMapAttrs(&attrs);
267 while (MmuCfgTbl[j].attrInd < 8) {
268 attrs.attrIndx = MmuCfgTbl[j].attrInd;
269 retVal = Mmu_map(MmuCfgTbl[j].vaddr, MmuCfgTbl[j].paddr, MmuCfgTbl[j].size, &attrs);
270 if(retVal == FALSE)
271 break;
272 j++;
273 }
275 if(retVal == FALSE) {
276 UART_printf("Mmu_map idx %d returned error %d", j, retVal);
277 while(1);
278 }
279 }
280 #endif