1 /**
2 * \file am437x/I2C_soc.c
3 *
4 * \brief AM437x SoC specific I2C hardware attributes.
5 *
6 * This file contains the hardware attributes of I2C peripheral like
7 * base address, interrupt number etc.
8 */
10 /*
11 * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 *
20 * Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the
23 * distribution.
24 *
25 * Neither the name of Texas Instruments Incorporated nor the names of
26 * its contributors may be used to endorse or promote products derived
27 * from this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 */
43 #include <stdint.h>
44 #include <ti/drv/i2c/I2C.h>
45 #include <ti/csl/soc.h>
46 #include <ti/drv/i2c/soc/I2C_soc.h>
47 #include <ti/starterware/include/hw/am437x.h>
49 /* I2C configuration structure */
50 I2C_HwAttrs i2cInitCfg[I2C_HWIP_MAX_CNT] =
51 {
52 {
53 SOC_I2C0_REG,
54 102,
55 0,
56 48000000U,
57 true,
58 {
59 /* default own slave addresses */
60 0x70, 0x0, 0x0, 0x0
61 },
62 },
63 {
64 SOC_I2C1_REG,
65 103,
66 0,
67 48000000U,
68 true,
69 {
70 0x71, 0x0, 0x0, 0x0
71 },
72 },
73 {
74 SOC_I2C2_REG,
75 62,
76 0,
77 48000000U,
78 true,
79 {
80 0x72, 0x0, 0x0, 0x0
81 },
82 }
83 };
85 #ifdef PRU_ICSS_FW
86 /* I2C FW Memory Ptr */
87 const ICSS_Mem_Ptr i2cFwMemPtr = {
88 (uint32_t *)&pru_dmem0_rev1_start,
89 (uint32_t *)&pru_imem0_rev1_start,
90 (uint32_t *)&pru_dmem0_rev1_end,
91 (uint32_t *)&pru_imem0_rev1_end,
92 (uint32_t *)&pru_dmem1_rev1_start,
93 (uint32_t *)&pru_imem1_rev1_start,
94 (uint32_t *)&pru_dmem1_rev1_end,
95 (uint32_t *)&pru_imem1_rev1_end
96 };
98 /* I2C Soft IP configuration structure */
99 I2C_SwIPAttrs i2cInitCfg2[I2C_SWIP_MAX_CNT] __attribute__ ((section(".shdata"))) =
100 {
101 {
102 #ifndef AM437X_ICSS0
103 (uint32_t)SOC_PRU_ICSS1_U_DATA_RAM0 + (uint32_t)ICSS_I2C_INSTANCE0_ADDR,
104 (uint32_t)SOC_PRU_ICSS1_U_DATA_RAM0 + (uint32_t)ICSS_I2C_CONFIG_MEMORY,
105 #else // AM437X_ICSS0
106 (uint32_t)SOC_PRU_ICSS0_U_DATA_RAM0 + (uint32_t)ICSS_I2C_INSTANCE0_ADDR,
107 (uint32_t)SOC_PRU_ICSS0_U_DATA_RAM0 + (uint32_t)ICSS_I2C_CONFIG_MEMORY,
108 #endif // AM437X_ICSS0
109 #ifndef AM437X_ICSS0
110 52,
111 #else // AM437X_ICSS0
112 191,
113 #endif // AM437X_ICSS0
114 0,
115 #ifndef AM437X_ICSS0
116 I2C_ICSS_INSTANCE2,
117 #else // AM437X_ICSS0
118 I2C_ICSS_INSTANCE1,
119 #endif // AM437X_ICSS0
120 PRUICCSS_PRU0,
121 &i2cFwMemPtr,
122 #ifndef AM437X_ICSS0
123 {0x44E10880, 8, 0x6, 0x5},
124 {0x44E10958, 0, 0xF, 0x6},
125 {0x44E10884, 9, 0x6, 0x5},
126 #else // AM437X_ICSS0
127 {0x44E108F0, 8, 0x6, 0x5},
128 {0x44E10958, 0, 0xF, 0x6},
129 {0x44E108F4, 9, 0x6, 0x5},
130 #endif // AM437X_ICSS0
131 I2C_TRIGLVL_256,
132 I2C_TRIGLVL_256,
133 I2C_INSTANCE_ID0,
134 true
135 },
136 {
137 #ifndef AM437X_ICSS0
138 (uint32_t)SOC_PRU_ICSS1_U_DATA_RAM0 + (uint32_t)ICSS_I2C_INSTANCE1_ADDR,
139 (uint32_t)SOC_PRU_ICSS1_U_DATA_RAM0 + (uint32_t)ICSS_I2C_CONFIG_MEMORY,
140 #else // AM437X_ICSS0
141 (uint32_t)SOC_PRU_ICSS0_U_DATA_RAM0 + (uint32_t)ICSS_I2C_INSTANCE1_ADDR,
142 (uint32_t)SOC_PRU_ICSS0_U_DATA_RAM0 + (uint32_t)ICSS_I2C_CONFIG_MEMORY,
143 #endif // AM437X_ICSS0
144 #ifndef AM437X_ICSS0
145 52,
146 #else // AM437X_ICSS0
147 191,
148 #endif // AM437X_ICSS0
149 0,
150 #ifndef AM437X_ICSS0
151 I2C_ICSS_INSTANCE2,
152 #else // AM437X_ICSS0
153 I2C_ICSS_INSTANCE1,
154 #endif // AM437X_ICSS0
155 PRUICCSS_PRU0,
156 &i2cFwMemPtr,
157 #ifndef AM437X_ICSS0
158 {0x44E10830, 10, 0x6, 0x9},
159 {0x44E1095C, 1, 0xF, 0x6},
160 {0x44E10834, 11, 0x6, 0x9},
161 #else // AM437X_ICSS0
162 {0x44E108F8, 10, 0x6, 0x5},
163 {0x44E1095C, 1, 0xF, 0x6},
164 {0x44E108FC, 11, 0x6, 0x5},
165 #endif // AM437X_ICSS0
166 I2C_TRIGLVL_256,
167 I2C_TRIGLVL_256,
168 I2C_INSTANCE_ID1,
169 true
170 }
171 };
173 /* I2C objects */
174 I2C_v2_Object I2cObjects2[I2C_SWIP_MAX_CNT];
175 #endif
177 /* I2C objects */
178 I2C_v1_Object I2cObjects[I2C_HWIP_MAX_CNT];
180 /* I2C configuration structure */
181 I2C_config_list I2C_config = {
182 {
183 &I2C_v1_FxnTable,
184 &I2cObjects[0],
185 &i2cInitCfg[0]
186 },
188 {
189 &I2C_v1_FxnTable,
190 &I2cObjects[1],
191 &i2cInitCfg[1]
192 },
194 {
195 &I2C_v1_FxnTable,
196 &I2cObjects[2],
197 &i2cInitCfg[2]
198 },
200 /*pad to full predefined length of array*/
201 {NULL, NULL, NULL},
202 {NULL, NULL, NULL},
203 {NULL, NULL, NULL},
204 {NULL, NULL, NULL},
205 {NULL, NULL, NULL},
206 {NULL, NULL, NULL},
207 {NULL, NULL, NULL},
208 {NULL, NULL, NULL},
209 {NULL, NULL, NULL},
210 {NULL, NULL, NULL},
211 {NULL, NULL, NULL}
212 };
214 /**
215 * \brief This API gets the SoC level of I2C intial configuration
216 *
217 * \param index I2C instance index.
218 * \param cfg Pointer to I2C SOC initial config.
219 *
220 * \return 0 success: -1: error
221 *
222 */
223 int32_t I2C_socGetInitCfg(uint32_t index, I2C_HwAttrs *cfg)
224 {
225 int32_t ret = 0;
227 if (index < I2C_HWIP_MAX_CNT)
228 {
229 *cfg = i2cInitCfg[index];
230 }
231 else
232 {
233 ret = (-((int32_t)1));
234 }
236 return ret;
237 }
239 /**
240 * \brief This API sets the SoC level of I2C intial configuration
241 *
242 * \param index I2C instance index.
243 * \param cfg Pointer to I2C SOC initial config.
244 *
245 * \return 0 success: -1: error
246 *
247 */
248 int32_t I2C_socSetInitCfg(uint32_t index, const I2C_HwAttrs *cfg)
249 {
250 int32_t ret = 0;
252 if (index < I2C_HWIP_MAX_CNT)
253 {
254 i2cInitCfg[index] = *cfg;
255 }
256 else
257 {
258 ret = (-((int32_t)1));
259 }
261 return ret;
262 }
264 #ifdef PRU_ICSS_FW
265 /**
266 * \brief This API gets the I2C FW configuration
267 *
268 * \param index I2C instance index.
269 * \param cfg Pointer to I2C FW config.
270 *
271 * \return 0 success: -1: error
272 *
273 */
274 int32_t I2C_socGetFwCfg(uint32_t index, I2C_SwIPAttrs *cfg)
275 {
276 int32_t ret = 0;
278 index = index - I2C_HWIP_MAX_CNT;
279 if (index < I2C_SWIP_MAX_CNT)
280 {
281 *cfg = i2cInitCfg2[index];
282 }
283 else
284 {
285 ret = (-((int32_t)1));
286 }
288 return ret;
289 }
291 /**
292 * \brief This API sets the I2C FW configuration
293 *
294 * \param index I2C instance index.
295 * \param cfg Pointer to I2C FW config.
296 *
297 * \return 0 success: -1: error
298 *
299 */
300 int32_t I2C_socSetFwCfg(uint32_t index, const I2C_SwIPAttrs *cfg)
301 {
302 int32_t ret = 0;
304 index = index - I2C_HWIP_MAX_CNT;
305 if (index < I2C_SWIP_MAX_CNT)
306 {
307 i2cInitCfg2[index] = *cfg;
308 }
309 else
310 {
311 ret = (-((int32_t)1));
312 }
314 return ret;
315 }
317 /**
318 * \brief This API initialize the I2C FW configuration
319 *
320 * \param none
321 *
322 * \return none
323 *
324 */
325 void I2C_socInitFwCfg(void)
326 {
327 uint32_t i;
329 for (i = 0; i < I2C_SWIP_MAX_CNT; i++)
330 {
331 I2C_config[I2C_HWIP_MAX_CNT + i].fxnTablePtr = &I2C_v2_FxnTable;
332 I2C_config[I2C_HWIP_MAX_CNT + i].object = (void *)(&I2cObjects2[i]);
333 I2C_config[I2C_HWIP_MAX_CNT + i].hwAttrs = &i2cInitCfg2[i];
334 }
336 return;
337 }
338 #endif