1 /**
2 * \file main_test.c
3 *
4 * \brief Example application main file. This application will read the data
5 * from eeprom and compares it with the known data.
6 *
7 */
9 /*
10 * Copyright (C) 2014 - 2020 Texas Instruments Incorporated - http://www.ti.com/
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 */
42 #ifdef USE_BIOS
43 /* XDCtools Header files */
44 #include <xdc/std.h>
45 #include <xdc/runtime/System.h>
46 #include <xdc/runtime/Error.h>
48 /* BIOS Header files */
49 #include <ti/sysbios/BIOS.h>
50 #include <ti/sysbios/knl/Task.h>
51 #endif /* #ifdef USE_BIOS */
53 #include <stdio.h>
54 #include <string.h>
56 /* TI-RTOS Header files */
57 #include <ti/drv/i2c/I2C.h>
58 #include <ti/drv/i2c/soc/I2C_soc.h>
59 #include "I2C_log.h"
60 #include "I2C_board.h"
61 #ifdef SOC_AM65XX
62 #include <ti/csl/soc.h>
63 #include <ti/drv/sciclient/sciclient.h>
64 #endif
66 #if defined (SOC_J721E) || defined(SOC_J7200)
67 #include <ti/csl/soc.h>
68 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
69 #include <ti/csl/csl_chipAux.h>
70 #endif
71 #include <ti/drv/sciclient/sciclient.h>
72 #endif
74 #include <ti/csl/csl_clec.h>
76 #include <ti/csl/arch/r5/csl_arm_r5.h>
78 #if defined (__C7100__)
79 #include <ti/csl/arch/csl_arch.h>
80 #endif
82 #if defined(UNITY_INCLUDE_CONFIG_H) && (defined(SOC_J721E) || defined(SOC_J7200))
83 #include <ti/build/unit-test/Unity/src/unity.h>
84 #include <ti/build/unit-test/config/unity_config.h>
85 #endif
87 void I2c_appC7xPreInit(void);
89 /* Define the I2C test interface */
90 typedef struct I2C_Tests_s
91 {
92 bool (*testFunc)(void *);
93 int32_t testId;
94 bool dmaMode;
95 bool intrMode;
96 bool cbMode;
97 uint32_t timeout;
98 char testDesc[80];
100 } I2C_Tests;
102 /* I2C test ID definitions */
103 #define I2C_TEST_ID_BIT_RATE 0 /* I2C bit rate test in interrupt mode */
104 #define I2C_TEST_ID_PROBE_BUS_FREQ 1 /* I2C probe bus frequency Test in interrupt mode */
105 #define I2C_TEST_ID_TIMEOUT_INT 2 /* I2C timeout test in interrupt mode */
106 #define I2C_TEST_ID_TIMEOUT_POLLING 3 /* I2C timeout test in polling mode */
109 #if defined (SOC_AM335X) || defined (SOC_AM437x)
110 /* EEPROM data -Board specific */
111 extern char eepromData[I2C_EEPROM_RX_LENGTH];
112 #endif
114 /**********************************************************************
115 ************************** Macros ************************************
116 **********************************************************************/
118 #define I2C_TRANSACTION_TIMEOUT (10000U)
121 /**********************************************************************
122 ************************** Internal functions ************************
123 **********************************************************************/
125 /**********************************************************************
126 ************************** Global Variables **************************
127 **********************************************************************/
129 #if defined (idkAM572x)
130 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x32,
131 0x49, 0x44};
132 #elif defined (idkAM574x)
133 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x34,
134 0x49, 0x44};
135 #elif defined (idkAM571x)
136 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x31,
137 0x49, 0x44};
138 #elif defined (evmAM572x)
139 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4d, 0x35, 0x37, 0x32,
140 0x50, 0x4d};
141 #elif defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (EVM_OMAPL137)
142 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
143 0x09, 0x10};
144 #elif defined (evmC6678) || defined (evmC6657) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm) || defined(j7200_evm) || defined (am64x_evm)
145 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
146 0x00, 0x00};
147 #else
148 #endif
150 /*
151 * ======== Board_initI2C ========
152 */
153 bool Board_initI2C(void)
154 {
155 Board_initCfg boardCfg;
156 Board_STATUS boardStatus;
157 #if defined (idkAM571x)
158 Board_IDInfo id;
159 #endif
160 I2C_HwAttrs i2c_cfg;
161 #if defined (evmK2G)
162 Board_SoCInfo socInfo;
163 #endif
165 #if defined(evmK2E) || defined(evmC6678)
166 boardCfg = BOARD_INIT_MODULE_CLOCK |
167 BOARD_INIT_UART_STDIO;
168 #else
169 boardCfg = BOARD_INIT_PINMUX_CONFIG |
170 BOARD_INIT_MODULE_CLOCK |
171 BOARD_INIT_UART_STDIO;
172 #endif
173 boardStatus = Board_init(boardCfg);
174 if (boardStatus != BOARD_SOK)
175 {
176 return (false);
177 }
179 I2C_init();
181 /* Get the default I2C init configurations */
182 I2C_socGetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
184 /* Modify the default I2C configurations if necessary */
185 #if defined(SOC_AM65XX)
186 /* No I2C instanced connected to eeprom in main domain, use i2c instance in wakeup domain */
187 i2c_cfg.baseAddr = CSL_WKUP_I2C0_CFG_BASE;
188 #if defined (__aarch64__)
189 i2c_cfg.intNum = CSL_GIC0_INTR_WKUP_I2C0_BUS_POINTRPEND;
190 #else
191 i2c_cfg.intNum = CSL_MCU0_INTR_I2C0_POINTRPEND;
192 #endif
193 #endif
195 #if defined (SOC_J721E) || defined(SOC_J7200)
196 /* No I2C instanced connected to eeprom in main domain, use i2c instance in wakeup domain */
197 i2c_cfg.baseAddr = CSL_WKUP_I2C0_CFG_BASE;
198 #if defined (BUILD_MPU)
199 i2c_cfg.intNum = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_WKUP_I2C0_POINTRPEND_0;
200 #endif
201 #if defined (BUILD_MCU)
202 CSL_ArmR5CPUInfo info;
204 CSL_armR5GetCpuID(&info);
205 if (info.grpId != (uint32_t)CSL_ARM_R5_CLUSTER_GROUP_ID_0)
206 {
207 /*
208 * Pulsar R5 core is on the Main domain, use the Main Pulsar
209 * interrupt router
210 */
211 i2c_cfg.intNum = 256U; /* value 256 - 511 reserved for IR output */
212 }
213 else
214 {
215 /* Pulsar R5 core is on the MCU domain */
216 i2c_cfg.intNum = CSLR_MCU_R5FSS0_CORE0_INTR_WKUP_I2C0_POINTRPEND_0;
217 }
218 #endif
219 #if defined (BUILD_C7X_1)
220 i2c_cfg.eventId = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_WKUP_I2C0_POINTRPEND_0 + 992U, /* eventId, input event # to CLEC */
221 #endif
222 #endif
224 /* Set the default I2C init configurations */
225 I2C_socSetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
227 /* --- TODO: move this into the board library --- */
228 /* For SYSBIOS only */
229 #ifndef BAREMETAL
230 #if defined (SOC_J721E)
231 /* set up C7x CLEC for DMTimer0 */
232 #if defined (BUILD_C7X_1)
233 CSL_ClecEventConfig cfgClec;
234 CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
235 uint32_t input = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_TIMER0_INTR_PEND_0 + 992; /* Used for Timer Interrupt */
237 /* Configure CLEC for DMTimer0, SYS/BIOS uses interrupt 14 for DMTimer0 by default */
238 cfgClec.secureClaimEnable = FALSE;
239 cfgClec.evtSendEnable = TRUE;
240 cfgClec.rtMap = CSL_CLEC_RTMAP_CPU_ALL;
241 cfgClec.extEvtNum = 0;
242 cfgClec.c7xEvtNum = 14;
243 CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
244 #endif /* for C7X cores */
246 /* set up C66x Interrupt Router for DMTimer0 for C66x */
247 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
248 int32_t retVal;
249 struct tisci_msg_rm_irq_set_req rmIrqReq;
250 struct tisci_msg_rm_irq_set_resp rmIrqResp;
251 uint16_t dst_id;
252 uint16_t dst_host_irq;
254 /* Set up C66x interrupt router for DMTimer0 */
255 memset (&rmIrqReq, 0, sizeof(rmIrqReq));
256 rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
257 rmIrqReq.src_id = TISCI_DEV_TIMER0;
258 rmIrqReq.src_index = 0; /* set to 0 for non-event based interrupt */
260 /* Set the destination interrupt */
261 rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
262 rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
264 if (CSL_chipReadDNUM() == 0U)
265 {
266 /* Set the destination for core0 */
267 dst_id = TISCI_DEV_C66SS0_CORE0;
268 /* rmIrqReq.dst_host_irq has to match the DMTimer.timerSettings[0].eventId defined in sysbios_c66.cfg */
269 dst_host_irq = 21U;
270 }
271 else
272 {
273 /* Set the destination for core1 */
274 dst_id = TISCI_DEV_C66SS1_CORE0;
275 dst_host_irq = 20U;
276 }
277 rmIrqReq.dst_id = dst_id;
278 rmIrqReq.dst_host_irq = dst_host_irq; /* DMSC dest event, input to C66x INTC */
280 /* Config event */
281 retVal = Sciclient_rmIrqSet(
282 (const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,
283 &rmIrqResp,
284 SCICLIENT_SERVICE_WAIT_FOREVER);
285 if(0U != retVal)
286 {
287 return (false);
288 }
289 #endif /* for C66X cores */
290 #endif /* for SOC_J721E */
291 #endif /* for SYSBIOS */
292 /* --- TODO: move this into the board library --- */
294 #if defined (idkAM571x)
295 boardStatus = Board_getIDInfo(&id);
296 if (boardStatus != BOARD_SOK)
297 {
298 return (false);
299 }
300 memcpy(eepromData, &id.header[I2C_EEPROM_TEST_ADDR],
301 BOARD_EEPROM_HEADER_LENGTH - I2C_EEPROM_TEST_ADDR);
302 memcpy(&eepromData[BOARD_EEPROM_HEADER_LENGTH - I2C_EEPROM_TEST_ADDR],
303 id.boardName,
304 I2C_EEPROM_TEST_LENGTH - BOARD_EEPROM_HEADER_LENGTH + I2C_EEPROM_TEST_ADDR);
305 #endif
307 #if defined (evmK2G)
308 /* Read the SoC info to get the System clock value */
309 Board_getSoCInfo(&socInfo);
310 if(socInfo.sysClock != BOARD_SYS_CLK_DEFAULT)
311 {
312 /* Get the default I2C init configurations */
313 I2C_socGetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
314 /* Update the I2C functional clock based on CPU clock - 1G or 600MHz */
315 i2c_cfg.funcClk = socInfo.sysClock/6;
316 /* Set the default I2C init configurations */
317 I2C_socSetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
318 }
319 #endif
321 return (true);
322 }
324 /*
325 * ======== I2C init config ========
326 */
327 static void I2C_initConfig(uint32_t instance, I2C_Tests *test)
328 {
329 I2C_HwAttrs i2c_cfg;
331 /* Get the default SPI init configurations */
332 I2C_socGetInitCfg(instance, &i2c_cfg);
334 #if defined (SOC_J721E)
335 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
336 /*
337 * There is no interrupt routing supported in sciclient to
338 * route wakeup domain I2C0 interrupt to C66x cores due to
339 * the hardware limitation, use polling mode for eeprom test
340 */
341 i2c_cfg.enableIntr = false;
342 #else
343 i2c_cfg.enableIntr = test->intrMode;
344 #endif
345 #else
346 i2c_cfg.enableIntr = test->intrMode;
347 #endif
349 /* Set the SPI init configurations */
350 I2C_socSetInitCfg(instance, &i2c_cfg);
351 }
353 /*
354 * ======== CompareData ========
355 */
356 static bool CompareData(char *expData, char *rxData, uint32_t length)
357 {
358 uint32_t idx = 0;
359 uint32_t match = 1;
360 bool retVal = false;
362 for(idx = 0; ((idx < length) && (match != 0)); idx++)
363 {
364 if(*expData != *rxData) match = 0;
365 expData++;
366 rxData++;
367 }
369 if(match == 1) retVal = true;
371 return retVal;
372 }
374 static bool i2c_bitrate_test (I2C_BitRate bitRate, I2C_Tests *test)
375 {
376 char bitRateLog[4][10] = {"100Kbps", "400Kbps", "1Mbps", "3.4Mbps"};
377 I2C_Params i2cParams;
378 I2C_Handle handle = NULL;
379 I2C_Transaction i2cTransaction;
380 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
381 char rxBuf[I2C_EEPROM_TEST_LENGTH];
382 int16_t status;
383 bool copyData = FALSE;
384 bool testStatus = true;
386 /* Set the I2C EEPROM write/read address */
387 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
388 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
390 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
392 I2C_Params_init(&i2cParams);
394 /* Set bitRate */
395 i2cParams.bitRate = bitRate;
396 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
397 if (handle == NULL)
398 {
399 goto Err;
400 }
402 #ifdef I2C_EEPROM_WRITE_ENABLE
403 /* Write to EEPROM */
404 memcpy(&txBuf[I2C_EEPROM_ADDR_SIZE], eepromData, I2C_EEPROM_TEST_LENGTH);
405 I2C_transactionInit(&i2cTransaction);
406 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
407 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
408 i2cTransaction.writeCount = I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE;
409 i2cTransaction.readBuf = NULL;
410 i2cTransaction.readCount = 0;
411 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
412 status = I2C_transfer(handle, &i2cTransaction);
414 if(I2C_STS_SUCCESS != status)
415 {
416 I2C_log("\n I2C Test: ");
417 I2C_log(bitRateLog[bitRate]);
418 I2C_log(": Write Data Transfer failed. \n");
419 testStatus = false;
420 goto Err;
421 }
423 #if defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm) || defined (j7200_evm) || defined (am64x_evm)
424 BOARD_delay(I2C_EEPROM_TEST_DELAY);
425 #endif
426 #else
427 #if defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (EVM_OMAPL137) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm) || defined(j7200) || defined (am64x_evm)
428 /* EEPROM write disabled on K2, need copy data */
429 copyData = TRUE;
430 #endif
431 #endif
432 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
433 I2C_transactionInit(&i2cTransaction);
434 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
435 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
436 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
437 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
438 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
439 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
440 status = I2C_transfer(handle, &i2cTransaction);
442 if(I2C_STS_SUCCESS != status)
443 {
444 I2C_log("\n I2C Test: ");
445 I2C_log(bitRateLog[bitRate]);
446 I2C_log(": Read Data Transfer failed. \n");
447 testStatus = false;
448 goto Err;
449 }
450 else
451 {
452 #if defined (evmC6678) || defined (evmC6657) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm) || defined (j7200_evm) || defined (am64x_evm)
453 copyData = TRUE;
454 #endif
456 /* read only test, copy data from rx buffer to eepromData to pass the test */
457 if (copyData)
458 memcpy(eepromData, rxBuf, I2C_EEPROM_TEST_LENGTH);
460 testStatus = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
461 if(false == testStatus)
462 {
463 I2C_log("\n I2C Test: ");
464 I2C_log(bitRateLog[bitRate]);
465 I2C_log(": Data Mismatch \n");
466 }
467 }
469 Err:
470 if (handle)
471 {
472 I2C_close(handle);
473 }
475 return (testStatus);
476 }
478 static bool I2C_bitrate_test(void *arg)
479 {
480 bool testResult = true;
481 uint32_t i;
483 for (i = 0; i < 2; i++)
484 {
485 testResult = i2c_bitrate_test((I2C_BitRate)i, (I2C_Tests *)arg);
486 if (testResult == false)
487 {
488 break;
489 }
490 }
492 return (testResult);
493 }
496 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_AM571x) || defined (SOC_AM572x) || defined (SOC_AM574x) || defined (SOC_AM65XX) || defined (SOC_J721E) || defined (SOC_J7200)
497 static bool I2C_Probe_BusFrequency_test(void *arg)
498 {
499 I2C_Handle handle;
500 I2C_Params i2cParams;
501 uint32_t busFrequency;
502 bool status = false;
503 int16_t transferStatus;
504 I2C_Transaction i2cTransaction;
505 uint32_t slaveAddress;
506 int32_t controlStatus;
507 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
508 char rxBuf[I2C_EEPROM_TEST_LENGTH];
509 uint32_t delayValue;
510 I2C_Tests *test = (I2C_Tests *)arg;
512 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
514 I2C_Params_init(&i2cParams);
515 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
516 if (handle == NULL)
517 {
518 goto Err;
519 }
521 /* Set the I2C EEPROM write/read address */
522 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
523 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
526 /* Test Runtime Configuration of Bus Frequency */
528 /* Test runtime configuration of 400 kHz */
529 busFrequency = I2C_400kHz;
530 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
532 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
533 I2C_transactionInit(&i2cTransaction);
534 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
535 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
536 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
537 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
538 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
539 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
540 transferStatus = I2C_transfer(handle, &i2cTransaction);
542 if(I2C_STS_SUCCESS != transferStatus)
543 {
544 I2C_log("\n I2C Test: Dynamic configuration of bus Freq failed. \n");
545 goto Err;
546 }
548 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
550 if(true == status)
551 {
552 /* Test runtime configuration of 100 kHz */
553 busFrequency = I2C_100kHz;
554 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
556 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
557 I2C_transactionInit(&i2cTransaction);
558 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
559 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
560 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
561 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
562 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
563 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
564 transferStatus = I2C_transfer(handle, &i2cTransaction);
566 if(I2C_STS_SUCCESS != transferStatus)
567 {
568 I2C_log("\n I2C Test: Dynamic configuration of bus Freq failed. \n");
569 goto Err;
570 }
572 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
573 }
575 /* Test Probe functionality */
577 if(true == status)
578 {
579 /* Probe test with valid slave address */
580 slaveAddress = I2C_EEPROM_ADDR;
581 controlStatus = I2C_control(handle, I2C_CMD_PROBE, &slaveAddress);
583 if(I2C_STATUS_SUCCESS == controlStatus)
584 {
585 status = true;
586 }
587 else
588 {
589 status = false;
590 I2C_log("\n I2C Test: Probe test failed. \n");
591 goto Err;
592 }
593 }
595 if(true == status)
596 {
597 /* Probe test with invalid slave address */
598 slaveAddress = 0x70U;
599 controlStatus = I2C_control(handle, I2C_CMD_PROBE, &slaveAddress);
601 if(I2C_STATUS_ERROR == controlStatus)
602 {
603 status = true;
604 }
605 else
606 {
607 status = false;
608 I2C_log("\n I2C Test: Probe test failed. \n");
609 goto Err;
610 }
611 }
613 if(true == status)
614 {
615 /* Test bus recovery functionality */
616 delayValue = 2000U;
617 controlStatus = I2C_control(handle, I2C_CMD_RECOVER_BUS, &delayValue);
619 if(I2C_STATUS_SUCCESS == controlStatus)
620 {
621 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
622 I2C_transactionInit(&i2cTransaction);
623 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
624 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
625 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
626 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
627 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
628 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
629 transferStatus = I2C_transfer(handle, &i2cTransaction);
631 if(I2C_STS_SUCCESS != transferStatus)
632 {
633 I2C_log("\n I2C Test: Bus recovery test failed. \n");
634 goto Err;
635 }
637 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
638 }
639 else
640 {
641 status = false;
642 }
643 }
645 Err:
646 if (handle)
647 {
648 I2C_close(handle);
649 }
650 return status;
651 }
653 static bool I2C_timeout_test(void *arg)
654 {
655 I2C_Handle handle;
656 I2C_Params i2cParams;
657 uint32_t busFrequency;
658 bool status = false;
659 int16_t transferStatus;
660 I2C_Transaction i2cTransaction;
661 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
662 char rxBuf[I2C_EEPROM_TEST_LENGTH];
663 I2C_Tests *test = (I2C_Tests *)arg;
665 /* Set the I2C EEPROM write/read address */
666 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
667 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
669 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
671 I2C_Params_init(&i2cParams);
672 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
673 if (handle == NULL)
674 {
675 goto Err;
676 }
678 /* Test Runtime Configuration of Bus Frequency */
680 /* Test runtime configuration of 400 kHz */
681 busFrequency = I2C_100kHz;
682 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
684 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
685 I2C_transactionInit(&i2cTransaction);
686 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
687 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
688 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
689 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
690 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
691 i2cTransaction.timeout = test->timeout;
692 transferStatus = I2C_transfer(handle, &i2cTransaction);
694 if(I2C_STS_ERR_TIMEOUT == transferStatus)
695 {
696 status = true;
697 }
699 Err:
700 if (handle)
701 {
702 I2C_close(handle);
703 }
705 return status;
706 }
707 #endif
709 void I2C_test_print_test_desc(I2C_Tests *test)
710 {
711 char testId[16] = {0, };
713 /* Print unit test ID */
714 sprintf(testId, "%d", test->testId);
715 I2C_log("\n I2C UT %s\n", testId);
717 /* Print test description */
718 I2C_log("\n %s\n", test->testDesc);
719 }
721 I2C_Tests I2c_tests[] =
722 {
723 /* testFunc testID dma intr cbMode timeout testDesc */
724 {I2C_bitrate_test, I2C_TEST_ID_BIT_RATE, false, true, false, SemaphoreP_WAIT_FOREVER, "\r\n I2C bit rate test in interrupt mode"},
725 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_AM571x) || defined (SOC_AM572x) || defined (SOC_AM574x) || defined (SOC_AM65XX) || defined (SOC_J721E) || defined (SOC_J7200)
726 {I2C_Probe_BusFrequency_test, I2C_TEST_ID_PROBE_BUS_FREQ, false, true, false, SemaphoreP_WAIT_FOREVER, "\r\n I2C probe bus freq test in interrupt mode"},
727 {I2C_timeout_test, I2C_TEST_ID_TIMEOUT_INT, false, true, false, 1, "\r\n I2C timeout test in interrupt mode"},
728 {I2C_timeout_test, I2C_TEST_ID_TIMEOUT_POLLING, false, false, false, 1, "\r\n I2C timeout test in polling mode"},
729 #endif
730 {NULL, },
731 };
734 #if defined(UNITY_INCLUDE_CONFIG_H) && (defined(SOC_J721E) || defined(SOC_J7200))
735 /*
736 * ======== Unity set up and tear down ========
737 */
738 void setUp(void)
739 {
740 /* Do nothing */
741 }
743 void tearDown(void)
744 {
745 /* Do nothing */
746 }
748 bool test_I2C_Eeprom_common(void)
749 {
750 bool testResult = true;
751 uint32_t i;
752 I2C_Tests *test;
754 if (Board_initI2C() == false)
755 {
756 I2C_log("\r\n %s Board_initI2C failed\r\n");
757 #ifdef UNITY_INCLUDE_CONFIG_H
758 TEST_FAIL();
759 #endif
760 while(1);
761 }
763 for (i = 0; ; i++)
764 {
765 test = &I2c_tests[i];
766 if (test->testFunc == NULL)
767 {
768 break;
769 }
770 I2C_test_print_test_desc(test);
771 if (test->testFunc((void *)test) == true)
772 {
773 I2C_log("\r\n %s have passed\r\n", test->testDesc);
774 }
775 else
776 {
777 I2C_log("\r\n %s have failed\r\n", test->testDesc);
778 testResult = false;
779 break;
780 }
781 }
782 return testResult;
783 }
785 void test_I2C_Eeprom_TestApp(void)
786 {
787 bool testResult = true;
788 testResult = test_I2C_Eeprom_common();
790 if(testResult == true)
791 {
792 I2C_log("\n All tests have passed. \n");
793 #ifdef UNITY_INCLUDE_CONFIG_H
794 TEST_PASS();
795 #endif
796 }
797 else
798 {
799 I2C_log("\n Some tests have failed. \n");
800 #ifdef UNITY_INCLUDE_CONFIG_H
801 TEST_FAIL();
802 #endif
803 }
805 while (true)
806 {
807 }
808 }
810 void test_I2C_Eeprom_BareMetal_TestApp(void)
811 {
812 bool testResult = true;
813 testResult = test_I2C_Eeprom_common();
815 if(testResult == true)
816 {
817 I2C_log("\n All tests have passed. \n");
818 #ifdef UNITY_INCLUDE_CONFIG_H
819 TEST_PASS();
820 #endif
821 }
822 else
823 {
824 I2C_log("\n Some tests have failed. \n");
825 #ifdef UNITY_INCLUDE_CONFIG_H
826 TEST_FAIL();
827 #endif
828 }
830 while (true)
831 {
832 }
833 }
835 void test_I2C_Eeprom_TestApp_runner(void)
836 {
837 /* @description: Test runner for I2C_Eeprom Test App
838 and I2C_Eeprom BareMetal Test App
840 @requirements:PRSDK-6918, PRSDK-6919, PRSDK-6922,
841 PRSDK-6924, PRSDK-6930
843 @cores: mpu1_0, mcu1_0 */
845 UNITY_BEGIN();
846 #ifdef USE_BIOS
847 RUN_TEST(test_I2C_Eeprom_TestApp);
848 #else
849 RUN_TEST(test_I2C_Eeprom_BareMetal_TestApp);
850 #endif
851 UNITY_END();
852 /* Function to print results defined in our unity_config.h file */
853 print_unityOutputBuffer_usingUARTstdio();
854 }
855 #endif
857 #ifdef USE_BIOS
858 /*
859 * ======== test function ========
860 */
861 void i2c_test(UArg arg0, UArg arg1)
862 #else
863 int main ()
864 #endif
865 {
866 #if defined(UNITY_INCLUDE_CONFIG_H) && (defined(SOC_J721E) || defined(SOC_J7200))
867 test_I2C_Eeprom_TestApp_runner();
868 #else
869 bool testResult = true;
870 uint32_t i;
871 I2C_Tests *test;
873 if (Board_initI2C() == false)
874 {
875 #ifdef USE_BIOS
876 return;
877 #else
878 return(0);
879 #endif
880 }
882 for (i = 0; ; i++)
883 {
884 test = &I2c_tests[i];
885 if (test->testFunc == NULL)
886 {
887 break;
888 }
889 I2C_test_print_test_desc(test);
890 if (test->testFunc((void *)test) == true)
891 {
892 I2C_log("\r\n %s have passed\r\n", test->testDesc);
893 }
894 else
895 {
896 I2C_log("\r\n %s have failed\r\n", test->testDesc);
897 testResult = false;
898 break;
899 }
900 }
901 if(testResult == true)
902 {
903 I2C_log("\n All tests have passed. \n");
904 }
905 else
906 {
907 I2C_log("\n Some tests have failed. \n");
908 }
909 while (true)
910 {
911 }
912 #endif
913 }
915 #ifdef USE_BIOS
916 /*
917 * ======== main ========
918 */
919 int main(void)
920 {
921 I2c_appC7xPreInit();
923 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_OMAPL137)
924 Task_Handle task;
925 Error_Block eb;
927 Error_init(&eb);
929 task = Task_create(i2c_test, NULL, &eb);
930 if (task == NULL) {
931 System_printf("Task_create() failed!\n");
932 BIOS_exit(0);
933 }
934 #endif
936 #if defined (SOC_J721E) || defined(SOC_J7200)
937 Task_Handle task;
938 Error_Block eb;
939 Task_Params taskParams;
941 Error_init(&eb);
943 /* Initialize the task params */
944 Task_Params_init(&taskParams);
946 /* Set the task priority higher than the default priority (1) */
947 taskParams.priority = 2;
948 taskParams.stackSize = 0x8000;
950 task = Task_create(i2c_test, &taskParams, &eb);
951 if (task == NULL) {
952 System_printf("Task_create() failed!\n");
953 BIOS_exit(0);
954 }
955 #endif
957 /* Start BIOS */
958 BIOS_start();
959 return (0);
960 }
961 #endif /* #ifdef USE_BIOS */
963 #if defined(BUILD_MPU) || defined (__C7100__)
964 extern void Osal_initMmuDefault(void);
965 void InitMmu(void)
966 {
967 Osal_initMmuDefault();
968 }
969 #endif
971 void I2c_appC7xPreInit(void)
972 {
973 #if defined (__C7100__)
974 CSL_ClecEventConfig cfgClec;
975 CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs*) CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
976 uint32_t i, maxInputs = 2048U;
978 /* make secure claim bit to FALSE so that after we switch to non-secure mode
979 * we can program the CLEC MMRs
980 */
981 cfgClec.secureClaimEnable = FALSE;
982 cfgClec.evtSendEnable = FALSE;
983 cfgClec.rtMap = CSL_CLEC_RTMAP_DISABLE;
984 cfgClec.extEvtNum = 0U;
985 cfgClec.c7xEvtNum = 0U;
986 for(i = 0U; i < maxInputs; i++)
987 {
988 CSL_clecConfigEvent(clecBaseAddr, i, &cfgClec);
989 }
990 #endif
992 return;
993 }