1 /**
2 * \file main_test.c
3 *
4 * \brief Example application main file. This application will read the data
5 * from eeprom and compares it with the known data.
6 *
7 * On J7200 - The EEPROM is connected to the i2c which is in wakeup
8 * domain. The I2C driver, by default supports all
9 * all instances in MCU and Main Domain only.
10 *
11 * This test demonstrates steps required to add support for
12 * an instance that's not natively supported by the driver.
13 *
14 */
16 /*
17 * Copyright (C) 2014 - 2020 Texas Instruments Incorporated - http://www.ti.com/
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions
21 * are met:
22 *
23 * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 *
26 * Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in the
28 * documentation and/or other materials provided with the
29 * distribution.
30 *
31 * Neither the name of Texas Instruments Incorporated nor the names of
32 * its contributors may be used to endorse or promote products derived
33 * from this software without specific prior written permission.
34 *
35 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46 *
47 */
49 #ifdef USE_BIOS
50 /* XDCtools Header files */
51 #include <xdc/std.h>
52 #include <xdc/runtime/System.h>
53 #include <xdc/runtime/Error.h>
55 /* BIOS Header files */
56 #include <ti/sysbios/BIOS.h>
57 #include <ti/sysbios/knl/Task.h>
58 #endif /* #ifdef USE_BIOS */
60 #include <stdio.h>
61 #include <string.h>
63 /* TI-RTOS Header files */
64 #include <ti/drv/i2c/I2C.h>
65 #include <ti/drv/i2c/soc/I2C_soc.h>
66 #include "I2C_log.h"
67 #include "I2C_board.h"
68 #ifdef SOC_AM65XX
69 #include <ti/csl/soc.h>
70 #include <ti/drv/sciclient/sciclient.h>
71 #endif
73 #if defined (SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM65XX) || defined(SOC_AM64X)
74 #include <ti/csl/soc.h>
75 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
76 #include <ti/csl/csl_chipAux.h>
77 #endif
78 #include <ti/drv/sciclient/sciclient.h>
79 #endif
81 #if defined (BUILD_C7X_1)
82 #include <ti/csl/csl_clec.h>
83 #endif
85 #include <ti/csl/arch/r5/csl_arm_r5.h>
87 #if defined (__C7100__)
88 #include <ti/csl/arch/csl_arch.h>
89 #endif
91 #if defined(UNITY_INCLUDE_CONFIG_H) && (defined(SOC_J721E) || defined(SOC_J7200) || defined(SOC_AM65XX) || defined(SOC_AM64X))
92 #include <ti/build/unit-test/Unity/src/unity.h>
93 #include <ti/build/unit-test/config/unity_config.h>
94 #endif
96 void I2c_appC7xPreInit(void);
98 /* Define the I2C test interface */
99 typedef struct I2C_Tests_s
100 {
101 bool (*testFunc)(void *);
102 int32_t testId;
103 bool dmaMode;
104 bool intrMode;
105 bool cbMode;
106 uint32_t timeout;
107 char testDesc[80];
109 } I2C_Tests;
111 /* I2C test ID definitions */
112 #define I2C_TEST_ID_BIT_RATE 0 /* I2C bit rate test in interrupt mode */
113 #define I2C_TEST_ID_PROBE_BUS_FREQ 1 /* I2C probe bus frequency Test in interrupt mode */
114 #define I2C_TEST_ID_TIMEOUT_INT 2 /* I2C timeout test in interrupt mode */
115 #define I2C_TEST_ID_TIMEOUT_POLLING 3 /* I2C timeout test in polling mode */
118 #if defined (SOC_AM335X) || defined (SOC_AM437x)
119 /* EEPROM data -Board specific */
120 extern char eepromData[I2C_EEPROM_RX_LENGTH];
121 #endif
123 /**********************************************************************
124 ************************** Macros ************************************
125 **********************************************************************/
127 #define I2C_TRANSACTION_TIMEOUT (10000U)
129 #if defined (SOC_J721E)
130 /* By default for, first available output from IR */
131 #define I2C_INST_WKUP_I2C0_INT_NUM_MAIN (CSLR_R5FSS0_CORE0_INTR_R5FSS0_INTROUTER0_OUTL_0)
132 #endif
134 #if defined (SOC_J7200)
135 /* Applicable for MCU 20/21 only */
136 #define I2C_INST_WKUP_I2C0_INT_NUM_MAIN (CSLR_R5FSS0_CORE0_INTR_WKUP_I2C0_POINTRPEND_0)
137 #endif /* J7200 Specific */
138 /**********************************************************************
139 ************************** Internal functions ************************
140 **********************************************************************/
142 /**********************************************************************
143 ************************** Global Variables **************************
144 **********************************************************************/
146 #if defined (idkAM572x)
147 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x32,
148 0x49, 0x44};
149 #elif defined (idkAM574x)
150 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x34,
151 0x49, 0x44};
152 #elif defined (idkAM571x)
153 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x31,
154 0x49, 0x44};
155 #elif defined (evmAM572x)
156 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4d, 0x35, 0x37, 0x32,
157 0x50, 0x4d};
158 #elif defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (EVM_OMAPL137)
159 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
160 0x09, 0x10};
161 #elif defined (evmC6678) || defined (evmC6657) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm) || defined(j7200_evm) || defined (am64x_evm)
162 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
163 0x00, 0x00};
164 #else
165 #endif
167 /*
168 * ======== Board_initI2C ========
169 */
170 bool Board_initI2C(void)
171 {
172 Board_initCfg boardCfg;
173 Board_STATUS boardStatus;
174 #if defined (idkAM571x)
175 Board_IDInfo id;
176 #endif
177 I2C_HwAttrs i2c_cfg;
178 #if defined (evmK2G)
179 Board_SoCInfo socInfo;
180 #endif
182 #if defined(evmK2E) || defined(evmC6678)
183 boardCfg = BOARD_INIT_MODULE_CLOCK |
184 BOARD_INIT_UART_STDIO;
185 #else
186 boardCfg = BOARD_INIT_PINMUX_CONFIG |
187 BOARD_INIT_MODULE_CLOCK |
188 BOARD_INIT_UART_STDIO;
189 #endif
190 boardStatus = Board_init(boardCfg);
191 if (boardStatus != BOARD_SOK)
192 {
193 return (false);
194 }
196 I2C_init();
198 /* Get the default I2C init configurations */
199 I2C_socGetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
201 /* Modify the default I2C configurations if necessary */
202 #if defined(SOC_AM65XX)
203 /* No I2C instanced connected to eeprom in main domain, use i2c instance in wakeup domain */
204 i2c_cfg.baseAddr = CSL_WKUP_I2C0_CFG_BASE;
205 #if defined (__aarch64__)
206 i2c_cfg.intNum = CSL_GIC0_INTR_WKUP_I2C0_BUS_POINTRPEND;
207 #else
208 i2c_cfg.intNum = CSL_MCU0_INTR_I2C0_POINTRPEND;
209 #endif
210 #endif
212 #if defined (SOC_J721E) || defined(SOC_J7200)
213 /* No I2C instanced connected to eeprom in main domain, use i2c instance in wakeup domain */
214 i2c_cfg.baseAddr = CSL_WKUP_I2C0_CFG_BASE;
215 #if defined (BUILD_MPU)
216 i2c_cfg.intNum = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_WKUP_I2C0_POINTRPEND_0;
217 #endif
218 #if defined (BUILD_MCU)
219 CSL_ArmR5CPUInfo info;
221 CSL_armR5GetCpuID(&info);
222 if (info.grpId != (uint32_t)CSL_ARM_R5_CLUSTER_GROUP_ID_0)
223 {
224 /*
225 * Pulsar R5 core is on the Main domain, use the Main Pulsar
226 * interrupt router
227 */
228 if(info.cpuID == 0U)
229 {
230 i2c_cfg.intNum = I2C_INST_WKUP_I2C0_INT_NUM_MAIN;
231 }
232 else
233 {
234 i2c_cfg.intNum = I2C_INST_WKUP_I2C0_INT_NUM_MAIN + 128U;
235 }
236 }
237 else
238 {
239 /* Pulsar R5 core is on the MCU domain */
240 i2c_cfg.intNum = CSLR_MCU_R5FSS0_CORE0_INTR_WKUP_I2C0_POINTRPEND_0;
241 }
242 #endif
243 #if defined (BUILD_C7X_1)
244 i2c_cfg.eventId = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_WKUP_I2C0_POINTRPEND_0 + 992U, /* eventId, input event # to CLEC */
245 #endif
246 #endif
248 /* Set the default I2C init configurations */
249 I2C_socSetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
251 /* --- TODO: move this into the board library --- */
252 /* For SYSBIOS only */
253 #ifndef BAREMETAL
254 #if defined (SOC_J721E)
255 /* set up C7x CLEC for DMTimer0 */
256 #if defined (BUILD_C7X_1)
257 CSL_ClecEventConfig cfgClec;
258 CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
259 uint32_t input = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_TIMER0_INTR_PEND_0 + 992; /* Used for Timer Interrupt */
261 /* Configure CLEC for DMTimer0, SYS/BIOS uses interrupt 14 for DMTimer0 by default */
262 cfgClec.secureClaimEnable = FALSE;
263 cfgClec.evtSendEnable = TRUE;
264 cfgClec.rtMap = CSL_CLEC_RTMAP_CPU_ALL;
265 cfgClec.extEvtNum = 0;
266 cfgClec.c7xEvtNum = 14;
267 CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
268 #endif /* for C7X cores */
270 /* set up C66x Interrupt Router for DMTimer0 for C66x */
271 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
272 int32_t retVal;
273 struct tisci_msg_rm_irq_set_req rmIrqReq;
274 struct tisci_msg_rm_irq_set_resp rmIrqResp;
275 uint16_t dst_id;
276 uint16_t dst_host_irq;
278 /* Set up C66x interrupt router for DMTimer0 */
279 memset (&rmIrqReq, 0, sizeof(rmIrqReq));
280 rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
281 rmIrqReq.src_id = TISCI_DEV_TIMER0;
282 rmIrqReq.src_index = 0; /* set to 0 for non-event based interrupt */
284 /* Set the destination interrupt */
285 rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
286 rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
288 if (CSL_chipReadDNUM() == 0U)
289 {
290 /* Set the destination for core0 */
291 dst_id = TISCI_DEV_C66SS0_CORE0;
292 /* rmIrqReq.dst_host_irq has to match the DMTimer.timerSettings[0].eventId defined in sysbios_c66.cfg */
293 dst_host_irq = 21U;
294 }
295 else
296 {
297 /* Set the destination for core1 */
298 dst_id = TISCI_DEV_C66SS1_CORE0;
299 dst_host_irq = 20U;
300 }
301 rmIrqReq.dst_id = dst_id;
302 rmIrqReq.dst_host_irq = dst_host_irq; /* DMSC dest event, input to C66x INTC */
304 /* Config event */
305 retVal = Sciclient_rmIrqSet(
306 (const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,
307 &rmIrqResp,
308 SCICLIENT_SERVICE_WAIT_FOREVER);
309 if(0U != retVal)
310 {
311 return (false);
312 }
313 #endif /* for C66X cores */
314 #endif /* for SOC_J721E */
315 #endif /* for SYSBIOS */
316 /* --- TODO: move this into the board library --- */
318 #if defined (idkAM571x)
319 boardStatus = Board_getIDInfo(&id);
320 if (boardStatus != BOARD_SOK)
321 {
322 return (false);
323 }
324 memcpy(eepromData, &id.header[I2C_EEPROM_TEST_ADDR],
325 BOARD_EEPROM_HEADER_LENGTH - I2C_EEPROM_TEST_ADDR);
326 memcpy(&eepromData[BOARD_EEPROM_HEADER_LENGTH - I2C_EEPROM_TEST_ADDR],
327 id.boardName,
328 I2C_EEPROM_TEST_LENGTH - BOARD_EEPROM_HEADER_LENGTH + I2C_EEPROM_TEST_ADDR);
329 #endif
331 #if defined (evmK2G)
332 /* Read the SoC info to get the System clock value */
333 Board_getSoCInfo(&socInfo);
334 if(socInfo.sysClock != BOARD_SYS_CLK_DEFAULT)
335 {
336 /* Get the default I2C init configurations */
337 I2C_socGetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
338 /* Update the I2C functional clock based on CPU clock - 1G or 600MHz */
339 i2c_cfg.funcClk = socInfo.sysClock/6;
340 /* Set the default I2C init configurations */
341 I2C_socSetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
342 }
343 #endif
346 I2C_log("\n I2C Test: Using Instance %d", I2C_EEPROM_INSTANCE);
347 return (true);
348 }
350 /*
351 * ======== I2C init config ========
352 */
353 static void I2C_initConfig(uint32_t instance, I2C_Tests *test)
354 {
355 I2C_HwAttrs i2c_cfg;
357 /* Get the default SPI init configurations */
358 I2C_socGetInitCfg(instance, &i2c_cfg);
360 #if defined (SOC_J721E)
361 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
362 /*
363 * There is no interrupt routing supported in sciclient to
364 * route wakeup domain I2C0 interrupt to C66x cores due to
365 * the hardware limitation, use polling mode for eeprom test
366 */
367 i2c_cfg.enableIntr = false;
368 #else
369 i2c_cfg.enableIntr = test->intrMode;
370 #endif
371 #else
372 i2c_cfg.enableIntr = test->intrMode;
373 #endif
375 /* Set the SPI init configurations */
376 I2C_socSetInitCfg(instance, &i2c_cfg);
377 }
379 /*
380 * ======== CompareData ========
381 */
382 static bool CompareData(char *expData, char *rxData, uint32_t length)
383 {
384 uint32_t idx = 0;
385 uint32_t match = 1;
386 bool retVal = false;
388 for(idx = 0; ((idx < length) && (match != 0)); idx++)
389 {
390 if(*expData != *rxData) match = 0;
391 expData++;
392 rxData++;
393 }
395 if(match == 1) retVal = true;
397 return retVal;
398 }
400 static bool i2c_bitrate_test (I2C_BitRate bitRate, I2C_Tests *test)
401 {
402 char bitRateLog[4][10] = {"100Kbps", "400Kbps", "1Mbps", "3.4Mbps"};
403 I2C_Params i2cParams;
404 I2C_Handle handle = NULL;
405 I2C_Transaction i2cTransaction;
406 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
407 char rxBuf[I2C_EEPROM_TEST_LENGTH];
408 int16_t status;
409 bool copyData = FALSE;
410 bool testStatus = true;
412 /* Set the I2C EEPROM write/read address */
413 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
414 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
416 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
418 I2C_Params_init(&i2cParams);
420 /* Set bitRate */
421 i2cParams.bitRate = bitRate;
422 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
423 if (handle == NULL)
424 {
425 goto Err;
426 }
428 #ifdef I2C_EEPROM_WRITE_ENABLE
429 /* Write to EEPROM */
430 memcpy(&txBuf[I2C_EEPROM_ADDR_SIZE], eepromData, I2C_EEPROM_TEST_LENGTH);
431 I2C_transactionInit(&i2cTransaction);
432 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
433 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
434 i2cTransaction.writeCount = I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE;
435 i2cTransaction.readBuf = NULL;
436 i2cTransaction.readCount = 0;
437 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
438 status = I2C_transfer(handle, &i2cTransaction);
440 if(I2C_STS_SUCCESS != status)
441 {
442 I2C_log("\n I2C Test: ");
443 I2C_log(bitRateLog[bitRate]);
444 I2C_log(": Write Data Transfer failed. \n");
445 testStatus = false;
446 goto Err;
447 }
449 #if defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm) || defined (j7200_evm) || defined (am64x_evm)
450 BOARD_delay(I2C_EEPROM_TEST_DELAY);
451 #endif
452 #else
453 #if defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (EVM_OMAPL137) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm) || defined(j7200) || defined (am64x_evm)
454 /* EEPROM write disabled on K2, need copy data */
455 copyData = TRUE;
456 #endif
457 #endif
458 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
459 I2C_transactionInit(&i2cTransaction);
460 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
461 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
462 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
463 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
464 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
465 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
466 status = I2C_transfer(handle, &i2cTransaction);
468 if(I2C_STS_SUCCESS != status)
469 {
470 I2C_log("\n I2C Test: ");
471 I2C_log(bitRateLog[bitRate]);
472 I2C_log(": Read Data Transfer failed. \n");
473 testStatus = false;
474 goto Err;
475 }
476 else
477 {
478 #if defined (evmC6678) || defined (evmC6657) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm) || defined (j7200_evm) || defined (am64x_evm)
479 copyData = TRUE;
480 #endif
482 /* read only test, copy data from rx buffer to eepromData to pass the test */
483 if (copyData)
484 memcpy(eepromData, rxBuf, I2C_EEPROM_TEST_LENGTH);
486 testStatus = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
487 if(false == testStatus)
488 {
489 I2C_log("\n I2C Test: ");
490 I2C_log(bitRateLog[bitRate]);
491 I2C_log(": Data Mismatch \n");
492 }
493 }
495 Err:
496 if (handle)
497 {
498 I2C_close(handle);
499 }
501 return (testStatus);
502 }
504 static bool I2C_bitrate_test(void *arg)
505 {
506 bool testResult = true;
507 uint32_t i;
509 for (i = 0; i < 2; i++)
510 {
511 testResult = i2c_bitrate_test((I2C_BitRate)i, (I2C_Tests *)arg);
512 if (testResult == false)
513 {
514 break;
515 }
516 }
518 return (testResult);
519 }
522 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_AM571x) || defined (SOC_AM572x) || defined (SOC_AM574x) || defined (SOC_AM65XX) || defined (SOC_J721E) || defined (SOC_J7200) || defined (SOC_AM64X)
523 static bool I2C_Probe_BusFrequency_test(void *arg)
524 {
525 I2C_Handle handle;
526 I2C_Params i2cParams;
527 uint32_t busFrequency;
528 bool status = false;
529 int16_t transferStatus;
530 I2C_Transaction i2cTransaction;
531 uint32_t slaveAddress;
532 int32_t controlStatus;
533 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
534 char rxBuf[I2C_EEPROM_TEST_LENGTH];
535 uint32_t delayValue;
536 I2C_Tests *test = (I2C_Tests *)arg;
538 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
540 I2C_Params_init(&i2cParams);
541 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
542 if (handle == NULL)
543 {
544 goto Err;
545 }
547 /* Set the I2C EEPROM write/read address */
548 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
549 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
552 /* Test Runtime Configuration of Bus Frequency */
554 /* Test runtime configuration of 400 kHz */
555 busFrequency = I2C_400kHz;
556 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
558 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
559 I2C_transactionInit(&i2cTransaction);
560 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
561 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
562 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
563 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
564 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
565 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
566 transferStatus = I2C_transfer(handle, &i2cTransaction);
568 if(I2C_STS_SUCCESS != transferStatus)
569 {
570 I2C_log("\n I2C Test: Dynamic configuration of bus Freq failed. \n");
571 goto Err;
572 }
574 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
576 if(true == status)
577 {
578 /* Test runtime configuration of 100 kHz */
579 busFrequency = I2C_100kHz;
580 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
582 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
583 I2C_transactionInit(&i2cTransaction);
584 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
585 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
586 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
587 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
588 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
589 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
590 transferStatus = I2C_transfer(handle, &i2cTransaction);
592 if(I2C_STS_SUCCESS != transferStatus)
593 {
594 I2C_log("\n I2C Test: Dynamic configuration of bus Freq failed. \n");
595 goto Err;
596 }
598 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
599 }
601 /* Test Probe functionality */
603 if(true == status)
604 {
605 /* Probe test with valid slave address */
606 slaveAddress = I2C_EEPROM_ADDR;
607 controlStatus = I2C_control(handle, I2C_CMD_PROBE, &slaveAddress);
609 if(I2C_STATUS_SUCCESS == controlStatus)
610 {
611 status = true;
612 }
613 else
614 {
615 status = false;
616 I2C_log("\n I2C Test: Probe test failed. \n");
617 goto Err;
618 }
619 }
621 if(true == status)
622 {
623 /* Probe test with invalid slave address */
624 slaveAddress = 0x70U;
625 controlStatus = I2C_control(handle, I2C_CMD_PROBE, &slaveAddress);
627 if(I2C_STATUS_ERROR == controlStatus)
628 {
629 status = true;
630 }
631 else
632 {
633 status = false;
634 I2C_log("\n I2C Test: Probe test failed. \n");
635 goto Err;
636 }
637 }
639 if(true == status)
640 {
641 /* Test bus recovery functionality */
642 delayValue = 2000U;
643 controlStatus = I2C_control(handle, I2C_CMD_RECOVER_BUS, &delayValue);
645 if(I2C_STATUS_SUCCESS == controlStatus)
646 {
647 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
648 I2C_transactionInit(&i2cTransaction);
649 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
650 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
651 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
652 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
653 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
654 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
655 transferStatus = I2C_transfer(handle, &i2cTransaction);
657 if(I2C_STS_SUCCESS != transferStatus)
658 {
659 I2C_log("\n I2C Test: Bus recovery test failed. \n");
660 goto Err;
661 }
663 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
664 }
665 else
666 {
667 status = false;
668 }
669 }
671 Err:
672 if (handle)
673 {
674 I2C_close(handle);
675 }
676 return status;
677 }
679 static bool I2C_timeout_test(void *arg)
680 {
681 I2C_Handle handle;
682 I2C_Params i2cParams;
683 uint32_t busFrequency;
684 bool status = false;
685 int16_t transferStatus;
686 I2C_Transaction i2cTransaction;
687 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
688 char rxBuf[I2C_EEPROM_TEST_LENGTH];
689 I2C_Tests *test = (I2C_Tests *)arg;
691 /* Set the I2C EEPROM write/read address */
692 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
693 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
695 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
697 I2C_Params_init(&i2cParams);
698 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
699 if (handle == NULL)
700 {
701 goto Err;
702 }
704 /* Test Runtime Configuration of Bus Frequency */
706 /* Test runtime configuration of 400 kHz */
707 busFrequency = I2C_100kHz;
708 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
710 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
711 I2C_transactionInit(&i2cTransaction);
712 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
713 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
714 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
715 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
716 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
717 i2cTransaction.timeout = test->timeout;
718 transferStatus = I2C_transfer(handle, &i2cTransaction);
720 if(I2C_STS_ERR_TIMEOUT == transferStatus)
721 {
722 status = true;
723 }
725 Err:
726 if (handle)
727 {
728 I2C_close(handle);
729 }
731 return status;
732 }
733 #endif
735 void I2C_test_print_test_desc(I2C_Tests *test)
736 {
737 char testId[16] = {0, };
739 /* Print unit test ID */
740 sprintf(testId, "%d", test->testId);
741 I2C_log("\n I2C UT %s\n", testId);
743 /* Print test description */
744 I2C_log("\n %s\n", test->testDesc);
745 }
747 I2C_Tests I2c_tests[] =
748 {
749 /* testFunc testID dma intr cbMode timeout testDesc */
750 {I2C_bitrate_test, I2C_TEST_ID_BIT_RATE, false, true, false, SemaphoreP_WAIT_FOREVER, "\r\n I2C bit rate test in interrupt mode"},
751 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_AM571x) || defined (SOC_AM572x) || defined (SOC_AM574x) || defined (SOC_AM65XX) || defined (SOC_J721E) || defined (SOC_J7200) || defined (SOC_AM64X)
752 {I2C_Probe_BusFrequency_test, I2C_TEST_ID_PROBE_BUS_FREQ, false, true, false, SemaphoreP_WAIT_FOREVER, "\r\n I2C probe bus freq test in interrupt mode"},
753 {I2C_timeout_test, I2C_TEST_ID_TIMEOUT_INT, false, true, false, 1, "\r\n I2C timeout test in interrupt mode"},
754 #endif
755 {NULL, },
756 };
759 #if defined(UNITY_INCLUDE_CONFIG_H) && (defined(SOC_J721E) || defined(SOC_J7200) || defined (SOC_AM65XX) || defined (SOC_AM64X))
760 /*
761 * ======== Unity set up and tear down ========
762 */
763 void setUp(void)
764 {
765 /* Do nothing */
766 }
768 void tearDown(void)
769 {
770 /* Do nothing */
771 }
773 bool test_I2C_Eeprom_common(void)
774 {
775 bool testResult = true;
776 uint32_t i;
777 I2C_Tests *test;
779 if (Board_initI2C() == false)
780 {
781 I2C_log("\r\n %s Board_initI2C failed\r\n");
782 #ifdef UNITY_INCLUDE_CONFIG_H
783 TEST_FAIL();
784 #endif
785 while(1);
786 }
788 for (i = 0; ; i++)
789 {
790 test = &I2c_tests[i];
791 if (test->testFunc == NULL)
792 {
793 break;
794 }
795 I2C_test_print_test_desc(test);
796 if (test->testFunc((void *)test) == true)
797 {
798 I2C_log("\r\n %s have passed\r\n", test->testDesc);
799 }
800 else
801 {
802 I2C_log("\r\n %s have failed\r\n", test->testDesc);
803 testResult = false;
804 break;
805 }
806 }
807 return testResult;
808 }
810 void test_I2C_Eeprom_TestApp(void)
811 {
812 bool testResult = true;
813 testResult = test_I2C_Eeprom_common();
815 if(testResult == true)
816 {
817 I2C_log("\n All tests have passed. \n");
818 #ifdef UNITY_INCLUDE_CONFIG_H
819 TEST_PASS();
820 #endif
821 }
822 else
823 {
824 I2C_log("\n Some tests have failed. \n");
825 #ifdef UNITY_INCLUDE_CONFIG_H
826 TEST_FAIL();
827 #endif
828 }
830 while (true)
831 {
832 }
833 }
835 void test_I2C_Eeprom_BareMetal_TestApp(void)
836 {
837 bool testResult = true;
838 testResult = test_I2C_Eeprom_common();
840 if(testResult == true)
841 {
842 I2C_log("\n All tests have passed. \n");
843 #ifdef UNITY_INCLUDE_CONFIG_H
844 TEST_PASS();
845 #endif
846 }
847 else
848 {
849 I2C_log("\n Some tests have failed. \n");
850 #ifdef UNITY_INCLUDE_CONFIG_H
851 TEST_FAIL();
852 #endif
853 }
855 while (true)
856 {
857 }
858 }
860 void test_I2C_Eeprom_TestApp_runner(void)
861 {
862 /* @description: Test runner for I2C_Eeprom Test App
863 and I2C_Eeprom BareMetal Test App
865 @requirements:PRSDK-6918, PRSDK-6919, PRSDK-6922,
866 PRSDK-6924, PRSDK-6930
868 @cores: mpu1_0, mcu1_0 */
870 UNITY_BEGIN();
871 #ifdef USE_BIOS
872 RUN_TEST(test_I2C_Eeprom_TestApp);
873 #else
874 RUN_TEST(test_I2C_Eeprom_BareMetal_TestApp);
875 #endif
876 UNITY_END();
877 /* Function to print results defined in our unity_config.h file */
878 print_unityOutputBuffer_usingUARTstdio();
879 }
880 #endif
882 #ifdef USE_BIOS
883 /*
884 * ======== test function ========
885 */
886 void i2c_test(UArg arg0, UArg arg1)
887 #else
888 int main ()
889 #endif
890 {
891 #if defined(UNITY_INCLUDE_CONFIG_H) && (defined(SOC_J721E) || defined(SOC_J7200) || defined (SOC_AM65XX) || defined (SOC_AM64X))
892 test_I2C_Eeprom_TestApp_runner();
893 #else
894 bool testResult = true;
895 uint32_t i;
896 I2C_Tests *test;
898 if (Board_initI2C() == false)
899 {
900 #ifdef USE_BIOS
901 return;
902 #else
903 return(0);
904 #endif
905 }
907 for (i = 0; ; i++)
908 {
909 test = &I2c_tests[i];
910 if (test->testFunc == NULL)
911 {
912 break;
913 }
914 I2C_test_print_test_desc(test);
915 if (test->testFunc((void *)test) == true)
916 {
917 I2C_log("\r\n %s have passed\r\n", test->testDesc);
918 }
919 else
920 {
921 I2C_log("\r\n %s have failed\r\n", test->testDesc);
922 testResult = false;
923 break;
924 }
925 }
926 if(testResult == true)
927 {
928 I2C_log("\n All tests have passed. \n");
929 }
930 else
931 {
932 I2C_log("\n Some tests have failed. \n");
933 }
934 while (true)
935 {
936 }
937 #endif
938 }
940 #ifdef USE_BIOS
941 /*
942 * ======== main ========
943 */
944 int main(void)
945 {
946 I2c_appC7xPreInit();
948 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_OMAPL137)
949 Task_Handle task;
950 Error_Block eb;
952 Error_init(&eb);
954 task = Task_create(i2c_test, NULL, &eb);
955 if (task == NULL) {
956 System_printf("Task_create() failed!\n");
957 BIOS_exit(0);
958 }
959 #endif
961 #if defined (SOC_J721E) || defined(SOC_J7200) || defined (SOC_AM65XX) || defined (SOC_AM64X)
962 Task_Handle task;
963 Error_Block eb;
964 Task_Params taskParams;
966 Error_init(&eb);
968 /* Initialize the task params */
969 Task_Params_init(&taskParams);
971 /* Set the task priority higher than the default priority (1) */
972 taskParams.priority = 2;
973 taskParams.stackSize = 0x8000;
975 task = Task_create(i2c_test, &taskParams, &eb);
976 if (task == NULL) {
977 System_printf("Task_create() failed!\n");
978 BIOS_exit(0);
979 }
980 #endif
982 /* Start BIOS */
983 BIOS_start();
984 return (0);
985 }
986 #endif /* #ifdef USE_BIOS */
988 #if defined(BUILD_MPU) || defined (__C7100__)
989 extern void Osal_initMmuDefault(void);
990 void InitMmu(void)
991 {
992 Osal_initMmuDefault();
993 }
994 #endif
996 void I2c_appC7xPreInit(void)
997 {
998 #if defined (__C7100__)
999 CSL_ClecEventConfig cfgClec;
1000 CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs*) CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
1001 uint32_t i, maxInputs = 2048U;
1003 /* make secure claim bit to FALSE so that after we switch to non-secure mode
1004 * we can program the CLEC MMRs
1005 */
1006 cfgClec.secureClaimEnable = FALSE;
1007 cfgClec.evtSendEnable = FALSE;
1008 cfgClec.rtMap = CSL_CLEC_RTMAP_DISABLE;
1009 cfgClec.extEvtNum = 0U;
1010 cfgClec.c7xEvtNum = 0U;
1011 for(i = 0U; i < maxInputs; i++)
1012 {
1013 CSL_clecConfigEvent(clecBaseAddr, i, &cfgClec);
1014 }
1015 #endif
1017 return;
1018 }