1 /**
2 * \file main_test.c
3 *
4 * \brief Example application main file. This application will read the data
5 * from eeprom and compares it with the known data.
6 *
7 */
9 /*
10 * Copyright (C) 2014 - 2019 Texas Instruments Incorporated - http://www.ti.com/
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 */
42 #ifdef USE_BIOS
43 /* XDCtools Header files */
44 #include <xdc/std.h>
45 #include <xdc/runtime/System.h>
46 #include <xdc/runtime/Error.h>
48 /* BIOS Header files */
49 #include <ti/sysbios/BIOS.h>
50 #include <ti/sysbios/knl/Task.h>
51 #endif /* #ifdef USE_BIOS */
53 #include <stdio.h>
54 #include <string.h>
56 /* TI-RTOS Header files */
57 #include <ti/drv/i2c/I2C.h>
58 #include <ti/drv/i2c/soc/I2C_soc.h>
59 #include "I2C_log.h"
60 #include "I2C_board.h"
61 #ifdef SOC_AM65XX
62 #include <ti/csl/soc.h>
63 #include <ti/drv/sciclient/sciclient.h>
64 #endif
66 #ifdef SOC_J721E
67 #include <ti/csl/soc.h>
68 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
69 #include <ti/csl/csl_chipAux.h>
70 #endif
71 #include <ti/drv/sciclient/sciclient.h>
72 #endif
74 #include <ti/csl/csl_clec.h>
76 #include <ti/csl/arch/r5/csl_arm_r5.h>
78 #if defined (__C7100__)
79 #include <ti/csl/arch/csl_arch.h>
80 #endif
82 void I2c_appC7xPreInit(void);
84 /* Define the I2C test interface */
85 typedef struct I2C_Tests_s
86 {
87 bool (*testFunc)(void *);
88 int32_t testId;
89 bool dmaMode;
90 bool intrMode;
91 bool cbMode;
92 uint32_t timeout;
93 char testDesc[80];
95 } I2C_Tests;
97 /* I2C test ID definitions */
98 #define I2C_TEST_ID_BIT_RATE 0 /* I2C bit rate test in interrupt mode */
99 #define I2C_TEST_ID_PROBE_BUS_FREQ 1 /* I2C probe bus frequency Test in interrupt mode */
100 #define I2C_TEST_ID_TIMEOUT_INT 2 /* I2C timeout test in interrupt mode */
101 #define I2C_TEST_ID_TIMEOUT_POLLING 3 /* I2C timeout test in polling mode */
104 #if defined (SOC_AM335X) || defined (SOC_AM437x)
105 /* EEPROM data -Board specific */
106 extern char eepromData[I2C_EEPROM_RX_LENGTH];
107 #endif
109 /**********************************************************************
110 ************************** Macros ************************************
111 **********************************************************************/
113 #define I2C_TRANSACTION_TIMEOUT (10000U)
116 /**********************************************************************
117 ************************** Internal functions ************************
118 **********************************************************************/
120 /**********************************************************************
121 ************************** Global Variables **************************
122 **********************************************************************/
124 #if defined (idkAM572x)
125 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x32,
126 0x49, 0x44};
127 #elif defined (idkAM574x)
128 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x34,
129 0x49, 0x44};
130 #elif defined (idkAM571x)
131 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4D, 0x35, 0x37, 0x31,
132 0x49, 0x44};
133 #elif defined (evmAM572x)
134 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x55, 0x33, 0xEE, 0x41, 0x4d, 0x35, 0x37, 0x32,
135 0x50, 0x4d};
136 #elif defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (EVM_OMAPL137)
137 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
138 0x09, 0x10};
139 #elif defined (evmC6678) || defined (evmC6657) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm)
140 char eepromData[I2C_EEPROM_TEST_LENGTH] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
141 0x00, 0x00};
142 #else
143 #endif
145 /*
146 * ======== Board_initI2C ========
147 */
148 bool Board_initI2C(void)
149 {
150 Board_initCfg boardCfg;
151 Board_STATUS boardStatus;
152 #if defined (idkAM571x)
153 Board_IDInfo id;
154 #endif
155 I2C_HwAttrs i2c_cfg;
156 #if defined (evmK2G)
157 Board_SoCInfo socInfo;
158 #endif
160 #if defined(evmK2E) || defined(evmC6678)
161 boardCfg = BOARD_INIT_MODULE_CLOCK |
162 BOARD_INIT_UART_STDIO;
163 #else
164 boardCfg = BOARD_INIT_PINMUX_CONFIG |
165 BOARD_INIT_MODULE_CLOCK |
166 BOARD_INIT_UART_STDIO;
167 #endif
168 boardStatus = Board_init(boardCfg);
169 if (boardStatus != BOARD_SOK)
170 {
171 return (false);
172 }
174 I2C_init();
176 /* Get the default I2C init configurations */
177 I2C_socGetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
179 /* Modify the default I2C configurations if necessary */
180 #if defined(SOC_AM65XX)
181 /* No I2C instanced connected to eeprom in main domain, use i2c instance in wakeup domain */
182 i2c_cfg.baseAddr = CSL_WKUP_I2C0_CFG_BASE;
183 #if defined (__aarch64__)
184 i2c_cfg.intNum = CSL_GIC0_INTR_WKUP_I2C0_BUS_POINTRPEND;
185 #else
186 i2c_cfg.intNum = CSL_MCU0_INTR_I2C0_POINTRPEND;
187 #endif
188 #endif
190 #if defined (SOC_J721E)
191 /* No I2C instanced connected to eeprom in main domain, use i2c instance in wakeup domain */
192 i2c_cfg.baseAddr = CSL_WKUP_I2C0_CFG_BASE;
193 #if defined (BUILD_MPU)
194 i2c_cfg.intNum = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_WKUP_I2C0_POINTRPEND_0;
195 #endif
196 #if defined (BUILD_MCU)
197 CSL_ArmR5CPUInfo info;
199 CSL_armR5GetCpuID(&info);
200 if (info.grpId != (uint32_t)CSL_ARM_R5_CLUSTER_GROUP_ID_0)
201 {
202 /*
203 * Pulsar R5 core is on the Main domain, use the Main Pulsar
204 * interrupt router
205 */
206 i2c_cfg.intNum = 256U; /* value 256 - 511 reserved for IR output */
207 }
208 else
209 {
210 /* Pulsar R5 core is on the MCU domain */
211 i2c_cfg.intNum = CSLR_MCU_R5FSS0_CORE0_INTR_WKUP_I2C0_POINTRPEND_0;
212 }
213 #endif
214 #if defined (BUILD_C7X_1)
215 i2c_cfg.eventId = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_WKUP_I2C0_POINTRPEND_0 + 992U, /* eventId, input event # to CLEC */
216 #endif
217 #endif
219 /* Set the default I2C init configurations */
220 I2C_socSetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
222 /* --- TODO: move this into the board library --- */
223 /* For SYSBIOS only */
224 #ifndef BAREMETAL
225 #if defined (SOC_J721E)
226 /* set up C7x CLEC for DMTimer0 */
227 #if defined (BUILD_C7X_1)
228 CSL_ClecEventConfig cfgClec;
229 CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
230 uint32_t input = CSLR_COMPUTE_CLUSTER0_GIC500SS_SPI_TIMER0_INTR_PEND_0 + 992; /* Used for Timer Interrupt */
232 /* Configure CLEC for DMTimer0, SYS/BIOS uses interrupt 14 for DMTimer0 by default */
233 cfgClec.secureClaimEnable = FALSE;
234 cfgClec.evtSendEnable = TRUE;
235 cfgClec.rtMap = CSL_CLEC_RTMAP_CPU_ALL;
236 cfgClec.extEvtNum = 0;
237 cfgClec.c7xEvtNum = 14;
238 CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
239 #endif /* for C7X cores */
241 /* set up C66x Interrupt Router for DMTimer0 for C66x */
242 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
243 int32_t retVal;
244 struct tisci_msg_rm_irq_set_req rmIrqReq;
245 struct tisci_msg_rm_irq_set_resp rmIrqResp;
246 uint16_t dst_id;
247 uint16_t dst_host_irq;
249 /* Set up C66x interrupt router for DMTimer0 */
250 memset (&rmIrqReq, 0, sizeof(rmIrqReq));
251 rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
252 rmIrqReq.src_id = TISCI_DEV_TIMER0;
253 rmIrqReq.src_index = 0; /* set to 0 for non-event based interrupt */
255 /* Set the destination interrupt */
256 rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
257 rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
259 if (CSL_chipReadDNUM() == 0U)
260 {
261 /* Set the destination for core0 */
262 dst_id = TISCI_DEV_C66SS0_CORE0;
263 /* rmIrqReq.dst_host_irq has to match the DMTimer.timerSettings[0].eventId defined in sysbios_c66.cfg */
264 dst_host_irq = 21U;
265 }
266 else
267 {
268 /* Set the destination for core1 */
269 dst_id = TISCI_DEV_C66SS1_CORE0;
270 dst_host_irq = 20U;
271 }
272 rmIrqReq.dst_id = dst_id;
273 rmIrqReq.dst_host_irq = dst_host_irq; /* DMSC dest event, input to C66x INTC */
275 /* Config event */
276 retVal = Sciclient_rmIrqSet(
277 (const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,
278 &rmIrqResp,
279 SCICLIENT_SERVICE_WAIT_FOREVER);
280 if(0U != retVal)
281 {
282 return (false);
283 }
284 #endif /* for C66X cores */
285 #endif /* for SOC_J721E */
286 #endif /* for SYSBIOS */
287 /* --- TODO: move this into the board library --- */
289 #if defined (idkAM571x)
290 boardStatus = Board_getIDInfo(&id);
291 if (boardStatus != BOARD_SOK)
292 {
293 return (false);
294 }
295 memcpy(eepromData, &id.header[I2C_EEPROM_TEST_ADDR],
296 BOARD_EEPROM_HEADER_LENGTH - I2C_EEPROM_TEST_ADDR);
297 memcpy(&eepromData[BOARD_EEPROM_HEADER_LENGTH - I2C_EEPROM_TEST_ADDR],
298 id.boardName,
299 I2C_EEPROM_TEST_LENGTH - BOARD_EEPROM_HEADER_LENGTH + I2C_EEPROM_TEST_ADDR);
300 #endif
302 #if defined (evmK2G)
303 /* Read the SoC info to get the System clock value */
304 Board_getSoCInfo(&socInfo);
305 if(socInfo.sysClock != BOARD_SYS_CLK_DEFAULT)
306 {
307 /* Get the default I2C init configurations */
308 I2C_socGetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
309 /* Update the I2C functional clock based on CPU clock - 1G or 600MHz */
310 i2c_cfg.funcClk = socInfo.sysClock/6;
311 /* Set the default I2C init configurations */
312 I2C_socSetInitCfg(I2C_EEPROM_INSTANCE, &i2c_cfg);
313 }
314 #endif
316 return (true);
317 }
319 /*
320 * ======== I2C init config ========
321 */
322 static void I2C_initConfig(uint32_t instance, I2C_Tests *test)
323 {
324 I2C_HwAttrs i2c_cfg;
326 /* Get the default SPI init configurations */
327 I2C_socGetInitCfg(instance, &i2c_cfg);
329 #if defined (SOC_J721E)
330 #if defined (BUILD_DSP_1) || defined (BUILD_DSP_2)
331 /*
332 * There is no interrupt routing supported in sciclient to
333 * route wakeup domain I2C0 interrupt to C66x cores due to
334 * the hardware limitation, use polling mode for eeprom test
335 */
336 i2c_cfg.enableIntr = false;
337 #else
338 i2c_cfg.enableIntr = test->intrMode;
339 #endif
340 #else
341 i2c_cfg.enableIntr = test->intrMode;
342 #endif
344 /* Set the SPI init configurations */
345 I2C_socSetInitCfg(instance, &i2c_cfg);
346 }
348 /*
349 * ======== CompareData ========
350 */
351 static bool CompareData(char *expData, char *rxData, uint32_t length)
352 {
353 uint32_t idx = 0;
354 uint32_t match = 1;
355 bool retVal = false;
357 for(idx = 0; ((idx < length) && (match != 0)); idx++)
358 {
359 if(*expData != *rxData) match = 0;
360 expData++;
361 rxData++;
362 }
364 if(match == 1) retVal = true;
366 return retVal;
367 }
369 static bool i2c_bitrate_test (I2C_BitRate bitRate, I2C_Tests *test)
370 {
371 char bitRateLog[4][10] = {"100Kbps", "400Kbps", "1Mbps", "3.4Mbps"};
372 I2C_Params i2cParams;
373 I2C_Handle handle = NULL;
374 I2C_Transaction i2cTransaction;
375 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
376 char rxBuf[I2C_EEPROM_TEST_LENGTH];
377 int16_t status;
378 bool copyData = FALSE;
379 bool testStatus = true;
381 /* Set the I2C EEPROM write/read address */
382 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
383 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
385 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
387 I2C_Params_init(&i2cParams);
389 /* Set bitRate */
390 i2cParams.bitRate = bitRate;
391 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
392 if (handle == NULL)
393 {
394 goto Err;
395 }
397 #ifdef I2C_EEPROM_WRITE_ENABLE
398 /* Write to EEPROM */
399 memcpy(&txBuf[I2C_EEPROM_ADDR_SIZE], eepromData, I2C_EEPROM_TEST_LENGTH);
400 I2C_transactionInit(&i2cTransaction);
401 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
402 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
403 i2cTransaction.writeCount = I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE;
404 i2cTransaction.readBuf = NULL;
405 i2cTransaction.readCount = 0;
406 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
407 status = I2C_transfer(handle, &i2cTransaction);
409 if(I2C_STS_SUCCESS != status)
410 {
411 I2C_log("\n I2C Test: ");
412 I2C_log(bitRateLog[bitRate]);
413 I2C_log(": Write Data Transfer failed. \n");
414 testStatus = false;
415 goto Err;
416 }
418 #if defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm)
419 BOARD_delay(I2C_EEPROM_TEST_DELAY);
420 #endif
421 #else
422 #if defined (evmK2H) || defined (evmK2K) || defined (evmK2E) || defined (evmK2L) || defined (evmK2G) || defined (iceK2G) || defined (EVM_OMAPL137) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm)
423 /* EEPROM write disabled on K2, need copy data */
424 copyData = TRUE;
425 #endif
426 #endif
427 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
428 I2C_transactionInit(&i2cTransaction);
429 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
430 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
431 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
432 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
433 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
434 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
435 status = I2C_transfer(handle, &i2cTransaction);
437 if(I2C_STS_SUCCESS != status)
438 {
439 I2C_log("\n I2C Test: ");
440 I2C_log(bitRateLog[bitRate]);
441 I2C_log(": Read Data Transfer failed. \n");
442 testStatus = false;
443 goto Err;
444 }
445 else
446 {
447 #if defined (evmC6678) || defined (evmC6657) || defined (am65xx_evm) || defined (am65xx_idk) || defined (j721e_sim) || defined (j721e_evm)
448 copyData = TRUE;
449 #endif
451 /* read only test, copy data from rx buffer to eepromData to pass the test */
452 if (copyData)
453 memcpy(eepromData, rxBuf, I2C_EEPROM_TEST_LENGTH);
455 testStatus = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
456 if(false == testStatus)
457 {
458 I2C_log("\n I2C Test: ");
459 I2C_log(bitRateLog[bitRate]);
460 I2C_log(": Data Mismatch \n");
461 }
462 }
464 Err:
465 if (handle)
466 {
467 I2C_close(handle);
468 }
470 return (testStatus);
471 }
473 static bool I2C_bitrate_test(void *arg)
474 {
475 bool testResult = true;
476 uint32_t i;
478 for (i = 0; i < 2; i++)
479 {
480 testResult = i2c_bitrate_test((I2C_BitRate)i, (I2C_Tests *)arg);
481 if (testResult == false)
482 {
483 break;
484 }
485 }
487 return (testResult);
488 }
491 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_AM571x) || defined (SOC_AM572x) || defined (SOC_AM574x) || defined (SOC_AM65XX) || defined (SOC_J721E)
492 static bool I2C_Probe_BusFrequency_test(void *arg)
493 {
494 I2C_Handle handle;
495 I2C_Params i2cParams;
496 uint32_t busFrequency;
497 bool status = false;
498 int16_t transferStatus;
499 I2C_Transaction i2cTransaction;
500 uint32_t slaveAddress;
501 int32_t controlStatus;
502 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
503 char rxBuf[I2C_EEPROM_TEST_LENGTH];
504 uint32_t delayValue;
505 I2C_Tests *test = (I2C_Tests *)arg;
507 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
509 I2C_Params_init(&i2cParams);
510 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
511 if (handle == NULL)
512 {
513 goto Err;
514 }
516 /* Set the I2C EEPROM write/read address */
517 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
518 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
521 /* Test Runtime Configuration of Bus Frequency */
523 /* Test runtime configuration of 400 kHz */
524 busFrequency = I2C_400kHz;
525 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
527 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
528 I2C_transactionInit(&i2cTransaction);
529 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
530 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
531 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
532 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
533 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
534 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
535 transferStatus = I2C_transfer(handle, &i2cTransaction);
537 if(I2C_STS_SUCCESS != transferStatus)
538 {
539 I2C_log("\n I2C Test: Dynamic configuration of bus Freq failed. \n");
540 goto Err;
541 }
543 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
545 if(true == status)
546 {
547 /* Test runtime configuration of 100 kHz */
548 busFrequency = I2C_100kHz;
549 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
551 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
552 I2C_transactionInit(&i2cTransaction);
553 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
554 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
555 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
556 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
557 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
558 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
559 transferStatus = I2C_transfer(handle, &i2cTransaction);
561 if(I2C_STS_SUCCESS != transferStatus)
562 {
563 I2C_log("\n I2C Test: Dynamic configuration of bus Freq failed. \n");
564 goto Err;
565 }
567 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
568 }
570 /* Test Probe functionality */
572 if(true == status)
573 {
574 /* Probe test with valid slave address */
575 slaveAddress = I2C_EEPROM_ADDR;
576 controlStatus = I2C_control(handle, I2C_CMD_PROBE, &slaveAddress);
578 if(I2C_STATUS_SUCCESS == controlStatus)
579 {
580 status = true;
581 }
582 else
583 {
584 status = false;
585 I2C_log("\n I2C Test: Probe test failed. \n");
586 goto Err;
587 }
588 }
590 if(true == status)
591 {
592 /* Probe test with invalid slave address */
593 slaveAddress = 0x70U;
594 controlStatus = I2C_control(handle, I2C_CMD_PROBE, &slaveAddress);
596 if(I2C_STATUS_ERROR == controlStatus)
597 {
598 status = true;
599 }
600 else
601 {
602 status = false;
603 I2C_log("\n I2C Test: Probe test failed. \n");
604 goto Err;
605 }
606 }
608 if(true == status)
609 {
610 /* Test bus recovery functionality */
611 delayValue = 2000U;
612 controlStatus = I2C_control(handle, I2C_CMD_RECOVER_BUS, &delayValue);
614 if(I2C_STATUS_SUCCESS == controlStatus)
615 {
616 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
617 I2C_transactionInit(&i2cTransaction);
618 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
619 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
620 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
621 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
622 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
623 i2cTransaction.timeout = I2C_TRANSACTION_TIMEOUT;
624 transferStatus = I2C_transfer(handle, &i2cTransaction);
626 if(I2C_STS_SUCCESS != transferStatus)
627 {
628 I2C_log("\n I2C Test: Bus recovery test failed. \n");
629 goto Err;
630 }
632 status = CompareData(&eepromData[0], &rxBuf[0], I2C_EEPROM_TEST_LENGTH);
633 }
634 else
635 {
636 status = false;
637 }
638 }
640 Err:
641 if (handle)
642 {
643 I2C_close(handle);
644 }
645 return status;
646 }
648 static bool I2C_timeout_test(void *arg)
649 {
650 I2C_Handle handle;
651 I2C_Params i2cParams;
652 uint32_t busFrequency;
653 bool status = false;
654 int16_t transferStatus;
655 I2C_Transaction i2cTransaction;
656 char txBuf[I2C_EEPROM_TEST_LENGTH + I2C_EEPROM_ADDR_SIZE] = {0x00, };
657 char rxBuf[I2C_EEPROM_TEST_LENGTH];
658 I2C_Tests *test = (I2C_Tests *)arg;
660 /* Set the I2C EEPROM write/read address */
661 txBuf[0] = (I2C_EEPROM_TEST_ADDR >> 8) & 0xff; /* EEPROM memory high address byte */
662 txBuf[1] = I2C_EEPROM_TEST_ADDR & 0xff; /* EEPROM memory low address byte */
664 I2C_initConfig(I2C_EEPROM_INSTANCE, test);
666 I2C_Params_init(&i2cParams);
667 handle = I2C_open(I2C_EEPROM_INSTANCE, &i2cParams);
668 if (handle == NULL)
669 {
670 goto Err;
671 }
673 /* Test Runtime Configuration of Bus Frequency */
675 /* Test runtime configuration of 400 kHz */
676 busFrequency = I2C_100kHz;
677 I2C_control(handle, I2C_CMD_SET_BUS_FREQUENCY, &busFrequency);
679 memset(rxBuf, 0, I2C_EEPROM_TEST_LENGTH);
680 I2C_transactionInit(&i2cTransaction);
681 i2cTransaction.slaveAddress = I2C_EEPROM_ADDR;
682 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
683 i2cTransaction.writeCount = I2C_EEPROM_ADDR_SIZE;
684 i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
685 i2cTransaction.readCount = I2C_EEPROM_TEST_LENGTH;
686 i2cTransaction.timeout = test->timeout;
687 transferStatus = I2C_transfer(handle, &i2cTransaction);
689 if(I2C_STS_ERR_TIMEOUT == transferStatus)
690 {
691 status = true;
692 }
694 Err:
695 if (handle)
696 {
697 I2C_close(handle);
698 }
700 return status;
701 }
702 #endif
704 void I2C_test_print_test_desc(I2C_Tests *test)
705 {
706 char testId[16] = {0, };
708 /* Print unit test ID */
709 sprintf(testId, "%d", test->testId);
710 I2C_log("\n I2C UT %s\n", testId);
712 /* Print test description */
713 I2C_log("\n %s\n", test->testDesc);
714 }
716 I2C_Tests I2c_tests[] =
717 {
718 /* testFunc testID dma intr cbMode timeout testDesc */
719 {I2C_bitrate_test, I2C_TEST_ID_BIT_RATE, false, true, false, SemaphoreP_WAIT_FOREVER, "\r\n I2C bit rate test in interrupt mode"},
720 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_AM571x) || defined (SOC_AM572x) || defined (SOC_AM574x) || defined (SOC_AM65XX) || defined (SOC_J721E)
721 {I2C_Probe_BusFrequency_test, I2C_TEST_ID_PROBE_BUS_FREQ, false, true, false, SemaphoreP_WAIT_FOREVER, "\r\n I2C probe bus freq test in interrupt mode"},
722 {I2C_timeout_test, I2C_TEST_ID_TIMEOUT_INT, false, true, false, 1, "\r\n I2C timeout test in interrupt mode"},
723 {I2C_timeout_test, I2C_TEST_ID_TIMEOUT_POLLING, false, false, false, 1, "\r\n I2C timeout test in polling mode"},
724 #endif
725 {NULL, },
726 };
729 #ifdef USE_BIOS
730 /*
731 * ======== test function ========
732 */
733 void i2c_test(UArg arg0, UArg arg1)
734 #else
735 int main ()
736 #endif
737 {
738 bool testResult = true;
739 uint32_t i;
740 I2C_Tests *test;
742 #ifndef USE_BIOS
743 if (Board_initI2C() == false)
744 {
745 return(0);
746 }
747 #endif
749 for (i = 0; ; i++)
750 {
751 test = &I2c_tests[i];
752 if (test->testFunc == NULL)
753 {
754 break;
755 }
756 I2C_test_print_test_desc(test);
757 if (test->testFunc((void *)test) == true)
758 {
759 I2C_log("\r\n %s have passed\r\n", test->testDesc);
760 }
761 else
762 {
763 I2C_log("\r\n %s have failed\r\n", test->testDesc);
764 testResult = false;
765 break;
766 }
767 }
769 if(testResult == true)
770 {
771 I2C_log("\n All tests have passed. \n");
772 }
773 else
774 {
775 I2C_log("\n Some tests have failed. \n");
776 }
778 while (true)
779 {
780 }
781 }
783 #ifdef USE_BIOS
784 /*
785 * ======== main ========
786 */
787 int main(void)
788 {
789 I2c_appC7xPreInit();
791 if (Board_initI2C() == false)
792 {
793 return (0);
794 }
796 #if defined (SOC_AM335X) || defined (SOC_AM437x) || defined (SOC_OMAPL137)
797 Task_Handle task;
798 Error_Block eb;
800 Error_init(&eb);
802 task = Task_create(i2c_test, NULL, &eb);
803 if (task == NULL) {
804 System_printf("Task_create() failed!\n");
805 BIOS_exit(0);
806 }
807 #endif
809 #if defined (SOC_J721E)
810 Task_Handle task;
811 Error_Block eb;
812 Task_Params taskParams;
814 Error_init(&eb);
816 /* Initialize the task params */
817 Task_Params_init(&taskParams);
819 /* Set the task priority higher than the default priority (1) */
820 taskParams.priority = 2;
821 taskParams.stackSize = 0x8000;
823 task = Task_create(i2c_test, &taskParams, &eb);
824 if (task == NULL) {
825 System_printf("Task_create() failed!\n");
826 BIOS_exit(0);
827 }
828 #endif
830 /* Start BIOS */
831 BIOS_start();
832 return (0);
833 }
834 #endif /* #ifdef USE_BIOS */
836 #if defined(BUILD_MPU) || defined (__C7100__)
837 extern void Osal_initMmuDefault(void);
838 void InitMmu(void)
839 {
840 Osal_initMmuDefault();
841 }
842 #endif
844 void I2c_appC7xPreInit(void)
845 {
846 #if defined (__C7100__)
847 CSL_ClecEventConfig cfgClec;
848 CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs*) CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
849 uint32_t i, maxInputs = 2048U;
851 /* make secure claim bit to FALSE so that after we switch to non-secure mode
852 * we can program the CLEC MMRs
853 */
854 cfgClec.secureClaimEnable = FALSE;
855 cfgClec.evtSendEnable = FALSE;
856 cfgClec.rtMap = CSL_CLEC_RTMAP_DISABLE;
857 cfgClec.extEvtNum = 0U;
858 cfgClec.c7xEvtNum = 0U;
859 for(i = 0U; i < maxInputs; i++)
860 {
861 CSL_clecConfigEvent(clecBaseAddr, i, &cfgClec);
862 }
864 /* Switch now */
865 CSL_c7xSecSupv2NonSecSupv();
866 #endif
868 return;
869 }