1 /******************************************************************************
2 * FILE PURPOSE: ICSS_EMAC Peripheral Device Configuration
3 ******************************************************************************
4 * FILE NAME: icss_emacSoc.c
5 *
6 * DESCRIPTION: ICSS_EMAC Peripheral Device Configuration Mapping
7 *
8 * REVISION HISTORY:
9 *
10 * Copyright (c) Texas Instruments Incorporated 2016
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 */
42 #include <stdio.h>
43 #include <stdint.h>
44 #include <ti/drv/icss_emac/soc/icss_emacSoc.h>
45 #include <ti/csl/cslr_device.h>
47 ICSS_EmacBaseAddrCfgParams icss_EmacBaseAddrCfgParams[2] =
48 {
49 {
50 CSL_ICSS_0_MII_MDIO_REGS,
51 CSL_ICSS_0_DATA_RAM_8KB_0_REGS,
52 CSL_ICSS_0_DATA_RAM_8KB_1_REGS,
53 CSL_MSMC_SRAM_REGS,
54 CSL_ICSS_0_DATA_RAM_64KB_REGS,
55 CSL_ICSS_0_INTC_REGS,
56 CSL_ICSS_0_PRU_CTRL_0_REGS,
57 CSL_ICSS_0_PRU_CTRL_1_REGS,
58 CSL_ICSS_0_IEP_REGS,
59 CSL_ICSS_0_CFG_REGS,
60 CSL_ICSS_0_MII_RT_CFG_REGS,
61 CSL_ICSS_0_DATA_RAM_8KB_0_REGS_SIZE,
62 CSL_ICSS_0_DATA_RAM_8KB_1_REGS_SIZE,
63 CSL_MSMC_SRAM_REGS_SIZE,
64 CSL_ICSS_0_DATA_RAM_64KB_REGS_SIZE
65 },
66 {
67 CSL_ICSS_1_MII_MDIO_REGS,
68 CSL_ICSS_1_DATA_RAM_8KB_0_REGS,
69 CSL_ICSS_1_DATA_RAM_8KB_1_REGS,
70 CSL_MSMC_SRAM_REGS,
71 CSL_ICSS_1_DATA_RAM_64KB_REGS,
72 CSL_ICSS_1_INTC_REGS,
73 CSL_ICSS_1_PRU_CTRL_0_REGS,
74 CSL_ICSS_1_PRU_CTRL_1_REGS,
75 CSL_ICSS_1_IEP_REGS,
76 CSL_ICSS_1_CFG_REGS,
77 CSL_ICSS_1_MII_RT_CFG_REGS,
78 CSL_ICSS_1_DATA_RAM_8KB_0_REGS_SIZE,
79 CSL_ICSS_1_DATA_RAM_8KB_1_REGS_SIZE,
80 CSL_MSMC_SRAM_REGS_SIZE,
81 CSL_ICSS_1_DATA_RAM_64KB_REGS_SIZE
82 }
83 };
85 /**
86 * \brief This API gets the SoC level of PRU-ICSS intial configuration
87 *
88 * \param index PRU-ICSS instance index.
89 * \param cfg Pointer to PRU-ICSS SOC initial config.
90 *
91 * \return 0 success: -1: error
92 *
93 */
94 int32_t ICSS_EmacSocGetInitCfg(uint32_t instance, ICSS_EmacBaseAddrCfgParams *cfg)
95 {
96 int32_t ret = 0;
98 if (instance < PRUICCSS_INSTANCE_MAX)
99 {
100 *cfg = icss_EmacBaseAddrCfgParams[instance];
101 }
102 else
103 {
104 ret = -((int32_t)1);
105 }
107 return ret;
108 }
110 /**
111 * \brief This API sets the SoC level of PRU-ICSS intial configuration
112 *
113 * \param index PRU-ICSS instance index.
114 * \param cfg Pointer to PRU-ICSS SOC initial config.
115 *
116 * \return 0 success: -1: error
117 *
118 */
119 int32_t ICSS_EmacSocSetInitCfg(uint32_t instance, const ICSS_EmacBaseAddrCfgParams *cfg)
120 {
121 int32_t ret = 0;
123 if (instance < PRUICCSS_INSTANCE_MAX)
124 {
125 icss_EmacBaseAddrCfgParams[instance] = *cfg;
126 }
127 else
128 {
129 ret = -((int32_t)1);
130 }
132 return ret;
133 }