0b800c8f3e232a95db0f9c60328180c69c1cca32
2 /* =============================================================================
3 * Copyright (c) Texas Instruments Incorporated 2018
4 * All Rights Reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34 var SysMin = xdc.module('xdc.runtime.SysMin');
35 var System = xdc.module('xdc.runtime.System');
36 var coreId = java.lang.System.getenv("CORE");
38 if(1) //(coreId == "mpu1_0")
39 {
40 SysMin.bufSize = 0x80000;
41 }
42 else
43 {
44 var SysStd = xdc.useModule('xdc.runtime.SysStd');
45 System.SupportProxy = SysStd;
46 }
49 if(coreId=="mcu1_0" || coreId=="mcu1_1" || coreId=="mcu2_0" || coreId=="mcu2_1" || coreId=="mcu3_0" || coreId=="mcu3_1" )
50 {
51 /* Idle function */
52 var Idle = xdc.useModule ('ti.sysbios.knl.Idle');
53 Idle.addFunc('&traceBuf_cacheWb');
54 Idle.addFunc('&sysIdleLoop');
56 }
58 if(coreId=="c66xdsp_1" || coreId=="c66xdsp_2")
59 {
60 /* TraceBuf Idle Function */
61 Idle.addFunc('&traceBuf_cacheWb');
63 var Exception = xdc.useModule('ti.sysbios.family.c64p.Exception');
64 Exception.exceptionHook = '&traceBuf_cacheWb_Exception';
65 }
67 if(coreId=="c7x_1" || coreId=="c66xdsp_1" || coreId =="c66xdsp_2")
68 {
69 /* Idle function */
70 var Idle = xdc.useModule ('ti.sysbios.knl.Idle');
71 Idle.addFunc('&sysIdleLoop');
73 var Task = xdc.useModule('ti.sysbios.knl.Task');
74 Task.enableIdleTask = true;
75 }
77 /* Set ipc/VRing buffer as uncached */
78 if(coreId=="c66xdsp_1" || coreId =="c66xdsp_2" )
79 {
80 var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
81 Cache.setMarMeta(0xAA000000, 0x1C00000, Cache.Mar_DISABLE);
82 }
84 /* Set ipc/VRing buffer as uncached - Linux on A72 */
85 if(coreId=="c66xdsp_1" )
86 {
87 Cache.setMarMeta(0xA7000000, 0x1000000, Cache.Mar_DISABLE);
88 }
90 if(coreId=="c66xdsp_2")
91 {
92 Cache.setMarMeta(0xA6000000, 0x1000000, Cache.Mar_DISABLE)
93 }
95 if(coreId=="mpu1_0")
96 {
97 var Mmu = xdc.module('ti.sysbios.family.arm.v8a.Mmu');
98 Mmu.initFunc = "&InitMmu";
99 }
101 if(coreId=="c7x_1")
102 {
103 var Mmu = xdc.module('ti.sysbios.family.c7x.Mmu');
104 Mmu.initFunc = "&InitMmu";
105 }