[processor-sdk/pdk.git] / packages / ti / drv / pa / example / multicoreExample / src / local_variables.c
1 /** \r
2 * @file local_variables.c\r
3 *\r
4 * @brief \r
5 * This file holds all the variables local to that core/process required\r
6 * for the multicore example.\r
7 *\r
8 * \par\r
9 * ============================================================================\r
10 * @n (C) Copyright 2013, Texas Instruments, Inc.\r
11 * \r
12 * Redistribution and use in source and binary forms, with or without \r
13 * modification, are permitted provided that the following conditions \r
14 * are met:\r
15 *\r
16 * Redistributions of source code must retain the above copyright \r
17 * notice, this list of conditions and the following disclaimer.\r
18 *\r
19 * Redistributions in binary form must reproduce the above copyright\r
20 * notice, this list of conditions and the following disclaimer in the \r
21 * documentation and/or other materials provided with the \r
22 * distribution.\r
23 *\r
24 * Neither the name of Texas Instruments Incorporated nor the names of\r
25 * its contributors may be used to endorse or promote products derived\r
26 * from this software without specific prior written permission.\r
27 *\r
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
39 *\r
40 */\r
41 #include <multicore_example.h>\r
42 \r
43 /* QMSS queue handles */\r
44 \r
45 /* Queue with free descriptors */\r
46 Qmss_QueueHnd gGlobalFreeQHnd;\r
47 \r
48 /* TX queues used to send data to PA PDSP/CPSW.*/\r
49 #pragma DATA_ALIGN (gPaTxQHnd, 128)\r
50 Qmss_QueueHnd gPaTxQHnd [NUM_PA_TX_QUEUES];\r
51 \r
52 #pragma DATA_ALIGN (gPaL4Handles, CACHE_LINESZ)\r
53 paHandleL4_t gPaL4Handles;\r
54 \r
55 /* RX queue used by the application to receive packets from PASS/CPSW.\r
56 Each core has an independent RX queue. */\r
57 Qmss_QueueHnd gRxQHnd;\r
58 \r
59 Cppi_ChHnd gCpdmaTxChanHnd [NUM_PA_TX_CHANNELS];\r
60 \r
61 Cppi_ChHnd gCpdmaRxChanHnd [NUM_PA_RX_CHANNELS];\r
62 \r
63 Cppi_FlowHnd gRxFlowHnd;\r
64 \r
65 /* PA command response queue handle */\r
66 Qmss_QueueHnd gPaCfgCmdRespQHnd;\r
67 \r
68 /* TX queue with free decriptors attached to data buffers for transmission.*/\r
69 Qmss_QueueHnd gTxFreeQHnd;\r
70 \r
71 /* RX queue with free decriptors attached to data buffers to be used\r
72 by the PASS CPDMA to hold the received data.*/\r
73 Qmss_QueueHnd gRxFreeQHnd;\r
74 \r
75 /* CPPI Handles used by the application */\r
76 Cppi_Handle gCpdmaHnd;\r
77 \r
78 /* PA Driver Handle */\r
79 Pa_Handle gPAInstHnd;\r
80 /* PA L2 Handle */\r
81 paHandleL2L3_t gPaL2Handles;\r
82 \r
83 /* PA L3 Handle */\r
84 paHandleL2L3_t gPaL3Handles;\r
85 \r
86 /* PA L4 Handle */\r
87 paHandleL4_t gPaL4Handles;\r
88 \r
89 /* Pointer to the shared memory to get to all the handles needed for\r
90 * multicore/multiprocess */\r
91 pa_Example_MC_ShObj_t* shObj;\r
92 \r
93 \r
94 /* Constructed data packet to send.\r
95 Each core will have a slightly modified version\r
96 of this packet which is stored in the core's local memory. */\r
97 #pragma DATA_ALIGN(pktMatchBuf, 16)\r
98 uint8_t pktMatchBuf[PACKET_SIZE] = {\r
99 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, /* Dest MAC */\r
100 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, /* Src MAC */\r
101 0x08, 0x00, /* Ethertype = IPv4 */\r
102 0x45, 0x00, 0x00, 0x6c, /* IP version, services, total length */\r
103 0x00, 0x00, 0x00, 0x00, /* IP ID, flags, fragment offset */\r
104 0x05, 0x11, 0x32, 0x26, /* IP ttl, protocol (UDP), header checksum */\r
105 0xc0, 0xa8, 0x01, 0x01, /* Source IP address */\r
106 0xc0, 0xa8, 0x01, 0x0a, /* Destination IP address */\r
107 0x12, 0x34, 0x56, 0x78, /* UDP source port, dest port */\r
108 0x00, 0x58, 0x1d, 0x18, /* UDP len, UDP checksum */\r
109 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, /* 80 bytes of payload data */\r
110 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 0x40, 0x41,\r
111 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,\r
112 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51,\r
113 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59,\r
114 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x60, 0x61,\r
115 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69,\r
116 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71,\r
117 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79,\r
118 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, 0x80, 0x81 };\r
119 \r
120 uint8_t* pktMatch; \r
121 \r
122 /* Tx/Rx packet counters */\r
123 volatile uint32_t gTxCounter = 0, gRxCounter = 0;\r
124 \r
125 /* RM Client Vars */\r
126 Rm_Handle rmClientHandle = NULL;\r
127 Rm_ServiceHandle *rmClientServiceHandle = NULL;\r
128 \r
129 /*\r
130 * Default test configuration for the silicon\r
131 *\r
132 * To run test at the CCS simulator\r
133 * cpswSimTest = 1\r
134 * cpswLpbkMode = CPSW_LOOPBACK_INTERNAL\r
135 */\r
136 #ifdef SIMULATOR_SUPPORT\r
137 Int cpswSimTest = 1;\r
138 Int cpswLpbkMode = CPSW_LOOPBACK_INTERNAL;\r
139 #else\r
140 Int cpswSimTest = 0;\r
141 #ifndef __LINUX_USER_SPACE\r
142 Int cpswLpbkMode = CPSW_LOOPBACK_INTERNAL;\r
143 #endif\r
144 #endif\r
145 \r
146 /* Default test configuration for the silicon\r
147 * \r
148 * To run the test at the CCS (with no boot mode, using GEL files) - Default\r
149 * no_bootMode = TRUE\r
150 * To run the test at the CCS (with other boot modes when linux is up)\r
151 * no_bootMode = FALSE \r
152 */\r
153 #ifdef __LINUX_USER_SPACE\r
154 int no_bootMode = FALSE;\r
155 #else\r
156 int no_bootMode = TRUE;\r
157 #endif\r
158 \r
159 void mdebugHaltPdsp (Int pdspNum);\r
160 volatile Int mdebugWait = 1;\r
161 \r
162 /* Error counter */\r
163 uint32_t errorCount = 0;\r
164 \r
165 /* Indicates the core or logical task ID test is running on */\r
166 uint32_t coreNum;\r
167 \r
168 /* Indicate the test status */\r
169 char test_stat[50];\r
170 \r
171 #ifndef __LINUX_USER_SPACE\r
172 /* Handle to CPPI heap */\r
173 IHeap_Handle cppiHeap;\r
174 #endif\r
175 \r
176 \r