[processor-sdk/pdk.git] / packages / ti / drv / pcie / example / sample / k2l / armv7 / bios / pcie_sample_wSoCLib.cfg
1 /**
2 * \file pcie_sample_wSoCLib.cfg
3 *
4 * \brief Sysbios config file for pcie example project on K2L EVM.
5 *
6 */
8 /*
9 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the
21 * distribution.
22 *
23 * Neither the name of Texas Instruments Incorporated nor the names of
24 * its contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 */
40 /* ================ General configuration ================ */
41 var Edma = xdc.loadPackage ("ti.sdo.edma3.drv.sample");
42 var drv = xdc.loadPackage ("ti.sdo.edma3.drv");
43 var rm = xdc.loadPackage ("ti.sdo.edma3.rm");
44 var Defaults = xdc.useModule('xdc.runtime.Defaults');
45 var Diags = xdc.useModule('xdc.runtime.Diags');
46 var Error = xdc.useModule('xdc.runtime.Error');
47 var Log = xdc.useModule('xdc.runtime.Log');
48 var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
49 var Main = xdc.useModule('xdc.runtime.Main');
50 var Memory = xdc.useModule('xdc.runtime.Memory')
51 var SysMin = xdc.useModule('xdc.runtime.SysMin');
52 var System = xdc.useModule('xdc.runtime.System');
53 var Text = xdc.useModule('xdc.runtime.Text');
54 var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');
55 var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
56 var Task = xdc.useModule('ti.sysbios.knl.Task');
57 var SemiHost = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');
58 var CpIntc = xdc.useModule('ti.sysbios.family.arm.a15.tci66xx.CpIntc');
59 /*
60 * Program.argSize sets the size of the .args section.
61 * The examples don't use command line args so argSize is set to 0.
62 */
63 Program.argSize = 0x0;
65 /* System stack size (used by ISRs and Swis) */
66 Program.stack = 0x20000;
68 /*
69 * Uncomment this line to globally disable Asserts.
70 * All modules inherit the default from the 'Defaults' module. You
71 * can override these defaults on a per-module basis using Module.common$.
72 * Disabling Asserts will save code space and improve runtime performance.
73 Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;
74 */
76 /*
77 * Uncomment this line to keep module names from being loaded on the target.
78 * The module name strings are placed in the .const section. Setting this
79 * parameter to false will save space in the .const section. Error and
80 * Assert messages will contain an "unknown module" prefix instead
81 * of the actual module name.
82 Defaults.common$.namedModule = false;
83 */
85 /*
86 * Minimize exit handler array in System. The System module includes
87 * an array of functions that are registered with System_atexit() to be
88 * called by System_exit().
89 */
90 System.maxAtexitHandlers = 4;
92 /*
93 * Uncomment this line to disable the Error print function.
94 * We lose error information when this is disabled since the errors are
95 * not printed. Disabling the raiseHook will save some code space if
96 * your app is not using System_printf() since the Error_print() function
97 * calls System_printf().
98 Error.raiseHook = null;
99 */
101 /*
102 * Uncomment this line to keep Error, Assert, and Log strings from being
103 * loaded on the target. These strings are placed in the .const section.
104 * Setting this parameter to false will save space in the .const section.
105 * Error, Assert and Log message will print raw ids and args instead of
106 * a formatted message.
107 Text.isLoaded = false;
108 */
110 /*
111 * Uncomment this line to disable the output of characters by SysMin
112 * when the program exits. SysMin writes characters to a circular buffer.
113 * This buffer can be viewed using the SysMin Output view in ROV.
114 SysMin.flushAtExit = false;
115 */
118 /* Circular buffer size for System_printf() */
119 SysMin.bufSize = 0x400;
120 System.SupportProxy = SysMin;
123 /*
124 * Create and install logger for the whole system
125 */
126 var loggerBufParams = new LoggerBuf.Params();
127 loggerBufParams.numEntries = 32;
128 var logger0 = LoggerBuf.create(loggerBufParams);
129 Defaults.common$.logger = logger0;
130 Main.common$.diags_INFO = Diags.ALWAYS_ON;
132 /* ================ BIOS configuration ================ */
134 var BIOS = xdc.useModule('ti.sysbios.BIOS');
135 /*
136 * Build a custom SYS/BIOS library from sources.
137 */
138 BIOS.libType = BIOS.LibType_Custom;
140 /*
141 * The BIOS module will create the default heap for the system.
142 * Specify the size of this default heap.
143 */
144 BIOS.heapSize = 0x10000;
146 /* ================ Task configuration ================ */
148 /* Define and add one Task Hook Set */
149 Task.addHookSet({
150 registerFxn: '&TaskRegisterId',
151 switchFxn: '&mySwitch',
152 });
154 /* ================ Driver configuration ================ */
155 /* Load the osal package -- required by board & interrupt example */
156 var socType = "k2l";
157 var osType = "tirtos"
158 var Osal = xdc.loadPackage('ti.osal');
159 Osal.Settings.osType = osType;
160 Osal.Settings.socType = socType;
162 /*use CSL package*/
163 var Csl = xdc.loadPackage('ti.csl');
164 Csl.Settings.deviceType = socType;
166 /* Load Profiling package */
167 var Utils = xdc.loadPackage('ti.utils.profiling');
169 /* Load and use the PCIE packages */
171 var Pcie = xdc.loadPackage('ti.drv.pcie');
172 Pcie.Settings.enableProfiling = true;
173 /* Enable only if soc-specific library should be used */
174 Pcie.Settings.socType = socType;
176 /* Load the I2C package - required by board */
177 var I2c = xdc.loadPackage('ti.drv.i2c');
178 I2c.Settings.socType = socType;
180 /* Load the uart package -- required by board */
181 var Uart = xdc.loadPackage('ti.drv.uart');
182 Uart.Settings.socType = socType;
184 /* Load the Board package and set the board name */
185 var Board = xdc.loadPackage('ti.board');
186 Board.Settings.boardName = "evmK2L";
188 /* ================ Cache and MMU configuration ================ */
189 var Cache = xdc.useModule('ti.sysbios.family.arm.a15.Cache');
190 var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu');
192 // Enable the cache
193 Cache.enableCache = true;
195 // Enable the MMU (Required for L1/L2 data caching)
196 Mmu.enableMMU = true;
198 // descriptor attribute structure
199 var peripheralAttrs = new Mmu.DescriptorAttrs();
201 Mmu.initDescAttrsMeta(peripheralAttrs);
203 peripheralAttrs.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor
204 peripheralAttrs.noExecute = true; // not executable
205 peripheralAttrs.accPerm = 0; // read/write at PL1
206 peripheralAttrs.attrIndx = 1; // MAIR0 Byte1 describes
207 // memory attributes for
208 // each BLOCK MMU entry
210 // Define the base address of the 2 MB page
211 // the peripheral resides in.
212 var peripheralBaseAddrs = [
213 { base: 0x02530C00, size: 0x00000400 }, // UART 0 regs
214 { base: 0x02531000, size: 0x00000400 }, // UART 1 regs
215 { base: 0x21800000, size: 0x00004000 }, // pcie regs
216 { base: 0x50000000, size: 0x10000000 }, // pcie data
217 { base: 0x02320000, size: 0x00004000 }, // pcie phy
218 { base: 0x0bc00000, size: 0x00010000 }, // msmc
219 { base: 0x02700000, size: 0x000D0000 }, // edma
220 { base: 0x02350000, size: 0x00001000 } // psc
221 ];
223 // Configure the corresponding MMU page descriptor accordingly
224 for (var i =0; i < peripheralBaseAddrs.length; i++)
225 {
226 for (var j = 0; j < peripheralBaseAddrs[i].size; j += 0x200000)
227 {
228 var addr = peripheralBaseAddrs[i].base + j;
229 Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
230 }
231 }
233 // Reconfigure DDR to use coherent address
234 Mmu.initDescAttrsMeta(peripheralAttrs);
236 peripheralAttrs.type = Mmu.DescriptorType_BLOCK;
237 peripheralAttrs.shareable = 2; // outer-shareable (3=inner, 0=none)
238 peripheralAttrs.accPerm = 1; // read/write at any privelege level
239 peripheralAttrs.attrIndx = 2; // normal cacheable (0=no cache, 1=strict order)
240 for (var vaddr = 0x80000000, paddr = 0x800000000; vaddr < 0x100000000; vaddr += 0x200000, paddr+= 0x200000)
241 {
242 Mmu.setSecondLevelDescMeta(vaddr, paddr, peripheralAttrs);
243 }
244 // Add MSMC as coherent
245 for (var addr = 0x0c000000; addr < 0x0c600000; addr += 0x200000)
246 {
247 Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
248 }