packages/ti/drv/sciclient/docs/system-firmware-public-documentation/5_soc_doc/j721e/navss.html

   1
   2
   3 <!DOCTYPE html>
   4 <!--[if IE 8]><html class="no-js lt-ie9" lang="en" > <![endif]-->
   5 <!--[if gt IE 8]><!--> <html class="no-js" lang="en" > <!--<![endif]-->
   6 <head>
   7   <meta charset="utf-8">
   8
   9   <meta name="viewport" content="width=device-width, initial-scale=1.0">
  10
  11   <title>j721e Navigator Subsystem Descriptions &mdash; TISCI User Guide</title>
  12
  13
  14
  15
  16     <link rel="shortcut icon" href="../../_static/favicon.ico"/>
  17
  18
  19
  20
  21
  22
  23
  24
  25
  26
  27
  28
  29     <link rel="stylesheet" href="../../_static/css/theme.css" type="text/css" />
  30
  31
  32
  33     <link rel="stylesheet" href="../../_static/theme_overrides.css" type="text/css" />
  34
  35
  36
  37         <link rel="index" title="Index"
  38               href="../../genindex.html"/>
  39         <link rel="search" title="Search" href="../../search.html"/>
  40     <link rel="top" title="TISCI User Guide" href="../../index.html"/>
  41         <link rel="up" title="Chapter 5: SoC Family Specific Documentation" href="../index.html"/>
  42         <link rel="next" title="J721E Secure Proxy Descriptions" href="sec_proxy.html"/>
  43         <link rel="prev" title="j721e Peripheral Interrupt Destination Descriptions" href="irq_dsts.html"/>
  44
  45
  46   <script src="../../_static/js/modernizr.min.js"></script>
  47
  48 </head>
  49
  50 <body class="wy-body-for-nav" role="document">
  51   <header id="tiHeader">
  52     <div class="top">
  53       <ul>
  54         <li id="top_logo">
  55           <a href="http://www.ti.com">
  56             <img src="../../_static/img/ti_logo.png"/>
  57           </a>
  58         </li>
  59       </ul>
  60     </div>
  61     <div class="nav"></div>
  62   </header>
  63   <div class="wy-grid-for-nav">
  64
  65
  66     <nav data-toggle="wy-nav-shift" class="wy-nav-side">
  67       <div class="wy-side-scroll">
  68         <div class="wy-side-nav-search">
  69
  70
  71
  72             <a href="../../index.html" class="icon icon-home"> TISCI
  73
  74
  75
  76           </a>
  77
  78
  79
  80
  81               <div class="version">
  82                 19.07.00
  83               </div>
  84
  85
  86
  87
  88 <div role="search">
  89   <form id="rtd-search-form" class="wy-form" action="../../search.html" method="get">
  90     <input type="text" name="q" placeholder="Search docs" />
  91     <input type="hidden" name="check_keywords" value="yes" />
  92     <input type="hidden" name="area" value="default" />
  93   </form>
  94 </div>
  95
  96
  97         </div>
  98
  99         <div class="wy-menu wy-menu-vertical" data-spy="affix" role="navigation" aria-label="main navigation">
 100
 101
 102
 103                 <ul class="current">
 104 <li class="toctree-l1"><a class="reference internal" href="../../1_intro/index.html">Chapter 1: Introduction</a></li>
 105 <li class="toctree-l1"><a class="reference internal" href="../../2_tisci_msgs/index.html">Chapter 2: TISCI Message Documentation</a></li>
 106 <li class="toctree-l1"><a class="reference internal" href="../../3_boardcfg/index.html">Chapter 3: Board Configuration</a></li>
 107 <li class="toctree-l1"><a class="reference internal" href="../../4_trace/index.html">Chapter 4: Interpreting Trace Data</a></li>
 108 <li class="toctree-l1 current"><a class="reference internal" href="../index.html">Chapter 5: SoC Family Specific Documentation</a><ul class="current">
 109 <li class="toctree-l2"><a class="reference internal" href="../index.html#am6-soc-family">AM6 SoC Family</a></li>
 110 <li class="toctree-l2 current"><a class="reference internal" href="../index.html#j721e-soc-family">J721E SoC Family</a><ul class="current">
 111 <li class="toctree-l3"><a class="reference internal" href="hosts.html">J721E Host Descriptions</a></li>
 112 <li class="toctree-l3"><a class="reference internal" href="devices.html">J721E Devices Descriptions</a></li>
 113 <li class="toctree-l3"><a class="reference internal" href="clocks.html">J721E Clock Identifiers</a></li>
 114 <li class="toctree-l3"><a class="reference internal" href="resasg_types.html">j721e Board Configuration Resource Assignment Type Descriptions</a></li>
 115 <li class="toctree-l3"><a class="reference internal" href="irq_sources.html">j721e Peripheral Interrupt Source Descriptions</a></li>
 116 <li class="toctree-l3"><a class="reference internal" href="irq_dsts.html">j721e Peripheral Interrupt Destination Descriptions</a></li>
 117 <li class="toctree-l3 current"><a class="current reference internal" href="#">j721e Navigator Subsystem Descriptions</a><ul>
 118 <li class="toctree-l4"><a class="reference internal" href="#introduction">Introduction</a></li>
 119 <li class="toctree-l4"><a class="reference internal" href="#navigator-subsystem-device-ids">Navigator Subsystem Device IDs</a></li>
 120 <li class="toctree-l4"><a class="reference internal" href="#navigator-subsystem-ring-indices">Navigator Subsystem Ring Indices</a></li>
 121 <li class="toctree-l4"><a class="reference internal" href="#navigator-subsystem-channel-and-flow-indices">Navigator Subsystem Channel and Flow Indices</a></li>
 122 <li class="toctree-l4"><a class="reference internal" href="#navigator-subsystem-virtual-interrupts">Navigator Subsystem Virtual Interrupts</a></li>
 123 <li class="toctree-l4"><a class="reference internal" href="#navigator-subsystem-global-events">Navigator Subsystem Global Events</a></li>
 124 <li class="toctree-l4"><a class="reference internal" href="#navigator-subsystem-psi-l-source-and-destination-thread-ids">Navigator Subsystem PSI-L Source and Destination Thread IDs</a></li>
 125 </ul>
 126 </li>
 127 <li class="toctree-l3"><a class="reference internal" href="sec_proxy.html">J721E Secure Proxy Descriptions</a></li>
 128 <li class="toctree-l3"><a class="reference internal" href="processors.html">J721E Processor Descriptions</a></li>
 129 <li class="toctree-l3"><a class="reference internal" href="firewalls.html">J721E Firewall Descriptions</a></li>
 130 </ul>
 131 </li>
 132 </ul>
 133 </li>
 134 <li class="toctree-l1"><a class="reference internal" href="../../6_topic_user_guides/index.html">Chapter 6: Topic User Guides</a></li>
 135 </ul>
 136
 137
 138
 139         </div>
 140       </div>
 141     </nav>
 142
 143     <section data-toggle="wy-nav-shift" class="wy-nav-content-wrap">
 144
 145
 146       <nav class="wy-nav-top" role="navigation" aria-label="top navigation">
 147         <i data-toggle="wy-nav-top" class="fa fa-bars"></i>
 148         <a href="../../index.html">TISCI</a>
 149       </nav>
 150
 151
 152
 153       <div class="wy-nav-content">
 154         <div class="rst-content">
 155
 156
 157
 158
 159
 160
 161 <div role="navigation" aria-label="breadcrumbs navigation">
 162   <ul class="wy-breadcrumbs">
 163     <li><a href="../../index.html">Docs</a> &raquo;</li>
 164
 165           <li><a href="../index.html">Chapter 5: SoC Family Specific Documentation</a> &raquo;</li>
 166
 167     <li>j721e Navigator Subsystem Descriptions</li>
 168       <li class="wy-breadcrumbs-aside">
 169
 170
 171
 172       </li>
 173   </ul>
 174   <hr/>
 175 </div>
 176           <div role="main" class="document" itemscope="itemscope" itemtype="http://schema.org/Article">
 177            <div itemprop="articleBody">
 178
 179   <div class="section" id="j721e-navigator-subsystem-descriptions">
 180 <h1>j721e Navigator Subsystem Descriptions<a class="headerlink" href="#j721e-navigator-subsystem-descriptions" title="Permalink to this headline">¶</a></h1>
 181 <div class="section" id="introduction">
 182 <h2>Introduction<a class="headerlink" href="#introduction" title="Permalink to this headline">¶</a></h2>
 183 <p>This chapter provides information on the Navigator Subsystems in the j721e SoC.
 184 Some System Firmware TISCI messages take Navigator Subsystem specific inputs.
 185 This chapter provides information on the valid values for applicable TISCI
 186 message parameters.</p>
 187 </div>
 188 <div class="section" id="navigator-subsystem-device-ids">
 189 <span id="pub-soc-j721e-navss-ids"></span><h2>Navigator Subsystem Device IDs<a class="headerlink" href="#navigator-subsystem-device-ids" title="Permalink to this headline">¶</a></h2>
 190 <p>Some System Firmware TISCI message APIs require the device ID of the Navigator
 191 Subsystem to be modified as part of the request. Based on <a class="reference internal" href="devices.html"><span class="doc">j721e Device IDs</span></a> these are the valid Navigator Subsystem device IDs.</p>
 192 <table border="1" class="docutils">
 193 <colgroup>
 194 <col width="51%" />
 195 <col width="49%" />
 196 </colgroup>
 197 <thead valign="bottom">
 198 <tr class="row-odd"><th class="head">Interrupt Aggregator Device Name</th>
 199 <th class="head">Interrupt Aggregator Device ID</th>
 200 </tr>
 201 </thead>
 202 <tbody valign="top">
 203 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
 204 <td>207</td>
 205 </tr>
 206 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
 207 <td>208</td>
 208 </tr>
 209 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
 210 <td>209</td>
 211 </tr>
 212 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTAGGR_0</td>
 213 <td>233</td>
 214 </tr>
 215 </tbody>
 216 </table>
 217 <table border="1" class="docutils">
 218 <colgroup>
 219 <col width="52%" />
 220 <col width="48%" />
 221 </colgroup>
 222 <thead valign="bottom">
 223 <tr class="row-odd"><th class="head">Ring Accelerator Device Name</th>
 224 <th class="head">Ring Accelerator Device ID</th>
 225 </tr>
 226 </thead>
 227 <tbody valign="top">
 228 <tr class="row-even"><td>J721E_DEV_NAVSS0_RINGACC_0</td>
 229 <td>211</td>
 230 </tr>
 231 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_RINGACC_0</td>
 232 <td>235</td>
 233 </tr>
 234 </tbody>
 235 </table>
 236 <table border="1" class="docutils">
 237 <colgroup>
 238 <col width="63%" />
 239 <col width="38%" />
 240 </colgroup>
 241 <thead valign="bottom">
 242 <tr class="row-odd"><th class="head">UDMA Device Name</th>
 243 <th class="head">UDMA Device ID</th>
 244 </tr>
 245 </thead>
 246 <tbody valign="top">
 247 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMAP_0</td>
 248 <td>212</td>
 249 </tr>
 250 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMAP_0</td>
 251 <td>236</td>
 252 </tr>
 253 </tbody>
 254 </table>
 255 <table border="1" class="docutils">
 256 <colgroup>
 257 <col width="51%" />
 258 <col width="49%" />
 259 </colgroup>
 260 <thead valign="bottom">
 261 <tr class="row-odd"><th class="head">PSI-L Proxy Navigator Device Name</th>
 262 <th class="head">PSI-L Proxy Navigator Device ID</th>
 263 </tr>
 264 </thead>
 265 <tbody valign="top">
 266 <tr class="row-even"><td>J721E_DEV_NAVSS512L_MAIN_0</td>
 267 <td>199</td>
 268 </tr>
 269 <tr class="row-odd"><td>J721E_DEV_NAVSS_MCU_J7_MCU_0</td>
 270 <td>232</td>
 271 </tr>
 272 </tbody>
 273 </table>
 274 </div>
 275 <div class="section" id="navigator-subsystem-ring-indices">
 276 <span id="pub-soc-j721e-navss-rings"></span><h2>Navigator Subsystem Ring Indices<a class="headerlink" href="#navigator-subsystem-ring-indices" title="Permalink to this headline">¶</a></h2>
 277 <p>This section describes valid Navigator Subsystem Ring Accelerator ring indices
 278 for each Navigator ring type. The ring index and type ID are used in some Ring
 279 Accelerator based TISCI messages.</p>
 280 <div class="admonition warning">
 281 <p class="first admonition-title">Warning</p>
 282 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
 283 host within the RM Board Configuration resource assignment array.  The RM
 284 Board Configuration is rejected if an overlap with a reserved resource is
 285 detected.</p>
 286 </div>
 287 <p><strong>NAVSS0_RINGACC_0</strong></p>
 288 <table border="1" class="docutils">
 289 <colgroup>
 290 <col width="41%" />
 291 <col width="59%" />
 292 </colgroup>
 293 <thead valign="bottom">
 294 <tr class="row-odd"><th class="head">Ring Type</th>
 295 <th class="head">Ring Index Range</th>
 296 </tr>
 297 </thead>
 298 <tbody valign="top">
 299 <tr class="row-even"><td>UDMAP_TX_UH</td>
 300 <td>0 to 3</td>
 301 </tr>
 302 <tr class="row-odd"><td>UDMAP_TX_H</td>
 303 <td>4 to 15</td>
 304 </tr>
 305 <tr class="row-even"><td>UDMAP_TX</td>
 306 <td>16 to 139</td>
 307 </tr>
 308 <tr class="row-odd"><td>UDMAP_TX_EXT</td>
 309 <td>140 to 299</td>
 310 </tr>
 311 <tr class="row-even"><td>UDMAP_RX_UH</td>
 312 <td>300 to 303</td>
 313 </tr>
 314 <tr class="row-odd"><td>UDMAP_RX_H</td>
 315 <td>304 to 315</td>
 316 </tr>
 317 <tr class="row-even"><td>UDMAP_RX</td>
 318 <td>316 to 439</td>
 319 </tr>
 320 <tr class="row-odd"><td>GP</td>
 321 <td>440 to 973</td>
 322 </tr>
 323 </tbody>
 324 </table>
 325 <table border="1" class="docutils">
 326 <colgroup>
 327 <col width="39%" />
 328 <col width="61%" />
 329 </colgroup>
 330 <thead valign="bottom">
 331 <tr class="row-odd"><th class="head">&#160;</th>
 332 <th class="head">Monitor Index Range</th>
 333 </tr>
 334 </thead>
 335 <tbody valign="top">
 336 <tr class="row-even"><td>Ring Monitors</td>
 337 <td>0 to 31</td>
 338 </tr>
 339 </tbody>
 340 </table>
 341 <p><strong>MCU_NAVSS0_RINGACC_0</strong></p>
 342 <table border="1" class="docutils">
 343 <colgroup>
 344 <col width="64%" />
 345 <col width="36%" />
 346 </colgroup>
 347 <thead valign="bottom">
 348 <tr class="row-odd"><th class="head">Ring Type</th>
 349 <th class="head">Ring Index Range</th>
 350 </tr>
 351 </thead>
 352 <tbody valign="top">
 353 <tr class="row-even"><td>UDMAP_TX_H</td>
 354 <td>0 to 1</td>
 355 </tr>
 356 <tr class="row-odd"><td>UDMAP_TX</td>
 357 <td>2 to 45</td>
 358 </tr>
 359 <tr class="row-even"><td>UDMAP_TX
 360 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 361 <td>46 to 47</td>
 362 </tr>
 363 <tr class="row-odd"><td>UDMAP_RX_H</td>
 364 <td>48 to 49</td>
 365 </tr>
 366 <tr class="row-even"><td>UDMAP_RX</td>
 367 <td>50 to 92</td>
 368 </tr>
 369 <tr class="row-odd"><td>UDMAP_RX
 370 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 371 <td>93 to 95</td>
 372 </tr>
 373 <tr class="row-even"><td>GP</td>
 374 <td>96 to 251</td>
 375 </tr>
 376 <tr class="row-odd"><td>GP
 377 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 378 <td>252 to 255</td>
 379 </tr>
 380 </tbody>
 381 </table>
 382 <table border="1" class="docutils">
 383 <colgroup>
 384 <col width="39%" />
 385 <col width="61%" />
 386 </colgroup>
 387 <thead valign="bottom">
 388 <tr class="row-odd"><th class="head">&#160;</th>
 389 <th class="head">Monitor Index Range</th>
 390 </tr>
 391 </thead>
 392 <tbody valign="top">
 393 <tr class="row-even"><td>Ring Monitors</td>
 394 <td>0 to 31</td>
 395 </tr>
 396 </tbody>
 397 </table>
 398 </div>
 399 <div class="section" id="navigator-subsystem-channel-and-flow-indices">
 400 <span id="pub-soc-j721e-udmap-channel-and-flow-indices"></span><h2>Navigator Subsystem Channel and Flow Indices<a class="headerlink" href="#navigator-subsystem-channel-and-flow-indices" title="Permalink to this headline">¶</a></h2>
 401 <p>This section describes valid Navigator Subsystem UDMA transmit channel and
 402 receive channel indices for each Navigator UDMA channel type. The receive flow
 403 index range has no type information since it’s required for receive flows.</p>
 404 <div class="admonition warning">
 405 <p class="first admonition-title">Warning</p>
 406 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
 407 host within the RM Board Configuration resource assignment array.  The RM
 408 Board Configuration is rejected if an overlap with a reserved resource is
 409 detected.</p>
 410 </div>
 411 <p><strong>NAVSS0_UDMAP_0</strong></p>
 412 <table border="1" class="docutils">
 413 <colgroup>
 414 <col width="42%" />
 415 <col width="58%" />
 416 </colgroup>
 417 <thead valign="bottom">
 418 <tr class="row-odd"><th class="head">Tx Channel Type</th>
 419 <th class="head">Tx Channel Index Range</th>
 420 </tr>
 421 </thead>
 422 <tbody valign="top">
 423 <tr class="row-even"><td>TX_UHCHAN</td>
 424 <td>0 to 3</td>
 425 </tr>
 426 <tr class="row-odd"><td>TX_HCHAN</td>
 427 <td>4 to 15</td>
 428 </tr>
 429 <tr class="row-even"><td>TX_CHAN</td>
 430 <td>16 to 139</td>
 431 </tr>
 432 <tr class="row-odd"><td>TX_ECHAN</td>
 433 <td>140 to 299</td>
 434 </tr>
 435 </tbody>
 436 </table>
 437 <table border="1" class="docutils">
 438 <colgroup>
 439 <col width="42%" />
 440 <col width="58%" />
 441 </colgroup>
 442 <thead valign="bottom">
 443 <tr class="row-odd"><th class="head">Rx Channel Type</th>
 444 <th class="head">Rx Channel Index Range</th>
 445 </tr>
 446 </thead>
 447 <tbody valign="top">
 448 <tr class="row-even"><td>RX_UHCHAN</td>
 449 <td>0 to 3</td>
 450 </tr>
 451 <tr class="row-odd"><td>RX_HCHAN</td>
 452 <td>4 to 15</td>
 453 </tr>
 454 <tr class="row-even"><td>RX_CHAN</td>
 455 <td>16 to 139</td>
 456 </tr>
 457 </tbody>
 458 </table>
 459 <table border="1" class="docutils">
 460 <colgroup>
 461 <col width="41%" />
 462 <col width="59%" />
 463 </colgroup>
 464 <thead valign="bottom">
 465 <tr class="row-odd"><th class="head">Rx Flow Type</th>
 466 <th class="head">Rx Flow Index Range</th>
 467 </tr>
 468 </thead>
 469 <tbody valign="top">
 470 <tr class="row-even"><td>DEFAULT</td>
 471 <td>0 to 139</td>
 472 </tr>
 473 <tr class="row-odd"><td>CONFIGURABLE</td>
 474 <td>140 to 299</td>
 475 </tr>
 476 </tbody>
 477 </table>
 478 <p><strong>MCU_NAVSS0_UDMAP_0</strong></p>
 479 <table border="1" class="docutils">
 480 <colgroup>
 481 <col width="57%" />
 482 <col width="43%" />
 483 </colgroup>
 484 <thead valign="bottom">
 485 <tr class="row-odd"><th class="head">Tx Channel Type</th>
 486 <th class="head">Tx Channel Index Range</th>
 487 </tr>
 488 </thead>
 489 <tbody valign="top">
 490 <tr class="row-even"><td>TX_HCHAN</td>
 491 <td>0 to 1</td>
 492 </tr>
 493 <tr class="row-odd"><td>TX_CHAN</td>
 494 <td>2 to 45</td>
 495 </tr>
 496 <tr class="row-even"><td>TX_CHAN
 497 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 498 <td>46 to 47</td>
 499 </tr>
 500 </tbody>
 501 </table>
 502 <table border="1" class="docutils">
 503 <colgroup>
 504 <col width="57%" />
 505 <col width="43%" />
 506 </colgroup>
 507 <thead valign="bottom">
 508 <tr class="row-odd"><th class="head">Rx Channel Type</th>
 509 <th class="head">Rx Channel Index Range</th>
 510 </tr>
 511 </thead>
 512 <tbody valign="top">
 513 <tr class="row-even"><td>RX_HCHAN</td>
 514 <td>0 to 1</td>
 515 </tr>
 516 <tr class="row-odd"><td>RX_CHAN</td>
 517 <td>2 to 44</td>
 518 </tr>
 519 <tr class="row-even"><td>RX_CHAN
 520 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 521 <td>45 to 47</td>
 522 </tr>
 523 </tbody>
 524 </table>
 525 <table border="1" class="docutils">
 526 <colgroup>
 527 <col width="60%" />
 528 <col width="40%" />
 529 </colgroup>
 530 <thead valign="bottom">
 531 <tr class="row-odd"><th class="head">Rx Flow Type</th>
 532 <th class="head">Rx Flow Index Range</th>
 533 </tr>
 534 </thead>
 535 <tbody valign="top">
 536 <tr class="row-even"><td>DEFAULT</td>
 537 <td>0 to 44</td>
 538 </tr>
 539 <tr class="row-odd"><td>DEFAULT
 540 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 541 <td>45 to 47</td>
 542 </tr>
 543 <tr class="row-even"><td>CONFIGURABLE</td>
 544 <td>48 to 95</td>
 545 </tr>
 546 </tbody>
 547 </table>
 548 </div>
 549 <div class="section" id="navigator-subsystem-virtual-interrupts">
 550 <span id="pub-soc-j721e-vints"></span><h2>Navigator Subsystem Virtual Interrupts<a class="headerlink" href="#navigator-subsystem-virtual-interrupts" title="Permalink to this headline">¶</a></h2>
 551 <p>This section describes Navigator Subsystem virtual interrupts.  The virtual
 552 interrupts are used in interrupt management based TISCI messages.</p>
 553 <div class="admonition warning">
 554 <p class="first admonition-title">Warning</p>
 555 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
 556 host within the RM Board Configuration resource assignment array.  The RM
 557 Board Configuration is rejected if an overlap with a reserved resource is
 558 detected.</p>
 559 </div>
 560 <table border="1" class="docutils">
 561 <colgroup>
 562 <col width="56%" />
 563 <col width="44%" />
 564 </colgroup>
 565 <thead valign="bottom">
 566 <tr class="row-odd"><th class="head">Interrupt Aggregator Name</th>
 567 <th class="head">Virtual Interrupt Range</th>
 568 </tr>
 569 </thead>
 570 <tbody valign="top">
 571 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
 572 <td>0 to 63</td>
 573 </tr>
 574 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
 575 <td>0 to 63</td>
 576 </tr>
 577 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
 578 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 579 <td>0 to 37</td>
 580 </tr>
 581 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
 582 <td>38 to 255</td>
 583 </tr>
 584 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTAGGR_0
 585 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 586 <td>0 to 7</td>
 587 </tr>
 588 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTAGGR_0</td>
 589 <td>8 to 255</td>
 590 </tr>
 591 </tbody>
 592 </table>
 593 </div>
 594 <div class="section" id="navigator-subsystem-global-events">
 595 <span id="pub-soc-j721e-global-events"></span><h2>Navigator Subsystem Global Events<a class="headerlink" href="#navigator-subsystem-global-events" title="Permalink to this headline">¶</a></h2>
 596 <p>This section describes Navigator Subsystem global events.  The global events are
 597 used in interrupt management based TISCI messages.</p>
 598 <div class="admonition warning">
 599 <p class="first admonition-title">Warning</p>
 600 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
 601 host within the RM Board Configuration resource assignment array.  The RM
 602 Board Configuration is rejected if an overlap with a reserved resource is
 603 detected.</p>
 604 </div>
 605 <table border="1" class="docutils">
 606 <colgroup>
 607 <col width="61%" />
 608 <col width="39%" />
 609 </colgroup>
 610 <thead valign="bottom">
 611 <tr class="row-odd"><th class="head">Global Event Name</th>
 612 <th class="head">Global Event Range</th>
 613 </tr>
 614 </thead>
 615 <tbody valign="top">
 616 <tr class="row-even"><td>NAVSS0_UDMASS_INTAGGR_0 SEVT
 617 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 618 <td>0 to 37</td>
 619 </tr>
 620 <tr class="row-odd"><td>NAVSS0_UDMASS_INTAGGR_0 SEVT</td>
 621 <td>38 to 4607</td>
 622 </tr>
 623 <tr class="row-even"><td>MCU_NAVSS0_INTAGGR_0 SEVT
 624 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
 625 <td>16384 to 16391</td>
 626 </tr>
 627 <tr class="row-odd"><td>MCU_NAVSS0_INTAGGR_0 SEVT</td>
 628 <td>16392 to 17919</td>
 629 </tr>
 630 <tr class="row-even"><td>NAVSS0_MODSS_INTAGGR_0 SEVT</td>
 631 <td>20480 to 21503</td>
 632 </tr>
 633 <tr class="row-odd"><td>NAVSS0_MODSS_INTAGGR_1 SEVT</td>
 634 <td>22528 to 23551</td>
 635 </tr>
 636 <tr class="row-even"><td>NAVSS0_UDMASS_INTAGGR_0 MEVT</td>
 637 <td>32768 to 33279</td>
 638 </tr>
 639 <tr class="row-odd"><td>MCU_NAVSS0_INTAGGR_0 MEVT</td>
 640 <td>34816 to 34943</td>
 641 </tr>
 642 <tr class="row-even"><td>NAVSS0_UDMASS_INTAGGR_0 GEVT</td>
 643 <td>36864 to 37375</td>
 644 </tr>
 645 <tr class="row-odd"><td>MCU_NAVSS0_INTAGGR_0 GEVT</td>
 646 <td>39936 to 40191</td>
 647 </tr>
 648 <tr class="row-even"><td>NAVSS0_UDMAP_0 TRIGGER</td>
 649 <td>49152 to 50175</td>
 650 </tr>
 651 <tr class="row-odd"><td>MCU_NAVSS0_UDMAP_0 TRIGGER</td>
 652 <td>56320 to 56575</td>
 653 </tr>
 654 </tbody>
 655 </table>
 656 </div>
 657 <div class="section" id="navigator-subsystem-psi-l-source-and-destination-thread-ids">
 658 <span id="pub-soc-j721e-psil-thread-ids"></span><h2>Navigator Subsystem PSI-L Source and Destination Thread IDs<a class="headerlink" href="#navigator-subsystem-psi-l-source-and-destination-thread-ids" title="Permalink to this headline">¶</a></h2>
 659 <p>This section describes valid Navigator Subsystem PSI-L source and destination
 660 thread IDs for each thread type. The thread IDs are used in the PSI-L based
 661 TISCI messages.</p>
 662 <div class="admonition warning">
 663 <p class="first admonition-title">Warning</p>
 664 <p class="last">PSI-L threads marked as reserved for use by DMSC <strong>cannot</strong> be assigned be
 665 linked to another thread.</p>
 666 </div>
 667 <table border="1" class="docutils">
 668 <colgroup>
 669 <col width="68%" />
 670 <col width="32%" />
 671 </colgroup>
 672 <thead valign="bottom">
 673 <tr class="row-odd"><th class="head">Thread Type</th>
 674 <th class="head">Thread Range</th>
 675 </tr>
 676 </thead>
 677 <tbody valign="top">
 678 <tr class="row-even"><td>udmap0_trstrm_tx</td>
 679 <td>0x8 to 0x8</td>
 680 </tr>
 681 <tr class="row-odd"><td>udmap0_cfgstrm_tx</td>
 682 <td>0x20 to 0x20</td>
 683 </tr>
 684 <tr class="row-even"><td>navss_main_udmap0_tx</td>
 685 <td>0x1000 to 0x108b</td>
 686 </tr>
 687 <tr class="row-odd"><td>navss_main_saul0_rx</td>
 688 <td>0x4000 to 0x4003</td>
 689 </tr>
 690 <tr class="row-even"><td>navss_main_icssg0_rx</td>
 691 <td>0x4100 to 0x4104</td>
 692 </tr>
 693 <tr class="row-odd"><td>navss_main_icssg1_rx</td>
 694 <td>0x4200 to 0x4204</td>
 695 </tr>
 696 <tr class="row-even"><td>navss_main_pdma_main_debug_ccmcu_rx</td>
 697 <td>0x4300 to 0x4302</td>
 698 </tr>
 699 <tr class="row-odd"><td>navss_main_pdma_main_debug_mainc66_rx</td>
 700 <td>0x4304 to 0x4305</td>
 701 </tr>
 702 <tr class="row-even"><td>navss_main_pdma_main_mcasp_g0_rx</td>
 703 <td>0x4400 to 0x4402</td>
 704 </tr>
 705 <tr class="row-odd"><td>navss_main_pdma_main_aasrc_rx</td>
 706 <td>0x4404 to 0x440b</td>
 707 </tr>
 708 <tr class="row-even"><td>navss_main_pdma_main_mcasp_g1_rx</td>
 709 <td>0x4500 to 0x4508</td>
 710 </tr>
 711 <tr class="row-odd"><td>navss_main_pdma_main_misc_g0_rx</td>
 712 <td>0x4600 to 0x460a</td>
 713 </tr>
 714 <tr class="row-even"><td>navss_main_pdma_main_misc_g1_rx</td>
 715 <td>0x460c to 0x4616</td>
 716 </tr>
 717 <tr class="row-odd"><td>navss_main_pdma_main_misc_g2_rx</td>
 718 <td>0x4618 to 0x4622</td>
 719 </tr>
 720 <tr class="row-even"><td>navss_main_pdma_main_misc_g3_rx</td>
 721 <td>0x4624 to 0x462e</td>
 722 </tr>
 723 <tr class="row-odd"><td>navss_main_pdma_main_usart_g0_rx</td>
 724 <td>0x4700 to 0x4701</td>
 725 </tr>
 726 <tr class="row-even"><td>navss_main_pdma_main_usart_g1_rx</td>
 727 <td>0x4702 to 0x4703</td>
 728 </tr>
 729 <tr class="row-odd"><td>navss_main_pdma_main_usart_g2_rx</td>
 730 <td>0x4704 to 0x4709</td>
 731 </tr>
 732 <tr class="row-even"><td>navss_main_pdma_main_mcan_rx</td>
 733 <td>0x470c to 0x4729</td>
 734 </tr>
 735 <tr class="row-odd"><td>navss_main_msmc0_rx</td>
 736 <td>0x4800 to 0x481f</td>
 737 </tr>
 738 <tr class="row-even"><td>navss_main_vpac_tc0_cc_rx</td>
 739 <td>0x4820 to 0x483f</td>
 740 </tr>
 741 <tr class="row-odd"><td>navss_main_vpac_tc1_cc_rx</td>
 742 <td>0x4840 to 0x487f</td>
 743 </tr>
 744 <tr class="row-even"><td>navss_main_dmpac_tc0_cc_rx</td>
 745 <td>0x4880 to 0x489f</td>
 746 </tr>
 747 <tr class="row-odd"><td>navss_main_csi_rx</td>
 748 <td>0x4900 to 0x49ff</td>
 749 </tr>
 750 <tr class="row-even"><td>navss_main_cpsw9_rx</td>
 751 <td>0x4a00 to 0x4a00</td>
 752 </tr>
 753 <tr class="row-odd"><td>navss_mcu_udmap0_tx</td>
 754 <td>0x6000 to 0x602d</td>
 755 </tr>
 756 <tr class="row-even"><td>navss_mcu_udmap0_tx
 757 (<strong>Reserved by System Firmware</strong>)</td>
 758 <td>0x602e to 0x602f</td>
 759 </tr>
 760 <tr class="row-odd"><td>navss_mcu_pdma_cpsw0_rx</td>
 761 <td>0x7000 to 0x7000</td>
 762 </tr>
 763 <tr class="row-even"><td>navss_mcu_pdma_mcu0_rx</td>
 764 <td>0x7100 to 0x7106</td>
 765 </tr>
 766 <tr class="row-odd"><td>navss_mcu_pdma_mcu1_rx</td>
 767 <td>0x7200 to 0x7207</td>
 768 </tr>
 769 <tr class="row-even"><td>navss_mcu_pdma_mcu2_rx</td>
 770 <td>0x7300 to 0x7303</td>
 771 </tr>
 772 <tr class="row-odd"><td>navss_mcu_pdma_adc_rx</td>
 773 <td>0x7400 to 0x7403</td>
 774 </tr>
 775 <tr class="row-even"><td>navss_mcu_saul0_rx
 776 (<strong>Reserved by System Firmware</strong>)</td>
 777 <td>0x7500 to 0x7501</td>
 778 </tr>
 779 <tr class="row-odd"><td>navss_mcu_saul0_rx</td>
 780 <td>0x7502 to 0x7503</td>
 781 </tr>
 782 <tr class="row-even"><td>navss_main_udmap0_rx</td>
 783 <td>0x9000 to 0x908b</td>
 784 </tr>
 785 <tr class="row-odd"><td>navss_main_saul0_tx</td>
 786 <td>0xc000 to 0xc001</td>
 787 </tr>
 788 <tr class="row-even"><td>navss_main_icssg0_tx</td>
 789 <td>0xc100 to 0xc108</td>
 790 </tr>
 791 <tr class="row-odd"><td>navss_main_icssg1_tx</td>
 792 <td>0xc200 to 0xc208</td>
 793 </tr>
 794 <tr class="row-even"><td>navss_main_pdma_main_mcasp_g0_tx</td>
 795 <td>0xc400 to 0xc402</td>
 796 </tr>
 797 <tr class="row-odd"><td>navss_main_pdma_main_aasrc_tx</td>
 798 <td>0xc404 to 0xc40b</td>
 799 </tr>
 800 <tr class="row-even"><td>navss_main_pdma_main_mcasp_g1_tx</td>
 801 <td>0xc500 to 0xc508</td>
 802 </tr>
 803 <tr class="row-odd"><td>navss_main_pdma_main_misc_g0_tx</td>
 804 <td>0xc600 to 0xc60a</td>
 805 </tr>
 806 <tr class="row-even"><td>navss_main_pdma_main_misc_g1_tx</td>
 807 <td>0xc60c to 0xc616</td>
 808 </tr>
 809 <tr class="row-odd"><td>navss_main_pdma_main_misc_g2_tx</td>
 810 <td>0xc618 to 0xc622</td>
 811 </tr>
 812 <tr class="row-even"><td>navss_main_pdma_main_misc_g3_tx</td>
 813 <td>0xc624 to 0xc62e</td>
 814 </tr>
 815 <tr class="row-odd"><td>navss_main_pdma_main_usart_g0_tx</td>
 816 <td>0xc700 to 0xc701</td>
 817 </tr>
 818 <tr class="row-even"><td>navss_main_pdma_main_usart_g1_tx</td>
 819 <td>0xc702 to 0xc703</td>
 820 </tr>
 821 <tr class="row-odd"><td>navss_main_pdma_main_usart_g2_tx</td>
 822 <td>0xc704 to 0xc709</td>
 823 </tr>
 824 <tr class="row-even"><td>navss_main_pdma_main_mcan_tx</td>
 825 <td>0xc70c to 0xc729</td>
 826 </tr>
 827 <tr class="row-odd"><td>navss_main_msmc0_tx</td>
 828 <td>0xc800 to 0xc81f</td>
 829 </tr>
 830 <tr class="row-even"><td>navss_main_vpac_tc0_cc_tx</td>
 831 <td>0xc820 to 0xc83f</td>
 832 </tr>
 833 <tr class="row-odd"><td>navss_main_vpac_tc1_cc_tx</td>
 834 <td>0xc840 to 0xc87f</td>
 835 </tr>
 836 <tr class="row-even"><td>navss_main_dmpac_tc0_cc_tx</td>
 837 <td>0xc880 to 0xc89f</td>
 838 </tr>
 839 <tr class="row-odd"><td>navss_main_csi_tx</td>
 840 <td>0xc900 to 0xc9ff</td>
 841 </tr>
 842 <tr class="row-even"><td>navss_main_cpsw9_tx</td>
 843 <td>0xca00 to 0xca07</td>
 844 </tr>
 845 <tr class="row-odd"><td>navss_mcu_udmap0_rx</td>
 846 <td>0xe000 to 0xe02c</td>
 847 </tr>
 848 <tr class="row-even"><td>navss_mcu_udmap0_rx
 849 (<strong>Reserved by System Firmware</strong>)</td>
 850 <td>0xe02d to 0xe02f</td>
 851 </tr>
 852 <tr class="row-odd"><td>navss_mcu_pdma_cpsw0_tx</td>
 853 <td>0xf000 to 0xf007</td>
 854 </tr>
 855 <tr class="row-even"><td>navss_mcu_pdma_mcu0_tx</td>
 856 <td>0xf100 to 0xf106</td>
 857 </tr>
 858 <tr class="row-odd"><td>navss_mcu_pdma_mcu1_tx</td>
 859 <td>0xf200 to 0xf207</td>
 860 </tr>
 861 <tr class="row-even"><td>navss_mcu_pdma_mcu2_tx</td>
 862 <td>0xf300 to 0xf303</td>
 863 </tr>
 864 <tr class="row-odd"><td>navss_mcu_pdma_adc_tx</td>
 865 <td>0xf400 to 0xf3ff</td>
 866 </tr>
 867 <tr class="row-even"><td>navss_mcu_saul0_tx
 868 (<strong>Reserved by System Firmware</strong>)</td>
 869 <td>0xf500 to 0xf500</td>
 870 </tr>
 871 <tr class="row-odd"><td>navss_mcu_saul0_tx</td>
 872 <td>0xf501 to 0xf501</td>
 873 </tr>
 874 </tbody>
 875 </table>
 876 </div>
 877 </div>
 878
 879
 880            </div>
 881           </div>
 882           <footer>
 883
 884     <div class="rst-footer-buttons" role="navigation" aria-label="footer navigation">
 885
 886         <a href="sec_proxy.html" class="btn btn-neutral float-right" title="J721E Secure Proxy Descriptions" accesskey="n">Next <span class="fa fa-arrow-circle-right"></span></a>
 887
 888
 889         <a href="irq_dsts.html" class="btn btn-neutral" title="j721e Peripheral Interrupt Destination Descriptions" accesskey="p"><span class="fa fa-arrow-circle-left"></span> Previous</a>
 890
 891     </div>
 892
 893
 894   <hr/>
 895
 896   <div role="contentinfo">
 897     <p>
 898       <a href="http://www.ti.com/corp/docs/legal/copyright.shtml">&copy; Copyright 2016-2019</a>, Texas Instruments Incorporated. All rights reserved. <br>
 899       <a href="http://www.ti.com/corp/docs/legal/trademark/trademrk.htm">Trademarks</a> | <a href="http://www.ti.com/corp/docs/legal/privacy.shtml">Privacy policy</a> | <a href="http://www.ti.com/corp/docs/legal/termsofuse.shtml">Terms of use</a> | <a href="http://www.ti.com/lsds/ti/legal/termsofsale.page">Terms of sale</a>
 900
 901     </p>
 902   </div>
 903
 904 </footer>
 905
 906         </div>
 907       </div>
 908
 909     </section>
 910
 911   </div>
 912
 913
 914
 915
 916
 917     <script type="text/javascript">
 918         var DOCUMENTATION_OPTIONS = {
 919             URL_ROOT:'../../',
 920             VERSION:'19.07.00',
 921             COLLAPSE_INDEX:false,
 922             FILE_SUFFIX:'.html',
 923             HAS_SOURCE:  true
 924         };
 925     </script>
 926       <script type="text/javascript" src="../../_static/jquery.js"></script>
 927       <script type="text/javascript" src="../../_static/underscore.js"></script>
 928       <script type="text/javascript" src="../../_static/doctools.js"></script>
 929       <script type="text/javascript" src="https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.1/MathJax.js?config=TeX-AMS-MML_HTMLorMML"></script>
 930
 931     <script src="http://www.ti.com/assets/js/headerfooter/analytics.js" type="text/javascript" charset="utf-8"></script>
 932
 933
 934
 935
 936
 937     <script type="text/javascript" src="../../_static/js/theme.js"></script>
 938
 939
 940
 941
 942   <script type="text/javascript">
 943       jQuery(function () {
 944           SphinxRtdTheme.StickyNav.enable();
 945         });
 946
 947       var menuHeight = window.innerHeight;
 948
 949       var contentOffset = $(".wy-nav-content-wrap").offset();
 950       var contentHeight = $(".wy-nav-content-wrap").height();
 951       var contentBottom = contentOffset.top + contentHeight;
 952
 953       function setNavbarTop() {
 954           var scrollTop = $(window).scrollTop();
 955           var maxTop = scrollTop + menuHeight;
 956
 957           // If past the header
 958           if (scrollTop > contentOffset.top && maxTop < contentBottom) {
 959             stickyTop = scrollTop - contentOffset.top;
 960           } else if (maxTop > contentBottom) {
 961             stickyTop = scrollTop - contentOffset.top - (maxTop - contentBottom);
 962           } else {
 963             stickyTop = 0;
 964           }
 965
 966           $(".wy-nav-side").css("top", stickyTop);
 967       }
 968
 969       $(document).ready(function() {
 970         setNavbarTop();
 971         $(window).scroll(function () {
 972           setNavbarTop();
 973         });
 974
 975         $('body').on("mousewheel", function () {
 976             // Remove default behavior
 977             event.preventDefault();
 978             // Scroll without smoothing
 979             var wheelDelta = event.wheelDelta;
 980             var currentScrollPosition = window.pageYOffset;
 981             window.scrollTo(0, currentScrollPosition - wheelDelta);
 982         });
 983       });
 984   </script>
 985
 986
 987 </body>
 988 </html>