AM64x RM: Update defaulBoardCfg_rm to assign CMPEVNT INTR outputs for local events...
[processor-sdk/pdk.git] / packages / ti / drv / sciclient / soc / V3 / sciclient_defaultBoardcfg_rm.c
1 /*
2  * K3 System Firmware Resource Management Configuration Data
3  * Auto generated from K3 Resource Partitioning tool
4  *
5  * Copyright (c) 2018-2020, Texas Instruments Incorporated
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  *
12  * *  Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  *
15  * *  Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * *  Neither the name of Texas Instruments Incorporated nor the names of
20  *    its contributors may be used to endorse or promote products derived
21  *    from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
25  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
27  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
28  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
29  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
30  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
33  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 /**
36  *  \file V3/sciclient_defaultBoardcfg.c
37  *
38  *  \brief File containing the boardcfg default data structure to
39  *      send TISCI_MSG_BOARD_CONFIG message.
40  *
41  */
42 /* ========================================================================== */
43 /*                             Include Files                                  */
44 /* ========================================================================== */
46 #include <ti/drv/sciclient/soc/sysfw/include/am64x/tisci_hosts.h>
47 #include <ti/drv/sciclient/soc/sysfw/include/am64x/tisci_boardcfg_constraints.h>
48 #include <ti/drv/sciclient/soc/sysfw/include/am64x/tisci_devices.h>
49 #include <ti/drv/sciclient/soc/V3/sciclient_defaultBoardcfg.h>
51 /* ========================================================================== */
52 /*                            Global Variables                                */
53 /* ========================================================================== */
55 #if defined (BUILD_MCU1_0)
56 const struct tisci_local_rm_boardcfg gBoardConfigLow_rm
57 __attribute__(( aligned(128), section(".boardcfg_data") )) =
58 {
59     .rm_boardcfg = {
60         .rev = {
61             .tisci_boardcfg_abi_maj = TISCI_BOARDCFG_RM_ABI_MAJ_VALUE,
62             .tisci_boardcfg_abi_min = TISCI_BOARDCFG_RM_ABI_MIN_VALUE,
63         },
64         .host_cfg = {
65             .subhdr = {
66                 .magic = TISCI_BOARDCFG_RM_HOST_CFG_MAGIC_NUM,
67                 .size = (uint16_t) sizeof(struct tisci_boardcfg_rm_host_cfg),
68             },
69             .host_cfg_entries = {
70                 {
71                     .host_id = TISCI_HOST_ID_A53_2,
72                     .allowed_atype = 0b101010,
73                     .allowed_qos   = 0xAAAA,
74                     .allowed_orderid = 0xAAAAAAAA,
75                     .allowed_priority = 0xAAAA,
76                     .allowed_sched_priority = 0xAA
77                 },
78                 {
79                     .host_id = TISCI_HOST_ID_M4_0,
80                     .allowed_atype = 0b101010,
81                     .allowed_qos   = 0xAAAA,
82                     .allowed_orderid = 0xAAAAAAAA,
83                     .allowed_priority = 0xAAAA,
84                     .allowed_sched_priority = 0xAA
85                 },
86                 {
87                     .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
88                     .allowed_atype = 0b101010,
89                     .allowed_qos   = 0xAAAA,
90                     .allowed_orderid = 0xAAAAAAAA,
91                     .allowed_priority = 0xAAAA,
92                     .allowed_sched_priority = 0xAA
93                 },
94                 {
95                     .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
96                     .allowed_atype = 0b101010,
97                     .allowed_qos   = 0xAAAA,
98                     .allowed_orderid = 0xAAAAAAAA,
99                     .allowed_priority = 0xAAAA,
100                     .allowed_sched_priority = 0xAA
101                 },
102                 {
103                     .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
104                     .allowed_atype = 0b101010,
105                     .allowed_qos   = 0xAAAA,
106                     .allowed_orderid = 0xAAAAAAAA,
107                     .allowed_priority = 0xAAAA,
108                     .allowed_sched_priority = 0xAA
109                 },
110                 {
111                     .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
112                     .allowed_atype = 0b101010,
113                     .allowed_qos   = 0xAAAA,
114                     .allowed_orderid = 0xAAAAAAAA,
115                     .allowed_priority = 0xAAAA,
116                     .allowed_sched_priority = 0xAA
117                 },
118             },
119         },
120         .resasg = {
121             .subhdr = {
122                 .magic = TISCI_BOARDCFG_RM_RESASG_MAGIC_NUM,
123                 .size = (uint16_t) sizeof(struct tisci_boardcfg_rm_resasg),
124             },
125             .resasg_entries_size = 181 * sizeof(struct tisci_boardcfg_rm_resasg_entry),
126         },
127     },
128     .resasg_entries = {
129         {
130             .num_resource = 16,
131             .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
132             .start_resource = 0,
133             .host_id = TISCI_HOST_ID_A53_2,
134         },
135         {
136             .num_resource = 4,
137             .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
138             .start_resource = 16,
139             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
140         },
141         {
142             .num_resource = 4,
143             .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
144             .start_resource = 16,
145             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
146         },
147         {
148             .num_resource = 4,
149             .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
150             .start_resource = 20,
151             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
152         },
153         {
154             .num_resource = 4,
155             .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
156             .start_resource = 24,
157             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
158         },
159         {
160             .num_resource = 4,
161             .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
162             .start_resource = 28,
163             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
164         },
165         {
166             .num_resource = 8,
167             .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
168             .start_resource = 32,
169             .host_id = TISCI_HOST_ID_ALL,
170         },
171         {
172             .num_resource = 8,
173             .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
174             .start_resource = 0,
175             .host_id = TISCI_HOST_ID_A53_2,
176         },
177         {
178             .num_resource = 2,
179             .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
180             .start_resource = 8,
181             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
182         },
183         {
184             .num_resource = 2,
185             .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
186             .start_resource = 8,
187             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
188         },
189         {
190             .num_resource = 2,
191             .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
192             .start_resource = 10,
193             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
194         },
195         {
196             .num_resource = 2,
197             .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
198             .start_resource = 12,
199             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
200         },
201         {
202             .num_resource = 2,
203             .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
204             .start_resource = 14,
205             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
206         },
207         {
208             .num_resource = 4,
209             .type = TISCI_RESASG_UTYPE (TISCI_DEV_MCU_MCU_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
210             .start_resource = 0,
211             .host_id = TISCI_HOST_ID_A53_2,
212         },
213         {
214             .num_resource = 4,
215             .type = TISCI_RESASG_UTYPE (TISCI_DEV_MCU_MCU_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
216             .start_resource = 4,
217             .host_id = TISCI_HOST_ID_M4_0,
218         },
219         {
220             .num_resource = 41,
221             .type = TISCI_RESASG_UTYPE (TISCI_DEV_TIMESYNC_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
222             .start_resource = 0,
223             .host_id = TISCI_HOST_ID_ALL,
224         },
225         {
226             .num_resource = 136,
227             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER),
228             .start_resource = 50176,
229             .host_id = TISCI_HOST_ID_ALL,
230         },
231         {
232             .num_resource = 1,
233             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG),
234             .start_resource = 0,
235             .host_id = TISCI_HOST_ID_ALL,
236         },
237         {
238             .num_resource = 12,
239             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
240             .start_resource = 0,
241             .host_id = TISCI_HOST_ID_A53_2,
242         },
243         {
244             .num_resource = 6,
245             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
246             .start_resource = 12,
247             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
248         },
249         {
250             .num_resource = 6,
251             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
252             .start_resource = 12,
253             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
254         },
255         {
256             .num_resource = 2,
257             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
258             .start_resource = 18,
259             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
260         },
261         {
262             .num_resource = 4,
263             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
264             .start_resource = 20,
265             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
266         },
267         {
268             .num_resource = 2,
269             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
270             .start_resource = 24,
271             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
272         },
273         {
274             .num_resource = 1,
275             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
276             .start_resource = 26,
277             .host_id = TISCI_HOST_ID_M4_0,
278         },
279         {
280             .num_resource = 1,
281             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
282             .start_resource = 27,
283             .host_id = TISCI_HOST_ID_ALL,
284         },
285         {
286             .num_resource = 6,
287             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
288             .start_resource = 48,
289             .host_id = TISCI_HOST_ID_A53_2,
290         },
291         {
292             .num_resource = 6,
293             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
294             .start_resource = 54,
295             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
296         },
297         {
298             .num_resource = 6,
299             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
300             .start_resource = 54,
301             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
302         },
303         {
304             .num_resource = 2,
305             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
306             .start_resource = 60,
307             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
308         },
309         {
310             .num_resource = 4,
311             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
312             .start_resource = 62,
313             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
314         },
315         {
316             .num_resource = 2,
317             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
318             .start_resource = 66,
319             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
320         },
321         {
322             .num_resource = 6,
323             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN),
324             .start_resource = 28,
325             .host_id = TISCI_HOST_ID_A53_2,
326         },
327         {
328             .num_resource = 6,
329             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN),
330             .start_resource = 34,
331             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
332         },
333         {
334             .num_resource = 6,
335             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN),
336             .start_resource = 34,
337             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
338         },
339         {
340             .num_resource = 2,
341             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN),
342             .start_resource = 40,
343             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
344         },
345         {
346             .num_resource = 4,
347             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN),
348             .start_resource = 42,
349             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
350         },
351         {
352             .num_resource = 2,
353             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN),
354             .start_resource = 46,
355             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
356         },
357         {
358             .num_resource = 12,
359             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN),
360             .start_resource = 0,
361             .host_id = TISCI_HOST_ID_A53_2,
362         },
363         {
364             .num_resource = 6,
365             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN),
366             .start_resource = 12,
367             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
368         },
369         {
370             .num_resource = 6,
371             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN),
372             .start_resource = 12,
373             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
374         },
375         {
376             .num_resource = 2,
377             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN),
378             .start_resource = 18,
379             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
380         },
381         {
382             .num_resource = 4,
383             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN),
384             .start_resource = 20,
385             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
386         },
387         {
388             .num_resource = 2,
389             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN),
390             .start_resource = 24,
391             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
392         },
393         {
394             .num_resource = 1,
395             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN),
396             .start_resource = 26,
397             .host_id = TISCI_HOST_ID_M4_0,
398         },
399         {
400             .num_resource = 1,
401             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN),
402             .start_resource = 27,
403             .host_id = TISCI_HOST_ID_ALL,
404         },
405         {
406             .num_resource = 6,
407             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN),
408             .start_resource = 0,
409             .host_id = TISCI_HOST_ID_A53_2,
410         },
411         {
412             .num_resource = 6,
413             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN),
414             .start_resource = 6,
415             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
416         },
417         {
418             .num_resource = 6,
419             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN),
420             .start_resource = 6,
421             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
422         },
423         {
424             .num_resource = 2,
425             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN),
426             .start_resource = 12,
427             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
428         },
429         {
430             .num_resource = 4,
431             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN),
432             .start_resource = 14,
433             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
434         },
435         {
436             .num_resource = 2,
437             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN),
438             .start_resource = 18,
439             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
440         },
441         {
442             .num_resource = 6,
443             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN),
444             .start_resource = 0,
445             .host_id = TISCI_HOST_ID_A53_2,
446         },
447         {
448             .num_resource = 6,
449             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN),
450             .start_resource = 6,
451             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
452         },
453         {
454             .num_resource = 6,
455             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN),
456             .start_resource = 6,
457             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
458         },
459         {
460             .num_resource = 2,
461             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN),
462             .start_resource = 12,
463             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
464         },
465         {
466             .num_resource = 4,
467             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN),
468             .start_resource = 14,
469             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
470         },
471         {
472             .num_resource = 2,
473             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN),
474             .start_resource = 18,
475             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
476         },
477         {
478             .num_resource = 36,
479             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_VINT),
480             .start_resource = 4,
481             .host_id = TISCI_HOST_ID_A53_2,
482         },
483         {
484             .num_resource = 14,
485             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_VINT),
486             .start_resource = 44,
487             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
488         },
489         {
490             .num_resource = 14,
491             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_VINT),
492             .start_resource = 44,
493             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
494         },
495         {
496             .num_resource = 14,
497             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_VINT),
498             .start_resource = 58,
499             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
500         },
501         {
502             .num_resource = 14,
503             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_VINT),
504             .start_resource = 92,
505             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
506         },
507         {
508             .num_resource = 14,
509             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_VINT),
510             .start_resource = 106,
511             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
512         },
513         {
514             .num_resource = 16,
515             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_VINT),
516             .start_resource = 168,
517             .host_id = TISCI_HOST_ID_M4_0,
518         },
519         {
520             .num_resource = 512,
521             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
522             .start_resource = 15,
523             .host_id = TISCI_HOST_ID_A53_2,
524         },
525         {
526             .num_resource = 256,
527             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
528             .start_resource = 527,
529             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
530         },
531         {
532             .num_resource = 256,
533             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
534             .start_resource = 527,
535             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
536         },
537         {
538             .num_resource = 192,
539             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
540             .start_resource = 783,
541             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
542         },
543         {
544             .num_resource = 256,
545             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
546             .start_resource = 975,
547             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
548         },
549         {
550             .num_resource = 192,
551             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
552             .start_resource = 1231,
553             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
554         },
555         {
556             .num_resource = 96,
557             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
558             .start_resource = 1423,
559             .host_id = TISCI_HOST_ID_M4_0,
560         },
561         {
562             .num_resource = 17,
563             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
564             .start_resource = 1519,
565             .host_id = TISCI_HOST_ID_ALL,
566         },
567         {
568             .num_resource = 1024,
569             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_TIMERMGR_EVT_OES),
570             .start_resource = 0,
571             .host_id = TISCI_HOST_ID_ALL,
572         },
573         {
574             .num_resource = 42,
575             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_PKTDMA_TX_CHAN_ERROR_OES),
576             .start_resource = 4096,
577             .host_id = TISCI_HOST_ID_ALL,
578         },
579         {
580             .num_resource = 112,
581             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_PKTDMA_TX_FLOW_COMPLETION_OES),
582             .start_resource = 4608,
583             .host_id = TISCI_HOST_ID_ALL,
584         },
585         {
586             .num_resource = 29,
587             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_PKTDMA_RX_CHAN_ERROR_OES),
588             .start_resource = 5120,
589             .host_id = TISCI_HOST_ID_ALL,
590         },
591         {
592             .num_resource = 176,
593             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_COMPLETION_OES),
594             .start_resource = 5632,
595             .host_id = TISCI_HOST_ID_ALL,
596         },
597         {
598             .num_resource = 176,
599             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_STARVATION_OES),
600             .start_resource = 6144,
601             .host_id = TISCI_HOST_ID_ALL,
602         },
603         {
604             .num_resource = 176,
605             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_FIREWALL_OES),
606             .start_resource = 6656,
607             .host_id = TISCI_HOST_ID_ALL,
608         },
609         {
610             .num_resource = 28,
611             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_CHAN_ERROR_OES),
612             .start_resource = 8192,
613             .host_id = TISCI_HOST_ID_ALL,
614         },
615         {
616             .num_resource = 28,
617             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_CHAN_DATA_COMPLETION_OES),
618             .start_resource = 8704,
619             .host_id = TISCI_HOST_ID_ALL,
620         },
621         {
622             .num_resource = 28,
623             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_CHAN_RING_COMPLETION_OES),
624             .start_resource = 9216,
625             .host_id = TISCI_HOST_ID_ALL,
626         },
627         {
628             .num_resource = 20,
629             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_ERROR_OES),
630             .start_resource = 9728,
631             .host_id = TISCI_HOST_ID_ALL,
632         },
633         {
634             .num_resource = 20,
635             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_DATA_COMPLETION_OES),
636             .start_resource = 10240,
637             .host_id = TISCI_HOST_ID_ALL,
638         },
639         {
640             .num_resource = 20,
641             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_RING_COMPLETION_OES),
642             .start_resource = 10752,
643             .host_id = TISCI_HOST_ID_ALL,
644         },
645         {
646             .num_resource = 20,
647             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_ERROR_OES),
648             .start_resource = 11264,
649             .host_id = TISCI_HOST_ID_ALL,
650         },
651         {
652             .num_resource = 20,
653             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_DATA_COMPLETION_OES),
654             .start_resource = 11776,
655             .host_id = TISCI_HOST_ID_ALL,
656         },
657         {
658             .num_resource = 20,
659             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_INTAGGR_0, TISCI_RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_RING_COMPLETION_OES),
660             .start_resource = 12288,
661             .host_id = TISCI_HOST_ID_ALL,
662         },
663         {
664             .num_resource = 1,
665             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG),
666             .start_resource = 0,
667             .host_id = TISCI_HOST_ID_ALL,
668         },
669         {
670             .num_resource = 4,
671             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN),
672             .start_resource = 0,
673             .host_id = TISCI_HOST_ID_A53_2,
674         },
675         {
676             .num_resource = 3,
677             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN),
678             .start_resource = 4,
679             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
680         },
681         {
682             .num_resource = 3,
683             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN),
684             .start_resource = 4,
685             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
686         },
687         {
688             .num_resource = 2,
689             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN),
690             .start_resource = 7,
691             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
692         },
693         {
694             .num_resource = 4,
695             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN),
696             .start_resource = 9,
697             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
698         },
699         {
700             .num_resource = 2,
701             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN),
702             .start_resource = 13,
703             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
704         },
705         {
706             .num_resource = 1,
707             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN),
708             .start_resource = 15,
709             .host_id = TISCI_HOST_ID_M4_0,
710         },
711         {
712             .num_resource = 64,
713             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_CPSW_TX_CHAN),
714             .start_resource = 16,
715             .host_id = TISCI_HOST_ID_A53_2,
716         },
717         {
718             .num_resource = 7,
719             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_0_CHAN),
720             .start_resource = 81,
721             .host_id = TISCI_HOST_ID_ALL,
722         },
723         {
724             .num_resource = 8,
725             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_1_CHAN),
726             .start_resource = 88,
727             .host_id = TISCI_HOST_ID_A53_2,
728         },
729         {
730             .num_resource = 4,
731             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_TX_CHAN),
732             .start_resource = 96,
733             .host_id = TISCI_HOST_ID_A53_2,
734         },
735         {
736             .num_resource = 4,
737             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_TX_CHAN),
738             .start_resource = 100,
739             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
740         },
741         {
742             .num_resource = 4,
743             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_TX_CHAN),
744             .start_resource = 100,
745             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
746         },
747         {
748             .num_resource = 4,
749             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_TX_CHAN),
750             .start_resource = 104,
751             .host_id = TISCI_HOST_ID_A53_2,
752         },
753         {
754             .num_resource = 4,
755             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_TX_CHAN),
756             .start_resource = 108,
757             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
758         },
759         {
760             .num_resource = 4,
761             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_TX_CHAN),
762             .start_resource = 108,
763             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
764         },
765         {
766             .num_resource = 4,
767             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN),
768             .start_resource = 112,
769             .host_id = TISCI_HOST_ID_A53_2,
770         },
771         {
772             .num_resource = 3,
773             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN),
774             .start_resource = 116,
775             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
776         },
777         {
778             .num_resource = 3,
779             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN),
780             .start_resource = 116,
781             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
782         },
783         {
784             .num_resource = 2,
785             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN),
786             .start_resource = 119,
787             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
788         },
789         {
790             .num_resource = 4,
791             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN),
792             .start_resource = 121,
793             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
794         },
795         {
796             .num_resource = 2,
797             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN),
798             .start_resource = 125,
799             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
800         },
801         {
802             .num_resource = 1,
803             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN),
804             .start_resource = 127,
805             .host_id = TISCI_HOST_ID_M4_0,
806         },
807         {
808             .num_resource = 16,
809             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_CPSW_RX_CHAN),
810             .start_resource = 128,
811             .host_id = TISCI_HOST_ID_A53_2,
812         },
813         {
814             .num_resource = 7,
815             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_0_CHAN),
816             .start_resource = 145,
817             .host_id = TISCI_HOST_ID_ALL,
818         },
819         {
820             .num_resource = 8,
821             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_1_CHAN),
822             .start_resource = 144,
823             .host_id = TISCI_HOST_ID_ALL,
824         },
825         {
826             .num_resource = 8,
827             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_2_CHAN),
828             .start_resource = 152,
829             .host_id = TISCI_HOST_ID_A53_2,
830         },
831         {
832             .num_resource = 8,
833             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_3_CHAN),
834             .start_resource = 152,
835             .host_id = TISCI_HOST_ID_A53_2,
836         },
837         {
838             .num_resource = 32,
839             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_RX_CHAN),
840             .start_resource = 160,
841             .host_id = TISCI_HOST_ID_A53_2,
842         },
843         {
844             .num_resource = 32,
845             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_RX_CHAN),
846             .start_resource = 192,
847             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
848         },
849         {
850             .num_resource = 32,
851             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_RX_CHAN),
852             .start_resource = 192,
853             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
854         },
855         {
856             .num_resource = 32,
857             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_RX_CHAN),
858             .start_resource = 224,
859             .host_id = TISCI_HOST_ID_A53_2,
860         },
861         {
862             .num_resource = 32,
863             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_RX_CHAN),
864             .start_resource = 256,
865             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
866         },
867         {
868             .num_resource = 32,
869             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_RX_CHAN),
870             .start_resource = 256,
871             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
872         },
873         {
874             .num_resource = 4,
875             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN),
876             .start_resource = 0,
877             .host_id = TISCI_HOST_ID_A53_2,
878         },
879         {
880             .num_resource = 3,
881             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN),
882             .start_resource = 4,
883             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
884         },
885         {
886             .num_resource = 3,
887             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN),
888             .start_resource = 4,
889             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
890         },
891         {
892             .num_resource = 2,
893             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN),
894             .start_resource = 7,
895             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
896         },
897         {
898             .num_resource = 4,
899             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN),
900             .start_resource = 9,
901             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
902         },
903         {
904             .num_resource = 2,
905             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN),
906             .start_resource = 13,
907             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
908         },
909         {
910             .num_resource = 1,
911             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN),
912             .start_resource = 15,
913             .host_id = TISCI_HOST_ID_M4_0,
914         },
915         {
916             .num_resource = 8,
917             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_CPSW_TX_CHAN),
918             .start_resource = 16,
919             .host_id = TISCI_HOST_ID_A53_2,
920         },
921         {
922             .num_resource = 1,
923             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_TX_1_CHAN),
924             .start_resource = 25,
925             .host_id = TISCI_HOST_ID_A53_2,
926         },
927         {
928             .num_resource = 4,
929             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_0_TX_CHAN),
930             .start_resource = 26,
931             .host_id = TISCI_HOST_ID_A53_2,
932         },
933         {
934             .num_resource = 4,
935             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_0_TX_CHAN),
936             .start_resource = 30,
937             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
938         },
939         {
940             .num_resource = 4,
941             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_0_TX_CHAN),
942             .start_resource = 30,
943             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
944         },
945         {
946             .num_resource = 4,
947             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_1_TX_CHAN),
948             .start_resource = 34,
949             .host_id = TISCI_HOST_ID_A53_2,
950         },
951         {
952             .num_resource = 4,
953             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_1_TX_CHAN),
954             .start_resource = 38,
955             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
956         },
957         {
958             .num_resource = 4,
959             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_1_TX_CHAN),
960             .start_resource = 38,
961             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
962         },
963         {
964             .num_resource = 4,
965             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN),
966             .start_resource = 0,
967             .host_id = TISCI_HOST_ID_A53_2,
968         },
969         {
970             .num_resource = 3,
971             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN),
972             .start_resource = 4,
973             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
974         },
975         {
976             .num_resource = 3,
977             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN),
978             .start_resource = 4,
979             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
980         },
981         {
982             .num_resource = 2,
983             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN),
984             .start_resource = 7,
985             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
986         },
987         {
988             .num_resource = 4,
989             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN),
990             .start_resource = 9,
991             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
992         },
993         {
994             .num_resource = 2,
995             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN),
996             .start_resource = 13,
997             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
998         },
999         {
1000             .num_resource = 1,
1001             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN),
1002             .start_resource = 15,
1003             .host_id = TISCI_HOST_ID_M4_0,
1004         },
1005         {
1006             .num_resource = 4,
1007             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN),
1008             .start_resource = 0,
1009             .host_id = TISCI_HOST_ID_A53_2,
1010         },
1011         {
1012             .num_resource = 3,
1013             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN),
1014             .start_resource = 4,
1015             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
1016         },
1017         {
1018             .num_resource = 3,
1019             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN),
1020             .start_resource = 4,
1021             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
1022         },
1023         {
1024             .num_resource = 2,
1025             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN),
1026             .start_resource = 7,
1027             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
1028         },
1029         {
1030             .num_resource = 4,
1031             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN),
1032             .start_resource = 9,
1033             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
1034         },
1035         {
1036             .num_resource = 2,
1037             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN),
1038             .start_resource = 13,
1039             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
1040         },
1041         {
1042             .num_resource = 1,
1043             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN),
1044             .start_resource = 15,
1045             .host_id = TISCI_HOST_ID_M4_0,
1046         },
1047         {
1048             .num_resource = 1,
1049             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_CPSW_RX_CHAN),
1050             .start_resource = 16,
1051             .host_id = TISCI_HOST_ID_A53_2,
1052         },
1053         {
1054             .num_resource = 16,
1055             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_CPSW_RX_CHAN),
1056             .start_resource = 16,
1057             .host_id = TISCI_HOST_ID_A53_2,
1058         },
1059         {
1060             .num_resource = 8,
1061             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_0_CHAN),
1062             .start_resource = 32,
1063             .host_id = TISCI_HOST_ID_ALL,
1064         },
1065         {
1066             .num_resource = 8,
1067             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_1_CHAN),
1068             .start_resource = 32,
1069             .host_id = TISCI_HOST_ID_ALL,
1070         },
1071         {
1072             .num_resource = 1,
1073             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_2_CHAN),
1074             .start_resource = 19,
1075             .host_id = TISCI_HOST_ID_A53_2,
1076         },
1077         {
1078             .num_resource = 8,
1079             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_2_CHAN),
1080             .start_resource = 40,
1081             .host_id = TISCI_HOST_ID_A53_2,
1082         },
1083         {
1084             .num_resource = 1,
1085             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_3_CHAN),
1086             .start_resource = 20,
1087             .host_id = TISCI_HOST_ID_A53_2,
1088         },
1089         {
1090             .num_resource = 8,
1091             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_3_CHAN),
1092             .start_resource = 40,
1093             .host_id = TISCI_HOST_ID_A53_2,
1094         },
1095         {
1096             .num_resource = 2,
1097             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_0_RX_CHAN),
1098             .start_resource = 21,
1099             .host_id = TISCI_HOST_ID_A53_2,
1100         },
1101         {
1102             .num_resource = 2,
1103             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_0_RX_CHAN),
1104             .start_resource = 23,
1105             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
1106         },
1107         {
1108             .num_resource = 2,
1109             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_0_RX_CHAN),
1110             .start_resource = 23,
1111             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
1112         },
1113         {
1114             .num_resource = 32,
1115             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_0_RX_CHAN),
1116             .start_resource = 48,
1117             .host_id = TISCI_HOST_ID_A53_2,
1118         },
1119         {
1120             .num_resource = 32,
1121             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_0_RX_CHAN),
1122             .start_resource = 80,
1123             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
1124         },
1125         {
1126             .num_resource = 32,
1127             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_0_RX_CHAN),
1128             .start_resource = 80,
1129             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
1130         },
1131         {
1132             .num_resource = 2,
1133             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_1_RX_CHAN),
1134             .start_resource = 25,
1135             .host_id = TISCI_HOST_ID_A53_2,
1136         },
1137         {
1138             .num_resource = 2,
1139             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_1_RX_CHAN),
1140             .start_resource = 27,
1141             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
1142         },
1143         {
1144             .num_resource = 2,
1145             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_1_RX_CHAN),
1146             .start_resource = 27,
1147             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
1148         },
1149         {
1150             .num_resource = 32,
1151             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_1_RX_CHAN),
1152             .start_resource = 112,
1153             .host_id = TISCI_HOST_ID_A53_2,
1154         },
1155         {
1156             .num_resource = 32,
1157             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_1_RX_CHAN),
1158             .start_resource = 144,
1159             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
1160         },
1161         {
1162             .num_resource = 32,
1163             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_1_RX_CHAN),
1164             .start_resource = 144,
1165             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
1166         },
1167         {
1168             .num_resource = 1,
1169             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_ERROR_OES),
1170             .start_resource = 0,
1171             .host_id = TISCI_HOST_ID_ALL,
1172         },
1173         {
1174             .num_resource = 2,
1175             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_VIRTID),
1176             .start_resource = 2,
1177             .host_id = TISCI_HOST_ID_A53_2,
1178         },
1179         {
1180             .num_resource = 2,
1181             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
1182             .start_resource = 20,
1183             .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
1184         },
1185         {
1186             .num_resource = 2,
1187             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
1188             .start_resource = 20,
1189             .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
1190         },
1191         {
1192             .num_resource = 2,
1193             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
1194             .start_resource = 22,
1195             .host_id = TISCI_HOST_ID_MAIN_0_R5_3,
1196         },
1197         {
1198             .num_resource = 2,
1199             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
1200             .start_resource = 24,
1201             .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
1202         },
1203         {
1204             .num_resource = 2,
1205             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
1206             .start_resource = 26,
1207             .host_id = TISCI_HOST_ID_MAIN_1_R5_3,
1208         },
1209         {
1210             .num_resource = 4,
1211             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
1212             .start_resource = 28,
1213             .host_id = TISCI_HOST_ID_ALL,
1214         },
1215     }
1216 };
1217 #endif