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 173   <div class="section" id="tisci-general-message-api-documentation">
 174 <h1>TISCI General Message API Documentation<a class="headerlink" href="#tisci-general-message-api-documentation" title="Permalink to this headline">¶</a></h1>
 175 <p>This document describes the TISCI API set for general messages such as those
 176 to fetch the firmware version in use, send usecase specific configuration, and
 177 get notified of the boot state of system-firmware.</p>
 178 <div class="section" id="tisci-msg-version">
 179 <h2>TISCI_MSG_VERSION<a class="headerlink" href="#tisci-msg-version" title="Permalink to this headline">¶</a></h2>
 180 <div class="section" id="objective">
 181 <h3>Objective<a class="headerlink" href="#objective" title="Permalink to this headline">¶</a></h3>
 182 <p>Retrieve the version of the currently running system-firmware.</p>
 183 </div>
 184 <div class="section" id="usage">
 185 <h3>Usage<a class="headerlink" href="#usage" title="Permalink to this headline">¶</a></h3>
 186 <table border="1" class="docutils">
 187 <colgroup>
 188 <col width="75%" />
 189 <col width="25%" />
 190 </colgroup>
 191 <tbody valign="top">
 192 <tr class="row-odd"><td><strong>Message Type</strong></td>
 193 <td>Normal</td>
 194 </tr>
 195 <tr class="row-even"><td><strong>Secure Queue Only?</strong></td>
 196 <td>No</td>
 197 </tr>
 198 </tbody>
 199 </table>
 200 <p>This retrieves several pieces of information about the version of
 201 system-firmware that is loaded and running.</p>
 202 </div>
 203 <div class="section" id="tisci-message-id">
 204 <h3>TISCI Message ID<a class="headerlink" href="#tisci-message-id" title="Permalink to this headline">¶</a></h3>
 205 <p><code class="docutils literal"><span class="pre">TISCI_MSG_VERSION</span>&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160; <span class="pre">(0x0002U)</span></code></p>
 206 </div>
 207 <div class="section" id="message-data-structures">
 208 <h3>Message Data Structures<a class="headerlink" href="#message-data-structures" title="Permalink to this headline">¶</a></h3>
 209 <p><p><strong>struct tisci_msg_version_req</strong></p>
 210 <p>Notification message to indicate the DMSC is available.</p>
 211 <table border="1" class="docutils">
 212 <colgroup>
 213 <col width="27%" />
 214 <col width="43%" />
 215 <col width="31%" />
 216 </colgroup>
 217 <thead valign="bottom">
 218 <tr class="row-odd"><th class="head">Parameter</th>
 219 <th class="head">Type</th>
 220 <th class="head">Description</th>
 221 </tr>
 222 </thead>
 223 <tbody valign="top">
 224 <tr class="row-even"><td>hdr</td>
 225 <td>struct tisci_header</td>
 226 <td>TISCI header</td>
 227 </tr>
 228 </tbody>
 229 </table>
 230 <p>Although this message is essentially empty and contains only a header
 231  a full data structure is created for consistency in implementation.</p>
 232 </p>
 233 <p><p><strong>struct tisci_msg_version_resp</strong></p>
 234 <p>TISCI_MSG_VERSION request to provide version info about currently running firmware.</p>
 235 <table border="1" class="docutils">
 236 <colgroup>
 237 <col width="18%" />
 238 <col width="25%" />
 239 <col width="58%" />
 240 </colgroup>
 241 <thead valign="bottom">
 242 <tr class="row-odd"><th class="head">Parameter</th>
 243 <th class="head">Type</th>
 244 <th class="head">Description</th>
 245 </tr>
 246 </thead>
 247 <tbody valign="top">
 248 <tr class="row-even"><td>hdr</td>
 249 <td>struct tisci_header</td>
 250 <td>TISCI header.</td>
 251 </tr>
 252 <tr class="row-odd"><td>str</td>
 253 <td>char</td>
 254 <td>Human readable version string.</td>
 255 </tr>
 256 <tr class="row-even"><td>version</td>
 257 <td>u16</td>
 258 <td>Version number of the firmware.</td>
 259 </tr>
 260 <tr class="row-odd"><td>abi_major</td>
 261 <td>u8</td>
 262 <td>Major version number of ABI in use by firmware.</td>
 263 </tr>
 264 <tr class="row-even"><td>abi_minor</td>
 265 <td>u8</td>
 266 <td>Minor version number of ABI in use by firmware.</td>
 267 </tr>
 268 <tr class="row-odd"><td>sub_version</td>
 269 <td>u8</td>
 270 <td>Sub-version number of the firmware.</td>
 271 </tr>
 272 <tr class="row-even"><td>patch_version</td>
 273 <td>u8</td>
 274 <td>Patch-version number of the firmware.</td>
 275 </tr>
 276 </tbody>
 277 </table>
 278 </p>
 279 </div>
 280 </div>
 281 <div class="section" id="tisci-msg-boot-notification">
 282 <h2>TISCI_MSG_BOOT_NOTIFICATION<a class="headerlink" href="#tisci-msg-boot-notification" title="Permalink to this headline">¶</a></h2>
 283 <div class="section" id="id1">
 284 <h3>Objective<a class="headerlink" href="#id1" title="Permalink to this headline">¶</a></h3>
 285 <p>Notify the system boot host that the system-firmware is ready
 286 to begin receiving and processing TISCI messages.</p>
 287 </div>
 288 <div class="section" id="id2">
 289 <h3>Usage<a class="headerlink" href="#id2" title="Permalink to this headline">¶</a></h3>
 290 <table border="1" class="docutils">
 291 <colgroup>
 292 <col width="63%" />
 293 <col width="37%" />
 294 </colgroup>
 295 <tbody valign="top">
 296 <tr class="row-odd"><td><strong>Message Type</strong></td>
 297 <td>Notification</td>
 298 </tr>
 299 <tr class="row-even"><td><strong>Secure Queue Only?</strong></td>
 300 <td>Yes</td>
 301 </tr>
 302 </tbody>
 303 </table>
 304 <p>This is a system-firmware initiated notification message that is
 305 sent to the boot core of the system to notify system-firmware is
 306 ready to receive TISCI messages. Up until this point, no interaction
 307 is possible with system firmware.</p>
 308 </div>
 309 <div class="section" id="id3">
 310 <h3>TISCI Message ID<a class="headerlink" href="#id3" title="Permalink to this headline">¶</a></h3>
 311 <p><code class="docutils literal"><span class="pre">TISCI_MSG_BOOT_NOTIFICATION</span>&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160; <span class="pre">(0x000AU)</span></code></p>
 312 </div>
 313 <div class="section" id="id4">
 314 <h3>Message Data Structures<a class="headerlink" href="#id4" title="Permalink to this headline">¶</a></h3>
 315 <p><p><strong>struct tisci_msg_boot_notification_req</strong></p>
 316 <p>Notification message to indicate the DMSC is available.</p>
 317 <table border="1" class="docutils">
 318 <colgroup>
 319 <col width="16%" />
 320 <col width="21%" />
 321 <col width="62%" />
 322 </colgroup>
 323 <thead valign="bottom">
 324 <tr class="row-odd"><th class="head">Parameter</th>
 325 <th class="head">Type</th>
 326 <th class="head">Description</th>
 327 </tr>
 328 </thead>
 329 <tbody valign="top">
 330 <tr class="row-even"><td>hdr</td>
 331 <td>struct tisci_header</td>
 332 <td>TISCI header</td>
 333 </tr>
 334 <tr class="row-odd"><td>extboot_status</td>
 335 <td>u32</td>
 336 <td>Status of extended boot. Applicable only for combined image</td>
 337 </tr>
 338 </tbody>
 339 </table>
 340 </p>
 341 <p><p><strong>struct tisci_msg_boot_notification_resp</strong></p>
 342 <p>Response to notification message about firmware availability.</p>
 343 <table border="1" class="docutils">
 344 <colgroup>
 345 <col width="27%" />
 346 <col width="43%" />
 347 <col width="31%" />
 348 </colgroup>
 349 <thead valign="bottom">
 350 <tr class="row-odd"><th class="head">Parameter</th>
 351 <th class="head">Type</th>
 352 <th class="head">Description</th>
 353 </tr>
 354 </thead>
 355 <tbody valign="top">
 356 <tr class="row-even"><td>hdr</td>
 357 <td>struct tisci_header</td>
 358 <td>TISCI header</td>
 359 </tr>
 360 </tbody>
 361 </table>
 362 <p>Although this message is essentially empty and contains only a header
 363  a full data structure is created for consistency in implementation.</p>
 364 </p>
 365 </div>
 366 </div>
 367 <div class="section" id="tisci-msg-board-config">
 368 <h2>TISCI_MSG_BOARD_CONFIG<a class="headerlink" href="#tisci-msg-board-config" title="Permalink to this headline">¶</a></h2>
 369 <p>See <a class="reference internal" href="../../3_boardcfg/BOARDCFG.html#pub-boardcfg-tisci"><span class="std std-ref">TISCI API for Board Config</span></a>.</p>
 370 </div>
 371 <div class="section" id="tisci-msg-board-config-rm">
 372 <h2>TISCI_MSG_BOARD_CONFIG_RM<a class="headerlink" href="#tisci-msg-board-config-rm" title="Permalink to this headline">¶</a></h2>
 373 <p>See <a class="reference internal" href="../../3_boardcfg/BOARDCFG_RM.html#pub-boardcfg-rm-tisci"><span class="std std-ref">TISCI API for Resource Management Board Config</span></a>.</p>
 374 </div>
 375 <div class="section" id="tisci-msg-board-config-security">
 376 <h2>TISCI_MSG_BOARD_CONFIG_SECURITY<a class="headerlink" href="#tisci-msg-board-config-security" title="Permalink to this headline">¶</a></h2>
 377 <p>See <a class="reference internal" href="../../3_boardcfg/BOARDCFG_SEC.html#pub-boardcfg-security-tisci"><span class="std std-ref">TISCI API for Security Board Config</span></a>.</p>
 378 </div>
 379 <div class="section" id="tisci-msg-board-config-pm">
 380 <h2>TISCI_MSG_BOARD_CONFIG_PM<a class="headerlink" href="#tisci-msg-board-config-pm" title="Permalink to this headline">¶</a></h2>
 381 <p>See <a class="reference internal" href="../../3_boardcfg/BOARDCFG_PM.html#pub-boardcfg-pm-tisci"><span class="std std-ref">TISCI API for Power Management Board Config</span></a>.</p>
 382 </div>
 383 <div class="section" id="tisci-msg-query-msmc">
 384 <h2>TISCI_MSG_QUERY_MSMC<a class="headerlink" href="#tisci-msg-query-msmc" title="Permalink to this headline">¶</a></h2>
 385 <div class="section" id="id5">
 386 <h3>Objective<a class="headerlink" href="#id5" title="Permalink to this headline">¶</a></h3>
 387 <p>Retrieve the MSMC memory available.</p>
 388 </div>
 389 <div class="section" id="id6">
 390 <h3>Usage<a class="headerlink" href="#id6" title="Permalink to this headline">¶</a></h3>
 391 <table border="1" class="docutils">
 392 <colgroup>
 393 <col width="75%" />
 394 <col width="25%" />
 395 </colgroup>
 396 <tbody valign="top">
 397 <tr class="row-odd"><td><strong>Message Type</strong></td>
 398 <td>Normal</td>
 399 </tr>
 400 <tr class="row-even"><td><strong>Secure Queue Only?</strong></td>
 401 <td>No</td>
 402 </tr>
 403 </tbody>
 404 </table>
 405 <p>This API is enabled ONLY on SoCs that actually have MSMC memory. This
 406 retrieves valid start and end address of MSMC memory considering size
 407 of allocation for cache backing RAM and MSMC shared usage by System
 408 Firmware.</p>
 409 <p>This API is linked with the parameter provided in
 410 <a class="reference internal" href="../../3_boardcfg/BOARDCFG.html#pub-boardcfg-msmc"><span class="std std-ref">Design for boardcfg_msmc</span></a>. The parameter <strong>msmc_cache_size</strong> is a value
 411 ranging from <code class="docutils literal"><span class="pre">0x00</span></code> to <code class="docutils literal"><span class="pre">0x20</span></code> independent of SoC and configured
 412 at system startup. This API is used by software components that start
 413 functionality later in the boot sequence and intends to manage or use
 414 the remaining SRAM contents.</p>
 415 <p>To understand the relationship, let’s consider a SoC with actual
 416 physical MSMC SRAM available to allocate as 2MB:</p>
 417 <p><em>case A) Allocation of 1/2 SRAM(1MB) for L3 backing RAM</em></p>
 418 <div class="figure">
 419 <img alt="../../_images/msmc_alloc_strategy.png" src="../../_images/msmc_alloc_strategy.png" />
 420 </div>
 421 <p>In the above example, when the <strong>msmc_cache_size</strong> parameter is <code class="docutils literal"><span class="pre">0x10</span></code>,
 422 1MB is reserved for backing ram by the SoC. Memory needed for
 423 communication infrastructure is automatically relocated to the center
 424 of MSMC SRAM.</p>
 425 <p>The available MSMC SRAM for use by software queried via
 426 TISCI_MSG_QUERY_MSMC will respond with: start = <code class="docutils literal"><span class="pre">0x0000000070000000</span></code>
 427 and end = <code class="docutils literal"><span class="pre">0x00000000700EFFFF</span></code> (1MB-64K)</p>
 428 <p><em>case B) Allocation of 0bytes SRAM for L3 backing RAM</em></p>
 429 <div class="figure">
 430 <img alt="../../_images/msmc_alloc_strategy_0cache.png" src="../../_images/msmc_alloc_strategy_0cache.png" />
 431 </div>
 432 <p>In the above example, when the <strong>msmc_cache_size</strong> parameter is <code class="docutils literal"><span class="pre">0x00</span></code>,
 433 no memory is reserved for backing ram by the SoC. Memory needed for
 434 communication infrastructure is automatically relocated to the far end
 435 of MSMC SRAM.</p>
 436 <p>The available MSMC SRAM for use by software queried via
 437 TISCI_MSG_QUERY_MSMC will respond with: start = <code class="docutils literal"><span class="pre">0x0000000070000000</span></code>
 438 and end = <code class="docutils literal"><span class="pre">0x00000000701EFFFF</span></code> (2MB-64K)</p>
 439 <div class="admonition warning">
 440 <p class="first admonition-title">Warning</p>
 441 <p>It is important to keep the following in mind. Software
 442 applications must always use this API to know the actual SRAM
 443 memory available for use. This is extremely critical if the
 444 software component providing (example: bootloader) does not have
 445 means to communicate information to the component that actually
 446 uses the SRAM.</p>
 447 <p class="last">As a hardware behavior, a read from MSMC SRAM reserved for
 448 backing L3 Cache will return 0x0 on a read, vs a write will cause
 449 a data abort to that address. Meanwhile a read/write to the
 450 memory reserved for communication memory will generate a firewall
 451 exception.</p>
 452 </div>
 453 </div>
 454 <div class="section" id="tisci-query-msmc">
 455 <h3>TISCI query MSMC<a class="headerlink" href="#tisci-query-msmc" title="Permalink to this headline">¶</a></h3>
 456 <p><code class="docutils literal"><span class="pre">TISCI_MSG_QUERY_MSMC</span>&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160; <span class="pre">(0x0020U)</span></code></p>
 457 </div>
 458 <div class="section" id="id7">
 459 <h3>Message Data Structures<a class="headerlink" href="#id7" title="Permalink to this headline">¶</a></h3>
 460 <p><p><strong>struct tisci_query_msmc_req</strong></p>
 461 <p>TISCI_MSG_QUERY_MSMC request to provide currently available MSMC memory if present in the SoC</p>
 462 <table border="1" class="docutils">
 463 <colgroup>
 464 <col width="27%" />
 465 <col width="43%" />
 466 <col width="31%" />
 467 </colgroup>
 468 <thead valign="bottom">
 469 <tr class="row-odd"><th class="head">Parameter</th>
 470 <th class="head">Type</th>
 471 <th class="head">Description</th>
 472 </tr>
 473 </thead>
 474 <tbody valign="top">
 475 <tr class="row-even"><td>hdr</td>
 476 <td>struct tisci_header</td>
 477 <td>TISCI header</td>
 478 </tr>
 479 </tbody>
 480 </table>
 481 <p>Although this message is essentially empty and contains only a header
 482  a full data structure is created for consistency in implementation.</p>
 483 </p>
 484 <p><p><strong>struct tisci_query_msmc_resp</strong></p>
 485 <p>TISCI_MSG_QUERY_MSMC request response providing currently available MSMC memory if present in the SoC</p>
 486 <table border="1" class="docutils">
 487 <colgroup>
 488 <col width="13%" />
 489 <col width="16%" />
 490 <col width="71%" />
 491 </colgroup>
 492 <thead valign="bottom">
 493 <tr class="row-odd"><th class="head">Parameter</th>
 494 <th class="head">Type</th>
 495 <th class="head">Description</th>
 496 </tr>
 497 </thead>
 498 <tbody valign="top">
 499 <tr class="row-even"><td>hdr</td>
 500 <td>struct tisci_header</td>
 501 <td>TISCI header.</td>
 502 </tr>
 503 <tr class="row-odd"><td>msmc_start_low</td>
 504 <td>u32</td>
 505 <td>Low 32-bits of physical address start of MSMC memory</td>
 506 </tr>
 507 <tr class="row-even"><td>msmc_start_high</td>
 508 <td>u32</td>
 509 <td>High 32-bits of physical address start of MSMC memory</td>
 510 </tr>
 511 <tr class="row-odd"><td>msmc_end_low</td>
 512 <td>u32</td>
 513 <td>Low 32-bits of physical addressable address (byte aligned) of valid range of MSMC memory.</td>
 514 </tr>
 515 <tr class="row-even"><td>msmc_end_high</td>
 516 <td>u32</td>
 517 <td>High 32-bits of physical addressable address (byte aligned) of valid range of MSMC memory.</td>
 518 </tr>
 519 </tbody>
 520 </table>
 521 </p>
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