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113 <li class="toctree-l4"><a class="reference internal" href="#introduction">Introduction</a></li>
114 <li class="toctree-l4"><a class="reference internal" href="#tisci-msg-rm-ring-cfg-ring-accelerator-ring-configure">TISCI_MSG_RM_RING_CFG - Ring Accelerator Ring Configure</a></li>
115 <li class="toctree-l4"><a class="reference internal" href="#tisci-msg-rm-ring-mon-cfg-ring-monitor-configuration">TISCI_MSG_RM_RING_MON_CFG - Ring Monitor Configuration</a></li>
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174 <div class="section" id="resource-management-ring-accelerator-tisci-message-description">
175 <h1>Resource Management Ring Accelerator TISCI Message Description<a class="headerlink" href="#resource-management-ring-accelerator-tisci-message-description" title="Permalink to this headline">¶</a></h1>
176 <div class="section" id="introduction">
177 <h2>Introduction<a class="headerlink" href="#introduction" title="Permalink to this headline">¶</a></h2>
178 <p>This chapter provides information on usage of the RM Ring Accelerator management
179 TISCI message API parameters.</p>
180 <table border="1" class="docutils">
181 <colgroup>
182 <col width="19%" />
183 <col width="81%" />
184 </colgroup>
185 <thead valign="bottom">
186 <tr class="row-odd"><th class="head">TISCI Message ID</th>
187 <th class="head">Message Name</th>
188 </tr>
189 </thead>
190 <tbody valign="top">
191 <tr class="row-even"><td>0x1100</td>
192 <td>RESERVED, DO NOT (RE)USE</td>
193 </tr>
194 <tr class="row-odd"><td>0x1101</td>
195 <td>RESERVED, DO NOT (RE)USE</td>
196 </tr>
197 <tr class="row-even"><td>0x1102</td>
198 <td>RESERVED, DO NOT (RE)USE</td>
199 </tr>
200 <tr class="row-odd"><td>0x1103</td>
201 <td>RESERVED, DO NOT (RE)USE</td>
202 </tr>
203 <tr class="row-even"><td>0x1110</td>
204 <td><a class="reference internal" href="#pub-rm-public-ra-cfg"><span class="std std-ref">TISCI_MSG_RM_RING_CFG</span></a></td>
205 </tr>
206 <tr class="row-odd"><td>N/A</td>
207 <td><a class="reference internal" href="#pub-rm-public-ra-cfg-response"><span class="std std-ref">TISCI_MSG_RM_RING_CFG Response</span></a></td>
208 </tr>
209 <tr class="row-even"><td>0x1111</td>
210 <td>RESERVED, DO NOT (RE)USE</td>
211 </tr>
212 <tr class="row-odd"><td>0x1120</td>
213 <td><a class="reference internal" href="#pub-rm-public-ra-mon-cfg"><span class="std std-ref">TISCI_MSG_RM_RING_MON_CFG</span></a></td>
214 </tr>
215 <tr class="row-even"><td>N/A</td>
216 <td><a class="reference internal" href="#pub-rm-public-ra-mon-cfg-response"><span class="std std-ref">TISCI_MSG_RM_RING_MON_CFG Response</span></a></td>
217 </tr>
218 </tbody>
219 </table>
220 <div class="section" id="ring-valid-parameters-field-usage">
221 <span id="pub-rm-public-ra-valid-params"></span><h3>Ring Valid Parameters Field Usage<a class="headerlink" href="#ring-valid-parameters-field-usage" title="Permalink to this headline">¶</a></h3>
222 <p>Some ring TISCI message APIs make use of a valid_params bit field. Bits within
223 the valid_params field define whether or not individual TISCI message
224 parameters are valid. When a bit corresponding to a parameter is set (to 1)
225 the parameter is considered valid and will be programmed into its
226 corresponding register field, assuming validation of the parameter passes.
227 When a valid_params bit is not set, i.e. a value of 0, the corresponding
228 register field is read and used within the validation process of the request.
229 The register field for a parameter is not programmed if the corresponding
230 valid_params bit is not set.</p>
231 </div>
232 </div>
233 <div class="section" id="tisci-msg-rm-ring-cfg-ring-accelerator-ring-configure">
234 <h2>TISCI_MSG_RM_RING_CFG - Ring Accelerator Ring Configure<a class="headerlink" href="#tisci-msg-rm-ring-cfg-ring-accelerator-ring-configure" title="Permalink to this headline">¶</a></h2>
235 <div class="section" id="ring-accelerator-ring-configure-request">
236 <span id="pub-rm-public-ra-cfg"></span><h3>Ring Accelerator Ring Configure Request<a class="headerlink" href="#ring-accelerator-ring-configure-request" title="Permalink to this headline">¶</a></h3>
237 <p>The <strong>ring cfg</strong> TISCI message API is used to configure SoC
238 Navigator Subsystem Ring Accelerator rings. The API only allows configuration
239 of a ring by passing the ring index and the Navigator SoC device ID in which the
240 ring is located. Only the non-real-time ring registers are programmed as part
241 of the ring configuration. The host is granted access to the ring real-time
242 registers via the SoC channelized firewalls based on the RM board configuration.
243 The OS can access the ring real-time registers directly after ring configuration
244 is complete.</p>
245 <p>Ring ISC Virt IDs are programmable through the <strong>ring cfg</strong> TISCI message.
246 Host access permissions to program the ring Virt IDs are granted through the RM
247 board configuration. A host attempting to program the Virt ID must be assigned
248 a Virt ID range and own, or be a supervisor of the owner of, the ring as
249 defined in the board configuration. Virt IDs are typically programmed
250 by hypervisor. Subordinates of the hypervisor are assigned and configure rings.
251 The hypervisor programs the ring’s Virt IDs separately (or at the same time if
252 the hypervisor is tasked with configuring a ring’s non-real-time registers as
253 well).</p>
254 <p>Ring parameter validation steps are performed against passed valid configuration
255 parameters in combination with existing register settings for configuration
256 parameters specified as not valid.</p>
257 <p>The ring global error event and per-ring event registers are not programmed as
258 part of the <strong>ring cfg</strong> API. These registers are decoupled from ring
259 configuration for security reasons. They’re programmed internally via
260 the <a class="reference internal" href="rm_irq.html#pub-rm-irq-route-set"><span class="std std-ref">RM IRQ Set</span></a> message.</p>
261 <p>The <strong>ring cfg</strong> TISCI message API resets the ring if any of the RING_BA_HI,
262 RING_BA_LO, or RING_SIZE registers are written as part of the ring
263 configuration. Resetting a ring resets the ring’s occupancies and pointers.
264 The host, or a supervisor of the host, who owns the ring must be the
265 requesting host.</p>
266 <p>The <strong>ring cfg</strong> API can be used to configure rings within any Navigator
267 Subsystem Ring Accelerator on the device.</p>
268 <div class="section" id="usage">
269 <h4>Usage<a class="headerlink" href="#usage" title="Permalink to this headline">¶</a></h4>
270 <table border="1" class="docutils">
271 <colgroup>
272 <col width="75%" />
273 <col width="25%" />
274 </colgroup>
275 <tbody valign="top">
276 <tr class="row-odd"><td><strong>Message Type</strong></td>
277 <td>Normal</td>
278 </tr>
279 <tr class="row-even"><td><strong>Secure Queue Only?</strong></td>
280 <td>No</td>
281 </tr>
282 </tbody>
283 </table>
284 </div>
285 <div class="section" id="tisci-message-id">
286 <h4>TISCI Message ID<a class="headerlink" href="#tisci-message-id" title="Permalink to this headline">¶</a></h4>
287 <p><p><code class="docutils literal"><span class="pre">TISCI_MSG_RM_RING_CFG</span>          <span class="pre">(0x1110U)</span></code></p>
288 <p>RM TISCI message to configure a Navigator Subsystem ring</p>
289 </p>
290 </div>
291 <div class="section" id="ring-configure-message-parameters">
292 <h4>Ring Configure Message Parameters<a class="headerlink" href="#ring-configure-message-parameters" title="Permalink to this headline">¶</a></h4>
293 <p><p><strong>struct tisci_msg_rm_ring_cfg_req</strong></p>
294 <p>Configures a Navigator Subsystem ring</p>
295 <table border="1" class="docutils">
296 <colgroup>
297 <col width="2%" />
298 <col width="3%" />
299 <col width="95%" />
300 </colgroup>
301 <thead valign="bottom">
302 <tr class="row-odd"><th class="head">Parameter</th>
303 <th class="head">Type</th>
304 <th class="head">Description</th>
305 </tr>
306 </thead>
307 <tbody valign="top">
308 <tr class="row-even"><td>hdr</td>
309 <td>struct tisci_header</td>
310 <td>Standard TISCI header</td>
311 </tr>
312 <tr class="row-odd"><td>valid_params</td>
313 <td>u32</td>
314 <td>Bitfield defining validity of ring configuration parameters. The ring configuration fields are not valid, and will not be used for ring configuration, if their corresponding valid bit is zero. Valid bit usage: 0 - Valid bit for @ref tisci_msg_rm_ring_cfg_req::addr_lo 1 - Valid bit for @ref tisci_msg_rm_ring_cfg_req::addr_hi 2 - Valid bit for @ref tisci_msg_rm_ring_cfg_req::count 3 - Valid bit for @ref tisci_msg_rm_ring_cfg_req::mode 4 - Valid bit for @ref tisci_msg_rm_ring_cfg_req::size 5 - Valid bit for @ref tisci_msg_rm_ring_cfg_req::order_id 6 - Valid bit for @ref tisci_msg_rm_ring_cfg_req::virtid</td>
315 </tr>
316 <tr class="row-even"><td>nav_id</td>
317 <td>u16</td>
318 <td>SoC device ID of Navigator Subsystem where ring is located</td>
319 </tr>
320 <tr class="row-odd"><td>index</td>
321 <td>u16</td>
322 <td>Ring index.</td>
323 </tr>
324 <tr class="row-even"><td>addr_lo</td>
325 <td>u32</td>
326 <td>32 LSBs of ring base address to be programmed into the ring’s RING_BA_LO register.</td>
327 </tr>
328 <tr class="row-odd"><td>addr_hi</td>
329 <td>u32</td>
330 <td>16 MSBs of ring base address to be programmed into the ring’s RING_BA_HI register. Only the 16 LSBs of @ref addr_hi are used when programming RING_BA_HI, the upper 16 bits are discarded.</td>
331 </tr>
332 <tr class="row-even"><td>count</td>
333 <td>u32</td>
334 <td>Number of ring elements to be programmed into the size field of the ring’s RING_SIZE register.</td>
335 </tr>
336 <tr class="row-odd"><td>mode</td>
337 <td>u8</td>
338 <td>Ring mode to be programmed into the qmode field of the ring’s RING_SIZE register. Can be set to: @ref TISCI_MSG_VALUE_RM_RING_MODE_RING @ref TISCI_MSG_VALUE_RM_RING_MODE_MESSAGE @ref TISCI_MSG_VALUE_RM_RING_MODE_CREDENTIALS @ref TISCI_MSG_VALUE_RM_RING_MODE_QM</td>
339 </tr>
340 <tr class="row-even"><td>size</td>
341 <td>u8</td>
342 <td>Encoded ring element size to be programmed into the elsize field of the ring’s RING_SIZE register. To calculate the encoded size use the formula (log2(size_bytes) - 2), where “size_bytes” cannot be greater than 256 bytes. Can be set to: @ref TISCI_MSG_VALUE_RM_RING_SIZE_4B @ref TISCI_MSG_VALUE_RM_RING_SIZE_8B @ref TISCI_MSG_VALUE_RM_RING_SIZE_16B @ref TISCI_MSG_VALUE_RM_RING_SIZE_32B @ref TISCI_MSG_VALUE_RM_RING_SIZE_64B @ref TISCI_MSG_VALUE_RM_RING_SIZE_128B @ref TISCI_MSG_VALUE_RM_RING_SIZE_256B</td>
343 </tr>
344 <tr class="row-odd"><td>order_id</td>
345 <td>u8</td>
346 <td>Ring bus order ID value to be programmed into the orderid field of the ring’s RING_ORDERID register. When valid, the replace field of the ring’s RING_ORDERID register will be set to 1 so that the programmed order ID will be used.</td>
347 </tr>
348 <tr class="row-even"><td>virtid</td>
349 <td>u16</td>
350 <td>Ring virt ID value to be programmed into the virtid field of the ring’s RING_CONTROL2 ISC region register. This field is only valid if @ref TISCI_MSG_VALUE_RM_RING_VIRTID_VALID is set in @ref tisci_msg_rm_ring_cfg_req::valid_params.</td>
351 </tr>
352 <tr class="row-odd"><td>asel</td>
353 <td>u8</td>
354 <td>Ring ASEL (address select) value to be set into the ASEL field of the ring’s RING_BA_HI register. This field is only valid if @ref TISCI_MSG_VALUE_RM_RING_ASEL_VALID is set in @ref tisci_msg_rm_ring_cfg_req::valid_params. This field is not supported on some SoCs. On SoCs that do not support this field the input is quietly ignored even if the valid bit is set.</td>
355 </tr>
356 </tbody>
357 </table>
358 <p>Configures the non-real-time registers of a Navigator Subsystem ring.
359 The ring index must be assigned to the host defined in the TISCI header via
360 the RM board configuration resource assignment range list.
361 This field is only valid if
362 @ref TISCI_MSG_VALUE_RM_RING_ADDR_LO_VALID is set in
363 @ref tisci_msg_rm_ring_cfg_req::valid_params.
364 This field is only valid if
365 @ref TISCI_MSG_VALUE_RM_RING_ADDR_HI_VALID is set in
366 @ref tisci_msg_rm_ring_cfg_req::valid_params.
367 This field is only valid if
368 @ref TISCI_MSG_VALUE_RM_RING_COUNT_VALID is set in
369 @ref tisci_msg_rm_ring_cfg_req::valid_params.
370 This field is only valid if
371 @ref TISCI_MSG_VALUE_RM_RING_MODE_VALID is set in
372 @ref tisci_msg_rm_ring_cfg_req::valid_params.
373 This field is only valid if
374 @ref TISCI_MSG_VALUE_RM_RING_SIZE_VALID is set in
375 @ref tisci_msg_rm_ring_cfg_req::valid_params.
376 This field is only valid if
377 @ref TISCI_MSG_VALUE_RM_RING_ORDER_ID_VALID is set in
378 @ref tisci_msg_rm_ring_cfg_req::valid_params.</p>
379 </p>
380 </div>
381 <div class="section" id="ring-configuration-valid-parameters">
382 <span id="pub-rm-ring-cfg-valid-params"></span><h4>Ring Configuration Valid Parameters<a class="headerlink" href="#ring-configuration-valid-parameters" title="Permalink to this headline">¶</a></h4>
383 <p>The following table describes the valid bit mappings for the ring configure
384 message optional parameters:</p>
385 <table border="1" class="docutils">
386 <colgroup>
387 <col width="23%" />
388 <col width="77%" />
389 </colgroup>
390 <thead valign="bottom">
391 <tr class="row-odd"><th class="head">valid_params Bit</th>
392 <th class="head">Corresponding tisci_msg_rm_ring_cfg_req Optional Parameter</th>
393 </tr>
394 </thead>
395 <tbody valign="top">
396 <tr class="row-even"><td>0</td>
397 <td>addr_lo</td>
398 </tr>
399 <tr class="row-odd"><td>1</td>
400 <td>addr_hi</td>
401 </tr>
402 <tr class="row-even"><td>2</td>
403 <td>count</td>
404 </tr>
405 <tr class="row-odd"><td>3</td>
406 <td>mode</td>
407 </tr>
408 <tr class="row-even"><td>4</td>
409 <td>size</td>
410 </tr>
411 <tr class="row-odd"><td>5</td>
412 <td>order_id</td>
413 </tr>
414 <tr class="row-even"><td>6</td>
415 <td>virtid</td>
416 </tr>
417 </tbody>
418 </table>
419 </div>
420 </div>
421 <div class="section" id="ring-accelerator-ring-configure-response">
422 <span id="pub-rm-public-ra-cfg-response"></span><h3>Ring Accelerator Ring Configure Response<a class="headerlink" href="#ring-accelerator-ring-configure-response" title="Permalink to this headline">¶</a></h3>
423 <p>The <strong>ring cfg response</strong> message returns the result status of the
424 processed <strong>ring cfg</strong> message.</p>
425 <div class="section" id="ring-configure-response-message-parameters">
426 <h4>Ring Configure Response Message Parameters<a class="headerlink" href="#ring-configure-response-message-parameters" title="Permalink to this headline">¶</a></h4>
427 <p><p><strong>struct tisci_msg_rm_ring_cfg_resp</strong></p>
428 <p>Response to configuring a ring.</p>
429 <table border="1" class="docutils">
430 <colgroup>
431 <col width="23%" />
432 <col width="37%" />
433 <col width="40%" />
434 </colgroup>
435 <thead valign="bottom">
436 <tr class="row-odd"><th class="head">Parameter</th>
437 <th class="head">Type</th>
438 <th class="head">Description</th>
439 </tr>
440 </thead>
441 <tbody valign="top">
442 <tr class="row-even"><td>hdr</td>
443 <td>struct tisci_header</td>
444 <td>Standard TISCI header</td>
445 </tr>
446 </tbody>
447 </table>
448 </p>
449 </div>
450 </div>
451 </div>
452 <div class="section" id="tisci-msg-rm-ring-mon-cfg-ring-monitor-configuration">
453 <h2>TISCI_MSG_RM_RING_MON_CFG - Ring Monitor Configuration<a class="headerlink" href="#tisci-msg-rm-ring-mon-cfg-ring-monitor-configuration" title="Permalink to this headline">¶</a></h2>
454 <div class="section" id="ring-monitor-configuration-request">
455 <span id="pub-rm-public-ra-mon-cfg"></span><h3>Ring Monitor Configuration Request<a class="headerlink" href="#ring-monitor-configuration-request" title="Permalink to this headline">¶</a></h3>
456 <p>The <strong>ring_mon_cfg</strong> TISCI message API is used to configures the real-time
457 registers of a Navigator Subsystem ring monitor. The ring monitor
458 index must be assigned to the host defined in the TISCI header via the RM
459 board configuration resource assignment range list. The channelized
460 firewalls covering the ring monitor registers are configured to allow the
461 host read-only access.</p>
462 <div class="section" id="id1">
463 <h4>Usage<a class="headerlink" href="#id1" title="Permalink to this headline">¶</a></h4>
464 <table border="1" class="docutils">
465 <colgroup>
466 <col width="75%" />
467 <col width="25%" />
468 </colgroup>
469 <tbody valign="top">
470 <tr class="row-odd"><td><strong>Message Type</strong></td>
471 <td>Normal</td>
472 </tr>
473 <tr class="row-even"><td><strong>Secure Queue Only?</strong></td>
474 <td>No</td>
475 </tr>
476 </tbody>
477 </table>
478 </div>
479 <div class="section" id="id2">
480 <h4>TISCI Message ID<a class="headerlink" href="#id2" title="Permalink to this headline">¶</a></h4>
481 <p><p><code class="docutils literal"><span class="pre">TISCI_MSG_RM_RING_MON_CFG</span>          <span class="pre">(0x1120U)</span></code></p>
482 <p>RM TISCI message to configure a Navigator Subsystem ring monitor</p>
483 </p>
484 </div>
485 <div class="section" id="ring-monitor-configuration-message-parameters">
486 <h4>Ring Monitor Configuration Message Parameters<a class="headerlink" href="#ring-monitor-configuration-message-parameters" title="Permalink to this headline">¶</a></h4>
487 <p><p><strong>struct tisci_msg_rm_ring_mon_cfg_req</strong></p>
488 <p>Configures a Navigator Subsystem ring monitor. Configures the real-time registers of a Navigator Subsystem ring monitor. The ring monitor index must be assigned to the host defined in the TISCI header via the RM board configuration resource assignment range list. The channelized firewalls covering the ring monitor registers are configured to allow the host read-only access.</p>
489 <table border="1" class="docutils">
490 <colgroup>
491 <col width="2%" />
492 <col width="4%" />
493 <col width="94%" />
494 </colgroup>
495 <thead valign="bottom">
496 <tr class="row-odd"><th class="head">Parameter</th>
497 <th class="head">Type</th>
498 <th class="head">Description</th>
499 </tr>
500 </thead>
501 <tbody valign="top">
502 <tr class="row-even"><td>hdr</td>
503 <td>struct tisci_header</td>
504 <td>Standard TISCI header</td>
505 </tr>
506 <tr class="row-odd"><td>valid_params</td>
507 <td>u32</td>
508 <td>Bitfield defining validity of ring monitor configuration parameters. The ring monitor configuration fields are not valid, and will not be used for ring monitor configuration, if their corresponding valid bit is zero. Valid bit usage: 0 - Valid bit for @ref tisci_msg_rm_ring_mon_cfg_req::source 1 - Valid bit for @ref tisci_msg_rm_ring_mon_cfg_req::mode 2 - Valid bit for @ref tisci_msg_rm_ring_mon_cfg_req::queue 3 - Valid bit for @ref tisci_msg_rm_ring_mon_cfg_req::data0_val 4 - Valid bit for @ref tisci_msg_rm_ring_mon_cfg_req::data1_val</td>
509 </tr>
510 <tr class="row-even"><td>nav_id</td>
511 <td>u16</td>
512 <td>SoC device ID of Navigator Subsystem where ring monitor is located</td>
513 </tr>
514 <tr class="row-odd"><td>index</td>
515 <td>u16</td>
516 <td>Ring monitor index.</td>
517 </tr>
518 <tr class="row-even"><td>source</td>
519 <td>u8</td>
520 <td>Monitor source selection programmed into RINGACC_CONTROL register. Can be set to: @ref TISCI_MSG_VALUE_RM_MON_SRC_ELEM_CNT @ref TISCI_MSG_VALUE_RM_MON_SRC_HEAD_PKT_SIZE @ref TISCI_MSG_VALUE_RM_MON_SRC_ACCUM_Q_SIZE This field is only valid if @ref TISCI_MSG_VALUE_RM_MON_SOURCE_VALID is set in @ref tisci_msg_rm_ring_mon_cfg_req::valid_params.</td>
521 </tr>
522 <tr class="row-odd"><td>mode</td>
523 <td>u8</td>
524 <td>Monitor mode programmed into RINGACC_CONTROL register. Can be set to: @ref TISCI_MSG_VALUE_RM_MON_MODE_DISABLED @ref TISCI_MSG_VALUE_RM_MON_MODE_PUSH_POP @ref TISCI_MSG_VALUE_RM_MON_MODE_THRESHOLD @ref TISCI_MSG_VALUE_RM_MON_MODE_WATERMARK @ref TISCI_MSG_VALUE_RM_MON_MODE_STARVATION This field is only valid if @ref TISCI_MSG_VALUE_RM_MON_MODE_VALID is set in @ref tisci_msg_rm_ring_mon_cfg_req::valid_params.</td>
525 </tr>
526 <tr class="row-even"><td>queue</td>
527 <td>u16</td>
528 <td>Queue, or ring, to monitor programmed into RINGACC_QUEUE register. The specified queue must be assigned to the host, or a subordinate of the host, requesting the ring monitor configuration. This field is only valid if @ref TISCI_MSG_VALUE_RM_MON_QUEUE_VALID is set in @ref tisci_msg_rm_ring_mon_cfg_req::valid_params.</td>
529 </tr>
530 <tr class="row-odd"><td>data0_val</td>
531 <td>u32</td>
532 <td>Low threshold value programmed into RINGACC_DATA0 register when the ring monitor mode is configured to low/high threshold checking. Values specified in this field are ignored for other monitor modes. This field is only valid if @ref TISCI_MSG_VALUE_RM_MON_DATA0_VAL_VALID is set in @ref tisci_msg_rm_ring_mon_cfg_req::valid_params.</td>
533 </tr>
534 <tr class="row-even"><td>data1_val</td>
535 <td>u32</td>
536 <td>High threshold value programmed into RINGACC_DATA1 register when the ring monitor mode is configured to low/high threshold checking. Values specified in this field are ignored for other monitor modes. This field is only valid if @ref TISCI_MSG_VALUE_RM_MON_DATA1_VAL_VALID is set in @ref tisci_msg_rm_ring_mon_cfg_req::valid_params.</td>
537 </tr>
538 </tbody>
539 </table>
540 </p>
541 </div>
542 <div class="section" id="ring-monitor-configuration-valid-parameters">
543 <span id="pub-rm-public-ra-mon-cfg-valid-params"></span><h4>Ring Monitor Configuration Valid Parameters<a class="headerlink" href="#ring-monitor-configuration-valid-parameters" title="Permalink to this headline">¶</a></h4>
544 <p>The following table describes the valid bit mappings for the ring monitor
545 configuration parameters:</p>
546 <table border="1" class="docutils">
547 <colgroup>
548 <col width="24%" />
549 <col width="76%" />
550 </colgroup>
551 <thead valign="bottom">
552 <tr class="row-odd"><th class="head">valid_params Bit</th>
553 <th class="head">Corresponding tisci_msg_rm_ring_mon_cfg_req Parameter</th>
554 </tr>
555 </thead>
556 <tbody valign="top">
557 <tr class="row-even"><td>0</td>
558 <td>source</td>
559 </tr>
560 <tr class="row-odd"><td>1</td>
561 <td>mode</td>
562 </tr>
563 <tr class="row-even"><td>2</td>
564 <td>queue</td>
565 </tr>
566 <tr class="row-odd"><td>3</td>
567 <td>data0_val</td>
568 </tr>
569 <tr class="row-even"><td>4</td>
570 <td>data1_val</td>
571 </tr>
572 </tbody>
573 </table>
574 </div>
575 </div>
576 <div class="section" id="ring-monitor-configuration-response">
577 <span id="pub-rm-public-ra-mon-cfg-response"></span><h3>Ring Monitor Configuration Response<a class="headerlink" href="#ring-monitor-configuration-response" title="Permalink to this headline">¶</a></h3>
578 <p>The <strong>ring_mon_cfg_response</strong> message returns the result status of the
579 processed <strong>ring_mon_cfg</strong> message.</p>
580 <div class="section" id="ring-monitor-configuration-response-message-parameters">
581 <h4>Ring Monitor Configuration Response Message Parameters<a class="headerlink" href="#ring-monitor-configuration-response-message-parameters" title="Permalink to this headline">¶</a></h4>
582 <p><p><strong>struct tisci_msg_rm_ring_mon_cfg_resp</strong></p>
583 <p>Response to configuring a ring monitor.</p>
584 <table border="1" class="docutils">
585 <colgroup>
586 <col width="23%" />
587 <col width="37%" />
588 <col width="40%" />
589 </colgroup>
590 <thead valign="bottom">
591 <tr class="row-odd"><th class="head">Parameter</th>
592 <th class="head">Type</th>
593 <th class="head">Description</th>
594 </tr>
595 </thead>
596 <tbody valign="top">
597 <tr class="row-even"><td>hdr</td>
598 <td>struct tisci_header</td>
599 <td>Standard TISCI header</td>
600 </tr>
601 </tbody>
602 </table>
603 </p>
604 </div>
605 </div>
606 </div>
607 <div class="section" id="ring-reset-procedure">
608 <h2>Ring Reset Procedure<a class="headerlink" href="#ring-reset-procedure" title="Permalink to this headline">¶</a></h2>
609 <p id="pub-rm-public-ra-reset">This section describes the steps the OS needs to take in order to reset a
610 ring.</p>
611 <p>Generic reset procedure for most devices:</p>
612 <ol class="arabic simple">
613 <li>OS sends the <strong>ring cfg</strong> TISCI message modifying either RING_BA_HI,
614 RING_BA_LO, or RING_SIZE non-real-time registers to reset a ring.</li>
615 </ol>
616 <p>Some devices require a different ring reset procedure as defined by
617 ErrataID # i2023. The reset procedure synchronizes the occupancy count between
618 the UDMAP ring state and the RA ring state after the ring is reset. The
619 procedure is:</p>
620 <ol class="arabic simple">
621 <li>Read the ring occupancy (RINGACC_OCC_j [CNT]) as
622 “adjusted ring occupancy count” from the ring’s real-time registers<ul>
623 <li>If the ring is configured in credentials mode or queue manager (QM) mode,
624 adjust “adjusted ring occupancy count” by dividing the ring occupancy by 2.
625 This is required because when in credentials mode or QM mode, each ring
626 write increases the ring occupancy by 2 elements (one entry for the
627 credentials, one entry for the data). However, the UDMAP’s local occupancy
628 counter only records the number of writes, and the ring occupancy,
629 therefore, needs to be divided by 2 to convert back to the number of
630 doorbell rings needed.</li>
631 <li>If the ring occupancy is not 0, then steps 2-5 need to be executed to
632 implement the workaround.</li>
633 </ul>
634 </li>
635 <li>Application directly reads the RINGACC CFG registers to retrieve the ring
636 qmode if not already in ring/doorbell mode. Save the qmode if the original
637 mode was not ring/doorbell mode.</li>
638 <li>Reset the ring by writing any value to the ring’s RINGACC CFG registers
639 (i.e. enable the valid parameter bit for mode, size, or count in the
640 <strong>ring cfg</strong> TISCI message)</li>
641 <li>Send the <strong>ring cfg</strong> message to DMSC specifying qmode as ring/doorbell if
642 not already in that mode.</li>
643 <li>Ring the (doorbell 2**22 – (adjusted ring occupancy count)) through the
644 ring’s real-time registers. This will wrap the internal UDMAP ring state
645 occupancy counter (which is 21-bits wide) to 0. (If possible, ring the
646 doorbell with the maximum count each iteration to minimize the total number
647 of writes.)</li>
648 <li>Send the <strong>ring cfg</strong> message to DMSC to program qmode back to the
649 origin qmode (if not ring/doorbell mode).</li>
650 </ol>
651 </div>
652 </div>
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