packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/4_trace/trace.html

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 104 <li class="toctree-l1"><a class="reference internal" href="../1_intro/index.html">Chapter 1: Introduction</a></li>
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 109 <li class="toctree-l3"><a class="reference internal" href="#trace-layer-overview">Trace Layer Overview</a></li>
 110 <li class="toctree-l3"><a class="reference internal" href="#trace-configuration">Trace Configuration</a><ul>
 111 <li class="toctree-l4"><a class="reference internal" href="#trace-memory-buffer-location">Trace Memory Buffer Location</a></li>
 112 </ul>
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 157     <li>Trace Layer</li>
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 168
 169   <div class="section" id="trace-layer">
 170 <h1>Trace Layer<a class="headerlink" href="#trace-layer" title="Permalink to this headline">¶</a></h1>
 171 <div class="section" id="trace-layer-overview">
 172 <h2>Trace Layer Overview<a class="headerlink" href="#trace-layer-overview" title="Permalink to this headline">¶</a></h2>
 173 <p>The ability to output human readable trace messages is necessary to be
 174 able to properly debug firmware operation. However, due to the potential
 175 for huge amounts of messages due to fast transitions in firewalls,
 176 clocks, etc, a compact trace format that can be easily machine parsed is
 177 required as well. A global ‘trace’ layer is provided so that any
 178 sub-system present in the firmware has the ability to output information
 179 in a common way over a user configured interface.</p>
 180 </div>
 181 <div class="section" id="trace-configuration">
 182 <h2>Trace Configuration<a class="headerlink" href="#trace-configuration" title="Permalink to this headline">¶</a></h2>
 183 <p>All built-in trace options can be selectively enabled during runtime
 184 as described in <a class="reference internal" href="../3_boardcfg/BOARDCFG.html#pub-boardcfg-debug-console"><span class="std std-ref">Design details for System Firmware Debug Console</span></a>. The trace destinations are
 185 configurable as build options but by default are built in and usage of
 186 them is left up to the aforementioned board configuration.</p>
 187 <p>In the interest of allowing debug of early boot within System Firmware the
 188 default state of all <a class="reference internal" href="../3_boardcfg/BOARDCFG.html#pub-boardcfg-debug-console"><span class="std std-ref">Board Config Debug</span></a>
 189 configurable trace sources and destinations is enabled. Once the
 190 <code class="docutils literal"><span class="pre">TISCI_MSG_BOARD_CONFIG</span></code> message is received, the values within
 191 <code class="docutils literal"><span class="pre">boardcfg_dbg_cfg</span></code> immediately take effect and only the configured
 192 trace sources and destinations will be in use until reboot. However,
 193 this means that the earliest boot messages before TISCI_MSG_BOARD_CONFIG
 194 from System Firmware will always be printed.</p>
 195 <div class="admonition warning">
 196 <p class="first admonition-title">Warning</p>
 197 <p class="last">Keeping trace enabled will have considerable impact on performance.
 198 While useful for debug, there are many trace points throughout the code
 199 and waiting for each print to occur, especially if all trace destinations
 200 are enabled, can add considerable to each subsystem init and TISCI message
 201 response. If performance is a system requirement trace should be disabled.</p>
 202 </div>
 203 <p>All trace debug and trace print messages will be routed as strings over
 204 the UART or memory buffer as there is only a single resource for each of
 205 these. ITM has multiple channels available that will be partitioned as
 206 described below:</p>
 207 <table border="1" class="docutils">
 208 <colgroup>
 209 <col width="37%" />
 210 <col width="63%" />
 211 </colgroup>
 212 <thead valign="bottom">
 213 <tr class="row-odd"><th class="head">ITM Channel Number</th>
 214 <th class="head">Usage</th>
 215 </tr>
 216 </thead>
 217 <tbody valign="top">
 218 <tr class="row-even"><td>0</td>
 219 <td>Trace print strings.</td>
 220 </tr>
 221 <tr class="row-odd"><td>1</td>
 222 <td>Baseport Trace debug.</td>
 223 </tr>
 224 <tr class="row-even"><td>2</td>
 225 <td>Security Trace debug.</td>
 226 </tr>
 227 <tr class="row-odd"><td>3</td>
 228 <td>Resource Management Trace debug.</td>
 229 </tr>
 230 <tr class="row-even"><td>4</td>
 231 <td>Power Management Trace debug.</td>
 232 </tr>
 233 </tbody>
 234 </table>
 235 <div class="section" id="trace-memory-buffer-location">
 236 <h3>Trace Memory Buffer Location<a class="headerlink" href="#trace-memory-buffer-location" title="Permalink to this headline">¶</a></h3>
 237 <p>The trace memory buffer is located within the firmware memory. Information
 238 about the location and size can be found below.</p>
 239 <table border="1" class="docutils">
 240 <colgroup>
 241 <col width="28%" />
 242 <col width="45%" />
 243 <col width="28%" />
 244 </colgroup>
 245 <thead valign="bottom">
 246 <tr class="row-odd"><th class="head">SoC</th>
 247 <th class="head">Base Address</th>
 248 <th class="head">Size</th>
 249 </tr>
 250 </thead>
 251 <tbody valign="top">
 252 <tr class="row-even"><td>AM65x</td>
 253 <td>0x44083000</td>
 254 <td>0x1000</td>
 255 </tr>
 256 <tr class="row-odd"><td>J721e</td>
 257 <td>0x44083000</td>
 258 <td>0x1000</td>
 259 </tr>
 260 </tbody>
 261 </table>
 262 </div>
 263 </div>
 264 <div class="section" id="trace-debug-data-format">
 265 <h2>Trace Debug Data Format<a class="headerlink" href="#trace-debug-data-format" title="Permalink to this headline">¶</a></h2>
 266 <p>The Trace Debug API supports the sending of arbitrary u32’s to the
 267 various Trace destinations. By defining a common convention for these
 268 u32’s to represent data they can be used to describe events within the
 269 system. The below format describes the standard meaning of each bit inside
 270 the u32.</p>
 271 <table border="1" class="docutils">
 272 <colgroup>
 273 <col width="24%" />
 274 <col width="11%" />
 275 <col width="65%" />
 276 </colgroup>
 277 <thead valign="bottom">
 278 <tr class="row-odd"><th class="head">Type</th>
 279 <th class="head">Bit Index</th>
 280 <th class="head">Use</th>
 281 </tr>
 282 </thead>
 283 <tbody valign="top">
 284 <tr class="row-even"><td>Domain ID</td>
 285 <td>31 - 29</td>
 286 <td>Identifies which domain this debug code belongs to.</td>
 287 </tr>
 288 <tr class="row-odd"><td>Action ID</td>
 289 <td>28 - 22</td>
 290 <td>Identifies the action this code represents, domain specific.</td>
 291 </tr>
 292 <tr class="row-even"><td>Message Specific Data</td>
 293 <td>21 - 0</td>
 294 <td>Additional data specific to the domain and action ID.</td>
 295 </tr>
 296 </tbody>
 297 </table>
 298 <p>Optionally, a sub-action ID can be specified as part of the standard message
 299 data field in order to provide more granular trace data per subsystem.  The
 300 below format describes the meaning for each bit inside the u32 when the
 301 optional sub-action ID is utilized.</p>
 302 <table border="1" class="docutils">
 303 <colgroup>
 304 <col width="24%" />
 305 <col width="11%" />
 306 <col width="65%" />
 307 </colgroup>
 308 <thead valign="bottom">
 309 <tr class="row-odd"><th class="head">Type</th>
 310 <th class="head">Bit Index</th>
 311 <th class="head">Use</th>
 312 </tr>
 313 </thead>
 314 <tbody valign="top">
 315 <tr class="row-even"><td>Domain ID</td>
 316 <td>31 - 29</td>
 317 <td>Identifies which domain this debug code belongs to.</td>
 318 </tr>
 319 <tr class="row-odd"><td>Action ID</td>
 320 <td>28 - 22</td>
 321 <td>Identifies the action this code represents, domain specific.</td>
 322 </tr>
 323 <tr class="row-even"><td>Sub-Action ID</td>
 324 <td>21 - 16</td>
 325 <td>Identifies the sub-action this code represents, domain
 326 specific.</td>
 327 </tr>
 328 <tr class="row-odd"><td>Message Specific Data</td>
 329 <td>15 - 0</td>
 330 <td>Additional data specific to the domain and action ID.</td>
 331 </tr>
 332 </tbody>
 333 </table>
 334 <div class="section" id="domain-id">
 335 <span id="pub-trace-debug-data-format-domain-id"></span><h3>Domain ID<a class="headerlink" href="#domain-id" title="Permalink to this headline">¶</a></h3>
 336 <table border="1" class="docutils">
 337 <colgroup>
 338 <col width="19%" />
 339 <col width="10%" />
 340 <col width="71%" />
 341 </colgroup>
 342 <thead valign="bottom">
 343 <tr class="row-odd"><th class="head">Domain Name</th>
 344 <th class="head">Value</th>
 345 <th class="head">Use</th>
 346 </tr>
 347 </thead>
 348 <tbody valign="top">
 349 <tr class="row-even"><td>Baseport</td>
 350 <td>0</td>
 351 <td>Debug trace is from Baseport Domain.</td>
 352 </tr>
 353 <tr class="row-odd"><td>Security</td>
 354 <td>1</td>
 355 <td>Debug trace is from Security Domain</td>
 356 </tr>
 357 <tr class="row-even"><td>RM</td>
 358 <td>2</td>
 359 <td>Debug trace is from Resource Management Domain</td>
 360 </tr>
 361 <tr class="row-odd"><td>PM</td>
 362 <td>3</td>
 363 <td>Debug trace is from Power Management Domain.</td>
 364 </tr>
 365 <tr class="row-even"><td>Reserved</td>
 366 <td>4</td>
 367 <td>Reserved for future use.</td>
 368 </tr>
 369 <tr class="row-odd"><td>Reserved</td>
 370 <td>5</td>
 371 <td>Reserved for future use.</td>
 372 </tr>
 373 <tr class="row-even"><td>Reserved</td>
 374 <td>6</td>
 375 <td>Reserved for future use.</td>
 376 </tr>
 377 <tr class="row-odd"><td>Reserved</td>
 378 <td>7</td>
 379 <td>Reserved for future use.</td>
 380 </tr>
 381 </tbody>
 382 </table>
 383 <p>Messages sent using any reserved Domain IDs will be ignored.</p>
 384 </div>
 385 <div class="section" id="action-optional-sub-action-ids">
 386 <span id="pub-trace-debug-data-format-action-id"></span><h3>Action &amp; Optional Sub-Action IDs<a class="headerlink" href="#action-optional-sub-action-ids" title="Permalink to this headline">¶</a></h3>
 387 <p>Below is a listing of the Action IDs and Sub-Action IDs for each domain along
 388 with how the Message Specific Data (MSD) is to be interpreted.</p>
 389 <p>The Sub-Action IDs are optionally used by domain owners to provide more
 390 granular data for each Action ID.  Use of Sub-Action IDs restricts the action
 391 data per trace to 16-bits wide.</p>
 392 <div class="section" id="baseport-action-ids">
 393 <span id="pub-trace-debug-data-format-action-id-baseport"></span><h4>Baseport Action IDs<a class="headerlink" href="#baseport-action-ids" title="Permalink to this headline">¶</a></h4>
 394 <table border="1" class="docutils">
 395 <colgroup>
 396 <col width="17%" />
 397 <col width="5%" />
 398 <col width="19%" />
 399 <col width="18%" />
 400 <col width="42%" />
 401 </colgroup>
 402 <thead valign="bottom">
 403 <tr class="row-odd"><th class="head">Action ID</th>
 404 <th class="head">Value</th>
 405 <th class="head">Use</th>
 406 <th class="head">MSD Use</th>
 407 <th class="head">Notes</th>
 408 </tr>
 409 </thead>
 410 <tbody valign="top">
 411 <tr class="row-even"><td>BP_INIT_COMPLETE</td>
 412 <td>0</td>
 413 <td>OSAL/Baseport init complete</td>
 414 <td>Unused</td>
 415 <td>&#160;</td>
 416 </tr>
 417 <tr class="row-odd"><td>TISCI_MSG_RECEIVED</td>
 418 <td>1</td>
 419 <td>TISCI Message received</td>
 420 <td>(21-16) Queue ID
 421 (15-0) TISCI ID</td>
 422 <td>When TISCI_MSG_RECEIVED is followed by TISCI_MSG_SENDER_HOST_ID
 423 with the same Queue ID, the reported TISCI ID and HOST ID are
 424 guaranteed to have come from the same received TISCI message.
 425 Queue ID is an arbitrary value used for this purpose.</td>
 426 </tr>
 427 <tr class="row-even"><td>TISCI_MSG_SENDER_HOST_ID</td>
 428 <td>2</td>
 429 <td>Host ID of sent Message</td>
 430 <td>(21-16) Queue ID
 431 (15-0) Host ID of request</td>
 432 <td>See note above for TISCI_MSG_RECEIVED.</td>
 433 </tr>
 434 <tr class="row-odd"><td>RESERVED</td>
 435 <td>10</td>
 436 <td>N/A</td>
 437 <td>N/A</td>
 438 <td>&#160;</td>
 439 </tr>
 440 <tr class="row-even"><td>TRACE_DATA_VERSION</td>
 441 <td>16</td>
 442 <td>OSAL/Baseport trace data
 443 version.</td>
 444 <td>(19-12) Version major
 445 (11-0) Version minor</td>
 446 <td>Any System Firmware trace parsing utilities should be able to
 447 comprehend the trace version when decoding trace logs</td>
 448 </tr>
 449 <tr class="row-odd"><td>SYSFW_VERSION</td>
 450 <td>17</td>
 451 <td>System Firmware version</td>
 452 <td>(15-8) Version
 453 (7-4) Subversion
 454 (3-0) Patch</td>
 455 <td>&#160;</td>
 456 </tr>
 457 <tr class="row-even"><td>GENERIC_DEBUG</td>
 458 <td>127</td>
 459 <td>Generic Debug Message</td>
 460 <td>Any use.</td>
 461 <td>&#160;</td>
 462 </tr>
 463 </tbody>
 464 </table>
 465 </div>
 466 <div class="section" id="security-action-ids">
 467 <span id="pub-trace-debug-data-format-action-id-security"></span><h4>Security Action IDs<a class="headerlink" href="#security-action-ids" title="Permalink to this headline">¶</a></h4>
 468 <table border="1" class="docutils">
 469 <colgroup>
 470 <col width="22%" />
 471 <col width="9%" />
 472 <col width="46%" />
 473 <col width="22%" />
 474 </colgroup>
 475 <thead valign="bottom">
 476 <tr class="row-odd"><th class="head">Action ID</th>
 477 <th class="head">Value</th>
 478 <th class="head">Use</th>
 479 <th class="head">MSD Use</th>
 480 </tr>
 481 </thead>
 482 <tbody valign="top">
 483 <tr class="row-even"><td>RESERVED</td>
 484 <td>0x1</td>
 485 <td>RESERVED</td>
 486 <td>NA</td>
 487 </tr>
 488 <tr class="row-odd"><td>Security
 489 Init</td>
 490 <td>0x2</td>
 491 <td>Indicates progress of
 492 post-boardconfig security
 493 initialization</td>
 494 <td>Bit [0] - 0 =&gt;
 495 start, 1 =&gt; end</td>
 496 </tr>
 497 <tr class="row-even"><td>FAIL (modifier)</td>
 498 <td>0x40</td>
 499 <td>Action failed when action bit set</td>
 500 <td>N/A</td>
 501 </tr>
 502 <tr class="row-odd"><td>Generic
 503 Debug</td>
 504 <td>127</td>
 505 <td>Generic Debug message</td>
 506 <td>Any use.</td>
 507 </tr>
 508 </tbody>
 509 </table>
 510 </div>
 511 <div class="section" id="resource-management-action-ids-sub-action-ids">
 512 <span id="pub-trace-debug-data-format-action-id-resource"></span><h4>Resource Management Action IDs &amp; Sub-Action IDs<a class="headerlink" href="#resource-management-action-ids-sub-action-ids" title="Permalink to this headline">¶</a></h4>
 513 <table border="1" class="docutils">
 514 <colgroup>
 515 <col width="22%" />
 516 <col width="5%" />
 517 <col width="17%" />
 518 <col width="22%" />
 519 <col width="5%" />
 520 <col width="28%" />
 521 </colgroup>
 522 <thead valign="bottom">
 523 <tr class="row-odd"><th class="head">Action ID</th>
 524 <th class="head">Value</th>
 525 <th class="head">Use</th>
 526 <th class="head">Sub-Action ID</th>
 527 <th class="head">Value</th>
 528 <th class="head">MSD Use</th>
 529 </tr>
 530 </thead>
 531 <tbody valign="top">
 532 <tr class="row-even"><td>RM_INIT</td>
 533 <td>0</td>
 534 <td>RM init complete</td>
 535 <td>N/A</td>
 536 <td>N/A</td>
 537 <td>N/A</td>
 538 </tr>
 539 <tr class="row-odd"><td>RM_CORE_INIT</td>
 540 <td>1</td>
 541 <td>RM core init
 542 complete</td>
 543 <td>N/A</td>
 544 <td>N/A</td>
 545 <td>N/A</td>
 546 </tr>
 547 <tr class="row-even"><td>RA_INIT</td>
 548 <td>3</td>
 549 <td>RA driver init
 550 complete</td>
 551 <td>N/A</td>
 552 <td>N/A</td>
 553 <td>N/A</td>
 554 </tr>
 555 <tr class="row-odd"><td rowspan="12">RING_CONFIGURE</td>
 556 <td rowspan="12">4</td>
 557 <td rowspan="12">NavSS ring
 558 configuration</td>
 559 <td>DEVICE_ID</td>
 560 <td>0</td>
 561 <td>Ring accelerator Device ID</td>
 562 </tr>
 563 <tr class="row-even"><td>INDEX</td>
 564 <td>1</td>
 565 <td>Ring index</td>
 566 </tr>
 567 <tr class="row-odd"><td>VALID_PARAM_HI</td>
 568 <td>7</td>
 569 <td>Upper 16-bits of valid_params</td>
 570 </tr>
 571 <tr class="row-even"><td>VALID_PARAM_LO</td>
 572 <td>8</td>
 573 <td>Lower 16-bits of valid_params</td>
 574 </tr>
 575 <tr class="row-odd"><td>RING_VIRTID</td>
 576 <td>10</td>
 577 <td>ring Virt ID</td>
 578 </tr>
 579 <tr class="row-even"><td>RING_MODE</td>
 580 <td>11</td>
 581 <td>ring mode</td>
 582 </tr>
 583 <tr class="row-odd"><td>RING_SIZE</td>
 584 <td>12</td>
 585 <td>ring size</td>
 586 </tr>
 587 <tr class="row-even"><td>RING_BA_LO_HI</td>
 588 <td>13</td>
 589 <td>Upper 16-bits of base address lo</td>
 590 </tr>
 591 <tr class="row-odd"><td>RING_BA_LO_LO</td>
 592 <td>14</td>
 593 <td>Lower 16-bits of base address lo</td>
 594 </tr>
 595 <tr class="row-even"><td>RING_COUNT_HI</td>
 596 <td>15</td>
 597 <td>Upper 4-bits of count</td>
 598 </tr>
 599 <tr class="row-odd"><td>RING_COUNT_LO</td>
 600 <td>16</td>
 601 <td>Lower 16-bits of count</td>
 602 </tr>
 603 <tr class="row-even"><td>RING_ORDERID</td>
 604 <td>17</td>
 605 <td>ring Order ID</td>
 606 </tr>
 607 <tr class="row-odd"><td rowspan="3">RING_GET_CFG</td>
 608 <td rowspan="3">5</td>
 609 <td rowspan="3">Get NavSS ring
 610 configuration</td>
 611 <td>DEVICE_ID</td>
 612 <td>0</td>
 613 <td>Ring accelerator Device ID</td>
 614 </tr>
 615 <tr class="row-even"><td>INDEX</td>
 616 <td>1</td>
 617 <td>Ring index</td>
 618 </tr>
 619 <tr class="row-odd"><td>GET_RESET_CFG</td>
 620 <td>2</td>
 621 <td>Configuration retrieval type</td>
 622 </tr>
 623 <tr class="row-even"><td rowspan="2">RING_VALIDATE_INDEX</td>
 624 <td rowspan="2">6</td>
 625 <td rowspan="2">NavSS ring index
 626 validation</td>
 627 <td>INDEX</td>
 628 <td>1</td>
 629 <td>Ring index</td>
 630 </tr>
 631 <tr class="row-odd"><td>SS_DEVICE_ID</td>
 632 <td>5</td>
 633 <td>NavSS subsystem device ID</td>
 634 </tr>
 635 <tr class="row-even"><td rowspan="7">RING_MON_CFG</td>
 636 <td rowspan="7">7</td>
 637 <td rowspan="7">NavSS ring monitor
 638 configuration</td>
 639 <td>DEVICE_ID</td>
 640 <td>0</td>
 641 <td>Ring accelerator Device ID</td>
 642 </tr>
 643 <tr class="row-odd"><td>INDEX</td>
 644 <td>1</td>
 645 <td>Ring monitor index</td>
 646 </tr>
 647 <tr class="row-even"><td>VALID_PARAM_HI</td>
 648 <td>7</td>
 649 <td>Upper 16-bits of valid_params</td>
 650 </tr>
 651 <tr class="row-odd"><td>VALID_PARAM_LO</td>
 652 <td>8</td>
 653 <td>Lower 16-bits of valid_params</td>
 654 </tr>
 655 <tr class="row-even"><td>RING_MONITOR_SOURCE</td>
 656 <td>18</td>
 657 <td>Monitor source</td>
 658 </tr>
 659 <tr class="row-odd"><td>RING_MONITOR_MODE</td>
 660 <td>19</td>
 661 <td>Monitor mode</td>
 662 </tr>
 663 <tr class="row-even"><td>RING_MONITOR_QUEUE</td>
 664 <td>20</td>
 665 <td>Queue, or ring, to monitor</td>
 666 </tr>
 667 <tr class="row-odd"><td rowspan="4">RING_OES_SET</td>
 668 <td rowspan="4">8</td>
 669 <td rowspan="4">Set OES register in
 670 NavSS ring
 671 accelerator</td>
 672 <td>DEVICE_ID</td>
 673 <td>0</td>
 674 <td>Ring accelerator Device ID</td>
 675 </tr>
 676 <tr class="row-even"><td>INDEX</td>
 677 <td>1</td>
 678 <td>Ring index</td>
 679 </tr>
 680 <tr class="row-odd"><td>EVENT</td>
 681 <td>3</td>
 682 <td>Global event</td>
 683 </tr>
 684 <tr class="row-even"><td>OES_REG_INDEX</td>
 685 <td>4</td>
 686 <td>OES register index</td>
 687 </tr>
 688 <tr class="row-odd"><td rowspan="4">RING_OES_GET</td>
 689 <td rowspan="4">9</td>
 690 <td rowspan="4">Get OES register in
 691 NavSS ring
 692 accelerator</td>
 693 <td>DEVICE_ID</td>
 694 <td>0</td>
 695 <td>Ring accelerator Device ID</td>
 696 </tr>
 697 <tr class="row-even"><td>INDEX</td>
 698 <td>1</td>
 699 <td>Ring index</td>
 700 </tr>
 701 <tr class="row-odd"><td>EVENT</td>
 702 <td>3</td>
 703 <td>Global event</td>
 704 </tr>
 705 <tr class="row-even"><td>OES_REG_INDEX</td>
 706 <td>4</td>
 707 <td>OES register index</td>
 708 </tr>
 709 <tr class="row-odd"><td>UDMAP_INIT</td>
 710 <td>12</td>
 711 <td>UDMAP driver init
 712 complete</td>
 713 <td>N/A</td>
 714 <td>N/A</td>
 715 <td>N/A</td>
 716 </tr>
 717 <tr class="row-even"><td rowspan="3">UDMAP_TX_CH_SET_THRD_ID</td>
 718 <td rowspan="3">13</td>
 719 <td rowspan="3">Set NavSS UDMAP
 720 transmit channel
 721 thread ID</td>
 722 <td>INDEX</td>
 723 <td>1</td>
 724 <td>Transmit channel index</td>
 725 </tr>
 726 <tr class="row-odd"><td>SS_DEVICE_ID</td>
 727 <td>5</td>
 728 <td>NavSS subsystem device ID</td>
 729 </tr>
 730 <tr class="row-even"><td>UDMA_CH_THREAD_ID</td>
 731 <td>30</td>
 732 <td>PSI-L thread ID</td>
 733 </tr>
 734 <tr class="row-odd"><td rowspan="20">UDMAP_TX_CH_CFG</td>
 735 <td rowspan="20">14</td>
 736 <td rowspan="20">NavSS UDMAP transmit
 737 channel configuration</td>
 738 <td>DEVICE_ID</td>
 739 <td>0</td>
 740 <td>UDMAP Device ID</td>
 741 </tr>
 742 <tr class="row-even"><td>INDEX</td>
 743 <td>1</td>
 744 <td>transmit channel index</td>
 745 </tr>
 746 <tr class="row-odd"><td>VALID_PARAM_HI</td>
 747 <td>7</td>
 748 <td>Upper 16-bits of valid_params</td>
 749 </tr>
 750 <tr class="row-even"><td>VALID_PARAM_LO</td>
 751 <td>8</td>
 752 <td>Lower 16-bits of valid_params</td>
 753 </tr>
 754 <tr class="row-odd"><td>UDMA_CH_PAUSE_ON_ERR</td>
 755 <td>10</td>
 756 <td>Pause on error</td>
 757 </tr>
 758 <tr class="row-even"><td>UDMA_CH_ATYPE</td>
 759 <td>11</td>
 760 <td>Channel atype</td>
 761 </tr>
 762 <tr class="row-odd"><td>UDMA_CH_TYPE</td>
 763 <td>12</td>
 764 <td>Channel type</td>
 765 </tr>
 766 <tr class="row-even"><td>UDMA_CH_FETCH_SIZE</td>
 767 <td>13</td>
 768 <td>Fetch size</td>
 769 </tr>
 770 <tr class="row-odd"><td>UDMA_CH_CQ_QNUM</td>
 771 <td>14</td>
 772 <td>Completion queue number</td>
 773 </tr>
 774 <tr class="row-even"><td>UDMA_CH_PRIORITY</td>
 775 <td>15</td>
 776 <td>Priority</td>
 777 </tr>
 778 <tr class="row-odd"><td>UDMA_CH_QOS</td>
 779 <td>16</td>
 780 <td>QoS</td>
 781 </tr>
 782 <tr class="row-even"><td>UDMA_CH_ORDERID</td>
 783 <td>17</td>
 784 <td>Order ID</td>
 785 </tr>
 786 <tr class="row-odd"><td>UDMA_CH_SCHED_PRIORITY</td>
 787 <td>18</td>
 788 <td>Scheduling priority</td>
 789 </tr>
 790 <tr class="row-even"><td>UDMA_CH_BURST_SIZE</td>
 791 <td>31</td>
 792 <td>Burst size</td>
 793 </tr>
 794 <tr class="row-odd"><td>UDMA_TX_CH_FILT_EINFO</td>
 795 <td>32</td>
 796 <td>Filter extended info</td>
 797 </tr>
 798 <tr class="row-even"><td>UDMA_TX_CH_FILT_PSWORDS</td>
 799 <td>33</td>
 800 <td>Filter PS words</td>
 801 </tr>
 802 <tr class="row-odd"><td>UDMA_TX_CH_SUPR_TDPKT</td>
 803 <td>34</td>
 804 <td>Teardown packet suppression</td>
 805 </tr>
 806 <tr class="row-even"><td>UDMA_TX_CH_CREDIT_COUNT</td>
 807 <td>35</td>
 808 <td>Channel credit count</td>
 809 </tr>
 810 <tr class="row-odd"><td>UDMA_TX_CH_FDEPTH</td>
 811 <td>36</td>
 812 <td>Channel fdepth</td>
 813 </tr>
 814 <tr class="row-even"><td>UDMA_TX_CH_TDTYPE</td>
 815 <td>37</td>
 816 <td>Channel teardown type</td>
 817 </tr>
 818 <tr class="row-odd"><td rowspan="3">UDMAP_TX_CH_GET_CFG</td>
 819 <td rowspan="3">15</td>
 820 <td rowspan="3">Get NavSS UDMAP
 821 transmit channel
 822 configuration</td>
 823 <td>DEVICE_ID</td>
 824 <td>0</td>
 825 <td>UDMAP Device ID</td>
 826 </tr>
 827 <tr class="row-even"><td>INDEX</td>
 828 <td>1</td>
 829 <td>UDMAP transmit channel index</td>
 830 </tr>
 831 <tr class="row-odd"><td>GET_RESET_CFG</td>
 832 <td>2</td>
 833 <td>Configuration retrieval type</td>
 834 </tr>
 835 <tr class="row-even"><td rowspan="3">UDMAP_GCFG_CFG</td>
 836 <td rowspan="3">16</td>
 837 <td rowspan="3">NavSS UDMAP GCFG
 838 region configuration</td>
 839 <td>DEVICE_ID</td>
 840 <td>0</td>
 841 <td>UDMAP Device ID</td>
 842 </tr>
 843 <tr class="row-odd"><td>VALID_PARAM_HI</td>
 844 <td>7</td>
 845 <td>Upper 16-bits of valid_params</td>
 846 </tr>
 847 <tr class="row-even"><td>VALID_PARAM_LO</td>
 848 <td>8</td>
 849 <td>Lower 16-bits of valid_params</td>
 850 </tr>
 851 <tr class="row-odd"><td rowspan="3">UDMAP_RX_CH_SET_THRD_ID</td>
 852 <td rowspan="3">20</td>
 853 <td rowspan="3">Set NavSS UDMAP
 854 receive channel
 855 thread ID</td>
 856 <td>INDEX</td>
 857 <td>1</td>
 858 <td>Receive channel index</td>
 859 </tr>
 860 <tr class="row-even"><td>SS_DEVICE_ID</td>
 861 <td>5</td>
 862 <td>NavSS subsystem device ID</td>
 863 </tr>
 864 <tr class="row-odd"><td>UDMA_CH_THREAD_ID</td>
 865 <td>30</td>
 866 <td>PSI-L thread ID</td>
 867 </tr>
 868 <tr class="row-even"><td rowspan="18">UDMAP_RX_CH_CFG</td>
 869 <td rowspan="18">21</td>
 870 <td rowspan="18">NavSS UDMAP receive
 871 channel configuration</td>
 872 <td>DEVICE_ID</td>
 873 <td>0</td>
 874 <td>UDMAP Device ID</td>
 875 </tr>
 876 <tr class="row-odd"><td>INDEX</td>
 877 <td>1</td>
 878 <td>receive channel index</td>
 879 </tr>
 880 <tr class="row-even"><td>VALID_PARAM_HI</td>
 881 <td>7</td>
 882 <td>Upper 16-bits of valid_params</td>
 883 </tr>
 884 <tr class="row-odd"><td>VALID_PARAM_LO</td>
 885 <td>8</td>
 886 <td>Lower 16-bits of valid_params</td>
 887 </tr>
 888 <tr class="row-even"><td>UDMA_CH_PAUSE_ON_ERR</td>
 889 <td>10</td>
 890 <td>Pause on error</td>
 891 </tr>
 892 <tr class="row-odd"><td>UDMA_CH_ATYPE</td>
 893 <td>11</td>
 894 <td>Channel atype</td>
 895 </tr>
 896 <tr class="row-even"><td>UDMA_CH_TYPE</td>
 897 <td>12</td>
 898 <td>Channel type</td>
 899 </tr>
 900 <tr class="row-odd"><td>UDMA_CH_FETCH_SIZE</td>
 901 <td>13</td>
 902 <td>Fetch size</td>
 903 </tr>
 904 <tr class="row-even"><td>UDMA_CH_CQ_QNUM</td>
 905 <td>14</td>
 906 <td>Completion queue number</td>
 907 </tr>
 908 <tr class="row-odd"><td>UDMA_CH_PRIORITY</td>
 909 <td>15</td>
 910 <td>Priority</td>
 911 </tr>
 912 <tr class="row-even"><td>UDMA_CH_QOS</td>
 913 <td>16</td>
 914 <td>QoS</td>
 915 </tr>
 916 <tr class="row-odd"><td>UDMA_CH_ORDERID</td>
 917 <td>17</td>
 918 <td>Order ID</td>
 919 </tr>
 920 <tr class="row-even"><td>UDMA_CH_SCHED_PRIORITY</td>
 921 <td>18</td>
 922 <td>Scheduling priority</td>
 923 </tr>
 924 <tr class="row-odd"><td>UDMA_CH_BURST_SIZE</td>
 925 <td>31</td>
 926 <td>Burst size</td>
 927 </tr>
 928 <tr class="row-even"><td>UDMA_RX_CH_FLOW_ID_START</td>
 929 <td>32</td>
 930 <td>Flow ID start</td>
 931 </tr>
 932 <tr class="row-odd"><td>UDMA_RX_CH_FLOW_ID_COUNT</td>
 933 <td>33</td>
 934 <td>Flow ID count</td>
 935 </tr>
 936 <tr class="row-even"><td>UDMA_RX_CH_IGNORE_SHORT</td>
 937 <td>34</td>
 938 <td>Ignore long</td>
 939 </tr>
 940 <tr class="row-odd"><td>UDMA_RX_CH_IGNORE_LONG</td>
 941 <td>35</td>
 942 <td>Ignore short</td>
 943 </tr>
 944 <tr class="row-even"><td rowspan="3">UDMAP_RX_CH_GET_CFG</td>
 945 <td rowspan="3">22</td>
 946 <td rowspan="3">Get NavSS UDMAP
 947 receive channel
 948 configuration</td>
 949 <td>DEVICE_ID</td>
 950 <td>0</td>
 951 <td>UDMAP Device ID</td>
 952 </tr>
 953 <tr class="row-odd"><td>INDEX</td>
 954 <td>1</td>
 955 <td>UDMAP receive channel index</td>
 956 </tr>
 957 <tr class="row-even"><td>GET_RESET_CFG</td>
 958 <td>2</td>
 959 <td>Configuration retrieval type</td>
 960 </tr>
 961 <tr class="row-odd"><td rowspan="2">UDMAP_GCFG_GET_CFG</td>
 962 <td rowspan="2">23</td>
 963 <td rowspan="2">Get NavSS UDMAP
 964 GCFG region
 965 configuration</td>
 966 <td>DEVICE_ID</td>
 967 <td>0</td>
 968 <td>UDMAP Device ID</td>
 969 </tr>
 970 <tr class="row-even"><td>GET_RESET_CFG</td>
 971 <td>2</td>
 972 <td>Configuration retrieval type</td>
 973 </tr>
 974 <tr class="row-odd"><td>PROXY_INIT</td>
 975 <td>24</td>
 976 <td>Proxy driver init
 977 complete</td>
 978 <td>N/A</td>
 979 <td>N/A</td>
 980 <td>N/A</td>
 981 </tr>
 982 <tr class="row-even"><td rowspan="4">PROXY_CFG</td>
 983 <td rowspan="4">25</td>
 984 <td rowspan="4">NavSS proxy
 985 configuration</td>
 986 <td>DEVICE_ID</td>
 987 <td>0</td>
 988 <td>Proxy Device ID</td>
 989 </tr>
 990 <tr class="row-odd"><td>INDEX</td>
 991 <td>1</td>
 992 <td>Proxy index</td>
 993 </tr>
 994 <tr class="row-even"><td>VALID_PARAM_HI</td>
 995 <td>7</td>
 996 <td>Upper 16-bits of valid_params</td>
 997 </tr>
 998 <tr class="row-odd"><td>VALID_PARAM_LO</td>
 999 <td>8</td>
1000 <td>Lower 16-bits of valid_params</td>
1001 </tr>
1002 <tr class="row-even"><td rowspan="4">PROXY_OES_SET</td>
1003 <td rowspan="4">26</td>
1004 <td rowspan="4">Set OES register in
1005 NavSS Proxy</td>
1006 <td>DEVICE_ID</td>
1007 <td>0</td>
1008 <td>Proxy Device ID</td>
1009 </tr>
1010 <tr class="row-odd"><td>INDEX</td>
1011 <td>1</td>
1012 <td>Proxy index</td>
1013 </tr>
1014 <tr class="row-even"><td>EVENT</td>
1015 <td>3</td>
1016 <td>Global event</td>
1017 </tr>
1018 <tr class="row-odd"><td>OES_REG_INDEX</td>
1019 <td>4</td>
1020 <td>OES register index</td>
1021 </tr>
1022 <tr class="row-even"><td rowspan="4">PROXY_OES_GET</td>
1023 <td rowspan="4">27</td>
1024 <td rowspan="4">Get OES register in
1025 NavSS Proxy</td>
1026 <td>DEVICE_ID</td>
1027 <td>0</td>
1028 <td>Proxy Device ID</td>
1029 </tr>
1030 <tr class="row-odd"><td>INDEX</td>
1031 <td>1</td>
1032 <td>Proxy index</td>
1033 </tr>
1034 <tr class="row-even"><td>EVENT</td>
1035 <td>3</td>
1036 <td>Global event</td>
1037 </tr>
1038 <tr class="row-odd"><td>OES_REG_INDEX</td>
1039 <td>4</td>
1040 <td>OES register index</td>
1041 </tr>
1042 <tr class="row-even"><td rowspan="17">UDMAP_FLOW_CFG</td>
1043 <td rowspan="17">29</td>
1044 <td rowspan="17">NavSS UDMAP receive
1045 flow configuration</td>
1046 <td>DEVICE_ID</td>
1047 <td>0</td>
1048 <td>UDMAP Device ID</td>
1049 </tr>
1050 <tr class="row-odd"><td>INDEX</td>
1051 <td>1</td>
1052 <td>receive flow index</td>
1053 </tr>
1054 <tr class="row-even"><td>VALID_PARAM_HI</td>
1055 <td>7</td>
1056 <td>Upper 16-bits of valid_params</td>
1057 </tr>
1058 <tr class="row-odd"><td>VALID_PARAM_LO</td>
1059 <td>8</td>
1060 <td>Lower 16-bits of valid_params</td>
1061 </tr>
1062 <tr class="row-even"><td>UDMA_FLOW_RX_EINFO_PRESENT</td>
1063 <td>10</td>
1064 <td>extended info present</td>
1065 </tr>
1066 <tr class="row-odd"><td>UDMA_FLOW_RX_PSINFO_PRESENT</td>
1067 <td>11</td>
1068 <td>psinfo present</td>
1069 </tr>
1070 <tr class="row-even"><td>UDMA_FLOW_RX_ERROR_HANDLING</td>
1071 <td>12</td>
1072 <td>error handling</td>
1073 </tr>
1074 <tr class="row-odd"><td>UDMA_FLOW_DESC_TYPE</td>
1075 <td>13</td>
1076 <td>descriptor type</td>
1077 </tr>
1078 <tr class="row-even"><td>UDMA_FLOW_RX_SOP_OFFSET</td>
1079 <td>14</td>
1080 <td>SOP offset</td>
1081 </tr>
1082 <tr class="row-odd"><td>UDMA_FLOW_RX_PS_LOCATION</td>
1083 <td>15</td>
1084 <td>PS location</td>
1085 </tr>
1086 <tr class="row-even"><td>UDMA_FLOW_SRC_TAG_SEL</td>
1087 <td>16</td>
1088 <td>Source tag selector</td>
1089 </tr>
1090 <tr class="row-odd"><td>UDMA_FLOW_DEST_TAG_SEL</td>
1091 <td>17</td>
1092 <td>Destination tag selector</td>
1093 </tr>
1094 <tr class="row-even"><td>UDMA_FLOW_RX_DEST_QNUM</td>
1095 <td>18</td>
1096 <td>Destination queue number</td>
1097 </tr>
1098 <tr class="row-odd"><td>UDMA_FLOW_RX_FDQ0_SZ0_QNUM</td>
1099 <td>19</td>
1100 <td>FDQ0 SZ0 queue number</td>
1101 </tr>
1102 <tr class="row-even"><td>UDMA_FLOW_RX_FDQ1_QNUM</td>
1103 <td>20</td>
1104 <td>FDQ1 queue number</td>
1105 </tr>
1106 <tr class="row-odd"><td>UDMA_FLOW_RX_FDQ2_QNUM</td>
1107 <td>21</td>
1108 <td>FDQ2 queue number</td>
1109 </tr>
1110 <tr class="row-even"><td>UDMA_FLOW_RX_FDQ3_QNUM</td>
1111 <td>22</td>
1112 <td>FDQ3 queue number</td>
1113 </tr>
1114 <tr class="row-odd"><td rowspan="8">UDMAP_FLOW_SZ_CFG</td>
1115 <td rowspan="8">30</td>
1116 <td rowspan="8">NavSS UDMAP receive
1117 flow size threshold
1118 configuration</td>
1119 <td>DEVICE_ID</td>
1120 <td>0</td>
1121 <td>UDMAP Device ID</td>
1122 </tr>
1123 <tr class="row-even"><td>INDEX</td>
1124 <td>1</td>
1125 <td>receive flow index</td>
1126 </tr>
1127 <tr class="row-odd"><td>VALID_PARAM_HI</td>
1128 <td>7</td>
1129 <td>Upper 16-bits of valid_params</td>
1130 </tr>
1131 <tr class="row-even"><td>VALID_PARAM_LO</td>
1132 <td>8</td>
1133 <td>Lower 16-bits of valid_params</td>
1134 </tr>
1135 <tr class="row-odd"><td>UDMA_FLOW_RX_FDQ0_SZ1_QNUM</td>
1136 <td>23</td>
1137 <td>FDQ0 SZ1 queue number</td>
1138 </tr>
1139 <tr class="row-even"><td>UDMA_FLOW_RX_FDQ0_SZ2_QNUM</td>
1140 <td>24</td>
1141 <td>FDQ0 SZ2 queue number</td>
1142 </tr>
1143 <tr class="row-odd"><td>UDMA_FLOW_RX_FDQ0_SZ3_QNUM</td>
1144 <td>25</td>
1145 <td>FDQ0 SZ3 queue number</td>
1146 </tr>
1147 <tr class="row-even"><td>UDMA_FLOW_RX_SIZE_THRESH_EN</td>
1148 <td>26</td>
1149 <td>size threshold routing enable</td>
1150 </tr>
1151 <tr class="row-odd"><td rowspan="4">UDMAP_OES_SET</td>
1152 <td rowspan="4">31</td>
1153 <td rowspan="4">Set OES register in
1154 NavSS UDMAP</td>
1155 <td>DEVICE_ID</td>
1156 <td>0</td>
1157 <td>UDMAP Device ID</td>
1158 </tr>
1159 <tr class="row-even"><td>INDEX</td>
1160 <td>1</td>
1161 <td>Channel index</td>
1162 </tr>
1163 <tr class="row-odd"><td>EVENT</td>
1164 <td>3</td>
1165 <td>Global event</td>
1166 </tr>
1167 <tr class="row-even"><td>OES_REG_INDEX</td>
1168 <td>4</td>
1169 <td>OES register index</td>
1170 </tr>
1171 <tr class="row-odd"><td rowspan="4">UDMAP_OES_GET</td>
1172 <td rowspan="4">32</td>
1173 <td rowspan="4">Get OES register in
1174 NavSS UDMAP</td>
1175 <td>DEVICE_ID</td>
1176 <td>0</td>
1177 <td>UDMAP Device ID</td>
1178 </tr>
1179 <tr class="row-even"><td>INDEX</td>
1180 <td>1</td>
1181 <td>Channel index</td>
1182 </tr>
1183 <tr class="row-odd"><td>EVENT</td>
1184 <td>3</td>
1185 <td>Global event</td>
1186 </tr>
1187 <tr class="row-even"><td>OES_REG_INDEX</td>
1188 <td>4</td>
1189 <td>OES register index</td>
1190 </tr>
1191 <tr class="row-odd"><td rowspan="3">UDMAP_FLOW_GET_CFG</td>
1192 <td rowspan="3">33</td>
1193 <td rowspan="3">Get NavSS UDMAP
1194 receive flow
1195 configuration</td>
1196 <td>DEVICE_ID</td>
1197 <td>0</td>
1198 <td>UDMAP Device ID</td>
1199 </tr>
1200 <tr class="row-even"><td>INDEX</td>
1201 <td>1</td>
1202 <td>UDMAP receive flow index</td>
1203 </tr>
1204 <tr class="row-odd"><td>GET_RESET_CFG</td>
1205 <td>2</td>
1206 <td>Configuration retrieval type</td>
1207 </tr>
1208 <tr class="row-even"><td rowspan="3">UDMAP_FLOW_SZ_GET_CFG</td>
1209 <td rowspan="3">34</td>
1210 <td rowspan="3">Get NavSS UDMAP
1211 receive flow size
1212 threshold
1213 configuration</td>
1214 <td>DEVICE_ID</td>
1215 <td>0</td>
1216 <td>UDMAP Device ID</td>
1217 </tr>
1218 <tr class="row-odd"><td>INDEX</td>
1219 <td>1</td>
1220 <td>UDMAP receive flow index</td>
1221 </tr>
1222 <tr class="row-even"><td>GET_RESET_CFG</td>
1223 <td>2</td>
1224 <td>Configuration retrieval type</td>
1225 </tr>
1226 <tr class="row-odd"><td>PSIL_INIT</td>
1227 <td>35</td>
1228 <td>PSI-L driver init
1229 complete</td>
1230 <td>N/A</td>
1231 <td>N/A</td>
1232 <td>N/A</td>
1233 </tr>
1234 <tr class="row-even"><td rowspan="4">PSIL_PAIR</td>
1235 <td rowspan="4">36</td>
1236 <td rowspan="4">Pair NavSS PSI-L
1237 threads</td>
1238 <td>DEVICE_ID</td>
1239 <td>0</td>
1240 <td>PSI-L proxy device ID</td>
1241 </tr>
1242 <tr class="row-odd"><td>PSIL_SRC_THREAD</td>
1243 <td>10</td>
1244 <td>PSI-L source thread</td>
1245 </tr>
1246 <tr class="row-even"><td>PSIL_DST_THREAD</td>
1247 <td>11</td>
1248 <td>PSI-L destination thread</td>
1249 </tr>
1250 <tr class="row-odd"><td>PSIL_THREAD_ENABLED</td>
1251 <td>12</td>
1252 <td>PSI-L thread enabled prior to
1253 pairing</td>
1254 </tr>
1255 <tr class="row-even"><td rowspan="5">PSIL_READ</td>
1256 <td rowspan="5">38</td>
1257 <td rowspan="5">Read NavSS PSI-L
1258 thread configuration
1259 register</td>
1260 <td>DEVICE_ID</td>
1261 <td>0</td>
1262 <td>PSI-L proxy device ID</td>
1263 </tr>
1264 <tr class="row-odd"><td>PSIL_THREAD</td>
1265 <td>15</td>
1266 <td>PSI-L thread</td>
1267 </tr>
1268 <tr class="row-even"><td>PSIL_THREAD_CFG_REG_ADDR</td>
1269 <td>16</td>
1270 <td>Thread configuration register addr</td>
1271 </tr>
1272 <tr class="row-odd"><td>PSIL_THREAD_CFG_REG_VAL_HI</td>
1273 <td>17</td>
1274 <td>Upper 16-bits of register value</td>
1275 </tr>
1276 <tr class="row-even"><td>PSIL_THREAD_CFG_REG_VAL_LO</td>
1277 <td>18</td>
1278 <td>Lower 16-bits of register value</td>
1279 </tr>
1280 <tr class="row-odd"><td rowspan="5">PSIL_WRITE</td>
1281 <td rowspan="5">39</td>
1282 <td rowspan="5">Write NavSS PSI-L
1283 thread configuration
1284 register</td>
1285 <td>DEVICE_ID</td>
1286 <td>0</td>
1287 <td>PSI-L proxy device ID</td>
1288 </tr>
1289 <tr class="row-even"><td>PSIL_THREAD</td>
1290 <td>15</td>
1291 <td>PSI-L thread</td>
1292 </tr>
1293 <tr class="row-odd"><td>PSIL_THREAD_CFG_REG_ADDR</td>
1294 <td>16</td>
1295 <td>Thread configuration register addr</td>
1296 </tr>
1297 <tr class="row-even"><td>PSIL_THREAD_CFG_REG_VAL_HI</td>
1298 <td>17</td>
1299 <td>Upper 16-bits of written value</td>
1300 </tr>
1301 <tr class="row-odd"><td>PSIL_THREAD_CFG_REG_VAL_LO</td>
1302 <td>18</td>
1303 <td>Lower 16-bits of written value</td>
1304 </tr>
1305 <tr class="row-even"><td rowspan="5">PSIL_UNPAIR</td>
1306 <td rowspan="5">40</td>
1307 <td rowspan="5">Unpair NavSS PSI-L
1308 threads</td>
1309 <td>DEVICE_ID</td>
1310 <td>0</td>
1311 <td>PSI-L proxy device ID</td>
1312 </tr>
1313 <tr class="row-odd"><td>PSIL_SRC_THREAD</td>
1314 <td>10</td>
1315 <td>PSI-L source thread</td>
1316 </tr>
1317 <tr class="row-even"><td>PSIL_DST_THREAD</td>
1318 <td>11</td>
1319 <td>PSI-L destination thread</td>
1320 </tr>
1321 <tr class="row-odd"><td>PSIL_THREAD_DISABLED</td>
1322 <td>13</td>
1323 <td>PSI-L thread disabled prior to
1324 unpairing</td>
1325 </tr>
1326 <tr class="row-even"><td>PSIL_SRC_THREAD_PEER</td>
1327 <td>14</td>
1328 <td>Source thread peer register thread
1329 value</td>
1330 </tr>
1331 <tr class="row-odd"><td>IRQ_INIT</td>
1332 <td>43</td>
1333 <td>IRQ driver init
1334 complete</td>
1335 <td>N/A</td>
1336 <td>N/A</td>
1337 <td>N/A</td>
1338 </tr>
1339 <tr class="row-even"><td rowspan="11">IRQ_SET</td>
1340 <td rowspan="11">44</td>
1341 <td rowspan="11">Program interrupt
1342 route</td>
1343 <td>VALID_PARAM_HI</td>
1344 <td>7</td>
1345 <td>Upper 16-bits of valid_params</td>
1346 </tr>
1347 <tr class="row-odd"><td>VALID_PARAM_LO</td>
1348 <td>8</td>
1349 <td>Lower 16-bits of valid_params</td>
1350 </tr>
1351 <tr class="row-even"><td>IRQ_IA_ID</td>
1352 <td>10</td>
1353 <td>IA device ID</td>
1354 </tr>
1355 <tr class="row-odd"><td>IRQ_GLOBAL_EVENT</td>
1356 <td>11</td>
1357 <td>Global event</td>
1358 </tr>
1359 <tr class="row-even"><td>IRQ_DST_HOST_IRQ</td>
1360 <td>12</td>
1361 <td>Destination host IRQ input index</td>
1362 </tr>
1363 <tr class="row-odd"><td>IRQ_SECONDARY_HOST</td>
1364 <td>13</td>
1365 <td>Secondary host ID</td>
1366 </tr>
1367 <tr class="row-even"><td>IRQ_SRC_ID</td>
1368 <td>14</td>
1369 <td>Interrupt source device ID</td>
1370 </tr>
1371 <tr class="row-odd"><td>IRQ_SRC_INDEX</td>
1372 <td>15</td>
1373 <td>Interrupt source index</td>
1374 </tr>
1375 <tr class="row-even"><td>IRQ_DST_ID</td>
1376 <td>16</td>
1377 <td>Interrupt destination device ID</td>
1378 </tr>
1379 <tr class="row-odd"><td>IRQ_VINT</td>
1380 <td>17</td>
1381 <td>Virtual interrupt</td>
1382 </tr>
1383 <tr class="row-even"><td>IRQ_VINT_STATUS_BIT_INDEX</td>
1384 <td>18</td>
1385 <td>Virtual interrupt status bit</td>
1386 </tr>
1387 <tr class="row-odd"><td rowspan="11">IRQ_RELEASE</td>
1388 <td rowspan="11">45</td>
1389 <td rowspan="11">Clear interrupt
1390 route</td>
1391 <td>VALID_PARAM_HI</td>
1392 <td>7</td>
1393 <td>Upper 16-bits of valid_params</td>
1394 </tr>
1395 <tr class="row-even"><td>VALID_PARAM_LO</td>
1396 <td>8</td>
1397 <td>Lower 16-bits of valid_params</td>
1398 </tr>
1399 <tr class="row-odd"><td>IRQ_IA_ID</td>
1400 <td>10</td>
1401 <td>IA device ID</td>
1402 </tr>
1403 <tr class="row-even"><td>IRQ_GLOBAL_EVENT</td>
1404 <td>11</td>
1405 <td>Global event</td>
1406 </tr>
1407 <tr class="row-odd"><td>IRQ_DST_HOST_IRQ</td>
1408 <td>12</td>
1409 <td>Destination host IRQ input index</td>
1410 </tr>
1411 <tr class="row-even"><td>IRQ_SECONDARY_HOST</td>
1412 <td>13</td>
1413 <td>Secondary host ID</td>
1414 </tr>
1415 <tr class="row-odd"><td>IRQ_SRC_ID</td>
1416 <td>14</td>
1417 <td>Interrupt source device ID</td>
1418 </tr>
1419 <tr class="row-even"><td>IRQ_SRC_INDEX</td>
1420 <td>15</td>
1421 <td>Interrupt source index</td>
1422 </tr>
1423 <tr class="row-odd"><td>IRQ_DST_ID</td>
1424 <td>16</td>
1425 <td>Interrupt destination device ID</td>
1426 </tr>
1427 <tr class="row-even"><td>IRQ_VINT</td>
1428 <td>17</td>
1429 <td>Virtual interrupt</td>
1430 </tr>
1431 <tr class="row-odd"><td>IRQ_VINT_STATUS_BIT_INDEX</td>
1432 <td>18</td>
1433 <td>Virtual interrupt status bit</td>
1434 </tr>
1435 <tr class="row-even"><td rowspan="3">IRQ_IA_OES_SET</td>
1436 <td rowspan="3">46</td>
1437 <td rowspan="3">Set OES register in
1438 Interrupt Aggregator</td>
1439 <td>DEVICE_ID</td>
1440 <td>0</td>
1441 <td>IA Device ID</td>
1442 </tr>
1443 <tr class="row-odd"><td>EVENT</td>
1444 <td>3</td>
1445 <td>Global event</td>
1446 </tr>
1447 <tr class="row-even"><td>OES_REG_INDEX</td>
1448 <td>4</td>
1449 <td>OES register index</td>
1450 </tr>
1451 <tr class="row-odd"><td rowspan="3">IRQ_IA_OES_GET</td>
1452 <td rowspan="3">47</td>
1453 <td rowspan="3">Get OES register in
1454 Interrupt Aggregator</td>
1455 <td>DEVICE_ID</td>
1456 <td>0</td>
1457 <td>UDMAP Device ID</td>
1458 </tr>
1459 <tr class="row-even"><td>EVENT</td>
1460 <td>3</td>
1461 <td>Global event</td>
1462 </tr>
1463 <tr class="row-odd"><td>OES_REG_INDEX</td>
1464 <td>4</td>
1465 <td>OES register index</td>
1466 </tr>
1467 <tr class="row-even"><td>IRQ_IA_INIT</td>
1468 <td>48</td>
1469 <td>IA driver init
1470 complete</td>
1471 <td>N/A</td>
1472 <td>N/A</td>
1473 <td>N/A</td>
1474 </tr>
1475 <tr class="row-odd"><td rowspan="4">IRQ_IA_MAP_VINT</td>
1476 <td rowspan="4">49</td>
1477 <td rowspan="4">Map an event to an IA
1478 virtual interrupt</td>
1479 <td>DEVICE_ID</td>
1480 <td>0</td>
1481 <td>IA device ID</td>
1482 </tr>
1483 <tr class="row-even"><td>IA_VINT</td>
1484 <td>10</td>
1485 <td>Virtual interrupt</td>
1486 </tr>
1487 <tr class="row-odd"><td>IA_GLOBAL_EVENT</td>
1488 <td>11</td>
1489 <td>Global event</td>
1490 </tr>
1491 <tr class="row-even"><td>IA_VINT_STATUS_BIT</td>
1492 <td>12</td>
1493 <td>Virtual interrupt status bit</td>
1494 </tr>
1495 <tr class="row-odd"><td rowspan="4">IRQ_IA_UNMAP_VINT</td>
1496 <td rowspan="4">50</td>
1497 <td rowspan="4">Unmap an event from
1498 an IA virtual
1499 interrupt</td>
1500 <td>DEVICE_ID</td>
1501 <td>0</td>
1502 <td>IA device ID</td>
1503 </tr>
1504 <tr class="row-even"><td>IA_VINT</td>
1505 <td>10</td>
1506 <td>Virtual interrupt</td>
1507 </tr>
1508 <tr class="row-odd"><td>IA_GLOBAL_EVENT</td>
1509 <td>11</td>
1510 <td>Global event</td>
1511 </tr>
1512 <tr class="row-even"><td>IA_VINT_STATUS_BIT</td>
1513 <td>12</td>
1514 <td>Virtual interrupt status bit</td>
1515 </tr>
1516 <tr class="row-odd"><td>IRQ_IR_INIT</td>
1517 <td>52</td>
1518 <td>IR driver init
1519 complete</td>
1520 <td>N/A</td>
1521 <td>N/A</td>
1522 <td>N/A</td>
1523 </tr>
1524 <tr class="row-even"><td rowspan="3">IRQ_IR_CFG</td>
1525 <td rowspan="3">53</td>
1526 <td rowspan="3">Configured IR input
1527 to output mapping</td>
1528 <td>DEVICE_ID</td>
1529 <td>0</td>
1530 <td>IR device ID</td>
1531 </tr>
1532 <tr class="row-odd"><td>IR_INPUT</td>
1533 <td>10</td>
1534 <td>IR input index</td>
1535 </tr>
1536 <tr class="row-even"><td>IR_OUTPUT</td>
1537 <td>11</td>
1538 <td>IR output index</td>
1539 </tr>
1540 <tr class="row-odd"><td rowspan="3">IRQ_IR_CLR</td>
1541 <td rowspan="3">54</td>
1542 <td rowspan="3">Cleared IR input
1543 to output mapping</td>
1544 <td>DEVICE_ID</td>
1545 <td>0</td>
1546 <td>IR device ID</td>
1547 </tr>
1548 <tr class="row-even"><td>IR_INPUT</td>
1549 <td>10</td>
1550 <td>IR input index</td>
1551 </tr>
1552 <tr class="row-odd"><td>IR_OUTPUT</td>
1553 <td>11</td>
1554 <td>IR output index</td>
1555 </tr>
1556 <tr class="row-even"><td rowspan="4">RESASG_FIREWALL_CFG</td>
1557 <td rowspan="4">59</td>
1558 <td rowspan="4">RM resource
1559 assignment firewall
1560 configuration</td>
1561 <td>INDEX</td>
1562 <td>1</td>
1563 <td>Resource index</td>
1564 </tr>
1565 <tr class="row-odd"><td>RESASG_UTYPE</td>
1566 <td>6</td>
1567 <td>Resource assignment unique type</td>
1568 </tr>
1569 <tr class="row-even"><td>RESASG_FWL_ID</td>
1570 <td>13</td>
1571 <td>Channelized firewall ID</td>
1572 </tr>
1573 <tr class="row-odd"><td>RESASG_FWL_CH</td>
1574 <td>14</td>
1575 <td>Channelized firewall channel</td>
1576 </tr>
1577 <tr class="row-even"><td rowspan="3">RESASG_VALIDATE_RESOURCE</td>
1578 <td rowspan="3">60</td>
1579 <td rowspan="3">RM validate
1580 resource against
1581 board configuration</td>
1582 <td>INDEX</td>
1583 <td>1</td>
1584 <td>Resource index</td>
1585 </tr>
1586 <tr class="row-odd"><td>RESASG_UTYPE</td>
1587 <td>6</td>
1588 <td>Resource assignment unique type</td>
1589 </tr>
1590 <tr class="row-even"><td>RESASG_VALIDATE_HOST</td>
1591 <td>10</td>
1592 <td>host ID</td>
1593 </tr>
1594 <tr class="row-odd"><td rowspan="6">RESOURCE_GET</td>
1595 <td rowspan="6">61</td>
1596 <td rowspan="6">Retrieve a resource
1597 range for a host</td>
1598 <td>RESASG_UTYPE</td>
1599 <td>6</td>
1600 <td>Resource assignment unique type</td>
1601 </tr>
1602 <tr class="row-even"><td>RESOURCE_GET_TYPE</td>
1603 <td>10</td>
1604 <td>Resource type</td>
1605 </tr>
1606 <tr class="row-odd"><td>RESOURCE_GET_SUBTYPE</td>
1607 <td>11</td>
1608 <td>Resource subtype</td>
1609 </tr>
1610 <tr class="row-even"><td>RESOURCE_GET_RANGE_START</td>
1611 <td>12</td>
1612 <td>Resource range start</td>
1613 </tr>
1614 <tr class="row-odd"><td>RESOURCE_GET_RANGE_NUM</td>
1615 <td>13</td>
1616 <td>Resource range number</td>
1617 </tr>
1618 <tr class="row-even"><td>RESOURCE_GET_SECONDARY_HOST</td>
1619 <td>14</td>
1620 <td>Secondary host</td>
1621 </tr>
1622 <tr class="row-odd"><td rowspan="3">DEVGRP_VALIDATE</td>
1623 <td rowspan="3">62</td>
1624 <td rowspan="3">Validate device
1625 against current RM
1626 device group</td>
1627 <td>DEVICE_ID</td>
1628 <td>0</td>
1629 <td>Device ID</td>
1630 </tr>
1631 <tr class="row-even"><td>DEVGRP_BOARDCFG</td>
1632 <td>10</td>
1633 <td>RM Board configuration devgrp</td>
1634 </tr>
1635 <tr class="row-odd"><td>DEVGRP_DEVICE</td>
1636 <td>11</td>
1637 <td>RM managed device devgrp</td>
1638 </tr>
1639 <tr class="row-even"><td>FAIL (modifier)</td>
1640 <td>0x40</td>
1641 <td>Action failed when
1642 action bit set</td>
1643 <td>N/A</td>
1644 <td>N/A</td>
1645 <td>N/A</td>
1646 </tr>
1647 <tr class="row-odd"><td>GENERIC_DEBUG</td>
1648 <td>127</td>
1649 <td>Generic Debug Message</td>
1650 <td>N/A</td>
1651 <td>N/A</td>
1652 <td>Any use.</td>
1653 </tr>
1654 </tbody>
1655 </table>
1656 </div>
1657 <div class="section" id="power-management-action-ids">
1658 <span id="pub-trace-debug-data-format-action-id-power"></span><h4>Power Management Action IDs<a class="headerlink" href="#power-management-action-ids" title="Permalink to this headline">¶</a></h4>
1659 <table border="1" class="docutils">
1660 <colgroup>
1661 <col width="19%" />
1662 <col width="6%" />
1663 <col width="37%" />
1664 <col width="37%" />
1665 </colgroup>
1666 <thead valign="bottom">
1667 <tr class="row-odd"><th class="head">Action ID</th>
1668 <th class="head">Value</th>
1669 <th class="head">Use</th>
1670 <th class="head">MSD Use</th>
1671 </tr>
1672 </thead>
1673 <tbody valign="top">
1674 <tr class="row-even"><td>DEVICE_ON</td>
1675 <td>0</td>
1676 <td>Device has been turned on           .</td>
1677 <td>Device ID</td>
1678 </tr>
1679 <tr class="row-odd"><td>DEVICE_OFF</td>
1680 <td>1</td>
1681 <td>Device has been turned off.</td>
1682 <td>Device ID</td>
1683 </tr>
1684 <tr class="row-even"><td>CLOCK_ENABLE</td>
1685 <td>2</td>
1686 <td>Clock has been enabled.</td>
1687 <td>Clock ID</td>
1688 </tr>
1689 <tr class="row-odd"><td>CLOCK_DISABLE</td>
1690 <td>3</td>
1691 <td>Clock has been disabled.</td>
1692 <td>Clock ID</td>
1693 </tr>
1694 <tr class="row-even"><td>CLOCK_SET_RATE</td>
1695 <td>4</td>
1696 <td>Clock frequency has been changed.</td>
1697 <td>[21:17] - Clock frequency, exponent
1698 [16:10] - Clock frequency, significand
1699 [9:0]   - Clock ID</td>
1700 </tr>
1701 <tr class="row-odd"><td>CLOCK_SET_PARENT</td>
1702 <td>5</td>
1703 <td>Clock parent has been changed.</td>
1704 <td>[21:10] - New parent ID
1705 [9:0]   - Clock ID</td>
1706 </tr>
1707 <tr class="row-even"><td>MSG_RECEIVED</td>
1708 <td>6</td>
1709 <td>TI-SCI message received</td>
1710 <td>Message ID</td>
1711 </tr>
1712 <tr class="row-odd"><td>MSG_PARAM_DEV_CLK_ID</td>
1713 <td>7</td>
1714 <td>TI-SCI message content: dev/clk-ids</td>
1715 <td>[10:21] - Clock ID
1716 [9:0]   - Device ID</td>
1717 </tr>
1718 <tr class="row-even"><td>MSG_PARAM_VAL</td>
1719 <td>8</td>
1720 <td>TI-SCI message content: value</td>
1721 <td>Target value</td>
1722 </tr>
1723 <tr class="row-odd"><td>WAKE_ARM</td>
1724 <td>9</td>
1725 <td>ARM wakeup event received</td>
1726 <td>Host ID</td>
1727 </tr>
1728 <tr class="row-even"><td>WAKE_HANDLER</td>
1729 <td>10</td>
1730 <td>Wakeup handler executed</td>
1731 <td>Interrupt ID</td>
1732 </tr>
1733 <tr class="row-odd"><td>PD_GET</td>
1734 <td>11</td>
1735 <td>Powerdomain get</td>
1736 <td>[21:20]   - PSC ID
1737 [19:14]   - Powerdomain ID
1738 [13:0]    - PD Use count</td>
1739 </tr>
1740 <tr class="row-even"><td>PD_PUT</td>
1741 <td>12</td>
1742 <td>Powerdomain put</td>
1743 <td>[21:20]   - PSC ID
1744 [19:14]   - Powerdomain ID
1745 [13:0]    - PD Use count</td>
1746 </tr>
1747 <tr class="row-odd"><td>SET_LOCAL_RESET</td>
1748 <td>13</td>
1749 <td>Set local reset</td>
1750 <td>[21:20]   - PSC ID
1751 [19:14]   - Powerdomain ID
1752 [0]       - Enable (1) / Disable (0)</td>
1753 </tr>
1754 <tr class="row-even"><td>MODULE_GET</td>
1755 <td>14</td>
1756 <td>Module get</td>
1757 <td>[21:20]   - PSC ID
1758 [19:14]   - LPSC ID
1759 [13:0]    - Module Use count</td>
1760 </tr>
1761 <tr class="row-odd"><td>MODULE_PUT</td>
1762 <td>15</td>
1763 <td>Module put</td>
1764 <td>[21:20]   - PSC ID
1765 [19:14]   - LPSC ID
1766 [13:0]    - Module Use count</td>
1767 </tr>
1768 <tr class="row-even"><td>RETENTION_GET</td>
1769 <td>16</td>
1770 <td>Retention put</td>
1771 <td>[21:20]   - LPSC ID
1772 [19:14]   - Powerdomain ID
1773 [13:0]    - Module Retention count</td>
1774 </tr>
1775 <tr class="row-odd"><td>RETENTION_PUT</td>
1776 <td>17</td>
1777 <td>Retention put</td>
1778 <td>[21:20]   - LPSC ID
1779 [19:14]   - Powerdomain ID
1780 [13:0]    - Module Retention count</td>
1781 </tr>
1782 <tr class="row-even"><td>PD_INIT</td>
1783 <td>18</td>
1784 <td>Powerdomain init</td>
1785 <td>[19:14]   - Powerdomain ID
1786 [21:20]   - PSC ID</td>
1787 </tr>
1788 <tr class="row-odd"><td>PSC_INV_DATA</td>
1789 <td>19</td>
1790 <td>Invalid PSC Data</td>
1791 <td>N/A</td>
1792 </tr>
1793 <tr class="row-even"><td>PD_TRANS_TIMEOUT</td>
1794 <td>20</td>
1795 <td>Powerdomain Transition timeout</td>
1796 <td>[21:20]   - PSC ID
1797 [19:14]   - Powerdomain ID
1798 [2:0]     - Priv Position information</td>
1799 </tr>
1800 <tr class="row-odd"><td>PD_INV_DEP_DATA</td>
1801 <td>21</td>
1802 <td>Powerdomain Invalid Dep Data</td>
1803 <td>[21:20]   - Dependent PD ID
1804 [19:14]   - Powerdomain ID
1805 [2:0]     - Priv Position information</td>
1806 </tr>
1807 <tr class="row-even"><td>PD_RSTDNE_TIMEOUT</td>
1808 <td>22</td>
1809 <td>Powerdomain resetdone timeout</td>
1810 <td>[21:20]   - PSC ID
1811 [19:14]   - Powerdomain ID
1812 [2:0]     - Priv Position information</td>
1813 </tr>
1814 <tr class="row-odd"><td>PM_INIT</td>
1815 <td>32</td>
1816 <td>Power Management Init</td>
1817 <td>[20]      - Power Init result
1818 [19]      - Modules defer result
1819 [18:16]   - Index of start module
1820 [15:0]    - Error value</td>
1821 </tr>
1822 <tr class="row-even"><td>PM_DEV_INIT</td>
1823 <td>33</td>
1824 <td>Power Management device init</td>
1825 <td>[21:12]   - Device ID
1826 [11:0]    - Error value</td>
1827 </tr>
1828 <tr class="row-odd"><td>PM_SYS_RESET</td>
1829 <td>34</td>
1830 <td>Reset of entire system or a domain</td>
1831 <td>[21:14]   - Domain
1832 [13:0]    - Error value</td>
1833 </tr>
1834 <tr class="row-even"><td>FAIL (modifier)</td>
1835 <td>0x40</td>
1836 <td>Action failed when action bit set</td>
1837 <td>N/A</td>
1838 </tr>
1839 <tr class="row-odd"><td>EXCLUSIVE_BUSY</td>
1840 <td>123</td>
1841 <td>Other hosts have enabled the device
1842 which exclusive access has been
1843 requested</td>
1844 <td>[21:12]   - Device ID
1845 [11:6]    - Requesting host ID
1846 [5:0]     - One of other host IDs</td>
1847 </tr>
1848 <tr class="row-even"><td>EXCLUSIVE_DEVICE</td>
1849 <td>124</td>
1850 <td>Another host has exclusive access
1851 to the requested device</td>
1852 <td>[21:8]    - Device ID
1853 [7:0]     - Requesting host ID</td>
1854 </tr>
1855 <tr class="row-odd"><td>INVALID_STATE</td>
1856 <td>125</td>
1857 <td>API attempted to set invalid state</td>
1858 <td>Target state</td>
1859 </tr>
1860 <tr class="row-even"><td>BAD_DEVICE</td>
1861 <td>126</td>
1862 <td>API received bad device ID</td>
1863 <td>Device ID</td>
1864 </tr>
1865 <tr class="row-odd"><td>GENERIC_DEBUG</td>
1866 <td>127</td>
1867 <td>Generic Debug Message</td>
1868 <td>Any use.</td>
1869 </tr>
1870 </tbody>
1871 </table>
1872 </div>
1873 </div>
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