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 185   <div class="section" id="am64x-clock-identifiers">
 186 <h1>AM64X Clock Identifiers<a class="headerlink" href="#am64x-clock-identifiers" title="Permalink to this headline">¶</a></h1>
 187 <div class="section" id="clock-for-am64x-device">
 188 <span id="soc-doc-am64x-public-clks-desc-intro"></span><h2>Clock for AM64X Device<a class="headerlink" href="#clock-for-am64x-device" title="Permalink to this headline">¶</a></h2>
 189 <p>This chapter provides information on clock IDs that identify clocks
 190 incoming and outgoing from devices identified via
 191 <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">device IDs</span></a>
 192 in AM64X SoC.</p>
 193 <p>TISCI message Power Management APIs define a device ID and clock ID as
 194 parameters allowing a user to specify granular control of clocks
 195 for a particular SoC subsystem.</p>
 196 </div>
 197 <div class="section" id="device-wise-clock-id-list-for-am64x-soc">
 198 <span id="soc-doc-am64x-public-clks-dev-list"></span><h2>Device wise clock ID list for AM64X SoC<a class="headerlink" href="#device-wise-clock-id-list-for-am64x-soc" title="Permalink to this headline">¶</a></h2>
 199 <p>This is an enumerated list of clocks per device ID that can be
 200 controlled via the power management clock APIs</p>
 201 <p>The following table describes functions implemented by clocks</p>
 202 <table border="1" class="docutils">
 203 <colgroup>
 204 <col width="27%" />
 205 <col width="73%" />
 206 </colgroup>
 207 <thead valign="bottom">
 208 <tr class="row-odd"><th class="head">Function</th>
 209 <th class="head">Description</th>
 210 </tr>
 211 </thead>
 212 <tbody valign="top">
 213 <tr class="row-even"><td>Input clock</td>
 214 <td>Clock input to the SoC subsystem</td>
 215 </tr>
 216 <tr class="row-odd"><td>Output clock</td>
 217 <td>Clock output from the SoC subsystem</td>
 218 </tr>
 219 <tr class="row-even"><td>Input muxed clock</td>
 220 <td>Clock input to the SoC subsystem, but can choose one of the parent clocks as a clock source</td>
 221 </tr>
 222 <tr class="row-odd"><td>Parent input clock option to XYZ</td>
 223 <td>One of the parent clocks that can be used as a source clock to a input muxed clock</td>
 224 </tr>
 225 </tbody>
 226 </table>
 227 <p>Also note: There are devices which do not have clock information.
 228 These do have chapters in this document associated with them, however, these would be marked as:</p>
 229 <p><strong>This device has no defined clocks.</strong></p>
 230 <p>The chapters corresponding to the devices are organized alphabetically per device name for ease of readability.</p>
 231 <div class="section" id="clocks-for-a53ss0-device">
 232 <span id="soc-doc-am64x-public-clks-a53ss0"></span><h3>Clocks for A53SS0 Device<a class="headerlink" href="#clocks-for-a53ss0-device" title="Permalink to this headline">¶</a></h3>
 233 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_A53SS0</span></a> (ID = 137)</p>
 234 <p>Following is a mapping of Clocks IDs to function:</p>
 235 <table border="1" class="docutils">
 236 <colgroup>
 237 <col width="21%" />
 238 <col width="56%" />
 239 <col width="23%" />
 240 </colgroup>
 241 <thead valign="bottom">
 242 <tr class="row-odd"><th class="head">Clock ID</th>
 243 <th class="head">Name</th>
 244 <th class="head">Function</th>
 245 </tr>
 246 </thead>
 247 <tbody valign="top">
 248 <tr class="row-even"><td>0</td>
 249 <td>DEV_A53SS0_COREPAC_ARM_CLK_CLK</td>
 250 <td>Input clock</td>
 251 </tr>
 252 <tr class="row-odd"><td>1</td>
 253 <td>DEV_A53SS0_PLL_CTRL_CLK</td>
 254 <td>Input clock</td>
 255 </tr>
 256 </tbody>
 257 </table>
 258 </div>
 259 <div class="section" id="clocks-for-a53ss0-core-0-device">
 260 <span id="soc-doc-am64x-public-clks-a53ss0-core-0"></span><h3>Clocks for A53SS0_CORE_0 Device<a class="headerlink" href="#clocks-for-a53ss0-core-0-device" title="Permalink to this headline">¶</a></h3>
 261 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_A53SS0_CORE_0</span></a> (ID = 135)</p>
 262 <p>Following is a mapping of Clocks IDs to function:</p>
 263 <table border="1" class="docutils">
 264 <colgroup>
 265 <col width="18%" />
 266 <col width="62%" />
 267 <col width="20%" />
 268 </colgroup>
 269 <thead valign="bottom">
 270 <tr class="row-odd"><th class="head">Clock ID</th>
 271 <th class="head">Name</th>
 272 <th class="head">Function</th>
 273 </tr>
 274 </thead>
 275 <tbody valign="top">
 276 <tr class="row-even"><td>0</td>
 277 <td>DEV_A53SS0_CORE_0_A53_CORE0_ARM_CLK_CLK</td>
 278 <td>Input clock</td>
 279 </tr>
 280 </tbody>
 281 </table>
 282 </div>
 283 <div class="section" id="clocks-for-a53ss0-core-1-device">
 284 <span id="soc-doc-am64x-public-clks-a53ss0-core-1"></span><h3>Clocks for A53SS0_CORE_1 Device<a class="headerlink" href="#clocks-for-a53ss0-core-1-device" title="Permalink to this headline">¶</a></h3>
 285 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_A53SS0_CORE_1</span></a> (ID = 136)</p>
 286 <p>Following is a mapping of Clocks IDs to function:</p>
 287 <table border="1" class="docutils">
 288 <colgroup>
 289 <col width="18%" />
 290 <col width="62%" />
 291 <col width="20%" />
 292 </colgroup>
 293 <thead valign="bottom">
 294 <tr class="row-odd"><th class="head">Clock ID</th>
 295 <th class="head">Name</th>
 296 <th class="head">Function</th>
 297 </tr>
 298 </thead>
 299 <tbody valign="top">
 300 <tr class="row-even"><td>0</td>
 301 <td>DEV_A53SS0_CORE_1_A53_CORE1_ARM_CLK_CLK</td>
 302 <td>Input clock</td>
 303 </tr>
 304 </tbody>
 305 </table>
 306 </div>
 307 <div class="section" id="clocks-for-adc0-device">
 308 <span id="soc-doc-am64x-public-clks-adc0"></span><h3>Clocks for ADC0 Device<a class="headerlink" href="#clocks-for-adc0-device" title="Permalink to this headline">¶</a></h3>
 309 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_ADC0</span></a> (ID = 0)</p>
 310 <p>Following is a mapping of Clocks IDs to function:</p>
 311 <table border="1" class="docutils">
 312 <colgroup>
 313 <col width="10%" />
 314 <col width="51%" />
 315 <col width="39%" />
 316 </colgroup>
 317 <thead valign="bottom">
 318 <tr class="row-odd"><th class="head">Clock ID</th>
 319 <th class="head">Name</th>
 320 <th class="head">Function</th>
 321 </tr>
 322 </thead>
 323 <tbody valign="top">
 324 <tr class="row-even"><td>0</td>
 325 <td>DEV_ADC0_ADC_CLK</td>
 326 <td>Input muxed clock</td>
 327 </tr>
 328 <tr class="row-odd"><td>1</td>
 329 <td>DEV_ADC0_ADC_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
 330 <td>Parent input clock option to DEV_ADC0_ADC_CLK</td>
 331 </tr>
 332 <tr class="row-even"><td>2</td>
 333 <td>DEV_ADC0_ADC_CLK_PARENT_POSTDIV1_16FFT_MAIN_1_HSDIVOUT6_CLK</td>
 334 <td>Parent input clock option to DEV_ADC0_ADC_CLK</td>
 335 </tr>
 336 <tr class="row-odd"><td>3</td>
 337 <td>DEV_ADC0_ADC_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT8_CLK</td>
 338 <td>Parent input clock option to DEV_ADC0_ADC_CLK</td>
 339 </tr>
 340 <tr class="row-even"><td>4</td>
 341 <td>DEV_ADC0_ADC_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
 342 <td>Parent input clock option to DEV_ADC0_ADC_CLK</td>
 343 </tr>
 344 <tr class="row-odd"><td>5</td>
 345 <td>DEV_ADC0_SYS_CLK</td>
 346 <td>Input clock</td>
 347 </tr>
 348 <tr class="row-even"><td>6</td>
 349 <td>DEV_ADC0_VBUS_CLK</td>
 350 <td>Input clock</td>
 351 </tr>
 352 </tbody>
 353 </table>
 354 </div>
 355 <div class="section" id="clocks-for-board0-device">
 356 <span id="soc-doc-am64x-public-clks-board0"></span><h3>Clocks for BOARD0 Device<a class="headerlink" href="#clocks-for-board0-device" title="Permalink to this headline">¶</a></h3>
 357 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_BOARD0</span></a> (ID = 157)</p>
 358 <div class="admonition note">
 359 <p class="first admonition-title">Note</p>
 360 <p>BOARD0 is a special device that represents the board on which
 361 the SoC is mounted.</p>
 362 <p>Clocks that are incoming to or outgoing from the SoC are
 363 represented in this section from the <em>perspective of the board</em>.</p>
 364 <p>Function documented here implies:</p>
 365 <table border="1" class="docutils">
 366 <colgroup>
 367 <col width="15%" />
 368 <col width="85%" />
 369 </colgroup>
 370 <thead valign="bottom">
 371 <tr class="row-odd"><th class="head">Function</th>
 372 <th class="head">Description</th>
 373 </tr>
 374 </thead>
 375 <tbody valign="top">
 376 <tr class="row-even"><td>Input clock</td>
 377 <td>Clock is supplied from SoC to the board (It is an output of the SoC)</td>
 378 </tr>
 379 <tr class="row-odd"><td>Output clock</td>
 380 <td>Clock is supplied from board to the SoC (It is an output of the Board and input to the SoC)</td>
 381 </tr>
 382 </tbody>
 383 </table>
 384 <p class="last"><strong>NOTE: Clocks which can be bi-directional are listed as Output clock</strong></p>
 385 </div>
 386 <p>Following is a mapping of Clocks IDs to function:</p>
 387 <table border="1" class="docutils">
 388 <colgroup>
 389 <col width="8%" />
 390 <col width="51%" />
 391 <col width="41%" />
 392 </colgroup>
 393 <thead valign="bottom">
 394 <tr class="row-odd"><th class="head">Clock ID</th>
 395 <th class="head">Name</th>
 396 <th class="head">Function</th>
 397 </tr>
 398 </thead>
 399 <tbody valign="top">
 400 <tr class="row-even"><td>0</td>
 401 <td>DEV_BOARD0_FSI_TX0_CLK_IN</td>
 402 <td>Input clock</td>
 403 </tr>
 404 <tr class="row-odd"><td>1</td>
 405 <td>DEV_BOARD0_FSI_TX1_CLK_IN</td>
 406 <td>Input clock</td>
 407 </tr>
 408 <tr class="row-even"><td>2</td>
 409 <td>DEV_BOARD0_GPMC0_CLKLB_IN</td>
 410 <td>Input clock</td>
 411 </tr>
 412 <tr class="row-odd"><td>3</td>
 413 <td>DEV_BOARD0_GPMC0_CLK_IN</td>
 414 <td>Input clock</td>
 415 </tr>
 416 <tr class="row-even"><td>4</td>
 417 <td>DEV_BOARD0_GPMC0_FCLK_MUX_IN</td>
 418 <td>Input muxed clock</td>
 419 </tr>
 420 <tr class="row-odd"><td>5</td>
 421 <td>DEV_BOARD0_GPMC0_FCLK_MUX_IN_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT3_CLK</td>
 422 <td>Parent input clock option to DEV_BOARD0_GPMC0_FCLK_MUX_IN</td>
 423 </tr>
 424 <tr class="row-even"><td>6</td>
 425 <td>DEV_BOARD0_GPMC0_FCLK_MUX_IN_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT7_CLK</td>
 426 <td>Parent input clock option to DEV_BOARD0_GPMC0_FCLK_MUX_IN</td>
 427 </tr>
 428 <tr class="row-odd"><td>7</td>
 429 <td>DEV_BOARD0_I2C0_SCL_IN</td>
 430 <td>Input clock</td>
 431 </tr>
 432 <tr class="row-even"><td>8</td>
 433 <td>DEV_BOARD0_I2C1_SCL_IN</td>
 434 <td>Input clock</td>
 435 </tr>
 436 <tr class="row-odd"><td>9</td>
 437 <td>DEV_BOARD0_I2C2_SCL_IN</td>
 438 <td>Input clock</td>
 439 </tr>
 440 <tr class="row-even"><td>10</td>
 441 <td>DEV_BOARD0_I2C3_SCL_IN</td>
 442 <td>Input clock</td>
 443 </tr>
 444 <tr class="row-odd"><td>11</td>
 445 <td>DEV_BOARD0_MCU_I2C0_SCL_IN</td>
 446 <td>Input clock</td>
 447 </tr>
 448 <tr class="row-even"><td>12</td>
 449 <td>DEV_BOARD0_MCU_I2C1_SCL_IN</td>
 450 <td>Input clock</td>
 451 </tr>
 452 <tr class="row-odd"><td>13</td>
 453 <td>DEV_BOARD0_MCU_OBSCLK0_IN</td>
 454 <td>Input muxed clock</td>
 455 </tr>
 456 <tr class="row-even"><td>14</td>
 457 <td>DEV_BOARD0_MCU_OBSCLK0_IN_PARENT_MCU_OBSCLK_DIV_OUT0</td>
 458 <td>Parent input clock option to DEV_BOARD0_MCU_OBSCLK0_IN</td>
 459 </tr>
 460 <tr class="row-odd"><td>15</td>
 461 <td>DEV_BOARD0_MCU_OBSCLK0_IN_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
 462 <td>Parent input clock option to DEV_BOARD0_MCU_OBSCLK0_IN</td>
 463 </tr>
 464 <tr class="row-even"><td>16</td>
 465 <td>DEV_BOARD0_MCU_SPI0_CLK_IN</td>
 466 <td>Input clock</td>
 467 </tr>
 468 <tr class="row-odd"><td>17</td>
 469 <td>DEV_BOARD0_MCU_SPI1_CLK_IN</td>
 470 <td>Input clock</td>
 471 </tr>
 472 <tr class="row-even"><td>18</td>
 473 <td>DEV_BOARD0_MCU_SYSCLKOUT0_IN</td>
 474 <td>Input clock</td>
 475 </tr>
 476 <tr class="row-odd"><td>19</td>
 477 <td>DEV_BOARD0_MCU_TIMER_IO0_IN</td>
 478 <td>Input clock</td>
 479 </tr>
 480 <tr class="row-even"><td>20</td>
 481 <td>DEV_BOARD0_MCU_TIMER_IO1_IN</td>
 482 <td>Input clock</td>
 483 </tr>
 484 <tr class="row-odd"><td>21</td>
 485 <td>DEV_BOARD0_MCU_TIMER_IO2_IN</td>
 486 <td>Input clock</td>
 487 </tr>
 488 <tr class="row-even"><td>22</td>
 489 <td>DEV_BOARD0_MCU_TIMER_IO3_IN</td>
 490 <td>Input clock</td>
 491 </tr>
 492 <tr class="row-odd"><td>23</td>
 493 <td>DEV_BOARD0_MMC1_CLK_IN</td>
 494 <td>Input clock</td>
 495 </tr>
 496 <tr class="row-even"><td>24</td>
 497 <td>DEV_BOARD0_OBSCLK0_IN</td>
 498 <td>Input clock</td>
 499 </tr>
 500 <tr class="row-odd"><td>25</td>
 501 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT0_CLK</td>
 502 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 503 </tr>
 504 <tr class="row-even"><td>26</td>
 505 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT0_CLK</td>
 506 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 507 </tr>
 508 <tr class="row-odd"><td>27</td>
 509 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
 510 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 511 </tr>
 512 <tr class="row-even"><td>28</td>
 513 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
 514 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 515 </tr>
 516 <tr class="row-odd"><td>29</td>
 517 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
 518 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 519 </tr>
 520 <tr class="row-even"><td>30</td>
 521 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
 522 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 523 </tr>
 524 <tr class="row-odd"><td>31</td>
 525 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
 526 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 527 </tr>
 528 <tr class="row-even"><td>32</td>
 529 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_HSDIV1_16FFT_MAIN_14_HSDIVOUT0_CLK</td>
 530 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 531 </tr>
 532 <tr class="row-odd"><td>33</td>
 533 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_HSDIV4_16FFT_MAIN_2_HSDIVOUT0_CLK</td>
 534 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 535 </tr>
 536 <tr class="row-even"><td>34</td>
 537 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_HSDIV0_16FFT_MAIN_8_HSDIVOUT0_CLK</td>
 538 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 539 </tr>
 540 <tr class="row-odd"><td>35</td>
 541 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_HSDIV0_16FFT_MAIN_12_HSDIVOUT0_CLK</td>
 542 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 543 </tr>
 544 <tr class="row-even"><td>36</td>
 545 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
 546 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 547 </tr>
 548 <tr class="row-odd"><td>37</td>
 549 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
 550 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 551 </tr>
 552 <tr class="row-even"><td>38</td>
 553 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT0_CLK_DUP0</td>
 554 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 555 </tr>
 556 <tr class="row-odd"><td>39</td>
 557 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
 558 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 559 </tr>
 560 <tr class="row-even"><td>40</td>
 561 <td>DEV_BOARD0_OBSCLK0_IN_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
 562 <td>Parent input clock option to DEV_BOARD0_OBSCLK0_IN</td>
 563 </tr>
 564 <tr class="row-odd"><td>41</td>
 565 <td>DEV_BOARD0_OSPI0_LBCLKO_IN</td>
 566 <td>Input clock</td>
 567 </tr>
 568 <tr class="row-even"><td>42</td>
 569 <td>DEV_BOARD0_PRG0_MDIO0_MDC_IN</td>
 570 <td>Input clock</td>
 571 </tr>
 572 <tr class="row-odd"><td>43</td>
 573 <td>DEV_BOARD0_PRG0_RGMII1_TXC_IN</td>
 574 <td>Input clock</td>
 575 </tr>
 576 <tr class="row-even"><td>44</td>
 577 <td>DEV_BOARD0_PRG0_RGMII2_TXC_IN</td>
 578 <td>Input clock</td>
 579 </tr>
 580 <tr class="row-odd"><td>45</td>
 581 <td>DEV_BOARD0_PRG1_MDIO0_MDC_IN</td>
 582 <td>Input clock</td>
 583 </tr>
 584 <tr class="row-even"><td>46</td>
 585 <td>DEV_BOARD0_PRG1_RGMII1_TXC_IN</td>
 586 <td>Input clock</td>
 587 </tr>
 588 <tr class="row-odd"><td>47</td>
 589 <td>DEV_BOARD0_PRG1_RGMII2_TXC_IN</td>
 590 <td>Input clock</td>
 591 </tr>
 592 <tr class="row-even"><td>48</td>
 593 <td>DEV_BOARD0_RGMII1_TXC_IN</td>
 594 <td>Input clock</td>
 595 </tr>
 596 <tr class="row-odd"><td>49</td>
 597 <td>DEV_BOARD0_RGMII2_TXC_IN</td>
 598 <td>Input clock</td>
 599 </tr>
 600 <tr class="row-even"><td>50</td>
 601 <td>DEV_BOARD0_SPI0_CLK_IN</td>
 602 <td>Input clock</td>
 603 </tr>
 604 <tr class="row-odd"><td>51</td>
 605 <td>DEV_BOARD0_SPI1_CLK_IN</td>
 606 <td>Input clock</td>
 607 </tr>
 608 <tr class="row-even"><td>52</td>
 609 <td>DEV_BOARD0_SPI2_CLK_IN</td>
 610 <td>Input clock</td>
 611 </tr>
 612 <tr class="row-odd"><td>53</td>
 613 <td>DEV_BOARD0_SPI3_CLK_IN</td>
 614 <td>Input clock</td>
 615 </tr>
 616 <tr class="row-even"><td>54</td>
 617 <td>DEV_BOARD0_SPI4_CLK_IN</td>
 618 <td>Input clock</td>
 619 </tr>
 620 <tr class="row-odd"><td>55</td>
 621 <td>DEV_BOARD0_SYSCLKOUT0_IN</td>
 622 <td>Input clock</td>
 623 </tr>
 624 <tr class="row-even"><td>56</td>
 625 <td>DEV_BOARD0_TIMER_IO0_IN</td>
 626 <td>Input clock</td>
 627 </tr>
 628 <tr class="row-odd"><td>57</td>
 629 <td>DEV_BOARD0_TIMER_IO10_IN</td>
 630 <td>Input clock</td>
 631 </tr>
 632 <tr class="row-even"><td>58</td>
 633 <td>DEV_BOARD0_TIMER_IO11_IN</td>
 634 <td>Input clock</td>
 635 </tr>
 636 <tr class="row-odd"><td>59</td>
 637 <td>DEV_BOARD0_TIMER_IO1_IN</td>
 638 <td>Input clock</td>
 639 </tr>
 640 <tr class="row-even"><td>60</td>
 641 <td>DEV_BOARD0_TIMER_IO2_IN</td>
 642 <td>Input clock</td>
 643 </tr>
 644 <tr class="row-odd"><td>61</td>
 645 <td>DEV_BOARD0_TIMER_IO3_IN</td>
 646 <td>Input clock</td>
 647 </tr>
 648 <tr class="row-even"><td>62</td>
 649 <td>DEV_BOARD0_TIMER_IO4_IN</td>
 650 <td>Input clock</td>
 651 </tr>
 652 <tr class="row-odd"><td>63</td>
 653 <td>DEV_BOARD0_TIMER_IO5_IN</td>
 654 <td>Input clock</td>
 655 </tr>
 656 <tr class="row-even"><td>64</td>
 657 <td>DEV_BOARD0_TIMER_IO6_IN</td>
 658 <td>Input clock</td>
 659 </tr>
 660 <tr class="row-odd"><td>65</td>
 661 <td>DEV_BOARD0_TIMER_IO7_IN</td>
 662 <td>Input clock</td>
 663 </tr>
 664 <tr class="row-even"><td>66</td>
 665 <td>DEV_BOARD0_TIMER_IO8_IN</td>
 666 <td>Input clock</td>
 667 </tr>
 668 <tr class="row-odd"><td>67</td>
 669 <td>DEV_BOARD0_TIMER_IO9_IN</td>
 670 <td>Input clock</td>
 671 </tr>
 672 <tr class="row-even"><td>68</td>
 673 <td>DEV_BOARD0_CPTS0_RFT_CLK_OUT</td>
 674 <td>Output clock</td>
 675 </tr>
 676 <tr class="row-odd"><td>69</td>
 677 <td>DEV_BOARD0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
 678 <td>Output clock</td>
 679 </tr>
 680 <tr class="row-even"><td>70</td>
 681 <td>DEV_BOARD0_EXT_REFCLK1_OUT</td>
 682 <td>Output clock</td>
 683 </tr>
 684 <tr class="row-odd"><td>71</td>
 685 <td>DEV_BOARD0_FSI_RX0_CLK_OUT</td>
 686 <td>Output clock</td>
 687 </tr>
 688 <tr class="row-even"><td>72</td>
 689 <td>DEV_BOARD0_FSI_RX1_CLK_OUT</td>
 690 <td>Output clock</td>
 691 </tr>
 692 <tr class="row-odd"><td>73</td>
 693 <td>DEV_BOARD0_FSI_RX2_CLK_OUT</td>
 694 <td>Output clock</td>
 695 </tr>
 696 <tr class="row-even"><td>74</td>
 697 <td>DEV_BOARD0_FSI_RX3_CLK_OUT</td>
 698 <td>Output clock</td>
 699 </tr>
 700 <tr class="row-odd"><td>75</td>
 701 <td>DEV_BOARD0_FSI_RX4_CLK_OUT</td>
 702 <td>Output clock</td>
 703 </tr>
 704 <tr class="row-even"><td>76</td>
 705 <td>DEV_BOARD0_FSI_RX5_CLK_OUT</td>
 706 <td>Output clock</td>
 707 </tr>
 708 <tr class="row-odd"><td>77</td>
 709 <td>DEV_BOARD0_GPMC0_CLKLB_OUT</td>
 710 <td>Output clock</td>
 711 </tr>
 712 <tr class="row-even"><td>78</td>
 713 <td>DEV_BOARD0_I2C0_SCL_OUT</td>
 714 <td>Output clock</td>
 715 </tr>
 716 <tr class="row-odd"><td>79</td>
 717 <td>DEV_BOARD0_I2C1_SCL_OUT</td>
 718 <td>Output clock</td>
 719 </tr>
 720 <tr class="row-even"><td>80</td>
 721 <td>DEV_BOARD0_I2C2_SCL_OUT</td>
 722 <td>Output clock</td>
 723 </tr>
 724 <tr class="row-odd"><td>81</td>
 725 <td>DEV_BOARD0_I2C3_SCL_OUT</td>
 726 <td>Output clock</td>
 727 </tr>
 728 <tr class="row-even"><td>82</td>
 729 <td>DEV_BOARD0_LED_CLK_OUT</td>
 730 <td>Output clock</td>
 731 </tr>
 732 <tr class="row-odd"><td>83</td>
 733 <td>DEV_BOARD0_MCU_EXT_REFCLK0_OUT</td>
 734 <td>Output clock</td>
 735 </tr>
 736 <tr class="row-even"><td>84</td>
 737 <td>DEV_BOARD0_MCU_I2C0_SCL_OUT</td>
 738 <td>Output clock</td>
 739 </tr>
 740 <tr class="row-odd"><td>85</td>
 741 <td>DEV_BOARD0_MCU_I2C1_SCL_OUT</td>
 742 <td>Output clock</td>
 743 </tr>
 744 <tr class="row-even"><td>86</td>
 745 <td>DEV_BOARD0_MCU_SPI0_CLK_OUT</td>
 746 <td>Output clock</td>
 747 </tr>
 748 <tr class="row-odd"><td>87</td>
 749 <td>DEV_BOARD0_MCU_SPI1_CLK_OUT</td>
 750 <td>Output clock</td>
 751 </tr>
 752 <tr class="row-even"><td>88</td>
 753 <td>DEV_BOARD0_MMC1_CLKLB_OUT</td>
 754 <td>Output clock</td>
 755 </tr>
 756 <tr class="row-odd"><td>89</td>
 757 <td>DEV_BOARD0_OSPI0_DQS_OUT</td>
 758 <td>Output clock</td>
 759 </tr>
 760 <tr class="row-even"><td>90</td>
 761 <td>DEV_BOARD0_OSPI0_LBCLKO_OUT</td>
 762 <td>Output clock</td>
 763 </tr>
 764 <tr class="row-odd"><td>91</td>
 765 <td>DEV_BOARD0_PRG0_RGMII1_RXC_OUT</td>
 766 <td>Output clock</td>
 767 </tr>
 768 <tr class="row-even"><td>92</td>
 769 <td>DEV_BOARD0_PRG0_RGMII1_TXC_OUT</td>
 770 <td>Output clock</td>
 771 </tr>
 772 <tr class="row-odd"><td>93</td>
 773 <td>DEV_BOARD0_PRG0_RGMII2_RXC_OUT</td>
 774 <td>Output clock</td>
 775 </tr>
 776 <tr class="row-even"><td>94</td>
 777 <td>DEV_BOARD0_PRG0_RGMII2_TXC_OUT</td>
 778 <td>Output clock</td>
 779 </tr>
 780 <tr class="row-odd"><td>95</td>
 781 <td>DEV_BOARD0_PRG1_RGMII1_RXC_OUT</td>
 782 <td>Output clock</td>
 783 </tr>
 784 <tr class="row-even"><td>96</td>
 785 <td>DEV_BOARD0_PRG1_RGMII1_TXC_OUT</td>
 786 <td>Output clock</td>
 787 </tr>
 788 <tr class="row-odd"><td>97</td>
 789 <td>DEV_BOARD0_PRG1_RGMII2_RXC_OUT</td>
 790 <td>Output clock</td>
 791 </tr>
 792 <tr class="row-even"><td>98</td>
 793 <td>DEV_BOARD0_PRG1_RGMII2_TXC_OUT</td>
 794 <td>Output clock</td>
 795 </tr>
 796 <tr class="row-odd"><td>99</td>
 797 <td>DEV_BOARD0_RGMII1_RXC_OUT</td>
 798 <td>Output clock</td>
 799 </tr>
 800 <tr class="row-even"><td>100</td>
 801 <td>DEV_BOARD0_RGMII1_TXC_OUT</td>
 802 <td>Output clock</td>
 803 </tr>
 804 <tr class="row-odd"><td>101</td>
 805 <td>DEV_BOARD0_RGMII2_RXC_OUT</td>
 806 <td>Output clock</td>
 807 </tr>
 808 <tr class="row-even"><td>102</td>
 809 <td>DEV_BOARD0_RGMII2_TXC_OUT</td>
 810 <td>Output clock</td>
 811 </tr>
 812 <tr class="row-odd"><td>103</td>
 813 <td>DEV_BOARD0_RMII_REF_CLK_OUT</td>
 814 <td>Output clock</td>
 815 </tr>
 816 <tr class="row-even"><td>104</td>
 817 <td>DEV_BOARD0_SPI0_CLK_OUT</td>
 818 <td>Output clock</td>
 819 </tr>
 820 <tr class="row-odd"><td>105</td>
 821 <td>DEV_BOARD0_SPI1_CLK_OUT</td>
 822 <td>Output clock</td>
 823 </tr>
 824 <tr class="row-even"><td>106</td>
 825 <td>DEV_BOARD0_SPI2_CLK_OUT</td>
 826 <td>Output clock</td>
 827 </tr>
 828 <tr class="row-odd"><td>107</td>
 829 <td>DEV_BOARD0_SPI3_CLK_OUT</td>
 830 <td>Output clock</td>
 831 </tr>
 832 <tr class="row-even"><td>108</td>
 833 <td>DEV_BOARD0_SPI4_CLK_OUT</td>
 834 <td>Output clock</td>
 835 </tr>
 836 <tr class="row-odd"><td>109</td>
 837 <td>DEV_BOARD0_TCK_OUT</td>
 838 <td>Output clock</td>
 839 </tr>
 840 <tr class="row-even"><td>123</td>
 841 <td>DEV_BOARD0_CLKOUT0_IN</td>
 842 <td>Input muxed clock</td>
 843 </tr>
 844 <tr class="row-odd"><td>124</td>
 845 <td>DEV_BOARD0_CLKOUT0_IN_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT4_CLK5</td>
 846 <td>Parent input clock option to DEV_BOARD0_CLKOUT0_IN</td>
 847 </tr>
 848 <tr class="row-even"><td>125</td>
 849 <td>DEV_BOARD0_CLKOUT0_IN_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT4_CLK10</td>
 850 <td>Parent input clock option to DEV_BOARD0_CLKOUT0_IN</td>
 851 </tr>
 852 </tbody>
 853 </table>
 854 </div>
 855 <div class="section" id="clocks-for-cmp-event-introuter0-device">
 856 <span id="soc-doc-am64x-public-clks-cmp-event-introuter0"></span><h3>Clocks for CMP_EVENT_INTROUTER0 Device<a class="headerlink" href="#clocks-for-cmp-event-introuter0-device" title="Permalink to this headline">¶</a></h3>
 857 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_CMP_EVENT_INTROUTER0</span></a> (ID = 1)</p>
 858 <p>Following is a mapping of Clocks IDs to function:</p>
 859 <table border="1" class="docutils">
 860 <colgroup>
 861 <col width="20%" />
 862 <col width="58%" />
 863 <col width="22%" />
 864 </colgroup>
 865 <thead valign="bottom">
 866 <tr class="row-odd"><th class="head">Clock ID</th>
 867 <th class="head">Name</th>
 868 <th class="head">Function</th>
 869 </tr>
 870 </thead>
 871 <tbody valign="top">
 872 <tr class="row-even"><td>0</td>
 873 <td>DEV_CMP_EVENT_INTROUTER0_INTR_CLK</td>
 874 <td>Input clock</td>
 875 </tr>
 876 </tbody>
 877 </table>
 878 </div>
 879 <div class="section" id="clocks-for-compute-cluster0-device">
 880 <span id="soc-doc-am64x-public-clks-compute-cluster0"></span><h3>Clocks for COMPUTE_CLUSTER0 Device<a class="headerlink" href="#clocks-for-compute-cluster0-device" title="Permalink to this headline">¶</a></h3>
 881 <p><strong>This device has no defined clocks.</strong></p>
 882 </div>
 883 <div class="section" id="clocks-for-compute-cluster0-pbist-0-device">
 884 <span id="soc-doc-am64x-public-clks-compute-cluster0-pbist-0"></span><h3>Clocks for COMPUTE_CLUSTER0_PBIST_0 Device<a class="headerlink" href="#clocks-for-compute-cluster0-pbist-0-device" title="Permalink to this headline">¶</a></h3>
 885 <p><strong>This device has no defined clocks.</strong></p>
 886 </div>
 887 <div class="section" id="clocks-for-cpsw0-device">
 888 <span id="soc-doc-am64x-public-clks-cpsw0"></span><h3>Clocks for CPSW0 Device<a class="headerlink" href="#clocks-for-cpsw0-device" title="Permalink to this headline">¶</a></h3>
 889 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_CPSW0</span></a> (ID = 13)</p>
 890 <p>Following is a mapping of Clocks IDs to function:</p>
 891 <table border="1" class="docutils">
 892 <colgroup>
 893 <col width="9%" />
 894 <col width="53%" />
 895 <col width="38%" />
 896 </colgroup>
 897 <thead valign="bottom">
 898 <tr class="row-odd"><th class="head">Clock ID</th>
 899 <th class="head">Name</th>
 900 <th class="head">Function</th>
 901 </tr>
 902 </thead>
 903 <tbody valign="top">
 904 <tr class="row-even"><td>0</td>
 905 <td>DEV_CPSW0_CPPI_CLK_CLK</td>
 906 <td>Input clock</td>
 907 </tr>
 908 <tr class="row-odd"><td>1</td>
 909 <td>DEV_CPSW0_CPTS_RFT_CLK</td>
 910 <td>Input muxed clock</td>
 911 </tr>
 912 <tr class="row-even"><td>2</td>
 913 <td>DEV_CPSW0_CPTS_RFT_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT5_CLK</td>
 914 <td>Parent input clock option to DEV_CPSW0_CPTS_RFT_CLK</td>
 915 </tr>
 916 <tr class="row-odd"><td>3</td>
 917 <td>DEV_CPSW0_CPTS_RFT_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK</td>
 918 <td>Parent input clock option to DEV_CPSW0_CPTS_RFT_CLK</td>
 919 </tr>
 920 <tr class="row-even"><td>4</td>
 921 <td>DEV_CPSW0_CPTS_RFT_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
 922 <td>Parent input clock option to DEV_CPSW0_CPTS_RFT_CLK</td>
 923 </tr>
 924 <tr class="row-odd"><td>5</td>
 925 <td>DEV_CPSW0_CPTS_RFT_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
 926 <td>Parent input clock option to DEV_CPSW0_CPTS_RFT_CLK</td>
 927 </tr>
 928 <tr class="row-even"><td>6</td>
 929 <td>DEV_CPSW0_CPTS_RFT_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
 930 <td>Parent input clock option to DEV_CPSW0_CPTS_RFT_CLK</td>
 931 </tr>
 932 <tr class="row-odd"><td>7</td>
 933 <td>DEV_CPSW0_CPTS_RFT_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
 934 <td>Parent input clock option to DEV_CPSW0_CPTS_RFT_CLK</td>
 935 </tr>
 936 <tr class="row-even"><td>8</td>
 937 <td>DEV_CPSW0_CPTS_RFT_CLK_PARENT_WIZ16B2M4CT_MAIN_0_IP1_LN0_TXMCLK</td>
 938 <td>Parent input clock option to DEV_CPSW0_CPTS_RFT_CLK</td>
 939 </tr>
 940 <tr class="row-odd"><td>9</td>
 941 <td>DEV_CPSW0_CPTS_RFT_CLK_PARENT_K3_PLL_CTRL_WRAP_MAIN_0_CHIP_DIV1_CLK_CLK</td>
 942 <td>Parent input clock option to DEV_CPSW0_CPTS_RFT_CLK</td>
 943 </tr>
 944 <tr class="row-even"><td>10</td>
 945 <td>DEV_CPSW0_GMII1_MR_CLK</td>
 946 <td>Input clock</td>
 947 </tr>
 948 <tr class="row-odd"><td>11</td>
 949 <td>DEV_CPSW0_GMII1_MT_CLK</td>
 950 <td>Input clock</td>
 951 </tr>
 952 <tr class="row-even"><td>12</td>
 953 <td>DEV_CPSW0_GMII2_MR_CLK</td>
 954 <td>Input clock</td>
 955 </tr>
 956 <tr class="row-odd"><td>13</td>
 957 <td>DEV_CPSW0_GMII2_MT_CLK</td>
 958 <td>Input clock</td>
 959 </tr>
 960 <tr class="row-even"><td>14</td>
 961 <td>DEV_CPSW0_GMII_RFT_CLK</td>
 962 <td>Input clock</td>
 963 </tr>
 964 <tr class="row-odd"><td>15</td>
 965 <td>DEV_CPSW0_RGMII1_RXC_I</td>
 966 <td>Input clock</td>
 967 </tr>
 968 <tr class="row-even"><td>16</td>
 969 <td>DEV_CPSW0_RGMII1_TXC_I</td>
 970 <td>Input clock</td>
 971 </tr>
 972 <tr class="row-odd"><td>17</td>
 973 <td>DEV_CPSW0_RGMII2_RXC_I</td>
 974 <td>Input clock</td>
 975 </tr>
 976 <tr class="row-even"><td>18</td>
 977 <td>DEV_CPSW0_RGMII2_TXC_I</td>
 978 <td>Input clock</td>
 979 </tr>
 980 <tr class="row-odd"><td>19</td>
 981 <td>DEV_CPSW0_RGMII_MHZ_250_CLK</td>
 982 <td>Input clock</td>
 983 </tr>
 984 <tr class="row-even"><td>20</td>
 985 <td>DEV_CPSW0_RGMII_MHZ_50_CLK</td>
 986 <td>Input clock</td>
 987 </tr>
 988 <tr class="row-odd"><td>21</td>
 989 <td>DEV_CPSW0_RGMII_MHZ_5_CLK</td>
 990 <td>Input clock</td>
 991 </tr>
 992 <tr class="row-even"><td>22</td>
 993 <td>DEV_CPSW0_RMII_MHZ_50_CLK</td>
 994 <td>Input clock</td>
 995 </tr>
 996 <tr class="row-odd"><td>23</td>
 997 <td>DEV_CPSW0_CPTS_GENF0</td>
 998 <td>Output clock</td>
 999 </tr>
1000 <tr class="row-even"><td>24</td>
1001 <td>DEV_CPSW0_CPTS_GENF1</td>
1002 <td>Output clock</td>
1003 </tr>
1004 <tr class="row-odd"><td>25</td>
1005 <td>DEV_CPSW0_RGMII1_TXC_O</td>
1006 <td>Output clock</td>
1007 </tr>
1008 <tr class="row-even"><td>26</td>
1009 <td>DEV_CPSW0_RGMII2_TXC_O</td>
1010 <td>Output clock</td>
1011 </tr>
1012 </tbody>
1013 </table>
1014 </div>
1015 <div class="section" id="clocks-for-cpt2-aggr0-device">
1016 <span id="soc-doc-am64x-public-clks-cpt2-aggr0"></span><h3>Clocks for CPT2_AGGR0 Device<a class="headerlink" href="#clocks-for-cpt2-aggr0-device" title="Permalink to this headline">¶</a></h3>
1017 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_CPT2_AGGR0</span></a> (ID = 14)</p>
1018 <p>Following is a mapping of Clocks IDs to function:</p>
1019 <table border="1" class="docutils">
1020 <colgroup>
1021 <col width="24%" />
1022 <col width="50%" />
1023 <col width="26%" />
1024 </colgroup>
1025 <thead valign="bottom">
1026 <tr class="row-odd"><th class="head">Clock ID</th>
1027 <th class="head">Name</th>
1028 <th class="head">Function</th>
1029 </tr>
1030 </thead>
1031 <tbody valign="top">
1032 <tr class="row-even"><td>0</td>
1033 <td>DEV_CPT2_AGGR0_VCLK_CLK</td>
1034 <td>Input clock</td>
1035 </tr>
1036 </tbody>
1037 </table>
1038 </div>
1039 <div class="section" id="clocks-for-cpts0-device">
1040 <span id="soc-doc-am64x-public-clks-cpts0"></span><h3>Clocks for CPTS0 Device<a class="headerlink" href="#clocks-for-cpts0-device" title="Permalink to this headline">¶</a></h3>
1041 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_CPTS0</span></a> (ID = 84)</p>
1042 <p>Following is a mapping of Clocks IDs to function:</p>
1043 <table border="1" class="docutils">
1044 <colgroup>
1045 <col width="9%" />
1046 <col width="53%" />
1047 <col width="38%" />
1048 </colgroup>
1049 <thead valign="bottom">
1050 <tr class="row-odd"><th class="head">Clock ID</th>
1051 <th class="head">Name</th>
1052 <th class="head">Function</th>
1053 </tr>
1054 </thead>
1055 <tbody valign="top">
1056 <tr class="row-even"><td>0</td>
1057 <td>DEV_CPTS0_CPTS_RFT_CLK</td>
1058 <td>Input muxed clock</td>
1059 </tr>
1060 <tr class="row-odd"><td>1</td>
1061 <td>DEV_CPTS0_CPTS_RFT_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT5_CLK</td>
1062 <td>Parent input clock option to DEV_CPTS0_CPTS_RFT_CLK</td>
1063 </tr>
1064 <tr class="row-even"><td>2</td>
1065 <td>DEV_CPTS0_CPTS_RFT_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK</td>
1066 <td>Parent input clock option to DEV_CPTS0_CPTS_RFT_CLK</td>
1067 </tr>
1068 <tr class="row-odd"><td>3</td>
1069 <td>DEV_CPTS0_CPTS_RFT_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
1070 <td>Parent input clock option to DEV_CPTS0_CPTS_RFT_CLK</td>
1071 </tr>
1072 <tr class="row-even"><td>4</td>
1073 <td>DEV_CPTS0_CPTS_RFT_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
1074 <td>Parent input clock option to DEV_CPTS0_CPTS_RFT_CLK</td>
1075 </tr>
1076 <tr class="row-odd"><td>5</td>
1077 <td>DEV_CPTS0_CPTS_RFT_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
1078 <td>Parent input clock option to DEV_CPTS0_CPTS_RFT_CLK</td>
1079 </tr>
1080 <tr class="row-even"><td>6</td>
1081 <td>DEV_CPTS0_CPTS_RFT_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
1082 <td>Parent input clock option to DEV_CPTS0_CPTS_RFT_CLK</td>
1083 </tr>
1084 <tr class="row-odd"><td>7</td>
1085 <td>DEV_CPTS0_CPTS_RFT_CLK_PARENT_WIZ16B2M4CT_MAIN_0_IP1_LN0_TXMCLK</td>
1086 <td>Parent input clock option to DEV_CPTS0_CPTS_RFT_CLK</td>
1087 </tr>
1088 <tr class="row-even"><td>8</td>
1089 <td>DEV_CPTS0_CPTS_RFT_CLK_PARENT_K3_PLL_CTRL_WRAP_MAIN_0_CHIP_DIV1_CLK_CLK</td>
1090 <td>Parent input clock option to DEV_CPTS0_CPTS_RFT_CLK</td>
1091 </tr>
1092 <tr class="row-odd"><td>9</td>
1093 <td>DEV_CPTS0_VBUSP_CLK</td>
1094 <td>Input clock</td>
1095 </tr>
1096 <tr class="row-even"><td>10</td>
1097 <td>DEV_CPTS0_CPTS_GENF1</td>
1098 <td>Output clock</td>
1099 </tr>
1100 <tr class="row-odd"><td>11</td>
1101 <td>DEV_CPTS0_CPTS_GENF2</td>
1102 <td>Output clock</td>
1103 </tr>
1104 <tr class="row-even"><td>12</td>
1105 <td>DEV_CPTS0_CPTS_GENF3</td>
1106 <td>Output clock</td>
1107 </tr>
1108 <tr class="row-odd"><td>13</td>
1109 <td>DEV_CPTS0_CPTS_GENF4</td>
1110 <td>Output clock</td>
1111 </tr>
1112 </tbody>
1113 </table>
1114 </div>
1115 <div class="section" id="clocks-for-dbgsuspendrouter0-device">
1116 <span id="soc-doc-am64x-public-clks-dbgsuspendrouter0"></span><h3>Clocks for DBGSUSPENDROUTER0 Device<a class="headerlink" href="#clocks-for-dbgsuspendrouter0-device" title="Permalink to this headline">¶</a></h3>
1117 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DBGSUSPENDROUTER0</span></a> (ID = 2)</p>
1118 <p>Following is a mapping of Clocks IDs to function:</p>
1119 <table border="1" class="docutils">
1120 <colgroup>
1121 <col width="21%" />
1122 <col width="56%" />
1123 <col width="23%" />
1124 </colgroup>
1125 <thead valign="bottom">
1126 <tr class="row-odd"><th class="head">Clock ID</th>
1127 <th class="head">Name</th>
1128 <th class="head">Function</th>
1129 </tr>
1130 </thead>
1131 <tbody valign="top">
1132 <tr class="row-even"><td>0</td>
1133 <td>DEV_DBGSUSPENDROUTER0_INTR_CLK</td>
1134 <td>Input clock</td>
1135 </tr>
1136 </tbody>
1137 </table>
1138 </div>
1139 <div class="section" id="clocks-for-dcc0-device">
1140 <span id="soc-doc-am64x-public-clks-dcc0"></span><h3>Clocks for DCC0 Device<a class="headerlink" href="#clocks-for-dcc0-device" title="Permalink to this headline">¶</a></h3>
1141 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DCC0</span></a> (ID = 16)</p>
1142 <p>Following is a mapping of Clocks IDs to function:</p>
1143 <table border="1" class="docutils">
1144 <colgroup>
1145 <col width="24%" />
1146 <col width="51%" />
1147 <col width="25%" />
1148 </colgroup>
1149 <thead valign="bottom">
1150 <tr class="row-odd"><th class="head">Clock ID</th>
1151 <th class="head">Name</th>
1152 <th class="head">Function</th>
1153 </tr>
1154 </thead>
1155 <tbody valign="top">
1156 <tr class="row-even"><td>0</td>
1157 <td>DEV_DCC0_DCC_CLKSRC0_CLK</td>
1158 <td>Input clock</td>
1159 </tr>
1160 <tr class="row-odd"><td>1</td>
1161 <td>DEV_DCC0_DCC_CLKSRC1_CLK</td>
1162 <td>Input clock</td>
1163 </tr>
1164 <tr class="row-even"><td>2</td>
1165 <td>DEV_DCC0_DCC_CLKSRC2_CLK</td>
1166 <td>Input clock</td>
1167 </tr>
1168 <tr class="row-odd"><td>3</td>
1169 <td>DEV_DCC0_DCC_CLKSRC3_CLK</td>
1170 <td>Input clock</td>
1171 </tr>
1172 <tr class="row-even"><td>4</td>
1173 <td>DEV_DCC0_DCC_CLKSRC4_CLK</td>
1174 <td>Input clock</td>
1175 </tr>
1176 <tr class="row-odd"><td>5</td>
1177 <td>DEV_DCC0_DCC_CLKSRC5_CLK</td>
1178 <td>Input clock</td>
1179 </tr>
1180 <tr class="row-even"><td>6</td>
1181 <td>DEV_DCC0_DCC_CLKSRC6_CLK</td>
1182 <td>Input clock</td>
1183 </tr>
1184 <tr class="row-odd"><td>7</td>
1185 <td>DEV_DCC0_DCC_CLKSRC7_CLK</td>
1186 <td>Input clock</td>
1187 </tr>
1188 <tr class="row-even"><td>8</td>
1189 <td>DEV_DCC0_DCC_INPUT00_CLK</td>
1190 <td>Input clock</td>
1191 </tr>
1192 <tr class="row-odd"><td>9</td>
1193 <td>DEV_DCC0_DCC_INPUT01_CLK</td>
1194 <td>Input clock</td>
1195 </tr>
1196 <tr class="row-even"><td>10</td>
1197 <td>DEV_DCC0_DCC_INPUT02_CLK</td>
1198 <td>Input clock</td>
1199 </tr>
1200 <tr class="row-odd"><td>11</td>
1201 <td>DEV_DCC0_DCC_INPUT10_CLK</td>
1202 <td>Input clock</td>
1203 </tr>
1204 <tr class="row-even"><td>12</td>
1205 <td>DEV_DCC0_VBUS_CLK</td>
1206 <td>Input clock</td>
1207 </tr>
1208 </tbody>
1209 </table>
1210 </div>
1211 <div class="section" id="clocks-for-dcc1-device">
1212 <span id="soc-doc-am64x-public-clks-dcc1"></span><h3>Clocks for DCC1 Device<a class="headerlink" href="#clocks-for-dcc1-device" title="Permalink to this headline">¶</a></h3>
1213 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DCC1</span></a> (ID = 17)</p>
1214 <p>Following is a mapping of Clocks IDs to function:</p>
1215 <table border="1" class="docutils">
1216 <colgroup>
1217 <col width="24%" />
1218 <col width="51%" />
1219 <col width="25%" />
1220 </colgroup>
1221 <thead valign="bottom">
1222 <tr class="row-odd"><th class="head">Clock ID</th>
1223 <th class="head">Name</th>
1224 <th class="head">Function</th>
1225 </tr>
1226 </thead>
1227 <tbody valign="top">
1228 <tr class="row-even"><td>0</td>
1229 <td>DEV_DCC1_DCC_CLKSRC0_CLK</td>
1230 <td>Input clock</td>
1231 </tr>
1232 <tr class="row-odd"><td>1</td>
1233 <td>DEV_DCC1_DCC_CLKSRC1_CLK</td>
1234 <td>Input clock</td>
1235 </tr>
1236 <tr class="row-even"><td>2</td>
1237 <td>DEV_DCC1_DCC_CLKSRC2_CLK</td>
1238 <td>Input clock</td>
1239 </tr>
1240 <tr class="row-odd"><td>3</td>
1241 <td>DEV_DCC1_DCC_CLKSRC3_CLK</td>
1242 <td>Input clock</td>
1243 </tr>
1244 <tr class="row-even"><td>4</td>
1245 <td>DEV_DCC1_DCC_CLKSRC4_CLK</td>
1246 <td>Input clock</td>
1247 </tr>
1248 <tr class="row-odd"><td>5</td>
1249 <td>DEV_DCC1_DCC_CLKSRC5_CLK</td>
1250 <td>Input clock</td>
1251 </tr>
1252 <tr class="row-even"><td>6</td>
1253 <td>DEV_DCC1_DCC_CLKSRC6_CLK</td>
1254 <td>Input clock</td>
1255 </tr>
1256 <tr class="row-odd"><td>7</td>
1257 <td>DEV_DCC1_DCC_CLKSRC7_CLK</td>
1258 <td>Input clock</td>
1259 </tr>
1260 <tr class="row-even"><td>8</td>
1261 <td>DEV_DCC1_DCC_INPUT00_CLK</td>
1262 <td>Input clock</td>
1263 </tr>
1264 <tr class="row-odd"><td>9</td>
1265 <td>DEV_DCC1_DCC_INPUT01_CLK</td>
1266 <td>Input clock</td>
1267 </tr>
1268 <tr class="row-even"><td>10</td>
1269 <td>DEV_DCC1_DCC_INPUT02_CLK</td>
1270 <td>Input clock</td>
1271 </tr>
1272 <tr class="row-odd"><td>11</td>
1273 <td>DEV_DCC1_DCC_INPUT10_CLK</td>
1274 <td>Input clock</td>
1275 </tr>
1276 <tr class="row-even"><td>12</td>
1277 <td>DEV_DCC1_VBUS_CLK</td>
1278 <td>Input clock</td>
1279 </tr>
1280 </tbody>
1281 </table>
1282 </div>
1283 <div class="section" id="clocks-for-dcc2-device">
1284 <span id="soc-doc-am64x-public-clks-dcc2"></span><h3>Clocks for DCC2 Device<a class="headerlink" href="#clocks-for-dcc2-device" title="Permalink to this headline">¶</a></h3>
1285 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DCC2</span></a> (ID = 18)</p>
1286 <p>Following is a mapping of Clocks IDs to function:</p>
1287 <table border="1" class="docutils">
1288 <colgroup>
1289 <col width="24%" />
1290 <col width="51%" />
1291 <col width="25%" />
1292 </colgroup>
1293 <thead valign="bottom">
1294 <tr class="row-odd"><th class="head">Clock ID</th>
1295 <th class="head">Name</th>
1296 <th class="head">Function</th>
1297 </tr>
1298 </thead>
1299 <tbody valign="top">
1300 <tr class="row-even"><td>0</td>
1301 <td>DEV_DCC2_DCC_CLKSRC0_CLK</td>
1302 <td>Input clock</td>
1303 </tr>
1304 <tr class="row-odd"><td>1</td>
1305 <td>DEV_DCC2_DCC_CLKSRC1_CLK</td>
1306 <td>Input clock</td>
1307 </tr>
1308 <tr class="row-even"><td>2</td>
1309 <td>DEV_DCC2_DCC_CLKSRC2_CLK</td>
1310 <td>Input clock</td>
1311 </tr>
1312 <tr class="row-odd"><td>3</td>
1313 <td>DEV_DCC2_DCC_CLKSRC3_CLK</td>
1314 <td>Input clock</td>
1315 </tr>
1316 <tr class="row-even"><td>4</td>
1317 <td>DEV_DCC2_DCC_CLKSRC4_CLK</td>
1318 <td>Input clock</td>
1319 </tr>
1320 <tr class="row-odd"><td>5</td>
1321 <td>DEV_DCC2_DCC_CLKSRC5_CLK</td>
1322 <td>Input clock</td>
1323 </tr>
1324 <tr class="row-even"><td>6</td>
1325 <td>DEV_DCC2_DCC_CLKSRC6_CLK</td>
1326 <td>Input clock</td>
1327 </tr>
1328 <tr class="row-odd"><td>7</td>
1329 <td>DEV_DCC2_DCC_CLKSRC7_CLK</td>
1330 <td>Input clock</td>
1331 </tr>
1332 <tr class="row-even"><td>8</td>
1333 <td>DEV_DCC2_DCC_INPUT00_CLK</td>
1334 <td>Input clock</td>
1335 </tr>
1336 <tr class="row-odd"><td>9</td>
1337 <td>DEV_DCC2_DCC_INPUT01_CLK</td>
1338 <td>Input clock</td>
1339 </tr>
1340 <tr class="row-even"><td>10</td>
1341 <td>DEV_DCC2_DCC_INPUT02_CLK</td>
1342 <td>Input clock</td>
1343 </tr>
1344 <tr class="row-odd"><td>11</td>
1345 <td>DEV_DCC2_DCC_INPUT10_CLK</td>
1346 <td>Input clock</td>
1347 </tr>
1348 <tr class="row-even"><td>12</td>
1349 <td>DEV_DCC2_VBUS_CLK</td>
1350 <td>Input clock</td>
1351 </tr>
1352 </tbody>
1353 </table>
1354 </div>
1355 <div class="section" id="clocks-for-dcc3-device">
1356 <span id="soc-doc-am64x-public-clks-dcc3"></span><h3>Clocks for DCC3 Device<a class="headerlink" href="#clocks-for-dcc3-device" title="Permalink to this headline">¶</a></h3>
1357 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DCC3</span></a> (ID = 19)</p>
1358 <p>Following is a mapping of Clocks IDs to function:</p>
1359 <table border="1" class="docutils">
1360 <colgroup>
1361 <col width="24%" />
1362 <col width="51%" />
1363 <col width="25%" />
1364 </colgroup>
1365 <thead valign="bottom">
1366 <tr class="row-odd"><th class="head">Clock ID</th>
1367 <th class="head">Name</th>
1368 <th class="head">Function</th>
1369 </tr>
1370 </thead>
1371 <tbody valign="top">
1372 <tr class="row-even"><td>0</td>
1373 <td>DEV_DCC3_DCC_CLKSRC0_CLK</td>
1374 <td>Input clock</td>
1375 </tr>
1376 <tr class="row-odd"><td>1</td>
1377 <td>DEV_DCC3_DCC_CLKSRC1_CLK</td>
1378 <td>Input clock</td>
1379 </tr>
1380 <tr class="row-even"><td>2</td>
1381 <td>DEV_DCC3_DCC_CLKSRC2_CLK</td>
1382 <td>Input clock</td>
1383 </tr>
1384 <tr class="row-odd"><td>3</td>
1385 <td>DEV_DCC3_DCC_CLKSRC3_CLK</td>
1386 <td>Input clock</td>
1387 </tr>
1388 <tr class="row-even"><td>4</td>
1389 <td>DEV_DCC3_DCC_CLKSRC4_CLK</td>
1390 <td>Input clock</td>
1391 </tr>
1392 <tr class="row-odd"><td>5</td>
1393 <td>DEV_DCC3_DCC_CLKSRC5_CLK</td>
1394 <td>Input clock</td>
1395 </tr>
1396 <tr class="row-even"><td>6</td>
1397 <td>DEV_DCC3_DCC_CLKSRC6_CLK</td>
1398 <td>Input clock</td>
1399 </tr>
1400 <tr class="row-odd"><td>7</td>
1401 <td>DEV_DCC3_DCC_CLKSRC7_CLK</td>
1402 <td>Input clock</td>
1403 </tr>
1404 <tr class="row-even"><td>8</td>
1405 <td>DEV_DCC3_DCC_INPUT00_CLK</td>
1406 <td>Input clock</td>
1407 </tr>
1408 <tr class="row-odd"><td>9</td>
1409 <td>DEV_DCC3_DCC_INPUT01_CLK</td>
1410 <td>Input clock</td>
1411 </tr>
1412 <tr class="row-even"><td>10</td>
1413 <td>DEV_DCC3_DCC_INPUT02_CLK</td>
1414 <td>Input clock</td>
1415 </tr>
1416 <tr class="row-odd"><td>11</td>
1417 <td>DEV_DCC3_DCC_INPUT10_CLK</td>
1418 <td>Input clock</td>
1419 </tr>
1420 <tr class="row-even"><td>12</td>
1421 <td>DEV_DCC3_VBUS_CLK</td>
1422 <td>Input clock</td>
1423 </tr>
1424 </tbody>
1425 </table>
1426 </div>
1427 <div class="section" id="clocks-for-dcc4-device">
1428 <span id="soc-doc-am64x-public-clks-dcc4"></span><h3>Clocks for DCC4 Device<a class="headerlink" href="#clocks-for-dcc4-device" title="Permalink to this headline">¶</a></h3>
1429 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DCC4</span></a> (ID = 20)</p>
1430 <p>Following is a mapping of Clocks IDs to function:</p>
1431 <table border="1" class="docutils">
1432 <colgroup>
1433 <col width="9%" />
1434 <col width="50%" />
1435 <col width="41%" />
1436 </colgroup>
1437 <thead valign="bottom">
1438 <tr class="row-odd"><th class="head">Clock ID</th>
1439 <th class="head">Name</th>
1440 <th class="head">Function</th>
1441 </tr>
1442 </thead>
1443 <tbody valign="top">
1444 <tr class="row-even"><td>0</td>
1445 <td>DEV_DCC4_DCC_CLKSRC0_CLK</td>
1446 <td>Input muxed clock</td>
1447 </tr>
1448 <tr class="row-odd"><td>1</td>
1449 <td>DEV_DCC4_DCC_CLKSRC0_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT3_CLK</td>
1450 <td>Parent input clock option to DEV_DCC4_DCC_CLKSRC0_CLK</td>
1451 </tr>
1452 <tr class="row-even"><td>2</td>
1453 <td>DEV_DCC4_DCC_CLKSRC0_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT7_CLK</td>
1454 <td>Parent input clock option to DEV_DCC4_DCC_CLKSRC0_CLK</td>
1455 </tr>
1456 <tr class="row-odd"><td>3</td>
1457 <td>DEV_DCC4_DCC_CLKSRC1_CLK</td>
1458 <td>Input clock</td>
1459 </tr>
1460 <tr class="row-even"><td>4</td>
1461 <td>DEV_DCC4_DCC_CLKSRC2_CLK</td>
1462 <td>Input clock</td>
1463 </tr>
1464 <tr class="row-odd"><td>5</td>
1465 <td>DEV_DCC4_DCC_CLKSRC3_CLK</td>
1466 <td>Input clock</td>
1467 </tr>
1468 <tr class="row-even"><td>6</td>
1469 <td>DEV_DCC4_DCC_CLKSRC4_CLK</td>
1470 <td>Input clock</td>
1471 </tr>
1472 <tr class="row-odd"><td>7</td>
1473 <td>DEV_DCC4_DCC_CLKSRC5_CLK</td>
1474 <td>Input clock</td>
1475 </tr>
1476 <tr class="row-even"><td>8</td>
1477 <td>DEV_DCC4_DCC_CLKSRC6_CLK</td>
1478 <td>Input clock</td>
1479 </tr>
1480 <tr class="row-odd"><td>9</td>
1481 <td>DEV_DCC4_DCC_CLKSRC7_CLK</td>
1482 <td>Input clock</td>
1483 </tr>
1484 <tr class="row-even"><td>10</td>
1485 <td>DEV_DCC4_DCC_INPUT00_CLK</td>
1486 <td>Input clock</td>
1487 </tr>
1488 <tr class="row-odd"><td>11</td>
1489 <td>DEV_DCC4_DCC_INPUT01_CLK</td>
1490 <td>Input clock</td>
1491 </tr>
1492 <tr class="row-even"><td>12</td>
1493 <td>DEV_DCC4_DCC_INPUT02_CLK</td>
1494 <td>Input clock</td>
1495 </tr>
1496 <tr class="row-odd"><td>13</td>
1497 <td>DEV_DCC4_DCC_INPUT10_CLK</td>
1498 <td>Input clock</td>
1499 </tr>
1500 <tr class="row-even"><td>14</td>
1501 <td>DEV_DCC4_VBUS_CLK</td>
1502 <td>Input clock</td>
1503 </tr>
1504 </tbody>
1505 </table>
1506 </div>
1507 <div class="section" id="clocks-for-dcc5-device">
1508 <span id="soc-doc-am64x-public-clks-dcc5"></span><h3>Clocks for DCC5 Device<a class="headerlink" href="#clocks-for-dcc5-device" title="Permalink to this headline">¶</a></h3>
1509 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DCC5</span></a> (ID = 21)</p>
1510 <p>Following is a mapping of Clocks IDs to function:</p>
1511 <table border="1" class="docutils">
1512 <colgroup>
1513 <col width="24%" />
1514 <col width="51%" />
1515 <col width="25%" />
1516 </colgroup>
1517 <thead valign="bottom">
1518 <tr class="row-odd"><th class="head">Clock ID</th>
1519 <th class="head">Name</th>
1520 <th class="head">Function</th>
1521 </tr>
1522 </thead>
1523 <tbody valign="top">
1524 <tr class="row-even"><td>0</td>
1525 <td>DEV_DCC5_DCC_CLKSRC0_CLK</td>
1526 <td>Input clock</td>
1527 </tr>
1528 <tr class="row-odd"><td>1</td>
1529 <td>DEV_DCC5_DCC_CLKSRC1_CLK</td>
1530 <td>Input clock</td>
1531 </tr>
1532 <tr class="row-even"><td>2</td>
1533 <td>DEV_DCC5_DCC_CLKSRC2_CLK</td>
1534 <td>Input clock</td>
1535 </tr>
1536 <tr class="row-odd"><td>3</td>
1537 <td>DEV_DCC5_DCC_CLKSRC3_CLK</td>
1538 <td>Input clock</td>
1539 </tr>
1540 <tr class="row-even"><td>4</td>
1541 <td>DEV_DCC5_DCC_CLKSRC4_CLK</td>
1542 <td>Input clock</td>
1543 </tr>
1544 <tr class="row-odd"><td>5</td>
1545 <td>DEV_DCC5_DCC_CLKSRC5_CLK</td>
1546 <td>Input clock</td>
1547 </tr>
1548 <tr class="row-even"><td>6</td>
1549 <td>DEV_DCC5_DCC_CLKSRC6_CLK</td>
1550 <td>Input clock</td>
1551 </tr>
1552 <tr class="row-odd"><td>7</td>
1553 <td>DEV_DCC5_DCC_CLKSRC7_CLK</td>
1554 <td>Input clock</td>
1555 </tr>
1556 <tr class="row-even"><td>8</td>
1557 <td>DEV_DCC5_DCC_INPUT00_CLK</td>
1558 <td>Input clock</td>
1559 </tr>
1560 <tr class="row-odd"><td>9</td>
1561 <td>DEV_DCC5_DCC_INPUT01_CLK</td>
1562 <td>Input clock</td>
1563 </tr>
1564 <tr class="row-even"><td>10</td>
1565 <td>DEV_DCC5_DCC_INPUT02_CLK</td>
1566 <td>Input clock</td>
1567 </tr>
1568 <tr class="row-odd"><td>11</td>
1569 <td>DEV_DCC5_DCC_INPUT10_CLK</td>
1570 <td>Input clock</td>
1571 </tr>
1572 <tr class="row-even"><td>12</td>
1573 <td>DEV_DCC5_VBUS_CLK</td>
1574 <td>Input clock</td>
1575 </tr>
1576 </tbody>
1577 </table>
1578 </div>
1579 <div class="section" id="clocks-for-ddpa0-device">
1580 <span id="soc-doc-am64x-public-clks-ddpa0"></span><h3>Clocks for DDPA0 Device<a class="headerlink" href="#clocks-for-ddpa0-device" title="Permalink to this headline">¶</a></h3>
1581 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DDPA0</span></a> (ID = 85)</p>
1582 <p>Following is a mapping of Clocks IDs to function:</p>
1583 <table border="1" class="docutils">
1584 <colgroup>
1585 <col width="27%" />
1586 <col width="44%" />
1587 <col width="29%" />
1588 </colgroup>
1589 <thead valign="bottom">
1590 <tr class="row-odd"><th class="head">Clock ID</th>
1591 <th class="head">Name</th>
1592 <th class="head">Function</th>
1593 </tr>
1594 </thead>
1595 <tbody valign="top">
1596 <tr class="row-even"><td>0</td>
1597 <td>DEV_DDPA0_DDPA_CLK</td>
1598 <td>Input clock</td>
1599 </tr>
1600 </tbody>
1601 </table>
1602 </div>
1603 <div class="section" id="clocks-for-ddr16ss0-device">
1604 <span id="soc-doc-am64x-public-clks-ddr16ss0"></span><h3>Clocks for DDR16SS0 Device<a class="headerlink" href="#clocks-for-ddr16ss0-device" title="Permalink to this headline">¶</a></h3>
1605 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DDR16SS0</span></a> (ID = 138)</p>
1606 <p>Following is a mapping of Clocks IDs to function:</p>
1607 <table border="1" class="docutils">
1608 <colgroup>
1609 <col width="21%" />
1610 <col width="56%" />
1611 <col width="23%" />
1612 </colgroup>
1613 <thead valign="bottom">
1614 <tr class="row-odd"><th class="head">Clock ID</th>
1615 <th class="head">Name</th>
1616 <th class="head">Function</th>
1617 </tr>
1618 </thead>
1619 <tbody valign="top">
1620 <tr class="row-even"><td>0</td>
1621 <td>DEV_DDR16SS0_DDRSS_DDR_PLL_CLK</td>
1622 <td>Input clock</td>
1623 </tr>
1624 <tr class="row-odd"><td>1</td>
1625 <td>DEV_DDR16SS0_PLL_CTRL_CLK</td>
1626 <td>Input clock</td>
1627 </tr>
1628 </tbody>
1629 </table>
1630 </div>
1631 <div class="section" id="clocks-for-debugss-wrap0-device">
1632 <span id="soc-doc-am64x-public-clks-debugss-wrap0"></span><h3>Clocks for DEBUGSS_WRAP0 Device<a class="headerlink" href="#clocks-for-debugss-wrap0-device" title="Permalink to this headline">¶</a></h3>
1633 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DEBUGSS_WRAP0</span></a> (ID = 24)</p>
1634 <p>Following is a mapping of Clocks IDs to function:</p>
1635 <table border="1" class="docutils">
1636 <colgroup>
1637 <col width="22%" />
1638 <col width="55%" />
1639 <col width="24%" />
1640 </colgroup>
1641 <thead valign="bottom">
1642 <tr class="row-odd"><th class="head">Clock ID</th>
1643 <th class="head">Name</th>
1644 <th class="head">Function</th>
1645 </tr>
1646 </thead>
1647 <tbody valign="top">
1648 <tr class="row-even"><td>0</td>
1649 <td>DEV_DEBUGSS_WRAP0_ATB_CLK</td>
1650 <td>Input clock</td>
1651 </tr>
1652 <tr class="row-odd"><td>1</td>
1653 <td>DEV_DEBUGSS_WRAP0_CORE_CLK</td>
1654 <td>Input clock</td>
1655 </tr>
1656 <tr class="row-even"><td>2</td>
1657 <td>DEV_DEBUGSS_WRAP0_JTAG_TCK</td>
1658 <td>Input clock</td>
1659 </tr>
1660 <tr class="row-odd"><td>3</td>
1661 <td>DEV_DEBUGSS_WRAP0_TREXPT_CLK</td>
1662 <td>Input clock</td>
1663 </tr>
1664 </tbody>
1665 </table>
1666 </div>
1667 <div class="section" id="clocks-for-dmass0-device">
1668 <span id="soc-doc-am64x-public-clks-dmass0"></span><h3>Clocks for DMASS0 Device<a class="headerlink" href="#clocks-for-dmass0-device" title="Permalink to this headline">¶</a></h3>
1669 <p><strong>This device has no defined clocks.</strong></p>
1670 </div>
1671 <div class="section" id="clocks-for-dmass0-bcdma-0-device">
1672 <span id="soc-doc-am64x-public-clks-dmass0-bcdma-0"></span><h3>Clocks for DMASS0_BCDMA_0 Device<a class="headerlink" href="#clocks-for-dmass0-bcdma-0-device" title="Permalink to this headline">¶</a></h3>
1673 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DMASS0_BCDMA_0</span></a> (ID = 26)</p>
1674 <p>Following is a mapping of Clocks IDs to function:</p>
1675 <table border="1" class="docutils">
1676 <colgroup>
1677 <col width="24%" />
1678 <col width="49%" />
1679 <col width="27%" />
1680 </colgroup>
1681 <thead valign="bottom">
1682 <tr class="row-odd"><th class="head">Clock ID</th>
1683 <th class="head">Name</th>
1684 <th class="head">Function</th>
1685 </tr>
1686 </thead>
1687 <tbody valign="top">
1688 <tr class="row-even"><td>0</td>
1689 <td>DEV_DMASS0_BCDMA_0_CLK</td>
1690 <td>Input clock</td>
1691 </tr>
1692 </tbody>
1693 </table>
1694 </div>
1695 <div class="section" id="clocks-for-dmass0-cbass-0-device">
1696 <span id="soc-doc-am64x-public-clks-dmass0-cbass-0"></span><h3>Clocks for DMASS0_CBASS_0 Device<a class="headerlink" href="#clocks-for-dmass0-cbass-0-device" title="Permalink to this headline">¶</a></h3>
1697 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DMASS0_CBASS_0</span></a> (ID = 27)</p>
1698 <p>Following is a mapping of Clocks IDs to function:</p>
1699 <table border="1" class="docutils">
1700 <colgroup>
1701 <col width="24%" />
1702 <col width="49%" />
1703 <col width="27%" />
1704 </colgroup>
1705 <thead valign="bottom">
1706 <tr class="row-odd"><th class="head">Clock ID</th>
1707 <th class="head">Name</th>
1708 <th class="head">Function</th>
1709 </tr>
1710 </thead>
1711 <tbody valign="top">
1712 <tr class="row-even"><td>0</td>
1713 <td>DEV_DMASS0_CBASS_0_CLK</td>
1714 <td>Input clock</td>
1715 </tr>
1716 </tbody>
1717 </table>
1718 </div>
1719 <div class="section" id="clocks-for-dmass0-intaggr-0-device">
1720 <span id="soc-doc-am64x-public-clks-dmass0-intaggr-0"></span><h3>Clocks for DMASS0_INTAGGR_0 Device<a class="headerlink" href="#clocks-for-dmass0-intaggr-0-device" title="Permalink to this headline">¶</a></h3>
1721 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DMASS0_INTAGGR_0</span></a> (ID = 28)</p>
1722 <p>Following is a mapping of Clocks IDs to function:</p>
1723 <table border="1" class="docutils">
1724 <colgroup>
1725 <col width="24%" />
1726 <col width="51%" />
1727 <col width="25%" />
1728 </colgroup>
1729 <thead valign="bottom">
1730 <tr class="row-odd"><th class="head">Clock ID</th>
1731 <th class="head">Name</th>
1732 <th class="head">Function</th>
1733 </tr>
1734 </thead>
1735 <tbody valign="top">
1736 <tr class="row-even"><td>0</td>
1737 <td>DEV_DMASS0_INTAGGR_0_CLK</td>
1738 <td>Input clock</td>
1739 </tr>
1740 </tbody>
1741 </table>
1742 </div>
1743 <div class="section" id="clocks-for-dmass0-ipcss-0-device">
1744 <span id="soc-doc-am64x-public-clks-dmass0-ipcss-0"></span><h3>Clocks for DMASS0_IPCSS_0 Device<a class="headerlink" href="#clocks-for-dmass0-ipcss-0-device" title="Permalink to this headline">¶</a></h3>
1745 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DMASS0_IPCSS_0</span></a> (ID = 29)</p>
1746 <p>Following is a mapping of Clocks IDs to function:</p>
1747 <table border="1" class="docutils">
1748 <colgroup>
1749 <col width="24%" />
1750 <col width="49%" />
1751 <col width="27%" />
1752 </colgroup>
1753 <thead valign="bottom">
1754 <tr class="row-odd"><th class="head">Clock ID</th>
1755 <th class="head">Name</th>
1756 <th class="head">Function</th>
1757 </tr>
1758 </thead>
1759 <tbody valign="top">
1760 <tr class="row-even"><td>0</td>
1761 <td>DEV_DMASS0_IPCSS_0_CLK</td>
1762 <td>Input clock</td>
1763 </tr>
1764 </tbody>
1765 </table>
1766 </div>
1767 <div class="section" id="clocks-for-dmass0-pktdma-0-device">
1768 <span id="soc-doc-am64x-public-clks-dmass0-pktdma-0"></span><h3>Clocks for DMASS0_PKTDMA_0 Device<a class="headerlink" href="#clocks-for-dmass0-pktdma-0-device" title="Permalink to this headline">¶</a></h3>
1769 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DMASS0_PKTDMA_0</span></a> (ID = 30)</p>
1770 <p>Following is a mapping of Clocks IDs to function:</p>
1771 <table border="1" class="docutils">
1772 <colgroup>
1773 <col width="24%" />
1774 <col width="50%" />
1775 <col width="26%" />
1776 </colgroup>
1777 <thead valign="bottom">
1778 <tr class="row-odd"><th class="head">Clock ID</th>
1779 <th class="head">Name</th>
1780 <th class="head">Function</th>
1781 </tr>
1782 </thead>
1783 <tbody valign="top">
1784 <tr class="row-even"><td>0</td>
1785 <td>DEV_DMASS0_PKTDMA_0_CLK</td>
1786 <td>Input clock</td>
1787 </tr>
1788 </tbody>
1789 </table>
1790 </div>
1791 <div class="section" id="clocks-for-dmass0-ringacc-0-device">
1792 <span id="soc-doc-am64x-public-clks-dmass0-ringacc-0"></span><h3>Clocks for DMASS0_RINGACC_0 Device<a class="headerlink" href="#clocks-for-dmass0-ringacc-0-device" title="Permalink to this headline">¶</a></h3>
1793 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_DMASS0_RINGACC_0</span></a> (ID = 33)</p>
1794 <p>Following is a mapping of Clocks IDs to function:</p>
1795 <table border="1" class="docutils">
1796 <colgroup>
1797 <col width="24%" />
1798 <col width="51%" />
1799 <col width="25%" />
1800 </colgroup>
1801 <thead valign="bottom">
1802 <tr class="row-odd"><th class="head">Clock ID</th>
1803 <th class="head">Name</th>
1804 <th class="head">Function</th>
1805 </tr>
1806 </thead>
1807 <tbody valign="top">
1808 <tr class="row-even"><td>0</td>
1809 <td>DEV_DMASS0_RINGACC_0_CLK</td>
1810 <td>Input clock</td>
1811 </tr>
1812 </tbody>
1813 </table>
1814 </div>
1815 <div class="section" id="clocks-for-dmsc0-device">
1816 <span id="soc-doc-am64x-public-clks-dmsc0"></span><h3>Clocks for DMSC0 Device<a class="headerlink" href="#clocks-for-dmsc0-device" title="Permalink to this headline">¶</a></h3>
1817 <p><strong>This device has no defined clocks.</strong></p>
1818 </div>
1819 <div class="section" id="clocks-for-ecap0-device">
1820 <span id="soc-doc-am64x-public-clks-ecap0"></span><h3>Clocks for ECAP0 Device<a class="headerlink" href="#clocks-for-ecap0-device" title="Permalink to this headline">¶</a></h3>
1821 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_ECAP0</span></a> (ID = 51)</p>
1822 <p>Following is a mapping of Clocks IDs to function:</p>
1823 <table border="1" class="docutils">
1824 <colgroup>
1825 <col width="27%" />
1826 <col width="44%" />
1827 <col width="29%" />
1828 </colgroup>
1829 <thead valign="bottom">
1830 <tr class="row-odd"><th class="head">Clock ID</th>
1831 <th class="head">Name</th>
1832 <th class="head">Function</th>
1833 </tr>
1834 </thead>
1835 <tbody valign="top">
1836 <tr class="row-even"><td>0</td>
1837 <td>DEV_ECAP0_VBUS_CLK</td>
1838 <td>Input clock</td>
1839 </tr>
1840 </tbody>
1841 </table>
1842 </div>
1843 <div class="section" id="clocks-for-ecap1-device">
1844 <span id="soc-doc-am64x-public-clks-ecap1"></span><h3>Clocks for ECAP1 Device<a class="headerlink" href="#clocks-for-ecap1-device" title="Permalink to this headline">¶</a></h3>
1845 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_ECAP1</span></a> (ID = 52)</p>
1846 <p>Following is a mapping of Clocks IDs to function:</p>
1847 <table border="1" class="docutils">
1848 <colgroup>
1849 <col width="27%" />
1850 <col width="44%" />
1851 <col width="29%" />
1852 </colgroup>
1853 <thead valign="bottom">
1854 <tr class="row-odd"><th class="head">Clock ID</th>
1855 <th class="head">Name</th>
1856 <th class="head">Function</th>
1857 </tr>
1858 </thead>
1859 <tbody valign="top">
1860 <tr class="row-even"><td>0</td>
1861 <td>DEV_ECAP1_VBUS_CLK</td>
1862 <td>Input clock</td>
1863 </tr>
1864 </tbody>
1865 </table>
1866 </div>
1867 <div class="section" id="clocks-for-ecap2-device">
1868 <span id="soc-doc-am64x-public-clks-ecap2"></span><h3>Clocks for ECAP2 Device<a class="headerlink" href="#clocks-for-ecap2-device" title="Permalink to this headline">¶</a></h3>
1869 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_ECAP2</span></a> (ID = 53)</p>
1870 <p>Following is a mapping of Clocks IDs to function:</p>
1871 <table border="1" class="docutils">
1872 <colgroup>
1873 <col width="27%" />
1874 <col width="44%" />
1875 <col width="29%" />
1876 </colgroup>
1877 <thead valign="bottom">
1878 <tr class="row-odd"><th class="head">Clock ID</th>
1879 <th class="head">Name</th>
1880 <th class="head">Function</th>
1881 </tr>
1882 </thead>
1883 <tbody valign="top">
1884 <tr class="row-even"><td>0</td>
1885 <td>DEV_ECAP2_VBUS_CLK</td>
1886 <td>Input clock</td>
1887 </tr>
1888 </tbody>
1889 </table>
1890 </div>
1891 <div class="section" id="clocks-for-elm0-device">
1892 <span id="soc-doc-am64x-public-clks-elm0"></span><h3>Clocks for ELM0 Device<a class="headerlink" href="#clocks-for-elm0-device" title="Permalink to this headline">¶</a></h3>
1893 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_ELM0</span></a> (ID = 54)</p>
1894 <p>Following is a mapping of Clocks IDs to function:</p>
1895 <table border="1" class="docutils">
1896 <colgroup>
1897 <col width="27%" />
1898 <col width="44%" />
1899 <col width="29%" />
1900 </colgroup>
1901 <thead valign="bottom">
1902 <tr class="row-odd"><th class="head">Clock ID</th>
1903 <th class="head">Name</th>
1904 <th class="head">Function</th>
1905 </tr>
1906 </thead>
1907 <tbody valign="top">
1908 <tr class="row-even"><td>0</td>
1909 <td>DEV_ELM0_VBUSP_CLK</td>
1910 <td>Input clock</td>
1911 </tr>
1912 </tbody>
1913 </table>
1914 </div>
1915 <div class="section" id="clocks-for-emif-data-0-vd-device">
1916 <span id="soc-doc-am64x-public-clks-emif-data-0-vd"></span><h3>Clocks for EMIF_DATA_0_VD Device<a class="headerlink" href="#clocks-for-emif-data-0-vd-device" title="Permalink to this headline">¶</a></h3>
1917 <p><strong>This device has no defined clocks.</strong></p>
1918 </div>
1919 <div class="section" id="clocks-for-epwm0-device">
1920 <span id="soc-doc-am64x-public-clks-epwm0"></span><h3>Clocks for EPWM0 Device<a class="headerlink" href="#clocks-for-epwm0-device" title="Permalink to this headline">¶</a></h3>
1921 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM0</span></a> (ID = 86)</p>
1922 <p>Following is a mapping of Clocks IDs to function:</p>
1923 <table border="1" class="docutils">
1924 <colgroup>
1925 <col width="26%" />
1926 <col width="46%" />
1927 <col width="28%" />
1928 </colgroup>
1929 <thead valign="bottom">
1930 <tr class="row-odd"><th class="head">Clock ID</th>
1931 <th class="head">Name</th>
1932 <th class="head">Function</th>
1933 </tr>
1934 </thead>
1935 <tbody valign="top">
1936 <tr class="row-even"><td>0</td>
1937 <td>DEV_EPWM0_VBUSP_CLK</td>
1938 <td>Input clock</td>
1939 </tr>
1940 </tbody>
1941 </table>
1942 </div>
1943 <div class="section" id="clocks-for-epwm1-device">
1944 <span id="soc-doc-am64x-public-clks-epwm1"></span><h3>Clocks for EPWM1 Device<a class="headerlink" href="#clocks-for-epwm1-device" title="Permalink to this headline">¶</a></h3>
1945 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM1</span></a> (ID = 87)</p>
1946 <p>Following is a mapping of Clocks IDs to function:</p>
1947 <table border="1" class="docutils">
1948 <colgroup>
1949 <col width="26%" />
1950 <col width="46%" />
1951 <col width="28%" />
1952 </colgroup>
1953 <thead valign="bottom">
1954 <tr class="row-odd"><th class="head">Clock ID</th>
1955 <th class="head">Name</th>
1956 <th class="head">Function</th>
1957 </tr>
1958 </thead>
1959 <tbody valign="top">
1960 <tr class="row-even"><td>0</td>
1961 <td>DEV_EPWM1_VBUSP_CLK</td>
1962 <td>Input clock</td>
1963 </tr>
1964 </tbody>
1965 </table>
1966 </div>
1967 <div class="section" id="clocks-for-epwm2-device">
1968 <span id="soc-doc-am64x-public-clks-epwm2"></span><h3>Clocks for EPWM2 Device<a class="headerlink" href="#clocks-for-epwm2-device" title="Permalink to this headline">¶</a></h3>
1969 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM2</span></a> (ID = 88)</p>
1970 <p>Following is a mapping of Clocks IDs to function:</p>
1971 <table border="1" class="docutils">
1972 <colgroup>
1973 <col width="26%" />
1974 <col width="46%" />
1975 <col width="28%" />
1976 </colgroup>
1977 <thead valign="bottom">
1978 <tr class="row-odd"><th class="head">Clock ID</th>
1979 <th class="head">Name</th>
1980 <th class="head">Function</th>
1981 </tr>
1982 </thead>
1983 <tbody valign="top">
1984 <tr class="row-even"><td>0</td>
1985 <td>DEV_EPWM2_VBUSP_CLK</td>
1986 <td>Input clock</td>
1987 </tr>
1988 </tbody>
1989 </table>
1990 </div>
1991 <div class="section" id="clocks-for-epwm3-device">
1992 <span id="soc-doc-am64x-public-clks-epwm3"></span><h3>Clocks for EPWM3 Device<a class="headerlink" href="#clocks-for-epwm3-device" title="Permalink to this headline">¶</a></h3>
1993 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM3</span></a> (ID = 89)</p>
1994 <p>Following is a mapping of Clocks IDs to function:</p>
1995 <table border="1" class="docutils">
1996 <colgroup>
1997 <col width="26%" />
1998 <col width="46%" />
1999 <col width="28%" />
2000 </colgroup>
2001 <thead valign="bottom">
2002 <tr class="row-odd"><th class="head">Clock ID</th>
2003 <th class="head">Name</th>
2004 <th class="head">Function</th>
2005 </tr>
2006 </thead>
2007 <tbody valign="top">
2008 <tr class="row-even"><td>0</td>
2009 <td>DEV_EPWM3_VBUSP_CLK</td>
2010 <td>Input clock</td>
2011 </tr>
2012 </tbody>
2013 </table>
2014 </div>
2015 <div class="section" id="clocks-for-epwm4-device">
2016 <span id="soc-doc-am64x-public-clks-epwm4"></span><h3>Clocks for EPWM4 Device<a class="headerlink" href="#clocks-for-epwm4-device" title="Permalink to this headline">¶</a></h3>
2017 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM4</span></a> (ID = 90)</p>
2018 <p>Following is a mapping of Clocks IDs to function:</p>
2019 <table border="1" class="docutils">
2020 <colgroup>
2021 <col width="26%" />
2022 <col width="46%" />
2023 <col width="28%" />
2024 </colgroup>
2025 <thead valign="bottom">
2026 <tr class="row-odd"><th class="head">Clock ID</th>
2027 <th class="head">Name</th>
2028 <th class="head">Function</th>
2029 </tr>
2030 </thead>
2031 <tbody valign="top">
2032 <tr class="row-even"><td>0</td>
2033 <td>DEV_EPWM4_VBUSP_CLK</td>
2034 <td>Input clock</td>
2035 </tr>
2036 </tbody>
2037 </table>
2038 </div>
2039 <div class="section" id="clocks-for-epwm5-device">
2040 <span id="soc-doc-am64x-public-clks-epwm5"></span><h3>Clocks for EPWM5 Device<a class="headerlink" href="#clocks-for-epwm5-device" title="Permalink to this headline">¶</a></h3>
2041 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM5</span></a> (ID = 91)</p>
2042 <p>Following is a mapping of Clocks IDs to function:</p>
2043 <table border="1" class="docutils">
2044 <colgroup>
2045 <col width="26%" />
2046 <col width="46%" />
2047 <col width="28%" />
2048 </colgroup>
2049 <thead valign="bottom">
2050 <tr class="row-odd"><th class="head">Clock ID</th>
2051 <th class="head">Name</th>
2052 <th class="head">Function</th>
2053 </tr>
2054 </thead>
2055 <tbody valign="top">
2056 <tr class="row-even"><td>0</td>
2057 <td>DEV_EPWM5_VBUSP_CLK</td>
2058 <td>Input clock</td>
2059 </tr>
2060 </tbody>
2061 </table>
2062 </div>
2063 <div class="section" id="clocks-for-epwm6-device">
2064 <span id="soc-doc-am64x-public-clks-epwm6"></span><h3>Clocks for EPWM6 Device<a class="headerlink" href="#clocks-for-epwm6-device" title="Permalink to this headline">¶</a></h3>
2065 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM6</span></a> (ID = 92)</p>
2066 <p>Following is a mapping of Clocks IDs to function:</p>
2067 <table border="1" class="docutils">
2068 <colgroup>
2069 <col width="26%" />
2070 <col width="46%" />
2071 <col width="28%" />
2072 </colgroup>
2073 <thead valign="bottom">
2074 <tr class="row-odd"><th class="head">Clock ID</th>
2075 <th class="head">Name</th>
2076 <th class="head">Function</th>
2077 </tr>
2078 </thead>
2079 <tbody valign="top">
2080 <tr class="row-even"><td>0</td>
2081 <td>DEV_EPWM6_VBUSP_CLK</td>
2082 <td>Input clock</td>
2083 </tr>
2084 </tbody>
2085 </table>
2086 </div>
2087 <div class="section" id="clocks-for-epwm7-device">
2088 <span id="soc-doc-am64x-public-clks-epwm7"></span><h3>Clocks for EPWM7 Device<a class="headerlink" href="#clocks-for-epwm7-device" title="Permalink to this headline">¶</a></h3>
2089 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM7</span></a> (ID = 93)</p>
2090 <p>Following is a mapping of Clocks IDs to function:</p>
2091 <table border="1" class="docutils">
2092 <colgroup>
2093 <col width="26%" />
2094 <col width="46%" />
2095 <col width="28%" />
2096 </colgroup>
2097 <thead valign="bottom">
2098 <tr class="row-odd"><th class="head">Clock ID</th>
2099 <th class="head">Name</th>
2100 <th class="head">Function</th>
2101 </tr>
2102 </thead>
2103 <tbody valign="top">
2104 <tr class="row-even"><td>0</td>
2105 <td>DEV_EPWM7_VBUSP_CLK</td>
2106 <td>Input clock</td>
2107 </tr>
2108 </tbody>
2109 </table>
2110 </div>
2111 <div class="section" id="clocks-for-epwm8-device">
2112 <span id="soc-doc-am64x-public-clks-epwm8"></span><h3>Clocks for EPWM8 Device<a class="headerlink" href="#clocks-for-epwm8-device" title="Permalink to this headline">¶</a></h3>
2113 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EPWM8</span></a> (ID = 94)</p>
2114 <p>Following is a mapping of Clocks IDs to function:</p>
2115 <table border="1" class="docutils">
2116 <colgroup>
2117 <col width="26%" />
2118 <col width="46%" />
2119 <col width="28%" />
2120 </colgroup>
2121 <thead valign="bottom">
2122 <tr class="row-odd"><th class="head">Clock ID</th>
2123 <th class="head">Name</th>
2124 <th class="head">Function</th>
2125 </tr>
2126 </thead>
2127 <tbody valign="top">
2128 <tr class="row-even"><td>0</td>
2129 <td>DEV_EPWM8_VBUSP_CLK</td>
2130 <td>Input clock</td>
2131 </tr>
2132 </tbody>
2133 </table>
2134 </div>
2135 <div class="section" id="clocks-for-eqep0-device">
2136 <span id="soc-doc-am64x-public-clks-eqep0"></span><h3>Clocks for EQEP0 Device<a class="headerlink" href="#clocks-for-eqep0-device" title="Permalink to this headline">¶</a></h3>
2137 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EQEP0</span></a> (ID = 59)</p>
2138 <p>Following is a mapping of Clocks IDs to function:</p>
2139 <table border="1" class="docutils">
2140 <colgroup>
2141 <col width="27%" />
2142 <col width="44%" />
2143 <col width="29%" />
2144 </colgroup>
2145 <thead valign="bottom">
2146 <tr class="row-odd"><th class="head">Clock ID</th>
2147 <th class="head">Name</th>
2148 <th class="head">Function</th>
2149 </tr>
2150 </thead>
2151 <tbody valign="top">
2152 <tr class="row-even"><td>0</td>
2153 <td>DEV_EQEP0_VBUS_CLK</td>
2154 <td>Input clock</td>
2155 </tr>
2156 </tbody>
2157 </table>
2158 </div>
2159 <div class="section" id="clocks-for-eqep1-device">
2160 <span id="soc-doc-am64x-public-clks-eqep1"></span><h3>Clocks for EQEP1 Device<a class="headerlink" href="#clocks-for-eqep1-device" title="Permalink to this headline">¶</a></h3>
2161 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EQEP1</span></a> (ID = 60)</p>
2162 <p>Following is a mapping of Clocks IDs to function:</p>
2163 <table border="1" class="docutils">
2164 <colgroup>
2165 <col width="27%" />
2166 <col width="44%" />
2167 <col width="29%" />
2168 </colgroup>
2169 <thead valign="bottom">
2170 <tr class="row-odd"><th class="head">Clock ID</th>
2171 <th class="head">Name</th>
2172 <th class="head">Function</th>
2173 </tr>
2174 </thead>
2175 <tbody valign="top">
2176 <tr class="row-even"><td>0</td>
2177 <td>DEV_EQEP1_VBUS_CLK</td>
2178 <td>Input clock</td>
2179 </tr>
2180 </tbody>
2181 </table>
2182 </div>
2183 <div class="section" id="clocks-for-eqep2-device">
2184 <span id="soc-doc-am64x-public-clks-eqep2"></span><h3>Clocks for EQEP2 Device<a class="headerlink" href="#clocks-for-eqep2-device" title="Permalink to this headline">¶</a></h3>
2185 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_EQEP2</span></a> (ID = 62)</p>
2186 <p>Following is a mapping of Clocks IDs to function:</p>
2187 <table border="1" class="docutils">
2188 <colgroup>
2189 <col width="27%" />
2190 <col width="44%" />
2191 <col width="29%" />
2192 </colgroup>
2193 <thead valign="bottom">
2194 <tr class="row-odd"><th class="head">Clock ID</th>
2195 <th class="head">Name</th>
2196 <th class="head">Function</th>
2197 </tr>
2198 </thead>
2199 <tbody valign="top">
2200 <tr class="row-even"><td>0</td>
2201 <td>DEV_EQEP2_VBUS_CLK</td>
2202 <td>Input clock</td>
2203 </tr>
2204 </tbody>
2205 </table>
2206 </div>
2207 <div class="section" id="clocks-for-esm0-device">
2208 <span id="soc-doc-am64x-public-clks-esm0"></span><h3>Clocks for ESM0 Device<a class="headerlink" href="#clocks-for-esm0-device" title="Permalink to this headline">¶</a></h3>
2209 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_ESM0</span></a> (ID = 63)</p>
2210 <p>Following is a mapping of Clocks IDs to function:</p>
2211 <table border="1" class="docutils">
2212 <colgroup>
2213 <col width="31%" />
2214 <col width="36%" />
2215 <col width="33%" />
2216 </colgroup>
2217 <thead valign="bottom">
2218 <tr class="row-odd"><th class="head">Clock ID</th>
2219 <th class="head">Name</th>
2220 <th class="head">Function</th>
2221 </tr>
2222 </thead>
2223 <tbody valign="top">
2224 <tr class="row-even"><td>0</td>
2225 <td>DEV_ESM0_CLK</td>
2226 <td>Input clock</td>
2227 </tr>
2228 </tbody>
2229 </table>
2230 </div>
2231 <div class="section" id="clocks-for-fsirx0-device">
2232 <span id="soc-doc-am64x-public-clks-fsirx0"></span><h3>Clocks for FSIRX0 Device<a class="headerlink" href="#clocks-for-fsirx0-device" title="Permalink to this headline">¶</a></h3>
2233 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSIRX0</span></a> (ID = 65)</p>
2234 <p>Following is a mapping of Clocks IDs to function:</p>
2235 <table border="1" class="docutils">
2236 <colgroup>
2237 <col width="23%" />
2238 <col width="53%" />
2239 <col width="25%" />
2240 </colgroup>
2241 <thead valign="bottom">
2242 <tr class="row-odd"><th class="head">Clock ID</th>
2243 <th class="head">Name</th>
2244 <th class="head">Function</th>
2245 </tr>
2246 </thead>
2247 <tbody valign="top">
2248 <tr class="row-even"><td>0</td>
2249 <td>DEV_FSIRX0_FSI_RX_CK</td>
2250 <td>Input clock</td>
2251 </tr>
2252 <tr class="row-odd"><td>1</td>
2253 <td>DEV_FSIRX0_FSI_RX_LPBK_CK</td>
2254 <td>Input clock</td>
2255 </tr>
2256 <tr class="row-even"><td>2</td>
2257 <td>DEV_FSIRX0_FSI_RX_VBUS_CLK</td>
2258 <td>Input clock</td>
2259 </tr>
2260 </tbody>
2261 </table>
2262 </div>
2263 <div class="section" id="clocks-for-fsirx1-device">
2264 <span id="soc-doc-am64x-public-clks-fsirx1"></span><h3>Clocks for FSIRX1 Device<a class="headerlink" href="#clocks-for-fsirx1-device" title="Permalink to this headline">¶</a></h3>
2265 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSIRX1</span></a> (ID = 66)</p>
2266 <p>Following is a mapping of Clocks IDs to function:</p>
2267 <table border="1" class="docutils">
2268 <colgroup>
2269 <col width="23%" />
2270 <col width="53%" />
2271 <col width="25%" />
2272 </colgroup>
2273 <thead valign="bottom">
2274 <tr class="row-odd"><th class="head">Clock ID</th>
2275 <th class="head">Name</th>
2276 <th class="head">Function</th>
2277 </tr>
2278 </thead>
2279 <tbody valign="top">
2280 <tr class="row-even"><td>0</td>
2281 <td>DEV_FSIRX1_FSI_RX_CK</td>
2282 <td>Input clock</td>
2283 </tr>
2284 <tr class="row-odd"><td>1</td>
2285 <td>DEV_FSIRX1_FSI_RX_LPBK_CK</td>
2286 <td>Input clock</td>
2287 </tr>
2288 <tr class="row-even"><td>2</td>
2289 <td>DEV_FSIRX1_FSI_RX_VBUS_CLK</td>
2290 <td>Input clock</td>
2291 </tr>
2292 </tbody>
2293 </table>
2294 </div>
2295 <div class="section" id="clocks-for-fsirx2-device">
2296 <span id="soc-doc-am64x-public-clks-fsirx2"></span><h3>Clocks for FSIRX2 Device<a class="headerlink" href="#clocks-for-fsirx2-device" title="Permalink to this headline">¶</a></h3>
2297 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSIRX2</span></a> (ID = 67)</p>
2298 <p>Following is a mapping of Clocks IDs to function:</p>
2299 <table border="1" class="docutils">
2300 <colgroup>
2301 <col width="23%" />
2302 <col width="53%" />
2303 <col width="25%" />
2304 </colgroup>
2305 <thead valign="bottom">
2306 <tr class="row-odd"><th class="head">Clock ID</th>
2307 <th class="head">Name</th>
2308 <th class="head">Function</th>
2309 </tr>
2310 </thead>
2311 <tbody valign="top">
2312 <tr class="row-even"><td>0</td>
2313 <td>DEV_FSIRX2_FSI_RX_CK</td>
2314 <td>Input clock</td>
2315 </tr>
2316 <tr class="row-odd"><td>1</td>
2317 <td>DEV_FSIRX2_FSI_RX_LPBK_CK</td>
2318 <td>Input clock</td>
2319 </tr>
2320 <tr class="row-even"><td>2</td>
2321 <td>DEV_FSIRX2_FSI_RX_VBUS_CLK</td>
2322 <td>Input clock</td>
2323 </tr>
2324 </tbody>
2325 </table>
2326 </div>
2327 <div class="section" id="clocks-for-fsirx3-device">
2328 <span id="soc-doc-am64x-public-clks-fsirx3"></span><h3>Clocks for FSIRX3 Device<a class="headerlink" href="#clocks-for-fsirx3-device" title="Permalink to this headline">¶</a></h3>
2329 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSIRX3</span></a> (ID = 68)</p>
2330 <p>Following is a mapping of Clocks IDs to function:</p>
2331 <table border="1" class="docutils">
2332 <colgroup>
2333 <col width="23%" />
2334 <col width="53%" />
2335 <col width="25%" />
2336 </colgroup>
2337 <thead valign="bottom">
2338 <tr class="row-odd"><th class="head">Clock ID</th>
2339 <th class="head">Name</th>
2340 <th class="head">Function</th>
2341 </tr>
2342 </thead>
2343 <tbody valign="top">
2344 <tr class="row-even"><td>0</td>
2345 <td>DEV_FSIRX3_FSI_RX_CK</td>
2346 <td>Input clock</td>
2347 </tr>
2348 <tr class="row-odd"><td>1</td>
2349 <td>DEV_FSIRX3_FSI_RX_LPBK_CK</td>
2350 <td>Input clock</td>
2351 </tr>
2352 <tr class="row-even"><td>2</td>
2353 <td>DEV_FSIRX3_FSI_RX_VBUS_CLK</td>
2354 <td>Input clock</td>
2355 </tr>
2356 </tbody>
2357 </table>
2358 </div>
2359 <div class="section" id="clocks-for-fsirx4-device">
2360 <span id="soc-doc-am64x-public-clks-fsirx4"></span><h3>Clocks for FSIRX4 Device<a class="headerlink" href="#clocks-for-fsirx4-device" title="Permalink to this headline">¶</a></h3>
2361 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSIRX4</span></a> (ID = 69)</p>
2362 <p>Following is a mapping of Clocks IDs to function:</p>
2363 <table border="1" class="docutils">
2364 <colgroup>
2365 <col width="23%" />
2366 <col width="53%" />
2367 <col width="25%" />
2368 </colgroup>
2369 <thead valign="bottom">
2370 <tr class="row-odd"><th class="head">Clock ID</th>
2371 <th class="head">Name</th>
2372 <th class="head">Function</th>
2373 </tr>
2374 </thead>
2375 <tbody valign="top">
2376 <tr class="row-even"><td>0</td>
2377 <td>DEV_FSIRX4_FSI_RX_CK</td>
2378 <td>Input clock</td>
2379 </tr>
2380 <tr class="row-odd"><td>1</td>
2381 <td>DEV_FSIRX4_FSI_RX_LPBK_CK</td>
2382 <td>Input clock</td>
2383 </tr>
2384 <tr class="row-even"><td>2</td>
2385 <td>DEV_FSIRX4_FSI_RX_VBUS_CLK</td>
2386 <td>Input clock</td>
2387 </tr>
2388 </tbody>
2389 </table>
2390 </div>
2391 <div class="section" id="clocks-for-fsirx5-device">
2392 <span id="soc-doc-am64x-public-clks-fsirx5"></span><h3>Clocks for FSIRX5 Device<a class="headerlink" href="#clocks-for-fsirx5-device" title="Permalink to this headline">¶</a></h3>
2393 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSIRX5</span></a> (ID = 70)</p>
2394 <p>Following is a mapping of Clocks IDs to function:</p>
2395 <table border="1" class="docutils">
2396 <colgroup>
2397 <col width="23%" />
2398 <col width="53%" />
2399 <col width="25%" />
2400 </colgroup>
2401 <thead valign="bottom">
2402 <tr class="row-odd"><th class="head">Clock ID</th>
2403 <th class="head">Name</th>
2404 <th class="head">Function</th>
2405 </tr>
2406 </thead>
2407 <tbody valign="top">
2408 <tr class="row-even"><td>0</td>
2409 <td>DEV_FSIRX5_FSI_RX_CK</td>
2410 <td>Input clock</td>
2411 </tr>
2412 <tr class="row-odd"><td>1</td>
2413 <td>DEV_FSIRX5_FSI_RX_LPBK_CK</td>
2414 <td>Input clock</td>
2415 </tr>
2416 <tr class="row-even"><td>2</td>
2417 <td>DEV_FSIRX5_FSI_RX_VBUS_CLK</td>
2418 <td>Input clock</td>
2419 </tr>
2420 </tbody>
2421 </table>
2422 </div>
2423 <div class="section" id="clocks-for-fsitx0-device">
2424 <span id="soc-doc-am64x-public-clks-fsitx0"></span><h3>Clocks for FSITX0 Device<a class="headerlink" href="#clocks-for-fsitx0-device" title="Permalink to this headline">¶</a></h3>
2425 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSITX0</span></a> (ID = 71)</p>
2426 <p>Following is a mapping of Clocks IDs to function:</p>
2427 <table border="1" class="docutils">
2428 <colgroup>
2429 <col width="22%" />
2430 <col width="52%" />
2431 <col width="26%" />
2432 </colgroup>
2433 <thead valign="bottom">
2434 <tr class="row-odd"><th class="head">Clock ID</th>
2435 <th class="head">Name</th>
2436 <th class="head">Function</th>
2437 </tr>
2438 </thead>
2439 <tbody valign="top">
2440 <tr class="row-even"><td>0</td>
2441 <td>DEV_FSITX0_FSI_TX_PLL_CLK</td>
2442 <td>Input clock</td>
2443 </tr>
2444 <tr class="row-odd"><td>1</td>
2445 <td>DEV_FSITX0_FSI_TX_VBUS_CLK</td>
2446 <td>Input clock</td>
2447 </tr>
2448 <tr class="row-even"><td>2</td>
2449 <td>DEV_FSITX0_FSI_TX_CK</td>
2450 <td>Output clock</td>
2451 </tr>
2452 </tbody>
2453 </table>
2454 </div>
2455 <div class="section" id="clocks-for-fsitx1-device">
2456 <span id="soc-doc-am64x-public-clks-fsitx1"></span><h3>Clocks for FSITX1 Device<a class="headerlink" href="#clocks-for-fsitx1-device" title="Permalink to this headline">¶</a></h3>
2457 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSITX1</span></a> (ID = 72)</p>
2458 <p>Following is a mapping of Clocks IDs to function:</p>
2459 <table border="1" class="docutils">
2460 <colgroup>
2461 <col width="22%" />
2462 <col width="52%" />
2463 <col width="26%" />
2464 </colgroup>
2465 <thead valign="bottom">
2466 <tr class="row-odd"><th class="head">Clock ID</th>
2467 <th class="head">Name</th>
2468 <th class="head">Function</th>
2469 </tr>
2470 </thead>
2471 <tbody valign="top">
2472 <tr class="row-even"><td>0</td>
2473 <td>DEV_FSITX1_FSI_TX_PLL_CLK</td>
2474 <td>Input clock</td>
2475 </tr>
2476 <tr class="row-odd"><td>1</td>
2477 <td>DEV_FSITX1_FSI_TX_VBUS_CLK</td>
2478 <td>Input clock</td>
2479 </tr>
2480 <tr class="row-even"><td>2</td>
2481 <td>DEV_FSITX1_FSI_TX_CK</td>
2482 <td>Output clock</td>
2483 </tr>
2484 </tbody>
2485 </table>
2486 </div>
2487 <div class="section" id="clocks-for-fss0-device">
2488 <span id="soc-doc-am64x-public-clks-fss0"></span><h3>Clocks for FSS0 Device<a class="headerlink" href="#clocks-for-fss0-device" title="Permalink to this headline">¶</a></h3>
2489 <p><strong>This device has no defined clocks.</strong></p>
2490 </div>
2491 <div class="section" id="clocks-for-fss0-fsas-0-device">
2492 <span id="soc-doc-am64x-public-clks-fss0-fsas-0"></span><h3>Clocks for FSS0_FSAS_0 Device<a class="headerlink" href="#clocks-for-fss0-fsas-0-device" title="Permalink to this headline">¶</a></h3>
2493 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSS0_FSAS_0</span></a> (ID = 74)</p>
2494 <p>Following is a mapping of Clocks IDs to function:</p>
2495 <table border="1" class="docutils">
2496 <colgroup>
2497 <col width="26%" />
2498 <col width="47%" />
2499 <col width="28%" />
2500 </colgroup>
2501 <thead valign="bottom">
2502 <tr class="row-odd"><th class="head">Clock ID</th>
2503 <th class="head">Name</th>
2504 <th class="head">Function</th>
2505 </tr>
2506 </thead>
2507 <tbody valign="top">
2508 <tr class="row-even"><td>0</td>
2509 <td>DEV_FSS0_FSAS_0_GCLK</td>
2510 <td>Input clock</td>
2511 </tr>
2512 </tbody>
2513 </table>
2514 </div>
2515 <div class="section" id="clocks-for-fss0-ospi-0-device">
2516 <span id="soc-doc-am64x-public-clks-fss0-ospi-0"></span><h3>Clocks for FSS0_OSPI_0 Device<a class="headerlink" href="#clocks-for-fss0-ospi-0-device" title="Permalink to this headline">¶</a></h3>
2517 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_FSS0_OSPI_0</span></a> (ID = 75)</p>
2518 <p>Following is a mapping of Clocks IDs to function:</p>
2519 <table border="1" class="docutils">
2520 <colgroup>
2521 <col width="8%" />
2522 <col width="51%" />
2523 <col width="41%" />
2524 </colgroup>
2525 <thead valign="bottom">
2526 <tr class="row-odd"><th class="head">Clock ID</th>
2527 <th class="head">Name</th>
2528 <th class="head">Function</th>
2529 </tr>
2530 </thead>
2531 <tbody valign="top">
2532 <tr class="row-even"><td>0</td>
2533 <td>DEV_FSS0_OSPI_0_OSPI_DQS_CLK</td>
2534 <td>Input clock</td>
2535 </tr>
2536 <tr class="row-odd"><td>1</td>
2537 <td>DEV_FSS0_OSPI_0_OSPI_HCLK_CLK</td>
2538 <td>Input clock</td>
2539 </tr>
2540 <tr class="row-even"><td>2</td>
2541 <td>DEV_FSS0_OSPI_0_OSPI_ICLK_CLK</td>
2542 <td>Input muxed clock</td>
2543 </tr>
2544 <tr class="row-odd"><td>3</td>
2545 <td>DEV_FSS0_OSPI_0_OSPI_ICLK_CLK_PARENT_BOARD_0_OSPI0_DQS_OUT</td>
2546 <td>Parent input clock option to DEV_FSS0_OSPI_0_OSPI_ICLK_CLK</td>
2547 </tr>
2548 <tr class="row-even"><td>4</td>
2549 <td>DEV_FSS0_OSPI_0_OSPI_ICLK_CLK_PARENT_BOARD_0_OSPI0_LBCLKO_OUT</td>
2550 <td>Parent input clock option to DEV_FSS0_OSPI_0_OSPI_ICLK_CLK</td>
2551 </tr>
2552 <tr class="row-odd"><td>5</td>
2553 <td>DEV_FSS0_OSPI_0_OSPI_PCLK_CLK</td>
2554 <td>Input clock</td>
2555 </tr>
2556 <tr class="row-even"><td>6</td>
2557 <td>DEV_FSS0_OSPI_0_OSPI_RCLK_CLK</td>
2558 <td>Input muxed clock</td>
2559 </tr>
2560 <tr class="row-odd"><td>7</td>
2561 <td>DEV_FSS0_OSPI_0_OSPI_RCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT1_CLK</td>
2562 <td>Parent input clock option to DEV_FSS0_OSPI_0_OSPI_RCLK_CLK</td>
2563 </tr>
2564 <tr class="row-even"><td>8</td>
2565 <td>DEV_FSS0_OSPI_0_OSPI_RCLK_CLK_PARENT_POSTDIV1_16FFT_MAIN_1_HSDIVOUT5_CLK</td>
2566 <td>Parent input clock option to DEV_FSS0_OSPI_0_OSPI_RCLK_CLK</td>
2567 </tr>
2568 <tr class="row-odd"><td>9</td>
2569 <td>DEV_FSS0_OSPI_0_OSPI_OCLK_CLK</td>
2570 <td>Output clock</td>
2571 </tr>
2572 </tbody>
2573 </table>
2574 </div>
2575 <div class="section" id="clocks-for-gicss0-device">
2576 <span id="soc-doc-am64x-public-clks-gicss0"></span><h3>Clocks for GICSS0 Device<a class="headerlink" href="#clocks-for-gicss0-device" title="Permalink to this headline">¶</a></h3>
2577 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_GICSS0</span></a> (ID = 76)</p>
2578 <p>Following is a mapping of Clocks IDs to function:</p>
2579 <table border="1" class="docutils">
2580 <colgroup>
2581 <col width="26%" />
2582 <col width="46%" />
2583 <col width="28%" />
2584 </colgroup>
2585 <thead valign="bottom">
2586 <tr class="row-odd"><th class="head">Clock ID</th>
2587 <th class="head">Name</th>
2588 <th class="head">Function</th>
2589 </tr>
2590 </thead>
2591 <tbody valign="top">
2592 <tr class="row-even"><td>0</td>
2593 <td>DEV_GICSS0_VCLK_CLK</td>
2594 <td>Input clock</td>
2595 </tr>
2596 </tbody>
2597 </table>
2598 </div>
2599 <div class="section" id="clocks-for-gpio0-device">
2600 <span id="soc-doc-am64x-public-clks-gpio0"></span><h3>Clocks for GPIO0 Device<a class="headerlink" href="#clocks-for-gpio0-device" title="Permalink to this headline">¶</a></h3>
2601 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_GPIO0</span></a> (ID = 77)</p>
2602 <p>Following is a mapping of Clocks IDs to function:</p>
2603 <table border="1" class="docutils">
2604 <colgroup>
2605 <col width="27%" />
2606 <col width="43%" />
2607 <col width="30%" />
2608 </colgroup>
2609 <thead valign="bottom">
2610 <tr class="row-odd"><th class="head">Clock ID</th>
2611 <th class="head">Name</th>
2612 <th class="head">Function</th>
2613 </tr>
2614 </thead>
2615 <tbody valign="top">
2616 <tr class="row-even"><td>0</td>
2617 <td>DEV_GPIO0_MMR_CLK</td>
2618 <td>Input clock</td>
2619 </tr>
2620 </tbody>
2621 </table>
2622 </div>
2623 <div class="section" id="clocks-for-gpio1-device">
2624 <span id="soc-doc-am64x-public-clks-gpio1"></span><h3>Clocks for GPIO1 Device<a class="headerlink" href="#clocks-for-gpio1-device" title="Permalink to this headline">¶</a></h3>
2625 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_GPIO1</span></a> (ID = 78)</p>
2626 <p>Following is a mapping of Clocks IDs to function:</p>
2627 <table border="1" class="docutils">
2628 <colgroup>
2629 <col width="27%" />
2630 <col width="43%" />
2631 <col width="30%" />
2632 </colgroup>
2633 <thead valign="bottom">
2634 <tr class="row-odd"><th class="head">Clock ID</th>
2635 <th class="head">Name</th>
2636 <th class="head">Function</th>
2637 </tr>
2638 </thead>
2639 <tbody valign="top">
2640 <tr class="row-even"><td>0</td>
2641 <td>DEV_GPIO1_MMR_CLK</td>
2642 <td>Input clock</td>
2643 </tr>
2644 </tbody>
2645 </table>
2646 </div>
2647 <div class="section" id="clocks-for-gpmc0-device">
2648 <span id="soc-doc-am64x-public-clks-gpmc0"></span><h3>Clocks for GPMC0 Device<a class="headerlink" href="#clocks-for-gpmc0-device" title="Permalink to this headline">¶</a></h3>
2649 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_GPMC0</span></a> (ID = 80)</p>
2650 <p>Following is a mapping of Clocks IDs to function:</p>
2651 <table border="1" class="docutils">
2652 <colgroup>
2653 <col width="10%" />
2654 <col width="50%" />
2655 <col width="40%" />
2656 </colgroup>
2657 <thead valign="bottom">
2658 <tr class="row-odd"><th class="head">Clock ID</th>
2659 <th class="head">Name</th>
2660 <th class="head">Function</th>
2661 </tr>
2662 </thead>
2663 <tbody valign="top">
2664 <tr class="row-even"><td>0</td>
2665 <td>DEV_GPMC0_FUNC_CLK</td>
2666 <td>Input muxed clock</td>
2667 </tr>
2668 <tr class="row-odd"><td>1</td>
2669 <td>DEV_GPMC0_FUNC_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT3_CLK</td>
2670 <td>Parent input clock option to DEV_GPMC0_FUNC_CLK</td>
2671 </tr>
2672 <tr class="row-even"><td>2</td>
2673 <td>DEV_GPMC0_FUNC_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT7_CLK</td>
2674 <td>Parent input clock option to DEV_GPMC0_FUNC_CLK</td>
2675 </tr>
2676 <tr class="row-odd"><td>3</td>
2677 <td>DEV_GPMC0_PI_GPMC_RET_CLK</td>
2678 <td>Input clock</td>
2679 </tr>
2680 <tr class="row-even"><td>4</td>
2681 <td>DEV_GPMC0_VBUSM_CLK</td>
2682 <td>Input clock</td>
2683 </tr>
2684 <tr class="row-odd"><td>5</td>
2685 <td>DEV_GPMC0_PO_GPMC_DEV_CLK</td>
2686 <td>Output clock</td>
2687 </tr>
2688 </tbody>
2689 </table>
2690 </div>
2691 <div class="section" id="clocks-for-gtc0-device">
2692 <span id="soc-doc-am64x-public-clks-gtc0"></span><h3>Clocks for GTC0 Device<a class="headerlink" href="#clocks-for-gtc0-device" title="Permalink to this headline">¶</a></h3>
2693 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_GTC0</span></a> (ID = 61)</p>
2694 <p>Following is a mapping of Clocks IDs to function:</p>
2695 <table border="1" class="docutils">
2696 <colgroup>
2697 <col width="10%" />
2698 <col width="53%" />
2699 <col width="37%" />
2700 </colgroup>
2701 <thead valign="bottom">
2702 <tr class="row-odd"><th class="head">Clock ID</th>
2703 <th class="head">Name</th>
2704 <th class="head">Function</th>
2705 </tr>
2706 </thead>
2707 <tbody valign="top">
2708 <tr class="row-even"><td>0</td>
2709 <td>DEV_GTC0_GTC_CLK</td>
2710 <td>Input muxed clock</td>
2711 </tr>
2712 <tr class="row-odd"><td>1</td>
2713 <td>DEV_GTC0_GTC_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT5_CLK</td>
2714 <td>Parent input clock option to DEV_GTC0_GTC_CLK</td>
2715 </tr>
2716 <tr class="row-even"><td>2</td>
2717 <td>DEV_GTC0_GTC_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK</td>
2718 <td>Parent input clock option to DEV_GTC0_GTC_CLK</td>
2719 </tr>
2720 <tr class="row-odd"><td>3</td>
2721 <td>DEV_GTC0_GTC_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
2722 <td>Parent input clock option to DEV_GTC0_GTC_CLK</td>
2723 </tr>
2724 <tr class="row-even"><td>4</td>
2725 <td>DEV_GTC0_GTC_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
2726 <td>Parent input clock option to DEV_GTC0_GTC_CLK</td>
2727 </tr>
2728 <tr class="row-odd"><td>5</td>
2729 <td>DEV_GTC0_GTC_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
2730 <td>Parent input clock option to DEV_GTC0_GTC_CLK</td>
2731 </tr>
2732 <tr class="row-even"><td>6</td>
2733 <td>DEV_GTC0_GTC_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
2734 <td>Parent input clock option to DEV_GTC0_GTC_CLK</td>
2735 </tr>
2736 <tr class="row-odd"><td>7</td>
2737 <td>DEV_GTC0_GTC_CLK_PARENT_WIZ16B2M4CT_MAIN_0_IP1_LN0_TXMCLK</td>
2738 <td>Parent input clock option to DEV_GTC0_GTC_CLK</td>
2739 </tr>
2740 <tr class="row-even"><td>8</td>
2741 <td>DEV_GTC0_GTC_CLK_PARENT_K3_PLL_CTRL_WRAP_MAIN_0_CHIP_DIV1_CLK_CLK</td>
2742 <td>Parent input clock option to DEV_GTC0_GTC_CLK</td>
2743 </tr>
2744 <tr class="row-odd"><td>9</td>
2745 <td>DEV_GTC0_VBUSP_CLK</td>
2746 <td>Input clock</td>
2747 </tr>
2748 </tbody>
2749 </table>
2750 </div>
2751 <div class="section" id="clocks-for-i2c0-device">
2752 <span id="soc-doc-am64x-public-clks-i2c0"></span><h3>Clocks for I2C0 Device<a class="headerlink" href="#clocks-for-i2c0-device" title="Permalink to this headline">¶</a></h3>
2753 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_I2C0</span></a> (ID = 102)</p>
2754 <p>Following is a mapping of Clocks IDs to function:</p>
2755 <table border="1" class="docutils">
2756 <colgroup>
2757 <col width="26%" />
2758 <col width="43%" />
2759 <col width="30%" />
2760 </colgroup>
2761 <thead valign="bottom">
2762 <tr class="row-odd"><th class="head">Clock ID</th>
2763 <th class="head">Name</th>
2764 <th class="head">Function</th>
2765 </tr>
2766 </thead>
2767 <tbody valign="top">
2768 <tr class="row-even"><td>0</td>
2769 <td>DEV_I2C0_CLK</td>
2770 <td>Input clock</td>
2771 </tr>
2772 <tr class="row-odd"><td>1</td>
2773 <td>DEV_I2C0_PISCL</td>
2774 <td>Input clock</td>
2775 </tr>
2776 <tr class="row-even"><td>2</td>
2777 <td>DEV_I2C0_PISYS_CLK</td>
2778 <td>Input clock</td>
2779 </tr>
2780 <tr class="row-odd"><td>3</td>
2781 <td>DEV_I2C0_PORSCL</td>
2782 <td>Output clock</td>
2783 </tr>
2784 </tbody>
2785 </table>
2786 </div>
2787 <div class="section" id="clocks-for-i2c1-device">
2788 <span id="soc-doc-am64x-public-clks-i2c1"></span><h3>Clocks for I2C1 Device<a class="headerlink" href="#clocks-for-i2c1-device" title="Permalink to this headline">¶</a></h3>
2789 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_I2C1</span></a> (ID = 103)</p>
2790 <p>Following is a mapping of Clocks IDs to function:</p>
2791 <table border="1" class="docutils">
2792 <colgroup>
2793 <col width="26%" />
2794 <col width="43%" />
2795 <col width="30%" />
2796 </colgroup>
2797 <thead valign="bottom">
2798 <tr class="row-odd"><th class="head">Clock ID</th>
2799 <th class="head">Name</th>
2800 <th class="head">Function</th>
2801 </tr>
2802 </thead>
2803 <tbody valign="top">
2804 <tr class="row-even"><td>0</td>
2805 <td>DEV_I2C1_CLK</td>
2806 <td>Input clock</td>
2807 </tr>
2808 <tr class="row-odd"><td>1</td>
2809 <td>DEV_I2C1_PISCL</td>
2810 <td>Input clock</td>
2811 </tr>
2812 <tr class="row-even"><td>2</td>
2813 <td>DEV_I2C1_PISYS_CLK</td>
2814 <td>Input clock</td>
2815 </tr>
2816 <tr class="row-odd"><td>3</td>
2817 <td>DEV_I2C1_PORSCL</td>
2818 <td>Output clock</td>
2819 </tr>
2820 </tbody>
2821 </table>
2822 </div>
2823 <div class="section" id="clocks-for-i2c2-device">
2824 <span id="soc-doc-am64x-public-clks-i2c2"></span><h3>Clocks for I2C2 Device<a class="headerlink" href="#clocks-for-i2c2-device" title="Permalink to this headline">¶</a></h3>
2825 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_I2C2</span></a> (ID = 104)</p>
2826 <p>Following is a mapping of Clocks IDs to function:</p>
2827 <table border="1" class="docutils">
2828 <colgroup>
2829 <col width="26%" />
2830 <col width="43%" />
2831 <col width="30%" />
2832 </colgroup>
2833 <thead valign="bottom">
2834 <tr class="row-odd"><th class="head">Clock ID</th>
2835 <th class="head">Name</th>
2836 <th class="head">Function</th>
2837 </tr>
2838 </thead>
2839 <tbody valign="top">
2840 <tr class="row-even"><td>0</td>
2841 <td>DEV_I2C2_CLK</td>
2842 <td>Input clock</td>
2843 </tr>
2844 <tr class="row-odd"><td>1</td>
2845 <td>DEV_I2C2_PISCL</td>
2846 <td>Input clock</td>
2847 </tr>
2848 <tr class="row-even"><td>2</td>
2849 <td>DEV_I2C2_PISYS_CLK</td>
2850 <td>Input clock</td>
2851 </tr>
2852 <tr class="row-odd"><td>3</td>
2853 <td>DEV_I2C2_PORSCL</td>
2854 <td>Output clock</td>
2855 </tr>
2856 </tbody>
2857 </table>
2858 </div>
2859 <div class="section" id="clocks-for-i2c3-device">
2860 <span id="soc-doc-am64x-public-clks-i2c3"></span><h3>Clocks for I2C3 Device<a class="headerlink" href="#clocks-for-i2c3-device" title="Permalink to this headline">¶</a></h3>
2861 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_I2C3</span></a> (ID = 105)</p>
2862 <p>Following is a mapping of Clocks IDs to function:</p>
2863 <table border="1" class="docutils">
2864 <colgroup>
2865 <col width="26%" />
2866 <col width="43%" />
2867 <col width="30%" />
2868 </colgroup>
2869 <thead valign="bottom">
2870 <tr class="row-odd"><th class="head">Clock ID</th>
2871 <th class="head">Name</th>
2872 <th class="head">Function</th>
2873 </tr>
2874 </thead>
2875 <tbody valign="top">
2876 <tr class="row-even"><td>0</td>
2877 <td>DEV_I2C3_CLK</td>
2878 <td>Input clock</td>
2879 </tr>
2880 <tr class="row-odd"><td>1</td>
2881 <td>DEV_I2C3_PISCL</td>
2882 <td>Input clock</td>
2883 </tr>
2884 <tr class="row-even"><td>2</td>
2885 <td>DEV_I2C3_PISYS_CLK</td>
2886 <td>Input clock</td>
2887 </tr>
2888 <tr class="row-odd"><td>3</td>
2889 <td>DEV_I2C3_PORSCL</td>
2890 <td>Output clock</td>
2891 </tr>
2892 </tbody>
2893 </table>
2894 </div>
2895 <div class="section" id="clocks-for-led0-device">
2896 <span id="soc-doc-am64x-public-clks-led0"></span><h3>Clocks for LED0 Device<a class="headerlink" href="#clocks-for-led0-device" title="Permalink to this headline">¶</a></h3>
2897 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_LED0</span></a> (ID = 83)</p>
2898 <p>Following is a mapping of Clocks IDs to function:</p>
2899 <table border="1" class="docutils">
2900 <colgroup>
2901 <col width="27%" />
2902 <col width="44%" />
2903 <col width="29%" />
2904 </colgroup>
2905 <thead valign="bottom">
2906 <tr class="row-odd"><th class="head">Clock ID</th>
2907 <th class="head">Name</th>
2908 <th class="head">Function</th>
2909 </tr>
2910 </thead>
2911 <tbody valign="top">
2912 <tr class="row-even"><td>0</td>
2913 <td>DEV_LED0_LED_CLK</td>
2914 <td>Input clock</td>
2915 </tr>
2916 <tr class="row-odd"><td>1</td>
2917 <td>DEV_LED0_VBUSP_CLK</td>
2918 <td>Input clock</td>
2919 </tr>
2920 </tbody>
2921 </table>
2922 </div>
2923 <div class="section" id="clocks-for-mailbox0-device">
2924 <span id="soc-doc-am64x-public-clks-mailbox0"></span><h3>Clocks for MAILBOX0 Device<a class="headerlink" href="#clocks-for-mailbox0-device" title="Permalink to this headline">¶</a></h3>
2925 <p><strong>This device has no defined clocks.</strong></p>
2926 </div>
2927 <div class="section" id="clocks-for-main2mcu-vd-device">
2928 <span id="soc-doc-am64x-public-clks-main2mcu-vd"></span><h3>Clocks for MAIN2MCU_VD Device<a class="headerlink" href="#clocks-for-main2mcu-vd-device" title="Permalink to this headline">¶</a></h3>
2929 <p><strong>This device has no defined clocks.</strong></p>
2930 </div>
2931 <div class="section" id="clocks-for-main-gpiomux-introuter0-device">
2932 <span id="soc-doc-am64x-public-clks-main-gpiomux-introuter0"></span><h3>Clocks for MAIN_GPIOMUX_INTROUTER0 Device<a class="headerlink" href="#clocks-for-main-gpiomux-introuter0-device" title="Permalink to this headline">¶</a></h3>
2933 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MAIN_GPIOMUX_INTROUTER0</span></a> (ID = 3)</p>
2934 <p>Following is a mapping of Clocks IDs to function:</p>
2935 <table border="1" class="docutils">
2936 <colgroup>
2937 <col width="19%" />
2938 <col width="60%" />
2939 <col width="21%" />
2940 </colgroup>
2941 <thead valign="bottom">
2942 <tr class="row-odd"><th class="head">Clock ID</th>
2943 <th class="head">Name</th>
2944 <th class="head">Function</th>
2945 </tr>
2946 </thead>
2947 <tbody valign="top">
2948 <tr class="row-even"><td>0</td>
2949 <td>DEV_MAIN_GPIOMUX_INTROUTER0_INTR_CLK</td>
2950 <td>Input clock</td>
2951 </tr>
2952 </tbody>
2953 </table>
2954 </div>
2955 <div class="section" id="clocks-for-mcan0-device">
2956 <span id="soc-doc-am64x-public-clks-mcan0"></span><h3>Clocks for MCAN0 Device<a class="headerlink" href="#clocks-for-mcan0-device" title="Permalink to this headline">¶</a></h3>
2957 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCAN0</span></a> (ID = 98)</p>
2958 <p>Following is a mapping of Clocks IDs to function:</p>
2959 <table border="1" class="docutils">
2960 <colgroup>
2961 <col width="9%" />
2962 <col width="50%" />
2963 <col width="41%" />
2964 </colgroup>
2965 <thead valign="bottom">
2966 <tr class="row-odd"><th class="head">Clock ID</th>
2967 <th class="head">Name</th>
2968 <th class="head">Function</th>
2969 </tr>
2970 </thead>
2971 <tbody valign="top">
2972 <tr class="row-even"><td>0</td>
2973 <td>DEV_MCAN0_MCANSS_CCLK_CLK</td>
2974 <td>Input muxed clock</td>
2975 </tr>
2976 <tr class="row-odd"><td>1</td>
2977 <td>DEV_MCAN0_MCANSS_CCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT2_CLK</td>
2978 <td>Parent input clock option to DEV_MCAN0_MCANSS_CCLK_CLK</td>
2979 </tr>
2980 <tr class="row-even"><td>2</td>
2981 <td>DEV_MCAN0_MCANSS_CCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
2982 <td>Parent input clock option to DEV_MCAN0_MCANSS_CCLK_CLK</td>
2983 </tr>
2984 <tr class="row-odd"><td>3</td>
2985 <td>DEV_MCAN0_MCANSS_CCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
2986 <td>Parent input clock option to DEV_MCAN0_MCANSS_CCLK_CLK</td>
2987 </tr>
2988 <tr class="row-even"><td>4</td>
2989 <td>DEV_MCAN0_MCANSS_CCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
2990 <td>Parent input clock option to DEV_MCAN0_MCANSS_CCLK_CLK</td>
2991 </tr>
2992 <tr class="row-odd"><td>5</td>
2993 <td>DEV_MCAN0_MCANSS_HCLK_CLK</td>
2994 <td>Input clock</td>
2995 </tr>
2996 </tbody>
2997 </table>
2998 </div>
2999 <div class="section" id="clocks-for-mcan1-device">
3000 <span id="soc-doc-am64x-public-clks-mcan1"></span><h3>Clocks for MCAN1 Device<a class="headerlink" href="#clocks-for-mcan1-device" title="Permalink to this headline">¶</a></h3>
3001 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCAN1</span></a> (ID = 99)</p>
3002 <p>Following is a mapping of Clocks IDs to function:</p>
3003 <table border="1" class="docutils">
3004 <colgroup>
3005 <col width="9%" />
3006 <col width="50%" />
3007 <col width="41%" />
3008 </colgroup>
3009 <thead valign="bottom">
3010 <tr class="row-odd"><th class="head">Clock ID</th>
3011 <th class="head">Name</th>
3012 <th class="head">Function</th>
3013 </tr>
3014 </thead>
3015 <tbody valign="top">
3016 <tr class="row-even"><td>0</td>
3017 <td>DEV_MCAN1_MCANSS_CCLK_CLK</td>
3018 <td>Input muxed clock</td>
3019 </tr>
3020 <tr class="row-odd"><td>1</td>
3021 <td>DEV_MCAN1_MCANSS_CCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT2_CLK</td>
3022 <td>Parent input clock option to DEV_MCAN1_MCANSS_CCLK_CLK</td>
3023 </tr>
3024 <tr class="row-even"><td>2</td>
3025 <td>DEV_MCAN1_MCANSS_CCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
3026 <td>Parent input clock option to DEV_MCAN1_MCANSS_CCLK_CLK</td>
3027 </tr>
3028 <tr class="row-odd"><td>3</td>
3029 <td>DEV_MCAN1_MCANSS_CCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
3030 <td>Parent input clock option to DEV_MCAN1_MCANSS_CCLK_CLK</td>
3031 </tr>
3032 <tr class="row-even"><td>4</td>
3033 <td>DEV_MCAN1_MCANSS_CCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
3034 <td>Parent input clock option to DEV_MCAN1_MCANSS_CCLK_CLK</td>
3035 </tr>
3036 <tr class="row-odd"><td>5</td>
3037 <td>DEV_MCAN1_MCANSS_HCLK_CLK</td>
3038 <td>Input clock</td>
3039 </tr>
3040 </tbody>
3041 </table>
3042 </div>
3043 <div class="section" id="clocks-for-mcspi0-device">
3044 <span id="soc-doc-am64x-public-clks-mcspi0"></span><h3>Clocks for MCSPI0 Device<a class="headerlink" href="#clocks-for-mcspi0-device" title="Permalink to this headline">¶</a></h3>
3045 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCSPI0</span></a> (ID = 141)</p>
3046 <p>Following is a mapping of Clocks IDs to function:</p>
3047 <table border="1" class="docutils">
3048 <colgroup>
3049 <col width="9%" />
3050 <col width="47%" />
3051 <col width="44%" />
3052 </colgroup>
3053 <thead valign="bottom">
3054 <tr class="row-odd"><th class="head">Clock ID</th>
3055 <th class="head">Name</th>
3056 <th class="head">Function</th>
3057 </tr>
3058 </thead>
3059 <tbody valign="top">
3060 <tr class="row-even"><td>0</td>
3061 <td>DEV_MCSPI0_CLKSPIREF_CLK</td>
3062 <td>Input clock</td>
3063 </tr>
3064 <tr class="row-odd"><td>1</td>
3065 <td>DEV_MCSPI0_IO_CLKSPII_CLK</td>
3066 <td>Input muxed clock</td>
3067 </tr>
3068 <tr class="row-even"><td>2</td>
3069 <td>DEV_MCSPI0_IO_CLKSPII_CLK_PARENT_BOARD_0_SPI0_CLK_OUT</td>
3070 <td>Parent input clock option to DEV_MCSPI0_IO_CLKSPII_CLK</td>
3071 </tr>
3072 <tr class="row-odd"><td>3</td>
3073 <td>DEV_MCSPI0_IO_CLKSPII_CLK_PARENT_SPI_MAIN_0_IO_CLKSPIO_CLK</td>
3074 <td>Parent input clock option to DEV_MCSPI0_IO_CLKSPII_CLK</td>
3075 </tr>
3076 <tr class="row-even"><td>4</td>
3077 <td>DEV_MCSPI0_VBUSP_CLK</td>
3078 <td>Input clock</td>
3079 </tr>
3080 <tr class="row-odd"><td>5</td>
3081 <td>DEV_MCSPI0_IO_CLKSPIO_CLK</td>
3082 <td>Output clock</td>
3083 </tr>
3084 </tbody>
3085 </table>
3086 </div>
3087 <div class="section" id="clocks-for-mcspi1-device">
3088 <span id="soc-doc-am64x-public-clks-mcspi1"></span><h3>Clocks for MCSPI1 Device<a class="headerlink" href="#clocks-for-mcspi1-device" title="Permalink to this headline">¶</a></h3>
3089 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCSPI1</span></a> (ID = 142)</p>
3090 <p>Following is a mapping of Clocks IDs to function:</p>
3091 <table border="1" class="docutils">
3092 <colgroup>
3093 <col width="9%" />
3094 <col width="47%" />
3095 <col width="44%" />
3096 </colgroup>
3097 <thead valign="bottom">
3098 <tr class="row-odd"><th class="head">Clock ID</th>
3099 <th class="head">Name</th>
3100 <th class="head">Function</th>
3101 </tr>
3102 </thead>
3103 <tbody valign="top">
3104 <tr class="row-even"><td>0</td>
3105 <td>DEV_MCSPI1_CLKSPIREF_CLK</td>
3106 <td>Input clock</td>
3107 </tr>
3108 <tr class="row-odd"><td>1</td>
3109 <td>DEV_MCSPI1_IO_CLKSPII_CLK</td>
3110 <td>Input muxed clock</td>
3111 </tr>
3112 <tr class="row-even"><td>2</td>
3113 <td>DEV_MCSPI1_IO_CLKSPII_CLK_PARENT_BOARD_0_SPI1_CLK_OUT</td>
3114 <td>Parent input clock option to DEV_MCSPI1_IO_CLKSPII_CLK</td>
3115 </tr>
3116 <tr class="row-odd"><td>3</td>
3117 <td>DEV_MCSPI1_IO_CLKSPII_CLK_PARENT_SPI_MAIN_1_IO_CLKSPIO_CLK</td>
3118 <td>Parent input clock option to DEV_MCSPI1_IO_CLKSPII_CLK</td>
3119 </tr>
3120 <tr class="row-even"><td>4</td>
3121 <td>DEV_MCSPI1_VBUSP_CLK</td>
3122 <td>Input clock</td>
3123 </tr>
3124 <tr class="row-odd"><td>5</td>
3125 <td>DEV_MCSPI1_IO_CLKSPIO_CLK</td>
3126 <td>Output clock</td>
3127 </tr>
3128 </tbody>
3129 </table>
3130 </div>
3131 <div class="section" id="clocks-for-mcspi2-device">
3132 <span id="soc-doc-am64x-public-clks-mcspi2"></span><h3>Clocks for MCSPI2 Device<a class="headerlink" href="#clocks-for-mcspi2-device" title="Permalink to this headline">¶</a></h3>
3133 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCSPI2</span></a> (ID = 143)</p>
3134 <p>Following is a mapping of Clocks IDs to function:</p>
3135 <table border="1" class="docutils">
3136 <colgroup>
3137 <col width="9%" />
3138 <col width="47%" />
3139 <col width="44%" />
3140 </colgroup>
3141 <thead valign="bottom">
3142 <tr class="row-odd"><th class="head">Clock ID</th>
3143 <th class="head">Name</th>
3144 <th class="head">Function</th>
3145 </tr>
3146 </thead>
3147 <tbody valign="top">
3148 <tr class="row-even"><td>0</td>
3149 <td>DEV_MCSPI2_CLKSPIREF_CLK</td>
3150 <td>Input clock</td>
3151 </tr>
3152 <tr class="row-odd"><td>1</td>
3153 <td>DEV_MCSPI2_IO_CLKSPII_CLK</td>
3154 <td>Input muxed clock</td>
3155 </tr>
3156 <tr class="row-even"><td>2</td>
3157 <td>DEV_MCSPI2_IO_CLKSPII_CLK_PARENT_BOARD_0_SPI2_CLK_OUT</td>
3158 <td>Parent input clock option to DEV_MCSPI2_IO_CLKSPII_CLK</td>
3159 </tr>
3160 <tr class="row-odd"><td>3</td>
3161 <td>DEV_MCSPI2_IO_CLKSPII_CLK_PARENT_SPI_MAIN_2_IO_CLKSPIO_CLK</td>
3162 <td>Parent input clock option to DEV_MCSPI2_IO_CLKSPII_CLK</td>
3163 </tr>
3164 <tr class="row-even"><td>4</td>
3165 <td>DEV_MCSPI2_VBUSP_CLK</td>
3166 <td>Input clock</td>
3167 </tr>
3168 <tr class="row-odd"><td>5</td>
3169 <td>DEV_MCSPI2_IO_CLKSPIO_CLK</td>
3170 <td>Output clock</td>
3171 </tr>
3172 </tbody>
3173 </table>
3174 </div>
3175 <div class="section" id="clocks-for-mcspi3-device">
3176 <span id="soc-doc-am64x-public-clks-mcspi3"></span><h3>Clocks for MCSPI3 Device<a class="headerlink" href="#clocks-for-mcspi3-device" title="Permalink to this headline">¶</a></h3>
3177 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCSPI3</span></a> (ID = 144)</p>
3178 <p>Following is a mapping of Clocks IDs to function:</p>
3179 <table border="1" class="docutils">
3180 <colgroup>
3181 <col width="9%" />
3182 <col width="47%" />
3183 <col width="44%" />
3184 </colgroup>
3185 <thead valign="bottom">
3186 <tr class="row-odd"><th class="head">Clock ID</th>
3187 <th class="head">Name</th>
3188 <th class="head">Function</th>
3189 </tr>
3190 </thead>
3191 <tbody valign="top">
3192 <tr class="row-even"><td>0</td>
3193 <td>DEV_MCSPI3_CLKSPIREF_CLK</td>
3194 <td>Input clock</td>
3195 </tr>
3196 <tr class="row-odd"><td>1</td>
3197 <td>DEV_MCSPI3_IO_CLKSPII_CLK</td>
3198 <td>Input muxed clock</td>
3199 </tr>
3200 <tr class="row-even"><td>2</td>
3201 <td>DEV_MCSPI3_IO_CLKSPII_CLK_PARENT_BOARD_0_SPI3_CLK_OUT</td>
3202 <td>Parent input clock option to DEV_MCSPI3_IO_CLKSPII_CLK</td>
3203 </tr>
3204 <tr class="row-odd"><td>3</td>
3205 <td>DEV_MCSPI3_IO_CLKSPII_CLK_PARENT_SPI_MAIN_3_IO_CLKSPIO_CLK</td>
3206 <td>Parent input clock option to DEV_MCSPI3_IO_CLKSPII_CLK</td>
3207 </tr>
3208 <tr class="row-even"><td>4</td>
3209 <td>DEV_MCSPI3_VBUSP_CLK</td>
3210 <td>Input clock</td>
3211 </tr>
3212 <tr class="row-odd"><td>5</td>
3213 <td>DEV_MCSPI3_IO_CLKSPIO_CLK</td>
3214 <td>Output clock</td>
3215 </tr>
3216 </tbody>
3217 </table>
3218 </div>
3219 <div class="section" id="clocks-for-mcspi4-device">
3220 <span id="soc-doc-am64x-public-clks-mcspi4"></span><h3>Clocks for MCSPI4 Device<a class="headerlink" href="#clocks-for-mcspi4-device" title="Permalink to this headline">¶</a></h3>
3221 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCSPI4</span></a> (ID = 145)</p>
3222 <p>Following is a mapping of Clocks IDs to function:</p>
3223 <table border="1" class="docutils">
3224 <colgroup>
3225 <col width="9%" />
3226 <col width="47%" />
3227 <col width="44%" />
3228 </colgroup>
3229 <thead valign="bottom">
3230 <tr class="row-odd"><th class="head">Clock ID</th>
3231 <th class="head">Name</th>
3232 <th class="head">Function</th>
3233 </tr>
3234 </thead>
3235 <tbody valign="top">
3236 <tr class="row-even"><td>0</td>
3237 <td>DEV_MCSPI4_CLKSPIREF_CLK</td>
3238 <td>Input clock</td>
3239 </tr>
3240 <tr class="row-odd"><td>1</td>
3241 <td>DEV_MCSPI4_IO_CLKSPII_CLK</td>
3242 <td>Input muxed clock</td>
3243 </tr>
3244 <tr class="row-even"><td>2</td>
3245 <td>DEV_MCSPI4_IO_CLKSPII_CLK_PARENT_BOARD_0_SPI4_CLK_OUT</td>
3246 <td>Parent input clock option to DEV_MCSPI4_IO_CLKSPII_CLK</td>
3247 </tr>
3248 <tr class="row-odd"><td>3</td>
3249 <td>DEV_MCSPI4_IO_CLKSPII_CLK_PARENT_SPI_MAIN_4_IO_CLKSPIO_CLK</td>
3250 <td>Parent input clock option to DEV_MCSPI4_IO_CLKSPII_CLK</td>
3251 </tr>
3252 <tr class="row-even"><td>4</td>
3253 <td>DEV_MCSPI4_VBUSP_CLK</td>
3254 <td>Input clock</td>
3255 </tr>
3256 <tr class="row-odd"><td>5</td>
3257 <td>DEV_MCSPI4_IO_CLKSPIO_CLK</td>
3258 <td>Output clock</td>
3259 </tr>
3260 </tbody>
3261 </table>
3262 </div>
3263 <div class="section" id="clocks-for-mcu2main-vd-device">
3264 <span id="soc-doc-am64x-public-clks-mcu2main-vd"></span><h3>Clocks for MCU2MAIN_VD Device<a class="headerlink" href="#clocks-for-mcu2main-vd-device" title="Permalink to this headline">¶</a></h3>
3265 <p><strong>This device has no defined clocks.</strong></p>
3266 </div>
3267 <div class="section" id="clocks-for-mcu-dcc0-device">
3268 <span id="soc-doc-am64x-public-clks-mcu-dcc0"></span><h3>Clocks for MCU_DCC0 Device<a class="headerlink" href="#clocks-for-mcu-dcc0-device" title="Permalink to this headline">¶</a></h3>
3269 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_DCC0</span></a> (ID = 23)</p>
3270 <p>Following is a mapping of Clocks IDs to function:</p>
3271 <table border="1" class="docutils">
3272 <colgroup>
3273 <col width="22%" />
3274 <col width="55%" />
3275 <col width="24%" />
3276 </colgroup>
3277 <thead valign="bottom">
3278 <tr class="row-odd"><th class="head">Clock ID</th>
3279 <th class="head">Name</th>
3280 <th class="head">Function</th>
3281 </tr>
3282 </thead>
3283 <tbody valign="top">
3284 <tr class="row-even"><td>0</td>
3285 <td>DEV_MCU_DCC0_DCC_CLKSRC0_CLK</td>
3286 <td>Input clock</td>
3287 </tr>
3288 <tr class="row-odd"><td>1</td>
3289 <td>DEV_MCU_DCC0_DCC_CLKSRC1_CLK</td>
3290 <td>Input clock</td>
3291 </tr>
3292 <tr class="row-even"><td>2</td>
3293 <td>DEV_MCU_DCC0_DCC_CLKSRC2_CLK</td>
3294 <td>Input clock</td>
3295 </tr>
3296 <tr class="row-odd"><td>3</td>
3297 <td>DEV_MCU_DCC0_DCC_CLKSRC3_CLK</td>
3298 <td>Input clock</td>
3299 </tr>
3300 <tr class="row-even"><td>4</td>
3301 <td>DEV_MCU_DCC0_DCC_CLKSRC4_CLK</td>
3302 <td>Input clock</td>
3303 </tr>
3304 <tr class="row-odd"><td>5</td>
3305 <td>DEV_MCU_DCC0_DCC_CLKSRC5_CLK</td>
3306 <td>Input clock</td>
3307 </tr>
3308 <tr class="row-even"><td>6</td>
3309 <td>DEV_MCU_DCC0_DCC_CLKSRC6_CLK</td>
3310 <td>Input clock</td>
3311 </tr>
3312 <tr class="row-odd"><td>7</td>
3313 <td>DEV_MCU_DCC0_DCC_CLKSRC7_CLK</td>
3314 <td>Input clock</td>
3315 </tr>
3316 <tr class="row-even"><td>8</td>
3317 <td>DEV_MCU_DCC0_DCC_INPUT00_CLK</td>
3318 <td>Input clock</td>
3319 </tr>
3320 <tr class="row-odd"><td>9</td>
3321 <td>DEV_MCU_DCC0_DCC_INPUT01_CLK</td>
3322 <td>Input clock</td>
3323 </tr>
3324 <tr class="row-even"><td>10</td>
3325 <td>DEV_MCU_DCC0_DCC_INPUT02_CLK</td>
3326 <td>Input clock</td>
3327 </tr>
3328 <tr class="row-odd"><td>11</td>
3329 <td>DEV_MCU_DCC0_DCC_INPUT10_CLK</td>
3330 <td>Input clock</td>
3331 </tr>
3332 <tr class="row-even"><td>12</td>
3333 <td>DEV_MCU_DCC0_VBUS_CLK</td>
3334 <td>Input clock</td>
3335 </tr>
3336 </tbody>
3337 </table>
3338 </div>
3339 <div class="section" id="clocks-for-mcu-esm0-device">
3340 <span id="soc-doc-am64x-public-clks-mcu-esm0"></span><h3>Clocks for MCU_ESM0 Device<a class="headerlink" href="#clocks-for-mcu-esm0-device" title="Permalink to this headline">¶</a></h3>
3341 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_ESM0</span></a> (ID = 64)</p>
3342 <p>Following is a mapping of Clocks IDs to function:</p>
3343 <table border="1" class="docutils">
3344 <colgroup>
3345 <col width="28%" />
3346 <col width="42%" />
3347 <col width="30%" />
3348 </colgroup>
3349 <thead valign="bottom">
3350 <tr class="row-odd"><th class="head">Clock ID</th>
3351 <th class="head">Name</th>
3352 <th class="head">Function</th>
3353 </tr>
3354 </thead>
3355 <tbody valign="top">
3356 <tr class="row-even"><td>0</td>
3357 <td>DEV_MCU_ESM0_CLK</td>
3358 <td>Input clock</td>
3359 </tr>
3360 </tbody>
3361 </table>
3362 </div>
3363 <div class="section" id="clocks-for-mcu-gpio0-device">
3364 <span id="soc-doc-am64x-public-clks-mcu-gpio0"></span><h3>Clocks for MCU_GPIO0 Device<a class="headerlink" href="#clocks-for-mcu-gpio0-device" title="Permalink to this headline">¶</a></h3>
3365 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_GPIO0</span></a> (ID = 79)</p>
3366 <p>Following is a mapping of Clocks IDs to function:</p>
3367 <table border="1" class="docutils">
3368 <colgroup>
3369 <col width="25%" />
3370 <col width="48%" />
3371 <col width="27%" />
3372 </colgroup>
3373 <thead valign="bottom">
3374 <tr class="row-odd"><th class="head">Clock ID</th>
3375 <th class="head">Name</th>
3376 <th class="head">Function</th>
3377 </tr>
3378 </thead>
3379 <tbody valign="top">
3380 <tr class="row-even"><td>0</td>
3381 <td>DEV_MCU_GPIO0_MMR_CLK</td>
3382 <td>Input clock</td>
3383 </tr>
3384 </tbody>
3385 </table>
3386 </div>
3387 <div class="section" id="clocks-for-mcu-i2c0-device">
3388 <span id="soc-doc-am64x-public-clks-mcu-i2c0"></span><h3>Clocks for MCU_I2C0 Device<a class="headerlink" href="#clocks-for-mcu-i2c0-device" title="Permalink to this headline">¶</a></h3>
3389 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_I2C0</span></a> (ID = 106)</p>
3390 <p>Following is a mapping of Clocks IDs to function:</p>
3391 <table border="1" class="docutils">
3392 <colgroup>
3393 <col width="24%" />
3394 <col width="48%" />
3395 <col width="28%" />
3396 </colgroup>
3397 <thead valign="bottom">
3398 <tr class="row-odd"><th class="head">Clock ID</th>
3399 <th class="head">Name</th>
3400 <th class="head">Function</th>
3401 </tr>
3402 </thead>
3403 <tbody valign="top">
3404 <tr class="row-even"><td>0</td>
3405 <td>DEV_MCU_I2C0_CLK</td>
3406 <td>Input clock</td>
3407 </tr>
3408 <tr class="row-odd"><td>1</td>
3409 <td>DEV_MCU_I2C0_PISCL</td>
3410 <td>Input clock</td>
3411 </tr>
3412 <tr class="row-even"><td>2</td>
3413 <td>DEV_MCU_I2C0_PISYS_CLK</td>
3414 <td>Input clock</td>
3415 </tr>
3416 <tr class="row-odd"><td>3</td>
3417 <td>DEV_MCU_I2C0_PORSCL</td>
3418 <td>Output clock</td>
3419 </tr>
3420 </tbody>
3421 </table>
3422 </div>
3423 <div class="section" id="clocks-for-mcu-i2c1-device">
3424 <span id="soc-doc-am64x-public-clks-mcu-i2c1"></span><h3>Clocks for MCU_I2C1 Device<a class="headerlink" href="#clocks-for-mcu-i2c1-device" title="Permalink to this headline">¶</a></h3>
3425 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_I2C1</span></a> (ID = 107)</p>
3426 <p>Following is a mapping of Clocks IDs to function:</p>
3427 <table border="1" class="docutils">
3428 <colgroup>
3429 <col width="24%" />
3430 <col width="48%" />
3431 <col width="28%" />
3432 </colgroup>
3433 <thead valign="bottom">
3434 <tr class="row-odd"><th class="head">Clock ID</th>
3435 <th class="head">Name</th>
3436 <th class="head">Function</th>
3437 </tr>
3438 </thead>
3439 <tbody valign="top">
3440 <tr class="row-even"><td>0</td>
3441 <td>DEV_MCU_I2C1_CLK</td>
3442 <td>Input clock</td>
3443 </tr>
3444 <tr class="row-odd"><td>1</td>
3445 <td>DEV_MCU_I2C1_PISCL</td>
3446 <td>Input clock</td>
3447 </tr>
3448 <tr class="row-even"><td>2</td>
3449 <td>DEV_MCU_I2C1_PISYS_CLK</td>
3450 <td>Input clock</td>
3451 </tr>
3452 <tr class="row-odd"><td>3</td>
3453 <td>DEV_MCU_I2C1_PORSCL</td>
3454 <td>Output clock</td>
3455 </tr>
3456 </tbody>
3457 </table>
3458 </div>
3459 <div class="section" id="clocks-for-mcu-m4fss0-device">
3460 <span id="soc-doc-am64x-public-clks-mcu-m4fss0"></span><h3>Clocks for MCU_M4FSS0 Device<a class="headerlink" href="#clocks-for-mcu-m4fss0-device" title="Permalink to this headline">¶</a></h3>
3461 <p><strong>This device has no defined clocks.</strong></p>
3462 </div>
3463 <div class="section" id="clocks-for-mcu-m4fss0-cbass-0-device">
3464 <span id="soc-doc-am64x-public-clks-mcu-m4fss0-cbass-0"></span><h3>Clocks for MCU_M4FSS0_CBASS_0 Device<a class="headerlink" href="#clocks-for-mcu-m4fss0-cbass-0-device" title="Permalink to this headline">¶</a></h3>
3465 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_M4FSS0_CBASS_0</span></a> (ID = 8)</p>
3466 <p>Following is a mapping of Clocks IDs to function:</p>
3467 <table border="1" class="docutils">
3468 <colgroup>
3469 <col width="23%" />
3470 <col width="53%" />
3471 <col width="25%" />
3472 </colgroup>
3473 <thead valign="bottom">
3474 <tr class="row-odd"><th class="head">Clock ID</th>
3475 <th class="head">Name</th>
3476 <th class="head">Function</th>
3477 </tr>
3478 </thead>
3479 <tbody valign="top">
3480 <tr class="row-even"><td>0</td>
3481 <td>DEV_MCU_M4FSS0_CBASS_0_CLK</td>
3482 <td>Input clock</td>
3483 </tr>
3484 </tbody>
3485 </table>
3486 </div>
3487 <div class="section" id="clocks-for-mcu-m4fss0-core0-device">
3488 <span id="soc-doc-am64x-public-clks-mcu-m4fss0-core0"></span><h3>Clocks for MCU_M4FSS0_CORE0 Device<a class="headerlink" href="#clocks-for-mcu-m4fss0-core0-device" title="Permalink to this headline">¶</a></h3>
3489 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_M4FSS0_CORE0</span></a> (ID = 9)</p>
3490 <p>Following is a mapping of Clocks IDs to function:</p>
3491 <table border="1" class="docutils">
3492 <colgroup>
3493 <col width="8%" />
3494 <col width="53%" />
3495 <col width="39%" />
3496 </colgroup>
3497 <thead valign="bottom">
3498 <tr class="row-odd"><th class="head">Clock ID</th>
3499 <th class="head">Name</th>
3500 <th class="head">Function</th>
3501 </tr>
3502 </thead>
3503 <tbody valign="top">
3504 <tr class="row-even"><td>0</td>
3505 <td>DEV_MCU_M4FSS0_CORE0_DAP_CLK</td>
3506 <td>Input clock</td>
3507 </tr>
3508 <tr class="row-odd"><td>1</td>
3509 <td>DEV_MCU_M4FSS0_CORE0_VBUS_CLK</td>
3510 <td>Input muxed clock</td>
3511 </tr>
3512 <tr class="row-even"><td>2</td>
3513 <td>DEV_MCU_M4FSS0_CORE0_VBUS_CLK_PARENT_K3_PLL_CTRL_WRAP_MCU_0_CHIP_DIV1_CLK_CLK</td>
3514 <td>Parent input clock option to DEV_MCU_M4FSS0_CORE0_VBUS_CLK</td>
3515 </tr>
3516 <tr class="row-odd"><td>3</td>
3517 <td>DEV_MCU_M4FSS0_CORE0_VBUS_CLK_PARENT_K3_PLL_CTRL_WRAP_MCU_0_CHIP_DIV1_CLK_CLK2</td>
3518 <td>Parent input clock option to DEV_MCU_M4FSS0_CORE0_VBUS_CLK</td>
3519 </tr>
3520 </tbody>
3521 </table>
3522 </div>
3523 <div class="section" id="clocks-for-mcu-mcrc64-0-device">
3524 <span id="soc-doc-am64x-public-clks-mcu-mcrc64-0"></span><h3>Clocks for MCU_MCRC64_0 Device<a class="headerlink" href="#clocks-for-mcu-mcrc64-0-device" title="Permalink to this headline">¶</a></h3>
3525 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_MCRC64_0</span></a> (ID = 100)</p>
3526 <p>Following is a mapping of Clocks IDs to function:</p>
3527 <table border="1" class="docutils">
3528 <colgroup>
3529 <col width="26%" />
3530 <col width="47%" />
3531 <col width="28%" />
3532 </colgroup>
3533 <thead valign="bottom">
3534 <tr class="row-odd"><th class="head">Clock ID</th>
3535 <th class="head">Name</th>
3536 <th class="head">Function</th>
3537 </tr>
3538 </thead>
3539 <tbody valign="top">
3540 <tr class="row-even"><td>0</td>
3541 <td>DEV_MCU_MCRC64_0_CLK</td>
3542 <td>Input clock</td>
3543 </tr>
3544 </tbody>
3545 </table>
3546 </div>
3547 <div class="section" id="clocks-for-mcu-mcspi0-device">
3548 <span id="soc-doc-am64x-public-clks-mcu-mcspi0"></span><h3>Clocks for MCU_MCSPI0 Device<a class="headerlink" href="#clocks-for-mcu-mcspi0-device" title="Permalink to this headline">¶</a></h3>
3549 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_MCSPI0</span></a> (ID = 147)</p>
3550 <p>Following is a mapping of Clocks IDs to function:</p>
3551 <table border="1" class="docutils">
3552 <colgroup>
3553 <col width="9%" />
3554 <col width="47%" />
3555 <col width="44%" />
3556 </colgroup>
3557 <thead valign="bottom">
3558 <tr class="row-odd"><th class="head">Clock ID</th>
3559 <th class="head">Name</th>
3560 <th class="head">Function</th>
3561 </tr>
3562 </thead>
3563 <tbody valign="top">
3564 <tr class="row-even"><td>0</td>
3565 <td>DEV_MCU_MCSPI0_CLKSPIREF_CLK</td>
3566 <td>Input clock</td>
3567 </tr>
3568 <tr class="row-odd"><td>1</td>
3569 <td>DEV_MCU_MCSPI0_IO_CLKSPII_CLK</td>
3570 <td>Input muxed clock</td>
3571 </tr>
3572 <tr class="row-even"><td>2</td>
3573 <td>DEV_MCU_MCSPI0_IO_CLKSPII_CLK_PARENT_BOARD_0_MCU_SPI0_CLK_OUT</td>
3574 <td>Parent input clock option to DEV_MCU_MCSPI0_IO_CLKSPII_CLK</td>
3575 </tr>
3576 <tr class="row-odd"><td>3</td>
3577 <td>DEV_MCU_MCSPI0_IO_CLKSPII_CLK_PARENT_SPI_MCU_0_IO_CLKSPIO_CLK</td>
3578 <td>Parent input clock option to DEV_MCU_MCSPI0_IO_CLKSPII_CLK</td>
3579 </tr>
3580 <tr class="row-even"><td>4</td>
3581 <td>DEV_MCU_MCSPI0_VBUSP_CLK</td>
3582 <td>Input clock</td>
3583 </tr>
3584 <tr class="row-odd"><td>5</td>
3585 <td>DEV_MCU_MCSPI0_IO_CLKSPIO_CLK</td>
3586 <td>Output clock</td>
3587 </tr>
3588 </tbody>
3589 </table>
3590 </div>
3591 <div class="section" id="clocks-for-mcu-mcspi1-device">
3592 <span id="soc-doc-am64x-public-clks-mcu-mcspi1"></span><h3>Clocks for MCU_MCSPI1 Device<a class="headerlink" href="#clocks-for-mcu-mcspi1-device" title="Permalink to this headline">¶</a></h3>
3593 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_MCSPI1</span></a> (ID = 148)</p>
3594 <p>Following is a mapping of Clocks IDs to function:</p>
3595 <table border="1" class="docutils">
3596 <colgroup>
3597 <col width="9%" />
3598 <col width="47%" />
3599 <col width="44%" />
3600 </colgroup>
3601 <thead valign="bottom">
3602 <tr class="row-odd"><th class="head">Clock ID</th>
3603 <th class="head">Name</th>
3604 <th class="head">Function</th>
3605 </tr>
3606 </thead>
3607 <tbody valign="top">
3608 <tr class="row-even"><td>0</td>
3609 <td>DEV_MCU_MCSPI1_CLKSPIREF_CLK</td>
3610 <td>Input clock</td>
3611 </tr>
3612 <tr class="row-odd"><td>1</td>
3613 <td>DEV_MCU_MCSPI1_IO_CLKSPII_CLK</td>
3614 <td>Input muxed clock</td>
3615 </tr>
3616 <tr class="row-even"><td>2</td>
3617 <td>DEV_MCU_MCSPI1_IO_CLKSPII_CLK_PARENT_BOARD_0_MCU_SPI1_CLK_OUT</td>
3618 <td>Parent input clock option to DEV_MCU_MCSPI1_IO_CLKSPII_CLK</td>
3619 </tr>
3620 <tr class="row-odd"><td>3</td>
3621 <td>DEV_MCU_MCSPI1_IO_CLKSPII_CLK_PARENT_SPI_MCU_1_IO_CLKSPIO_CLK</td>
3622 <td>Parent input clock option to DEV_MCU_MCSPI1_IO_CLKSPII_CLK</td>
3623 </tr>
3624 <tr class="row-even"><td>4</td>
3625 <td>DEV_MCU_MCSPI1_VBUSP_CLK</td>
3626 <td>Input clock</td>
3627 </tr>
3628 <tr class="row-odd"><td>5</td>
3629 <td>DEV_MCU_MCSPI1_IO_CLKSPIO_CLK</td>
3630 <td>Output clock</td>
3631 </tr>
3632 </tbody>
3633 </table>
3634 </div>
3635 <div class="section" id="clocks-for-mcu-mcu-gpiomux-introuter0-device">
3636 <span id="soc-doc-am64x-public-clks-mcu-mcu-gpiomux-introuter0"></span><h3>Clocks for MCU_MCU_GPIOMUX_INTROUTER0 Device<a class="headerlink" href="#clocks-for-mcu-mcu-gpiomux-introuter0-device" title="Permalink to this headline">¶</a></h3>
3637 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_MCU_GPIOMUX_INTROUTER0</span></a> (ID = 5)</p>
3638 <p>Following is a mapping of Clocks IDs to function:</p>
3639 <table border="1" class="docutils">
3640 <colgroup>
3641 <col width="18%" />
3642 <col width="62%" />
3643 <col width="20%" />
3644 </colgroup>
3645 <thead valign="bottom">
3646 <tr class="row-odd"><th class="head">Clock ID</th>
3647 <th class="head">Name</th>
3648 <th class="head">Function</th>
3649 </tr>
3650 </thead>
3651 <tbody valign="top">
3652 <tr class="row-even"><td>0</td>
3653 <td>DEV_MCU_MCU_GPIOMUX_INTROUTER0_INTR_CLK</td>
3654 <td>Input clock</td>
3655 </tr>
3656 </tbody>
3657 </table>
3658 </div>
3659 <div class="section" id="clocks-for-mcu-psc0-device">
3660 <span id="soc-doc-am64x-public-clks-mcu-psc0"></span><h3>Clocks for MCU_PSC0 Device<a class="headerlink" href="#clocks-for-mcu-psc0-device" title="Permalink to this headline">¶</a></h3>
3661 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_PSC0</span></a> (ID = 140)</p>
3662 <p>Following is a mapping of Clocks IDs to function:</p>
3663 <table border="1" class="docutils">
3664 <colgroup>
3665 <col width="25%" />
3666 <col width="48%" />
3667 <col width="27%" />
3668 </colgroup>
3669 <thead valign="bottom">
3670 <tr class="row-odd"><th class="head">Clock ID</th>
3671 <th class="head">Name</th>
3672 <th class="head">Function</th>
3673 </tr>
3674 </thead>
3675 <tbody valign="top">
3676 <tr class="row-even"><td>0</td>
3677 <td>DEV_MCU_PSC0_CLK</td>
3678 <td>Input clock</td>
3679 </tr>
3680 <tr class="row-odd"><td>1</td>
3681 <td>DEV_MCU_PSC0_SLOW_CLK</td>
3682 <td>Input clock</td>
3683 </tr>
3684 </tbody>
3685 </table>
3686 </div>
3687 <div class="section" id="clocks-for-mcu-rti0-device">
3688 <span id="soc-doc-am64x-public-clks-mcu-rti0"></span><h3>Clocks for MCU_RTI0 Device<a class="headerlink" href="#clocks-for-mcu-rti0-device" title="Permalink to this headline">¶</a></h3>
3689 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_RTI0</span></a> (ID = 132)</p>
3690 <p>Following is a mapping of Clocks IDs to function:</p>
3691 <table border="1" class="docutils">
3692 <colgroup>
3693 <col width="9%" />
3694 <col width="54%" />
3695 <col width="38%" />
3696 </colgroup>
3697 <thead valign="bottom">
3698 <tr class="row-odd"><th class="head">Clock ID</th>
3699 <th class="head">Name</th>
3700 <th class="head">Function</th>
3701 </tr>
3702 </thead>
3703 <tbody valign="top">
3704 <tr class="row-even"><td>0</td>
3705 <td>DEV_MCU_RTI0_RTI_CLK</td>
3706 <td>Input muxed clock</td>
3707 </tr>
3708 <tr class="row-odd"><td>1</td>
3709 <td>DEV_MCU_RTI0_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
3710 <td>Parent input clock option to DEV_MCU_RTI0_RTI_CLK</td>
3711 </tr>
3712 <tr class="row-even"><td>2</td>
3713 <td>DEV_MCU_RTI0_RTI_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
3714 <td>Parent input clock option to DEV_MCU_RTI0_RTI_CLK</td>
3715 </tr>
3716 <tr class="row-odd"><td>3</td>
3717 <td>DEV_MCU_RTI0_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
3718 <td>Parent input clock option to DEV_MCU_RTI0_RTI_CLK</td>
3719 </tr>
3720 <tr class="row-even"><td>4</td>
3721 <td>DEV_MCU_RTI0_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
3722 <td>Parent input clock option to DEV_MCU_RTI0_RTI_CLK</td>
3723 </tr>
3724 <tr class="row-odd"><td>5</td>
3725 <td>DEV_MCU_RTI0_VBUSP_CLK</td>
3726 <td>Input clock</td>
3727 </tr>
3728 </tbody>
3729 </table>
3730 </div>
3731 <div class="section" id="clocks-for-mcu-timer0-device">
3732 <span id="soc-doc-am64x-public-clks-mcu-timer0"></span><h3>Clocks for MCU_TIMER0 Device<a class="headerlink" href="#clocks-for-mcu-timer0-device" title="Permalink to this headline">¶</a></h3>
3733 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_TIMER0</span></a> (ID = 35)</p>
3734 <p>Following is a mapping of Clocks IDs to function:</p>
3735 <table border="1" class="docutils">
3736 <colgroup>
3737 <col width="8%" />
3738 <col width="53%" />
3739 <col width="39%" />
3740 </colgroup>
3741 <thead valign="bottom">
3742 <tr class="row-odd"><th class="head">Clock ID</th>
3743 <th class="head">Name</th>
3744 <th class="head">Function</th>
3745 </tr>
3746 </thead>
3747 <tbody valign="top">
3748 <tr class="row-even"><td>0</td>
3749 <td>DEV_MCU_TIMER0_TIMER_HCLK_CLK</td>
3750 <td>Input clock</td>
3751 </tr>
3752 <tr class="row-odd"><td>1</td>
3753 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3754 <td>Input muxed clock</td>
3755 </tr>
3756 <tr class="row-even"><td>2</td>
3757 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
3758 <td>Parent input clock option to DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3759 </tr>
3760 <tr class="row-odd"><td>3</td>
3761 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK_PARENT_K3_PLL_CTRL_WRAP_MCU_0_CHIP_DIV1_CLK_CLK4</td>
3762 <td>Parent input clock option to DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3763 </tr>
3764 <tr class="row-even"><td>4</td>
3765 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
3766 <td>Parent input clock option to DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3767 </tr>
3768 <tr class="row-odd"><td>5</td>
3769 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MCU_0_HSDIVOUT3_CLK</td>
3770 <td>Parent input clock option to DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3771 </tr>
3772 <tr class="row-even"><td>6</td>
3773 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
3774 <td>Parent input clock option to DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3775 </tr>
3776 <tr class="row-odd"><td>7</td>
3777 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
3778 <td>Parent input clock option to DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3779 </tr>
3780 <tr class="row-even"><td>8</td>
3781 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
3782 <td>Parent input clock option to DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3783 </tr>
3784 <tr class="row-odd"><td>9</td>
3785 <td>DEV_MCU_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
3786 <td>Parent input clock option to DEV_MCU_TIMER0_TIMER_TCLK_CLK</td>
3787 </tr>
3788 <tr class="row-even"><td>10</td>
3789 <td>DEV_MCU_TIMER0_TIMER_PWM</td>
3790 <td>Output clock</td>
3791 </tr>
3792 </tbody>
3793 </table>
3794 </div>
3795 <div class="section" id="clocks-for-mcu-timer1-device">
3796 <span id="soc-doc-am64x-public-clks-mcu-timer1"></span><h3>Clocks for MCU_TIMER1 Device<a class="headerlink" href="#clocks-for-mcu-timer1-device" title="Permalink to this headline">¶</a></h3>
3797 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_TIMER1</span></a> (ID = 48)</p>
3798 <p>Following is a mapping of Clocks IDs to function:</p>
3799 <table border="1" class="docutils">
3800 <colgroup>
3801 <col width="8%" />
3802 <col width="53%" />
3803 <col width="39%" />
3804 </colgroup>
3805 <thead valign="bottom">
3806 <tr class="row-odd"><th class="head">Clock ID</th>
3807 <th class="head">Name</th>
3808 <th class="head">Function</th>
3809 </tr>
3810 </thead>
3811 <tbody valign="top">
3812 <tr class="row-even"><td>0</td>
3813 <td>DEV_MCU_TIMER1_TIMER_HCLK_CLK</td>
3814 <td>Input clock</td>
3815 </tr>
3816 <tr class="row-odd"><td>1</td>
3817 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3818 <td>Input muxed clock</td>
3819 </tr>
3820 <tr class="row-even"><td>2</td>
3821 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
3822 <td>Parent input clock option to DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3823 </tr>
3824 <tr class="row-odd"><td>3</td>
3825 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK_PARENT_K3_PLL_CTRL_WRAP_MCU_0_CHIP_DIV1_CLK_CLK4</td>
3826 <td>Parent input clock option to DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3827 </tr>
3828 <tr class="row-even"><td>4</td>
3829 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
3830 <td>Parent input clock option to DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3831 </tr>
3832 <tr class="row-odd"><td>5</td>
3833 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MCU_0_HSDIVOUT3_CLK</td>
3834 <td>Parent input clock option to DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3835 </tr>
3836 <tr class="row-even"><td>6</td>
3837 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
3838 <td>Parent input clock option to DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3839 </tr>
3840 <tr class="row-odd"><td>7</td>
3841 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
3842 <td>Parent input clock option to DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3843 </tr>
3844 <tr class="row-even"><td>8</td>
3845 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
3846 <td>Parent input clock option to DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3847 </tr>
3848 <tr class="row-odd"><td>9</td>
3849 <td>DEV_MCU_TIMER1_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
3850 <td>Parent input clock option to DEV_MCU_TIMER1_TIMER_TCLK_CLK</td>
3851 </tr>
3852 <tr class="row-even"><td>10</td>
3853 <td>DEV_MCU_TIMER1_TIMER_PWM</td>
3854 <td>Output clock</td>
3855 </tr>
3856 </tbody>
3857 </table>
3858 </div>
3859 <div class="section" id="clocks-for-mcu-timer2-device">
3860 <span id="soc-doc-am64x-public-clks-mcu-timer2"></span><h3>Clocks for MCU_TIMER2 Device<a class="headerlink" href="#clocks-for-mcu-timer2-device" title="Permalink to this headline">¶</a></h3>
3861 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_TIMER2</span></a> (ID = 49)</p>
3862 <p>Following is a mapping of Clocks IDs to function:</p>
3863 <table border="1" class="docutils">
3864 <colgroup>
3865 <col width="8%" />
3866 <col width="53%" />
3867 <col width="39%" />
3868 </colgroup>
3869 <thead valign="bottom">
3870 <tr class="row-odd"><th class="head">Clock ID</th>
3871 <th class="head">Name</th>
3872 <th class="head">Function</th>
3873 </tr>
3874 </thead>
3875 <tbody valign="top">
3876 <tr class="row-even"><td>0</td>
3877 <td>DEV_MCU_TIMER2_TIMER_HCLK_CLK</td>
3878 <td>Input clock</td>
3879 </tr>
3880 <tr class="row-odd"><td>1</td>
3881 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3882 <td>Input muxed clock</td>
3883 </tr>
3884 <tr class="row-even"><td>2</td>
3885 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
3886 <td>Parent input clock option to DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3887 </tr>
3888 <tr class="row-odd"><td>3</td>
3889 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK_PARENT_K3_PLL_CTRL_WRAP_MCU_0_CHIP_DIV1_CLK_CLK4</td>
3890 <td>Parent input clock option to DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3891 </tr>
3892 <tr class="row-even"><td>4</td>
3893 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
3894 <td>Parent input clock option to DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3895 </tr>
3896 <tr class="row-odd"><td>5</td>
3897 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MCU_0_HSDIVOUT3_CLK</td>
3898 <td>Parent input clock option to DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3899 </tr>
3900 <tr class="row-even"><td>6</td>
3901 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
3902 <td>Parent input clock option to DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3903 </tr>
3904 <tr class="row-odd"><td>7</td>
3905 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
3906 <td>Parent input clock option to DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3907 </tr>
3908 <tr class="row-even"><td>8</td>
3909 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
3910 <td>Parent input clock option to DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3911 </tr>
3912 <tr class="row-odd"><td>9</td>
3913 <td>DEV_MCU_TIMER2_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
3914 <td>Parent input clock option to DEV_MCU_TIMER2_TIMER_TCLK_CLK</td>
3915 </tr>
3916 <tr class="row-even"><td>10</td>
3917 <td>DEV_MCU_TIMER2_TIMER_PWM</td>
3918 <td>Output clock</td>
3919 </tr>
3920 </tbody>
3921 </table>
3922 </div>
3923 <div class="section" id="clocks-for-mcu-timer3-device">
3924 <span id="soc-doc-am64x-public-clks-mcu-timer3"></span><h3>Clocks for MCU_TIMER3 Device<a class="headerlink" href="#clocks-for-mcu-timer3-device" title="Permalink to this headline">¶</a></h3>
3925 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_TIMER3</span></a> (ID = 50)</p>
3926 <p>Following is a mapping of Clocks IDs to function:</p>
3927 <table border="1" class="docutils">
3928 <colgroup>
3929 <col width="8%" />
3930 <col width="53%" />
3931 <col width="39%" />
3932 </colgroup>
3933 <thead valign="bottom">
3934 <tr class="row-odd"><th class="head">Clock ID</th>
3935 <th class="head">Name</th>
3936 <th class="head">Function</th>
3937 </tr>
3938 </thead>
3939 <tbody valign="top">
3940 <tr class="row-even"><td>0</td>
3941 <td>DEV_MCU_TIMER3_TIMER_HCLK_CLK</td>
3942 <td>Input clock</td>
3943 </tr>
3944 <tr class="row-odd"><td>1</td>
3945 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3946 <td>Input muxed clock</td>
3947 </tr>
3948 <tr class="row-even"><td>2</td>
3949 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
3950 <td>Parent input clock option to DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3951 </tr>
3952 <tr class="row-odd"><td>3</td>
3953 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK_PARENT_K3_PLL_CTRL_WRAP_MCU_0_CHIP_DIV1_CLK_CLK4</td>
3954 <td>Parent input clock option to DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3955 </tr>
3956 <tr class="row-even"><td>4</td>
3957 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
3958 <td>Parent input clock option to DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3959 </tr>
3960 <tr class="row-odd"><td>5</td>
3961 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MCU_0_HSDIVOUT3_CLK</td>
3962 <td>Parent input clock option to DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3963 </tr>
3964 <tr class="row-even"><td>6</td>
3965 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
3966 <td>Parent input clock option to DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3967 </tr>
3968 <tr class="row-odd"><td>7</td>
3969 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
3970 <td>Parent input clock option to DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3971 </tr>
3972 <tr class="row-even"><td>8</td>
3973 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
3974 <td>Parent input clock option to DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3975 </tr>
3976 <tr class="row-odd"><td>9</td>
3977 <td>DEV_MCU_TIMER3_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
3978 <td>Parent input clock option to DEV_MCU_TIMER3_TIMER_TCLK_CLK</td>
3979 </tr>
3980 <tr class="row-even"><td>10</td>
3981 <td>DEV_MCU_TIMER3_TIMER_PWM</td>
3982 <td>Output clock</td>
3983 </tr>
3984 </tbody>
3985 </table>
3986 </div>
3987 <div class="section" id="clocks-for-mcu-uart0-device">
3988 <span id="soc-doc-am64x-public-clks-mcu-uart0"></span><h3>Clocks for MCU_UART0 Device<a class="headerlink" href="#clocks-for-mcu-uart0-device" title="Permalink to this headline">¶</a></h3>
3989 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_UART0</span></a> (ID = 149)</p>
3990 <p>Following is a mapping of Clocks IDs to function:</p>
3991 <table border="1" class="docutils">
3992 <colgroup>
3993 <col width="24%" />
3994 <col width="50%" />
3995 <col width="26%" />
3996 </colgroup>
3997 <thead valign="bottom">
3998 <tr class="row-odd"><th class="head">Clock ID</th>
3999 <th class="head">Name</th>
4000 <th class="head">Function</th>
4001 </tr>
4002 </thead>
4003 <tbody valign="top">
4004 <tr class="row-even"><td>0</td>
4005 <td>DEV_MCU_UART0_FCLK_CLK</td>
4006 <td>Input clock</td>
4007 </tr>
4008 <tr class="row-odd"><td>1</td>
4009 <td>DEV_MCU_UART0_VBUSP_CLK</td>
4010 <td>Input clock</td>
4011 </tr>
4012 </tbody>
4013 </table>
4014 </div>
4015 <div class="section" id="clocks-for-mcu-uart1-device">
4016 <span id="soc-doc-am64x-public-clks-mcu-uart1"></span><h3>Clocks for MCU_UART1 Device<a class="headerlink" href="#clocks-for-mcu-uart1-device" title="Permalink to this headline">¶</a></h3>
4017 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MCU_UART1</span></a> (ID = 160)</p>
4018 <p>Following is a mapping of Clocks IDs to function:</p>
4019 <table border="1" class="docutils">
4020 <colgroup>
4021 <col width="24%" />
4022 <col width="50%" />
4023 <col width="26%" />
4024 </colgroup>
4025 <thead valign="bottom">
4026 <tr class="row-odd"><th class="head">Clock ID</th>
4027 <th class="head">Name</th>
4028 <th class="head">Function</th>
4029 </tr>
4030 </thead>
4031 <tbody valign="top">
4032 <tr class="row-even"><td>0</td>
4033 <td>DEV_MCU_UART1_FCLK_CLK</td>
4034 <td>Input clock</td>
4035 </tr>
4036 <tr class="row-odd"><td>1</td>
4037 <td>DEV_MCU_UART1_VBUSP_CLK</td>
4038 <td>Input clock</td>
4039 </tr>
4040 </tbody>
4041 </table>
4042 </div>
4043 <div class="section" id="clocks-for-mmcsd0-device">
4044 <span id="soc-doc-am64x-public-clks-mmcsd0"></span><h3>Clocks for MMCSD0 Device<a class="headerlink" href="#clocks-for-mmcsd0-device" title="Permalink to this headline">¶</a></h3>
4045 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MMCSD0</span></a> (ID = 57)</p>
4046 <p>Following is a mapping of Clocks IDs to function:</p>
4047 <table border="1" class="docutils">
4048 <colgroup>
4049 <col width="9%" />
4050 <col width="50%" />
4051 <col width="41%" />
4052 </colgroup>
4053 <thead valign="bottom">
4054 <tr class="row-odd"><th class="head">Clock ID</th>
4055 <th class="head">Name</th>
4056 <th class="head">Function</th>
4057 </tr>
4058 </thead>
4059 <tbody valign="top">
4060 <tr class="row-even"><td>0</td>
4061 <td>DEV_MMCSD0_EMMCSS_VBUS_CLK</td>
4062 <td>Input clock</td>
4063 </tr>
4064 <tr class="row-odd"><td>1</td>
4065 <td>DEV_MMCSD0_EMMCSS_XIN_CLK</td>
4066 <td>Input muxed clock</td>
4067 </tr>
4068 <tr class="row-even"><td>2</td>
4069 <td>DEV_MMCSD0_EMMCSS_XIN_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT5_CLK</td>
4070 <td>Parent input clock option to DEV_MMCSD0_EMMCSS_XIN_CLK</td>
4071 </tr>
4072 <tr class="row-odd"><td>3</td>
4073 <td>DEV_MMCSD0_EMMCSS_XIN_CLK_PARENT_HSDIV4_16FFT_MAIN_2_HSDIVOUT2_CLK</td>
4074 <td>Parent input clock option to DEV_MMCSD0_EMMCSS_XIN_CLK</td>
4075 </tr>
4076 </tbody>
4077 </table>
4078 </div>
4079 <div class="section" id="clocks-for-mmcsd1-device">
4080 <span id="soc-doc-am64x-public-clks-mmcsd1"></span><h3>Clocks for MMCSD1 Device<a class="headerlink" href="#clocks-for-mmcsd1-device" title="Permalink to this headline">¶</a></h3>
4081 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_MMCSD1</span></a> (ID = 58)</p>
4082 <p>Following is a mapping of Clocks IDs to function:</p>
4083 <table border="1" class="docutils">
4084 <colgroup>
4085 <col width="8%" />
4086 <col width="50%" />
4087 <col width="41%" />
4088 </colgroup>
4089 <thead valign="bottom">
4090 <tr class="row-odd"><th class="head">Clock ID</th>
4091 <th class="head">Name</th>
4092 <th class="head">Function</th>
4093 </tr>
4094 </thead>
4095 <tbody valign="top">
4096 <tr class="row-even"><td>0</td>
4097 <td>DEV_MMCSD1_EMMCSDSS_IO_CLK_I</td>
4098 <td>Input muxed clock</td>
4099 </tr>
4100 <tr class="row-odd"><td>1</td>
4101 <td>DEV_MMCSD1_EMMCSDSS_IO_CLK_I_PARENT_BOARD_0_MMC1_CLKLB_OUT</td>
4102 <td>Parent input clock option to DEV_MMCSD1_EMMCSDSS_IO_CLK_I</td>
4103 </tr>
4104 <tr class="row-even"><td>2</td>
4105 <td>DEV_MMCSD1_EMMCSDSS_IO_CLK_I_PARENT_EMMCSD4SS_MAIN_0_EMMCSDSS_IO_CLK_O</td>
4106 <td>Parent input clock option to DEV_MMCSD1_EMMCSDSS_IO_CLK_I</td>
4107 </tr>
4108 <tr class="row-odd"><td>3</td>
4109 <td>DEV_MMCSD1_EMMCSDSS_VBUS_CLK</td>
4110 <td>Input clock</td>
4111 </tr>
4112 <tr class="row-even"><td>4</td>
4113 <td>DEV_MMCSD1_EMMCSDSS_XIN_CLK</td>
4114 <td>Input muxed clock</td>
4115 </tr>
4116 <tr class="row-odd"><td>5</td>
4117 <td>DEV_MMCSD1_EMMCSDSS_XIN_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT5_CLK</td>
4118 <td>Parent input clock option to DEV_MMCSD1_EMMCSDSS_XIN_CLK</td>
4119 </tr>
4120 <tr class="row-even"><td>6</td>
4121 <td>DEV_MMCSD1_EMMCSDSS_XIN_CLK_PARENT_HSDIV4_16FFT_MAIN_2_HSDIVOUT2_CLK</td>
4122 <td>Parent input clock option to DEV_MMCSD1_EMMCSDSS_XIN_CLK</td>
4123 </tr>
4124 <tr class="row-odd"><td>7</td>
4125 <td>DEV_MMCSD1_EMMCSDSS_IO_CLK_O</td>
4126 <td>Output clock</td>
4127 </tr>
4128 </tbody>
4129 </table>
4130 </div>
4131 <div class="section" id="clocks-for-pbist0-device">
4132 <span id="soc-doc-am64x-public-clks-pbist0"></span><h3>Clocks for PBIST0 Device<a class="headerlink" href="#clocks-for-pbist0-device" title="Permalink to this headline">¶</a></h3>
4133 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_PBIST0</span></a> (ID = 163)</p>
4134 <p>Following is a mapping of Clocks IDs to function:</p>
4135 <table border="1" class="docutils">
4136 <colgroup>
4137 <col width="26%" />
4138 <col width="46%" />
4139 <col width="28%" />
4140 </colgroup>
4141 <thead valign="bottom">
4142 <tr class="row-odd"><th class="head">Clock ID</th>
4143 <th class="head">Name</th>
4144 <th class="head">Function</th>
4145 </tr>
4146 </thead>
4147 <tbody valign="top">
4148 <tr class="row-even"><td>0</td>
4149 <td>DEV_PBIST0_CLK8_CLK</td>
4150 <td>Input clock</td>
4151 </tr>
4152 </tbody>
4153 </table>
4154 </div>
4155 <div class="section" id="clocks-for-pbist1-device">
4156 <span id="soc-doc-am64x-public-clks-pbist1"></span><h3>Clocks for PBIST1 Device<a class="headerlink" href="#clocks-for-pbist1-device" title="Permalink to this headline">¶</a></h3>
4157 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_PBIST1</span></a> (ID = 164)</p>
4158 <p>Following is a mapping of Clocks IDs to function:</p>
4159 <table border="1" class="docutils">
4160 <colgroup>
4161 <col width="26%" />
4162 <col width="46%" />
4163 <col width="28%" />
4164 </colgroup>
4165 <thead valign="bottom">
4166 <tr class="row-odd"><th class="head">Clock ID</th>
4167 <th class="head">Name</th>
4168 <th class="head">Function</th>
4169 </tr>
4170 </thead>
4171 <tbody valign="top">
4172 <tr class="row-even"><td>0</td>
4173 <td>DEV_PBIST1_CLK8_CLK</td>
4174 <td>Input clock</td>
4175 </tr>
4176 </tbody>
4177 </table>
4178 </div>
4179 <div class="section" id="clocks-for-pbist2-device">
4180 <span id="soc-doc-am64x-public-clks-pbist2"></span><h3>Clocks for PBIST2 Device<a class="headerlink" href="#clocks-for-pbist2-device" title="Permalink to this headline">¶</a></h3>
4181 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_PBIST2</span></a> (ID = 165)</p>
4182 <p>Following is a mapping of Clocks IDs to function:</p>
4183 <table border="1" class="docutils">
4184 <colgroup>
4185 <col width="26%" />
4186 <col width="46%" />
4187 <col width="28%" />
4188 </colgroup>
4189 <thead valign="bottom">
4190 <tr class="row-odd"><th class="head">Clock ID</th>
4191 <th class="head">Name</th>
4192 <th class="head">Function</th>
4193 </tr>
4194 </thead>
4195 <tbody valign="top">
4196 <tr class="row-even"><td>0</td>
4197 <td>DEV_PBIST2_CLK8_CLK</td>
4198 <td>Input clock</td>
4199 </tr>
4200 </tbody>
4201 </table>
4202 </div>
4203 <div class="section" id="clocks-for-pbist3-device">
4204 <span id="soc-doc-am64x-public-clks-pbist3"></span><h3>Clocks for PBIST3 Device<a class="headerlink" href="#clocks-for-pbist3-device" title="Permalink to this headline">¶</a></h3>
4205 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_PBIST3</span></a> (ID = 166)</p>
4206 <p>Following is a mapping of Clocks IDs to function:</p>
4207 <table border="1" class="docutils">
4208 <colgroup>
4209 <col width="26%" />
4210 <col width="46%" />
4211 <col width="28%" />
4212 </colgroup>
4213 <thead valign="bottom">
4214 <tr class="row-odd"><th class="head">Clock ID</th>
4215 <th class="head">Name</th>
4216 <th class="head">Function</th>
4217 </tr>
4218 </thead>
4219 <tbody valign="top">
4220 <tr class="row-even"><td>0</td>
4221 <td>DEV_PBIST3_CLK8_CLK</td>
4222 <td>Input clock</td>
4223 </tr>
4224 </tbody>
4225 </table>
4226 </div>
4227 <div class="section" id="clocks-for-pcie0-device">
4228 <span id="soc-doc-am64x-public-clks-pcie0"></span><h3>Clocks for PCIE0 Device<a class="headerlink" href="#clocks-for-pcie0-device" title="Permalink to this headline">¶</a></h3>
4229 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_PCIE0</span></a> (ID = 114)</p>
4230 <p>Following is a mapping of Clocks IDs to function:</p>
4231 <table border="1" class="docutils">
4232 <colgroup>
4233 <col width="8%" />
4234 <col width="50%" />
4235 <col width="41%" />
4236 </colgroup>
4237 <thead valign="bottom">
4238 <tr class="row-odd"><th class="head">Clock ID</th>
4239 <th class="head">Name</th>
4240 <th class="head">Function</th>
4241 </tr>
4242 </thead>
4243 <tbody valign="top">
4244 <tr class="row-even"><td>0</td>
4245 <td>DEV_PCIE0_PCIE_CBA_CLK</td>
4246 <td>Input clock</td>
4247 </tr>
4248 <tr class="row-odd"><td>1</td>
4249 <td>DEV_PCIE0_PCIE_CPTS_RCLK_CLK</td>
4250 <td>Input muxed clock</td>
4251 </tr>
4252 <tr class="row-even"><td>2</td>
4253 <td>DEV_PCIE0_PCIE_CPTS_RCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT5_CLK</td>
4254 <td>Parent input clock option to DEV_PCIE0_PCIE_CPTS_RCLK_CLK</td>
4255 </tr>
4256 <tr class="row-odd"><td>3</td>
4257 <td>DEV_PCIE0_PCIE_CPTS_RCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK</td>
4258 <td>Parent input clock option to DEV_PCIE0_PCIE_CPTS_RCLK_CLK</td>
4259 </tr>
4260 <tr class="row-even"><td>4</td>
4261 <td>DEV_PCIE0_PCIE_CPTS_RCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
4262 <td>Parent input clock option to DEV_PCIE0_PCIE_CPTS_RCLK_CLK</td>
4263 </tr>
4264 <tr class="row-odd"><td>5</td>
4265 <td>DEV_PCIE0_PCIE_CPTS_RCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
4266 <td>Parent input clock option to DEV_PCIE0_PCIE_CPTS_RCLK_CLK</td>
4267 </tr>
4268 <tr class="row-even"><td>6</td>
4269 <td>DEV_PCIE0_PCIE_CPTS_RCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
4270 <td>Parent input clock option to DEV_PCIE0_PCIE_CPTS_RCLK_CLK</td>
4271 </tr>
4272 <tr class="row-odd"><td>7</td>
4273 <td>DEV_PCIE0_PCIE_CPTS_RCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
4274 <td>Parent input clock option to DEV_PCIE0_PCIE_CPTS_RCLK_CLK</td>
4275 </tr>
4276 <tr class="row-even"><td>8</td>
4277 <td>DEV_PCIE0_PCIE_CPTS_RCLK_CLK_PARENT_WIZ16B2M4CT_MAIN_0_IP1_LN0_TXMCLK</td>
4278 <td>Parent input clock option to DEV_PCIE0_PCIE_CPTS_RCLK_CLK</td>
4279 </tr>
4280 <tr class="row-odd"><td>10</td>
4281 <td>DEV_PCIE0_PCIE_LANE0_REFCLK</td>
4282 <td>Input clock</td>
4283 </tr>
4284 <tr class="row-even"><td>11</td>
4285 <td>DEV_PCIE0_PCIE_LANE0_RXCLK</td>
4286 <td>Input clock</td>
4287 </tr>
4288 <tr class="row-odd"><td>12</td>
4289 <td>DEV_PCIE0_PCIE_LANE0_RXFCLK</td>
4290 <td>Input clock</td>
4291 </tr>
4292 <tr class="row-even"><td>13</td>
4293 <td>DEV_PCIE0_PCIE_LANE0_TXFCLK</td>
4294 <td>Input clock</td>
4295 </tr>
4296 <tr class="row-odd"><td>14</td>
4297 <td>DEV_PCIE0_PCIE_LANE0_TXMCLK</td>
4298 <td>Input clock</td>
4299 </tr>
4300 <tr class="row-even"><td>15</td>
4301 <td>DEV_PCIE0_PCIE_PM_CLK</td>
4302 <td>Input clock</td>
4303 </tr>
4304 <tr class="row-odd"><td>16</td>
4305 <td>DEV_PCIE0_PCIE_LANE0_TXCLK</td>
4306 <td>Output clock</td>
4307 </tr>
4308 </tbody>
4309 </table>
4310 </div>
4311 <div class="section" id="clocks-for-pru-icssg0-device">
4312 <span id="soc-doc-am64x-public-clks-pru-icssg0"></span><h3>Clocks for PRU_ICSSG0 Device<a class="headerlink" href="#clocks-for-pru-icssg0-device" title="Permalink to this headline">¶</a></h3>
4313 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_PRU_ICSSG0</span></a> (ID = 81)</p>
4314 <p>Following is a mapping of Clocks IDs to function:</p>
4315 <table border="1" class="docutils">
4316 <colgroup>
4317 <col width="9%" />
4318 <col width="53%" />
4319 <col width="39%" />
4320 </colgroup>
4321 <thead valign="bottom">
4322 <tr class="row-odd"><th class="head">Clock ID</th>
4323 <th class="head">Name</th>
4324 <th class="head">Function</th>
4325 </tr>
4326 </thead>
4327 <tbody valign="top">
4328 <tr class="row-even"><td>0</td>
4329 <td>DEV_PRU_ICSSG0_CORE_CLK</td>
4330 <td>Input muxed clock</td>
4331 </tr>
4332 <tr class="row-odd"><td>1</td>
4333 <td>DEV_PRU_ICSSG0_CORE_CLK_PARENT_HSDIV4_16FFT_MAIN_2_HSDIVOUT0_CLK</td>
4334 <td>Parent input clock option to DEV_PRU_ICSSG0_CORE_CLK</td>
4335 </tr>
4336 <tr class="row-even"><td>2</td>
4337 <td>DEV_PRU_ICSSG0_CORE_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT9_CLK</td>
4338 <td>Parent input clock option to DEV_PRU_ICSSG0_CORE_CLK</td>
4339 </tr>
4340 <tr class="row-odd"><td>3</td>
4341 <td>DEV_PRU_ICSSG0_IEP_CLK</td>
4342 <td>Input muxed clock</td>
4343 </tr>
4344 <tr class="row-even"><td>4</td>
4345 <td>DEV_PRU_ICSSG0_IEP_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT5_CLK</td>
4346 <td>Parent input clock option to DEV_PRU_ICSSG0_IEP_CLK</td>
4347 </tr>
4348 <tr class="row-odd"><td>5</td>
4349 <td>DEV_PRU_ICSSG0_IEP_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK</td>
4350 <td>Parent input clock option to DEV_PRU_ICSSG0_IEP_CLK</td>
4351 </tr>
4352 <tr class="row-even"><td>6</td>
4353 <td>DEV_PRU_ICSSG0_IEP_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
4354 <td>Parent input clock option to DEV_PRU_ICSSG0_IEP_CLK</td>
4355 </tr>
4356 <tr class="row-odd"><td>7</td>
4357 <td>DEV_PRU_ICSSG0_IEP_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
4358 <td>Parent input clock option to DEV_PRU_ICSSG0_IEP_CLK</td>
4359 </tr>
4360 <tr class="row-even"><td>8</td>
4361 <td>DEV_PRU_ICSSG0_IEP_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
4362 <td>Parent input clock option to DEV_PRU_ICSSG0_IEP_CLK</td>
4363 </tr>
4364 <tr class="row-odd"><td>9</td>
4365 <td>DEV_PRU_ICSSG0_IEP_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
4366 <td>Parent input clock option to DEV_PRU_ICSSG0_IEP_CLK</td>
4367 </tr>
4368 <tr class="row-even"><td>10</td>
4369 <td>DEV_PRU_ICSSG0_IEP_CLK_PARENT_WIZ16B2M4CT_MAIN_0_IP1_LN0_TXMCLK</td>
4370 <td>Parent input clock option to DEV_PRU_ICSSG0_IEP_CLK</td>
4371 </tr>
4372 <tr class="row-odd"><td>11</td>
4373 <td>DEV_PRU_ICSSG0_IEP_CLK_PARENT_K3_PLL_CTRL_WRAP_MAIN_0_CHIP_DIV1_CLK_CLK</td>
4374 <td>Parent input clock option to DEV_PRU_ICSSG0_IEP_CLK</td>
4375 </tr>
4376 <tr class="row-even"><td>12</td>
4377 <td>DEV_PRU_ICSSG0_PR1_RGMII0_RXC_I</td>
4378 <td>Input clock</td>
4379 </tr>
4380 <tr class="row-odd"><td>13</td>
4381 <td>DEV_PRU_ICSSG0_PR1_RGMII0_TXC_I</td>
4382 <td>Input clock</td>
4383 </tr>
4384 <tr class="row-even"><td>14</td>
4385 <td>DEV_PRU_ICSSG0_PR1_RGMII1_RXC_I</td>
4386 <td>Input clock</td>
4387 </tr>
4388 <tr class="row-odd"><td>15</td>
4389 <td>DEV_PRU_ICSSG0_PR1_RGMII1_TXC_I</td>
4390 <td>Input clock</td>
4391 </tr>
4392 <tr class="row-even"><td>16</td>
4393 <td>DEV_PRU_ICSSG0_RGMII_MHZ_250_CLK</td>
4394 <td>Input clock</td>
4395 </tr>
4396 <tr class="row-odd"><td>17</td>
4397 <td>DEV_PRU_ICSSG0_RGMII_MHZ_50_CLK</td>
4398 <td>Input clock</td>
4399 </tr>
4400 <tr class="row-even"><td>18</td>
4401 <td>DEV_PRU_ICSSG0_RGMII_MHZ_5_CLK</td>
4402 <td>Input clock</td>
4403 </tr>
4404 <tr class="row-odd"><td>19</td>
4405 <td>DEV_PRU_ICSSG0_UCLK_CLK</td>
4406 <td>Input clock</td>
4407 </tr>
4408 <tr class="row-even"><td>20</td>
4409 <td>DEV_PRU_ICSSG0_VCLK_CLK</td>
4410 <td>Input clock</td>
4411 </tr>
4412 <tr class="row-odd"><td>21</td>
4413 <td>DEV_PRU_ICSSG0_PR1_MDIO_MDCLK_O</td>
4414 <td>Output clock</td>
4415 </tr>
4416 <tr class="row-even"><td>22</td>
4417 <td>DEV_PRU_ICSSG0_PR1_RGMII0_TXC_O</td>
4418 <td>Output clock</td>
4419 </tr>
4420 <tr class="row-odd"><td>23</td>
4421 <td>DEV_PRU_ICSSG0_PR1_RGMII1_TXC_O</td>
4422 <td>Output clock</td>
4423 </tr>
4424 </tbody>
4425 </table>
4426 </div>
4427 <div class="section" id="clocks-for-pru-icssg1-device">
4428 <span id="soc-doc-am64x-public-clks-pru-icssg1"></span><h3>Clocks for PRU_ICSSG1 Device<a class="headerlink" href="#clocks-for-pru-icssg1-device" title="Permalink to this headline">¶</a></h3>
4429 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_PRU_ICSSG1</span></a> (ID = 82)</p>
4430 <p>Following is a mapping of Clocks IDs to function:</p>
4431 <table border="1" class="docutils">
4432 <colgroup>
4433 <col width="9%" />
4434 <col width="53%" />
4435 <col width="39%" />
4436 </colgroup>
4437 <thead valign="bottom">
4438 <tr class="row-odd"><th class="head">Clock ID</th>
4439 <th class="head">Name</th>
4440 <th class="head">Function</th>
4441 </tr>
4442 </thead>
4443 <tbody valign="top">
4444 <tr class="row-even"><td>0</td>
4445 <td>DEV_PRU_ICSSG1_CORE_CLK</td>
4446 <td>Input muxed clock</td>
4447 </tr>
4448 <tr class="row-odd"><td>1</td>
4449 <td>DEV_PRU_ICSSG1_CORE_CLK_PARENT_HSDIV4_16FFT_MAIN_2_HSDIVOUT0_CLK</td>
4450 <td>Parent input clock option to DEV_PRU_ICSSG1_CORE_CLK</td>
4451 </tr>
4452 <tr class="row-even"><td>2</td>
4453 <td>DEV_PRU_ICSSG1_CORE_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT9_CLK</td>
4454 <td>Parent input clock option to DEV_PRU_ICSSG1_CORE_CLK</td>
4455 </tr>
4456 <tr class="row-odd"><td>3</td>
4457 <td>DEV_PRU_ICSSG1_IEP_CLK</td>
4458 <td>Input muxed clock</td>
4459 </tr>
4460 <tr class="row-even"><td>4</td>
4461 <td>DEV_PRU_ICSSG1_IEP_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT5_CLK</td>
4462 <td>Parent input clock option to DEV_PRU_ICSSG1_IEP_CLK</td>
4463 </tr>
4464 <tr class="row-odd"><td>5</td>
4465 <td>DEV_PRU_ICSSG1_IEP_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK</td>
4466 <td>Parent input clock option to DEV_PRU_ICSSG1_IEP_CLK</td>
4467 </tr>
4468 <tr class="row-even"><td>6</td>
4469 <td>DEV_PRU_ICSSG1_IEP_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
4470 <td>Parent input clock option to DEV_PRU_ICSSG1_IEP_CLK</td>
4471 </tr>
4472 <tr class="row-odd"><td>7</td>
4473 <td>DEV_PRU_ICSSG1_IEP_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
4474 <td>Parent input clock option to DEV_PRU_ICSSG1_IEP_CLK</td>
4475 </tr>
4476 <tr class="row-even"><td>8</td>
4477 <td>DEV_PRU_ICSSG1_IEP_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
4478 <td>Parent input clock option to DEV_PRU_ICSSG1_IEP_CLK</td>
4479 </tr>
4480 <tr class="row-odd"><td>9</td>
4481 <td>DEV_PRU_ICSSG1_IEP_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
4482 <td>Parent input clock option to DEV_PRU_ICSSG1_IEP_CLK</td>
4483 </tr>
4484 <tr class="row-even"><td>10</td>
4485 <td>DEV_PRU_ICSSG1_IEP_CLK_PARENT_WIZ16B2M4CT_MAIN_0_IP1_LN0_TXMCLK</td>
4486 <td>Parent input clock option to DEV_PRU_ICSSG1_IEP_CLK</td>
4487 </tr>
4488 <tr class="row-odd"><td>11</td>
4489 <td>DEV_PRU_ICSSG1_IEP_CLK_PARENT_K3_PLL_CTRL_WRAP_MAIN_0_CHIP_DIV1_CLK_CLK</td>
4490 <td>Parent input clock option to DEV_PRU_ICSSG1_IEP_CLK</td>
4491 </tr>
4492 <tr class="row-even"><td>12</td>
4493 <td>DEV_PRU_ICSSG1_PR1_RGMII0_RXC_I</td>
4494 <td>Input clock</td>
4495 </tr>
4496 <tr class="row-odd"><td>13</td>
4497 <td>DEV_PRU_ICSSG1_PR1_RGMII0_TXC_I</td>
4498 <td>Input clock</td>
4499 </tr>
4500 <tr class="row-even"><td>14</td>
4501 <td>DEV_PRU_ICSSG1_PR1_RGMII1_RXC_I</td>
4502 <td>Input clock</td>
4503 </tr>
4504 <tr class="row-odd"><td>15</td>
4505 <td>DEV_PRU_ICSSG1_PR1_RGMII1_TXC_I</td>
4506 <td>Input clock</td>
4507 </tr>
4508 <tr class="row-even"><td>16</td>
4509 <td>DEV_PRU_ICSSG1_RGMII_MHZ_250_CLK</td>
4510 <td>Input clock</td>
4511 </tr>
4512 <tr class="row-odd"><td>17</td>
4513 <td>DEV_PRU_ICSSG1_RGMII_MHZ_50_CLK</td>
4514 <td>Input clock</td>
4515 </tr>
4516 <tr class="row-even"><td>18</td>
4517 <td>DEV_PRU_ICSSG1_RGMII_MHZ_5_CLK</td>
4518 <td>Input clock</td>
4519 </tr>
4520 <tr class="row-odd"><td>19</td>
4521 <td>DEV_PRU_ICSSG1_UCLK_CLK</td>
4522 <td>Input clock</td>
4523 </tr>
4524 <tr class="row-even"><td>20</td>
4525 <td>DEV_PRU_ICSSG1_VCLK_CLK</td>
4526 <td>Input clock</td>
4527 </tr>
4528 <tr class="row-odd"><td>21</td>
4529 <td>DEV_PRU_ICSSG1_PR1_MDIO_MDCLK_O</td>
4530 <td>Output clock</td>
4531 </tr>
4532 <tr class="row-even"><td>22</td>
4533 <td>DEV_PRU_ICSSG1_PR1_RGMII0_TXC_O</td>
4534 <td>Output clock</td>
4535 </tr>
4536 <tr class="row-odd"><td>23</td>
4537 <td>DEV_PRU_ICSSG1_PR1_RGMII1_TXC_O</td>
4538 <td>Output clock</td>
4539 </tr>
4540 </tbody>
4541 </table>
4542 </div>
4543 <div class="section" id="clocks-for-psc0-device">
4544 <span id="soc-doc-am64x-public-clks-psc0"></span><h3>Clocks for PSC0 Device<a class="headerlink" href="#clocks-for-psc0-device" title="Permalink to this headline">¶</a></h3>
4545 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_PSC0</span></a> (ID = 139)</p>
4546 <p>Following is a mapping of Clocks IDs to function:</p>
4547 <table border="1" class="docutils">
4548 <colgroup>
4549 <col width="27%" />
4550 <col width="43%" />
4551 <col width="30%" />
4552 </colgroup>
4553 <thead valign="bottom">
4554 <tr class="row-odd"><th class="head">Clock ID</th>
4555 <th class="head">Name</th>
4556 <th class="head">Function</th>
4557 </tr>
4558 </thead>
4559 <tbody valign="top">
4560 <tr class="row-even"><td>0</td>
4561 <td>DEV_PSC0_CLK</td>
4562 <td>Input clock</td>
4563 </tr>
4564 <tr class="row-odd"><td>1</td>
4565 <td>DEV_PSC0_SLOW_CLK</td>
4566 <td>Input clock</td>
4567 </tr>
4568 </tbody>
4569 </table>
4570 </div>
4571 <div class="section" id="clocks-for-r5fss0-device">
4572 <span id="soc-doc-am64x-public-clks-r5fss0"></span><h3>Clocks for R5FSS0 Device<a class="headerlink" href="#clocks-for-r5fss0-device" title="Permalink to this headline">¶</a></h3>
4573 <p><strong>This device has no defined clocks.</strong></p>
4574 </div>
4575 <div class="section" id="clocks-for-r5fss0-core0-device">
4576 <span id="soc-doc-am64x-public-clks-r5fss0-core0"></span><h3>Clocks for R5FSS0_CORE0 Device<a class="headerlink" href="#clocks-for-r5fss0-core0-device" title="Permalink to this headline">¶</a></h3>
4577 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_R5FSS0_CORE0</span></a> (ID = 121)</p>
4578 <p>Following is a mapping of Clocks IDs to function:</p>
4579 <table border="1" class="docutils">
4580 <colgroup>
4581 <col width="21%" />
4582 <col width="56%" />
4583 <col width="23%" />
4584 </colgroup>
4585 <thead valign="bottom">
4586 <tr class="row-odd"><th class="head">Clock ID</th>
4587 <th class="head">Name</th>
4588 <th class="head">Function</th>
4589 </tr>
4590 </thead>
4591 <tbody valign="top">
4592 <tr class="row-even"><td>0</td>
4593 <td>DEV_R5FSS0_CORE0_CPU_CLK</td>
4594 <td>Input clock</td>
4595 </tr>
4596 <tr class="row-odd"><td>1</td>
4597 <td>DEV_R5FSS0_CORE0_INTERFACE_CLK</td>
4598 <td>Input clock</td>
4599 </tr>
4600 </tbody>
4601 </table>
4602 </div>
4603 <div class="section" id="clocks-for-r5fss0-core1-device">
4604 <span id="soc-doc-am64x-public-clks-r5fss0-core1"></span><h3>Clocks for R5FSS0_CORE1 Device<a class="headerlink" href="#clocks-for-r5fss0-core1-device" title="Permalink to this headline">¶</a></h3>
4605 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_R5FSS0_CORE1</span></a> (ID = 122)</p>
4606 <p>Following is a mapping of Clocks IDs to function:</p>
4607 <table border="1" class="docutils">
4608 <colgroup>
4609 <col width="21%" />
4610 <col width="56%" />
4611 <col width="23%" />
4612 </colgroup>
4613 <thead valign="bottom">
4614 <tr class="row-odd"><th class="head">Clock ID</th>
4615 <th class="head">Name</th>
4616 <th class="head">Function</th>
4617 </tr>
4618 </thead>
4619 <tbody valign="top">
4620 <tr class="row-even"><td>0</td>
4621 <td>DEV_R5FSS0_CORE1_CPU_CLK</td>
4622 <td>Input clock</td>
4623 </tr>
4624 <tr class="row-odd"><td>1</td>
4625 <td>DEV_R5FSS0_CORE1_INTERFACE_CLK</td>
4626 <td>Input clock</td>
4627 </tr>
4628 </tbody>
4629 </table>
4630 </div>
4631 <div class="section" id="clocks-for-r5fss1-device">
4632 <span id="soc-doc-am64x-public-clks-r5fss1"></span><h3>Clocks for R5FSS1 Device<a class="headerlink" href="#clocks-for-r5fss1-device" title="Permalink to this headline">¶</a></h3>
4633 <p><strong>This device has no defined clocks.</strong></p>
4634 </div>
4635 <div class="section" id="clocks-for-r5fss1-core0-device">
4636 <span id="soc-doc-am64x-public-clks-r5fss1-core0"></span><h3>Clocks for R5FSS1_CORE0 Device<a class="headerlink" href="#clocks-for-r5fss1-core0-device" title="Permalink to this headline">¶</a></h3>
4637 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_R5FSS1_CORE0</span></a> (ID = 123)</p>
4638 <p>Following is a mapping of Clocks IDs to function:</p>
4639 <table border="1" class="docutils">
4640 <colgroup>
4641 <col width="21%" />
4642 <col width="56%" />
4643 <col width="23%" />
4644 </colgroup>
4645 <thead valign="bottom">
4646 <tr class="row-odd"><th class="head">Clock ID</th>
4647 <th class="head">Name</th>
4648 <th class="head">Function</th>
4649 </tr>
4650 </thead>
4651 <tbody valign="top">
4652 <tr class="row-even"><td>0</td>
4653 <td>DEV_R5FSS1_CORE0_CPU_CLK</td>
4654 <td>Input clock</td>
4655 </tr>
4656 <tr class="row-odd"><td>1</td>
4657 <td>DEV_R5FSS1_CORE0_INTERFACE_CLK</td>
4658 <td>Input clock</td>
4659 </tr>
4660 </tbody>
4661 </table>
4662 </div>
4663 <div class="section" id="clocks-for-r5fss1-core1-device">
4664 <span id="soc-doc-am64x-public-clks-r5fss1-core1"></span><h3>Clocks for R5FSS1_CORE1 Device<a class="headerlink" href="#clocks-for-r5fss1-core1-device" title="Permalink to this headline">¶</a></h3>
4665 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_R5FSS1_CORE1</span></a> (ID = 124)</p>
4666 <p>Following is a mapping of Clocks IDs to function:</p>
4667 <table border="1" class="docutils">
4668 <colgroup>
4669 <col width="21%" />
4670 <col width="56%" />
4671 <col width="23%" />
4672 </colgroup>
4673 <thead valign="bottom">
4674 <tr class="row-odd"><th class="head">Clock ID</th>
4675 <th class="head">Name</th>
4676 <th class="head">Function</th>
4677 </tr>
4678 </thead>
4679 <tbody valign="top">
4680 <tr class="row-even"><td>0</td>
4681 <td>DEV_R5FSS1_CORE1_CPU_CLK</td>
4682 <td>Input clock</td>
4683 </tr>
4684 <tr class="row-odd"><td>1</td>
4685 <td>DEV_R5FSS1_CORE1_INTERFACE_CLK</td>
4686 <td>Input clock</td>
4687 </tr>
4688 </tbody>
4689 </table>
4690 </div>
4691 <div class="section" id="clocks-for-rti0-device">
4692 <span id="soc-doc-am64x-public-clks-rti0"></span><h3>Clocks for RTI0 Device<a class="headerlink" href="#clocks-for-rti0-device" title="Permalink to this headline">¶</a></h3>
4693 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_RTI0</span></a> (ID = 125)</p>
4694 <p>Following is a mapping of Clocks IDs to function:</p>
4695 <table border="1" class="docutils">
4696 <colgroup>
4697 <col width="9%" />
4698 <col width="54%" />
4699 <col width="37%" />
4700 </colgroup>
4701 <thead valign="bottom">
4702 <tr class="row-odd"><th class="head">Clock ID</th>
4703 <th class="head">Name</th>
4704 <th class="head">Function</th>
4705 </tr>
4706 </thead>
4707 <tbody valign="top">
4708 <tr class="row-even"><td>0</td>
4709 <td>DEV_RTI0_RTI_CLK</td>
4710 <td>Input muxed clock</td>
4711 </tr>
4712 <tr class="row-odd"><td>1</td>
4713 <td>DEV_RTI0_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
4714 <td>Parent input clock option to DEV_RTI0_RTI_CLK</td>
4715 </tr>
4716 <tr class="row-even"><td>2</td>
4717 <td>DEV_RTI0_RTI_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
4718 <td>Parent input clock option to DEV_RTI0_RTI_CLK</td>
4719 </tr>
4720 <tr class="row-odd"><td>3</td>
4721 <td>DEV_RTI0_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
4722 <td>Parent input clock option to DEV_RTI0_RTI_CLK</td>
4723 </tr>
4724 <tr class="row-even"><td>4</td>
4725 <td>DEV_RTI0_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
4726 <td>Parent input clock option to DEV_RTI0_RTI_CLK</td>
4727 </tr>
4728 <tr class="row-odd"><td>5</td>
4729 <td>DEV_RTI0_VBUSP_CLK</td>
4730 <td>Input clock</td>
4731 </tr>
4732 </tbody>
4733 </table>
4734 </div>
4735 <div class="section" id="clocks-for-rti1-device">
4736 <span id="soc-doc-am64x-public-clks-rti1"></span><h3>Clocks for RTI1 Device<a class="headerlink" href="#clocks-for-rti1-device" title="Permalink to this headline">¶</a></h3>
4737 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_RTI1</span></a> (ID = 126)</p>
4738 <p>Following is a mapping of Clocks IDs to function:</p>
4739 <table border="1" class="docutils">
4740 <colgroup>
4741 <col width="9%" />
4742 <col width="54%" />
4743 <col width="37%" />
4744 </colgroup>
4745 <thead valign="bottom">
4746 <tr class="row-odd"><th class="head">Clock ID</th>
4747 <th class="head">Name</th>
4748 <th class="head">Function</th>
4749 </tr>
4750 </thead>
4751 <tbody valign="top">
4752 <tr class="row-even"><td>0</td>
4753 <td>DEV_RTI1_RTI_CLK</td>
4754 <td>Input muxed clock</td>
4755 </tr>
4756 <tr class="row-odd"><td>1</td>
4757 <td>DEV_RTI1_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
4758 <td>Parent input clock option to DEV_RTI1_RTI_CLK</td>
4759 </tr>
4760 <tr class="row-even"><td>2</td>
4761 <td>DEV_RTI1_RTI_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
4762 <td>Parent input clock option to DEV_RTI1_RTI_CLK</td>
4763 </tr>
4764 <tr class="row-odd"><td>3</td>
4765 <td>DEV_RTI1_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
4766 <td>Parent input clock option to DEV_RTI1_RTI_CLK</td>
4767 </tr>
4768 <tr class="row-even"><td>4</td>
4769 <td>DEV_RTI1_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
4770 <td>Parent input clock option to DEV_RTI1_RTI_CLK</td>
4771 </tr>
4772 <tr class="row-odd"><td>5</td>
4773 <td>DEV_RTI1_VBUSP_CLK</td>
4774 <td>Input clock</td>
4775 </tr>
4776 </tbody>
4777 </table>
4778 </div>
4779 <div class="section" id="clocks-for-rti10-device">
4780 <span id="soc-doc-am64x-public-clks-rti10"></span><h3>Clocks for RTI10 Device<a class="headerlink" href="#clocks-for-rti10-device" title="Permalink to this headline">¶</a></h3>
4781 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_RTI10</span></a> (ID = 130)</p>
4782 <p>Following is a mapping of Clocks IDs to function:</p>
4783 <table border="1" class="docutils">
4784 <colgroup>
4785 <col width="9%" />
4786 <col width="54%" />
4787 <col width="37%" />
4788 </colgroup>
4789 <thead valign="bottom">
4790 <tr class="row-odd"><th class="head">Clock ID</th>
4791 <th class="head">Name</th>
4792 <th class="head">Function</th>
4793 </tr>
4794 </thead>
4795 <tbody valign="top">
4796 <tr class="row-even"><td>0</td>
4797 <td>DEV_RTI10_RTI_CLK</td>
4798 <td>Input muxed clock</td>
4799 </tr>
4800 <tr class="row-odd"><td>1</td>
4801 <td>DEV_RTI10_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
4802 <td>Parent input clock option to DEV_RTI10_RTI_CLK</td>
4803 </tr>
4804 <tr class="row-even"><td>2</td>
4805 <td>DEV_RTI10_RTI_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
4806 <td>Parent input clock option to DEV_RTI10_RTI_CLK</td>
4807 </tr>
4808 <tr class="row-odd"><td>3</td>
4809 <td>DEV_RTI10_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
4810 <td>Parent input clock option to DEV_RTI10_RTI_CLK</td>
4811 </tr>
4812 <tr class="row-even"><td>4</td>
4813 <td>DEV_RTI10_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
4814 <td>Parent input clock option to DEV_RTI10_RTI_CLK</td>
4815 </tr>
4816 <tr class="row-odd"><td>5</td>
4817 <td>DEV_RTI10_VBUSP_CLK</td>
4818 <td>Input clock</td>
4819 </tr>
4820 </tbody>
4821 </table>
4822 </div>
4823 <div class="section" id="clocks-for-rti11-device">
4824 <span id="soc-doc-am64x-public-clks-rti11"></span><h3>Clocks for RTI11 Device<a class="headerlink" href="#clocks-for-rti11-device" title="Permalink to this headline">¶</a></h3>
4825 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_RTI11</span></a> (ID = 131)</p>
4826 <p>Following is a mapping of Clocks IDs to function:</p>
4827 <table border="1" class="docutils">
4828 <colgroup>
4829 <col width="9%" />
4830 <col width="54%" />
4831 <col width="37%" />
4832 </colgroup>
4833 <thead valign="bottom">
4834 <tr class="row-odd"><th class="head">Clock ID</th>
4835 <th class="head">Name</th>
4836 <th class="head">Function</th>
4837 </tr>
4838 </thead>
4839 <tbody valign="top">
4840 <tr class="row-even"><td>0</td>
4841 <td>DEV_RTI11_RTI_CLK</td>
4842 <td>Input muxed clock</td>
4843 </tr>
4844 <tr class="row-odd"><td>1</td>
4845 <td>DEV_RTI11_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
4846 <td>Parent input clock option to DEV_RTI11_RTI_CLK</td>
4847 </tr>
4848 <tr class="row-even"><td>2</td>
4849 <td>DEV_RTI11_RTI_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
4850 <td>Parent input clock option to DEV_RTI11_RTI_CLK</td>
4851 </tr>
4852 <tr class="row-odd"><td>3</td>
4853 <td>DEV_RTI11_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
4854 <td>Parent input clock option to DEV_RTI11_RTI_CLK</td>
4855 </tr>
4856 <tr class="row-even"><td>4</td>
4857 <td>DEV_RTI11_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
4858 <td>Parent input clock option to DEV_RTI11_RTI_CLK</td>
4859 </tr>
4860 <tr class="row-odd"><td>5</td>
4861 <td>DEV_RTI11_VBUSP_CLK</td>
4862 <td>Input clock</td>
4863 </tr>
4864 </tbody>
4865 </table>
4866 </div>
4867 <div class="section" id="clocks-for-rti8-device">
4868 <span id="soc-doc-am64x-public-clks-rti8"></span><h3>Clocks for RTI8 Device<a class="headerlink" href="#clocks-for-rti8-device" title="Permalink to this headline">¶</a></h3>
4869 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_RTI8</span></a> (ID = 127)</p>
4870 <p>Following is a mapping of Clocks IDs to function:</p>
4871 <table border="1" class="docutils">
4872 <colgroup>
4873 <col width="9%" />
4874 <col width="54%" />
4875 <col width="37%" />
4876 </colgroup>
4877 <thead valign="bottom">
4878 <tr class="row-odd"><th class="head">Clock ID</th>
4879 <th class="head">Name</th>
4880 <th class="head">Function</th>
4881 </tr>
4882 </thead>
4883 <tbody valign="top">
4884 <tr class="row-even"><td>0</td>
4885 <td>DEV_RTI8_RTI_CLK</td>
4886 <td>Input muxed clock</td>
4887 </tr>
4888 <tr class="row-odd"><td>1</td>
4889 <td>DEV_RTI8_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
4890 <td>Parent input clock option to DEV_RTI8_RTI_CLK</td>
4891 </tr>
4892 <tr class="row-even"><td>2</td>
4893 <td>DEV_RTI8_RTI_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
4894 <td>Parent input clock option to DEV_RTI8_RTI_CLK</td>
4895 </tr>
4896 <tr class="row-odd"><td>3</td>
4897 <td>DEV_RTI8_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
4898 <td>Parent input clock option to DEV_RTI8_RTI_CLK</td>
4899 </tr>
4900 <tr class="row-even"><td>4</td>
4901 <td>DEV_RTI8_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
4902 <td>Parent input clock option to DEV_RTI8_RTI_CLK</td>
4903 </tr>
4904 <tr class="row-odd"><td>5</td>
4905 <td>DEV_RTI8_VBUSP_CLK</td>
4906 <td>Input clock</td>
4907 </tr>
4908 </tbody>
4909 </table>
4910 </div>
4911 <div class="section" id="clocks-for-rti9-device">
4912 <span id="soc-doc-am64x-public-clks-rti9"></span><h3>Clocks for RTI9 Device<a class="headerlink" href="#clocks-for-rti9-device" title="Permalink to this headline">¶</a></h3>
4913 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_RTI9</span></a> (ID = 128)</p>
4914 <p>Following is a mapping of Clocks IDs to function:</p>
4915 <table border="1" class="docutils">
4916 <colgroup>
4917 <col width="9%" />
4918 <col width="54%" />
4919 <col width="37%" />
4920 </colgroup>
4921 <thead valign="bottom">
4922 <tr class="row-odd"><th class="head">Clock ID</th>
4923 <th class="head">Name</th>
4924 <th class="head">Function</th>
4925 </tr>
4926 </thead>
4927 <tbody valign="top">
4928 <tr class="row-even"><td>0</td>
4929 <td>DEV_RTI9_RTI_CLK</td>
4930 <td>Input muxed clock</td>
4931 </tr>
4932 <tr class="row-odd"><td>1</td>
4933 <td>DEV_RTI9_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
4934 <td>Parent input clock option to DEV_RTI9_RTI_CLK</td>
4935 </tr>
4936 <tr class="row-even"><td>2</td>
4937 <td>DEV_RTI9_RTI_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
4938 <td>Parent input clock option to DEV_RTI9_RTI_CLK</td>
4939 </tr>
4940 <tr class="row-odd"><td>3</td>
4941 <td>DEV_RTI9_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
4942 <td>Parent input clock option to DEV_RTI9_RTI_CLK</td>
4943 </tr>
4944 <tr class="row-even"><td>4</td>
4945 <td>DEV_RTI9_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3</td>
4946 <td>Parent input clock option to DEV_RTI9_RTI_CLK</td>
4947 </tr>
4948 <tr class="row-odd"><td>5</td>
4949 <td>DEV_RTI9_VBUSP_CLK</td>
4950 <td>Input clock</td>
4951 </tr>
4952 </tbody>
4953 </table>
4954 </div>
4955 <div class="section" id="clocks-for-sa2-ul0-device">
4956 <span id="soc-doc-am64x-public-clks-sa2-ul0"></span><h3>Clocks for SA2_UL0 Device<a class="headerlink" href="#clocks-for-sa2-ul0-device" title="Permalink to this headline">¶</a></h3>
4957 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_SA2_UL0</span></a> (ID = 133)</p>
4958 <p>Following is a mapping of Clocks IDs to function:</p>
4959 <table border="1" class="docutils">
4960 <colgroup>
4961 <col width="24%" />
4962 <col width="49%" />
4963 <col width="27%" />
4964 </colgroup>
4965 <thead valign="bottom">
4966 <tr class="row-odd"><th class="head">Clock ID</th>
4967 <th class="head">Name</th>
4968 <th class="head">Function</th>
4969 </tr>
4970 </thead>
4971 <tbody valign="top">
4972 <tr class="row-even"><td>0</td>
4973 <td>DEV_SA2_UL0_PKA_IN_CLK</td>
4974 <td>Input clock</td>
4975 </tr>
4976 <tr class="row-odd"><td>1</td>
4977 <td>DEV_SA2_UL0_X1_CLK</td>
4978 <td>Input clock</td>
4979 </tr>
4980 <tr class="row-even"><td>2</td>
4981 <td>DEV_SA2_UL0_X2_CLK</td>
4982 <td>Input clock</td>
4983 </tr>
4984 </tbody>
4985 </table>
4986 </div>
4987 <div class="section" id="clocks-for-serdes-10g0-device">
4988 <span id="soc-doc-am64x-public-clks-serdes-10g0"></span><h3>Clocks for SERDES_10G0 Device<a class="headerlink" href="#clocks-for-serdes-10g0-device" title="Permalink to this headline">¶</a></h3>
4989 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_SERDES_10G0</span></a> (ID = 162)</p>
4990 <p>Following is a mapping of Clocks IDs to function:</p>
4991 <table border="1" class="docutils">
4992 <colgroup>
4993 <col width="8%" />
4994 <col width="50%" />
4995 <col width="41%" />
4996 </colgroup>
4997 <thead valign="bottom">
4998 <tr class="row-odd"><th class="head">Clock ID</th>
4999 <th class="head">Name</th>
5000 <th class="head">Function</th>
5001 </tr>
5002 </thead>
5003 <tbody valign="top">
5004 <tr class="row-even"><td>0</td>
5005 <td>DEV_SERDES_10G0_CLK</td>
5006 <td>Input clock</td>
5007 </tr>
5008 <tr class="row-odd"><td>1</td>
5009 <td>DEV_SERDES_10G0_CORE_REF_CLK</td>
5010 <td>Input muxed clock</td>
5011 </tr>
5012 <tr class="row-even"><td>2</td>
5013 <td>DEV_SERDES_10G0_CORE_REF_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5014 <td>Parent input clock option to DEV_SERDES_10G0_CORE_REF_CLK</td>
5015 </tr>
5016 <tr class="row-odd"><td>3</td>
5017 <td>DEV_SERDES_10G0_CORE_REF_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5018 <td>Parent input clock option to DEV_SERDES_10G0_CORE_REF_CLK</td>
5019 </tr>
5020 <tr class="row-even"><td>4</td>
5021 <td>DEV_SERDES_10G0_CORE_REF_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT8_CLK</td>
5022 <td>Parent input clock option to DEV_SERDES_10G0_CORE_REF_CLK</td>
5023 </tr>
5024 <tr class="row-odd"><td>5</td>
5025 <td>DEV_SERDES_10G0_CORE_REF_CLK_PARENT_HSDIV4_16FFT_MAIN_2_HSDIVOUT4_CLK</td>
5026 <td>Parent input clock option to DEV_SERDES_10G0_CORE_REF_CLK</td>
5027 </tr>
5028 <tr class="row-even"><td>6</td>
5029 <td>DEV_SERDES_10G0_IP1_LN0_TXCLK</td>
5030 <td>Input clock</td>
5031 </tr>
5032 <tr class="row-odd"><td>7</td>
5033 <td>DEV_SERDES_10G0_IP2_LN0_TXCLK</td>
5034 <td>Input clock</td>
5035 </tr>
5036 <tr class="row-even"><td>8</td>
5037 <td>DEV_SERDES_10G0_IP1_LN0_REFCLK</td>
5038 <td>Output clock</td>
5039 </tr>
5040 <tr class="row-odd"><td>9</td>
5041 <td>DEV_SERDES_10G0_IP1_LN0_RXCLK</td>
5042 <td>Output clock</td>
5043 </tr>
5044 <tr class="row-even"><td>10</td>
5045 <td>DEV_SERDES_10G0_IP1_LN0_RXFCLK</td>
5046 <td>Output clock</td>
5047 </tr>
5048 <tr class="row-odd"><td>11</td>
5049 <td>DEV_SERDES_10G0_IP1_LN0_TXFCLK</td>
5050 <td>Output clock</td>
5051 </tr>
5052 <tr class="row-even"><td>12</td>
5053 <td>DEV_SERDES_10G0_IP1_LN0_TXMCLK</td>
5054 <td>Output clock</td>
5055 </tr>
5056 <tr class="row-odd"><td>13</td>
5057 <td>DEV_SERDES_10G0_IP2_LN0_REFCLK</td>
5058 <td>Output clock</td>
5059 </tr>
5060 <tr class="row-even"><td>14</td>
5061 <td>DEV_SERDES_10G0_IP2_LN0_RXCLK</td>
5062 <td>Output clock</td>
5063 </tr>
5064 <tr class="row-odd"><td>15</td>
5065 <td>DEV_SERDES_10G0_IP2_LN0_RXFCLK</td>
5066 <td>Output clock</td>
5067 </tr>
5068 <tr class="row-even"><td>16</td>
5069 <td>DEV_SERDES_10G0_IP2_LN0_TXFCLK</td>
5070 <td>Output clock</td>
5071 </tr>
5072 <tr class="row-odd"><td>17</td>
5073 <td>DEV_SERDES_10G0_IP2_LN0_TXMCLK</td>
5074 <td>Output clock</td>
5075 </tr>
5076 </tbody>
5077 </table>
5078 </div>
5079 <div class="section" id="clocks-for-spinlock0-device">
5080 <span id="soc-doc-am64x-public-clks-spinlock0"></span><h3>Clocks for SPINLOCK0 Device<a class="headerlink" href="#clocks-for-spinlock0-device" title="Permalink to this headline">¶</a></h3>
5081 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_SPINLOCK0</span></a> (ID = 150)</p>
5082 <p>Following is a mapping of Clocks IDs to function:</p>
5083 <table border="1" class="docutils">
5084 <colgroup>
5085 <col width="24%" />
5086 <col width="49%" />
5087 <col width="27%" />
5088 </colgroup>
5089 <thead valign="bottom">
5090 <tr class="row-odd"><th class="head">Clock ID</th>
5091 <th class="head">Name</th>
5092 <th class="head">Function</th>
5093 </tr>
5094 </thead>
5095 <tbody valign="top">
5096 <tr class="row-even"><td>0</td>
5097 <td>DEV_SPINLOCK0_VCLK_CLK</td>
5098 <td>Input clock</td>
5099 </tr>
5100 </tbody>
5101 </table>
5102 </div>
5103 <div class="section" id="clocks-for-stm0-device">
5104 <span id="soc-doc-am64x-public-clks-stm0"></span><h3>Clocks for STM0 Device<a class="headerlink" href="#clocks-for-stm0-device" title="Permalink to this headline">¶</a></h3>
5105 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_STM0</span></a> (ID = 15)</p>
5106 <p>Following is a mapping of Clocks IDs to function:</p>
5107 <table border="1" class="docutils">
5108 <colgroup>
5109 <col width="27%" />
5110 <col width="44%" />
5111 <col width="29%" />
5112 </colgroup>
5113 <thead valign="bottom">
5114 <tr class="row-odd"><th class="head">Clock ID</th>
5115 <th class="head">Name</th>
5116 <th class="head">Function</th>
5117 </tr>
5118 </thead>
5119 <tbody valign="top">
5120 <tr class="row-even"><td>0</td>
5121 <td>DEV_STM0_ATB_CLK</td>
5122 <td>Input clock</td>
5123 </tr>
5124 <tr class="row-odd"><td>1</td>
5125 <td>DEV_STM0_CORE_CLK</td>
5126 <td>Input clock</td>
5127 </tr>
5128 <tr class="row-even"><td>2</td>
5129 <td>DEV_STM0_VBUSP_CLK</td>
5130 <td>Input clock</td>
5131 </tr>
5132 </tbody>
5133 </table>
5134 </div>
5135 <div class="section" id="clocks-for-timer0-device">
5136 <span id="soc-doc-am64x-public-clks-timer0"></span><h3>Clocks for TIMER0 Device<a class="headerlink" href="#clocks-for-timer0-device" title="Permalink to this headline">¶</a></h3>
5137 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER0</span></a> (ID = 36)</p>
5138 <p>Following is a mapping of Clocks IDs to function:</p>
5139 <table border="1" class="docutils">
5140 <colgroup>
5141 <col width="8%" />
5142 <col width="53%" />
5143 <col width="38%" />
5144 </colgroup>
5145 <thead valign="bottom">
5146 <tr class="row-odd"><th class="head">Clock ID</th>
5147 <th class="head">Name</th>
5148 <th class="head">Function</th>
5149 </tr>
5150 </thead>
5151 <tbody valign="top">
5152 <tr class="row-even"><td>0</td>
5153 <td>DEV_TIMER0_TIMER_HCLK_CLK</td>
5154 <td>Input clock</td>
5155 </tr>
5156 <tr class="row-odd"><td>1</td>
5157 <td>DEV_TIMER0_TIMER_TCLK_CLK</td>
5158 <td>Input muxed clock</td>
5159 </tr>
5160 <tr class="row-even"><td>2</td>
5161 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5162 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5163 </tr>
5164 <tr class="row-odd"><td>3</td>
5165 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5166 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5167 </tr>
5168 <tr class="row-even"><td>4</td>
5169 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5170 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5171 </tr>
5172 <tr class="row-odd"><td>5</td>
5173 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5174 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5175 </tr>
5176 <tr class="row-even"><td>6</td>
5177 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5178 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5179 </tr>
5180 <tr class="row-odd"><td>7</td>
5181 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5182 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5183 </tr>
5184 <tr class="row-even"><td>8</td>
5185 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5186 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5187 </tr>
5188 <tr class="row-odd"><td>9</td>
5189 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5190 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5191 </tr>
5192 <tr class="row-even"><td>10</td>
5193 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5194 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5195 </tr>
5196 <tr class="row-odd"><td>11</td>
5197 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5198 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5199 </tr>
5200 <tr class="row-even"><td>12</td>
5201 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5202 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5203 </tr>
5204 <tr class="row-odd"><td>13</td>
5205 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5206 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5207 </tr>
5208 <tr class="row-even"><td>14</td>
5209 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5210 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5211 </tr>
5212 <tr class="row-odd"><td>15</td>
5213 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5214 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5215 </tr>
5216 <tr class="row-even"><td>16</td>
5217 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5218 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5219 </tr>
5220 <tr class="row-odd"><td>17</td>
5221 <td>DEV_TIMER0_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5222 <td>Parent input clock option to DEV_TIMER0_TIMER_TCLK_CLK</td>
5223 </tr>
5224 <tr class="row-even"><td>18</td>
5225 <td>DEV_TIMER0_TIMER_PWM</td>
5226 <td>Output clock</td>
5227 </tr>
5228 </tbody>
5229 </table>
5230 </div>
5231 <div class="section" id="clocks-for-timer1-device">
5232 <span id="soc-doc-am64x-public-clks-timer1"></span><h3>Clocks for TIMER1 Device<a class="headerlink" href="#clocks-for-timer1-device" title="Permalink to this headline">¶</a></h3>
5233 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER1</span></a> (ID = 37)</p>
5234 <p>Following is a mapping of Clocks IDs to function:</p>
5235 <table border="1" class="docutils">
5236 <colgroup>
5237 <col width="8%" />
5238 <col width="53%" />
5239 <col width="38%" />
5240 </colgroup>
5241 <thead valign="bottom">
5242 <tr class="row-odd"><th class="head">Clock ID</th>
5243 <th class="head">Name</th>
5244 <th class="head">Function</th>
5245 </tr>
5246 </thead>
5247 <tbody valign="top">
5248 <tr class="row-even"><td>0</td>
5249 <td>DEV_TIMER1_TIMER_HCLK_CLK</td>
5250 <td>Input clock</td>
5251 </tr>
5252 <tr class="row-odd"><td>1</td>
5253 <td>DEV_TIMER1_TIMER_TCLK_CLK</td>
5254 <td>Input muxed clock</td>
5255 </tr>
5256 <tr class="row-even"><td>2</td>
5257 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5258 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5259 </tr>
5260 <tr class="row-odd"><td>3</td>
5261 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5262 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5263 </tr>
5264 <tr class="row-even"><td>4</td>
5265 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5266 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5267 </tr>
5268 <tr class="row-odd"><td>5</td>
5269 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5270 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5271 </tr>
5272 <tr class="row-even"><td>6</td>
5273 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5274 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5275 </tr>
5276 <tr class="row-odd"><td>7</td>
5277 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5278 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5279 </tr>
5280 <tr class="row-even"><td>8</td>
5281 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5282 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5283 </tr>
5284 <tr class="row-odd"><td>9</td>
5285 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5286 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5287 </tr>
5288 <tr class="row-even"><td>10</td>
5289 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5290 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5291 </tr>
5292 <tr class="row-odd"><td>11</td>
5293 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5294 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5295 </tr>
5296 <tr class="row-even"><td>12</td>
5297 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5298 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5299 </tr>
5300 <tr class="row-odd"><td>13</td>
5301 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5302 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5303 </tr>
5304 <tr class="row-even"><td>14</td>
5305 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5306 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5307 </tr>
5308 <tr class="row-odd"><td>15</td>
5309 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5310 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5311 </tr>
5312 <tr class="row-even"><td>16</td>
5313 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5314 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5315 </tr>
5316 <tr class="row-odd"><td>17</td>
5317 <td>DEV_TIMER1_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5318 <td>Parent input clock option to DEV_TIMER1_TIMER_TCLK_CLK</td>
5319 </tr>
5320 <tr class="row-even"><td>18</td>
5321 <td>DEV_TIMER1_TIMER_PWM</td>
5322 <td>Output clock</td>
5323 </tr>
5324 </tbody>
5325 </table>
5326 </div>
5327 <div class="section" id="clocks-for-timer10-device">
5328 <span id="soc-doc-am64x-public-clks-timer10"></span><h3>Clocks for TIMER10 Device<a class="headerlink" href="#clocks-for-timer10-device" title="Permalink to this headline">¶</a></h3>
5329 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER10</span></a> (ID = 46)</p>
5330 <p>Following is a mapping of Clocks IDs to function:</p>
5331 <table border="1" class="docutils">
5332 <colgroup>
5333 <col width="8%" />
5334 <col width="53%" />
5335 <col width="39%" />
5336 </colgroup>
5337 <thead valign="bottom">
5338 <tr class="row-odd"><th class="head">Clock ID</th>
5339 <th class="head">Name</th>
5340 <th class="head">Function</th>
5341 </tr>
5342 </thead>
5343 <tbody valign="top">
5344 <tr class="row-even"><td>0</td>
5345 <td>DEV_TIMER10_TIMER_HCLK_CLK</td>
5346 <td>Input clock</td>
5347 </tr>
5348 <tr class="row-odd"><td>1</td>
5349 <td>DEV_TIMER10_TIMER_TCLK_CLK</td>
5350 <td>Input muxed clock</td>
5351 </tr>
5352 <tr class="row-even"><td>2</td>
5353 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5354 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5355 </tr>
5356 <tr class="row-odd"><td>3</td>
5357 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5358 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5359 </tr>
5360 <tr class="row-even"><td>4</td>
5361 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5362 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5363 </tr>
5364 <tr class="row-odd"><td>5</td>
5365 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5366 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5367 </tr>
5368 <tr class="row-even"><td>6</td>
5369 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5370 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5371 </tr>
5372 <tr class="row-odd"><td>7</td>
5373 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5374 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5375 </tr>
5376 <tr class="row-even"><td>8</td>
5377 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5378 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5379 </tr>
5380 <tr class="row-odd"><td>9</td>
5381 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5382 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5383 </tr>
5384 <tr class="row-even"><td>10</td>
5385 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5386 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5387 </tr>
5388 <tr class="row-odd"><td>11</td>
5389 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5390 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5391 </tr>
5392 <tr class="row-even"><td>12</td>
5393 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5394 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5395 </tr>
5396 <tr class="row-odd"><td>13</td>
5397 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5398 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5399 </tr>
5400 <tr class="row-even"><td>14</td>
5401 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5402 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5403 </tr>
5404 <tr class="row-odd"><td>15</td>
5405 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5406 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5407 </tr>
5408 <tr class="row-even"><td>16</td>
5409 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5410 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5411 </tr>
5412 <tr class="row-odd"><td>17</td>
5413 <td>DEV_TIMER10_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5414 <td>Parent input clock option to DEV_TIMER10_TIMER_TCLK_CLK</td>
5415 </tr>
5416 <tr class="row-even"><td>18</td>
5417 <td>DEV_TIMER10_TIMER_PWM</td>
5418 <td>Output clock</td>
5419 </tr>
5420 </tbody>
5421 </table>
5422 </div>
5423 <div class="section" id="clocks-for-timer11-device">
5424 <span id="soc-doc-am64x-public-clks-timer11"></span><h3>Clocks for TIMER11 Device<a class="headerlink" href="#clocks-for-timer11-device" title="Permalink to this headline">¶</a></h3>
5425 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER11</span></a> (ID = 47)</p>
5426 <p>Following is a mapping of Clocks IDs to function:</p>
5427 <table border="1" class="docutils">
5428 <colgroup>
5429 <col width="8%" />
5430 <col width="53%" />
5431 <col width="39%" />
5432 </colgroup>
5433 <thead valign="bottom">
5434 <tr class="row-odd"><th class="head">Clock ID</th>
5435 <th class="head">Name</th>
5436 <th class="head">Function</th>
5437 </tr>
5438 </thead>
5439 <tbody valign="top">
5440 <tr class="row-even"><td>0</td>
5441 <td>DEV_TIMER11_TIMER_HCLK_CLK</td>
5442 <td>Input clock</td>
5443 </tr>
5444 <tr class="row-odd"><td>1</td>
5445 <td>DEV_TIMER11_TIMER_TCLK_CLK</td>
5446 <td>Input muxed clock</td>
5447 </tr>
5448 <tr class="row-even"><td>2</td>
5449 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5450 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5451 </tr>
5452 <tr class="row-odd"><td>3</td>
5453 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5454 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5455 </tr>
5456 <tr class="row-even"><td>4</td>
5457 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5458 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5459 </tr>
5460 <tr class="row-odd"><td>5</td>
5461 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5462 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5463 </tr>
5464 <tr class="row-even"><td>6</td>
5465 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5466 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5467 </tr>
5468 <tr class="row-odd"><td>7</td>
5469 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5470 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5471 </tr>
5472 <tr class="row-even"><td>8</td>
5473 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5474 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5475 </tr>
5476 <tr class="row-odd"><td>9</td>
5477 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5478 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5479 </tr>
5480 <tr class="row-even"><td>10</td>
5481 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5482 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5483 </tr>
5484 <tr class="row-odd"><td>11</td>
5485 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5486 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5487 </tr>
5488 <tr class="row-even"><td>12</td>
5489 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5490 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5491 </tr>
5492 <tr class="row-odd"><td>13</td>
5493 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5494 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5495 </tr>
5496 <tr class="row-even"><td>14</td>
5497 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5498 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5499 </tr>
5500 <tr class="row-odd"><td>15</td>
5501 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5502 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5503 </tr>
5504 <tr class="row-even"><td>16</td>
5505 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5506 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5507 </tr>
5508 <tr class="row-odd"><td>17</td>
5509 <td>DEV_TIMER11_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5510 <td>Parent input clock option to DEV_TIMER11_TIMER_TCLK_CLK</td>
5511 </tr>
5512 <tr class="row-even"><td>18</td>
5513 <td>DEV_TIMER11_TIMER_PWM</td>
5514 <td>Output clock</td>
5515 </tr>
5516 </tbody>
5517 </table>
5518 </div>
5519 <div class="section" id="clocks-for-timer2-device">
5520 <span id="soc-doc-am64x-public-clks-timer2"></span><h3>Clocks for TIMER2 Device<a class="headerlink" href="#clocks-for-timer2-device" title="Permalink to this headline">¶</a></h3>
5521 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER2</span></a> (ID = 38)</p>
5522 <p>Following is a mapping of Clocks IDs to function:</p>
5523 <table border="1" class="docutils">
5524 <colgroup>
5525 <col width="8%" />
5526 <col width="53%" />
5527 <col width="38%" />
5528 </colgroup>
5529 <thead valign="bottom">
5530 <tr class="row-odd"><th class="head">Clock ID</th>
5531 <th class="head">Name</th>
5532 <th class="head">Function</th>
5533 </tr>
5534 </thead>
5535 <tbody valign="top">
5536 <tr class="row-even"><td>0</td>
5537 <td>DEV_TIMER2_TIMER_HCLK_CLK</td>
5538 <td>Input clock</td>
5539 </tr>
5540 <tr class="row-odd"><td>1</td>
5541 <td>DEV_TIMER2_TIMER_TCLK_CLK</td>
5542 <td>Input muxed clock</td>
5543 </tr>
5544 <tr class="row-even"><td>2</td>
5545 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5546 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5547 </tr>
5548 <tr class="row-odd"><td>3</td>
5549 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5550 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5551 </tr>
5552 <tr class="row-even"><td>4</td>
5553 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5554 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5555 </tr>
5556 <tr class="row-odd"><td>5</td>
5557 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5558 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5559 </tr>
5560 <tr class="row-even"><td>6</td>
5561 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5562 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5563 </tr>
5564 <tr class="row-odd"><td>7</td>
5565 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5566 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5567 </tr>
5568 <tr class="row-even"><td>8</td>
5569 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5570 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5571 </tr>
5572 <tr class="row-odd"><td>9</td>
5573 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5574 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5575 </tr>
5576 <tr class="row-even"><td>10</td>
5577 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5578 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5579 </tr>
5580 <tr class="row-odd"><td>11</td>
5581 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5582 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5583 </tr>
5584 <tr class="row-even"><td>12</td>
5585 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5586 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5587 </tr>
5588 <tr class="row-odd"><td>13</td>
5589 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5590 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5591 </tr>
5592 <tr class="row-even"><td>14</td>
5593 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5594 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5595 </tr>
5596 <tr class="row-odd"><td>15</td>
5597 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5598 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5599 </tr>
5600 <tr class="row-even"><td>16</td>
5601 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5602 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5603 </tr>
5604 <tr class="row-odd"><td>17</td>
5605 <td>DEV_TIMER2_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5606 <td>Parent input clock option to DEV_TIMER2_TIMER_TCLK_CLK</td>
5607 </tr>
5608 <tr class="row-even"><td>18</td>
5609 <td>DEV_TIMER2_TIMER_PWM</td>
5610 <td>Output clock</td>
5611 </tr>
5612 </tbody>
5613 </table>
5614 </div>
5615 <div class="section" id="clocks-for-timer3-device">
5616 <span id="soc-doc-am64x-public-clks-timer3"></span><h3>Clocks for TIMER3 Device<a class="headerlink" href="#clocks-for-timer3-device" title="Permalink to this headline">¶</a></h3>
5617 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER3</span></a> (ID = 39)</p>
5618 <p>Following is a mapping of Clocks IDs to function:</p>
5619 <table border="1" class="docutils">
5620 <colgroup>
5621 <col width="8%" />
5622 <col width="53%" />
5623 <col width="38%" />
5624 </colgroup>
5625 <thead valign="bottom">
5626 <tr class="row-odd"><th class="head">Clock ID</th>
5627 <th class="head">Name</th>
5628 <th class="head">Function</th>
5629 </tr>
5630 </thead>
5631 <tbody valign="top">
5632 <tr class="row-even"><td>0</td>
5633 <td>DEV_TIMER3_TIMER_HCLK_CLK</td>
5634 <td>Input clock</td>
5635 </tr>
5636 <tr class="row-odd"><td>1</td>
5637 <td>DEV_TIMER3_TIMER_TCLK_CLK</td>
5638 <td>Input muxed clock</td>
5639 </tr>
5640 <tr class="row-even"><td>2</td>
5641 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5642 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5643 </tr>
5644 <tr class="row-odd"><td>3</td>
5645 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5646 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5647 </tr>
5648 <tr class="row-even"><td>4</td>
5649 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5650 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5651 </tr>
5652 <tr class="row-odd"><td>5</td>
5653 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5654 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5655 </tr>
5656 <tr class="row-even"><td>6</td>
5657 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5658 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5659 </tr>
5660 <tr class="row-odd"><td>7</td>
5661 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5662 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5663 </tr>
5664 <tr class="row-even"><td>8</td>
5665 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5666 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5667 </tr>
5668 <tr class="row-odd"><td>9</td>
5669 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5670 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5671 </tr>
5672 <tr class="row-even"><td>10</td>
5673 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5674 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5675 </tr>
5676 <tr class="row-odd"><td>11</td>
5677 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5678 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5679 </tr>
5680 <tr class="row-even"><td>12</td>
5681 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5682 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5683 </tr>
5684 <tr class="row-odd"><td>13</td>
5685 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5686 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5687 </tr>
5688 <tr class="row-even"><td>14</td>
5689 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5690 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5691 </tr>
5692 <tr class="row-odd"><td>15</td>
5693 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5694 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5695 </tr>
5696 <tr class="row-even"><td>16</td>
5697 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5698 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5699 </tr>
5700 <tr class="row-odd"><td>17</td>
5701 <td>DEV_TIMER3_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5702 <td>Parent input clock option to DEV_TIMER3_TIMER_TCLK_CLK</td>
5703 </tr>
5704 <tr class="row-even"><td>18</td>
5705 <td>DEV_TIMER3_TIMER_PWM</td>
5706 <td>Output clock</td>
5707 </tr>
5708 </tbody>
5709 </table>
5710 </div>
5711 <div class="section" id="clocks-for-timer4-device">
5712 <span id="soc-doc-am64x-public-clks-timer4"></span><h3>Clocks for TIMER4 Device<a class="headerlink" href="#clocks-for-timer4-device" title="Permalink to this headline">¶</a></h3>
5713 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER4</span></a> (ID = 40)</p>
5714 <p>Following is a mapping of Clocks IDs to function:</p>
5715 <table border="1" class="docutils">
5716 <colgroup>
5717 <col width="8%" />
5718 <col width="53%" />
5719 <col width="38%" />
5720 </colgroup>
5721 <thead valign="bottom">
5722 <tr class="row-odd"><th class="head">Clock ID</th>
5723 <th class="head">Name</th>
5724 <th class="head">Function</th>
5725 </tr>
5726 </thead>
5727 <tbody valign="top">
5728 <tr class="row-even"><td>0</td>
5729 <td>DEV_TIMER4_TIMER_HCLK_CLK</td>
5730 <td>Input clock</td>
5731 </tr>
5732 <tr class="row-odd"><td>1</td>
5733 <td>DEV_TIMER4_TIMER_TCLK_CLK</td>
5734 <td>Input muxed clock</td>
5735 </tr>
5736 <tr class="row-even"><td>2</td>
5737 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5738 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5739 </tr>
5740 <tr class="row-odd"><td>3</td>
5741 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5742 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5743 </tr>
5744 <tr class="row-even"><td>4</td>
5745 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5746 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5747 </tr>
5748 <tr class="row-odd"><td>5</td>
5749 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5750 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5751 </tr>
5752 <tr class="row-even"><td>6</td>
5753 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5754 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5755 </tr>
5756 <tr class="row-odd"><td>7</td>
5757 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5758 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5759 </tr>
5760 <tr class="row-even"><td>8</td>
5761 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5762 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5763 </tr>
5764 <tr class="row-odd"><td>9</td>
5765 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5766 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5767 </tr>
5768 <tr class="row-even"><td>10</td>
5769 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5770 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5771 </tr>
5772 <tr class="row-odd"><td>11</td>
5773 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5774 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5775 </tr>
5776 <tr class="row-even"><td>12</td>
5777 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5778 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5779 </tr>
5780 <tr class="row-odd"><td>13</td>
5781 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5782 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5783 </tr>
5784 <tr class="row-even"><td>14</td>
5785 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5786 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5787 </tr>
5788 <tr class="row-odd"><td>15</td>
5789 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5790 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5791 </tr>
5792 <tr class="row-even"><td>16</td>
5793 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5794 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5795 </tr>
5796 <tr class="row-odd"><td>17</td>
5797 <td>DEV_TIMER4_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5798 <td>Parent input clock option to DEV_TIMER4_TIMER_TCLK_CLK</td>
5799 </tr>
5800 <tr class="row-even"><td>18</td>
5801 <td>DEV_TIMER4_TIMER_PWM</td>
5802 <td>Output clock</td>
5803 </tr>
5804 </tbody>
5805 </table>
5806 </div>
5807 <div class="section" id="clocks-for-timer5-device">
5808 <span id="soc-doc-am64x-public-clks-timer5"></span><h3>Clocks for TIMER5 Device<a class="headerlink" href="#clocks-for-timer5-device" title="Permalink to this headline">¶</a></h3>
5809 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER5</span></a> (ID = 41)</p>
5810 <p>Following is a mapping of Clocks IDs to function:</p>
5811 <table border="1" class="docutils">
5812 <colgroup>
5813 <col width="8%" />
5814 <col width="53%" />
5815 <col width="38%" />
5816 </colgroup>
5817 <thead valign="bottom">
5818 <tr class="row-odd"><th class="head">Clock ID</th>
5819 <th class="head">Name</th>
5820 <th class="head">Function</th>
5821 </tr>
5822 </thead>
5823 <tbody valign="top">
5824 <tr class="row-even"><td>0</td>
5825 <td>DEV_TIMER5_TIMER_HCLK_CLK</td>
5826 <td>Input clock</td>
5827 </tr>
5828 <tr class="row-odd"><td>1</td>
5829 <td>DEV_TIMER5_TIMER_TCLK_CLK</td>
5830 <td>Input muxed clock</td>
5831 </tr>
5832 <tr class="row-even"><td>2</td>
5833 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5834 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5835 </tr>
5836 <tr class="row-odd"><td>3</td>
5837 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5838 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5839 </tr>
5840 <tr class="row-even"><td>4</td>
5841 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5842 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5843 </tr>
5844 <tr class="row-odd"><td>5</td>
5845 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5846 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5847 </tr>
5848 <tr class="row-even"><td>6</td>
5849 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5850 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5851 </tr>
5852 <tr class="row-odd"><td>7</td>
5853 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5854 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5855 </tr>
5856 <tr class="row-even"><td>8</td>
5857 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5858 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5859 </tr>
5860 <tr class="row-odd"><td>9</td>
5861 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5862 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5863 </tr>
5864 <tr class="row-even"><td>10</td>
5865 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5866 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5867 </tr>
5868 <tr class="row-odd"><td>11</td>
5869 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5870 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5871 </tr>
5872 <tr class="row-even"><td>12</td>
5873 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5874 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5875 </tr>
5876 <tr class="row-odd"><td>13</td>
5877 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5878 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5879 </tr>
5880 <tr class="row-even"><td>14</td>
5881 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5882 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5883 </tr>
5884 <tr class="row-odd"><td>15</td>
5885 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5886 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5887 </tr>
5888 <tr class="row-even"><td>16</td>
5889 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5890 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5891 </tr>
5892 <tr class="row-odd"><td>17</td>
5893 <td>DEV_TIMER5_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5894 <td>Parent input clock option to DEV_TIMER5_TIMER_TCLK_CLK</td>
5895 </tr>
5896 <tr class="row-even"><td>18</td>
5897 <td>DEV_TIMER5_TIMER_PWM</td>
5898 <td>Output clock</td>
5899 </tr>
5900 </tbody>
5901 </table>
5902 </div>
5903 <div class="section" id="clocks-for-timer6-device">
5904 <span id="soc-doc-am64x-public-clks-timer6"></span><h3>Clocks for TIMER6 Device<a class="headerlink" href="#clocks-for-timer6-device" title="Permalink to this headline">¶</a></h3>
5905 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER6</span></a> (ID = 42)</p>
5906 <p>Following is a mapping of Clocks IDs to function:</p>
5907 <table border="1" class="docutils">
5908 <colgroup>
5909 <col width="8%" />
5910 <col width="53%" />
5911 <col width="38%" />
5912 </colgroup>
5913 <thead valign="bottom">
5914 <tr class="row-odd"><th class="head">Clock ID</th>
5915 <th class="head">Name</th>
5916 <th class="head">Function</th>
5917 </tr>
5918 </thead>
5919 <tbody valign="top">
5920 <tr class="row-even"><td>0</td>
5921 <td>DEV_TIMER6_TIMER_HCLK_CLK</td>
5922 <td>Input clock</td>
5923 </tr>
5924 <tr class="row-odd"><td>1</td>
5925 <td>DEV_TIMER6_TIMER_TCLK_CLK</td>
5926 <td>Input muxed clock</td>
5927 </tr>
5928 <tr class="row-even"><td>2</td>
5929 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
5930 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5931 </tr>
5932 <tr class="row-odd"><td>3</td>
5933 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
5934 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5935 </tr>
5936 <tr class="row-even"><td>4</td>
5937 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
5938 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5939 </tr>
5940 <tr class="row-odd"><td>5</td>
5941 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
5942 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5943 </tr>
5944 <tr class="row-even"><td>6</td>
5945 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
5946 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5947 </tr>
5948 <tr class="row-odd"><td>7</td>
5949 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
5950 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5951 </tr>
5952 <tr class="row-even"><td>8</td>
5953 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
5954 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5955 </tr>
5956 <tr class="row-odd"><td>9</td>
5957 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
5958 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5959 </tr>
5960 <tr class="row-even"><td>10</td>
5961 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
5962 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5963 </tr>
5964 <tr class="row-odd"><td>11</td>
5965 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
5966 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5967 </tr>
5968 <tr class="row-even"><td>12</td>
5969 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
5970 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5971 </tr>
5972 <tr class="row-odd"><td>13</td>
5973 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
5974 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5975 </tr>
5976 <tr class="row-even"><td>14</td>
5977 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
5978 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5979 </tr>
5980 <tr class="row-odd"><td>15</td>
5981 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
5982 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5983 </tr>
5984 <tr class="row-even"><td>16</td>
5985 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
5986 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5987 </tr>
5988 <tr class="row-odd"><td>17</td>
5989 <td>DEV_TIMER6_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
5990 <td>Parent input clock option to DEV_TIMER6_TIMER_TCLK_CLK</td>
5991 </tr>
5992 <tr class="row-even"><td>18</td>
5993 <td>DEV_TIMER6_TIMER_PWM</td>
5994 <td>Output clock</td>
5995 </tr>
5996 </tbody>
5997 </table>
5998 </div>
5999 <div class="section" id="clocks-for-timer7-device">
6000 <span id="soc-doc-am64x-public-clks-timer7"></span><h3>Clocks for TIMER7 Device<a class="headerlink" href="#clocks-for-timer7-device" title="Permalink to this headline">¶</a></h3>
6001 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER7</span></a> (ID = 43)</p>
6002 <p>Following is a mapping of Clocks IDs to function:</p>
6003 <table border="1" class="docutils">
6004 <colgroup>
6005 <col width="8%" />
6006 <col width="53%" />
6007 <col width="38%" />
6008 </colgroup>
6009 <thead valign="bottom">
6010 <tr class="row-odd"><th class="head">Clock ID</th>
6011 <th class="head">Name</th>
6012 <th class="head">Function</th>
6013 </tr>
6014 </thead>
6015 <tbody valign="top">
6016 <tr class="row-even"><td>0</td>
6017 <td>DEV_TIMER7_TIMER_HCLK_CLK</td>
6018 <td>Input clock</td>
6019 </tr>
6020 <tr class="row-odd"><td>1</td>
6021 <td>DEV_TIMER7_TIMER_TCLK_CLK</td>
6022 <td>Input muxed clock</td>
6023 </tr>
6024 <tr class="row-even"><td>2</td>
6025 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
6026 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6027 </tr>
6028 <tr class="row-odd"><td>3</td>
6029 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
6030 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6031 </tr>
6032 <tr class="row-even"><td>4</td>
6033 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
6034 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6035 </tr>
6036 <tr class="row-odd"><td>5</td>
6037 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
6038 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6039 </tr>
6040 <tr class="row-even"><td>6</td>
6041 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
6042 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6043 </tr>
6044 <tr class="row-odd"><td>7</td>
6045 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
6046 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6047 </tr>
6048 <tr class="row-even"><td>8</td>
6049 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
6050 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6051 </tr>
6052 <tr class="row-odd"><td>9</td>
6053 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
6054 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6055 </tr>
6056 <tr class="row-even"><td>10</td>
6057 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
6058 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6059 </tr>
6060 <tr class="row-odd"><td>11</td>
6061 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
6062 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6063 </tr>
6064 <tr class="row-even"><td>12</td>
6065 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
6066 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6067 </tr>
6068 <tr class="row-odd"><td>13</td>
6069 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
6070 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6071 </tr>
6072 <tr class="row-even"><td>14</td>
6073 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
6074 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6075 </tr>
6076 <tr class="row-odd"><td>15</td>
6077 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
6078 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6079 </tr>
6080 <tr class="row-even"><td>16</td>
6081 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
6082 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6083 </tr>
6084 <tr class="row-odd"><td>17</td>
6085 <td>DEV_TIMER7_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
6086 <td>Parent input clock option to DEV_TIMER7_TIMER_TCLK_CLK</td>
6087 </tr>
6088 <tr class="row-even"><td>18</td>
6089 <td>DEV_TIMER7_TIMER_PWM</td>
6090 <td>Output clock</td>
6091 </tr>
6092 </tbody>
6093 </table>
6094 </div>
6095 <div class="section" id="clocks-for-timer8-device">
6096 <span id="soc-doc-am64x-public-clks-timer8"></span><h3>Clocks for TIMER8 Device<a class="headerlink" href="#clocks-for-timer8-device" title="Permalink to this headline">¶</a></h3>
6097 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER8</span></a> (ID = 44)</p>
6098 <p>Following is a mapping of Clocks IDs to function:</p>
6099 <table border="1" class="docutils">
6100 <colgroup>
6101 <col width="8%" />
6102 <col width="53%" />
6103 <col width="38%" />
6104 </colgroup>
6105 <thead valign="bottom">
6106 <tr class="row-odd"><th class="head">Clock ID</th>
6107 <th class="head">Name</th>
6108 <th class="head">Function</th>
6109 </tr>
6110 </thead>
6111 <tbody valign="top">
6112 <tr class="row-even"><td>0</td>
6113 <td>DEV_TIMER8_TIMER_HCLK_CLK</td>
6114 <td>Input clock</td>
6115 </tr>
6116 <tr class="row-odd"><td>1</td>
6117 <td>DEV_TIMER8_TIMER_TCLK_CLK</td>
6118 <td>Input muxed clock</td>
6119 </tr>
6120 <tr class="row-even"><td>2</td>
6121 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
6122 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6123 </tr>
6124 <tr class="row-odd"><td>3</td>
6125 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
6126 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6127 </tr>
6128 <tr class="row-even"><td>4</td>
6129 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
6130 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6131 </tr>
6132 <tr class="row-odd"><td>5</td>
6133 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
6134 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6135 </tr>
6136 <tr class="row-even"><td>6</td>
6137 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
6138 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6139 </tr>
6140 <tr class="row-odd"><td>7</td>
6141 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
6142 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6143 </tr>
6144 <tr class="row-even"><td>8</td>
6145 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
6146 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6147 </tr>
6148 <tr class="row-odd"><td>9</td>
6149 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
6150 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6151 </tr>
6152 <tr class="row-even"><td>10</td>
6153 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
6154 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6155 </tr>
6156 <tr class="row-odd"><td>11</td>
6157 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
6158 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6159 </tr>
6160 <tr class="row-even"><td>12</td>
6161 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
6162 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6163 </tr>
6164 <tr class="row-odd"><td>13</td>
6165 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
6166 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6167 </tr>
6168 <tr class="row-even"><td>14</td>
6169 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
6170 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6171 </tr>
6172 <tr class="row-odd"><td>15</td>
6173 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
6174 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6175 </tr>
6176 <tr class="row-even"><td>16</td>
6177 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
6178 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6179 </tr>
6180 <tr class="row-odd"><td>17</td>
6181 <td>DEV_TIMER8_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
6182 <td>Parent input clock option to DEV_TIMER8_TIMER_TCLK_CLK</td>
6183 </tr>
6184 <tr class="row-even"><td>18</td>
6185 <td>DEV_TIMER8_TIMER_PWM</td>
6186 <td>Output clock</td>
6187 </tr>
6188 </tbody>
6189 </table>
6190 </div>
6191 <div class="section" id="clocks-for-timer9-device">
6192 <span id="soc-doc-am64x-public-clks-timer9"></span><h3>Clocks for TIMER9 Device<a class="headerlink" href="#clocks-for-timer9-device" title="Permalink to this headline">¶</a></h3>
6193 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMER9</span></a> (ID = 45)</p>
6194 <p>Following is a mapping of Clocks IDs to function:</p>
6195 <table border="1" class="docutils">
6196 <colgroup>
6197 <col width="8%" />
6198 <col width="53%" />
6199 <col width="38%" />
6200 </colgroup>
6201 <thead valign="bottom">
6202 <tr class="row-odd"><th class="head">Clock ID</th>
6203 <th class="head">Name</th>
6204 <th class="head">Function</th>
6205 </tr>
6206 </thead>
6207 <tbody valign="top">
6208 <tr class="row-even"><td>0</td>
6209 <td>DEV_TIMER9_TIMER_HCLK_CLK</td>
6210 <td>Input clock</td>
6211 </tr>
6212 <tr class="row-odd"><td>1</td>
6213 <td>DEV_TIMER9_TIMER_TCLK_CLK</td>
6214 <td>Input muxed clock</td>
6215 </tr>
6216 <tr class="row-even"><td>2</td>
6217 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
6218 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6219 </tr>
6220 <tr class="row-odd"><td>3</td>
6221 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_HSDIV0_16FFT_MCU_32KHZ_GEN_0_HSDIVOUT0_CLK8</td>
6222 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6223 </tr>
6224 <tr class="row-even"><td>4</td>
6225 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF0</td>
6226 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6227 </tr>
6228 <tr class="row-odd"><td>5</td>
6229 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_MAIN_0_CPTS_GENF1</td>
6230 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6231 </tr>
6232 <tr class="row-even"><td>6</td>
6233 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF1</td>
6234 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6235 </tr>
6236 <tr class="row-odd"><td>7</td>
6237 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF2</td>
6238 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6239 </tr>
6240 <tr class="row-even"><td>8</td>
6241 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF3</td>
6242 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6243 </tr>
6244 <tr class="row-odd"><td>9</td>
6245 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_K3_CPTS_MAIN_0_CPTS_GENF4</td>
6246 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6247 </tr>
6248 <tr class="row-even"><td>10</td>
6249 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK</td>
6250 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6251 </tr>
6252 <tr class="row-odd"><td>11</td>
6253 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT</td>
6254 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6255 </tr>
6256 <tr class="row-even"><td>12</td>
6257 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_BOARD_0_MCU_EXT_REFCLK0_OUT</td>
6258 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6259 </tr>
6260 <tr class="row-odd"><td>13</td>
6261 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT</td>
6262 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6263 </tr>
6264 <tr class="row-even"><td>14</td>
6265 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_BOARD_0_CPTS0_RFT_CLK_OUT</td>
6266 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6267 </tr>
6268 <tr class="row-odd"><td>15</td>
6269 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT</td>
6270 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6271 </tr>
6272 <tr class="row-even"><td>16</td>
6273 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT3_CLK</td>
6274 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6275 </tr>
6276 <tr class="row-odd"><td>17</td>
6277 <td>DEV_TIMER9_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_2_HSDIVOUT6_CLK</td>
6278 <td>Parent input clock option to DEV_TIMER9_TIMER_TCLK_CLK</td>
6279 </tr>
6280 <tr class="row-even"><td>18</td>
6281 <td>DEV_TIMER9_TIMER_PWM</td>
6282 <td>Output clock</td>
6283 </tr>
6284 </tbody>
6285 </table>
6286 </div>
6287 <div class="section" id="clocks-for-timermgr0-device">
6288 <span id="soc-doc-am64x-public-clks-timermgr0"></span><h3>Clocks for TIMERMGR0 Device<a class="headerlink" href="#clocks-for-timermgr0-device" title="Permalink to this headline">¶</a></h3>
6289 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMERMGR0</span></a> (ID = 151)</p>
6290 <p>Following is a mapping of Clocks IDs to function:</p>
6291 <table border="1" class="docutils">
6292 <colgroup>
6293 <col width="24%" />
6294 <col width="49%" />
6295 <col width="27%" />
6296 </colgroup>
6297 <thead valign="bottom">
6298 <tr class="row-odd"><th class="head">Clock ID</th>
6299 <th class="head">Name</th>
6300 <th class="head">Function</th>
6301 </tr>
6302 </thead>
6303 <tbody valign="top">
6304 <tr class="row-even"><td>0</td>
6305 <td>DEV_TIMERMGR0_VCLK_CLK</td>
6306 <td>Input clock</td>
6307 </tr>
6308 </tbody>
6309 </table>
6310 </div>
6311 <div class="section" id="clocks-for-timesync-event-introuter0-device">
6312 <span id="soc-doc-am64x-public-clks-timesync-event-introuter0"></span><h3>Clocks for TIMESYNC_EVENT_INTROUTER0 Device<a class="headerlink" href="#clocks-for-timesync-event-introuter0-device" title="Permalink to this headline">¶</a></h3>
6313 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_TIMESYNC_EVENT_INTROUTER0</span></a> (ID = 6)</p>
6314 <p>Following is a mapping of Clocks IDs to function:</p>
6315 <table border="1" class="docutils">
6316 <colgroup>
6317 <col width="18%" />
6318 <col width="62%" />
6319 <col width="20%" />
6320 </colgroup>
6321 <thead valign="bottom">
6322 <tr class="row-odd"><th class="head">Clock ID</th>
6323 <th class="head">Name</th>
6324 <th class="head">Function</th>
6325 </tr>
6326 </thead>
6327 <tbody valign="top">
6328 <tr class="row-even"><td>0</td>
6329 <td>DEV_TIMESYNC_EVENT_INTROUTER0_INTR_CLK</td>
6330 <td>Input clock</td>
6331 </tr>
6332 </tbody>
6333 </table>
6334 </div>
6335 <div class="section" id="clocks-for-uart0-device">
6336 <span id="soc-doc-am64x-public-clks-uart0"></span><h3>Clocks for UART0 Device<a class="headerlink" href="#clocks-for-uart0-device" title="Permalink to this headline">¶</a></h3>
6337 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_UART0</span></a> (ID = 146)</p>
6338 <p>Following is a mapping of Clocks IDs to function:</p>
6339 <table border="1" class="docutils">
6340 <colgroup>
6341 <col width="10%" />
6342 <col width="52%" />
6343 <col width="39%" />
6344 </colgroup>
6345 <thead valign="bottom">
6346 <tr class="row-odd"><th class="head">Clock ID</th>
6347 <th class="head">Name</th>
6348 <th class="head">Function</th>
6349 </tr>
6350 </thead>
6351 <tbody valign="top">
6352 <tr class="row-even"><td>0</td>
6353 <td>DEV_UART0_FCLK_CLK</td>
6354 <td>Input muxed clock</td>
6355 </tr>
6356 <tr class="row-odd"><td>1</td>
6357 <td>DEV_UART0_FCLK_CLK_PARENT_USART_PROGRAMMABLE_CLOCK_DIVIDER_OUT0</td>
6358 <td>Parent input clock option to DEV_UART0_FCLK_CLK</td>
6359 </tr>
6360 <tr class="row-even"><td>2</td>
6361 <td>DEV_UART0_FCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT1_CLK</td>
6362 <td>Parent input clock option to DEV_UART0_FCLK_CLK</td>
6363 </tr>
6364 <tr class="row-odd"><td>3</td>
6365 <td>DEV_UART0_VBUSP_CLK</td>
6366 <td>Input clock</td>
6367 </tr>
6368 </tbody>
6369 </table>
6370 </div>
6371 <div class="section" id="clocks-for-uart1-device">
6372 <span id="soc-doc-am64x-public-clks-uart1"></span><h3>Clocks for UART1 Device<a class="headerlink" href="#clocks-for-uart1-device" title="Permalink to this headline">¶</a></h3>
6373 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_UART1</span></a> (ID = 152)</p>
6374 <p>Following is a mapping of Clocks IDs to function:</p>
6375 <table border="1" class="docutils">
6376 <colgroup>
6377 <col width="10%" />
6378 <col width="52%" />
6379 <col width="39%" />
6380 </colgroup>
6381 <thead valign="bottom">
6382 <tr class="row-odd"><th class="head">Clock ID</th>
6383 <th class="head">Name</th>
6384 <th class="head">Function</th>
6385 </tr>
6386 </thead>
6387 <tbody valign="top">
6388 <tr class="row-even"><td>0</td>
6389 <td>DEV_UART1_FCLK_CLK</td>
6390 <td>Input muxed clock</td>
6391 </tr>
6392 <tr class="row-odd"><td>1</td>
6393 <td>DEV_UART1_FCLK_CLK_PARENT_USART_PROGRAMMABLE_CLOCK_DIVIDER_OUT1</td>
6394 <td>Parent input clock option to DEV_UART1_FCLK_CLK</td>
6395 </tr>
6396 <tr class="row-even"><td>2</td>
6397 <td>DEV_UART1_FCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT1_CLK</td>
6398 <td>Parent input clock option to DEV_UART1_FCLK_CLK</td>
6399 </tr>
6400 <tr class="row-odd"><td>3</td>
6401 <td>DEV_UART1_VBUSP_CLK</td>
6402 <td>Input clock</td>
6403 </tr>
6404 </tbody>
6405 </table>
6406 </div>
6407 <div class="section" id="clocks-for-uart2-device">
6408 <span id="soc-doc-am64x-public-clks-uart2"></span><h3>Clocks for UART2 Device<a class="headerlink" href="#clocks-for-uart2-device" title="Permalink to this headline">¶</a></h3>
6409 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_UART2</span></a> (ID = 153)</p>
6410 <p>Following is a mapping of Clocks IDs to function:</p>
6411 <table border="1" class="docutils">
6412 <colgroup>
6413 <col width="10%" />
6414 <col width="52%" />
6415 <col width="39%" />
6416 </colgroup>
6417 <thead valign="bottom">
6418 <tr class="row-odd"><th class="head">Clock ID</th>
6419 <th class="head">Name</th>
6420 <th class="head">Function</th>
6421 </tr>
6422 </thead>
6423 <tbody valign="top">
6424 <tr class="row-even"><td>0</td>
6425 <td>DEV_UART2_FCLK_CLK</td>
6426 <td>Input muxed clock</td>
6427 </tr>
6428 <tr class="row-odd"><td>1</td>
6429 <td>DEV_UART2_FCLK_CLK_PARENT_USART_PROGRAMMABLE_CLOCK_DIVIDER_OUT2</td>
6430 <td>Parent input clock option to DEV_UART2_FCLK_CLK</td>
6431 </tr>
6432 <tr class="row-even"><td>2</td>
6433 <td>DEV_UART2_FCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT1_CLK</td>
6434 <td>Parent input clock option to DEV_UART2_FCLK_CLK</td>
6435 </tr>
6436 <tr class="row-odd"><td>3</td>
6437 <td>DEV_UART2_VBUSP_CLK</td>
6438 <td>Input clock</td>
6439 </tr>
6440 </tbody>
6441 </table>
6442 </div>
6443 <div class="section" id="clocks-for-uart3-device">
6444 <span id="soc-doc-am64x-public-clks-uart3"></span><h3>Clocks for UART3 Device<a class="headerlink" href="#clocks-for-uart3-device" title="Permalink to this headline">¶</a></h3>
6445 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_UART3</span></a> (ID = 154)</p>
6446 <p>Following is a mapping of Clocks IDs to function:</p>
6447 <table border="1" class="docutils">
6448 <colgroup>
6449 <col width="10%" />
6450 <col width="52%" />
6451 <col width="39%" />
6452 </colgroup>
6453 <thead valign="bottom">
6454 <tr class="row-odd"><th class="head">Clock ID</th>
6455 <th class="head">Name</th>
6456 <th class="head">Function</th>
6457 </tr>
6458 </thead>
6459 <tbody valign="top">
6460 <tr class="row-even"><td>0</td>
6461 <td>DEV_UART3_FCLK_CLK</td>
6462 <td>Input muxed clock</td>
6463 </tr>
6464 <tr class="row-odd"><td>1</td>
6465 <td>DEV_UART3_FCLK_CLK_PARENT_USART_PROGRAMMABLE_CLOCK_DIVIDER_OUT3</td>
6466 <td>Parent input clock option to DEV_UART3_FCLK_CLK</td>
6467 </tr>
6468 <tr class="row-even"><td>2</td>
6469 <td>DEV_UART3_FCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT1_CLK</td>
6470 <td>Parent input clock option to DEV_UART3_FCLK_CLK</td>
6471 </tr>
6472 <tr class="row-odd"><td>3</td>
6473 <td>DEV_UART3_VBUSP_CLK</td>
6474 <td>Input clock</td>
6475 </tr>
6476 </tbody>
6477 </table>
6478 </div>
6479 <div class="section" id="clocks-for-uart4-device">
6480 <span id="soc-doc-am64x-public-clks-uart4"></span><h3>Clocks for UART4 Device<a class="headerlink" href="#clocks-for-uart4-device" title="Permalink to this headline">¶</a></h3>
6481 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_UART4</span></a> (ID = 155)</p>
6482 <p>Following is a mapping of Clocks IDs to function:</p>
6483 <table border="1" class="docutils">
6484 <colgroup>
6485 <col width="10%" />
6486 <col width="52%" />
6487 <col width="39%" />
6488 </colgroup>
6489 <thead valign="bottom">
6490 <tr class="row-odd"><th class="head">Clock ID</th>
6491 <th class="head">Name</th>
6492 <th class="head">Function</th>
6493 </tr>
6494 </thead>
6495 <tbody valign="top">
6496 <tr class="row-even"><td>0</td>
6497 <td>DEV_UART4_FCLK_CLK</td>
6498 <td>Input muxed clock</td>
6499 </tr>
6500 <tr class="row-odd"><td>1</td>
6501 <td>DEV_UART4_FCLK_CLK_PARENT_USART_PROGRAMMABLE_CLOCK_DIVIDER_OUT4</td>
6502 <td>Parent input clock option to DEV_UART4_FCLK_CLK</td>
6503 </tr>
6504 <tr class="row-even"><td>2</td>
6505 <td>DEV_UART4_FCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT1_CLK</td>
6506 <td>Parent input clock option to DEV_UART4_FCLK_CLK</td>
6507 </tr>
6508 <tr class="row-odd"><td>3</td>
6509 <td>DEV_UART4_VBUSP_CLK</td>
6510 <td>Input clock</td>
6511 </tr>
6512 </tbody>
6513 </table>
6514 </div>
6515 <div class="section" id="clocks-for-uart5-device">
6516 <span id="soc-doc-am64x-public-clks-uart5"></span><h3>Clocks for UART5 Device<a class="headerlink" href="#clocks-for-uart5-device" title="Permalink to this headline">¶</a></h3>
6517 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_UART5</span></a> (ID = 156)</p>
6518 <p>Following is a mapping of Clocks IDs to function:</p>
6519 <table border="1" class="docutils">
6520 <colgroup>
6521 <col width="10%" />
6522 <col width="52%" />
6523 <col width="39%" />
6524 </colgroup>
6525 <thead valign="bottom">
6526 <tr class="row-odd"><th class="head">Clock ID</th>
6527 <th class="head">Name</th>
6528 <th class="head">Function</th>
6529 </tr>
6530 </thead>
6531 <tbody valign="top">
6532 <tr class="row-even"><td>0</td>
6533 <td>DEV_UART5_FCLK_CLK</td>
6534 <td>Input muxed clock</td>
6535 </tr>
6536 <tr class="row-odd"><td>1</td>
6537 <td>DEV_UART5_FCLK_CLK_PARENT_USART_PROGRAMMABLE_CLOCK_DIVIDER_OUT5</td>
6538 <td>Parent input clock option to DEV_UART5_FCLK_CLK</td>
6539 </tr>
6540 <tr class="row-even"><td>2</td>
6541 <td>DEV_UART5_FCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT1_CLK</td>
6542 <td>Parent input clock option to DEV_UART5_FCLK_CLK</td>
6543 </tr>
6544 <tr class="row-odd"><td>3</td>
6545 <td>DEV_UART5_VBUSP_CLK</td>
6546 <td>Input clock</td>
6547 </tr>
6548 </tbody>
6549 </table>
6550 </div>
6551 <div class="section" id="clocks-for-uart6-device">
6552 <span id="soc-doc-am64x-public-clks-uart6"></span><h3>Clocks for UART6 Device<a class="headerlink" href="#clocks-for-uart6-device" title="Permalink to this headline">¶</a></h3>
6553 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_UART6</span></a> (ID = 158)</p>
6554 <p>Following is a mapping of Clocks IDs to function:</p>
6555 <table border="1" class="docutils">
6556 <colgroup>
6557 <col width="10%" />
6558 <col width="52%" />
6559 <col width="39%" />
6560 </colgroup>
6561 <thead valign="bottom">
6562 <tr class="row-odd"><th class="head">Clock ID</th>
6563 <th class="head">Name</th>
6564 <th class="head">Function</th>
6565 </tr>
6566 </thead>
6567 <tbody valign="top">
6568 <tr class="row-even"><td>0</td>
6569 <td>DEV_UART6_FCLK_CLK</td>
6570 <td>Input muxed clock</td>
6571 </tr>
6572 <tr class="row-odd"><td>1</td>
6573 <td>DEV_UART6_FCLK_CLK_PARENT_USART_PROGRAMMABLE_CLOCK_DIVIDER_OUT6</td>
6574 <td>Parent input clock option to DEV_UART6_FCLK_CLK</td>
6575 </tr>
6576 <tr class="row-even"><td>2</td>
6577 <td>DEV_UART6_FCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_1_HSDIVOUT1_CLK</td>
6578 <td>Parent input clock option to DEV_UART6_FCLK_CLK</td>
6579 </tr>
6580 <tr class="row-odd"><td>3</td>
6581 <td>DEV_UART6_VBUSP_CLK</td>
6582 <td>Input clock</td>
6583 </tr>
6584 </tbody>
6585 </table>
6586 </div>
6587 <div class="section" id="clocks-for-usb0-device">
6588 <span id="soc-doc-am64x-public-clks-usb0"></span><h3>Clocks for USB0 Device<a class="headerlink" href="#clocks-for-usb0-device" title="Permalink to this headline">¶</a></h3>
6589 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_USB0</span></a> (ID = 161)</p>
6590 <p>Following is a mapping of Clocks IDs to function:</p>
6591 <table border="1" class="docutils">
6592 <colgroup>
6593 <col width="9%" />
6594 <col width="50%" />
6595 <col width="41%" />
6596 </colgroup>
6597 <thead valign="bottom">
6598 <tr class="row-odd"><th class="head">Clock ID</th>
6599 <th class="head">Name</th>
6600 <th class="head">Function</th>
6601 </tr>
6602 </thead>
6603 <tbody valign="top">
6604 <tr class="row-even"><td>0</td>
6605 <td>DEV_USB0_ACLK_CLK</td>
6606 <td>Input clock</td>
6607 </tr>
6608 <tr class="row-odd"><td>1</td>
6609 <td>DEV_USB0_CLK_LPM_CLK</td>
6610 <td>Input clock</td>
6611 </tr>
6612 <tr class="row-even"><td>2</td>
6613 <td>DEV_USB0_PCLK_CLK</td>
6614 <td>Input clock</td>
6615 </tr>
6616 <tr class="row-odd"><td>3</td>
6617 <td>DEV_USB0_PIPE_REFCLK</td>
6618 <td>Input clock</td>
6619 </tr>
6620 <tr class="row-even"><td>4</td>
6621 <td>DEV_USB0_PIPE_RXCLK</td>
6622 <td>Input clock</td>
6623 </tr>
6624 <tr class="row-odd"><td>5</td>
6625 <td>DEV_USB0_PIPE_RXFCLK</td>
6626 <td>Input clock</td>
6627 </tr>
6628 <tr class="row-even"><td>6</td>
6629 <td>DEV_USB0_PIPE_TXFCLK</td>
6630 <td>Input clock</td>
6631 </tr>
6632 <tr class="row-odd"><td>7</td>
6633 <td>DEV_USB0_PIPE_TXMCLK</td>
6634 <td>Input clock</td>
6635 </tr>
6636 <tr class="row-even"><td>8</td>
6637 <td>DEV_USB0_USB2_APB_PCLK_CLK</td>
6638 <td>Input clock</td>
6639 </tr>
6640 <tr class="row-odd"><td>9</td>
6641 <td>DEV_USB0_USB2_REFCLOCK_CLK</td>
6642 <td>Input muxed clock</td>
6643 </tr>
6644 <tr class="row-even"><td>10</td>
6645 <td>DEV_USB0_USB2_REFCLOCK_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT</td>
6646 <td>Parent input clock option to DEV_USB0_USB2_REFCLOCK_CLK</td>
6647 </tr>
6648 <tr class="row-odd"><td>11</td>
6649 <td>DEV_USB0_USB2_REFCLOCK_CLK_PARENT_HSDIV4_16FFT_MAIN_2_HSDIVOUT4_CLK</td>
6650 <td>Parent input clock option to DEV_USB0_USB2_REFCLOCK_CLK</td>
6651 </tr>
6652 <tr class="row-even"><td>12</td>
6653 <td>DEV_USB0_PIPE_TXCLK</td>
6654 <td>Output clock</td>
6655 </tr>
6656 </tbody>
6657 </table>
6658 </div>
6659 <div class="section" id="clocks-for-vtm0-device">
6660 <span id="soc-doc-am64x-public-clks-vtm0"></span><h3>Clocks for VTM0 Device<a class="headerlink" href="#clocks-for-vtm0-device" title="Permalink to this headline">¶</a></h3>
6661 <p>Device: <a class="reference internal" href="devices.html#soc-doc-am64x-public-devices-desc-device-list"><span class="std std-ref">AM64X_DEV_VTM0</span></a> (ID = 95)</p>
6662 <p>Following is a mapping of Clocks IDs to function:</p>
6663 <table border="1" class="docutils">
6664 <colgroup>
6665 <col width="25%" />
6666 <col width="48%" />
6667 <col width="27%" />
6668 </colgroup>
6669 <thead valign="bottom">
6670 <tr class="row-odd"><th class="head">Clock ID</th>
6671 <th class="head">Name</th>
6672 <th class="head">Function</th>
6673 </tr>
6674 </thead>
6675 <tbody valign="top">
6676 <tr class="row-even"><td>0</td>
6677 <td>DEV_VTM0_FIX_REF2_CLK</td>
6678 <td>Input clock</td>
6679 </tr>
6680 <tr class="row-odd"><td>1</td>
6681 <td>DEV_VTM0_FIX_REF_CLK</td>
6682 <td>Input clock</td>
6683 </tr>
6684 <tr class="row-even"><td>2</td>
6685 <td>DEV_VTM0_VBUSP_CLK</td>
6686 <td>Input clock</td>
6687 </tr>
6688 </tbody>
6689 </table>
6690 </div>
6691 </div>
6692 </div>
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