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119 <li class="toctree-l4"><a class="reference internal" href="#introduction">Introduction</a></li>
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182 <div class="section" id="am65x-sr2-dma-device-descriptions">
183 <h1>AM65X_SR2 DMA Device Descriptions<a class="headerlink" href="#am65x-sr2-dma-device-descriptions" title="Permalink to this headline">¶</a></h1>
184 <div class="section" id="introduction">
185 <h2>Introduction<a class="headerlink" href="#introduction" title="Permalink to this headline">¶</a></h2>
186 <p>This chapter provides information on the DMA devices in the AM65X_SR2 SoC. Some
187 System Firmware TISCI messages take device specific inputs. This chapter
188 provides information on the valid values for DMA TISCI message parameters.</p>
189 </div>
190 <div class="section" id="dma-device-ids">
191 <span id="pub-soc-am65x-sr2-dma-device-ids"></span><h2>DMA Device IDs<a class="headerlink" href="#dma-device-ids" title="Permalink to this headline">¶</a></h2>
192 <p>Some System Firmware TISCI message APIs require the DMA device ID be provided as
193 part of the request. Based on <a class="reference internal" href="devices.html"><span class="doc">AM65X_SR2 Device IDs</span></a> these are
194 the valid DMA device IDs.</p>
195 <table border="1" class="docutils">
196 <colgroup>
197 <col width="61%" />
198 <col width="39%" />
199 </colgroup>
200 <thead valign="bottom">
201 <tr class="row-odd"><th class="head">DMA Device Name</th>
202 <th class="head">DMA Device ID</th>
203 </tr>
204 </thead>
205 <tbody valign="top">
206 <tr class="row-even"><td>AM6_DEV_NAVSS0_UDMAP0</td>
207 <td>188</td>
208 </tr>
209 <tr class="row-odd"><td>AM6_DEV_MCU_NAVSS0_UDMAP0</td>
210 <td>194</td>
211 </tr>
212 </tbody>
213 </table>
214 </div>
215 <div class="section" id="dma-channel-and-flow-indices">
216 <span id="pub-soc-am65x-sr2-dma-channels-and-flows"></span><h2>DMA Channel and Flow Indices<a class="headerlink" href="#dma-channel-and-flow-indices" title="Permalink to this headline">¶</a></h2>
217 <p>This section describes valid DMA channel indexes for each DMA channel type.
218 Receive flow index range type information is also described if applicable to the
219 DMA being described.</p>
220 <div class="admonition warning">
221 <p class="first admonition-title">Warning</p>
222 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
223 host within the RM Board Configuration resource assignment array. The RM
224 Board Configuration is rejected if an overlap with a reserved resource is
225 detected.</p>
226 </div>
227 <p><strong>navss0_udmap0</strong></p>
228 <table border="1" class="docutils">
229 <colgroup>
230 <col width="57%" />
231 <col width="43%" />
232 </colgroup>
233 <thead valign="bottom">
234 <tr class="row-odd"><th class="head">Tx Channel Type</th>
235 <th class="head">Tx Channel Index Range</th>
236 </tr>
237 </thead>
238 <tbody valign="top">
239 <tr class="row-even"><td>TX_HCHAN
240 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
241 <td>0 to 0</td>
242 </tr>
243 <tr class="row-odd"><td>TX_HCHAN</td>
244 <td>1 to 7</td>
245 </tr>
246 <tr class="row-even"><td>TX_CHAN</td>
247 <td>8 to 119</td>
248 </tr>
249 <tr class="row-odd"><td>TX_ECHAN</td>
250 <td>120 to 151</td>
251 </tr>
252 </tbody>
253 </table>
254 <table border="1" class="docutils">
255 <colgroup>
256 <col width="57%" />
257 <col width="43%" />
258 </colgroup>
259 <thead valign="bottom">
260 <tr class="row-odd"><th class="head">Rx Channel Type</th>
261 <th class="head">Rx Channel Index Range</th>
262 </tr>
263 </thead>
264 <tbody valign="top">
265 <tr class="row-even"><td>RX_HCHAN
266 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
267 <td>0 to 1</td>
268 </tr>
269 <tr class="row-odd"><td>RX_HCHAN</td>
270 <td>2 to 7</td>
271 </tr>
272 <tr class="row-even"><td>RX_CHAN</td>
273 <td>8 to 149</td>
274 </tr>
275 </tbody>
276 </table>
277 <p><strong>NOTE</strong>: The host that owns configurable, also known as common or shared, flows
278 is able to delegate them to another host for configuration in order to aid some
279 use case configurations. The configurable flows can be delegated using
280 <a class="reference internal" href="../../2_tisci_msgs/rm/rm_udmap.html#pub-rm-public-udmap-flow-delegate"><span class="std std-ref">TISCI_MSG_RM_UDMAP_FLOW_DELEGATE</span></a></p>
281 <table border="1" class="docutils">
282 <colgroup>
283 <col width="60%" />
284 <col width="40%" />
285 </colgroup>
286 <thead valign="bottom">
287 <tr class="row-odd"><th class="head">Rx Flow Type</th>
288 <th class="head">Rx Flow Index Range</th>
289 </tr>
290 </thead>
291 <tbody valign="top">
292 <tr class="row-even"><td>DEFAULT
293 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
294 <td>0 to 1</td>
295 </tr>
296 <tr class="row-odd"><td>DEFAULT</td>
297 <td>2 to 149</td>
298 </tr>
299 <tr class="row-even"><td>CONFIGURABLE</td>
300 <td>150 to 299</td>
301 </tr>
302 </tbody>
303 </table>
304 <p><strong>mcu_navss0_udmap0</strong></p>
305 <table border="1" class="docutils">
306 <colgroup>
307 <col width="42%" />
308 <col width="58%" />
309 </colgroup>
310 <thead valign="bottom">
311 <tr class="row-odd"><th class="head">Tx Channel Type</th>
312 <th class="head">Tx Channel Index Range</th>
313 </tr>
314 </thead>
315 <tbody valign="top">
316 <tr class="row-even"><td>TX_HCHAN</td>
317 <td>0 to 1</td>
318 </tr>
319 <tr class="row-odd"><td>TX_CHAN</td>
320 <td>2 to 47</td>
321 </tr>
322 </tbody>
323 </table>
324 <table border="1" class="docutils">
325 <colgroup>
326 <col width="42%" />
327 <col width="58%" />
328 </colgroup>
329 <thead valign="bottom">
330 <tr class="row-odd"><th class="head">Rx Channel Type</th>
331 <th class="head">Rx Channel Index Range</th>
332 </tr>
333 </thead>
334 <tbody valign="top">
335 <tr class="row-even"><td>RX_HCHAN</td>
336 <td>0 to 1</td>
337 </tr>
338 <tr class="row-odd"><td>RX_CHAN</td>
339 <td>2 to 47</td>
340 </tr>
341 </tbody>
342 </table>
343 <p><strong>NOTE</strong>: The host that owns configurable, also known as common or shared, flows
344 is able to delegate them to another host for configuration in order to aid some
345 use case configurations. The configurable flows can be delegated using
346 <a class="reference internal" href="../../2_tisci_msgs/rm/rm_udmap.html#pub-rm-public-udmap-flow-delegate"><span class="std std-ref">TISCI_MSG_RM_UDMAP_FLOW_DELEGATE</span></a></p>
347 <table border="1" class="docutils">
348 <colgroup>
349 <col width="41%" />
350 <col width="59%" />
351 </colgroup>
352 <thead valign="bottom">
353 <tr class="row-odd"><th class="head">Rx Flow Type</th>
354 <th class="head">Rx Flow Index Range</th>
355 </tr>
356 </thead>
357 <tbody valign="top">
358 <tr class="row-even"><td>DEFAULT</td>
359 <td>0 to 47</td>
360 </tr>
361 <tr class="row-odd"><td>CONFIGURABLE</td>
362 <td>48 to 95</td>
363 </tr>
364 </tbody>
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