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180 <h1>AM6 Processor Descriptions<a class="headerlink" href="#am6-processor-descriptions" title="Permalink to this headline">¶</a></h1>
181 <div class="section" id="introduction">
182 <span id="soc-doc-am65x-sr2-public-proc-desc-intro"></span><h2>Introduction<a class="headerlink" href="#introduction" title="Permalink to this headline">¶</a></h2>
183 <p>This chapter provides information of Processor and Host IDs that are permitted
184 in the AM6 SoC. These Processor IDs represent an actual physical processor on
185 the SoC</p>
186 <p>NOTE: This should not be confused with HOST_ID.</p>
187 </div>
188 <div class="section" id="enumeration-of-processor-ids">
189 <span id="soc-doc-am65x-sr2-public-proc-desc-processors-list"></span><h2>Enumeration of Processor IDs<a class="headerlink" href="#enumeration-of-processor-ids" title="Permalink to this headline">¶</a></h2>
190 <table border="1" class="docutils">
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197 <tr class="row-odd"><th class="head">Processor ID</th>
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203 <tr class="row-even"><td>0x20</td>
204 <td>A53_CL0_C0</td>
205 <td>COMPUTE_CLUSTER_MSMC0: (Cluster 0 Processor 0)</td>
206 </tr>
207 <tr class="row-odd"><td>0x21</td>
208 <td>A53_CL0_C1</td>
209 <td>COMPUTE_CLUSTER_MSMC0: (Cluster 0 Processor 1)</td>
210 </tr>
211 <tr class="row-even"><td>0x22</td>
212 <td>A53_CL1_C0</td>
213 <td>COMPUTE_CLUSTER_MSMC0: (Cluster 1 Processor 0)</td>
214 </tr>
215 <tr class="row-odd"><td>0x23</td>
216 <td>A53_CL1_C1</td>
217 <td>COMPUTE_CLUSTER_MSMC0: (Cluster 1 Processor 1)</td>
218 </tr>
219 <tr class="row-even"><td>0x01</td>
220 <td>R5_CL0_C0</td>
221 <td>MCU_SEC_MMR0: (Cluster 0 Processor 0)</td>
222 </tr>
223 <tr class="row-odd"><td>0x02</td>
224 <td>R5_CL0_C1</td>
225 <td>MCU_SEC_MMR0: (Cluster 0 Processor 1)</td>
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