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 113 <li class="toctree-l4"><a class="reference internal" href="#introduction">Introduction</a></li>
 114 <li class="toctree-l4"><a class="reference internal" href="#enumeration-of-device-ids">Enumeration of Device IDs</a></li>
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 122 <li class="toctree-l3"><a class="reference internal" href="dma_cfg.html">J7200 DMA Device Descriptions</a></li>
 123 <li class="toctree-l3"><a class="reference internal" href="psil_cfg.html">J7200 PSI-L Device Descriptions</a></li>
 124 <li class="toctree-l3"><a class="reference internal" href="proxy_cfg.html">J7200 Proxy Device Descriptions</a></li>
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 179 <h1>J7200 Devices Descriptions<a class="headerlink" href="#j7200-devices-descriptions" title="Permalink to this headline">¶</a></h1>
 180 <div class="section" id="introduction">
 181 <span id="soc-doc-j7200-public-devices-desc-intro"></span><h2>Introduction<a class="headerlink" href="#introduction" title="Permalink to this headline">¶</a></h2>
 182 <p>This chapter provides information on Device IDs that are permitted in the j7200
 183 SoC.  The device IDs represent SoC subsystems that can be modified via DMSC
 184 TISCI message APIs.  Some Secure, Power, and Resource Management DMSC subsystem
 185 TISCI message APIs define a device ID as a parameter allowing a user to specify
 186 management of a particular SoC subsystem.</p>
 187 </div>
 188 <div class="section" id="enumeration-of-device-ids">
 189 <span id="soc-doc-j7200-public-devices-desc-device-list"></span><h2>Enumeration of Device IDs<a class="headerlink" href="#enumeration-of-device-ids" title="Permalink to this headline">¶</a></h2>
 190 <table border="1" class="docutils">
 191 <colgroup>
 192 <col width="23%" />
 193 <col width="77%" />
 194 </colgroup>
 195 <thead valign="bottom">
 196 <tr class="row-odd"><th class="head">Device ID</th>
 197 <th class="head">Device Name</th>
 198 </tr>
 199 </thead>
 200 <tbody valign="top">
 201 <tr class="row-even"><td>0</td>
 202 <td>J7200_DEV_MCU_ADC0</td>
 203 </tr>
 204 <tr class="row-odd"><td>1</td>
 205 <td>J7200_DEV_MCU_ADC1</td>
 206 </tr>
 207 <tr class="row-even"><td>2</td>
 208 <td>J7200_DEV_ATL0</td>
 209 </tr>
 210 <tr class="row-odd"><td>3</td>
 211 <td>J7200_DEV_COMPUTE_CLUSTER0</td>
 212 </tr>
 213 <tr class="row-even"><td>4</td>
 214 <td>J7200_DEV_A72SS0_CORE0</td>
 215 </tr>
 216 <tr class="row-odd"><td>5</td>
 217 <td>J7200_DEV_COMPUTE_CLUSTER0_CFG_WRAP</td>
 218 </tr>
 219 <tr class="row-even"><td>6</td>
 220 <td>J7200_DEV_COMPUTE_CLUSTER0_CLEC</td>
 221 </tr>
 222 <tr class="row-odd"><td>7</td>
 223 <td>J7200_DEV_COMPUTE_CLUSTER0_CORE_CORE</td>
 224 </tr>
 225 <tr class="row-even"><td>8</td>
 226 <td>J7200_DEV_DDR0</td>
 227 </tr>
 228 <tr class="row-odd"><td>9</td>
 229 <td>J7200_DEV_COMPUTE_CLUSTER0_DEBUG_WRAP</td>
 230 </tr>
 231 <tr class="row-even"><td>10</td>
 232 <td>J7200_DEV_COMPUTE_CLUSTER0_DIVH2_DIVH0</td>
 233 </tr>
 234 <tr class="row-odd"><td>11</td>
 235 <td>J7200_DEV_COMPUTE_CLUSTER0_DIVP_TFT0</td>
 236 </tr>
 237 <tr class="row-even"><td>12</td>
 238 <td>J7200_DEV_COMPUTE_CLUSTER0_DMSC_WRAP</td>
 239 </tr>
 240 <tr class="row-odd"><td>13</td>
 241 <td>J7200_DEV_COMPUTE_CLUSTER0_EN_MSMC_DOMAIN</td>
 242 </tr>
 243 <tr class="row-even"><td>14</td>
 244 <td>J7200_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
 245 </tr>
 246 <tr class="row-odd"><td>17</td>
 247 <td>J7200_DEV_COMPUTE_CLUSTER0_PBIST_WRAP</td>
 248 </tr>
 249 <tr class="row-even"><td>18</td>
 250 <td>J7200_DEV_MCU_CPSW0</td>
 251 </tr>
 252 <tr class="row-odd"><td>19</td>
 253 <td>J7200_DEV_CPSW0</td>
 254 </tr>
 255 <tr class="row-even"><td>20</td>
 256 <td>J7200_DEV_CPT2_AGGR0</td>
 257 </tr>
 258 <tr class="row-odd"><td>21</td>
 259 <td>J7200_DEV_CPT2_AGGR1</td>
 260 </tr>
 261 <tr class="row-even"><td>22</td>
 262 <td>J7200_DEV_WKUP_DMSC0</td>
 263 </tr>
 264 <tr class="row-odd"><td>23</td>
 265 <td>J7200_DEV_CPT2_AGGR2</td>
 266 </tr>
 267 <tr class="row-even"><td>24</td>
 268 <td>J7200_DEV_MCU_CPT2_AGGR0</td>
 269 </tr>
 270 <tr class="row-odd"><td>25</td>
 271 <td>J7200_DEV_CPT2_AGGR3</td>
 272 </tr>
 273 <tr class="row-even"><td>26</td>
 274 <td>J7200_DEV_CPSW_TX_RGMII0</td>
 275 </tr>
 276 <tr class="row-odd"><td>29</td>
 277 <td>J7200_DEV_STM0</td>
 278 </tr>
 279 <tr class="row-even"><td>30</td>
 280 <td>J7200_DEV_DCC0</td>
 281 </tr>
 282 <tr class="row-odd"><td>31</td>
 283 <td>J7200_DEV_DCC1</td>
 284 </tr>
 285 <tr class="row-even"><td>32</td>
 286 <td>J7200_DEV_DCC2</td>
 287 </tr>
 288 <tr class="row-odd"><td>33</td>
 289 <td>J7200_DEV_DCC3</td>
 290 </tr>
 291 <tr class="row-even"><td>34</td>
 292 <td>J7200_DEV_DCC4</td>
 293 </tr>
 294 <tr class="row-odd"><td>35</td>
 295 <td>J7200_DEV_MCU_TIMER0</td>
 296 </tr>
 297 <tr class="row-even"><td>36</td>
 298 <td>J7200_DEV_DCC5</td>
 299 </tr>
 300 <tr class="row-odd"><td>37</td>
 301 <td>J7200_DEV_DCC6</td>
 302 </tr>
 303 <tr class="row-even"><td>39</td>
 304 <td>J7200_DEV_MAIN0</td>
 305 </tr>
 306 <tr class="row-odd"><td>40</td>
 307 <td>J7200_DEV_WKUP_WAKEUP0</td>
 308 </tr>
 309 <tr class="row-even"><td>44</td>
 310 <td>J7200_DEV_MCU_DCC0</td>
 311 </tr>
 312 <tr class="row-odd"><td>45</td>
 313 <td>J7200_DEV_MCU_DCC1</td>
 314 </tr>
 315 <tr class="row-even"><td>46</td>
 316 <td>J7200_DEV_MCU_DCC2</td>
 317 </tr>
 318 <tr class="row-odd"><td>49</td>
 319 <td>J7200_DEV_TIMER0</td>
 320 </tr>
 321 <tr class="row-even"><td>50</td>
 322 <td>J7200_DEV_TIMER1</td>
 323 </tr>
 324 <tr class="row-odd"><td>51</td>
 325 <td>J7200_DEV_TIMER2</td>
 326 </tr>
 327 <tr class="row-even"><td>52</td>
 328 <td>J7200_DEV_TIMER3</td>
 329 </tr>
 330 <tr class="row-odd"><td>53</td>
 331 <td>J7200_DEV_TIMER4</td>
 332 </tr>
 333 <tr class="row-even"><td>54</td>
 334 <td>J7200_DEV_TIMER5</td>
 335 </tr>
 336 <tr class="row-odd"><td>55</td>
 337 <td>J7200_DEV_TIMER6</td>
 338 </tr>
 339 <tr class="row-even"><td>57</td>
 340 <td>J7200_DEV_TIMER7</td>
 341 </tr>
 342 <tr class="row-odd"><td>58</td>
 343 <td>J7200_DEV_TIMER8</td>
 344 </tr>
 345 <tr class="row-even"><td>59</td>
 346 <td>J7200_DEV_TIMER9</td>
 347 </tr>
 348 <tr class="row-odd"><td>60</td>
 349 <td>J7200_DEV_TIMER10</td>
 350 </tr>
 351 <tr class="row-even"><td>61</td>
 352 <td>J7200_DEV_GTC0</td>
 353 </tr>
 354 <tr class="row-odd"><td>62</td>
 355 <td>J7200_DEV_TIMER11</td>
 356 </tr>
 357 <tr class="row-even"><td>63</td>
 358 <td>J7200_DEV_TIMER12</td>
 359 </tr>
 360 <tr class="row-odd"><td>64</td>
 361 <td>J7200_DEV_TIMER13</td>
 362 </tr>
 363 <tr class="row-even"><td>65</td>
 364 <td>J7200_DEV_TIMER14</td>
 365 </tr>
 366 <tr class="row-odd"><td>66</td>
 367 <td>J7200_DEV_TIMER15</td>
 368 </tr>
 369 <tr class="row-even"><td>67</td>
 370 <td>J7200_DEV_TIMER16</td>
 371 </tr>
 372 <tr class="row-odd"><td>68</td>
 373 <td>J7200_DEV_TIMER17</td>
 374 </tr>
 375 <tr class="row-even"><td>69</td>
 376 <td>J7200_DEV_TIMER18</td>
 377 </tr>
 378 <tr class="row-odd"><td>70</td>
 379 <td>J7200_DEV_TIMER19</td>
 380 </tr>
 381 <tr class="row-even"><td>71</td>
 382 <td>J7200_DEV_MCU_TIMER1</td>
 383 </tr>
 384 <tr class="row-odd"><td>72</td>
 385 <td>J7200_DEV_MCU_TIMER2</td>
 386 </tr>
 387 <tr class="row-even"><td>73</td>
 388 <td>J7200_DEV_MCU_TIMER3</td>
 389 </tr>
 390 <tr class="row-odd"><td>74</td>
 391 <td>J7200_DEV_MCU_TIMER4</td>
 392 </tr>
 393 <tr class="row-even"><td>75</td>
 394 <td>J7200_DEV_MCU_TIMER5</td>
 395 </tr>
 396 <tr class="row-odd"><td>76</td>
 397 <td>J7200_DEV_MCU_TIMER6</td>
 398 </tr>
 399 <tr class="row-even"><td>77</td>
 400 <td>J7200_DEV_MCU_TIMER7</td>
 401 </tr>
 402 <tr class="row-odd"><td>78</td>
 403 <td>J7200_DEV_MCU_TIMER8</td>
 404 </tr>
 405 <tr class="row-even"><td>79</td>
 406 <td>J7200_DEV_MCU_TIMER9</td>
 407 </tr>
 408 <tr class="row-odd"><td>80</td>
 409 <td>J7200_DEV_ECAP0</td>
 410 </tr>
 411 <tr class="row-even"><td>81</td>
 412 <td>J7200_DEV_ECAP1</td>
 413 </tr>
 414 <tr class="row-odd"><td>82</td>
 415 <td>J7200_DEV_ECAP2</td>
 416 </tr>
 417 <tr class="row-even"><td>83</td>
 418 <td>J7200_DEV_EHRPWM0</td>
 419 </tr>
 420 <tr class="row-odd"><td>84</td>
 421 <td>J7200_DEV_EHRPWM1</td>
 422 </tr>
 423 <tr class="row-even"><td>85</td>
 424 <td>J7200_DEV_EHRPWM2</td>
 425 </tr>
 426 <tr class="row-odd"><td>86</td>
 427 <td>J7200_DEV_EHRPWM3</td>
 428 </tr>
 429 <tr class="row-even"><td>87</td>
 430 <td>J7200_DEV_EHRPWM4</td>
 431 </tr>
 432 <tr class="row-odd"><td>88</td>
 433 <td>J7200_DEV_EHRPWM5</td>
 434 </tr>
 435 <tr class="row-even"><td>89</td>
 436 <td>J7200_DEV_ELM0</td>
 437 </tr>
 438 <tr class="row-odd"><td>90</td>
 439 <td>J7200_DEV_EMIF_DATA_0_VD</td>
 440 </tr>
 441 <tr class="row-even"><td>91</td>
 442 <td>J7200_DEV_MMCSD0</td>
 443 </tr>
 444 <tr class="row-odd"><td>92</td>
 445 <td>J7200_DEV_MMCSD1</td>
 446 </tr>
 447 <tr class="row-even"><td>94</td>
 448 <td>J7200_DEV_EQEP0</td>
 449 </tr>
 450 <tr class="row-odd"><td>95</td>
 451 <td>J7200_DEV_EQEP1</td>
 452 </tr>
 453 <tr class="row-even"><td>96</td>
 454 <td>J7200_DEV_EQEP2</td>
 455 </tr>
 456 <tr class="row-odd"><td>97</td>
 457 <td>J7200_DEV_ESM0</td>
 458 </tr>
 459 <tr class="row-even"><td>98</td>
 460 <td>J7200_DEV_MCU_ESM0</td>
 461 </tr>
 462 <tr class="row-odd"><td>99</td>
 463 <td>J7200_DEV_WKUP_ESM0</td>
 464 </tr>
 465 <tr class="row-even"><td>100</td>
 466 <td>J7200_DEV_MCU_FSS0</td>
 467 </tr>
 468 <tr class="row-odd"><td>101</td>
 469 <td>J7200_DEV_MCU_FSS0_FSAS_0</td>
 470 </tr>
 471 <tr class="row-even"><td>102</td>
 472 <td>J7200_DEV_MCU_FSS0_HYPERBUS1P0_0</td>
 473 </tr>
 474 <tr class="row-odd"><td>103</td>
 475 <td>J7200_DEV_MCU_FSS0_OSPI_0</td>
 476 </tr>
 477 <tr class="row-even"><td>104</td>
 478 <td>J7200_DEV_MCU_FSS0_OSPI_1</td>
 479 </tr>
 480 <tr class="row-odd"><td>105</td>
 481 <td>J7200_DEV_GPIO0</td>
 482 </tr>
 483 <tr class="row-even"><td>107</td>
 484 <td>J7200_DEV_GPIO2</td>
 485 </tr>
 486 <tr class="row-odd"><td>109</td>
 487 <td>J7200_DEV_GPIO4</td>
 488 </tr>
 489 <tr class="row-even"><td>111</td>
 490 <td>J7200_DEV_GPIO6</td>
 491 </tr>
 492 <tr class="row-odd"><td>113</td>
 493 <td>J7200_DEV_WKUP_GPIO0</td>
 494 </tr>
 495 <tr class="row-even"><td>114</td>
 496 <td>J7200_DEV_WKUP_GPIO1</td>
 497 </tr>
 498 <tr class="row-odd"><td>115</td>
 499 <td>J7200_DEV_GPMC0</td>
 500 </tr>
 501 <tr class="row-even"><td>116</td>
 502 <td>J7200_DEV_I3C0</td>
 503 </tr>
 504 <tr class="row-odd"><td>117</td>
 505 <td>J7200_DEV_MCU_I3C0</td>
 506 </tr>
 507 <tr class="row-even"><td>118</td>
 508 <td>J7200_DEV_MCU_I3C1</td>
 509 </tr>
 510 <tr class="row-odd"><td>123</td>
 511 <td>J7200_DEV_CMPEVENT_INTRTR0</td>
 512 </tr>
 513 <tr class="row-even"><td>127</td>
 514 <td>J7200_DEV_LED0</td>
 515 </tr>
 516 <tr class="row-odd"><td>128</td>
 517 <td>J7200_DEV_MAIN2MCU_LVL_INTRTR0</td>
 518 </tr>
 519 <tr class="row-even"><td>130</td>
 520 <td>J7200_DEV_MAIN2MCU_PLS_INTRTR0</td>
 521 </tr>
 522 <tr class="row-odd"><td>131</td>
 523 <td>J7200_DEV_GPIOMUX_INTRTR0</td>
 524 </tr>
 525 <tr class="row-even"><td>132</td>
 526 <td>J7200_DEV_WKUP_PORZ_SYNC0</td>
 527 </tr>
 528 <tr class="row-odd"><td>133</td>
 529 <td>J7200_DEV_PSC0</td>
 530 </tr>
 531 <tr class="row-even"><td>136</td>
 532 <td>J7200_DEV_TIMESYNC_INTRTR0</td>
 533 </tr>
 534 <tr class="row-odd"><td>137</td>
 535 <td>J7200_DEV_WKUP_GPIOMUX_INTRTR0</td>
 536 </tr>
 537 <tr class="row-even"><td>138</td>
 538 <td>J7200_DEV_WKUP_PSC0</td>
 539 </tr>
 540 <tr class="row-odd"><td>139</td>
 541 <td>J7200_DEV_PBIST0</td>
 542 </tr>
 543 <tr class="row-even"><td>140</td>
 544 <td>J7200_DEV_PBIST1</td>
 545 </tr>
 546 <tr class="row-odd"><td>141</td>
 547 <td>J7200_DEV_PBIST2</td>
 548 </tr>
 549 <tr class="row-even"><td>142</td>
 550 <td>J7200_DEV_MCU_PBIST0</td>
 551 </tr>
 552 <tr class="row-odd"><td>143</td>
 553 <td>J7200_DEV_MCU_PBIST1</td>
 554 </tr>
 555 <tr class="row-even"><td>144</td>
 556 <td>J7200_DEV_MCU_PBIST2</td>
 557 </tr>
 558 <tr class="row-odd"><td>145</td>
 559 <td>J7200_DEV_WKUP_DDPA0</td>
 560 </tr>
 561 <tr class="row-even"><td>146</td>
 562 <td>J7200_DEV_UART0</td>
 563 </tr>
 564 <tr class="row-odd"><td>149</td>
 565 <td>J7200_DEV_MCU_UART0</td>
 566 </tr>
 567 <tr class="row-even"><td>150</td>
 568 <td>J7200_DEV_MCAN14</td>
 569 </tr>
 570 <tr class="row-odd"><td>151</td>
 571 <td>J7200_DEV_MCAN15</td>
 572 </tr>
 573 <tr class="row-even"><td>152</td>
 574 <td>J7200_DEV_MCAN16</td>
 575 </tr>
 576 <tr class="row-odd"><td>153</td>
 577 <td>J7200_DEV_MCAN17</td>
 578 </tr>
 579 <tr class="row-even"><td>154</td>
 580 <td>J7200_DEV_WKUP_VTM0</td>
 581 </tr>
 582 <tr class="row-odd"><td>155</td>
 583 <td>J7200_DEV_MAIN2WKUPMCU_VD</td>
 584 </tr>
 585 <tr class="row-even"><td>156</td>
 586 <td>J7200_DEV_MCAN0</td>
 587 </tr>
 588 <tr class="row-odd"><td>157</td>
 589 <td>J7200_DEV_BOARD0</td>
 590 </tr>
 591 <tr class="row-even"><td>158</td>
 592 <td>J7200_DEV_MCAN1</td>
 593 </tr>
 594 <tr class="row-odd"><td>160</td>
 595 <td>J7200_DEV_MCAN2</td>
 596 </tr>
 597 <tr class="row-even"><td>161</td>
 598 <td>J7200_DEV_MCAN3</td>
 599 </tr>
 600 <tr class="row-odd"><td>162</td>
 601 <td>J7200_DEV_MCAN4</td>
 602 </tr>
 603 <tr class="row-even"><td>163</td>
 604 <td>J7200_DEV_MCAN5</td>
 605 </tr>
 606 <tr class="row-odd"><td>164</td>
 607 <td>J7200_DEV_MCAN6</td>
 608 </tr>
 609 <tr class="row-even"><td>165</td>
 610 <td>J7200_DEV_MCAN7</td>
 611 </tr>
 612 <tr class="row-odd"><td>166</td>
 613 <td>J7200_DEV_MCAN8</td>
 614 </tr>
 615 <tr class="row-even"><td>167</td>
 616 <td>J7200_DEV_MCAN9</td>
 617 </tr>
 618 <tr class="row-odd"><td>168</td>
 619 <td>J7200_DEV_MCAN10</td>
 620 </tr>
 621 <tr class="row-even"><td>169</td>
 622 <td>J7200_DEV_MCAN11</td>
 623 </tr>
 624 <tr class="row-odd"><td>170</td>
 625 <td>J7200_DEV_MCAN12</td>
 626 </tr>
 627 <tr class="row-even"><td>171</td>
 628 <td>J7200_DEV_MCAN13</td>
 629 </tr>
 630 <tr class="row-odd"><td>172</td>
 631 <td>J7200_DEV_MCU_MCAN0</td>
 632 </tr>
 633 <tr class="row-even"><td>173</td>
 634 <td>J7200_DEV_MCU_MCAN1</td>
 635 </tr>
 636 <tr class="row-odd"><td>174</td>
 637 <td>J7200_DEV_MCASP0</td>
 638 </tr>
 639 <tr class="row-even"><td>175</td>
 640 <td>J7200_DEV_MCASP1</td>
 641 </tr>
 642 <tr class="row-odd"><td>176</td>
 643 <td>J7200_DEV_MCASP2</td>
 644 </tr>
 645 <tr class="row-even"><td>187</td>
 646 <td>J7200_DEV_I2C0</td>
 647 </tr>
 648 <tr class="row-odd"><td>188</td>
 649 <td>J7200_DEV_I2C1</td>
 650 </tr>
 651 <tr class="row-even"><td>189</td>
 652 <td>J7200_DEV_I2C2</td>
 653 </tr>
 654 <tr class="row-odd"><td>190</td>
 655 <td>J7200_DEV_I2C3</td>
 656 </tr>
 657 <tr class="row-even"><td>191</td>
 658 <td>J7200_DEV_I2C4</td>
 659 </tr>
 660 <tr class="row-odd"><td>192</td>
 661 <td>J7200_DEV_I2C5</td>
 662 </tr>
 663 <tr class="row-even"><td>193</td>
 664 <td>J7200_DEV_I2C6</td>
 665 </tr>
 666 <tr class="row-odd"><td>194</td>
 667 <td>J7200_DEV_MCU_I2C0</td>
 668 </tr>
 669 <tr class="row-even"><td>195</td>
 670 <td>J7200_DEV_MCU_I2C1</td>
 671 </tr>
 672 <tr class="row-odd"><td>197</td>
 673 <td>J7200_DEV_WKUP_I2C0</td>
 674 </tr>
 675 <tr class="row-even"><td>199</td>
 676 <td>J7200_DEV_NAVSS0</td>
 677 </tr>
 678 <tr class="row-odd"><td>201</td>
 679 <td>J7200_DEV_NAVSS0_CPTS_0</td>
 680 </tr>
 681 <tr class="row-even"><td>202</td>
 682 <td>J7200_DEV_A72SS0_CORE0_0</td>
 683 </tr>
 684 <tr class="row-odd"><td>203</td>
 685 <td>J7200_DEV_A72SS0_CORE0_1</td>
 686 </tr>
 687 <tr class="row-even"><td>206</td>
 688 <td>J7200_DEV_NAVSS0_DTI_0</td>
 689 </tr>
 690 <tr class="row-odd"><td>207</td>
 691 <td>J7200_DEV_NAVSS0_MODSS_INTA_0</td>
 692 </tr>
 693 <tr class="row-even"><td>208</td>
 694 <td>J7200_DEV_NAVSS0_MODSS_INTA_1</td>
 695 </tr>
 696 <tr class="row-odd"><td>209</td>
 697 <td>J7200_DEV_NAVSS0_UDMASS_INTA_0</td>
 698 </tr>
 699 <tr class="row-even"><td>210</td>
 700 <td>J7200_DEV_NAVSS0_PROXY_0</td>
 701 </tr>
 702 <tr class="row-odd"><td>211</td>
 703 <td>J7200_DEV_NAVSS0_RINGACC_0</td>
 704 </tr>
 705 <tr class="row-even"><td>212</td>
 706 <td>J7200_DEV_NAVSS0_UDMAP_0</td>
 707 </tr>
 708 <tr class="row-odd"><td>213</td>
 709 <td>J7200_DEV_NAVSS0_INTR_ROUTER_0</td>
 710 </tr>
 711 <tr class="row-even"><td>214</td>
 712 <td>J7200_DEV_NAVSS0_MAILBOX_0</td>
 713 </tr>
 714 <tr class="row-odd"><td>215</td>
 715 <td>J7200_DEV_NAVSS0_MAILBOX_1</td>
 716 </tr>
 717 <tr class="row-even"><td>216</td>
 718 <td>J7200_DEV_NAVSS0_MAILBOX_2</td>
 719 </tr>
 720 <tr class="row-odd"><td>217</td>
 721 <td>J7200_DEV_NAVSS0_MAILBOX_3</td>
 722 </tr>
 723 <tr class="row-even"><td>218</td>
 724 <td>J7200_DEV_NAVSS0_MAILBOX_4</td>
 725 </tr>
 726 <tr class="row-odd"><td>219</td>
 727 <td>J7200_DEV_NAVSS0_MAILBOX_5</td>
 728 </tr>
 729 <tr class="row-even"><td>220</td>
 730 <td>J7200_DEV_NAVSS0_MAILBOX_6</td>
 731 </tr>
 732 <tr class="row-odd"><td>221</td>
 733 <td>J7200_DEV_NAVSS0_MAILBOX_7</td>
 734 </tr>
 735 <tr class="row-even"><td>222</td>
 736 <td>J7200_DEV_NAVSS0_MAILBOX_8</td>
 737 </tr>
 738 <tr class="row-odd"><td>223</td>
 739 <td>J7200_DEV_NAVSS0_MAILBOX_9</td>
 740 </tr>
 741 <tr class="row-even"><td>224</td>
 742 <td>J7200_DEV_NAVSS0_MAILBOX_10</td>
 743 </tr>
 744 <tr class="row-odd"><td>225</td>
 745 <td>J7200_DEV_NAVSS0_MAILBOX_11</td>
 746 </tr>
 747 <tr class="row-even"><td>226</td>
 748 <td>J7200_DEV_NAVSS0_SPINLOCK_0</td>
 749 </tr>
 750 <tr class="row-odd"><td>227</td>
 751 <td>J7200_DEV_NAVSS0_MCRC_0</td>
 752 </tr>
 753 <tr class="row-even"><td>228</td>
 754 <td>J7200_DEV_NAVSS0_TBU_0</td>
 755 </tr>
 756 <tr class="row-odd"><td>230</td>
 757 <td>J7200_DEV_NAVSS0_TIMERMGR_0</td>
 758 </tr>
 759 <tr class="row-even"><td>231</td>
 760 <td>J7200_DEV_NAVSS0_TIMERMGR_1</td>
 761 </tr>
 762 <tr class="row-odd"><td>232</td>
 763 <td>J7200_DEV_MCU_NAVSS0</td>
 764 </tr>
 765 <tr class="row-even"><td>233</td>
 766 <td>J7200_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
 767 </tr>
 768 <tr class="row-odd"><td>234</td>
 769 <td>J7200_DEV_MCU_NAVSS0_PROXY0</td>
 770 </tr>
 771 <tr class="row-even"><td>235</td>
 772 <td>J7200_DEV_MCU_NAVSS0_RINGACC0</td>
 773 </tr>
 774 <tr class="row-odd"><td>236</td>
 775 <td>J7200_DEV_MCU_NAVSS0_UDMAP_0</td>
 776 </tr>
 777 <tr class="row-even"><td>237</td>
 778 <td>J7200_DEV_MCU_NAVSS0_INTR_0</td>
 779 </tr>
 780 <tr class="row-odd"><td>238</td>
 781 <td>J7200_DEV_MCU_NAVSS0_MCRC_0</td>
 782 </tr>
 783 <tr class="row-even"><td>240</td>
 784 <td>J7200_DEV_PCIE1</td>
 785 </tr>
 786 <tr class="row-odd"><td>243</td>
 787 <td>J7200_DEV_R5FSS0</td>
 788 </tr>
 789 <tr class="row-even"><td>245</td>
 790 <td>J7200_DEV_R5FSS0_CORE0</td>
 791 </tr>
 792 <tr class="row-odd"><td>246</td>
 793 <td>J7200_DEV_R5FSS0_CORE1</td>
 794 </tr>
 795 <tr class="row-even"><td>249</td>
 796 <td>J7200_DEV_MCU_R5FSS0</td>
 797 </tr>
 798 <tr class="row-odd"><td>250</td>
 799 <td>J7200_DEV_MCU_R5FSS0_CORE0</td>
 800 </tr>
 801 <tr class="row-even"><td>251</td>
 802 <td>J7200_DEV_MCU_R5FSS0_CORE1</td>
 803 </tr>
 804 <tr class="row-odd"><td>252</td>
 805 <td>J7200_DEV_RTI0</td>
 806 </tr>
 807 <tr class="row-even"><td>253</td>
 808 <td>J7200_DEV_RTI1</td>
 809 </tr>
 810 <tr class="row-odd"><td>258</td>
 811 <td>J7200_DEV_RTI28</td>
 812 </tr>
 813 <tr class="row-even"><td>259</td>
 814 <td>J7200_DEV_RTI29</td>
 815 </tr>
 816 <tr class="row-odd"><td>262</td>
 817 <td>J7200_DEV_MCU_RTI0</td>
 818 </tr>
 819 <tr class="row-even"><td>263</td>
 820 <td>J7200_DEV_MCU_RTI1</td>
 821 </tr>
 822 <tr class="row-odd"><td>265</td>
 823 <td>J7200_DEV_MCU_SA2_UL0</td>
 824 </tr>
 825 <tr class="row-even"><td>266</td>
 826 <td>J7200_DEV_MCSPI0</td>
 827 </tr>
 828 <tr class="row-odd"><td>267</td>
 829 <td>J7200_DEV_MCSPI1</td>
 830 </tr>
 831 <tr class="row-even"><td>268</td>
 832 <td>J7200_DEV_MCSPI2</td>
 833 </tr>
 834 <tr class="row-odd"><td>269</td>
 835 <td>J7200_DEV_MCSPI3</td>
 836 </tr>
 837 <tr class="row-even"><td>270</td>
 838 <td>J7200_DEV_MCSPI4</td>
 839 </tr>
 840 <tr class="row-odd"><td>271</td>
 841 <td>J7200_DEV_MCSPI5</td>
 842 </tr>
 843 <tr class="row-even"><td>272</td>
 844 <td>J7200_DEV_MCSPI6</td>
 845 </tr>
 846 <tr class="row-odd"><td>273</td>
 847 <td>J7200_DEV_MCSPI7</td>
 848 </tr>
 849 <tr class="row-even"><td>274</td>
 850 <td>J7200_DEV_MCU_MCSPI0</td>
 851 </tr>
 852 <tr class="row-odd"><td>275</td>
 853 <td>J7200_DEV_MCU_MCSPI1</td>
 854 </tr>
 855 <tr class="row-even"><td>276</td>
 856 <td>J7200_DEV_MCU_MCSPI2</td>
 857 </tr>
 858 <tr class="row-odd"><td>278</td>
 859 <td>J7200_DEV_UART1</td>
 860 </tr>
 861 <tr class="row-even"><td>279</td>
 862 <td>J7200_DEV_UART2</td>
 863 </tr>
 864 <tr class="row-odd"><td>280</td>
 865 <td>J7200_DEV_UART3</td>
 866 </tr>
 867 <tr class="row-even"><td>281</td>
 868 <td>J7200_DEV_UART4</td>
 869 </tr>
 870 <tr class="row-odd"><td>282</td>
 871 <td>J7200_DEV_UART5</td>
 872 </tr>
 873 <tr class="row-even"><td>283</td>
 874 <td>J7200_DEV_UART6</td>
 875 </tr>
 876 <tr class="row-odd"><td>284</td>
 877 <td>J7200_DEV_UART7</td>
 878 </tr>
 879 <tr class="row-even"><td>285</td>
 880 <td>J7200_DEV_UART8</td>
 881 </tr>
 882 <tr class="row-odd"><td>286</td>
 883 <td>J7200_DEV_UART9</td>
 884 </tr>
 885 <tr class="row-even"><td>287</td>
 886 <td>J7200_DEV_WKUP_UART0</td>
 887 </tr>
 888 <tr class="row-odd"><td>288</td>
 889 <td>J7200_DEV_USB0</td>
 890 </tr>
 891 <tr class="row-even"><td>292</td>
 892 <td>J7200_DEV_SERDES_10G1</td>
 893 </tr>
 894 <tr class="row-odd"><td>298</td>
 895 <td>J7200_DEV_WKUPMCU2MAIN_VD</td>
 896 </tr>
 897 <tr class="row-even"><td>299</td>
 898 <td>J7200_DEV_NAVSS0_MODSS</td>
 899 </tr>
 900 <tr class="row-odd"><td>300</td>
 901 <td>J7200_DEV_NAVSS0_UDMASS</td>
 902 </tr>
 903 <tr class="row-even"><td>301</td>
 904 <td>J7200_DEV_NAVSS0_VIRTSS</td>
 905 </tr>
 906 <tr class="row-odd"><td>302</td>
 907 <td>J7200_DEV_MCU_NAVSS0_MODSS</td>
 908 </tr>
 909 <tr class="row-even"><td>303</td>
 910 <td>J7200_DEV_MCU_NAVSS0_UDMASS</td>
 911 </tr>
 912 <tr class="row-odd"><td>304</td>
 913 <td>J7200_DEV_DEBUGSS_WRAP0</td>
 914 </tr>
 915 <tr class="row-even"><td>305</td>
 916 <td>J7200_DEV_FFI_MAIN_INFRA_CBASS_VD</td>
 917 </tr>
 918 <tr class="row-odd"><td>306</td>
 919 <td>J7200_DEV_FFI_MAIN_IP_CBASS_VD</td>
 920 </tr>
 921 <tr class="row-even"><td>307</td>
 922 <td>J7200_DEV_FFI_MAIN_RC_CBASS_VD</td>
 923 </tr>
 924 </tbody>
 925 </table>
 926 </div>
 927 </div>
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1017       }
1018
1019       $(document).ready(function() {
1020         setNavbarTop();
1021         $(window).scroll(function () {
1022           setNavbarTop();
1023         });
1024
1025         $('body').on("mousewheel", function () {
1026             // Remove default behavior
1027             event.preventDefault();
1028             // Scroll without smoothing
1029             var wheelDelta = event.wheelDelta;
1030             var currentScrollPosition = window.pageYOffset;
1031             window.scrollTo(0, currentScrollPosition - wheelDelta);
1032         });
1033       });
1034   </script>
1035
1036
1037 </body>
1038 </html>