packages/ti/drv/sciclient/soc/sysfw/binaries/system-firmware-public-documentation/5_soc_doc/j721e/interrupt_cfg.html

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 107 <li class="toctree-l1"><a class="reference internal" href="../../4_trace/index.html">Chapter 4: Interpreting Trace Data</a></li>
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 118 <li class="toctree-l3 current"><a class="current reference internal" href="#">J721E Interrupt Management Device Descriptions</a><ul>
 119 <li class="toctree-l4"><a class="reference internal" href="#introduction">Introduction</a></li>
 120 <li class="toctree-l4"><a class="reference internal" href="#interrupt-router-device-ids">Interrupt Router Device IDs</a></li>
 121 <li class="toctree-l4"><a class="reference internal" href="#c66ss0-introuter0-interrupt-router-input-sources">C66SS0_INTROUTER0 Interrupt Router Input Sources</a></li>
 122 <li class="toctree-l4"><a class="reference internal" href="#c66ss0-introuter0-interrupt-router-output-destinations">C66SS0_INTROUTER0 Interrupt Router Output Destinations</a></li>
 123 <li class="toctree-l4"><a class="reference internal" href="#c66ss1-introuter0-interrupt-router-input-sources">C66SS1_INTROUTER0 Interrupt Router Input Sources</a></li>
 124 <li class="toctree-l4"><a class="reference internal" href="#c66ss1-introuter0-interrupt-router-output-destinations">C66SS1_INTROUTER0 Interrupt Router Output Destinations</a></li>
 125 <li class="toctree-l4"><a class="reference internal" href="#cmpevent-intrtr0-interrupt-router-input-sources">CMPEVENT_INTRTR0 Interrupt Router Input Sources</a></li>
 126 <li class="toctree-l4"><a class="reference internal" href="#cmpevent-intrtr0-interrupt-router-output-destinations">CMPEVENT_INTRTR0 Interrupt Router Output Destinations</a></li>
 127 <li class="toctree-l4"><a class="reference internal" href="#main2mcu-lvl-intrtr0-interrupt-router-input-sources">MAIN2MCU_LVL_INTRTR0 Interrupt Router Input Sources</a></li>
 128 <li class="toctree-l4"><a class="reference internal" href="#main2mcu-lvl-intrtr0-interrupt-router-output-destinations">MAIN2MCU_LVL_INTRTR0 Interrupt Router Output Destinations</a></li>
 129 <li class="toctree-l4"><a class="reference internal" href="#main2mcu-pls-intrtr0-interrupt-router-input-sources">MAIN2MCU_PLS_INTRTR0 Interrupt Router Input Sources</a></li>
 130 <li class="toctree-l4"><a class="reference internal" href="#main2mcu-pls-intrtr0-interrupt-router-output-destinations">MAIN2MCU_PLS_INTRTR0 Interrupt Router Output Destinations</a></li>
 131 <li class="toctree-l4"><a class="reference internal" href="#gpiomux-intrtr0-interrupt-router-input-sources">GPIOMUX_INTRTR0 Interrupt Router Input Sources</a></li>
 132 <li class="toctree-l4"><a class="reference internal" href="#gpiomux-intrtr0-interrupt-router-output-destinations">GPIOMUX_INTRTR0 Interrupt Router Output Destinations</a></li>
 133 <li class="toctree-l4"><a class="reference internal" href="#r5fss0-introuter0-interrupt-router-input-sources">R5FSS0_INTROUTER0 Interrupt Router Input Sources</a></li>
 134 <li class="toctree-l4"><a class="reference internal" href="#r5fss0-introuter0-interrupt-router-output-destinations">R5FSS0_INTROUTER0 Interrupt Router Output Destinations</a></li>
 135 <li class="toctree-l4"><a class="reference internal" href="#r5fss1-introuter0-interrupt-router-input-sources">R5FSS1_INTROUTER0 Interrupt Router Input Sources</a></li>
 136 <li class="toctree-l4"><a class="reference internal" href="#r5fss1-introuter0-interrupt-router-output-destinations">R5FSS1_INTROUTER0 Interrupt Router Output Destinations</a></li>
 137 <li class="toctree-l4"><a class="reference internal" href="#timesync-intrtr0-interrupt-router-input-sources">TIMESYNC_INTRTR0 Interrupt Router Input Sources</a></li>
 138 <li class="toctree-l4"><a class="reference internal" href="#timesync-intrtr0-interrupt-router-output-destinations">TIMESYNC_INTRTR0 Interrupt Router Output Destinations</a></li>
 139 <li class="toctree-l4"><a class="reference internal" href="#wkup-gpiomux-intrtr0-interrupt-router-input-sources">WKUP_GPIOMUX_INTRTR0 Interrupt Router Input Sources</a></li>
 140 <li class="toctree-l4"><a class="reference internal" href="#wkup-gpiomux-intrtr0-interrupt-router-output-destinations">WKUP_GPIOMUX_INTRTR0 Interrupt Router Output Destinations</a></li>
 141 <li class="toctree-l4"><a class="reference internal" href="#navss0-intr-router-0-interrupt-router-input-sources">NAVSS0_INTR_ROUTER_0 Interrupt Router Input Sources</a></li>
 142 <li class="toctree-l4"><a class="reference internal" href="#navss0-intr-router-0-interrupt-router-output-destinations">NAVSS0_INTR_ROUTER_0 Interrupt Router Output Destinations</a></li>
 143 <li class="toctree-l4"><a class="reference internal" href="#mcu-navss0-intr-0-interrupt-router-input-sources">MCU_NAVSS0_INTR_0 Interrupt Router Input Sources</a></li>
 144 <li class="toctree-l4"><a class="reference internal" href="#mcu-navss0-intr-0-interrupt-router-output-destinations">MCU_NAVSS0_INTR_0 Interrupt Router Output Destinations</a></li>
 145 <li class="toctree-l4"><a class="reference internal" href="#interrupt-aggregator-device-ids">Interrupt Aggregator Device IDs</a></li>
 146 <li class="toctree-l4"><a class="reference internal" href="#interrupt-aggregator-virtual-interrupts">Interrupt Aggregator Virtual Interrupts</a></li>
 147 <li class="toctree-l4"><a class="reference internal" href="#navss0-modss-intaggr-0-interrupt-aggregator-virtual-interrupt-destinations">NAVSS0_MODSS_INTAGGR_0 Interrupt Aggregator Virtual Interrupt Destinations</a></li>
 148 <li class="toctree-l4"><a class="reference internal" href="#navss0-modss-intaggr-1-interrupt-aggregator-virtual-interrupt-destinations">NAVSS0_MODSS_INTAGGR_1 Interrupt Aggregator Virtual Interrupt Destinations</a></li>
 149 <li class="toctree-l4"><a class="reference internal" href="#navss0-udmass-intaggr-0-interrupt-aggregator-virtual-interrupt-destinations">NAVSS0_UDMASS_INTAGGR_0 Interrupt Aggregator Virtual Interrupt Destinations</a></li>
 150 <li class="toctree-l4"><a class="reference internal" href="#mcu-navss0-udmass-inta-0-interrupt-aggregator-virtual-interrupt-destinations">MCU_NAVSS0_UDMASS_INTA_0 Interrupt Aggregator Virtual Interrupt Destinations</a></li>
 151 <li class="toctree-l4"><a class="reference internal" href="#global-events">Global Events</a></li>
 152 <li class="toctree-l4"><a class="reference internal" href="#event-based-interrupt-source-ids">Event-Based Interrupt Source IDs</a></li>
 153 </ul>
 154 </li>
 155 <li class="toctree-l3"><a class="reference internal" href="ra_cfg.html">J721E Ring Accelerator Device Descriptions</a></li>
 156 <li class="toctree-l3"><a class="reference internal" href="dma_cfg.html">J721E DMA Device Descriptions</a></li>
 157 <li class="toctree-l3"><a class="reference internal" href="psil_cfg.html">J721E PSI-L Device Descriptions</a></li>
 158 <li class="toctree-l3"><a class="reference internal" href="proxy_cfg.html">J721E Proxy Device Descriptions</a></li>
 159 <li class="toctree-l3"><a class="reference internal" href="sec_proxy.html">J721E Secure Proxy Descriptions</a></li>
 160 <li class="toctree-l3"><a class="reference internal" href="processors.html">J721E Processor Descriptions</a></li>
 161 <li class="toctree-l3"><a class="reference internal" href="firewalls.html">J721E Firewall Descriptions</a></li>
 162 <li class="toctree-l3"><a class="reference internal" href="soc_devgrps.html">J721E Device Group descriptions</a></li>
 163 <li class="toctree-l3"><a class="reference internal" href="soc_domgrps.html">J721E Domain Group descriptions</a></li>
 164 </ul>
 165 </li>
 166 <li class="toctree-l2"><a class="reference internal" href="../index.html#j721e-legacy">J721E Legacy</a></li>
 167 <li class="toctree-l2"><a class="reference internal" href="../index.html#j7200">J7200</a></li>
 168 </ul>
 169 </li>
 170 <li class="toctree-l1"><a class="reference internal" href="../../6_topic_user_guides/index.html">Chapter 6: Topic User Guides</a></li>
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 203     <li>J721E Interrupt Management Device Descriptions</li>
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 215   <div class="section" id="j721e-interrupt-management-device-descriptions">
 216 <h1>J721E Interrupt Management Device Descriptions<a class="headerlink" href="#j721e-interrupt-management-device-descriptions" title="Permalink to this headline">¶</a></h1>
 217 <div class="section" id="introduction">
 218 <h2>Introduction<a class="headerlink" href="#introduction" title="Permalink to this headline">¶</a></h2>
 219 <p>This chapter provides information on the Interrupt Management devices in the
 220 J721E SoC.  Some System Firmware TISCI messages take device specific inputs.
 221 This chapter provides information on the valid values for Interrupt Management
 222 TISCI message parameters.</p>
 223 </div>
 224 <div class="section" id="interrupt-router-device-ids">
 225 <span id="pub-soc-j721e-ir-device-ids"></span><h2>Interrupt Router Device IDs<a class="headerlink" href="#interrupt-router-device-ids" title="Permalink to this headline">¶</a></h2>
 226 <p>Some System Firmware TISCI message APIs require the Interrupt Router device ID
 227 be provided as part of the request. Based on <a class="reference internal" href="devices.html"><span class="doc">J721E Device IDs</span></a>
 228 these are the valid Interrupt Router device IDs.</p>
 229 <table border="1" class="docutils">
 230 <colgroup>
 231 <col width="52%" />
 232 <col width="48%" />
 233 </colgroup>
 234 <thead valign="bottom">
 235 <tr class="row-odd"><th class="head">Interrupt Router Device Name</th>
 236 <th class="head">Interrupt Router Device ID</th>
 237 </tr>
 238 </thead>
 239 <tbody valign="top">
 240 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 241 <td>121</td>
 242 </tr>
 243 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
 244 <td>122</td>
 245 </tr>
 246 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
 247 <td>123</td>
 248 </tr>
 249 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
 250 <td>128</td>
 251 </tr>
 252 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
 253 <td>130</td>
 254 </tr>
 255 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
 256 <td>131</td>
 257 </tr>
 258 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
 259 <td>134</td>
 260 </tr>
 261 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
 262 <td>135</td>
 263 </tr>
 264 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
 265 <td>136</td>
 266 </tr>
 267 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
 268 <td>137</td>
 269 </tr>
 270 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
 271 <td>213</td>
 272 </tr>
 273 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
 274 <td>237</td>
 275 </tr>
 276 </tbody>
 277 </table>
 278 </div>
 279 <div class="section" id="c66ss0-introuter0-interrupt-router-input-sources">
 280 <span id="pub-soc-j721e-c66ss0-introuter0-input-src-list"></span><h2>C66SS0_INTROUTER0 Interrupt Router Input Sources<a class="headerlink" href="#c66ss0-introuter0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
 281 <div class="admonition warning">
 282 <p class="first admonition-title">Warning</p>
 283 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
 284 host within the RM Board Configuration resource assignment array.  The RM
 285 Board Configuration is rejected if an overlap with a reserved resource is
 286 detected.</p>
 287 </div>
 288 <table border="1" class="docutils">
 289 <colgroup>
 290 <col width="22%" />
 291 <col width="10%" />
 292 <col width="11%" />
 293 <col width="21%" />
 294 <col width="25%" />
 295 <col width="10%" />
 296 </colgroup>
 297 <thead valign="bottom">
 298 <tr class="row-odd"><th class="head">IR Name</th>
 299 <th class="head">IR Device ID</th>
 300 <th class="head">IR Input Index</th>
 301 <th class="head">Source Name</th>
 302 <th class="head">Source Interface</th>
 303 <th class="head">Source Index</th>
 304 </tr>
 305 </thead>
 306 <tbody valign="top">
 307 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 308 <td>121</td>
 309 <td>0</td>
 310 <td>Not Connected</td>
 311 <td>&#160;</td>
 312 <td>&#160;</td>
 313 </tr>
 314 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 315 <td>121</td>
 316 <td>1</td>
 317 <td>J721E_DEV_TIMER0</td>
 318 <td>intr_pend</td>
 319 <td>0</td>
 320 </tr>
 321 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 322 <td>121</td>
 323 <td>2</td>
 324 <td>J721E_DEV_TIMER1</td>
 325 <td>intr_pend</td>
 326 <td>0</td>
 327 </tr>
 328 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 329 <td>121</td>
 330 <td>3</td>
 331 <td>J721E_DEV_TIMER2</td>
 332 <td>intr_pend</td>
 333 <td>0</td>
 334 </tr>
 335 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 336 <td>121</td>
 337 <td>4</td>
 338 <td>J721E_DEV_TIMER3</td>
 339 <td>intr_pend</td>
 340 <td>0</td>
 341 </tr>
 342 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 343 <td>121</td>
 344 <td>5</td>
 345 <td>J721E_DEV_TIMER4</td>
 346 <td>intr_pend</td>
 347 <td>0</td>
 348 </tr>
 349 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 350 <td>121</td>
 351 <td>6</td>
 352 <td>J721E_DEV_TIMER5</td>
 353 <td>intr_pend</td>
 354 <td>0</td>
 355 </tr>
 356 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 357 <td>121</td>
 358 <td>7</td>
 359 <td>J721E_DEV_TIMER6</td>
 360 <td>intr_pend</td>
 361 <td>0</td>
 362 </tr>
 363 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 364 <td>121</td>
 365 <td>8</td>
 366 <td>J721E_DEV_TIMER7</td>
 367 <td>intr_pend</td>
 368 <td>0</td>
 369 </tr>
 370 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 371 <td>121</td>
 372 <td>9</td>
 373 <td>J721E_DEV_TIMER8</td>
 374 <td>intr_pend</td>
 375 <td>0</td>
 376 </tr>
 377 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 378 <td>121</td>
 379 <td>10</td>
 380 <td>J721E_DEV_TIMER9</td>
 381 <td>intr_pend</td>
 382 <td>0</td>
 383 </tr>
 384 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 385 <td>121</td>
 386 <td>11</td>
 387 <td>J721E_DEV_TIMER10</td>
 388 <td>intr_pend</td>
 389 <td>0</td>
 390 </tr>
 391 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 392 <td>121</td>
 393 <td>12</td>
 394 <td>J721E_DEV_TIMER11</td>
 395 <td>intr_pend</td>
 396 <td>0</td>
 397 </tr>
 398 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 399 <td>121</td>
 400 <td>13</td>
 401 <td>J721E_DEV_TIMER16</td>
 402 <td>intr_pend</td>
 403 <td>0</td>
 404 </tr>
 405 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 406 <td>121</td>
 407 <td>14</td>
 408 <td>J721E_DEV_TIMER17</td>
 409 <td>intr_pend</td>
 410 <td>0</td>
 411 </tr>
 412 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 413 <td>121</td>
 414 <td>15</td>
 415 <td>J721E_DEV_TIMER18</td>
 416 <td>intr_pend</td>
 417 <td>0</td>
 418 </tr>
 419 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 420 <td>121</td>
 421 <td>16</td>
 422 <td>J721E_DEV_TIMER19</td>
 423 <td>intr_pend</td>
 424 <td>0</td>
 425 </tr>
 426 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 427 <td>121</td>
 428 <td>17</td>
 429 <td>J721E_DEV_MCSPI3</td>
 430 <td>intr_spi</td>
 431 <td>0</td>
 432 </tr>
 433 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 434 <td>121</td>
 435 <td>18</td>
 436 <td>J721E_DEV_MCSPI4</td>
 437 <td>intr_spi</td>
 438 <td>0</td>
 439 </tr>
 440 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 441 <td>121</td>
 442 <td>19</td>
 443 <td>J721E_DEV_MCSPI5</td>
 444 <td>intr_spi</td>
 445 <td>0</td>
 446 </tr>
 447 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 448 <td>121</td>
 449 <td>20</td>
 450 <td>J721E_DEV_MCSPI6</td>
 451 <td>intr_spi</td>
 452 <td>0</td>
 453 </tr>
 454 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 455 <td>121</td>
 456 <td>21</td>
 457 <td>J721E_DEV_MCAN2</td>
 458 <td>mcanss_mcan_lvl_int</td>
 459 <td>0</td>
 460 </tr>
 461 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 462 <td>121</td>
 463 <td>22</td>
 464 <td>J721E_DEV_MCAN2</td>
 465 <td>mcanss_mcan_lvl_int</td>
 466 <td>1</td>
 467 </tr>
 468 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 469 <td>121</td>
 470 <td>23</td>
 471 <td>J721E_DEV_MCAN2</td>
 472 <td>mcanss_ext_ts_rollover_lvl_int</td>
 473 <td>0</td>
 474 </tr>
 475 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 476 <td>121</td>
 477 <td>24</td>
 478 <td>J721E_DEV_MCAN3</td>
 479 <td>mcanss_mcan_lvl_int</td>
 480 <td>0</td>
 481 </tr>
 482 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 483 <td>121</td>
 484 <td>25</td>
 485 <td>J721E_DEV_MCAN3</td>
 486 <td>mcanss_mcan_lvl_int</td>
 487 <td>1</td>
 488 </tr>
 489 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 490 <td>121</td>
 491 <td>26</td>
 492 <td>J721E_DEV_MCAN3</td>
 493 <td>mcanss_ext_ts_rollover_lvl_int</td>
 494 <td>0</td>
 495 </tr>
 496 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 497 <td>121</td>
 498 <td>27</td>
 499 <td>J721E_DEV_I2C3</td>
 500 <td>pointrpend</td>
 501 <td>0</td>
 502 </tr>
 503 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 504 <td>121</td>
 505 <td>28</td>
 506 <td>J721E_DEV_I2C4</td>
 507 <td>pointrpend</td>
 508 <td>0</td>
 509 </tr>
 510 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 511 <td>121</td>
 512 <td>29</td>
 513 <td>J721E_DEV_I2C5</td>
 514 <td>pointrpend</td>
 515 <td>0</td>
 516 </tr>
 517 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 518 <td>121</td>
 519 <td>30</td>
 520 <td>J721E_DEV_I2C6</td>
 521 <td>pointrpend</td>
 522 <td>0</td>
 523 </tr>
 524 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 525 <td>121</td>
 526 <td>31</td>
 527 <td>Not Connected</td>
 528 <td>&#160;</td>
 529 <td>&#160;</td>
 530 </tr>
 531 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 532 <td>121</td>
 533 <td>32</td>
 534 <td>Not Connected</td>
 535 <td>&#160;</td>
 536 <td>&#160;</td>
 537 </tr>
 538 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 539 <td>121</td>
 540 <td>33</td>
 541 <td>J721E_DEV_EHRPWM0</td>
 542 <td>epwm_etint</td>
 543 <td>0</td>
 544 </tr>
 545 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 546 <td>121</td>
 547 <td>34</td>
 548 <td>J721E_DEV_EHRPWM1</td>
 549 <td>epwm_etint</td>
 550 <td>0</td>
 551 </tr>
 552 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 553 <td>121</td>
 554 <td>35</td>
 555 <td>J721E_DEV_EHRPWM2</td>
 556 <td>epwm_etint</td>
 557 <td>0</td>
 558 </tr>
 559 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 560 <td>121</td>
 561 <td>36</td>
 562 <td>J721E_DEV_EHRPWM3</td>
 563 <td>epwm_etint</td>
 564 <td>0</td>
 565 </tr>
 566 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 567 <td>121</td>
 568 <td>37</td>
 569 <td>J721E_DEV_EHRPWM4</td>
 570 <td>epwm_etint</td>
 571 <td>0</td>
 572 </tr>
 573 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 574 <td>121</td>
 575 <td>38</td>
 576 <td>J721E_DEV_EHRPWM5</td>
 577 <td>epwm_etint</td>
 578 <td>0</td>
 579 </tr>
 580 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 581 <td>121</td>
 582 <td>39</td>
 583 <td>J721E_DEV_EHRPWM0</td>
 584 <td>epwm_tripzint</td>
 585 <td>0</td>
 586 </tr>
 587 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 588 <td>121</td>
 589 <td>40</td>
 590 <td>J721E_DEV_EHRPWM1</td>
 591 <td>epwm_tripzint</td>
 592 <td>0</td>
 593 </tr>
 594 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 595 <td>121</td>
 596 <td>41</td>
 597 <td>J721E_DEV_EHRPWM2</td>
 598 <td>epwm_tripzint</td>
 599 <td>0</td>
 600 </tr>
 601 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 602 <td>121</td>
 603 <td>42</td>
 604 <td>J721E_DEV_EHRPWM3</td>
 605 <td>epwm_tripzint</td>
 606 <td>0</td>
 607 </tr>
 608 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 609 <td>121</td>
 610 <td>43</td>
 611 <td>J721E_DEV_EHRPWM4</td>
 612 <td>epwm_tripzint</td>
 613 <td>0</td>
 614 </tr>
 615 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 616 <td>121</td>
 617 <td>44</td>
 618 <td>J721E_DEV_EHRPWM5</td>
 619 <td>epwm_tripzint</td>
 620 <td>0</td>
 621 </tr>
 622 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 623 <td>121</td>
 624 <td>45</td>
 625 <td>J721E_DEV_ECAP0</td>
 626 <td>ecap_int</td>
 627 <td>0</td>
 628 </tr>
 629 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 630 <td>121</td>
 631 <td>46</td>
 632 <td>J721E_DEV_ECAP1</td>
 633 <td>ecap_int</td>
 634 <td>0</td>
 635 </tr>
 636 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 637 <td>121</td>
 638 <td>47</td>
 639 <td>J721E_DEV_ECAP2</td>
 640 <td>ecap_int</td>
 641 <td>0</td>
 642 </tr>
 643 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 644 <td>121</td>
 645 <td>48</td>
 646 <td>J721E_DEV_EQEP0</td>
 647 <td>eqep_int</td>
 648 <td>0</td>
 649 </tr>
 650 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 651 <td>121</td>
 652 <td>49</td>
 653 <td>J721E_DEV_EQEP1</td>
 654 <td>eqep_int</td>
 655 <td>0</td>
 656 </tr>
 657 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 658 <td>121</td>
 659 <td>50</td>
 660 <td>J721E_DEV_EQEP2</td>
 661 <td>eqep_int</td>
 662 <td>0</td>
 663 </tr>
 664 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 665 <td>121</td>
 666 <td>51</td>
 667 <td>J721E_DEV_UART3</td>
 668 <td>usart_irq</td>
 669 <td>0</td>
 670 </tr>
 671 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 672 <td>121</td>
 673 <td>52</td>
 674 <td>J721E_DEV_UART4</td>
 675 <td>usart_irq</td>
 676 <td>0</td>
 677 </tr>
 678 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 679 <td>121</td>
 680 <td>53</td>
 681 <td>J721E_DEV_UART5</td>
 682 <td>usart_irq</td>
 683 <td>0</td>
 684 </tr>
 685 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 686 <td>121</td>
 687 <td>54</td>
 688 <td>J721E_DEV_UART6</td>
 689 <td>usart_irq</td>
 690 <td>0</td>
 691 </tr>
 692 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 693 <td>121</td>
 694 <td>55</td>
 695 <td>J721E_DEV_UART7</td>
 696 <td>usart_irq</td>
 697 <td>0</td>
 698 </tr>
 699 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 700 <td>121</td>
 701 <td>56</td>
 702 <td>J721E_DEV_UART8</td>
 703 <td>usart_irq</td>
 704 <td>0</td>
 705 </tr>
 706 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 707 <td>121</td>
 708 <td>57</td>
 709 <td>J721E_DEV_UART9</td>
 710 <td>usart_irq</td>
 711 <td>0</td>
 712 </tr>
 713 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 714 <td>121</td>
 715 <td>58</td>
 716 <td>J721E_DEV_MCAN4</td>
 717 <td>mcanss_mcan_lvl_int</td>
 718 <td>0</td>
 719 </tr>
 720 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 721 <td>121</td>
 722 <td>59</td>
 723 <td>J721E_DEV_MCAN4</td>
 724 <td>mcanss_mcan_lvl_int</td>
 725 <td>1</td>
 726 </tr>
 727 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 728 <td>121</td>
 729 <td>60</td>
 730 <td>J721E_DEV_MCAN4</td>
 731 <td>mcanss_ext_ts_rollover_lvl_int</td>
 732 <td>0</td>
 733 </tr>
 734 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 735 <td>121</td>
 736 <td>61</td>
 737 <td>J721E_DEV_MCAN5</td>
 738 <td>mcanss_mcan_lvl_int</td>
 739 <td>0</td>
 740 </tr>
 741 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 742 <td>121</td>
 743 <td>62</td>
 744 <td>J721E_DEV_MCAN5</td>
 745 <td>mcanss_mcan_lvl_int</td>
 746 <td>1</td>
 747 </tr>
 748 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 749 <td>121</td>
 750 <td>63</td>
 751 <td>J721E_DEV_MCAN5</td>
 752 <td>mcanss_ext_ts_rollover_lvl_int</td>
 753 <td>0</td>
 754 </tr>
 755 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 756 <td>121</td>
 757 <td>64</td>
 758 <td>J721E_DEV_MCAN6</td>
 759 <td>mcanss_mcan_lvl_int</td>
 760 <td>0</td>
 761 </tr>
 762 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 763 <td>121</td>
 764 <td>65</td>
 765 <td>J721E_DEV_MCAN6</td>
 766 <td>mcanss_mcan_lvl_int</td>
 767 <td>1</td>
 768 </tr>
 769 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 770 <td>121</td>
 771 <td>66</td>
 772 <td>J721E_DEV_MCAN6</td>
 773 <td>mcanss_ext_ts_rollover_lvl_int</td>
 774 <td>0</td>
 775 </tr>
 776 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 777 <td>121</td>
 778 <td>67</td>
 779 <td>J721E_DEV_MCAN7</td>
 780 <td>mcanss_mcan_lvl_int</td>
 781 <td>0</td>
 782 </tr>
 783 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 784 <td>121</td>
 785 <td>68</td>
 786 <td>J721E_DEV_MCAN7</td>
 787 <td>mcanss_mcan_lvl_int</td>
 788 <td>1</td>
 789 </tr>
 790 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 791 <td>121</td>
 792 <td>69</td>
 793 <td>J721E_DEV_MCAN7</td>
 794 <td>mcanss_ext_ts_rollover_lvl_int</td>
 795 <td>0</td>
 796 </tr>
 797 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 798 <td>121</td>
 799 <td>70</td>
 800 <td>J721E_DEV_MCAN8</td>
 801 <td>mcanss_mcan_lvl_int</td>
 802 <td>0</td>
 803 </tr>
 804 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 805 <td>121</td>
 806 <td>71</td>
 807 <td>J721E_DEV_MCAN8</td>
 808 <td>mcanss_mcan_lvl_int</td>
 809 <td>1</td>
 810 </tr>
 811 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 812 <td>121</td>
 813 <td>72</td>
 814 <td>J721E_DEV_MCAN8</td>
 815 <td>mcanss_ext_ts_rollover_lvl_int</td>
 816 <td>0</td>
 817 </tr>
 818 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 819 <td>121</td>
 820 <td>73</td>
 821 <td>J721E_DEV_MCAN9</td>
 822 <td>mcanss_mcan_lvl_int</td>
 823 <td>0</td>
 824 </tr>
 825 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 826 <td>121</td>
 827 <td>74</td>
 828 <td>J721E_DEV_MCAN9</td>
 829 <td>mcanss_mcan_lvl_int</td>
 830 <td>1</td>
 831 </tr>
 832 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 833 <td>121</td>
 834 <td>75</td>
 835 <td>J721E_DEV_MCAN9</td>
 836 <td>mcanss_ext_ts_rollover_lvl_int</td>
 837 <td>0</td>
 838 </tr>
 839 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 840 <td>121</td>
 841 <td>76</td>
 842 <td>J721E_DEV_MCAN10</td>
 843 <td>mcanss_mcan_lvl_int</td>
 844 <td>0</td>
 845 </tr>
 846 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 847 <td>121</td>
 848 <td>77</td>
 849 <td>J721E_DEV_MCAN10</td>
 850 <td>mcanss_mcan_lvl_int</td>
 851 <td>1</td>
 852 </tr>
 853 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 854 <td>121</td>
 855 <td>78</td>
 856 <td>J721E_DEV_MCAN10</td>
 857 <td>mcanss_ext_ts_rollover_lvl_int</td>
 858 <td>0</td>
 859 </tr>
 860 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 861 <td>121</td>
 862 <td>79</td>
 863 <td>J721E_DEV_MCAN11</td>
 864 <td>mcanss_mcan_lvl_int</td>
 865 <td>0</td>
 866 </tr>
 867 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 868 <td>121</td>
 869 <td>80</td>
 870 <td>J721E_DEV_MCAN11</td>
 871 <td>mcanss_mcan_lvl_int</td>
 872 <td>1</td>
 873 </tr>
 874 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 875 <td>121</td>
 876 <td>81</td>
 877 <td>J721E_DEV_MCAN11</td>
 878 <td>mcanss_ext_ts_rollover_lvl_int</td>
 879 <td>0</td>
 880 </tr>
 881 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 882 <td>121</td>
 883 <td>82</td>
 884 <td>J721E_DEV_MCAN12</td>
 885 <td>mcanss_mcan_lvl_int</td>
 886 <td>0</td>
 887 </tr>
 888 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 889 <td>121</td>
 890 <td>83</td>
 891 <td>J721E_DEV_MCAN12</td>
 892 <td>mcanss_mcan_lvl_int</td>
 893 <td>1</td>
 894 </tr>
 895 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 896 <td>121</td>
 897 <td>84</td>
 898 <td>J721E_DEV_MCAN12</td>
 899 <td>mcanss_ext_ts_rollover_lvl_int</td>
 900 <td>0</td>
 901 </tr>
 902 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 903 <td>121</td>
 904 <td>85</td>
 905 <td>J721E_DEV_MCAN13</td>
 906 <td>mcanss_mcan_lvl_int</td>
 907 <td>0</td>
 908 </tr>
 909 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 910 <td>121</td>
 911 <td>86</td>
 912 <td>J721E_DEV_MCAN13</td>
 913 <td>mcanss_mcan_lvl_int</td>
 914 <td>1</td>
 915 </tr>
 916 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 917 <td>121</td>
 918 <td>87</td>
 919 <td>J721E_DEV_MCAN13</td>
 920 <td>mcanss_ext_ts_rollover_lvl_int</td>
 921 <td>0</td>
 922 </tr>
 923 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 924 <td>121</td>
 925 <td>88</td>
 926 <td>Not Connected</td>
 927 <td>&#160;</td>
 928 <td>&#160;</td>
 929 </tr>
 930 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 931 <td>121</td>
 932 <td>89</td>
 933 <td>Not Connected</td>
 934 <td>&#160;</td>
 935 <td>&#160;</td>
 936 </tr>
 937 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 938 <td>121</td>
 939 <td>90</td>
 940 <td>Not Connected</td>
 941 <td>&#160;</td>
 942 <td>&#160;</td>
 943 </tr>
 944 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 945 <td>121</td>
 946 <td>91</td>
 947 <td>Not Connected</td>
 948 <td>&#160;</td>
 949 <td>&#160;</td>
 950 </tr>
 951 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 952 <td>121</td>
 953 <td>92</td>
 954 <td>Not Connected</td>
 955 <td>&#160;</td>
 956 <td>&#160;</td>
 957 </tr>
 958 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 959 <td>121</td>
 960 <td>93</td>
 961 <td>Not Connected</td>
 962 <td>&#160;</td>
 963 <td>&#160;</td>
 964 </tr>
 965 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 966 <td>121</td>
 967 <td>94</td>
 968 <td>Not Connected</td>
 969 <td>&#160;</td>
 970 <td>&#160;</td>
 971 </tr>
 972 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 973 <td>121</td>
 974 <td>95</td>
 975 <td>Not Connected</td>
 976 <td>&#160;</td>
 977 <td>&#160;</td>
 978 </tr>
 979 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
 980 <td>121</td>
 981 <td>96</td>
 982 <td>Not Connected</td>
 983 <td>&#160;</td>
 984 <td>&#160;</td>
 985 </tr>
 986 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0
 987 (<strong>Reserved by System Firmware</strong>)</td>
 988 <td>121</td>
 989 <td>97</td>
 990 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
 991 <td>outl_intr</td>
 992 <td>344</td>
 993 </tr>
 994 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0
 995 (<strong>Reserved by System Firmware</strong>)</td>
 996 <td>121</td>
 997 <td>98</td>
 998 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
 999 <td>outl_intr</td>
1000 <td>345</td>
1001 </tr>
1002 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0
1003 (<strong>Reserved by System Firmware</strong>)</td>
1004 <td>121</td>
1005 <td>99</td>
1006 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
1007 <td>outl_intr</td>
1008 <td>346</td>
1009 </tr>
1010 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0
1011 (<strong>Reserved by System Firmware</strong>)</td>
1012 <td>121</td>
1013 <td>100</td>
1014 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
1015 <td>outl_intr</td>
1016 <td>347</td>
1017 </tr>
1018 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1019 <td>121</td>
1020 <td>101</td>
1021 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
1022 <td>outl_intr</td>
1023 <td>348</td>
1024 </tr>
1025 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1026 <td>121</td>
1027 <td>102</td>
1028 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
1029 <td>outl_intr</td>
1030 <td>349</td>
1031 </tr>
1032 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1033 <td>121</td>
1034 <td>103</td>
1035 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
1036 <td>outl_intr</td>
1037 <td>350</td>
1038 </tr>
1039 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1040 <td>121</td>
1041 <td>104</td>
1042 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
1043 <td>outl_intr</td>
1044 <td>351</td>
1045 </tr>
1046 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1047 <td>121</td>
1048 <td>105</td>
1049 <td>J721E_DEV_DSS0</td>
1050 <td>dss_inst0_dispc_func_irq_proc0</td>
1051 <td>0</td>
1052 </tr>
1053 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1054 <td>121</td>
1055 <td>106</td>
1056 <td>J721E_DEV_DSS0</td>
1057 <td>dss_inst0_dispc_func_irq_proc1</td>
1058 <td>0</td>
1059 </tr>
1060 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1061 <td>121</td>
1062 <td>107</td>
1063 <td>J721E_DEV_DSS0</td>
1064 <td>dss_inst0_dispc_secure_irq_proc0</td>
1065 <td>0</td>
1066 </tr>
1067 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1068 <td>121</td>
1069 <td>108</td>
1070 <td>J721E_DEV_DSS0</td>
1071 <td>dss_inst0_dispc_secure_irq_proc1</td>
1072 <td>0</td>
1073 </tr>
1074 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1075 <td>121</td>
1076 <td>109</td>
1077 <td>J721E_DEV_DSS0</td>
1078 <td>dss_inst0_dispc_safety_error_irq_proc0</td>
1079 <td>0</td>
1080 </tr>
1081 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1082 <td>121</td>
1083 <td>110</td>
1084 <td>J721E_DEV_DSS0</td>
1085 <td>dss_inst0_dispc_safety_error_irq_proc1</td>
1086 <td>0</td>
1087 </tr>
1088 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1089 <td>121</td>
1090 <td>111</td>
1091 <td>Not Connected</td>
1092 <td>&#160;</td>
1093 <td>&#160;</td>
1094 </tr>
1095 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1096 <td>121</td>
1097 <td>112</td>
1098 <td>Not Connected</td>
1099 <td>&#160;</td>
1100 <td>&#160;</td>
1101 </tr>
1102 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1103 <td>121</td>
1104 <td>113</td>
1105 <td>Not Connected</td>
1106 <td>&#160;</td>
1107 <td>&#160;</td>
1108 </tr>
1109 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1110 <td>121</td>
1111 <td>114</td>
1112 <td>Not Connected</td>
1113 <td>&#160;</td>
1114 <td>&#160;</td>
1115 </tr>
1116 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1117 <td>121</td>
1118 <td>115</td>
1119 <td>Not Connected</td>
1120 <td>&#160;</td>
1121 <td>&#160;</td>
1122 </tr>
1123 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1124 <td>121</td>
1125 <td>116</td>
1126 <td>Not Connected</td>
1127 <td>&#160;</td>
1128 <td>&#160;</td>
1129 </tr>
1130 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1131 <td>121</td>
1132 <td>117</td>
1133 <td>J721E_DEV_CPSW0</td>
1134 <td>stat_pend</td>
1135 <td>0</td>
1136 </tr>
1137 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1138 <td>121</td>
1139 <td>118</td>
1140 <td>J721E_DEV_CPSW0</td>
1141 <td>mdio_pend</td>
1142 <td>0</td>
1143 </tr>
1144 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1145 <td>121</td>
1146 <td>119</td>
1147 <td>J721E_DEV_CPSW0</td>
1148 <td>evnt_pend</td>
1149 <td>0</td>
1150 </tr>
1151 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1152 <td>121</td>
1153 <td>120</td>
1154 <td>Not Connected</td>
1155 <td>&#160;</td>
1156 <td>&#160;</td>
1157 </tr>
1158 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1159 <td>121</td>
1160 <td>121</td>
1161 <td>J721E_DEV_SA2_UL0</td>
1162 <td>sa_ul_pka</td>
1163 <td>0</td>
1164 </tr>
1165 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1166 <td>121</td>
1167 <td>122</td>
1168 <td>J721E_DEV_SA2_UL0</td>
1169 <td>sa_ul_trng</td>
1170 <td>0</td>
1171 </tr>
1172 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1173 <td>121</td>
1174 <td>123</td>
1175 <td>J721E_DEV_ESM0</td>
1176 <td>esm_int_low_lvl</td>
1177 <td>0</td>
1178 </tr>
1179 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1180 <td>121</td>
1181 <td>124</td>
1182 <td>J721E_DEV_ESM0</td>
1183 <td>esm_int_hi_lvl</td>
1184 <td>0</td>
1185 </tr>
1186 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1187 <td>121</td>
1188 <td>125</td>
1189 <td>J721E_DEV_ESM0</td>
1190 <td>esm_int_cfg_lvl</td>
1191 <td>0</td>
1192 </tr>
1193 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1194 <td>121</td>
1195 <td>126</td>
1196 <td>Not Connected</td>
1197 <td>&#160;</td>
1198 <td>&#160;</td>
1199 </tr>
1200 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1201 <td>121</td>
1202 <td>127</td>
1203 <td>Not Connected</td>
1204 <td>&#160;</td>
1205 <td>&#160;</td>
1206 </tr>
1207 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1208 <td>121</td>
1209 <td>128</td>
1210 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1211 <td>outp</td>
1212 <td>40</td>
1213 </tr>
1214 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1215 <td>121</td>
1216 <td>129</td>
1217 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1218 <td>outp</td>
1219 <td>41</td>
1220 </tr>
1221 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1222 <td>121</td>
1223 <td>130</td>
1224 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1225 <td>outp</td>
1226 <td>42</td>
1227 </tr>
1228 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1229 <td>121</td>
1230 <td>131</td>
1231 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1232 <td>outp</td>
1233 <td>43</td>
1234 </tr>
1235 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1236 <td>121</td>
1237 <td>132</td>
1238 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1239 <td>outp</td>
1240 <td>44</td>
1241 </tr>
1242 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1243 <td>121</td>
1244 <td>133</td>
1245 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1246 <td>outp</td>
1247 <td>45</td>
1248 </tr>
1249 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1250 <td>121</td>
1251 <td>134</td>
1252 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1253 <td>outp</td>
1254 <td>46</td>
1255 </tr>
1256 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1257 <td>121</td>
1258 <td>135</td>
1259 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1260 <td>outp</td>
1261 <td>47</td>
1262 </tr>
1263 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1264 <td>121</td>
1265 <td>136</td>
1266 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1267 <td>outp</td>
1268 <td>48</td>
1269 </tr>
1270 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1271 <td>121</td>
1272 <td>137</td>
1273 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1274 <td>outp</td>
1275 <td>49</td>
1276 </tr>
1277 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1278 <td>121</td>
1279 <td>138</td>
1280 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1281 <td>outp</td>
1282 <td>50</td>
1283 </tr>
1284 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1285 <td>121</td>
1286 <td>139</td>
1287 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1288 <td>outp</td>
1289 <td>51</td>
1290 </tr>
1291 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1292 <td>121</td>
1293 <td>140</td>
1294 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1295 <td>outp</td>
1296 <td>52</td>
1297 </tr>
1298 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1299 <td>121</td>
1300 <td>141</td>
1301 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1302 <td>outp</td>
1303 <td>53</td>
1304 </tr>
1305 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1306 <td>121</td>
1307 <td>142</td>
1308 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1309 <td>outp</td>
1310 <td>54</td>
1311 </tr>
1312 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1313 <td>121</td>
1314 <td>143</td>
1315 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1316 <td>outp</td>
1317 <td>55</td>
1318 </tr>
1319 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1320 <td>121</td>
1321 <td>144</td>
1322 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1323 <td>outp</td>
1324 <td>56</td>
1325 </tr>
1326 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1327 <td>121</td>
1328 <td>145</td>
1329 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1330 <td>outp</td>
1331 <td>57</td>
1332 </tr>
1333 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1334 <td>121</td>
1335 <td>146</td>
1336 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1337 <td>outp</td>
1338 <td>58</td>
1339 </tr>
1340 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1341 <td>121</td>
1342 <td>147</td>
1343 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1344 <td>outp</td>
1345 <td>59</td>
1346 </tr>
1347 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1348 <td>121</td>
1349 <td>148</td>
1350 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1351 <td>outp</td>
1352 <td>60</td>
1353 </tr>
1354 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1355 <td>121</td>
1356 <td>149</td>
1357 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1358 <td>outp</td>
1359 <td>61</td>
1360 </tr>
1361 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1362 <td>121</td>
1363 <td>150</td>
1364 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1365 <td>outp</td>
1366 <td>62</td>
1367 </tr>
1368 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1369 <td>121</td>
1370 <td>151</td>
1371 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
1372 <td>outp</td>
1373 <td>63</td>
1374 </tr>
1375 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1376 <td>121</td>
1377 <td>152</td>
1378 <td>J721E_DEV_PRU_ICSSG0</td>
1379 <td>pr1_host_intr_pend</td>
1380 <td>0</td>
1381 </tr>
1382 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1383 <td>121</td>
1384 <td>153</td>
1385 <td>J721E_DEV_PRU_ICSSG0</td>
1386 <td>pr1_host_intr_pend</td>
1387 <td>1</td>
1388 </tr>
1389 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1390 <td>121</td>
1391 <td>154</td>
1392 <td>J721E_DEV_PRU_ICSSG0</td>
1393 <td>pr1_host_intr_pend</td>
1394 <td>2</td>
1395 </tr>
1396 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1397 <td>121</td>
1398 <td>155</td>
1399 <td>J721E_DEV_PRU_ICSSG0</td>
1400 <td>pr1_host_intr_pend</td>
1401 <td>3</td>
1402 </tr>
1403 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1404 <td>121</td>
1405 <td>156</td>
1406 <td>J721E_DEV_PRU_ICSSG0</td>
1407 <td>pr1_host_intr_pend</td>
1408 <td>4</td>
1409 </tr>
1410 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1411 <td>121</td>
1412 <td>157</td>
1413 <td>J721E_DEV_PRU_ICSSG0</td>
1414 <td>pr1_host_intr_pend</td>
1415 <td>5</td>
1416 </tr>
1417 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1418 <td>121</td>
1419 <td>158</td>
1420 <td>J721E_DEV_PRU_ICSSG0</td>
1421 <td>pr1_host_intr_pend</td>
1422 <td>6</td>
1423 </tr>
1424 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1425 <td>121</td>
1426 <td>159</td>
1427 <td>J721E_DEV_PRU_ICSSG0</td>
1428 <td>pr1_host_intr_pend</td>
1429 <td>7</td>
1430 </tr>
1431 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1432 <td>121</td>
1433 <td>160</td>
1434 <td>J721E_DEV_PRU_ICSSG1</td>
1435 <td>pr1_host_intr_pend</td>
1436 <td>0</td>
1437 </tr>
1438 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1439 <td>121</td>
1440 <td>161</td>
1441 <td>J721E_DEV_PRU_ICSSG1</td>
1442 <td>pr1_host_intr_pend</td>
1443 <td>1</td>
1444 </tr>
1445 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1446 <td>121</td>
1447 <td>162</td>
1448 <td>J721E_DEV_PRU_ICSSG1</td>
1449 <td>pr1_host_intr_pend</td>
1450 <td>2</td>
1451 </tr>
1452 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1453 <td>121</td>
1454 <td>163</td>
1455 <td>J721E_DEV_PRU_ICSSG1</td>
1456 <td>pr1_host_intr_pend</td>
1457 <td>3</td>
1458 </tr>
1459 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1460 <td>121</td>
1461 <td>164</td>
1462 <td>J721E_DEV_PRU_ICSSG1</td>
1463 <td>pr1_host_intr_pend</td>
1464 <td>4</td>
1465 </tr>
1466 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1467 <td>121</td>
1468 <td>165</td>
1469 <td>J721E_DEV_PRU_ICSSG1</td>
1470 <td>pr1_host_intr_pend</td>
1471 <td>5</td>
1472 </tr>
1473 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1474 <td>121</td>
1475 <td>166</td>
1476 <td>J721E_DEV_PRU_ICSSG1</td>
1477 <td>pr1_host_intr_pend</td>
1478 <td>6</td>
1479 </tr>
1480 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1481 <td>121</td>
1482 <td>167</td>
1483 <td>J721E_DEV_PRU_ICSSG1</td>
1484 <td>pr1_host_intr_pend</td>
1485 <td>7</td>
1486 </tr>
1487 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1488 <td>121</td>
1489 <td>168</td>
1490 <td>J721E_DEV_PRU_ICSSG0</td>
1491 <td>pr1_tx_sof_intr_req</td>
1492 <td>0</td>
1493 </tr>
1494 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1495 <td>121</td>
1496 <td>169</td>
1497 <td>J721E_DEV_PRU_ICSSG0</td>
1498 <td>pr1_tx_sof_intr_req</td>
1499 <td>1</td>
1500 </tr>
1501 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1502 <td>121</td>
1503 <td>170</td>
1504 <td>J721E_DEV_PRU_ICSSG0</td>
1505 <td>pr1_rx_sof_intr_req</td>
1506 <td>0</td>
1507 </tr>
1508 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1509 <td>121</td>
1510 <td>171</td>
1511 <td>J721E_DEV_PRU_ICSSG0</td>
1512 <td>pr1_rx_sof_intr_req</td>
1513 <td>1</td>
1514 </tr>
1515 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1516 <td>121</td>
1517 <td>172</td>
1518 <td>J721E_DEV_PRU_ICSSG1</td>
1519 <td>pr1_tx_sof_intr_req</td>
1520 <td>0</td>
1521 </tr>
1522 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1523 <td>121</td>
1524 <td>173</td>
1525 <td>J721E_DEV_PRU_ICSSG1</td>
1526 <td>pr1_tx_sof_intr_req</td>
1527 <td>1</td>
1528 </tr>
1529 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1530 <td>121</td>
1531 <td>174</td>
1532 <td>J721E_DEV_PRU_ICSSG1</td>
1533 <td>pr1_rx_sof_intr_req</td>
1534 <td>0</td>
1535 </tr>
1536 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1537 <td>121</td>
1538 <td>175</td>
1539 <td>J721E_DEV_PRU_ICSSG1</td>
1540 <td>pr1_rx_sof_intr_req</td>
1541 <td>1</td>
1542 </tr>
1543 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1544 <td>121</td>
1545 <td>176</td>
1546 <td>J721E_DEV_USB0</td>
1547 <td>irq</td>
1548 <td>0</td>
1549 </tr>
1550 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1551 <td>121</td>
1552 <td>177</td>
1553 <td>J721E_DEV_USB0</td>
1554 <td>irq</td>
1555 <td>1</td>
1556 </tr>
1557 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1558 <td>121</td>
1559 <td>178</td>
1560 <td>J721E_DEV_USB0</td>
1561 <td>irq</td>
1562 <td>2</td>
1563 </tr>
1564 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1565 <td>121</td>
1566 <td>179</td>
1567 <td>J721E_DEV_USB0</td>
1568 <td>irq</td>
1569 <td>3</td>
1570 </tr>
1571 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1572 <td>121</td>
1573 <td>180</td>
1574 <td>J721E_DEV_USB0</td>
1575 <td>irq</td>
1576 <td>4</td>
1577 </tr>
1578 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1579 <td>121</td>
1580 <td>181</td>
1581 <td>J721E_DEV_USB0</td>
1582 <td>irq</td>
1583 <td>5</td>
1584 </tr>
1585 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1586 <td>121</td>
1587 <td>182</td>
1588 <td>J721E_DEV_USB0</td>
1589 <td>irq</td>
1590 <td>6</td>
1591 </tr>
1592 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1593 <td>121</td>
1594 <td>183</td>
1595 <td>J721E_DEV_USB0</td>
1596 <td>irq</td>
1597 <td>7</td>
1598 </tr>
1599 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1600 <td>121</td>
1601 <td>184</td>
1602 <td>J721E_DEV_USB1</td>
1603 <td>irq</td>
1604 <td>0</td>
1605 </tr>
1606 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1607 <td>121</td>
1608 <td>185</td>
1609 <td>J721E_DEV_USB1</td>
1610 <td>irq</td>
1611 <td>1</td>
1612 </tr>
1613 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1614 <td>121</td>
1615 <td>186</td>
1616 <td>J721E_DEV_USB1</td>
1617 <td>irq</td>
1618 <td>2</td>
1619 </tr>
1620 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1621 <td>121</td>
1622 <td>187</td>
1623 <td>J721E_DEV_USB1</td>
1624 <td>irq</td>
1625 <td>3</td>
1626 </tr>
1627 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1628 <td>121</td>
1629 <td>188</td>
1630 <td>J721E_DEV_USB1</td>
1631 <td>irq</td>
1632 <td>4</td>
1633 </tr>
1634 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1635 <td>121</td>
1636 <td>189</td>
1637 <td>J721E_DEV_USB1</td>
1638 <td>irq</td>
1639 <td>5</td>
1640 </tr>
1641 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1642 <td>121</td>
1643 <td>190</td>
1644 <td>J721E_DEV_USB1</td>
1645 <td>irq</td>
1646 <td>6</td>
1647 </tr>
1648 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1649 <td>121</td>
1650 <td>191</td>
1651 <td>J721E_DEV_USB1</td>
1652 <td>irq</td>
1653 <td>7</td>
1654 </tr>
1655 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1656 <td>121</td>
1657 <td>192</td>
1658 <td>Not Connected</td>
1659 <td>&#160;</td>
1660 <td>&#160;</td>
1661 </tr>
1662 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1663 <td>121</td>
1664 <td>193</td>
1665 <td>Not Connected</td>
1666 <td>&#160;</td>
1667 <td>&#160;</td>
1668 </tr>
1669 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1670 <td>121</td>
1671 <td>194</td>
1672 <td>Not Connected</td>
1673 <td>&#160;</td>
1674 <td>&#160;</td>
1675 </tr>
1676 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1677 <td>121</td>
1678 <td>195</td>
1679 <td>Not Connected</td>
1680 <td>&#160;</td>
1681 <td>&#160;</td>
1682 </tr>
1683 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1684 <td>121</td>
1685 <td>196</td>
1686 <td>Not Connected</td>
1687 <td>&#160;</td>
1688 <td>&#160;</td>
1689 </tr>
1690 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1691 <td>121</td>
1692 <td>197</td>
1693 <td>Not Connected</td>
1694 <td>&#160;</td>
1695 <td>&#160;</td>
1696 </tr>
1697 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1698 <td>121</td>
1699 <td>198</td>
1700 <td>Not Connected</td>
1701 <td>&#160;</td>
1702 <td>&#160;</td>
1703 </tr>
1704 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1705 <td>121</td>
1706 <td>199</td>
1707 <td>Not Connected</td>
1708 <td>&#160;</td>
1709 <td>&#160;</td>
1710 </tr>
1711 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1712 <td>121</td>
1713 <td>200</td>
1714 <td>J721E_DEV_USB0</td>
1715 <td>otgirq</td>
1716 <td>0</td>
1717 </tr>
1718 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1719 <td>121</td>
1720 <td>201</td>
1721 <td>J721E_DEV_USB1</td>
1722 <td>otgirq</td>
1723 <td>0</td>
1724 </tr>
1725 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1726 <td>121</td>
1727 <td>202</td>
1728 <td>Not Connected</td>
1729 <td>&#160;</td>
1730 <td>&#160;</td>
1731 </tr>
1732 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1733 <td>121</td>
1734 <td>203</td>
1735 <td>J721E_DEV_PCIE0</td>
1736 <td>pcie_legacy_pulse</td>
1737 <td>0</td>
1738 </tr>
1739 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1740 <td>121</td>
1741 <td>204</td>
1742 <td>J721E_DEV_PCIE0</td>
1743 <td>pcie_downstream_pulse</td>
1744 <td>0</td>
1745 </tr>
1746 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1747 <td>121</td>
1748 <td>205</td>
1749 <td>J721E_DEV_PCIE0</td>
1750 <td>pcie_flr_pulse</td>
1751 <td>0</td>
1752 </tr>
1753 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1754 <td>121</td>
1755 <td>206</td>
1756 <td>J721E_DEV_PCIE0</td>
1757 <td>pcie_phy_level</td>
1758 <td>0</td>
1759 </tr>
1760 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1761 <td>121</td>
1762 <td>207</td>
1763 <td>J721E_DEV_PCIE0</td>
1764 <td>pcie_local_level</td>
1765 <td>0</td>
1766 </tr>
1767 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1768 <td>121</td>
1769 <td>208</td>
1770 <td>J721E_DEV_PCIE0</td>
1771 <td>pcie_error_pulse</td>
1772 <td>0</td>
1773 </tr>
1774 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1775 <td>121</td>
1776 <td>209</td>
1777 <td>J721E_DEV_PCIE0</td>
1778 <td>pcie_link_state_pulse</td>
1779 <td>0</td>
1780 </tr>
1781 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1782 <td>121</td>
1783 <td>210</td>
1784 <td>J721E_DEV_PCIE0</td>
1785 <td>pcie_pwr_state_pulse</td>
1786 <td>0</td>
1787 </tr>
1788 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1789 <td>121</td>
1790 <td>211</td>
1791 <td>J721E_DEV_PCIE0</td>
1792 <td>pcie_ptm_valid_pulse</td>
1793 <td>0</td>
1794 </tr>
1795 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1796 <td>121</td>
1797 <td>212</td>
1798 <td>J721E_DEV_PCIE0</td>
1799 <td>pcie_hot_reset_pulse</td>
1800 <td>0</td>
1801 </tr>
1802 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1803 <td>121</td>
1804 <td>213</td>
1805 <td>J721E_DEV_PCIE0</td>
1806 <td>pcie_cpts_pend</td>
1807 <td>0</td>
1808 </tr>
1809 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1810 <td>121</td>
1811 <td>214</td>
1812 <td>Not Connected</td>
1813 <td>&#160;</td>
1814 <td>&#160;</td>
1815 </tr>
1816 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1817 <td>121</td>
1818 <td>215</td>
1819 <td>J721E_DEV_PCIE1</td>
1820 <td>pcie_legacy_pulse</td>
1821 <td>0</td>
1822 </tr>
1823 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1824 <td>121</td>
1825 <td>216</td>
1826 <td>J721E_DEV_PCIE1</td>
1827 <td>pcie_downstream_pulse</td>
1828 <td>0</td>
1829 </tr>
1830 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1831 <td>121</td>
1832 <td>217</td>
1833 <td>J721E_DEV_PCIE1</td>
1834 <td>pcie_flr_pulse</td>
1835 <td>0</td>
1836 </tr>
1837 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1838 <td>121</td>
1839 <td>218</td>
1840 <td>J721E_DEV_PCIE1</td>
1841 <td>pcie_phy_level</td>
1842 <td>0</td>
1843 </tr>
1844 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1845 <td>121</td>
1846 <td>219</td>
1847 <td>J721E_DEV_PCIE1</td>
1848 <td>pcie_local_level</td>
1849 <td>0</td>
1850 </tr>
1851 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1852 <td>121</td>
1853 <td>220</td>
1854 <td>J721E_DEV_PCIE1</td>
1855 <td>pcie_error_pulse</td>
1856 <td>0</td>
1857 </tr>
1858 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1859 <td>121</td>
1860 <td>221</td>
1861 <td>J721E_DEV_PCIE1</td>
1862 <td>pcie_link_state_pulse</td>
1863 <td>0</td>
1864 </tr>
1865 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1866 <td>121</td>
1867 <td>222</td>
1868 <td>J721E_DEV_PCIE1</td>
1869 <td>pcie_pwr_state_pulse</td>
1870 <td>0</td>
1871 </tr>
1872 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1873 <td>121</td>
1874 <td>223</td>
1875 <td>J721E_DEV_PCIE1</td>
1876 <td>pcie_ptm_valid_pulse</td>
1877 <td>0</td>
1878 </tr>
1879 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1880 <td>121</td>
1881 <td>224</td>
1882 <td>J721E_DEV_PCIE1</td>
1883 <td>pcie_hot_reset_pulse</td>
1884 <td>0</td>
1885 </tr>
1886 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1887 <td>121</td>
1888 <td>225</td>
1889 <td>J721E_DEV_PCIE1</td>
1890 <td>pcie_cpts_pend</td>
1891 <td>0</td>
1892 </tr>
1893 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1894 <td>121</td>
1895 <td>226</td>
1896 <td>Not Connected</td>
1897 <td>&#160;</td>
1898 <td>&#160;</td>
1899 </tr>
1900 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1901 <td>121</td>
1902 <td>227</td>
1903 <td>J721E_DEV_PCIE2</td>
1904 <td>pcie_legacy_pulse</td>
1905 <td>0</td>
1906 </tr>
1907 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1908 <td>121</td>
1909 <td>228</td>
1910 <td>J721E_DEV_PCIE2</td>
1911 <td>pcie_downstream_pulse</td>
1912 <td>0</td>
1913 </tr>
1914 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1915 <td>121</td>
1916 <td>229</td>
1917 <td>J721E_DEV_PCIE2</td>
1918 <td>pcie_flr_pulse</td>
1919 <td>0</td>
1920 </tr>
1921 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1922 <td>121</td>
1923 <td>230</td>
1924 <td>J721E_DEV_PCIE2</td>
1925 <td>pcie_phy_level</td>
1926 <td>0</td>
1927 </tr>
1928 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1929 <td>121</td>
1930 <td>231</td>
1931 <td>J721E_DEV_PCIE2</td>
1932 <td>pcie_local_level</td>
1933 <td>0</td>
1934 </tr>
1935 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1936 <td>121</td>
1937 <td>232</td>
1938 <td>J721E_DEV_PCIE2</td>
1939 <td>pcie_error_pulse</td>
1940 <td>0</td>
1941 </tr>
1942 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1943 <td>121</td>
1944 <td>233</td>
1945 <td>J721E_DEV_PCIE2</td>
1946 <td>pcie_link_state_pulse</td>
1947 <td>0</td>
1948 </tr>
1949 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1950 <td>121</td>
1951 <td>234</td>
1952 <td>J721E_DEV_PCIE2</td>
1953 <td>pcie_pwr_state_pulse</td>
1954 <td>0</td>
1955 </tr>
1956 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1957 <td>121</td>
1958 <td>235</td>
1959 <td>J721E_DEV_PCIE2</td>
1960 <td>pcie_ptm_valid_pulse</td>
1961 <td>0</td>
1962 </tr>
1963 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1964 <td>121</td>
1965 <td>236</td>
1966 <td>J721E_DEV_PCIE2</td>
1967 <td>pcie_hot_reset_pulse</td>
1968 <td>0</td>
1969 </tr>
1970 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1971 <td>121</td>
1972 <td>237</td>
1973 <td>J721E_DEV_PCIE2</td>
1974 <td>pcie_cpts_pend</td>
1975 <td>0</td>
1976 </tr>
1977 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1978 <td>121</td>
1979 <td>238</td>
1980 <td>Not Connected</td>
1981 <td>&#160;</td>
1982 <td>&#160;</td>
1983 </tr>
1984 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1985 <td>121</td>
1986 <td>239</td>
1987 <td>J721E_DEV_PCIE3</td>
1988 <td>pcie_legacy_pulse</td>
1989 <td>0</td>
1990 </tr>
1991 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1992 <td>121</td>
1993 <td>240</td>
1994 <td>J721E_DEV_PCIE3</td>
1995 <td>pcie_downstream_pulse</td>
1996 <td>0</td>
1997 </tr>
1998 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
1999 <td>121</td>
2000 <td>241</td>
2001 <td>J721E_DEV_PCIE3</td>
2002 <td>pcie_flr_pulse</td>
2003 <td>0</td>
2004 </tr>
2005 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2006 <td>121</td>
2007 <td>242</td>
2008 <td>J721E_DEV_PCIE3</td>
2009 <td>pcie_phy_level</td>
2010 <td>0</td>
2011 </tr>
2012 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2013 <td>121</td>
2014 <td>243</td>
2015 <td>J721E_DEV_PCIE3</td>
2016 <td>pcie_local_level</td>
2017 <td>0</td>
2018 </tr>
2019 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2020 <td>121</td>
2021 <td>244</td>
2022 <td>J721E_DEV_PCIE3</td>
2023 <td>pcie_error_pulse</td>
2024 <td>0</td>
2025 </tr>
2026 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2027 <td>121</td>
2028 <td>245</td>
2029 <td>J721E_DEV_PCIE3</td>
2030 <td>pcie_link_state_pulse</td>
2031 <td>0</td>
2032 </tr>
2033 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2034 <td>121</td>
2035 <td>246</td>
2036 <td>J721E_DEV_PCIE3</td>
2037 <td>pcie_pwr_state_pulse</td>
2038 <td>0</td>
2039 </tr>
2040 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2041 <td>121</td>
2042 <td>247</td>
2043 <td>J721E_DEV_PCIE3</td>
2044 <td>pcie_ptm_valid_pulse</td>
2045 <td>0</td>
2046 </tr>
2047 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2048 <td>121</td>
2049 <td>248</td>
2050 <td>J721E_DEV_PCIE3</td>
2051 <td>pcie_hot_reset_pulse</td>
2052 <td>0</td>
2053 </tr>
2054 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2055 <td>121</td>
2056 <td>249</td>
2057 <td>J721E_DEV_PCIE3</td>
2058 <td>pcie_cpts_pend</td>
2059 <td>0</td>
2060 </tr>
2061 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2062 <td>121</td>
2063 <td>250</td>
2064 <td>Not Connected</td>
2065 <td>&#160;</td>
2066 <td>&#160;</td>
2067 </tr>
2068 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2069 <td>121</td>
2070 <td>251</td>
2071 <td>Not Connected</td>
2072 <td>&#160;</td>
2073 <td>&#160;</td>
2074 </tr>
2075 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2076 <td>121</td>
2077 <td>252</td>
2078 <td>Not Connected</td>
2079 <td>&#160;</td>
2080 <td>&#160;</td>
2081 </tr>
2082 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2083 <td>121</td>
2084 <td>253</td>
2085 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2086 <td>soc_events_out_level</td>
2087 <td>16</td>
2088 </tr>
2089 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2090 <td>121</td>
2091 <td>254</td>
2092 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2093 <td>soc_events_out_level</td>
2094 <td>17</td>
2095 </tr>
2096 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2097 <td>121</td>
2098 <td>255</td>
2099 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2100 <td>soc_events_out_level</td>
2101 <td>18</td>
2102 </tr>
2103 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2104 <td>121</td>
2105 <td>256</td>
2106 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2107 <td>soc_events_out_level</td>
2108 <td>19</td>
2109 </tr>
2110 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2111 <td>121</td>
2112 <td>257</td>
2113 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2114 <td>soc_events_out_level</td>
2115 <td>20</td>
2116 </tr>
2117 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2118 <td>121</td>
2119 <td>258</td>
2120 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2121 <td>soc_events_out_level</td>
2122 <td>21</td>
2123 </tr>
2124 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2125 <td>121</td>
2126 <td>259</td>
2127 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2128 <td>soc_events_out_level</td>
2129 <td>22</td>
2130 </tr>
2131 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2132 <td>121</td>
2133 <td>260</td>
2134 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2135 <td>soc_events_out_level</td>
2136 <td>23</td>
2137 </tr>
2138 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2139 <td>121</td>
2140 <td>261</td>
2141 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2142 <td>soc_events_out_level</td>
2143 <td>24</td>
2144 </tr>
2145 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2146 <td>121</td>
2147 <td>262</td>
2148 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2149 <td>soc_events_out_level</td>
2150 <td>25</td>
2151 </tr>
2152 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2153 <td>121</td>
2154 <td>263</td>
2155 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2156 <td>soc_events_out_level</td>
2157 <td>26</td>
2158 </tr>
2159 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2160 <td>121</td>
2161 <td>264</td>
2162 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2163 <td>soc_events_out_level</td>
2164 <td>27</td>
2165 </tr>
2166 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2167 <td>121</td>
2168 <td>265</td>
2169 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2170 <td>soc_events_out_level</td>
2171 <td>28</td>
2172 </tr>
2173 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2174 <td>121</td>
2175 <td>266</td>
2176 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2177 <td>soc_events_out_level</td>
2178 <td>29</td>
2179 </tr>
2180 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2181 <td>121</td>
2182 <td>267</td>
2183 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2184 <td>soc_events_out_level</td>
2185 <td>30</td>
2186 </tr>
2187 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2188 <td>121</td>
2189 <td>268</td>
2190 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
2191 <td>soc_events_out_level</td>
2192 <td>31</td>
2193 </tr>
2194 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2195 <td>121</td>
2196 <td>269</td>
2197 <td>Not Connected</td>
2198 <td>&#160;</td>
2199 <td>&#160;</td>
2200 </tr>
2201 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2202 <td>121</td>
2203 <td>270</td>
2204 <td>Not Connected</td>
2205 <td>&#160;</td>
2206 <td>&#160;</td>
2207 </tr>
2208 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2209 <td>121</td>
2210 <td>271</td>
2211 <td>Not Connected</td>
2212 <td>&#160;</td>
2213 <td>&#160;</td>
2214 </tr>
2215 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2216 <td>121</td>
2217 <td>272</td>
2218 <td>Not Connected</td>
2219 <td>&#160;</td>
2220 <td>&#160;</td>
2221 </tr>
2222 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2223 <td>121</td>
2224 <td>273</td>
2225 <td>Not Connected</td>
2226 <td>&#160;</td>
2227 <td>&#160;</td>
2228 </tr>
2229 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2230 <td>121</td>
2231 <td>274</td>
2232 <td>Not Connected</td>
2233 <td>&#160;</td>
2234 <td>&#160;</td>
2235 </tr>
2236 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2237 <td>121</td>
2238 <td>275</td>
2239 <td>Not Connected</td>
2240 <td>&#160;</td>
2241 <td>&#160;</td>
2242 </tr>
2243 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2244 <td>121</td>
2245 <td>276</td>
2246 <td>Not Connected</td>
2247 <td>&#160;</td>
2248 <td>&#160;</td>
2249 </tr>
2250 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2251 <td>121</td>
2252 <td>277</td>
2253 <td>J721E_DEV_USB0</td>
2254 <td>host_system_error</td>
2255 <td>0</td>
2256 </tr>
2257 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2258 <td>121</td>
2259 <td>278</td>
2260 <td>J721E_DEV_USB1</td>
2261 <td>host_system_error</td>
2262 <td>0</td>
2263 </tr>
2264 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2265 <td>121</td>
2266 <td>279</td>
2267 <td>Not Connected</td>
2268 <td>&#160;</td>
2269 <td>&#160;</td>
2270 </tr>
2271 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2272 <td>121</td>
2273 <td>280</td>
2274 <td>J721E_DEV_MCU_CPSW0</td>
2275 <td>stat_pend</td>
2276 <td>0</td>
2277 </tr>
2278 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2279 <td>121</td>
2280 <td>281</td>
2281 <td>J721E_DEV_MCU_CPSW0</td>
2282 <td>mdio_pend</td>
2283 <td>0</td>
2284 </tr>
2285 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2286 <td>121</td>
2287 <td>282</td>
2288 <td>J721E_DEV_MCU_CPSW0</td>
2289 <td>evnt_pend</td>
2290 <td>0</td>
2291 </tr>
2292 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2293 <td>121</td>
2294 <td>283</td>
2295 <td>Not Connected</td>
2296 <td>&#160;</td>
2297 <td>&#160;</td>
2298 </tr>
2299 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2300 <td>121</td>
2301 <td>284</td>
2302 <td>J721E_DEV_MCU_TIMER0</td>
2303 <td>intr_pend</td>
2304 <td>0</td>
2305 </tr>
2306 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2307 <td>121</td>
2308 <td>285</td>
2309 <td>J721E_DEV_MCU_TIMER1</td>
2310 <td>intr_pend</td>
2311 <td>0</td>
2312 </tr>
2313 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2314 <td>121</td>
2315 <td>286</td>
2316 <td>J721E_DEV_MCU_TIMER2</td>
2317 <td>intr_pend</td>
2318 <td>0</td>
2319 </tr>
2320 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2321 <td>121</td>
2322 <td>287</td>
2323 <td>J721E_DEV_MCU_TIMER3</td>
2324 <td>intr_pend</td>
2325 <td>0</td>
2326 </tr>
2327 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2328 <td>121</td>
2329 <td>288</td>
2330 <td>J721E_DEV_MCU_TIMER4</td>
2331 <td>intr_pend</td>
2332 <td>0</td>
2333 </tr>
2334 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2335 <td>121</td>
2336 <td>289</td>
2337 <td>J721E_DEV_MCU_TIMER5</td>
2338 <td>intr_pend</td>
2339 <td>0</td>
2340 </tr>
2341 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2342 <td>121</td>
2343 <td>290</td>
2344 <td>J721E_DEV_MCU_TIMER6</td>
2345 <td>intr_pend</td>
2346 <td>0</td>
2347 </tr>
2348 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2349 <td>121</td>
2350 <td>291</td>
2351 <td>J721E_DEV_MCU_TIMER7</td>
2352 <td>intr_pend</td>
2353 <td>0</td>
2354 </tr>
2355 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2356 <td>121</td>
2357 <td>292</td>
2358 <td>J721E_DEV_MCU_TIMER8</td>
2359 <td>intr_pend</td>
2360 <td>0</td>
2361 </tr>
2362 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2363 <td>121</td>
2364 <td>293</td>
2365 <td>J721E_DEV_MCU_TIMER9</td>
2366 <td>intr_pend</td>
2367 <td>0</td>
2368 </tr>
2369 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2370 <td>121</td>
2371 <td>294</td>
2372 <td>Not Connected</td>
2373 <td>&#160;</td>
2374 <td>&#160;</td>
2375 </tr>
2376 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2377 <td>121</td>
2378 <td>295</td>
2379 <td>Not Connected</td>
2380 <td>&#160;</td>
2381 <td>&#160;</td>
2382 </tr>
2383 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2384 <td>121</td>
2385 <td>296</td>
2386 <td>J721E_DEV_MCU_ESM0</td>
2387 <td>esm_int_low_lvl</td>
2388 <td>0</td>
2389 </tr>
2390 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2391 <td>121</td>
2392 <td>297</td>
2393 <td>J721E_DEV_MCU_ESM0</td>
2394 <td>esm_int_hi_lvl</td>
2395 <td>0</td>
2396 </tr>
2397 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2398 <td>121</td>
2399 <td>298</td>
2400 <td>J721E_DEV_MCU_ESM0</td>
2401 <td>esm_int_cfg_lvl</td>
2402 <td>0</td>
2403 </tr>
2404 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2405 <td>121</td>
2406 <td>299</td>
2407 <td>J721E_DEV_WKUP_ESM0</td>
2408 <td>esm_int_low_lvl</td>
2409 <td>0</td>
2410 </tr>
2411 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2412 <td>121</td>
2413 <td>300</td>
2414 <td>J721E_DEV_WKUP_ESM0</td>
2415 <td>esm_int_hi_lvl</td>
2416 <td>0</td>
2417 </tr>
2418 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2419 <td>121</td>
2420 <td>301</td>
2421 <td>J721E_DEV_WKUP_ESM0</td>
2422 <td>esm_int_cfg_lvl</td>
2423 <td>0</td>
2424 </tr>
2425 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2426 <td>121</td>
2427 <td>302</td>
2428 <td>Not Connected</td>
2429 <td>&#160;</td>
2430 <td>&#160;</td>
2431 </tr>
2432 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2433 <td>121</td>
2434 <td>303</td>
2435 <td>Not Connected</td>
2436 <td>&#160;</td>
2437 <td>&#160;</td>
2438 </tr>
2439 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2440 <td>121</td>
2441 <td>304</td>
2442 <td>J721E_DEV_TIMER12</td>
2443 <td>intr_pend</td>
2444 <td>0</td>
2445 </tr>
2446 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2447 <td>121</td>
2448 <td>305</td>
2449 <td>J721E_DEV_TIMER13</td>
2450 <td>intr_pend</td>
2451 <td>0</td>
2452 </tr>
2453 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2454 <td>121</td>
2455 <td>306</td>
2456 <td>J721E_DEV_TIMER14</td>
2457 <td>intr_pend</td>
2458 <td>0</td>
2459 </tr>
2460 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2461 <td>121</td>
2462 <td>307</td>
2463 <td>J721E_DEV_TIMER15</td>
2464 <td>intr_pend</td>
2465 <td>0</td>
2466 </tr>
2467 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2468 <td>121</td>
2469 <td>308</td>
2470 <td>J721E_DEV_RTI24</td>
2471 <td>intr_wwd</td>
2472 <td>0</td>
2473 </tr>
2474 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2475 <td>121</td>
2476 <td>309</td>
2477 <td>Not Connected</td>
2478 <td>&#160;</td>
2479 <td>&#160;</td>
2480 </tr>
2481 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2482 <td>121</td>
2483 <td>310</td>
2484 <td>J721E_DEV_MCASP0</td>
2485 <td>rec_intr_pend</td>
2486 <td>0</td>
2487 </tr>
2488 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2489 <td>121</td>
2490 <td>311</td>
2491 <td>J721E_DEV_MCASP1</td>
2492 <td>rec_intr_pend</td>
2493 <td>0</td>
2494 </tr>
2495 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2496 <td>121</td>
2497 <td>312</td>
2498 <td>J721E_DEV_MCASP2</td>
2499 <td>rec_intr_pend</td>
2500 <td>0</td>
2501 </tr>
2502 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2503 <td>121</td>
2504 <td>313</td>
2505 <td>J721E_DEV_MCASP3</td>
2506 <td>rec_intr_pend</td>
2507 <td>0</td>
2508 </tr>
2509 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2510 <td>121</td>
2511 <td>314</td>
2512 <td>J721E_DEV_MCASP4</td>
2513 <td>rec_intr_pend</td>
2514 <td>0</td>
2515 </tr>
2516 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2517 <td>121</td>
2518 <td>315</td>
2519 <td>J721E_DEV_MCASP5</td>
2520 <td>rec_intr_pend</td>
2521 <td>0</td>
2522 </tr>
2523 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2524 <td>121</td>
2525 <td>316</td>
2526 <td>J721E_DEV_MCASP6</td>
2527 <td>rec_intr_pend</td>
2528 <td>0</td>
2529 </tr>
2530 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2531 <td>121</td>
2532 <td>317</td>
2533 <td>J721E_DEV_MCASP7</td>
2534 <td>rec_intr_pend</td>
2535 <td>0</td>
2536 </tr>
2537 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2538 <td>121</td>
2539 <td>318</td>
2540 <td>J721E_DEV_MCASP8</td>
2541 <td>rec_intr_pend</td>
2542 <td>0</td>
2543 </tr>
2544 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2545 <td>121</td>
2546 <td>319</td>
2547 <td>J721E_DEV_MCASP9</td>
2548 <td>rec_intr_pend</td>
2549 <td>0</td>
2550 </tr>
2551 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2552 <td>121</td>
2553 <td>320</td>
2554 <td>J721E_DEV_MCASP10</td>
2555 <td>rec_intr_pend</td>
2556 <td>0</td>
2557 </tr>
2558 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2559 <td>121</td>
2560 <td>321</td>
2561 <td>J721E_DEV_MCASP11</td>
2562 <td>rec_intr_pend</td>
2563 <td>0</td>
2564 </tr>
2565 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2566 <td>121</td>
2567 <td>322</td>
2568 <td>J721E_DEV_MCASP0</td>
2569 <td>xmit_intr_pend</td>
2570 <td>0</td>
2571 </tr>
2572 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2573 <td>121</td>
2574 <td>323</td>
2575 <td>J721E_DEV_MCASP1</td>
2576 <td>xmit_intr_pend</td>
2577 <td>0</td>
2578 </tr>
2579 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2580 <td>121</td>
2581 <td>324</td>
2582 <td>J721E_DEV_MCASP2</td>
2583 <td>xmit_intr_pend</td>
2584 <td>0</td>
2585 </tr>
2586 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2587 <td>121</td>
2588 <td>325</td>
2589 <td>J721E_DEV_MCASP3</td>
2590 <td>xmit_intr_pend</td>
2591 <td>0</td>
2592 </tr>
2593 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2594 <td>121</td>
2595 <td>326</td>
2596 <td>J721E_DEV_MCASP4</td>
2597 <td>xmit_intr_pend</td>
2598 <td>0</td>
2599 </tr>
2600 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2601 <td>121</td>
2602 <td>327</td>
2603 <td>J721E_DEV_MCASP5</td>
2604 <td>xmit_intr_pend</td>
2605 <td>0</td>
2606 </tr>
2607 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2608 <td>121</td>
2609 <td>328</td>
2610 <td>J721E_DEV_MCASP6</td>
2611 <td>xmit_intr_pend</td>
2612 <td>0</td>
2613 </tr>
2614 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2615 <td>121</td>
2616 <td>329</td>
2617 <td>J721E_DEV_MCASP7</td>
2618 <td>xmit_intr_pend</td>
2619 <td>0</td>
2620 </tr>
2621 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2622 <td>121</td>
2623 <td>330</td>
2624 <td>J721E_DEV_MCASP8</td>
2625 <td>xmit_intr_pend</td>
2626 <td>0</td>
2627 </tr>
2628 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2629 <td>121</td>
2630 <td>331</td>
2631 <td>J721E_DEV_MCASP9</td>
2632 <td>xmit_intr_pend</td>
2633 <td>0</td>
2634 </tr>
2635 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2636 <td>121</td>
2637 <td>332</td>
2638 <td>J721E_DEV_MCASP10</td>
2639 <td>xmit_intr_pend</td>
2640 <td>0</td>
2641 </tr>
2642 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2643 <td>121</td>
2644 <td>333</td>
2645 <td>J721E_DEV_MCASP11</td>
2646 <td>xmit_intr_pend</td>
2647 <td>0</td>
2648 </tr>
2649 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2650 <td>121</td>
2651 <td>334</td>
2652 <td>J721E_DEV_AASRC0</td>
2653 <td>infifo_level</td>
2654 <td>0</td>
2655 </tr>
2656 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2657 <td>121</td>
2658 <td>335</td>
2659 <td>J721E_DEV_AASRC0</td>
2660 <td>ingroup_level</td>
2661 <td>0</td>
2662 </tr>
2663 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2664 <td>121</td>
2665 <td>336</td>
2666 <td>J721E_DEV_AASRC0</td>
2667 <td>outfifo_level</td>
2668 <td>0</td>
2669 </tr>
2670 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2671 <td>121</td>
2672 <td>337</td>
2673 <td>J721E_DEV_AASRC0</td>
2674 <td>outgroup_level</td>
2675 <td>0</td>
2676 </tr>
2677 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2678 <td>121</td>
2679 <td>338</td>
2680 <td>J721E_DEV_AASRC0</td>
2681 <td>err_level</td>
2682 <td>0</td>
2683 </tr>
2684 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2685 <td>121</td>
2686 <td>339</td>
2687 <td>J721E_DEV_I3C0</td>
2688 <td>i3c__int</td>
2689 <td>0</td>
2690 </tr>
2691 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2692 <td>121</td>
2693 <td>340</td>
2694 <td>J721E_DEV_MCSPI0</td>
2695 <td>intr_spi</td>
2696 <td>0</td>
2697 </tr>
2698 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2699 <td>121</td>
2700 <td>341</td>
2701 <td>J721E_DEV_MCSPI1</td>
2702 <td>intr_spi</td>
2703 <td>0</td>
2704 </tr>
2705 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2706 <td>121</td>
2707 <td>342</td>
2708 <td>J721E_DEV_MCSPI2</td>
2709 <td>intr_spi</td>
2710 <td>0</td>
2711 </tr>
2712 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2713 <td>121</td>
2714 <td>343</td>
2715 <td>J721E_DEV_MCSPI7</td>
2716 <td>intr_spi</td>
2717 <td>0</td>
2718 </tr>
2719 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2720 <td>121</td>
2721 <td>344</td>
2722 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
2723 <td>outp</td>
2724 <td>12</td>
2725 </tr>
2726 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2727 <td>121</td>
2728 <td>345</td>
2729 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
2730 <td>outp</td>
2731 <td>13</td>
2732 </tr>
2733 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2734 <td>121</td>
2735 <td>346</td>
2736 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
2737 <td>outp</td>
2738 <td>14</td>
2739 </tr>
2740 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2741 <td>121</td>
2742 <td>347</td>
2743 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
2744 <td>outp</td>
2745 <td>15</td>
2746 </tr>
2747 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2748 <td>121</td>
2749 <td>348</td>
2750 <td>J721E_DEV_I2C0</td>
2751 <td>pointrpend</td>
2752 <td>0</td>
2753 </tr>
2754 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2755 <td>121</td>
2756 <td>349</td>
2757 <td>J721E_DEV_I2C1</td>
2758 <td>pointrpend</td>
2759 <td>0</td>
2760 </tr>
2761 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2762 <td>121</td>
2763 <td>350</td>
2764 <td>J721E_DEV_I2C2</td>
2765 <td>pointrpend</td>
2766 <td>0</td>
2767 </tr>
2768 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2769 <td>121</td>
2770 <td>351</td>
2771 <td>J721E_DEV_UART0</td>
2772 <td>usart_irq</td>
2773 <td>0</td>
2774 </tr>
2775 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2776 <td>121</td>
2777 <td>352</td>
2778 <td>J721E_DEV_UART1</td>
2779 <td>usart_irq</td>
2780 <td>0</td>
2781 </tr>
2782 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2783 <td>121</td>
2784 <td>353</td>
2785 <td>J721E_DEV_UART2</td>
2786 <td>usart_irq</td>
2787 <td>0</td>
2788 </tr>
2789 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2790 <td>121</td>
2791 <td>354</td>
2792 <td>J721E_DEV_MCU_I3C0</td>
2793 <td>i3c__int</td>
2794 <td>0</td>
2795 </tr>
2796 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2797 <td>121</td>
2798 <td>355</td>
2799 <td>J721E_DEV_MCU_I3C1</td>
2800 <td>i3c__int</td>
2801 <td>0</td>
2802 </tr>
2803 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2804 <td>121</td>
2805 <td>356</td>
2806 <td>Not Connected</td>
2807 <td>&#160;</td>
2808 <td>&#160;</td>
2809 </tr>
2810 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2811 <td>121</td>
2812 <td>357</td>
2813 <td>Not Connected</td>
2814 <td>&#160;</td>
2815 <td>&#160;</td>
2816 </tr>
2817 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2818 <td>121</td>
2819 <td>358</td>
2820 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2821 <td>outl_intr</td>
2822 <td>320</td>
2823 </tr>
2824 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2825 <td>121</td>
2826 <td>359</td>
2827 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2828 <td>outl_intr</td>
2829 <td>321</td>
2830 </tr>
2831 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2832 <td>121</td>
2833 <td>360</td>
2834 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2835 <td>outl_intr</td>
2836 <td>322</td>
2837 </tr>
2838 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2839 <td>121</td>
2840 <td>361</td>
2841 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2842 <td>outl_intr</td>
2843 <td>323</td>
2844 </tr>
2845 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2846 <td>121</td>
2847 <td>362</td>
2848 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2849 <td>outl_intr</td>
2850 <td>324</td>
2851 </tr>
2852 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2853 <td>121</td>
2854 <td>363</td>
2855 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2856 <td>outl_intr</td>
2857 <td>325</td>
2858 </tr>
2859 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2860 <td>121</td>
2861 <td>364</td>
2862 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2863 <td>outl_intr</td>
2864 <td>326</td>
2865 </tr>
2866 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2867 <td>121</td>
2868 <td>365</td>
2869 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2870 <td>outl_intr</td>
2871 <td>327</td>
2872 </tr>
2873 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2874 <td>121</td>
2875 <td>366</td>
2876 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2877 <td>outl_intr</td>
2878 <td>328</td>
2879 </tr>
2880 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2881 <td>121</td>
2882 <td>367</td>
2883 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2884 <td>outl_intr</td>
2885 <td>329</td>
2886 </tr>
2887 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2888 <td>121</td>
2889 <td>368</td>
2890 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2891 <td>outl_intr</td>
2892 <td>330</td>
2893 </tr>
2894 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2895 <td>121</td>
2896 <td>369</td>
2897 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2898 <td>outl_intr</td>
2899 <td>331</td>
2900 </tr>
2901 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2902 <td>121</td>
2903 <td>370</td>
2904 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2905 <td>outl_intr</td>
2906 <td>332</td>
2907 </tr>
2908 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2909 <td>121</td>
2910 <td>371</td>
2911 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2912 <td>outl_intr</td>
2913 <td>333</td>
2914 </tr>
2915 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2916 <td>121</td>
2917 <td>372</td>
2918 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2919 <td>outl_intr</td>
2920 <td>334</td>
2921 </tr>
2922 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2923 <td>121</td>
2924 <td>373</td>
2925 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2926 <td>outl_intr</td>
2927 <td>335</td>
2928 </tr>
2929 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2930 <td>121</td>
2931 <td>374</td>
2932 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2933 <td>outl_intr</td>
2934 <td>336</td>
2935 </tr>
2936 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2937 <td>121</td>
2938 <td>375</td>
2939 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2940 <td>outl_intr</td>
2941 <td>337</td>
2942 </tr>
2943 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2944 <td>121</td>
2945 <td>376</td>
2946 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2947 <td>outl_intr</td>
2948 <td>338</td>
2949 </tr>
2950 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2951 <td>121</td>
2952 <td>377</td>
2953 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2954 <td>outl_intr</td>
2955 <td>339</td>
2956 </tr>
2957 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2958 <td>121</td>
2959 <td>378</td>
2960 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2961 <td>outl_intr</td>
2962 <td>340</td>
2963 </tr>
2964 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2965 <td>121</td>
2966 <td>379</td>
2967 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2968 <td>outl_intr</td>
2969 <td>341</td>
2970 </tr>
2971 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2972 <td>121</td>
2973 <td>380</td>
2974 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2975 <td>outl_intr</td>
2976 <td>342</td>
2977 </tr>
2978 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2979 <td>121</td>
2980 <td>381</td>
2981 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
2982 <td>outl_intr</td>
2983 <td>343</td>
2984 </tr>
2985 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2986 <td>121</td>
2987 <td>382</td>
2988 <td>J721E_DEV_MCAN0</td>
2989 <td>mcanss_mcan_lvl_int</td>
2990 <td>0</td>
2991 </tr>
2992 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
2993 <td>121</td>
2994 <td>383</td>
2995 <td>J721E_DEV_MCAN0</td>
2996 <td>mcanss_mcan_lvl_int</td>
2997 <td>1</td>
2998 </tr>
2999 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3000 <td>121</td>
3001 <td>384</td>
3002 <td>J721E_DEV_MCAN0</td>
3003 <td>mcanss_ext_ts_rollover_lvl_int</td>
3004 <td>0</td>
3005 </tr>
3006 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3007 <td>121</td>
3008 <td>385</td>
3009 <td>J721E_DEV_MCAN1</td>
3010 <td>mcanss_mcan_lvl_int</td>
3011 <td>0</td>
3012 </tr>
3013 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3014 <td>121</td>
3015 <td>386</td>
3016 <td>J721E_DEV_MCAN1</td>
3017 <td>mcanss_mcan_lvl_int</td>
3018 <td>1</td>
3019 </tr>
3020 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3021 <td>121</td>
3022 <td>387</td>
3023 <td>J721E_DEV_MCAN1</td>
3024 <td>mcanss_ext_ts_rollover_lvl_int</td>
3025 <td>0</td>
3026 </tr>
3027 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3028 <td>121</td>
3029 <td>388</td>
3030 <td>J721E_DEV_MLB0</td>
3031 <td>mlbss_mlb_ahb_int</td>
3032 <td>0</td>
3033 </tr>
3034 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3035 <td>121</td>
3036 <td>389</td>
3037 <td>J721E_DEV_MLB0</td>
3038 <td>mlbss_mlb_ahb_int</td>
3039 <td>1</td>
3040 </tr>
3041 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3042 <td>121</td>
3043 <td>390</td>
3044 <td>J721E_DEV_MLB0</td>
3045 <td>mlbss_mlb_int</td>
3046 <td>0</td>
3047 </tr>
3048 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3049 <td>121</td>
3050 <td>391</td>
3051 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
3052 <td>outp</td>
3053 <td>32</td>
3054 </tr>
3055 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3056 <td>121</td>
3057 <td>392</td>
3058 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
3059 <td>outp</td>
3060 <td>33</td>
3061 </tr>
3062 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3063 <td>121</td>
3064 <td>393</td>
3065 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
3066 <td>outp</td>
3067 <td>34</td>
3068 </tr>
3069 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3070 <td>121</td>
3071 <td>394</td>
3072 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
3073 <td>outp</td>
3074 <td>35</td>
3075 </tr>
3076 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3077 <td>121</td>
3078 <td>395</td>
3079 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
3080 <td>outp</td>
3081 <td>36</td>
3082 </tr>
3083 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3084 <td>121</td>
3085 <td>396</td>
3086 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
3087 <td>outp</td>
3088 <td>37</td>
3089 </tr>
3090 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3091 <td>121</td>
3092 <td>397</td>
3093 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
3094 <td>outp</td>
3095 <td>38</td>
3096 </tr>
3097 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3098 <td>121</td>
3099 <td>398</td>
3100 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
3101 <td>outp</td>
3102 <td>39</td>
3103 </tr>
3104 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3105 <td>121</td>
3106 <td>399</td>
3107 <td>J721E_DEV_MCU_ADC12_16FFC0</td>
3108 <td>gen_level</td>
3109 <td>0</td>
3110 </tr>
3111 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3112 <td>121</td>
3113 <td>400</td>
3114 <td>J721E_DEV_MCU_ADC12_16FFC1</td>
3115 <td>gen_level</td>
3116 <td>0</td>
3117 </tr>
3118 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3119 <td>121</td>
3120 <td>401</td>
3121 <td>Not Connected</td>
3122 <td>&#160;</td>
3123 <td>&#160;</td>
3124 </tr>
3125 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3126 <td>121</td>
3127 <td>402</td>
3128 <td>Not Connected</td>
3129 <td>&#160;</td>
3130 <td>&#160;</td>
3131 </tr>
3132 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3133 <td>121</td>
3134 <td>403</td>
3135 <td>Not Connected</td>
3136 <td>&#160;</td>
3137 <td>&#160;</td>
3138 </tr>
3139 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3140 <td>121</td>
3141 <td>404</td>
3142 <td>Not Connected</td>
3143 <td>&#160;</td>
3144 <td>&#160;</td>
3145 </tr>
3146 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3147 <td>121</td>
3148 <td>405</td>
3149 <td>Not Connected</td>
3150 <td>&#160;</td>
3151 <td>&#160;</td>
3152 </tr>
3153 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3154 <td>121</td>
3155 <td>406</td>
3156 <td>Not Connected</td>
3157 <td>&#160;</td>
3158 <td>&#160;</td>
3159 </tr>
3160 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3161 <td>121</td>
3162 <td>407</td>
3163 <td>Not Connected</td>
3164 <td>&#160;</td>
3165 <td>&#160;</td>
3166 </tr>
3167 </tbody>
3168 </table>
3169 </div>
3170 <div class="section" id="c66ss0-introuter0-interrupt-router-output-destinations">
3171 <span id="pub-soc-j721e-c66ss0-introuter0-output-src-list"></span><h2>C66SS0_INTROUTER0 Interrupt Router Output Destinations<a class="headerlink" href="#c66ss0-introuter0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
3172 <div class="admonition warning">
3173 <p class="first admonition-title">Warning</p>
3174 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
3175 host within the RM Board Configuration resource assignment array.  The RM
3176 Board Configuration is rejected if an overlap with a reserved resource is
3177 detected.</p>
3178 </div>
3179 <table border="1" class="docutils">
3180 <colgroup>
3181 <col width="25%" />
3182 <col width="11%" />
3183 <col width="14%" />
3184 <col width="17%" />
3185 <col width="18%" />
3186 <col width="15%" />
3187 </colgroup>
3188 <thead valign="bottom">
3189 <tr class="row-odd"><th class="head">IR Name</th>
3190 <th class="head">IR Device ID</th>
3191 <th class="head">IR Output Index</th>
3192 <th class="head">Destination Name</th>
3193 <th class="head">Destination Interface</th>
3194 <th class="head">Destination Index</th>
3195 </tr>
3196 </thead>
3197 <tbody valign="top">
3198 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0
3199 (<strong>Reserved by System Firmware</strong>)</td>
3200 <td>121</td>
3201 <td>0</td>
3202 <td>J721E_DEV_C66SS0_CORE0</td>
3203 <td>c66_event_in_sync</td>
3204 <td>4</td>
3205 </tr>
3206 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0
3207 (<strong>Reserved by System Firmware</strong>)</td>
3208 <td>121</td>
3209 <td>1</td>
3210 <td>J721E_DEV_C66SS0_CORE0</td>
3211 <td>c66_event_in_sync</td>
3212 <td>5</td>
3213 </tr>
3214 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0
3215 (<strong>Reserved by System Firmware</strong>)</td>
3216 <td>121</td>
3217 <td>2</td>
3218 <td>J721E_DEV_C66SS0_CORE0</td>
3219 <td>c66_event_in_sync</td>
3220 <td>6</td>
3221 </tr>
3222 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0
3223 (<strong>Reserved by System Firmware</strong>)</td>
3224 <td>121</td>
3225 <td>3</td>
3226 <td>J721E_DEV_C66SS0_CORE0</td>
3227 <td>c66_event_in_sync</td>
3228 <td>7</td>
3229 </tr>
3230 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3231 <td>121</td>
3232 <td>4</td>
3233 <td>J721E_DEV_C66SS0_CORE0</td>
3234 <td>c66_event_in_sync</td>
3235 <td>8</td>
3236 </tr>
3237 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3238 <td>121</td>
3239 <td>5</td>
3240 <td>J721E_DEV_C66SS0_CORE0</td>
3241 <td>c66_event_in_sync</td>
3242 <td>15</td>
3243 </tr>
3244 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3245 <td>121</td>
3246 <td>6</td>
3247 <td>J721E_DEV_C66SS0_CORE0</td>
3248 <td>c66_event_in_sync</td>
3249 <td>16</td>
3250 </tr>
3251 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3252 <td>121</td>
3253 <td>7</td>
3254 <td>J721E_DEV_C66SS0_CORE0</td>
3255 <td>c66_event_in_sync</td>
3256 <td>17</td>
3257 </tr>
3258 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3259 <td>121</td>
3260 <td>8</td>
3261 <td>J721E_DEV_C66SS0_CORE0</td>
3262 <td>c66_event_in_sync</td>
3263 <td>18</td>
3264 </tr>
3265 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3266 <td>121</td>
3267 <td>9</td>
3268 <td>J721E_DEV_C66SS0_CORE0</td>
3269 <td>c66_event_in_sync</td>
3270 <td>19</td>
3271 </tr>
3272 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3273 <td>121</td>
3274 <td>10</td>
3275 <td>J721E_DEV_C66SS0_CORE0</td>
3276 <td>c66_event_in_sync</td>
3277 <td>20</td>
3278 </tr>
3279 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3280 <td>121</td>
3281 <td>11</td>
3282 <td>J721E_DEV_C66SS0_CORE0</td>
3283 <td>c66_event_in_sync</td>
3284 <td>21</td>
3285 </tr>
3286 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3287 <td>121</td>
3288 <td>12</td>
3289 <td>J721E_DEV_C66SS0_CORE0</td>
3290 <td>c66_event_in_sync</td>
3291 <td>22</td>
3292 </tr>
3293 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3294 <td>121</td>
3295 <td>13</td>
3296 <td>J721E_DEV_C66SS0_CORE0</td>
3297 <td>c66_event_in_sync</td>
3298 <td>23</td>
3299 </tr>
3300 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3301 <td>121</td>
3302 <td>14</td>
3303 <td>J721E_DEV_C66SS0_CORE0</td>
3304 <td>c66_event_in_sync</td>
3305 <td>24</td>
3306 </tr>
3307 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3308 <td>121</td>
3309 <td>15</td>
3310 <td>J721E_DEV_C66SS0_CORE0</td>
3311 <td>c66_event_in_sync</td>
3312 <td>25</td>
3313 </tr>
3314 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3315 <td>121</td>
3316 <td>16</td>
3317 <td>J721E_DEV_C66SS0_CORE0</td>
3318 <td>c66_event_in_sync</td>
3319 <td>26</td>
3320 </tr>
3321 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3322 <td>121</td>
3323 <td>17</td>
3324 <td>J721E_DEV_C66SS0_CORE0</td>
3325 <td>c66_event_in_sync</td>
3326 <td>27</td>
3327 </tr>
3328 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3329 <td>121</td>
3330 <td>18</td>
3331 <td>J721E_DEV_C66SS0_CORE0</td>
3332 <td>c66_event_in_sync</td>
3333 <td>28</td>
3334 </tr>
3335 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3336 <td>121</td>
3337 <td>19</td>
3338 <td>J721E_DEV_C66SS0_CORE0</td>
3339 <td>c66_event_in_sync</td>
3340 <td>29</td>
3341 </tr>
3342 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3343 <td>121</td>
3344 <td>20</td>
3345 <td>J721E_DEV_C66SS0_CORE0</td>
3346 <td>c66_event_in_sync</td>
3347 <td>30</td>
3348 </tr>
3349 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3350 <td>121</td>
3351 <td>21</td>
3352 <td>J721E_DEV_C66SS0_CORE0</td>
3353 <td>c66_event_in_sync</td>
3354 <td>31</td>
3355 </tr>
3356 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3357 <td>121</td>
3358 <td>22</td>
3359 <td>J721E_DEV_C66SS0_CORE0</td>
3360 <td>c66_event_in_sync</td>
3361 <td>32</td>
3362 </tr>
3363 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3364 <td>121</td>
3365 <td>23</td>
3366 <td>J721E_DEV_C66SS0_CORE0</td>
3367 <td>c66_event_in_sync</td>
3368 <td>33</td>
3369 </tr>
3370 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3371 <td>121</td>
3372 <td>24</td>
3373 <td>J721E_DEV_C66SS0_CORE0</td>
3374 <td>c66_event_in_sync</td>
3375 <td>34</td>
3376 </tr>
3377 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3378 <td>121</td>
3379 <td>25</td>
3380 <td>J721E_DEV_C66SS0_CORE0</td>
3381 <td>c66_event_in_sync</td>
3382 <td>35</td>
3383 </tr>
3384 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3385 <td>121</td>
3386 <td>26</td>
3387 <td>J721E_DEV_C66SS0_CORE0</td>
3388 <td>c66_event_in_sync</td>
3389 <td>36</td>
3390 </tr>
3391 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3392 <td>121</td>
3393 <td>27</td>
3394 <td>J721E_DEV_C66SS0_CORE0</td>
3395 <td>c66_event_in_sync</td>
3396 <td>37</td>
3397 </tr>
3398 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3399 <td>121</td>
3400 <td>28</td>
3401 <td>J721E_DEV_C66SS0_CORE0</td>
3402 <td>c66_event_in_sync</td>
3403 <td>38</td>
3404 </tr>
3405 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3406 <td>121</td>
3407 <td>29</td>
3408 <td>J721E_DEV_C66SS0_CORE0</td>
3409 <td>c66_event_in_sync</td>
3410 <td>39</td>
3411 </tr>
3412 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3413 <td>121</td>
3414 <td>30</td>
3415 <td>J721E_DEV_C66SS0_CORE0</td>
3416 <td>c66_event_in_sync</td>
3417 <td>40</td>
3418 </tr>
3419 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3420 <td>121</td>
3421 <td>31</td>
3422 <td>J721E_DEV_C66SS0_CORE0</td>
3423 <td>c66_event_in_sync</td>
3424 <td>41</td>
3425 </tr>
3426 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3427 <td>121</td>
3428 <td>32</td>
3429 <td>J721E_DEV_C66SS0_CORE0</td>
3430 <td>c66_event_in_sync</td>
3431 <td>42</td>
3432 </tr>
3433 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3434 <td>121</td>
3435 <td>33</td>
3436 <td>J721E_DEV_C66SS0_CORE0</td>
3437 <td>c66_event_in_sync</td>
3438 <td>43</td>
3439 </tr>
3440 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3441 <td>121</td>
3442 <td>34</td>
3443 <td>J721E_DEV_C66SS0_CORE0</td>
3444 <td>c66_event_in_sync</td>
3445 <td>44</td>
3446 </tr>
3447 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3448 <td>121</td>
3449 <td>35</td>
3450 <td>J721E_DEV_C66SS0_CORE0</td>
3451 <td>c66_event_in_sync</td>
3452 <td>45</td>
3453 </tr>
3454 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3455 <td>121</td>
3456 <td>36</td>
3457 <td>J721E_DEV_C66SS0_CORE0</td>
3458 <td>c66_event_in_sync</td>
3459 <td>46</td>
3460 </tr>
3461 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3462 <td>121</td>
3463 <td>37</td>
3464 <td>J721E_DEV_C66SS0_CORE0</td>
3465 <td>c66_event_in_sync</td>
3466 <td>47</td>
3467 </tr>
3468 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3469 <td>121</td>
3470 <td>38</td>
3471 <td>J721E_DEV_C66SS0_CORE0</td>
3472 <td>c66_event_in_sync</td>
3473 <td>48</td>
3474 </tr>
3475 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3476 <td>121</td>
3477 <td>39</td>
3478 <td>J721E_DEV_C66SS0_CORE0</td>
3479 <td>c66_event_in_sync</td>
3480 <td>49</td>
3481 </tr>
3482 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3483 <td>121</td>
3484 <td>40</td>
3485 <td>J721E_DEV_C66SS0_CORE0</td>
3486 <td>c66_event_in_sync</td>
3487 <td>50</td>
3488 </tr>
3489 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3490 <td>121</td>
3491 <td>41</td>
3492 <td>J721E_DEV_C66SS0_CORE0</td>
3493 <td>c66_event_in_sync</td>
3494 <td>51</td>
3495 </tr>
3496 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3497 <td>121</td>
3498 <td>42</td>
3499 <td>J721E_DEV_C66SS0_CORE0</td>
3500 <td>c66_event_in_sync</td>
3501 <td>52</td>
3502 </tr>
3503 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3504 <td>121</td>
3505 <td>43</td>
3506 <td>J721E_DEV_C66SS0_CORE0</td>
3507 <td>c66_event_in_sync</td>
3508 <td>53</td>
3509 </tr>
3510 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3511 <td>121</td>
3512 <td>44</td>
3513 <td>J721E_DEV_C66SS0_CORE0</td>
3514 <td>c66_event_in_sync</td>
3515 <td>54</td>
3516 </tr>
3517 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3518 <td>121</td>
3519 <td>45</td>
3520 <td>J721E_DEV_C66SS0_CORE0</td>
3521 <td>c66_event_in_sync</td>
3522 <td>55</td>
3523 </tr>
3524 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3525 <td>121</td>
3526 <td>46</td>
3527 <td>J721E_DEV_C66SS0_CORE0</td>
3528 <td>c66_event_in_sync</td>
3529 <td>56</td>
3530 </tr>
3531 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3532 <td>121</td>
3533 <td>47</td>
3534 <td>J721E_DEV_C66SS0_CORE0</td>
3535 <td>c66_event_in_sync</td>
3536 <td>57</td>
3537 </tr>
3538 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3539 <td>121</td>
3540 <td>48</td>
3541 <td>J721E_DEV_C66SS0_CORE0</td>
3542 <td>c66_event_in_sync</td>
3543 <td>58</td>
3544 </tr>
3545 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3546 <td>121</td>
3547 <td>49</td>
3548 <td>J721E_DEV_C66SS0_CORE0</td>
3549 <td>c66_event_in_sync</td>
3550 <td>59</td>
3551 </tr>
3552 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3553 <td>121</td>
3554 <td>50</td>
3555 <td>J721E_DEV_C66SS0_CORE0</td>
3556 <td>c66_event_in_sync</td>
3557 <td>60</td>
3558 </tr>
3559 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3560 <td>121</td>
3561 <td>51</td>
3562 <td>J721E_DEV_C66SS0_CORE0</td>
3563 <td>c66_event_in_sync</td>
3564 <td>61</td>
3565 </tr>
3566 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3567 <td>121</td>
3568 <td>52</td>
3569 <td>J721E_DEV_C66SS0_CORE0</td>
3570 <td>c66_event_in_sync</td>
3571 <td>62</td>
3572 </tr>
3573 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3574 <td>121</td>
3575 <td>53</td>
3576 <td>J721E_DEV_C66SS0_CORE0</td>
3577 <td>c66_event_in_sync</td>
3578 <td>63</td>
3579 </tr>
3580 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3581 <td>121</td>
3582 <td>54</td>
3583 <td>J721E_DEV_C66SS0_CORE0</td>
3584 <td>c66_event_in_sync</td>
3585 <td>64</td>
3586 </tr>
3587 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3588 <td>121</td>
3589 <td>55</td>
3590 <td>J721E_DEV_C66SS0_CORE0</td>
3591 <td>c66_event_in_sync</td>
3592 <td>65</td>
3593 </tr>
3594 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3595 <td>121</td>
3596 <td>56</td>
3597 <td>J721E_DEV_C66SS0_CORE0</td>
3598 <td>c66_event_in_sync</td>
3599 <td>66</td>
3600 </tr>
3601 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3602 <td>121</td>
3603 <td>57</td>
3604 <td>J721E_DEV_C66SS0_CORE0</td>
3605 <td>c66_event_in_sync</td>
3606 <td>67</td>
3607 </tr>
3608 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3609 <td>121</td>
3610 <td>58</td>
3611 <td>J721E_DEV_C66SS0_CORE0</td>
3612 <td>c66_event_in_sync</td>
3613 <td>68</td>
3614 </tr>
3615 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3616 <td>121</td>
3617 <td>59</td>
3618 <td>J721E_DEV_C66SS0_CORE0</td>
3619 <td>c66_event_in_sync</td>
3620 <td>69</td>
3621 </tr>
3622 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3623 <td>121</td>
3624 <td>60</td>
3625 <td>J721E_DEV_C66SS0_CORE0</td>
3626 <td>c66_event_in_sync</td>
3627 <td>70</td>
3628 </tr>
3629 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3630 <td>121</td>
3631 <td>61</td>
3632 <td>J721E_DEV_C66SS0_CORE0</td>
3633 <td>c66_event_in_sync</td>
3634 <td>71</td>
3635 </tr>
3636 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3637 <td>121</td>
3638 <td>62</td>
3639 <td>J721E_DEV_C66SS0_CORE0</td>
3640 <td>c66_event_in_sync</td>
3641 <td>72</td>
3642 </tr>
3643 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3644 <td>121</td>
3645 <td>63</td>
3646 <td>J721E_DEV_C66SS0_CORE0</td>
3647 <td>c66_event_in_sync</td>
3648 <td>73</td>
3649 </tr>
3650 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3651 <td>121</td>
3652 <td>64</td>
3653 <td>J721E_DEV_C66SS0_CORE0</td>
3654 <td>c66_event_in_sync</td>
3655 <td>74</td>
3656 </tr>
3657 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3658 <td>121</td>
3659 <td>65</td>
3660 <td>J721E_DEV_C66SS0_CORE0</td>
3661 <td>c66_event_in_sync</td>
3662 <td>75</td>
3663 </tr>
3664 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3665 <td>121</td>
3666 <td>66</td>
3667 <td>J721E_DEV_C66SS0_CORE0</td>
3668 <td>c66_event_in_sync</td>
3669 <td>76</td>
3670 </tr>
3671 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3672 <td>121</td>
3673 <td>67</td>
3674 <td>J721E_DEV_C66SS0_CORE0</td>
3675 <td>c66_event_in_sync</td>
3676 <td>77</td>
3677 </tr>
3678 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3679 <td>121</td>
3680 <td>68</td>
3681 <td>J721E_DEV_C66SS0_CORE0</td>
3682 <td>c66_event_in_sync</td>
3683 <td>78</td>
3684 </tr>
3685 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3686 <td>121</td>
3687 <td>69</td>
3688 <td>J721E_DEV_C66SS0_CORE0</td>
3689 <td>c66_event_in_sync</td>
3690 <td>79</td>
3691 </tr>
3692 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3693 <td>121</td>
3694 <td>70</td>
3695 <td>J721E_DEV_C66SS0_CORE0</td>
3696 <td>c66_event_in_sync</td>
3697 <td>80</td>
3698 </tr>
3699 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3700 <td>121</td>
3701 <td>71</td>
3702 <td>J721E_DEV_C66SS0_CORE0</td>
3703 <td>c66_event_in_sync</td>
3704 <td>81</td>
3705 </tr>
3706 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3707 <td>121</td>
3708 <td>72</td>
3709 <td>J721E_DEV_C66SS0_CORE0</td>
3710 <td>c66_event_in_sync</td>
3711 <td>82</td>
3712 </tr>
3713 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3714 <td>121</td>
3715 <td>73</td>
3716 <td>J721E_DEV_C66SS0_CORE0</td>
3717 <td>c66_event_in_sync</td>
3718 <td>83</td>
3719 </tr>
3720 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3721 <td>121</td>
3722 <td>74</td>
3723 <td>J721E_DEV_C66SS0_CORE0</td>
3724 <td>c66_event_in_sync</td>
3725 <td>84</td>
3726 </tr>
3727 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3728 <td>121</td>
3729 <td>75</td>
3730 <td>J721E_DEV_C66SS0_CORE0</td>
3731 <td>c66_event_in_sync</td>
3732 <td>85</td>
3733 </tr>
3734 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3735 <td>121</td>
3736 <td>76</td>
3737 <td>J721E_DEV_C66SS0_CORE0</td>
3738 <td>c66_event_in_sync</td>
3739 <td>86</td>
3740 </tr>
3741 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3742 <td>121</td>
3743 <td>77</td>
3744 <td>J721E_DEV_C66SS0_CORE0</td>
3745 <td>c66_event_in_sync</td>
3746 <td>87</td>
3747 </tr>
3748 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3749 <td>121</td>
3750 <td>78</td>
3751 <td>J721E_DEV_C66SS0_CORE0</td>
3752 <td>c66_event_in_sync</td>
3753 <td>88</td>
3754 </tr>
3755 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3756 <td>121</td>
3757 <td>79</td>
3758 <td>J721E_DEV_C66SS0_CORE0</td>
3759 <td>c66_event_in_sync</td>
3760 <td>89</td>
3761 </tr>
3762 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3763 <td>121</td>
3764 <td>80</td>
3765 <td>J721E_DEV_C66SS0_CORE0</td>
3766 <td>c66_event_in_sync</td>
3767 <td>90</td>
3768 </tr>
3769 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3770 <td>121</td>
3771 <td>81</td>
3772 <td>J721E_DEV_C66SS0_CORE0</td>
3773 <td>c66_event_in_sync</td>
3774 <td>91</td>
3775 </tr>
3776 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3777 <td>121</td>
3778 <td>82</td>
3779 <td>J721E_DEV_C66SS0_CORE0</td>
3780 <td>c66_event_in_sync</td>
3781 <td>92</td>
3782 </tr>
3783 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3784 <td>121</td>
3785 <td>83</td>
3786 <td>J721E_DEV_C66SS0_CORE0</td>
3787 <td>c66_event_in_sync</td>
3788 <td>93</td>
3789 </tr>
3790 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3791 <td>121</td>
3792 <td>84</td>
3793 <td>J721E_DEV_C66SS0_CORE0</td>
3794 <td>c66_event_in_sync</td>
3795 <td>94</td>
3796 </tr>
3797 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3798 <td>121</td>
3799 <td>85</td>
3800 <td>J721E_DEV_C66SS0_CORE0</td>
3801 <td>c66_event_in_sync</td>
3802 <td>95</td>
3803 </tr>
3804 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3805 <td>121</td>
3806 <td>86</td>
3807 <td>J721E_DEV_C66SS0_CORE0</td>
3808 <td>c66_event_in_sync</td>
3809 <td>99</td>
3810 </tr>
3811 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3812 <td>121</td>
3813 <td>87</td>
3814 <td>J721E_DEV_C66SS0_CORE0</td>
3815 <td>c66_event_in_sync</td>
3816 <td>102</td>
3817 </tr>
3818 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3819 <td>121</td>
3820 <td>88</td>
3821 <td>J721E_DEV_C66SS0_CORE0</td>
3822 <td>c66_event_in_sync</td>
3823 <td>103</td>
3824 </tr>
3825 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3826 <td>121</td>
3827 <td>89</td>
3828 <td>J721E_DEV_C66SS0_CORE0</td>
3829 <td>c66_event_in_sync</td>
3830 <td>104</td>
3831 </tr>
3832 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3833 <td>121</td>
3834 <td>90</td>
3835 <td>J721E_DEV_C66SS0_CORE0</td>
3836 <td>c66_event_in_sync</td>
3837 <td>105</td>
3838 </tr>
3839 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3840 <td>121</td>
3841 <td>91</td>
3842 <td>J721E_DEV_C66SS0_CORE0</td>
3843 <td>c66_event_in_sync</td>
3844 <td>106</td>
3845 </tr>
3846 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3847 <td>121</td>
3848 <td>92</td>
3849 <td>J721E_DEV_C66SS0_CORE0</td>
3850 <td>c66_event_in_sync</td>
3851 <td>107</td>
3852 </tr>
3853 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3854 <td>121</td>
3855 <td>93</td>
3856 <td>J721E_DEV_C66SS0_CORE0</td>
3857 <td>c66_event_in_sync</td>
3858 <td>108</td>
3859 </tr>
3860 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3861 <td>121</td>
3862 <td>94</td>
3863 <td>J721E_DEV_C66SS0_CORE0</td>
3864 <td>c66_event_in_sync</td>
3865 <td>109</td>
3866 </tr>
3867 <tr class="row-odd"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3868 <td>121</td>
3869 <td>95</td>
3870 <td>J721E_DEV_C66SS0_CORE0</td>
3871 <td>c66_event_in_sync</td>
3872 <td>114</td>
3873 </tr>
3874 <tr class="row-even"><td>J721E_DEV_C66SS0_INTROUTER0</td>
3875 <td>121</td>
3876 <td>96</td>
3877 <td>J721E_DEV_C66SS0_CORE0</td>
3878 <td>c66_event_in_sync</td>
3879 <td>115</td>
3880 </tr>
3881 </tbody>
3882 </table>
3883 </div>
3884 <div class="section" id="c66ss1-introuter0-interrupt-router-input-sources">
3885 <span id="pub-soc-j721e-c66ss1-introuter0-input-src-list"></span><h2>C66SS1_INTROUTER0 Interrupt Router Input Sources<a class="headerlink" href="#c66ss1-introuter0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
3886 <div class="admonition warning">
3887 <p class="first admonition-title">Warning</p>
3888 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
3889 host within the RM Board Configuration resource assignment array.  The RM
3890 Board Configuration is rejected if an overlap with a reserved resource is
3891 detected.</p>
3892 </div>
3893 <table border="1" class="docutils">
3894 <colgroup>
3895 <col width="22%" />
3896 <col width="10%" />
3897 <col width="11%" />
3898 <col width="21%" />
3899 <col width="25%" />
3900 <col width="10%" />
3901 </colgroup>
3902 <thead valign="bottom">
3903 <tr class="row-odd"><th class="head">IR Name</th>
3904 <th class="head">IR Device ID</th>
3905 <th class="head">IR Input Index</th>
3906 <th class="head">Source Name</th>
3907 <th class="head">Source Interface</th>
3908 <th class="head">Source Index</th>
3909 </tr>
3910 </thead>
3911 <tbody valign="top">
3912 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3913 <td>122</td>
3914 <td>0</td>
3915 <td>Not Connected</td>
3916 <td>&#160;</td>
3917 <td>&#160;</td>
3918 </tr>
3919 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3920 <td>122</td>
3921 <td>1</td>
3922 <td>J721E_DEV_TIMER0</td>
3923 <td>intr_pend</td>
3924 <td>0</td>
3925 </tr>
3926 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3927 <td>122</td>
3928 <td>2</td>
3929 <td>J721E_DEV_TIMER1</td>
3930 <td>intr_pend</td>
3931 <td>0</td>
3932 </tr>
3933 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3934 <td>122</td>
3935 <td>3</td>
3936 <td>J721E_DEV_TIMER2</td>
3937 <td>intr_pend</td>
3938 <td>0</td>
3939 </tr>
3940 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3941 <td>122</td>
3942 <td>4</td>
3943 <td>J721E_DEV_TIMER3</td>
3944 <td>intr_pend</td>
3945 <td>0</td>
3946 </tr>
3947 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3948 <td>122</td>
3949 <td>5</td>
3950 <td>J721E_DEV_TIMER4</td>
3951 <td>intr_pend</td>
3952 <td>0</td>
3953 </tr>
3954 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3955 <td>122</td>
3956 <td>6</td>
3957 <td>J721E_DEV_TIMER5</td>
3958 <td>intr_pend</td>
3959 <td>0</td>
3960 </tr>
3961 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3962 <td>122</td>
3963 <td>7</td>
3964 <td>J721E_DEV_TIMER6</td>
3965 <td>intr_pend</td>
3966 <td>0</td>
3967 </tr>
3968 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3969 <td>122</td>
3970 <td>8</td>
3971 <td>J721E_DEV_TIMER7</td>
3972 <td>intr_pend</td>
3973 <td>0</td>
3974 </tr>
3975 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3976 <td>122</td>
3977 <td>9</td>
3978 <td>J721E_DEV_TIMER8</td>
3979 <td>intr_pend</td>
3980 <td>0</td>
3981 </tr>
3982 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3983 <td>122</td>
3984 <td>10</td>
3985 <td>J721E_DEV_TIMER9</td>
3986 <td>intr_pend</td>
3987 <td>0</td>
3988 </tr>
3989 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3990 <td>122</td>
3991 <td>11</td>
3992 <td>J721E_DEV_TIMER10</td>
3993 <td>intr_pend</td>
3994 <td>0</td>
3995 </tr>
3996 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
3997 <td>122</td>
3998 <td>12</td>
3999 <td>J721E_DEV_TIMER11</td>
4000 <td>intr_pend</td>
4001 <td>0</td>
4002 </tr>
4003 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4004 <td>122</td>
4005 <td>13</td>
4006 <td>J721E_DEV_TIMER16</td>
4007 <td>intr_pend</td>
4008 <td>0</td>
4009 </tr>
4010 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4011 <td>122</td>
4012 <td>14</td>
4013 <td>J721E_DEV_TIMER17</td>
4014 <td>intr_pend</td>
4015 <td>0</td>
4016 </tr>
4017 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4018 <td>122</td>
4019 <td>15</td>
4020 <td>J721E_DEV_TIMER18</td>
4021 <td>intr_pend</td>
4022 <td>0</td>
4023 </tr>
4024 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4025 <td>122</td>
4026 <td>16</td>
4027 <td>J721E_DEV_TIMER19</td>
4028 <td>intr_pend</td>
4029 <td>0</td>
4030 </tr>
4031 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4032 <td>122</td>
4033 <td>17</td>
4034 <td>J721E_DEV_MCSPI3</td>
4035 <td>intr_spi</td>
4036 <td>0</td>
4037 </tr>
4038 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4039 <td>122</td>
4040 <td>18</td>
4041 <td>J721E_DEV_MCSPI4</td>
4042 <td>intr_spi</td>
4043 <td>0</td>
4044 </tr>
4045 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4046 <td>122</td>
4047 <td>19</td>
4048 <td>J721E_DEV_MCSPI5</td>
4049 <td>intr_spi</td>
4050 <td>0</td>
4051 </tr>
4052 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4053 <td>122</td>
4054 <td>20</td>
4055 <td>J721E_DEV_MCSPI6</td>
4056 <td>intr_spi</td>
4057 <td>0</td>
4058 </tr>
4059 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4060 <td>122</td>
4061 <td>21</td>
4062 <td>J721E_DEV_MCAN2</td>
4063 <td>mcanss_mcan_lvl_int</td>
4064 <td>0</td>
4065 </tr>
4066 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4067 <td>122</td>
4068 <td>22</td>
4069 <td>J721E_DEV_MCAN2</td>
4070 <td>mcanss_mcan_lvl_int</td>
4071 <td>1</td>
4072 </tr>
4073 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4074 <td>122</td>
4075 <td>23</td>
4076 <td>J721E_DEV_MCAN2</td>
4077 <td>mcanss_ext_ts_rollover_lvl_int</td>
4078 <td>0</td>
4079 </tr>
4080 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4081 <td>122</td>
4082 <td>24</td>
4083 <td>J721E_DEV_MCAN3</td>
4084 <td>mcanss_mcan_lvl_int</td>
4085 <td>0</td>
4086 </tr>
4087 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4088 <td>122</td>
4089 <td>25</td>
4090 <td>J721E_DEV_MCAN3</td>
4091 <td>mcanss_mcan_lvl_int</td>
4092 <td>1</td>
4093 </tr>
4094 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4095 <td>122</td>
4096 <td>26</td>
4097 <td>J721E_DEV_MCAN3</td>
4098 <td>mcanss_ext_ts_rollover_lvl_int</td>
4099 <td>0</td>
4100 </tr>
4101 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4102 <td>122</td>
4103 <td>27</td>
4104 <td>J721E_DEV_I2C3</td>
4105 <td>pointrpend</td>
4106 <td>0</td>
4107 </tr>
4108 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4109 <td>122</td>
4110 <td>28</td>
4111 <td>J721E_DEV_I2C4</td>
4112 <td>pointrpend</td>
4113 <td>0</td>
4114 </tr>
4115 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4116 <td>122</td>
4117 <td>29</td>
4118 <td>J721E_DEV_I2C5</td>
4119 <td>pointrpend</td>
4120 <td>0</td>
4121 </tr>
4122 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4123 <td>122</td>
4124 <td>30</td>
4125 <td>J721E_DEV_I2C6</td>
4126 <td>pointrpend</td>
4127 <td>0</td>
4128 </tr>
4129 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4130 <td>122</td>
4131 <td>31</td>
4132 <td>Not Connected</td>
4133 <td>&#160;</td>
4134 <td>&#160;</td>
4135 </tr>
4136 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4137 <td>122</td>
4138 <td>32</td>
4139 <td>Not Connected</td>
4140 <td>&#160;</td>
4141 <td>&#160;</td>
4142 </tr>
4143 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4144 <td>122</td>
4145 <td>33</td>
4146 <td>J721E_DEV_EHRPWM0</td>
4147 <td>epwm_etint</td>
4148 <td>0</td>
4149 </tr>
4150 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4151 <td>122</td>
4152 <td>34</td>
4153 <td>J721E_DEV_EHRPWM1</td>
4154 <td>epwm_etint</td>
4155 <td>0</td>
4156 </tr>
4157 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4158 <td>122</td>
4159 <td>35</td>
4160 <td>J721E_DEV_EHRPWM2</td>
4161 <td>epwm_etint</td>
4162 <td>0</td>
4163 </tr>
4164 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4165 <td>122</td>
4166 <td>36</td>
4167 <td>J721E_DEV_EHRPWM3</td>
4168 <td>epwm_etint</td>
4169 <td>0</td>
4170 </tr>
4171 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4172 <td>122</td>
4173 <td>37</td>
4174 <td>J721E_DEV_EHRPWM4</td>
4175 <td>epwm_etint</td>
4176 <td>0</td>
4177 </tr>
4178 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4179 <td>122</td>
4180 <td>38</td>
4181 <td>J721E_DEV_EHRPWM5</td>
4182 <td>epwm_etint</td>
4183 <td>0</td>
4184 </tr>
4185 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4186 <td>122</td>
4187 <td>39</td>
4188 <td>J721E_DEV_EHRPWM0</td>
4189 <td>epwm_tripzint</td>
4190 <td>0</td>
4191 </tr>
4192 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4193 <td>122</td>
4194 <td>40</td>
4195 <td>J721E_DEV_EHRPWM1</td>
4196 <td>epwm_tripzint</td>
4197 <td>0</td>
4198 </tr>
4199 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4200 <td>122</td>
4201 <td>41</td>
4202 <td>J721E_DEV_EHRPWM2</td>
4203 <td>epwm_tripzint</td>
4204 <td>0</td>
4205 </tr>
4206 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4207 <td>122</td>
4208 <td>42</td>
4209 <td>J721E_DEV_EHRPWM3</td>
4210 <td>epwm_tripzint</td>
4211 <td>0</td>
4212 </tr>
4213 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4214 <td>122</td>
4215 <td>43</td>
4216 <td>J721E_DEV_EHRPWM4</td>
4217 <td>epwm_tripzint</td>
4218 <td>0</td>
4219 </tr>
4220 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4221 <td>122</td>
4222 <td>44</td>
4223 <td>J721E_DEV_EHRPWM5</td>
4224 <td>epwm_tripzint</td>
4225 <td>0</td>
4226 </tr>
4227 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4228 <td>122</td>
4229 <td>45</td>
4230 <td>J721E_DEV_ECAP0</td>
4231 <td>ecap_int</td>
4232 <td>0</td>
4233 </tr>
4234 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4235 <td>122</td>
4236 <td>46</td>
4237 <td>J721E_DEV_ECAP1</td>
4238 <td>ecap_int</td>
4239 <td>0</td>
4240 </tr>
4241 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4242 <td>122</td>
4243 <td>47</td>
4244 <td>J721E_DEV_ECAP2</td>
4245 <td>ecap_int</td>
4246 <td>0</td>
4247 </tr>
4248 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4249 <td>122</td>
4250 <td>48</td>
4251 <td>J721E_DEV_EQEP0</td>
4252 <td>eqep_int</td>
4253 <td>0</td>
4254 </tr>
4255 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4256 <td>122</td>
4257 <td>49</td>
4258 <td>J721E_DEV_EQEP1</td>
4259 <td>eqep_int</td>
4260 <td>0</td>
4261 </tr>
4262 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4263 <td>122</td>
4264 <td>50</td>
4265 <td>J721E_DEV_EQEP2</td>
4266 <td>eqep_int</td>
4267 <td>0</td>
4268 </tr>
4269 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4270 <td>122</td>
4271 <td>51</td>
4272 <td>J721E_DEV_UART3</td>
4273 <td>usart_irq</td>
4274 <td>0</td>
4275 </tr>
4276 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4277 <td>122</td>
4278 <td>52</td>
4279 <td>J721E_DEV_UART4</td>
4280 <td>usart_irq</td>
4281 <td>0</td>
4282 </tr>
4283 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4284 <td>122</td>
4285 <td>53</td>
4286 <td>J721E_DEV_UART5</td>
4287 <td>usart_irq</td>
4288 <td>0</td>
4289 </tr>
4290 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4291 <td>122</td>
4292 <td>54</td>
4293 <td>J721E_DEV_UART6</td>
4294 <td>usart_irq</td>
4295 <td>0</td>
4296 </tr>
4297 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4298 <td>122</td>
4299 <td>55</td>
4300 <td>J721E_DEV_UART7</td>
4301 <td>usart_irq</td>
4302 <td>0</td>
4303 </tr>
4304 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4305 <td>122</td>
4306 <td>56</td>
4307 <td>J721E_DEV_UART8</td>
4308 <td>usart_irq</td>
4309 <td>0</td>
4310 </tr>
4311 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4312 <td>122</td>
4313 <td>57</td>
4314 <td>J721E_DEV_UART9</td>
4315 <td>usart_irq</td>
4316 <td>0</td>
4317 </tr>
4318 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4319 <td>122</td>
4320 <td>58</td>
4321 <td>J721E_DEV_MCAN4</td>
4322 <td>mcanss_mcan_lvl_int</td>
4323 <td>0</td>
4324 </tr>
4325 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4326 <td>122</td>
4327 <td>59</td>
4328 <td>J721E_DEV_MCAN4</td>
4329 <td>mcanss_mcan_lvl_int</td>
4330 <td>1</td>
4331 </tr>
4332 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4333 <td>122</td>
4334 <td>60</td>
4335 <td>J721E_DEV_MCAN4</td>
4336 <td>mcanss_ext_ts_rollover_lvl_int</td>
4337 <td>0</td>
4338 </tr>
4339 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4340 <td>122</td>
4341 <td>61</td>
4342 <td>J721E_DEV_MCAN5</td>
4343 <td>mcanss_mcan_lvl_int</td>
4344 <td>0</td>
4345 </tr>
4346 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4347 <td>122</td>
4348 <td>62</td>
4349 <td>J721E_DEV_MCAN5</td>
4350 <td>mcanss_mcan_lvl_int</td>
4351 <td>1</td>
4352 </tr>
4353 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4354 <td>122</td>
4355 <td>63</td>
4356 <td>J721E_DEV_MCAN5</td>
4357 <td>mcanss_ext_ts_rollover_lvl_int</td>
4358 <td>0</td>
4359 </tr>
4360 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4361 <td>122</td>
4362 <td>64</td>
4363 <td>J721E_DEV_MCAN6</td>
4364 <td>mcanss_mcan_lvl_int</td>
4365 <td>0</td>
4366 </tr>
4367 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4368 <td>122</td>
4369 <td>65</td>
4370 <td>J721E_DEV_MCAN6</td>
4371 <td>mcanss_mcan_lvl_int</td>
4372 <td>1</td>
4373 </tr>
4374 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4375 <td>122</td>
4376 <td>66</td>
4377 <td>J721E_DEV_MCAN6</td>
4378 <td>mcanss_ext_ts_rollover_lvl_int</td>
4379 <td>0</td>
4380 </tr>
4381 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4382 <td>122</td>
4383 <td>67</td>
4384 <td>J721E_DEV_MCAN7</td>
4385 <td>mcanss_mcan_lvl_int</td>
4386 <td>0</td>
4387 </tr>
4388 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4389 <td>122</td>
4390 <td>68</td>
4391 <td>J721E_DEV_MCAN7</td>
4392 <td>mcanss_mcan_lvl_int</td>
4393 <td>1</td>
4394 </tr>
4395 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4396 <td>122</td>
4397 <td>69</td>
4398 <td>J721E_DEV_MCAN7</td>
4399 <td>mcanss_ext_ts_rollover_lvl_int</td>
4400 <td>0</td>
4401 </tr>
4402 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4403 <td>122</td>
4404 <td>70</td>
4405 <td>J721E_DEV_MCAN8</td>
4406 <td>mcanss_mcan_lvl_int</td>
4407 <td>0</td>
4408 </tr>
4409 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4410 <td>122</td>
4411 <td>71</td>
4412 <td>J721E_DEV_MCAN8</td>
4413 <td>mcanss_mcan_lvl_int</td>
4414 <td>1</td>
4415 </tr>
4416 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4417 <td>122</td>
4418 <td>72</td>
4419 <td>J721E_DEV_MCAN8</td>
4420 <td>mcanss_ext_ts_rollover_lvl_int</td>
4421 <td>0</td>
4422 </tr>
4423 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4424 <td>122</td>
4425 <td>73</td>
4426 <td>J721E_DEV_MCAN9</td>
4427 <td>mcanss_mcan_lvl_int</td>
4428 <td>0</td>
4429 </tr>
4430 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4431 <td>122</td>
4432 <td>74</td>
4433 <td>J721E_DEV_MCAN9</td>
4434 <td>mcanss_mcan_lvl_int</td>
4435 <td>1</td>
4436 </tr>
4437 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4438 <td>122</td>
4439 <td>75</td>
4440 <td>J721E_DEV_MCAN9</td>
4441 <td>mcanss_ext_ts_rollover_lvl_int</td>
4442 <td>0</td>
4443 </tr>
4444 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4445 <td>122</td>
4446 <td>76</td>
4447 <td>J721E_DEV_MCAN10</td>
4448 <td>mcanss_mcan_lvl_int</td>
4449 <td>0</td>
4450 </tr>
4451 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4452 <td>122</td>
4453 <td>77</td>
4454 <td>J721E_DEV_MCAN10</td>
4455 <td>mcanss_mcan_lvl_int</td>
4456 <td>1</td>
4457 </tr>
4458 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4459 <td>122</td>
4460 <td>78</td>
4461 <td>J721E_DEV_MCAN10</td>
4462 <td>mcanss_ext_ts_rollover_lvl_int</td>
4463 <td>0</td>
4464 </tr>
4465 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4466 <td>122</td>
4467 <td>79</td>
4468 <td>J721E_DEV_MCAN11</td>
4469 <td>mcanss_mcan_lvl_int</td>
4470 <td>0</td>
4471 </tr>
4472 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4473 <td>122</td>
4474 <td>80</td>
4475 <td>J721E_DEV_MCAN11</td>
4476 <td>mcanss_mcan_lvl_int</td>
4477 <td>1</td>
4478 </tr>
4479 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4480 <td>122</td>
4481 <td>81</td>
4482 <td>J721E_DEV_MCAN11</td>
4483 <td>mcanss_ext_ts_rollover_lvl_int</td>
4484 <td>0</td>
4485 </tr>
4486 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4487 <td>122</td>
4488 <td>82</td>
4489 <td>J721E_DEV_MCAN12</td>
4490 <td>mcanss_mcan_lvl_int</td>
4491 <td>0</td>
4492 </tr>
4493 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4494 <td>122</td>
4495 <td>83</td>
4496 <td>J721E_DEV_MCAN12</td>
4497 <td>mcanss_mcan_lvl_int</td>
4498 <td>1</td>
4499 </tr>
4500 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4501 <td>122</td>
4502 <td>84</td>
4503 <td>J721E_DEV_MCAN12</td>
4504 <td>mcanss_ext_ts_rollover_lvl_int</td>
4505 <td>0</td>
4506 </tr>
4507 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4508 <td>122</td>
4509 <td>85</td>
4510 <td>J721E_DEV_MCAN13</td>
4511 <td>mcanss_mcan_lvl_int</td>
4512 <td>0</td>
4513 </tr>
4514 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4515 <td>122</td>
4516 <td>86</td>
4517 <td>J721E_DEV_MCAN13</td>
4518 <td>mcanss_mcan_lvl_int</td>
4519 <td>1</td>
4520 </tr>
4521 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4522 <td>122</td>
4523 <td>87</td>
4524 <td>J721E_DEV_MCAN13</td>
4525 <td>mcanss_ext_ts_rollover_lvl_int</td>
4526 <td>0</td>
4527 </tr>
4528 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4529 <td>122</td>
4530 <td>88</td>
4531 <td>Not Connected</td>
4532 <td>&#160;</td>
4533 <td>&#160;</td>
4534 </tr>
4535 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4536 <td>122</td>
4537 <td>89</td>
4538 <td>Not Connected</td>
4539 <td>&#160;</td>
4540 <td>&#160;</td>
4541 </tr>
4542 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4543 <td>122</td>
4544 <td>90</td>
4545 <td>Not Connected</td>
4546 <td>&#160;</td>
4547 <td>&#160;</td>
4548 </tr>
4549 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4550 <td>122</td>
4551 <td>91</td>
4552 <td>Not Connected</td>
4553 <td>&#160;</td>
4554 <td>&#160;</td>
4555 </tr>
4556 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4557 <td>122</td>
4558 <td>92</td>
4559 <td>Not Connected</td>
4560 <td>&#160;</td>
4561 <td>&#160;</td>
4562 </tr>
4563 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4564 <td>122</td>
4565 <td>93</td>
4566 <td>Not Connected</td>
4567 <td>&#160;</td>
4568 <td>&#160;</td>
4569 </tr>
4570 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4571 <td>122</td>
4572 <td>94</td>
4573 <td>Not Connected</td>
4574 <td>&#160;</td>
4575 <td>&#160;</td>
4576 </tr>
4577 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4578 <td>122</td>
4579 <td>95</td>
4580 <td>Not Connected</td>
4581 <td>&#160;</td>
4582 <td>&#160;</td>
4583 </tr>
4584 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4585 <td>122</td>
4586 <td>96</td>
4587 <td>Not Connected</td>
4588 <td>&#160;</td>
4589 <td>&#160;</td>
4590 </tr>
4591 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0
4592 (<strong>Reserved by System Firmware</strong>)</td>
4593 <td>122</td>
4594 <td>97</td>
4595 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
4596 <td>outl_intr</td>
4597 <td>376</td>
4598 </tr>
4599 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0
4600 (<strong>Reserved by System Firmware</strong>)</td>
4601 <td>122</td>
4602 <td>98</td>
4603 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
4604 <td>outl_intr</td>
4605 <td>377</td>
4606 </tr>
4607 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0
4608 (<strong>Reserved by System Firmware</strong>)</td>
4609 <td>122</td>
4610 <td>99</td>
4611 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
4612 <td>outl_intr</td>
4613 <td>378</td>
4614 </tr>
4615 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0
4616 (<strong>Reserved by System Firmware</strong>)</td>
4617 <td>122</td>
4618 <td>100</td>
4619 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
4620 <td>outl_intr</td>
4621 <td>379</td>
4622 </tr>
4623 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4624 <td>122</td>
4625 <td>101</td>
4626 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
4627 <td>outl_intr</td>
4628 <td>380</td>
4629 </tr>
4630 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4631 <td>122</td>
4632 <td>102</td>
4633 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
4634 <td>outl_intr</td>
4635 <td>381</td>
4636 </tr>
4637 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4638 <td>122</td>
4639 <td>103</td>
4640 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
4641 <td>outl_intr</td>
4642 <td>382</td>
4643 </tr>
4644 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4645 <td>122</td>
4646 <td>104</td>
4647 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
4648 <td>outl_intr</td>
4649 <td>383</td>
4650 </tr>
4651 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4652 <td>122</td>
4653 <td>105</td>
4654 <td>J721E_DEV_DSS0</td>
4655 <td>dss_inst0_dispc_func_irq_proc0</td>
4656 <td>0</td>
4657 </tr>
4658 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4659 <td>122</td>
4660 <td>106</td>
4661 <td>J721E_DEV_DSS0</td>
4662 <td>dss_inst0_dispc_func_irq_proc1</td>
4663 <td>0</td>
4664 </tr>
4665 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4666 <td>122</td>
4667 <td>107</td>
4668 <td>J721E_DEV_DSS0</td>
4669 <td>dss_inst0_dispc_secure_irq_proc0</td>
4670 <td>0</td>
4671 </tr>
4672 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4673 <td>122</td>
4674 <td>108</td>
4675 <td>J721E_DEV_DSS0</td>
4676 <td>dss_inst0_dispc_secure_irq_proc1</td>
4677 <td>0</td>
4678 </tr>
4679 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4680 <td>122</td>
4681 <td>109</td>
4682 <td>J721E_DEV_DSS0</td>
4683 <td>dss_inst0_dispc_safety_error_irq_proc0</td>
4684 <td>0</td>
4685 </tr>
4686 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4687 <td>122</td>
4688 <td>110</td>
4689 <td>J721E_DEV_DSS0</td>
4690 <td>dss_inst0_dispc_safety_error_irq_proc1</td>
4691 <td>0</td>
4692 </tr>
4693 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4694 <td>122</td>
4695 <td>111</td>
4696 <td>Not Connected</td>
4697 <td>&#160;</td>
4698 <td>&#160;</td>
4699 </tr>
4700 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4701 <td>122</td>
4702 <td>112</td>
4703 <td>Not Connected</td>
4704 <td>&#160;</td>
4705 <td>&#160;</td>
4706 </tr>
4707 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4708 <td>122</td>
4709 <td>113</td>
4710 <td>Not Connected</td>
4711 <td>&#160;</td>
4712 <td>&#160;</td>
4713 </tr>
4714 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4715 <td>122</td>
4716 <td>114</td>
4717 <td>Not Connected</td>
4718 <td>&#160;</td>
4719 <td>&#160;</td>
4720 </tr>
4721 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4722 <td>122</td>
4723 <td>115</td>
4724 <td>Not Connected</td>
4725 <td>&#160;</td>
4726 <td>&#160;</td>
4727 </tr>
4728 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4729 <td>122</td>
4730 <td>116</td>
4731 <td>Not Connected</td>
4732 <td>&#160;</td>
4733 <td>&#160;</td>
4734 </tr>
4735 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4736 <td>122</td>
4737 <td>117</td>
4738 <td>J721E_DEV_CPSW0</td>
4739 <td>stat_pend</td>
4740 <td>0</td>
4741 </tr>
4742 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4743 <td>122</td>
4744 <td>118</td>
4745 <td>J721E_DEV_CPSW0</td>
4746 <td>mdio_pend</td>
4747 <td>0</td>
4748 </tr>
4749 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4750 <td>122</td>
4751 <td>119</td>
4752 <td>J721E_DEV_CPSW0</td>
4753 <td>evnt_pend</td>
4754 <td>0</td>
4755 </tr>
4756 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4757 <td>122</td>
4758 <td>120</td>
4759 <td>J721E_DEV_SA2_UL0</td>
4760 <td>sa_ul_pka</td>
4761 <td>0</td>
4762 </tr>
4763 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4764 <td>122</td>
4765 <td>121</td>
4766 <td>J721E_DEV_SA2_UL0</td>
4767 <td>sa_ul_trng</td>
4768 <td>0</td>
4769 </tr>
4770 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4771 <td>122</td>
4772 <td>122</td>
4773 <td>J721E_DEV_ESM0</td>
4774 <td>esm_int_low_lvl</td>
4775 <td>0</td>
4776 </tr>
4777 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4778 <td>122</td>
4779 <td>123</td>
4780 <td>J721E_DEV_ESM0</td>
4781 <td>esm_int_hi_lvl</td>
4782 <td>0</td>
4783 </tr>
4784 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4785 <td>122</td>
4786 <td>124</td>
4787 <td>J721E_DEV_ESM0</td>
4788 <td>esm_int_cfg_lvl</td>
4789 <td>0</td>
4790 </tr>
4791 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4792 <td>122</td>
4793 <td>125</td>
4794 <td>Not Connected</td>
4795 <td>&#160;</td>
4796 <td>&#160;</td>
4797 </tr>
4798 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4799 <td>122</td>
4800 <td>126</td>
4801 <td>Not Connected</td>
4802 <td>&#160;</td>
4803 <td>&#160;</td>
4804 </tr>
4805 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4806 <td>122</td>
4807 <td>127</td>
4808 <td>Not Connected</td>
4809 <td>&#160;</td>
4810 <td>&#160;</td>
4811 </tr>
4812 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4813 <td>122</td>
4814 <td>128</td>
4815 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4816 <td>outp</td>
4817 <td>40</td>
4818 </tr>
4819 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4820 <td>122</td>
4821 <td>129</td>
4822 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4823 <td>outp</td>
4824 <td>41</td>
4825 </tr>
4826 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4827 <td>122</td>
4828 <td>130</td>
4829 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4830 <td>outp</td>
4831 <td>42</td>
4832 </tr>
4833 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4834 <td>122</td>
4835 <td>131</td>
4836 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4837 <td>outp</td>
4838 <td>43</td>
4839 </tr>
4840 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4841 <td>122</td>
4842 <td>132</td>
4843 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4844 <td>outp</td>
4845 <td>44</td>
4846 </tr>
4847 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4848 <td>122</td>
4849 <td>133</td>
4850 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4851 <td>outp</td>
4852 <td>45</td>
4853 </tr>
4854 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4855 <td>122</td>
4856 <td>134</td>
4857 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4858 <td>outp</td>
4859 <td>46</td>
4860 </tr>
4861 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4862 <td>122</td>
4863 <td>135</td>
4864 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4865 <td>outp</td>
4866 <td>47</td>
4867 </tr>
4868 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4869 <td>122</td>
4870 <td>136</td>
4871 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4872 <td>outp</td>
4873 <td>48</td>
4874 </tr>
4875 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4876 <td>122</td>
4877 <td>137</td>
4878 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4879 <td>outp</td>
4880 <td>49</td>
4881 </tr>
4882 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4883 <td>122</td>
4884 <td>138</td>
4885 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4886 <td>outp</td>
4887 <td>50</td>
4888 </tr>
4889 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4890 <td>122</td>
4891 <td>139</td>
4892 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4893 <td>outp</td>
4894 <td>51</td>
4895 </tr>
4896 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4897 <td>122</td>
4898 <td>140</td>
4899 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4900 <td>outp</td>
4901 <td>52</td>
4902 </tr>
4903 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4904 <td>122</td>
4905 <td>141</td>
4906 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4907 <td>outp</td>
4908 <td>53</td>
4909 </tr>
4910 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4911 <td>122</td>
4912 <td>142</td>
4913 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4914 <td>outp</td>
4915 <td>54</td>
4916 </tr>
4917 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4918 <td>122</td>
4919 <td>143</td>
4920 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4921 <td>outp</td>
4922 <td>55</td>
4923 </tr>
4924 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4925 <td>122</td>
4926 <td>144</td>
4927 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4928 <td>outp</td>
4929 <td>56</td>
4930 </tr>
4931 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4932 <td>122</td>
4933 <td>145</td>
4934 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4935 <td>outp</td>
4936 <td>57</td>
4937 </tr>
4938 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4939 <td>122</td>
4940 <td>146</td>
4941 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4942 <td>outp</td>
4943 <td>58</td>
4944 </tr>
4945 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4946 <td>122</td>
4947 <td>147</td>
4948 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4949 <td>outp</td>
4950 <td>59</td>
4951 </tr>
4952 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4953 <td>122</td>
4954 <td>148</td>
4955 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4956 <td>outp</td>
4957 <td>60</td>
4958 </tr>
4959 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4960 <td>122</td>
4961 <td>149</td>
4962 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4963 <td>outp</td>
4964 <td>61</td>
4965 </tr>
4966 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4967 <td>122</td>
4968 <td>150</td>
4969 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4970 <td>outp</td>
4971 <td>62</td>
4972 </tr>
4973 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4974 <td>122</td>
4975 <td>151</td>
4976 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
4977 <td>outp</td>
4978 <td>63</td>
4979 </tr>
4980 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4981 <td>122</td>
4982 <td>152</td>
4983 <td>J721E_DEV_PRU_ICSSG0</td>
4984 <td>pr1_host_intr_pend</td>
4985 <td>0</td>
4986 </tr>
4987 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4988 <td>122</td>
4989 <td>153</td>
4990 <td>J721E_DEV_PRU_ICSSG0</td>
4991 <td>pr1_host_intr_pend</td>
4992 <td>1</td>
4993 </tr>
4994 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
4995 <td>122</td>
4996 <td>154</td>
4997 <td>J721E_DEV_PRU_ICSSG0</td>
4998 <td>pr1_host_intr_pend</td>
4999 <td>2</td>
5000 </tr>
5001 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5002 <td>122</td>
5003 <td>155</td>
5004 <td>J721E_DEV_PRU_ICSSG0</td>
5005 <td>pr1_host_intr_pend</td>
5006 <td>3</td>
5007 </tr>
5008 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5009 <td>122</td>
5010 <td>156</td>
5011 <td>J721E_DEV_PRU_ICSSG0</td>
5012 <td>pr1_host_intr_pend</td>
5013 <td>4</td>
5014 </tr>
5015 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5016 <td>122</td>
5017 <td>157</td>
5018 <td>J721E_DEV_PRU_ICSSG0</td>
5019 <td>pr1_host_intr_pend</td>
5020 <td>5</td>
5021 </tr>
5022 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5023 <td>122</td>
5024 <td>158</td>
5025 <td>J721E_DEV_PRU_ICSSG0</td>
5026 <td>pr1_host_intr_pend</td>
5027 <td>6</td>
5028 </tr>
5029 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5030 <td>122</td>
5031 <td>159</td>
5032 <td>J721E_DEV_PRU_ICSSG0</td>
5033 <td>pr1_host_intr_pend</td>
5034 <td>7</td>
5035 </tr>
5036 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5037 <td>122</td>
5038 <td>160</td>
5039 <td>J721E_DEV_PRU_ICSSG1</td>
5040 <td>pr1_host_intr_pend</td>
5041 <td>0</td>
5042 </tr>
5043 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5044 <td>122</td>
5045 <td>161</td>
5046 <td>J721E_DEV_PRU_ICSSG1</td>
5047 <td>pr1_host_intr_pend</td>
5048 <td>1</td>
5049 </tr>
5050 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5051 <td>122</td>
5052 <td>162</td>
5053 <td>J721E_DEV_PRU_ICSSG1</td>
5054 <td>pr1_host_intr_pend</td>
5055 <td>2</td>
5056 </tr>
5057 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5058 <td>122</td>
5059 <td>163</td>
5060 <td>J721E_DEV_PRU_ICSSG1</td>
5061 <td>pr1_host_intr_pend</td>
5062 <td>3</td>
5063 </tr>
5064 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5065 <td>122</td>
5066 <td>164</td>
5067 <td>J721E_DEV_PRU_ICSSG1</td>
5068 <td>pr1_host_intr_pend</td>
5069 <td>4</td>
5070 </tr>
5071 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5072 <td>122</td>
5073 <td>165</td>
5074 <td>J721E_DEV_PRU_ICSSG1</td>
5075 <td>pr1_host_intr_pend</td>
5076 <td>5</td>
5077 </tr>
5078 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5079 <td>122</td>
5080 <td>166</td>
5081 <td>J721E_DEV_PRU_ICSSG1</td>
5082 <td>pr1_host_intr_pend</td>
5083 <td>6</td>
5084 </tr>
5085 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5086 <td>122</td>
5087 <td>167</td>
5088 <td>J721E_DEV_PRU_ICSSG1</td>
5089 <td>pr1_host_intr_pend</td>
5090 <td>7</td>
5091 </tr>
5092 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5093 <td>122</td>
5094 <td>168</td>
5095 <td>J721E_DEV_PRU_ICSSG0</td>
5096 <td>pr1_tx_sof_intr_req</td>
5097 <td>0</td>
5098 </tr>
5099 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5100 <td>122</td>
5101 <td>169</td>
5102 <td>J721E_DEV_PRU_ICSSG0</td>
5103 <td>pr1_tx_sof_intr_req</td>
5104 <td>1</td>
5105 </tr>
5106 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5107 <td>122</td>
5108 <td>170</td>
5109 <td>J721E_DEV_PRU_ICSSG0</td>
5110 <td>pr1_rx_sof_intr_req</td>
5111 <td>0</td>
5112 </tr>
5113 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5114 <td>122</td>
5115 <td>171</td>
5116 <td>J721E_DEV_PRU_ICSSG0</td>
5117 <td>pr1_rx_sof_intr_req</td>
5118 <td>1</td>
5119 </tr>
5120 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5121 <td>122</td>
5122 <td>172</td>
5123 <td>J721E_DEV_PRU_ICSSG1</td>
5124 <td>pr1_tx_sof_intr_req</td>
5125 <td>0</td>
5126 </tr>
5127 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5128 <td>122</td>
5129 <td>173</td>
5130 <td>J721E_DEV_PRU_ICSSG1</td>
5131 <td>pr1_tx_sof_intr_req</td>
5132 <td>1</td>
5133 </tr>
5134 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5135 <td>122</td>
5136 <td>174</td>
5137 <td>J721E_DEV_PRU_ICSSG1</td>
5138 <td>pr1_rx_sof_intr_req</td>
5139 <td>0</td>
5140 </tr>
5141 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5142 <td>122</td>
5143 <td>175</td>
5144 <td>J721E_DEV_PRU_ICSSG1</td>
5145 <td>pr1_rx_sof_intr_req</td>
5146 <td>1</td>
5147 </tr>
5148 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5149 <td>122</td>
5150 <td>176</td>
5151 <td>J721E_DEV_USB0</td>
5152 <td>irq</td>
5153 <td>0</td>
5154 </tr>
5155 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5156 <td>122</td>
5157 <td>177</td>
5158 <td>J721E_DEV_USB0</td>
5159 <td>irq</td>
5160 <td>1</td>
5161 </tr>
5162 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5163 <td>122</td>
5164 <td>178</td>
5165 <td>J721E_DEV_USB0</td>
5166 <td>irq</td>
5167 <td>2</td>
5168 </tr>
5169 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5170 <td>122</td>
5171 <td>179</td>
5172 <td>J721E_DEV_USB0</td>
5173 <td>irq</td>
5174 <td>3</td>
5175 </tr>
5176 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5177 <td>122</td>
5178 <td>180</td>
5179 <td>J721E_DEV_USB0</td>
5180 <td>irq</td>
5181 <td>4</td>
5182 </tr>
5183 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5184 <td>122</td>
5185 <td>181</td>
5186 <td>J721E_DEV_USB0</td>
5187 <td>irq</td>
5188 <td>5</td>
5189 </tr>
5190 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5191 <td>122</td>
5192 <td>182</td>
5193 <td>J721E_DEV_USB0</td>
5194 <td>irq</td>
5195 <td>6</td>
5196 </tr>
5197 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5198 <td>122</td>
5199 <td>183</td>
5200 <td>J721E_DEV_USB0</td>
5201 <td>irq</td>
5202 <td>7</td>
5203 </tr>
5204 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5205 <td>122</td>
5206 <td>184</td>
5207 <td>J721E_DEV_USB1</td>
5208 <td>irq</td>
5209 <td>0</td>
5210 </tr>
5211 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5212 <td>122</td>
5213 <td>185</td>
5214 <td>J721E_DEV_USB1</td>
5215 <td>irq</td>
5216 <td>1</td>
5217 </tr>
5218 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5219 <td>122</td>
5220 <td>186</td>
5221 <td>J721E_DEV_USB1</td>
5222 <td>irq</td>
5223 <td>2</td>
5224 </tr>
5225 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5226 <td>122</td>
5227 <td>187</td>
5228 <td>J721E_DEV_USB1</td>
5229 <td>irq</td>
5230 <td>3</td>
5231 </tr>
5232 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5233 <td>122</td>
5234 <td>188</td>
5235 <td>J721E_DEV_USB1</td>
5236 <td>irq</td>
5237 <td>4</td>
5238 </tr>
5239 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5240 <td>122</td>
5241 <td>189</td>
5242 <td>J721E_DEV_USB1</td>
5243 <td>irq</td>
5244 <td>5</td>
5245 </tr>
5246 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5247 <td>122</td>
5248 <td>190</td>
5249 <td>J721E_DEV_USB1</td>
5250 <td>irq</td>
5251 <td>6</td>
5252 </tr>
5253 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5254 <td>122</td>
5255 <td>191</td>
5256 <td>J721E_DEV_USB1</td>
5257 <td>irq</td>
5258 <td>7</td>
5259 </tr>
5260 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5261 <td>122</td>
5262 <td>192</td>
5263 <td>Not Connected</td>
5264 <td>&#160;</td>
5265 <td>&#160;</td>
5266 </tr>
5267 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5268 <td>122</td>
5269 <td>193</td>
5270 <td>Not Connected</td>
5271 <td>&#160;</td>
5272 <td>&#160;</td>
5273 </tr>
5274 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5275 <td>122</td>
5276 <td>194</td>
5277 <td>Not Connected</td>
5278 <td>&#160;</td>
5279 <td>&#160;</td>
5280 </tr>
5281 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5282 <td>122</td>
5283 <td>195</td>
5284 <td>Not Connected</td>
5285 <td>&#160;</td>
5286 <td>&#160;</td>
5287 </tr>
5288 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5289 <td>122</td>
5290 <td>196</td>
5291 <td>Not Connected</td>
5292 <td>&#160;</td>
5293 <td>&#160;</td>
5294 </tr>
5295 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5296 <td>122</td>
5297 <td>197</td>
5298 <td>Not Connected</td>
5299 <td>&#160;</td>
5300 <td>&#160;</td>
5301 </tr>
5302 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5303 <td>122</td>
5304 <td>198</td>
5305 <td>Not Connected</td>
5306 <td>&#160;</td>
5307 <td>&#160;</td>
5308 </tr>
5309 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5310 <td>122</td>
5311 <td>199</td>
5312 <td>Not Connected</td>
5313 <td>&#160;</td>
5314 <td>&#160;</td>
5315 </tr>
5316 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5317 <td>122</td>
5318 <td>200</td>
5319 <td>J721E_DEV_USB0</td>
5320 <td>otgirq</td>
5321 <td>0</td>
5322 </tr>
5323 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5324 <td>122</td>
5325 <td>201</td>
5326 <td>J721E_DEV_USB1</td>
5327 <td>otgirq</td>
5328 <td>0</td>
5329 </tr>
5330 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5331 <td>122</td>
5332 <td>202</td>
5333 <td>Not Connected</td>
5334 <td>&#160;</td>
5335 <td>&#160;</td>
5336 </tr>
5337 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5338 <td>122</td>
5339 <td>203</td>
5340 <td>J721E_DEV_PCIE0</td>
5341 <td>pcie_legacy_pulse</td>
5342 <td>0</td>
5343 </tr>
5344 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5345 <td>122</td>
5346 <td>204</td>
5347 <td>J721E_DEV_PCIE0</td>
5348 <td>pcie_downstream_pulse</td>
5349 <td>0</td>
5350 </tr>
5351 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5352 <td>122</td>
5353 <td>205</td>
5354 <td>J721E_DEV_PCIE0</td>
5355 <td>pcie_flr_pulse</td>
5356 <td>0</td>
5357 </tr>
5358 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5359 <td>122</td>
5360 <td>206</td>
5361 <td>J721E_DEV_PCIE0</td>
5362 <td>pcie_phy_level</td>
5363 <td>0</td>
5364 </tr>
5365 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5366 <td>122</td>
5367 <td>207</td>
5368 <td>J721E_DEV_PCIE0</td>
5369 <td>pcie_local_level</td>
5370 <td>0</td>
5371 </tr>
5372 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5373 <td>122</td>
5374 <td>208</td>
5375 <td>J721E_DEV_PCIE0</td>
5376 <td>pcie_error_pulse</td>
5377 <td>0</td>
5378 </tr>
5379 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5380 <td>122</td>
5381 <td>209</td>
5382 <td>J721E_DEV_PCIE0</td>
5383 <td>pcie_link_state_pulse</td>
5384 <td>0</td>
5385 </tr>
5386 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5387 <td>122</td>
5388 <td>210</td>
5389 <td>J721E_DEV_PCIE0</td>
5390 <td>pcie_pwr_state_pulse</td>
5391 <td>0</td>
5392 </tr>
5393 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5394 <td>122</td>
5395 <td>211</td>
5396 <td>J721E_DEV_PCIE0</td>
5397 <td>pcie_ptm_valid_pulse</td>
5398 <td>0</td>
5399 </tr>
5400 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5401 <td>122</td>
5402 <td>212</td>
5403 <td>J721E_DEV_PCIE0</td>
5404 <td>pcie_hot_reset_pulse</td>
5405 <td>0</td>
5406 </tr>
5407 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5408 <td>122</td>
5409 <td>213</td>
5410 <td>J721E_DEV_PCIE0</td>
5411 <td>pcie_cpts_pend</td>
5412 <td>0</td>
5413 </tr>
5414 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5415 <td>122</td>
5416 <td>214</td>
5417 <td>Not Connected</td>
5418 <td>&#160;</td>
5419 <td>&#160;</td>
5420 </tr>
5421 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5422 <td>122</td>
5423 <td>215</td>
5424 <td>J721E_DEV_PCIE1</td>
5425 <td>pcie_legacy_pulse</td>
5426 <td>0</td>
5427 </tr>
5428 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5429 <td>122</td>
5430 <td>216</td>
5431 <td>J721E_DEV_PCIE1</td>
5432 <td>pcie_downstream_pulse</td>
5433 <td>0</td>
5434 </tr>
5435 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5436 <td>122</td>
5437 <td>217</td>
5438 <td>J721E_DEV_PCIE1</td>
5439 <td>pcie_flr_pulse</td>
5440 <td>0</td>
5441 </tr>
5442 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5443 <td>122</td>
5444 <td>218</td>
5445 <td>J721E_DEV_PCIE1</td>
5446 <td>pcie_phy_level</td>
5447 <td>0</td>
5448 </tr>
5449 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5450 <td>122</td>
5451 <td>219</td>
5452 <td>J721E_DEV_PCIE1</td>
5453 <td>pcie_local_level</td>
5454 <td>0</td>
5455 </tr>
5456 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5457 <td>122</td>
5458 <td>220</td>
5459 <td>J721E_DEV_PCIE1</td>
5460 <td>pcie_error_pulse</td>
5461 <td>0</td>
5462 </tr>
5463 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5464 <td>122</td>
5465 <td>221</td>
5466 <td>J721E_DEV_PCIE1</td>
5467 <td>pcie_link_state_pulse</td>
5468 <td>0</td>
5469 </tr>
5470 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5471 <td>122</td>
5472 <td>222</td>
5473 <td>J721E_DEV_PCIE1</td>
5474 <td>pcie_pwr_state_pulse</td>
5475 <td>0</td>
5476 </tr>
5477 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5478 <td>122</td>
5479 <td>223</td>
5480 <td>J721E_DEV_PCIE1</td>
5481 <td>pcie_ptm_valid_pulse</td>
5482 <td>0</td>
5483 </tr>
5484 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5485 <td>122</td>
5486 <td>224</td>
5487 <td>J721E_DEV_PCIE1</td>
5488 <td>pcie_hot_reset_pulse</td>
5489 <td>0</td>
5490 </tr>
5491 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5492 <td>122</td>
5493 <td>225</td>
5494 <td>J721E_DEV_PCIE1</td>
5495 <td>pcie_cpts_pend</td>
5496 <td>0</td>
5497 </tr>
5498 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5499 <td>122</td>
5500 <td>226</td>
5501 <td>Not Connected</td>
5502 <td>&#160;</td>
5503 <td>&#160;</td>
5504 </tr>
5505 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5506 <td>122</td>
5507 <td>227</td>
5508 <td>J721E_DEV_PCIE2</td>
5509 <td>pcie_legacy_pulse</td>
5510 <td>0</td>
5511 </tr>
5512 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5513 <td>122</td>
5514 <td>228</td>
5515 <td>J721E_DEV_PCIE2</td>
5516 <td>pcie_downstream_pulse</td>
5517 <td>0</td>
5518 </tr>
5519 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5520 <td>122</td>
5521 <td>229</td>
5522 <td>J721E_DEV_PCIE2</td>
5523 <td>pcie_flr_pulse</td>
5524 <td>0</td>
5525 </tr>
5526 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5527 <td>122</td>
5528 <td>230</td>
5529 <td>J721E_DEV_PCIE2</td>
5530 <td>pcie_phy_level</td>
5531 <td>0</td>
5532 </tr>
5533 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5534 <td>122</td>
5535 <td>231</td>
5536 <td>J721E_DEV_PCIE2</td>
5537 <td>pcie_local_level</td>
5538 <td>0</td>
5539 </tr>
5540 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5541 <td>122</td>
5542 <td>232</td>
5543 <td>J721E_DEV_PCIE2</td>
5544 <td>pcie_error_pulse</td>
5545 <td>0</td>
5546 </tr>
5547 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5548 <td>122</td>
5549 <td>233</td>
5550 <td>J721E_DEV_PCIE2</td>
5551 <td>pcie_link_state_pulse</td>
5552 <td>0</td>
5553 </tr>
5554 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5555 <td>122</td>
5556 <td>234</td>
5557 <td>J721E_DEV_PCIE2</td>
5558 <td>pcie_pwr_state_pulse</td>
5559 <td>0</td>
5560 </tr>
5561 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5562 <td>122</td>
5563 <td>235</td>
5564 <td>J721E_DEV_PCIE2</td>
5565 <td>pcie_ptm_valid_pulse</td>
5566 <td>0</td>
5567 </tr>
5568 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5569 <td>122</td>
5570 <td>236</td>
5571 <td>J721E_DEV_PCIE2</td>
5572 <td>pcie_hot_reset_pulse</td>
5573 <td>0</td>
5574 </tr>
5575 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5576 <td>122</td>
5577 <td>237</td>
5578 <td>J721E_DEV_PCIE2</td>
5579 <td>pcie_cpts_pend</td>
5580 <td>0</td>
5581 </tr>
5582 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5583 <td>122</td>
5584 <td>238</td>
5585 <td>Not Connected</td>
5586 <td>&#160;</td>
5587 <td>&#160;</td>
5588 </tr>
5589 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5590 <td>122</td>
5591 <td>239</td>
5592 <td>J721E_DEV_PCIE3</td>
5593 <td>pcie_legacy_pulse</td>
5594 <td>0</td>
5595 </tr>
5596 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5597 <td>122</td>
5598 <td>240</td>
5599 <td>J721E_DEV_PCIE3</td>
5600 <td>pcie_downstream_pulse</td>
5601 <td>0</td>
5602 </tr>
5603 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5604 <td>122</td>
5605 <td>241</td>
5606 <td>J721E_DEV_PCIE3</td>
5607 <td>pcie_flr_pulse</td>
5608 <td>0</td>
5609 </tr>
5610 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5611 <td>122</td>
5612 <td>242</td>
5613 <td>J721E_DEV_PCIE3</td>
5614 <td>pcie_phy_level</td>
5615 <td>0</td>
5616 </tr>
5617 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5618 <td>122</td>
5619 <td>243</td>
5620 <td>J721E_DEV_PCIE3</td>
5621 <td>pcie_local_level</td>
5622 <td>0</td>
5623 </tr>
5624 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5625 <td>122</td>
5626 <td>244</td>
5627 <td>J721E_DEV_PCIE3</td>
5628 <td>pcie_error_pulse</td>
5629 <td>0</td>
5630 </tr>
5631 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5632 <td>122</td>
5633 <td>245</td>
5634 <td>J721E_DEV_PCIE3</td>
5635 <td>pcie_link_state_pulse</td>
5636 <td>0</td>
5637 </tr>
5638 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5639 <td>122</td>
5640 <td>246</td>
5641 <td>J721E_DEV_PCIE3</td>
5642 <td>pcie_pwr_state_pulse</td>
5643 <td>0</td>
5644 </tr>
5645 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5646 <td>122</td>
5647 <td>247</td>
5648 <td>J721E_DEV_PCIE3</td>
5649 <td>pcie_ptm_valid_pulse</td>
5650 <td>0</td>
5651 </tr>
5652 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5653 <td>122</td>
5654 <td>248</td>
5655 <td>J721E_DEV_PCIE3</td>
5656 <td>pcie_hot_reset_pulse</td>
5657 <td>0</td>
5658 </tr>
5659 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5660 <td>122</td>
5661 <td>249</td>
5662 <td>J721E_DEV_PCIE3</td>
5663 <td>pcie_cpts_pend</td>
5664 <td>0</td>
5665 </tr>
5666 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5667 <td>122</td>
5668 <td>250</td>
5669 <td>Not Connected</td>
5670 <td>&#160;</td>
5671 <td>&#160;</td>
5672 </tr>
5673 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5674 <td>122</td>
5675 <td>251</td>
5676 <td>Not Connected</td>
5677 <td>&#160;</td>
5678 <td>&#160;</td>
5679 </tr>
5680 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5681 <td>122</td>
5682 <td>252</td>
5683 <td>Not Connected</td>
5684 <td>&#160;</td>
5685 <td>&#160;</td>
5686 </tr>
5687 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5688 <td>122</td>
5689 <td>253</td>
5690 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5691 <td>soc_events_out_level</td>
5692 <td>16</td>
5693 </tr>
5694 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5695 <td>122</td>
5696 <td>254</td>
5697 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5698 <td>soc_events_out_level</td>
5699 <td>17</td>
5700 </tr>
5701 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5702 <td>122</td>
5703 <td>255</td>
5704 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5705 <td>soc_events_out_level</td>
5706 <td>18</td>
5707 </tr>
5708 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5709 <td>122</td>
5710 <td>256</td>
5711 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5712 <td>soc_events_out_level</td>
5713 <td>19</td>
5714 </tr>
5715 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5716 <td>122</td>
5717 <td>257</td>
5718 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5719 <td>soc_events_out_level</td>
5720 <td>20</td>
5721 </tr>
5722 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5723 <td>122</td>
5724 <td>258</td>
5725 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5726 <td>soc_events_out_level</td>
5727 <td>21</td>
5728 </tr>
5729 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5730 <td>122</td>
5731 <td>259</td>
5732 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5733 <td>soc_events_out_level</td>
5734 <td>22</td>
5735 </tr>
5736 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5737 <td>122</td>
5738 <td>260</td>
5739 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5740 <td>soc_events_out_level</td>
5741 <td>23</td>
5742 </tr>
5743 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5744 <td>122</td>
5745 <td>261</td>
5746 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5747 <td>soc_events_out_level</td>
5748 <td>24</td>
5749 </tr>
5750 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5751 <td>122</td>
5752 <td>262</td>
5753 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5754 <td>soc_events_out_level</td>
5755 <td>25</td>
5756 </tr>
5757 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5758 <td>122</td>
5759 <td>263</td>
5760 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5761 <td>soc_events_out_level</td>
5762 <td>26</td>
5763 </tr>
5764 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5765 <td>122</td>
5766 <td>264</td>
5767 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5768 <td>soc_events_out_level</td>
5769 <td>27</td>
5770 </tr>
5771 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5772 <td>122</td>
5773 <td>265</td>
5774 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5775 <td>soc_events_out_level</td>
5776 <td>28</td>
5777 </tr>
5778 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5779 <td>122</td>
5780 <td>266</td>
5781 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5782 <td>soc_events_out_level</td>
5783 <td>29</td>
5784 </tr>
5785 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5786 <td>122</td>
5787 <td>267</td>
5788 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5789 <td>soc_events_out_level</td>
5790 <td>30</td>
5791 </tr>
5792 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5793 <td>122</td>
5794 <td>268</td>
5795 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
5796 <td>soc_events_out_level</td>
5797 <td>31</td>
5798 </tr>
5799 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5800 <td>122</td>
5801 <td>269</td>
5802 <td>Not Connected</td>
5803 <td>&#160;</td>
5804 <td>&#160;</td>
5805 </tr>
5806 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5807 <td>122</td>
5808 <td>270</td>
5809 <td>Not Connected</td>
5810 <td>&#160;</td>
5811 <td>&#160;</td>
5812 </tr>
5813 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5814 <td>122</td>
5815 <td>271</td>
5816 <td>Not Connected</td>
5817 <td>&#160;</td>
5818 <td>&#160;</td>
5819 </tr>
5820 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5821 <td>122</td>
5822 <td>272</td>
5823 <td>Not Connected</td>
5824 <td>&#160;</td>
5825 <td>&#160;</td>
5826 </tr>
5827 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5828 <td>122</td>
5829 <td>273</td>
5830 <td>Not Connected</td>
5831 <td>&#160;</td>
5832 <td>&#160;</td>
5833 </tr>
5834 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5835 <td>122</td>
5836 <td>274</td>
5837 <td>Not Connected</td>
5838 <td>&#160;</td>
5839 <td>&#160;</td>
5840 </tr>
5841 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5842 <td>122</td>
5843 <td>275</td>
5844 <td>Not Connected</td>
5845 <td>&#160;</td>
5846 <td>&#160;</td>
5847 </tr>
5848 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5849 <td>122</td>
5850 <td>276</td>
5851 <td>Not Connected</td>
5852 <td>&#160;</td>
5853 <td>&#160;</td>
5854 </tr>
5855 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5856 <td>122</td>
5857 <td>277</td>
5858 <td>J721E_DEV_USB0</td>
5859 <td>host_system_error</td>
5860 <td>0</td>
5861 </tr>
5862 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5863 <td>122</td>
5864 <td>278</td>
5865 <td>J721E_DEV_USB1</td>
5866 <td>host_system_error</td>
5867 <td>0</td>
5868 </tr>
5869 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5870 <td>122</td>
5871 <td>279</td>
5872 <td>Not Connected</td>
5873 <td>&#160;</td>
5874 <td>&#160;</td>
5875 </tr>
5876 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5877 <td>122</td>
5878 <td>280</td>
5879 <td>J721E_DEV_MCU_CPSW0</td>
5880 <td>stat_pend</td>
5881 <td>0</td>
5882 </tr>
5883 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5884 <td>122</td>
5885 <td>281</td>
5886 <td>J721E_DEV_MCU_CPSW0</td>
5887 <td>mdio_pend</td>
5888 <td>0</td>
5889 </tr>
5890 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5891 <td>122</td>
5892 <td>282</td>
5893 <td>J721E_DEV_MCU_CPSW0</td>
5894 <td>evnt_pend</td>
5895 <td>0</td>
5896 </tr>
5897 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5898 <td>122</td>
5899 <td>283</td>
5900 <td>Not Connected</td>
5901 <td>&#160;</td>
5902 <td>&#160;</td>
5903 </tr>
5904 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5905 <td>122</td>
5906 <td>284</td>
5907 <td>J721E_DEV_MCU_TIMER0</td>
5908 <td>intr_pend</td>
5909 <td>0</td>
5910 </tr>
5911 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5912 <td>122</td>
5913 <td>285</td>
5914 <td>J721E_DEV_MCU_TIMER1</td>
5915 <td>intr_pend</td>
5916 <td>0</td>
5917 </tr>
5918 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5919 <td>122</td>
5920 <td>286</td>
5921 <td>J721E_DEV_MCU_TIMER2</td>
5922 <td>intr_pend</td>
5923 <td>0</td>
5924 </tr>
5925 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5926 <td>122</td>
5927 <td>287</td>
5928 <td>J721E_DEV_MCU_TIMER3</td>
5929 <td>intr_pend</td>
5930 <td>0</td>
5931 </tr>
5932 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5933 <td>122</td>
5934 <td>288</td>
5935 <td>J721E_DEV_MCU_TIMER4</td>
5936 <td>intr_pend</td>
5937 <td>0</td>
5938 </tr>
5939 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5940 <td>122</td>
5941 <td>289</td>
5942 <td>J721E_DEV_MCU_TIMER5</td>
5943 <td>intr_pend</td>
5944 <td>0</td>
5945 </tr>
5946 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5947 <td>122</td>
5948 <td>290</td>
5949 <td>J721E_DEV_MCU_TIMER6</td>
5950 <td>intr_pend</td>
5951 <td>0</td>
5952 </tr>
5953 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5954 <td>122</td>
5955 <td>291</td>
5956 <td>J721E_DEV_MCU_TIMER7</td>
5957 <td>intr_pend</td>
5958 <td>0</td>
5959 </tr>
5960 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5961 <td>122</td>
5962 <td>292</td>
5963 <td>J721E_DEV_MCU_TIMER8</td>
5964 <td>intr_pend</td>
5965 <td>0</td>
5966 </tr>
5967 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5968 <td>122</td>
5969 <td>293</td>
5970 <td>J721E_DEV_MCU_TIMER9</td>
5971 <td>intr_pend</td>
5972 <td>0</td>
5973 </tr>
5974 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5975 <td>122</td>
5976 <td>294</td>
5977 <td>Not Connected</td>
5978 <td>&#160;</td>
5979 <td>&#160;</td>
5980 </tr>
5981 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5982 <td>122</td>
5983 <td>295</td>
5984 <td>Not Connected</td>
5985 <td>&#160;</td>
5986 <td>&#160;</td>
5987 </tr>
5988 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5989 <td>122</td>
5990 <td>296</td>
5991 <td>J721E_DEV_MCU_ESM0</td>
5992 <td>esm_int_low_lvl</td>
5993 <td>0</td>
5994 </tr>
5995 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
5996 <td>122</td>
5997 <td>297</td>
5998 <td>J721E_DEV_MCU_ESM0</td>
5999 <td>esm_int_hi_lvl</td>
6000 <td>0</td>
6001 </tr>
6002 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6003 <td>122</td>
6004 <td>298</td>
6005 <td>J721E_DEV_MCU_ESM0</td>
6006 <td>esm_int_cfg_lvl</td>
6007 <td>0</td>
6008 </tr>
6009 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6010 <td>122</td>
6011 <td>299</td>
6012 <td>J721E_DEV_WKUP_ESM0</td>
6013 <td>esm_int_low_lvl</td>
6014 <td>0</td>
6015 </tr>
6016 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6017 <td>122</td>
6018 <td>300</td>
6019 <td>J721E_DEV_WKUP_ESM0</td>
6020 <td>esm_int_hi_lvl</td>
6021 <td>0</td>
6022 </tr>
6023 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6024 <td>122</td>
6025 <td>301</td>
6026 <td>J721E_DEV_WKUP_ESM0</td>
6027 <td>esm_int_cfg_lvl</td>
6028 <td>0</td>
6029 </tr>
6030 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6031 <td>122</td>
6032 <td>302</td>
6033 <td>Not Connected</td>
6034 <td>&#160;</td>
6035 <td>&#160;</td>
6036 </tr>
6037 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6038 <td>122</td>
6039 <td>303</td>
6040 <td>Not Connected</td>
6041 <td>&#160;</td>
6042 <td>&#160;</td>
6043 </tr>
6044 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6045 <td>122</td>
6046 <td>304</td>
6047 <td>J721E_DEV_TIMER12</td>
6048 <td>intr_pend</td>
6049 <td>0</td>
6050 </tr>
6051 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6052 <td>122</td>
6053 <td>305</td>
6054 <td>J721E_DEV_TIMER13</td>
6055 <td>intr_pend</td>
6056 <td>0</td>
6057 </tr>
6058 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6059 <td>122</td>
6060 <td>306</td>
6061 <td>J721E_DEV_TIMER14</td>
6062 <td>intr_pend</td>
6063 <td>0</td>
6064 </tr>
6065 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6066 <td>122</td>
6067 <td>307</td>
6068 <td>J721E_DEV_TIMER15</td>
6069 <td>intr_pend</td>
6070 <td>0</td>
6071 </tr>
6072 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6073 <td>122</td>
6074 <td>308</td>
6075 <td>J721E_DEV_RTI25</td>
6076 <td>intr_wwd</td>
6077 <td>0</td>
6078 </tr>
6079 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6080 <td>122</td>
6081 <td>309</td>
6082 <td>Not Connected</td>
6083 <td>&#160;</td>
6084 <td>&#160;</td>
6085 </tr>
6086 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6087 <td>122</td>
6088 <td>310</td>
6089 <td>J721E_DEV_MCASP0</td>
6090 <td>rec_intr_pend</td>
6091 <td>0</td>
6092 </tr>
6093 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6094 <td>122</td>
6095 <td>311</td>
6096 <td>J721E_DEV_MCASP1</td>
6097 <td>rec_intr_pend</td>
6098 <td>0</td>
6099 </tr>
6100 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6101 <td>122</td>
6102 <td>312</td>
6103 <td>J721E_DEV_MCASP2</td>
6104 <td>rec_intr_pend</td>
6105 <td>0</td>
6106 </tr>
6107 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6108 <td>122</td>
6109 <td>313</td>
6110 <td>J721E_DEV_MCASP3</td>
6111 <td>rec_intr_pend</td>
6112 <td>0</td>
6113 </tr>
6114 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6115 <td>122</td>
6116 <td>314</td>
6117 <td>J721E_DEV_MCASP4</td>
6118 <td>rec_intr_pend</td>
6119 <td>0</td>
6120 </tr>
6121 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6122 <td>122</td>
6123 <td>315</td>
6124 <td>J721E_DEV_MCASP5</td>
6125 <td>rec_intr_pend</td>
6126 <td>0</td>
6127 </tr>
6128 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6129 <td>122</td>
6130 <td>316</td>
6131 <td>J721E_DEV_MCASP6</td>
6132 <td>rec_intr_pend</td>
6133 <td>0</td>
6134 </tr>
6135 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6136 <td>122</td>
6137 <td>317</td>
6138 <td>J721E_DEV_MCASP7</td>
6139 <td>rec_intr_pend</td>
6140 <td>0</td>
6141 </tr>
6142 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6143 <td>122</td>
6144 <td>318</td>
6145 <td>J721E_DEV_MCASP8</td>
6146 <td>rec_intr_pend</td>
6147 <td>0</td>
6148 </tr>
6149 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6150 <td>122</td>
6151 <td>319</td>
6152 <td>J721E_DEV_MCASP9</td>
6153 <td>rec_intr_pend</td>
6154 <td>0</td>
6155 </tr>
6156 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6157 <td>122</td>
6158 <td>320</td>
6159 <td>J721E_DEV_MCASP10</td>
6160 <td>rec_intr_pend</td>
6161 <td>0</td>
6162 </tr>
6163 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6164 <td>122</td>
6165 <td>321</td>
6166 <td>J721E_DEV_MCASP11</td>
6167 <td>rec_intr_pend</td>
6168 <td>0</td>
6169 </tr>
6170 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6171 <td>122</td>
6172 <td>322</td>
6173 <td>J721E_DEV_MCASP0</td>
6174 <td>xmit_intr_pend</td>
6175 <td>0</td>
6176 </tr>
6177 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6178 <td>122</td>
6179 <td>323</td>
6180 <td>J721E_DEV_MCASP1</td>
6181 <td>xmit_intr_pend</td>
6182 <td>0</td>
6183 </tr>
6184 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6185 <td>122</td>
6186 <td>324</td>
6187 <td>J721E_DEV_MCASP2</td>
6188 <td>xmit_intr_pend</td>
6189 <td>0</td>
6190 </tr>
6191 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6192 <td>122</td>
6193 <td>325</td>
6194 <td>J721E_DEV_MCASP3</td>
6195 <td>xmit_intr_pend</td>
6196 <td>0</td>
6197 </tr>
6198 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6199 <td>122</td>
6200 <td>326</td>
6201 <td>J721E_DEV_MCASP4</td>
6202 <td>xmit_intr_pend</td>
6203 <td>0</td>
6204 </tr>
6205 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6206 <td>122</td>
6207 <td>327</td>
6208 <td>J721E_DEV_MCASP5</td>
6209 <td>xmit_intr_pend</td>
6210 <td>0</td>
6211 </tr>
6212 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6213 <td>122</td>
6214 <td>328</td>
6215 <td>J721E_DEV_MCASP6</td>
6216 <td>xmit_intr_pend</td>
6217 <td>0</td>
6218 </tr>
6219 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6220 <td>122</td>
6221 <td>329</td>
6222 <td>J721E_DEV_MCASP7</td>
6223 <td>xmit_intr_pend</td>
6224 <td>0</td>
6225 </tr>
6226 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6227 <td>122</td>
6228 <td>330</td>
6229 <td>J721E_DEV_MCASP8</td>
6230 <td>xmit_intr_pend</td>
6231 <td>0</td>
6232 </tr>
6233 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6234 <td>122</td>
6235 <td>331</td>
6236 <td>J721E_DEV_MCASP9</td>
6237 <td>xmit_intr_pend</td>
6238 <td>0</td>
6239 </tr>
6240 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6241 <td>122</td>
6242 <td>332</td>
6243 <td>J721E_DEV_MCASP10</td>
6244 <td>xmit_intr_pend</td>
6245 <td>0</td>
6246 </tr>
6247 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6248 <td>122</td>
6249 <td>333</td>
6250 <td>J721E_DEV_MCASP11</td>
6251 <td>xmit_intr_pend</td>
6252 <td>0</td>
6253 </tr>
6254 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6255 <td>122</td>
6256 <td>334</td>
6257 <td>J721E_DEV_AASRC0</td>
6258 <td>infifo_level</td>
6259 <td>0</td>
6260 </tr>
6261 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6262 <td>122</td>
6263 <td>335</td>
6264 <td>J721E_DEV_AASRC0</td>
6265 <td>ingroup_level</td>
6266 <td>0</td>
6267 </tr>
6268 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6269 <td>122</td>
6270 <td>336</td>
6271 <td>J721E_DEV_AASRC0</td>
6272 <td>outfifo_level</td>
6273 <td>0</td>
6274 </tr>
6275 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6276 <td>122</td>
6277 <td>337</td>
6278 <td>J721E_DEV_AASRC0</td>
6279 <td>outgroup_level</td>
6280 <td>0</td>
6281 </tr>
6282 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6283 <td>122</td>
6284 <td>338</td>
6285 <td>J721E_DEV_AASRC0</td>
6286 <td>err_level</td>
6287 <td>0</td>
6288 </tr>
6289 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6290 <td>122</td>
6291 <td>339</td>
6292 <td>J721E_DEV_I3C0</td>
6293 <td>i3c__int</td>
6294 <td>0</td>
6295 </tr>
6296 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6297 <td>122</td>
6298 <td>340</td>
6299 <td>J721E_DEV_MCSPI0</td>
6300 <td>intr_spi</td>
6301 <td>0</td>
6302 </tr>
6303 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6304 <td>122</td>
6305 <td>341</td>
6306 <td>J721E_DEV_MCSPI1</td>
6307 <td>intr_spi</td>
6308 <td>0</td>
6309 </tr>
6310 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6311 <td>122</td>
6312 <td>342</td>
6313 <td>J721E_DEV_MCSPI2</td>
6314 <td>intr_spi</td>
6315 <td>0</td>
6316 </tr>
6317 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6318 <td>122</td>
6319 <td>343</td>
6320 <td>J721E_DEV_MCSPI7</td>
6321 <td>intr_spi</td>
6322 <td>0</td>
6323 </tr>
6324 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6325 <td>122</td>
6326 <td>344</td>
6327 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
6328 <td>outp</td>
6329 <td>12</td>
6330 </tr>
6331 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6332 <td>122</td>
6333 <td>345</td>
6334 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
6335 <td>outp</td>
6336 <td>13</td>
6337 </tr>
6338 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6339 <td>122</td>
6340 <td>346</td>
6341 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
6342 <td>outp</td>
6343 <td>14</td>
6344 </tr>
6345 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6346 <td>122</td>
6347 <td>347</td>
6348 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
6349 <td>outp</td>
6350 <td>15</td>
6351 </tr>
6352 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6353 <td>122</td>
6354 <td>348</td>
6355 <td>J721E_DEV_I2C0</td>
6356 <td>pointrpend</td>
6357 <td>0</td>
6358 </tr>
6359 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6360 <td>122</td>
6361 <td>349</td>
6362 <td>J721E_DEV_I2C1</td>
6363 <td>pointrpend</td>
6364 <td>0</td>
6365 </tr>
6366 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6367 <td>122</td>
6368 <td>350</td>
6369 <td>J721E_DEV_I2C2</td>
6370 <td>pointrpend</td>
6371 <td>0</td>
6372 </tr>
6373 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6374 <td>122</td>
6375 <td>351</td>
6376 <td>J721E_DEV_UART0</td>
6377 <td>usart_irq</td>
6378 <td>0</td>
6379 </tr>
6380 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6381 <td>122</td>
6382 <td>352</td>
6383 <td>J721E_DEV_UART1</td>
6384 <td>usart_irq</td>
6385 <td>0</td>
6386 </tr>
6387 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6388 <td>122</td>
6389 <td>353</td>
6390 <td>J721E_DEV_UART2</td>
6391 <td>usart_irq</td>
6392 <td>0</td>
6393 </tr>
6394 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6395 <td>122</td>
6396 <td>354</td>
6397 <td>J721E_DEV_MCU_I3C0</td>
6398 <td>i3c__int</td>
6399 <td>0</td>
6400 </tr>
6401 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6402 <td>122</td>
6403 <td>355</td>
6404 <td>J721E_DEV_MCU_I3C1</td>
6405 <td>i3c__int</td>
6406 <td>0</td>
6407 </tr>
6408 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6409 <td>122</td>
6410 <td>356</td>
6411 <td>Not Connected</td>
6412 <td>&#160;</td>
6413 <td>&#160;</td>
6414 </tr>
6415 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6416 <td>122</td>
6417 <td>357</td>
6418 <td>Not Connected</td>
6419 <td>&#160;</td>
6420 <td>&#160;</td>
6421 </tr>
6422 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6423 <td>122</td>
6424 <td>358</td>
6425 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6426 <td>outl_intr</td>
6427 <td>352</td>
6428 </tr>
6429 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6430 <td>122</td>
6431 <td>359</td>
6432 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6433 <td>outl_intr</td>
6434 <td>353</td>
6435 </tr>
6436 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6437 <td>122</td>
6438 <td>360</td>
6439 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6440 <td>outl_intr</td>
6441 <td>354</td>
6442 </tr>
6443 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6444 <td>122</td>
6445 <td>361</td>
6446 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6447 <td>outl_intr</td>
6448 <td>355</td>
6449 </tr>
6450 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6451 <td>122</td>
6452 <td>362</td>
6453 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6454 <td>outl_intr</td>
6455 <td>356</td>
6456 </tr>
6457 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6458 <td>122</td>
6459 <td>363</td>
6460 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6461 <td>outl_intr</td>
6462 <td>357</td>
6463 </tr>
6464 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6465 <td>122</td>
6466 <td>364</td>
6467 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6468 <td>outl_intr</td>
6469 <td>358</td>
6470 </tr>
6471 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6472 <td>122</td>
6473 <td>365</td>
6474 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6475 <td>outl_intr</td>
6476 <td>359</td>
6477 </tr>
6478 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6479 <td>122</td>
6480 <td>366</td>
6481 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6482 <td>outl_intr</td>
6483 <td>360</td>
6484 </tr>
6485 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6486 <td>122</td>
6487 <td>367</td>
6488 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6489 <td>outl_intr</td>
6490 <td>361</td>
6491 </tr>
6492 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6493 <td>122</td>
6494 <td>368</td>
6495 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6496 <td>outl_intr</td>
6497 <td>362</td>
6498 </tr>
6499 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6500 <td>122</td>
6501 <td>369</td>
6502 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6503 <td>outl_intr</td>
6504 <td>363</td>
6505 </tr>
6506 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6507 <td>122</td>
6508 <td>370</td>
6509 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6510 <td>outl_intr</td>
6511 <td>364</td>
6512 </tr>
6513 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6514 <td>122</td>
6515 <td>371</td>
6516 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6517 <td>outl_intr</td>
6518 <td>365</td>
6519 </tr>
6520 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6521 <td>122</td>
6522 <td>372</td>
6523 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6524 <td>outl_intr</td>
6525 <td>366</td>
6526 </tr>
6527 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6528 <td>122</td>
6529 <td>373</td>
6530 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6531 <td>outl_intr</td>
6532 <td>367</td>
6533 </tr>
6534 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6535 <td>122</td>
6536 <td>374</td>
6537 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6538 <td>outl_intr</td>
6539 <td>368</td>
6540 </tr>
6541 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6542 <td>122</td>
6543 <td>375</td>
6544 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6545 <td>outl_intr</td>
6546 <td>369</td>
6547 </tr>
6548 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6549 <td>122</td>
6550 <td>376</td>
6551 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6552 <td>outl_intr</td>
6553 <td>370</td>
6554 </tr>
6555 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6556 <td>122</td>
6557 <td>377</td>
6558 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6559 <td>outl_intr</td>
6560 <td>371</td>
6561 </tr>
6562 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6563 <td>122</td>
6564 <td>378</td>
6565 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6566 <td>outl_intr</td>
6567 <td>372</td>
6568 </tr>
6569 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6570 <td>122</td>
6571 <td>379</td>
6572 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6573 <td>outl_intr</td>
6574 <td>373</td>
6575 </tr>
6576 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6577 <td>122</td>
6578 <td>380</td>
6579 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6580 <td>outl_intr</td>
6581 <td>374</td>
6582 </tr>
6583 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6584 <td>122</td>
6585 <td>381</td>
6586 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
6587 <td>outl_intr</td>
6588 <td>375</td>
6589 </tr>
6590 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6591 <td>122</td>
6592 <td>382</td>
6593 <td>J721E_DEV_MCAN0</td>
6594 <td>mcanss_mcan_lvl_int</td>
6595 <td>0</td>
6596 </tr>
6597 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6598 <td>122</td>
6599 <td>383</td>
6600 <td>J721E_DEV_MCAN0</td>
6601 <td>mcanss_mcan_lvl_int</td>
6602 <td>1</td>
6603 </tr>
6604 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6605 <td>122</td>
6606 <td>384</td>
6607 <td>J721E_DEV_MCAN0</td>
6608 <td>mcanss_ext_ts_rollover_lvl_int</td>
6609 <td>0</td>
6610 </tr>
6611 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6612 <td>122</td>
6613 <td>385</td>
6614 <td>J721E_DEV_MCAN1</td>
6615 <td>mcanss_mcan_lvl_int</td>
6616 <td>0</td>
6617 </tr>
6618 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6619 <td>122</td>
6620 <td>386</td>
6621 <td>J721E_DEV_MCAN1</td>
6622 <td>mcanss_mcan_lvl_int</td>
6623 <td>1</td>
6624 </tr>
6625 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6626 <td>122</td>
6627 <td>387</td>
6628 <td>J721E_DEV_MCAN1</td>
6629 <td>mcanss_ext_ts_rollover_lvl_int</td>
6630 <td>0</td>
6631 </tr>
6632 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6633 <td>122</td>
6634 <td>388</td>
6635 <td>J721E_DEV_MLB0</td>
6636 <td>mlbss_mlb_ahb_int</td>
6637 <td>0</td>
6638 </tr>
6639 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6640 <td>122</td>
6641 <td>389</td>
6642 <td>J721E_DEV_MLB0</td>
6643 <td>mlbss_mlb_ahb_int</td>
6644 <td>1</td>
6645 </tr>
6646 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6647 <td>122</td>
6648 <td>390</td>
6649 <td>J721E_DEV_MLB0</td>
6650 <td>mlbss_mlb_int</td>
6651 <td>0</td>
6652 </tr>
6653 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6654 <td>122</td>
6655 <td>391</td>
6656 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
6657 <td>outp</td>
6658 <td>32</td>
6659 </tr>
6660 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6661 <td>122</td>
6662 <td>392</td>
6663 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
6664 <td>outp</td>
6665 <td>33</td>
6666 </tr>
6667 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6668 <td>122</td>
6669 <td>393</td>
6670 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
6671 <td>outp</td>
6672 <td>34</td>
6673 </tr>
6674 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6675 <td>122</td>
6676 <td>394</td>
6677 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
6678 <td>outp</td>
6679 <td>35</td>
6680 </tr>
6681 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6682 <td>122</td>
6683 <td>395</td>
6684 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
6685 <td>outp</td>
6686 <td>36</td>
6687 </tr>
6688 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6689 <td>122</td>
6690 <td>396</td>
6691 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
6692 <td>outp</td>
6693 <td>37</td>
6694 </tr>
6695 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6696 <td>122</td>
6697 <td>397</td>
6698 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
6699 <td>outp</td>
6700 <td>38</td>
6701 </tr>
6702 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6703 <td>122</td>
6704 <td>398</td>
6705 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
6706 <td>outp</td>
6707 <td>39</td>
6708 </tr>
6709 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6710 <td>122</td>
6711 <td>399</td>
6712 <td>J721E_DEV_MCU_ADC12_16FFC0</td>
6713 <td>gen_level</td>
6714 <td>0</td>
6715 </tr>
6716 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6717 <td>122</td>
6718 <td>400</td>
6719 <td>J721E_DEV_MCU_ADC12_16FFC1</td>
6720 <td>gen_level</td>
6721 <td>0</td>
6722 </tr>
6723 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6724 <td>122</td>
6725 <td>401</td>
6726 <td>Not Connected</td>
6727 <td>&#160;</td>
6728 <td>&#160;</td>
6729 </tr>
6730 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6731 <td>122</td>
6732 <td>402</td>
6733 <td>Not Connected</td>
6734 <td>&#160;</td>
6735 <td>&#160;</td>
6736 </tr>
6737 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6738 <td>122</td>
6739 <td>403</td>
6740 <td>Not Connected</td>
6741 <td>&#160;</td>
6742 <td>&#160;</td>
6743 </tr>
6744 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6745 <td>122</td>
6746 <td>404</td>
6747 <td>Not Connected</td>
6748 <td>&#160;</td>
6749 <td>&#160;</td>
6750 </tr>
6751 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6752 <td>122</td>
6753 <td>405</td>
6754 <td>Not Connected</td>
6755 <td>&#160;</td>
6756 <td>&#160;</td>
6757 </tr>
6758 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6759 <td>122</td>
6760 <td>406</td>
6761 <td>Not Connected</td>
6762 <td>&#160;</td>
6763 <td>&#160;</td>
6764 </tr>
6765 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6766 <td>122</td>
6767 <td>407</td>
6768 <td>Not Connected</td>
6769 <td>&#160;</td>
6770 <td>&#160;</td>
6771 </tr>
6772 </tbody>
6773 </table>
6774 </div>
6775 <div class="section" id="c66ss1-introuter0-interrupt-router-output-destinations">
6776 <span id="pub-soc-j721e-c66ss1-introuter0-output-src-list"></span><h2>C66SS1_INTROUTER0 Interrupt Router Output Destinations<a class="headerlink" href="#c66ss1-introuter0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
6777 <div class="admonition warning">
6778 <p class="first admonition-title">Warning</p>
6779 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
6780 host within the RM Board Configuration resource assignment array.  The RM
6781 Board Configuration is rejected if an overlap with a reserved resource is
6782 detected.</p>
6783 </div>
6784 <table border="1" class="docutils">
6785 <colgroup>
6786 <col width="25%" />
6787 <col width="11%" />
6788 <col width="14%" />
6789 <col width="17%" />
6790 <col width="18%" />
6791 <col width="15%" />
6792 </colgroup>
6793 <thead valign="bottom">
6794 <tr class="row-odd"><th class="head">IR Name</th>
6795 <th class="head">IR Device ID</th>
6796 <th class="head">IR Output Index</th>
6797 <th class="head">Destination Name</th>
6798 <th class="head">Destination Interface</th>
6799 <th class="head">Destination Index</th>
6800 </tr>
6801 </thead>
6802 <tbody valign="top">
6803 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0
6804 (<strong>Reserved by System Firmware</strong>)</td>
6805 <td>122</td>
6806 <td>0</td>
6807 <td>J721E_DEV_C66SS1_CORE0</td>
6808 <td>c66_event_in_sync</td>
6809 <td>4</td>
6810 </tr>
6811 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0
6812 (<strong>Reserved by System Firmware</strong>)</td>
6813 <td>122</td>
6814 <td>1</td>
6815 <td>J721E_DEV_C66SS1_CORE0</td>
6816 <td>c66_event_in_sync</td>
6817 <td>5</td>
6818 </tr>
6819 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0
6820 (<strong>Reserved by System Firmware</strong>)</td>
6821 <td>122</td>
6822 <td>2</td>
6823 <td>J721E_DEV_C66SS1_CORE0</td>
6824 <td>c66_event_in_sync</td>
6825 <td>6</td>
6826 </tr>
6827 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0
6828 (<strong>Reserved by System Firmware</strong>)</td>
6829 <td>122</td>
6830 <td>3</td>
6831 <td>J721E_DEV_C66SS1_CORE0</td>
6832 <td>c66_event_in_sync</td>
6833 <td>7</td>
6834 </tr>
6835 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6836 <td>122</td>
6837 <td>4</td>
6838 <td>J721E_DEV_C66SS1_CORE0</td>
6839 <td>c66_event_in_sync</td>
6840 <td>8</td>
6841 </tr>
6842 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6843 <td>122</td>
6844 <td>5</td>
6845 <td>J721E_DEV_C66SS1_CORE0</td>
6846 <td>c66_event_in_sync</td>
6847 <td>15</td>
6848 </tr>
6849 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6850 <td>122</td>
6851 <td>6</td>
6852 <td>J721E_DEV_C66SS1_CORE0</td>
6853 <td>c66_event_in_sync</td>
6854 <td>16</td>
6855 </tr>
6856 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6857 <td>122</td>
6858 <td>7</td>
6859 <td>J721E_DEV_C66SS1_CORE0</td>
6860 <td>c66_event_in_sync</td>
6861 <td>17</td>
6862 </tr>
6863 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6864 <td>122</td>
6865 <td>8</td>
6866 <td>J721E_DEV_C66SS1_CORE0</td>
6867 <td>c66_event_in_sync</td>
6868 <td>18</td>
6869 </tr>
6870 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6871 <td>122</td>
6872 <td>9</td>
6873 <td>J721E_DEV_C66SS1_CORE0</td>
6874 <td>c66_event_in_sync</td>
6875 <td>19</td>
6876 </tr>
6877 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6878 <td>122</td>
6879 <td>10</td>
6880 <td>J721E_DEV_C66SS1_CORE0</td>
6881 <td>c66_event_in_sync</td>
6882 <td>20</td>
6883 </tr>
6884 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6885 <td>122</td>
6886 <td>11</td>
6887 <td>J721E_DEV_C66SS1_CORE0</td>
6888 <td>c66_event_in_sync</td>
6889 <td>21</td>
6890 </tr>
6891 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6892 <td>122</td>
6893 <td>12</td>
6894 <td>J721E_DEV_C66SS1_CORE0</td>
6895 <td>c66_event_in_sync</td>
6896 <td>22</td>
6897 </tr>
6898 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6899 <td>122</td>
6900 <td>13</td>
6901 <td>J721E_DEV_C66SS1_CORE0</td>
6902 <td>c66_event_in_sync</td>
6903 <td>23</td>
6904 </tr>
6905 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6906 <td>122</td>
6907 <td>14</td>
6908 <td>J721E_DEV_C66SS1_CORE0</td>
6909 <td>c66_event_in_sync</td>
6910 <td>24</td>
6911 </tr>
6912 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6913 <td>122</td>
6914 <td>15</td>
6915 <td>J721E_DEV_C66SS1_CORE0</td>
6916 <td>c66_event_in_sync</td>
6917 <td>25</td>
6918 </tr>
6919 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6920 <td>122</td>
6921 <td>16</td>
6922 <td>J721E_DEV_C66SS1_CORE0</td>
6923 <td>c66_event_in_sync</td>
6924 <td>26</td>
6925 </tr>
6926 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6927 <td>122</td>
6928 <td>17</td>
6929 <td>J721E_DEV_C66SS1_CORE0</td>
6930 <td>c66_event_in_sync</td>
6931 <td>27</td>
6932 </tr>
6933 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6934 <td>122</td>
6935 <td>18</td>
6936 <td>J721E_DEV_C66SS1_CORE0</td>
6937 <td>c66_event_in_sync</td>
6938 <td>28</td>
6939 </tr>
6940 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6941 <td>122</td>
6942 <td>19</td>
6943 <td>J721E_DEV_C66SS1_CORE0</td>
6944 <td>c66_event_in_sync</td>
6945 <td>29</td>
6946 </tr>
6947 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6948 <td>122</td>
6949 <td>20</td>
6950 <td>J721E_DEV_C66SS1_CORE0</td>
6951 <td>c66_event_in_sync</td>
6952 <td>30</td>
6953 </tr>
6954 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6955 <td>122</td>
6956 <td>21</td>
6957 <td>J721E_DEV_C66SS1_CORE0</td>
6958 <td>c66_event_in_sync</td>
6959 <td>31</td>
6960 </tr>
6961 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6962 <td>122</td>
6963 <td>22</td>
6964 <td>J721E_DEV_C66SS1_CORE0</td>
6965 <td>c66_event_in_sync</td>
6966 <td>32</td>
6967 </tr>
6968 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6969 <td>122</td>
6970 <td>23</td>
6971 <td>J721E_DEV_C66SS1_CORE0</td>
6972 <td>c66_event_in_sync</td>
6973 <td>33</td>
6974 </tr>
6975 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6976 <td>122</td>
6977 <td>24</td>
6978 <td>J721E_DEV_C66SS1_CORE0</td>
6979 <td>c66_event_in_sync</td>
6980 <td>34</td>
6981 </tr>
6982 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6983 <td>122</td>
6984 <td>25</td>
6985 <td>J721E_DEV_C66SS1_CORE0</td>
6986 <td>c66_event_in_sync</td>
6987 <td>35</td>
6988 </tr>
6989 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6990 <td>122</td>
6991 <td>26</td>
6992 <td>J721E_DEV_C66SS1_CORE0</td>
6993 <td>c66_event_in_sync</td>
6994 <td>36</td>
6995 </tr>
6996 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
6997 <td>122</td>
6998 <td>27</td>
6999 <td>J721E_DEV_C66SS1_CORE0</td>
7000 <td>c66_event_in_sync</td>
7001 <td>37</td>
7002 </tr>
7003 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7004 <td>122</td>
7005 <td>28</td>
7006 <td>J721E_DEV_C66SS1_CORE0</td>
7007 <td>c66_event_in_sync</td>
7008 <td>38</td>
7009 </tr>
7010 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7011 <td>122</td>
7012 <td>29</td>
7013 <td>J721E_DEV_C66SS1_CORE0</td>
7014 <td>c66_event_in_sync</td>
7015 <td>39</td>
7016 </tr>
7017 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7018 <td>122</td>
7019 <td>30</td>
7020 <td>J721E_DEV_C66SS1_CORE0</td>
7021 <td>c66_event_in_sync</td>
7022 <td>40</td>
7023 </tr>
7024 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7025 <td>122</td>
7026 <td>31</td>
7027 <td>J721E_DEV_C66SS1_CORE0</td>
7028 <td>c66_event_in_sync</td>
7029 <td>41</td>
7030 </tr>
7031 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7032 <td>122</td>
7033 <td>32</td>
7034 <td>J721E_DEV_C66SS1_CORE0</td>
7035 <td>c66_event_in_sync</td>
7036 <td>42</td>
7037 </tr>
7038 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7039 <td>122</td>
7040 <td>33</td>
7041 <td>J721E_DEV_C66SS1_CORE0</td>
7042 <td>c66_event_in_sync</td>
7043 <td>43</td>
7044 </tr>
7045 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7046 <td>122</td>
7047 <td>34</td>
7048 <td>J721E_DEV_C66SS1_CORE0</td>
7049 <td>c66_event_in_sync</td>
7050 <td>44</td>
7051 </tr>
7052 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7053 <td>122</td>
7054 <td>35</td>
7055 <td>J721E_DEV_C66SS1_CORE0</td>
7056 <td>c66_event_in_sync</td>
7057 <td>45</td>
7058 </tr>
7059 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7060 <td>122</td>
7061 <td>36</td>
7062 <td>J721E_DEV_C66SS1_CORE0</td>
7063 <td>c66_event_in_sync</td>
7064 <td>46</td>
7065 </tr>
7066 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7067 <td>122</td>
7068 <td>37</td>
7069 <td>J721E_DEV_C66SS1_CORE0</td>
7070 <td>c66_event_in_sync</td>
7071 <td>47</td>
7072 </tr>
7073 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7074 <td>122</td>
7075 <td>38</td>
7076 <td>J721E_DEV_C66SS1_CORE0</td>
7077 <td>c66_event_in_sync</td>
7078 <td>48</td>
7079 </tr>
7080 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7081 <td>122</td>
7082 <td>39</td>
7083 <td>J721E_DEV_C66SS1_CORE0</td>
7084 <td>c66_event_in_sync</td>
7085 <td>49</td>
7086 </tr>
7087 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7088 <td>122</td>
7089 <td>40</td>
7090 <td>J721E_DEV_C66SS1_CORE0</td>
7091 <td>c66_event_in_sync</td>
7092 <td>50</td>
7093 </tr>
7094 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7095 <td>122</td>
7096 <td>41</td>
7097 <td>J721E_DEV_C66SS1_CORE0</td>
7098 <td>c66_event_in_sync</td>
7099 <td>51</td>
7100 </tr>
7101 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7102 <td>122</td>
7103 <td>42</td>
7104 <td>J721E_DEV_C66SS1_CORE0</td>
7105 <td>c66_event_in_sync</td>
7106 <td>52</td>
7107 </tr>
7108 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7109 <td>122</td>
7110 <td>43</td>
7111 <td>J721E_DEV_C66SS1_CORE0</td>
7112 <td>c66_event_in_sync</td>
7113 <td>53</td>
7114 </tr>
7115 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7116 <td>122</td>
7117 <td>44</td>
7118 <td>J721E_DEV_C66SS1_CORE0</td>
7119 <td>c66_event_in_sync</td>
7120 <td>54</td>
7121 </tr>
7122 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7123 <td>122</td>
7124 <td>45</td>
7125 <td>J721E_DEV_C66SS1_CORE0</td>
7126 <td>c66_event_in_sync</td>
7127 <td>55</td>
7128 </tr>
7129 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7130 <td>122</td>
7131 <td>46</td>
7132 <td>J721E_DEV_C66SS1_CORE0</td>
7133 <td>c66_event_in_sync</td>
7134 <td>56</td>
7135 </tr>
7136 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7137 <td>122</td>
7138 <td>47</td>
7139 <td>J721E_DEV_C66SS1_CORE0</td>
7140 <td>c66_event_in_sync</td>
7141 <td>57</td>
7142 </tr>
7143 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7144 <td>122</td>
7145 <td>48</td>
7146 <td>J721E_DEV_C66SS1_CORE0</td>
7147 <td>c66_event_in_sync</td>
7148 <td>58</td>
7149 </tr>
7150 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7151 <td>122</td>
7152 <td>49</td>
7153 <td>J721E_DEV_C66SS1_CORE0</td>
7154 <td>c66_event_in_sync</td>
7155 <td>59</td>
7156 </tr>
7157 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7158 <td>122</td>
7159 <td>50</td>
7160 <td>J721E_DEV_C66SS1_CORE0</td>
7161 <td>c66_event_in_sync</td>
7162 <td>60</td>
7163 </tr>
7164 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7165 <td>122</td>
7166 <td>51</td>
7167 <td>J721E_DEV_C66SS1_CORE0</td>
7168 <td>c66_event_in_sync</td>
7169 <td>61</td>
7170 </tr>
7171 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7172 <td>122</td>
7173 <td>52</td>
7174 <td>J721E_DEV_C66SS1_CORE0</td>
7175 <td>c66_event_in_sync</td>
7176 <td>62</td>
7177 </tr>
7178 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7179 <td>122</td>
7180 <td>53</td>
7181 <td>J721E_DEV_C66SS1_CORE0</td>
7182 <td>c66_event_in_sync</td>
7183 <td>63</td>
7184 </tr>
7185 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7186 <td>122</td>
7187 <td>54</td>
7188 <td>J721E_DEV_C66SS1_CORE0</td>
7189 <td>c66_event_in_sync</td>
7190 <td>64</td>
7191 </tr>
7192 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7193 <td>122</td>
7194 <td>55</td>
7195 <td>J721E_DEV_C66SS1_CORE0</td>
7196 <td>c66_event_in_sync</td>
7197 <td>65</td>
7198 </tr>
7199 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7200 <td>122</td>
7201 <td>56</td>
7202 <td>J721E_DEV_C66SS1_CORE0</td>
7203 <td>c66_event_in_sync</td>
7204 <td>66</td>
7205 </tr>
7206 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7207 <td>122</td>
7208 <td>57</td>
7209 <td>J721E_DEV_C66SS1_CORE0</td>
7210 <td>c66_event_in_sync</td>
7211 <td>67</td>
7212 </tr>
7213 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7214 <td>122</td>
7215 <td>58</td>
7216 <td>J721E_DEV_C66SS1_CORE0</td>
7217 <td>c66_event_in_sync</td>
7218 <td>68</td>
7219 </tr>
7220 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7221 <td>122</td>
7222 <td>59</td>
7223 <td>J721E_DEV_C66SS1_CORE0</td>
7224 <td>c66_event_in_sync</td>
7225 <td>69</td>
7226 </tr>
7227 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7228 <td>122</td>
7229 <td>60</td>
7230 <td>J721E_DEV_C66SS1_CORE0</td>
7231 <td>c66_event_in_sync</td>
7232 <td>70</td>
7233 </tr>
7234 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7235 <td>122</td>
7236 <td>61</td>
7237 <td>J721E_DEV_C66SS1_CORE0</td>
7238 <td>c66_event_in_sync</td>
7239 <td>71</td>
7240 </tr>
7241 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7242 <td>122</td>
7243 <td>62</td>
7244 <td>J721E_DEV_C66SS1_CORE0</td>
7245 <td>c66_event_in_sync</td>
7246 <td>72</td>
7247 </tr>
7248 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7249 <td>122</td>
7250 <td>63</td>
7251 <td>J721E_DEV_C66SS1_CORE0</td>
7252 <td>c66_event_in_sync</td>
7253 <td>73</td>
7254 </tr>
7255 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7256 <td>122</td>
7257 <td>64</td>
7258 <td>J721E_DEV_C66SS1_CORE0</td>
7259 <td>c66_event_in_sync</td>
7260 <td>74</td>
7261 </tr>
7262 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7263 <td>122</td>
7264 <td>65</td>
7265 <td>J721E_DEV_C66SS1_CORE0</td>
7266 <td>c66_event_in_sync</td>
7267 <td>75</td>
7268 </tr>
7269 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7270 <td>122</td>
7271 <td>66</td>
7272 <td>J721E_DEV_C66SS1_CORE0</td>
7273 <td>c66_event_in_sync</td>
7274 <td>76</td>
7275 </tr>
7276 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7277 <td>122</td>
7278 <td>67</td>
7279 <td>J721E_DEV_C66SS1_CORE0</td>
7280 <td>c66_event_in_sync</td>
7281 <td>77</td>
7282 </tr>
7283 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7284 <td>122</td>
7285 <td>68</td>
7286 <td>J721E_DEV_C66SS1_CORE0</td>
7287 <td>c66_event_in_sync</td>
7288 <td>78</td>
7289 </tr>
7290 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7291 <td>122</td>
7292 <td>69</td>
7293 <td>J721E_DEV_C66SS1_CORE0</td>
7294 <td>c66_event_in_sync</td>
7295 <td>79</td>
7296 </tr>
7297 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7298 <td>122</td>
7299 <td>70</td>
7300 <td>J721E_DEV_C66SS1_CORE0</td>
7301 <td>c66_event_in_sync</td>
7302 <td>80</td>
7303 </tr>
7304 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7305 <td>122</td>
7306 <td>71</td>
7307 <td>J721E_DEV_C66SS1_CORE0</td>
7308 <td>c66_event_in_sync</td>
7309 <td>81</td>
7310 </tr>
7311 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7312 <td>122</td>
7313 <td>72</td>
7314 <td>J721E_DEV_C66SS1_CORE0</td>
7315 <td>c66_event_in_sync</td>
7316 <td>82</td>
7317 </tr>
7318 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7319 <td>122</td>
7320 <td>73</td>
7321 <td>J721E_DEV_C66SS1_CORE0</td>
7322 <td>c66_event_in_sync</td>
7323 <td>83</td>
7324 </tr>
7325 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7326 <td>122</td>
7327 <td>74</td>
7328 <td>J721E_DEV_C66SS1_CORE0</td>
7329 <td>c66_event_in_sync</td>
7330 <td>84</td>
7331 </tr>
7332 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7333 <td>122</td>
7334 <td>75</td>
7335 <td>J721E_DEV_C66SS1_CORE0</td>
7336 <td>c66_event_in_sync</td>
7337 <td>85</td>
7338 </tr>
7339 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7340 <td>122</td>
7341 <td>76</td>
7342 <td>J721E_DEV_C66SS1_CORE0</td>
7343 <td>c66_event_in_sync</td>
7344 <td>86</td>
7345 </tr>
7346 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7347 <td>122</td>
7348 <td>77</td>
7349 <td>J721E_DEV_C66SS1_CORE0</td>
7350 <td>c66_event_in_sync</td>
7351 <td>87</td>
7352 </tr>
7353 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7354 <td>122</td>
7355 <td>78</td>
7356 <td>J721E_DEV_C66SS1_CORE0</td>
7357 <td>c66_event_in_sync</td>
7358 <td>88</td>
7359 </tr>
7360 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7361 <td>122</td>
7362 <td>79</td>
7363 <td>J721E_DEV_C66SS1_CORE0</td>
7364 <td>c66_event_in_sync</td>
7365 <td>89</td>
7366 </tr>
7367 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7368 <td>122</td>
7369 <td>80</td>
7370 <td>J721E_DEV_C66SS1_CORE0</td>
7371 <td>c66_event_in_sync</td>
7372 <td>90</td>
7373 </tr>
7374 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7375 <td>122</td>
7376 <td>81</td>
7377 <td>J721E_DEV_C66SS1_CORE0</td>
7378 <td>c66_event_in_sync</td>
7379 <td>91</td>
7380 </tr>
7381 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7382 <td>122</td>
7383 <td>82</td>
7384 <td>J721E_DEV_C66SS1_CORE0</td>
7385 <td>c66_event_in_sync</td>
7386 <td>92</td>
7387 </tr>
7388 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7389 <td>122</td>
7390 <td>83</td>
7391 <td>J721E_DEV_C66SS1_CORE0</td>
7392 <td>c66_event_in_sync</td>
7393 <td>93</td>
7394 </tr>
7395 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7396 <td>122</td>
7397 <td>84</td>
7398 <td>J721E_DEV_C66SS1_CORE0</td>
7399 <td>c66_event_in_sync</td>
7400 <td>94</td>
7401 </tr>
7402 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7403 <td>122</td>
7404 <td>85</td>
7405 <td>J721E_DEV_C66SS1_CORE0</td>
7406 <td>c66_event_in_sync</td>
7407 <td>95</td>
7408 </tr>
7409 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7410 <td>122</td>
7411 <td>86</td>
7412 <td>J721E_DEV_C66SS1_CORE0</td>
7413 <td>c66_event_in_sync</td>
7414 <td>99</td>
7415 </tr>
7416 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7417 <td>122</td>
7418 <td>87</td>
7419 <td>J721E_DEV_C66SS1_CORE0</td>
7420 <td>c66_event_in_sync</td>
7421 <td>102</td>
7422 </tr>
7423 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7424 <td>122</td>
7425 <td>88</td>
7426 <td>J721E_DEV_C66SS1_CORE0</td>
7427 <td>c66_event_in_sync</td>
7428 <td>103</td>
7429 </tr>
7430 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7431 <td>122</td>
7432 <td>89</td>
7433 <td>J721E_DEV_C66SS1_CORE0</td>
7434 <td>c66_event_in_sync</td>
7435 <td>104</td>
7436 </tr>
7437 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7438 <td>122</td>
7439 <td>90</td>
7440 <td>J721E_DEV_C66SS1_CORE0</td>
7441 <td>c66_event_in_sync</td>
7442 <td>105</td>
7443 </tr>
7444 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7445 <td>122</td>
7446 <td>91</td>
7447 <td>J721E_DEV_C66SS1_CORE0</td>
7448 <td>c66_event_in_sync</td>
7449 <td>106</td>
7450 </tr>
7451 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7452 <td>122</td>
7453 <td>92</td>
7454 <td>J721E_DEV_C66SS1_CORE0</td>
7455 <td>c66_event_in_sync</td>
7456 <td>107</td>
7457 </tr>
7458 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7459 <td>122</td>
7460 <td>93</td>
7461 <td>J721E_DEV_C66SS1_CORE0</td>
7462 <td>c66_event_in_sync</td>
7463 <td>108</td>
7464 </tr>
7465 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7466 <td>122</td>
7467 <td>94</td>
7468 <td>J721E_DEV_C66SS1_CORE0</td>
7469 <td>c66_event_in_sync</td>
7470 <td>109</td>
7471 </tr>
7472 <tr class="row-odd"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7473 <td>122</td>
7474 <td>95</td>
7475 <td>J721E_DEV_C66SS1_CORE0</td>
7476 <td>c66_event_in_sync</td>
7477 <td>114</td>
7478 </tr>
7479 <tr class="row-even"><td>J721E_DEV_C66SS1_INTROUTER0</td>
7480 <td>122</td>
7481 <td>96</td>
7482 <td>J721E_DEV_C66SS1_CORE0</td>
7483 <td>c66_event_in_sync</td>
7484 <td>115</td>
7485 </tr>
7486 </tbody>
7487 </table>
7488 </div>
7489 <div class="section" id="cmpevent-intrtr0-interrupt-router-input-sources">
7490 <span id="pub-soc-j721e-cmpevent-intrtr0-input-src-list"></span><h2>CMPEVENT_INTRTR0 Interrupt Router Input Sources<a class="headerlink" href="#cmpevent-intrtr0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
7491 <div class="admonition warning">
7492 <p class="first admonition-title">Warning</p>
7493 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
7494 host within the RM Board Configuration resource assignment array.  The RM
7495 Board Configuration is rejected if an overlap with a reserved resource is
7496 detected.</p>
7497 </div>
7498 <table border="1" class="docutils">
7499 <colgroup>
7500 <col width="23%" />
7501 <col width="13%" />
7502 <col width="15%" />
7503 <col width="18%" />
7504 <col width="19%" />
7505 <col width="13%" />
7506 </colgroup>
7507 <thead valign="bottom">
7508 <tr class="row-odd"><th class="head">IR Name</th>
7509 <th class="head">IR Device ID</th>
7510 <th class="head">IR Input Index</th>
7511 <th class="head">Source Name</th>
7512 <th class="head">Source Interface</th>
7513 <th class="head">Source Index</th>
7514 </tr>
7515 </thead>
7516 <tbody valign="top">
7517 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7518 <td>123</td>
7519 <td>0</td>
7520 <td>Not Connected</td>
7521 <td>&#160;</td>
7522 <td>&#160;</td>
7523 </tr>
7524 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7525 <td>123</td>
7526 <td>1</td>
7527 <td>Not Connected</td>
7528 <td>&#160;</td>
7529 <td>&#160;</td>
7530 </tr>
7531 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7532 <td>123</td>
7533 <td>2</td>
7534 <td>Not Connected</td>
7535 <td>&#160;</td>
7536 <td>&#160;</td>
7537 </tr>
7538 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7539 <td>123</td>
7540 <td>3</td>
7541 <td>Not Connected</td>
7542 <td>&#160;</td>
7543 <td>&#160;</td>
7544 </tr>
7545 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7546 <td>123</td>
7547 <td>4</td>
7548 <td>J721E_DEV_PCIE0</td>
7549 <td>pcie_cpts_comp</td>
7550 <td>0</td>
7551 </tr>
7552 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7553 <td>123</td>
7554 <td>5</td>
7555 <td>J721E_DEV_PCIE1</td>
7556 <td>pcie_cpts_comp</td>
7557 <td>0</td>
7558 </tr>
7559 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7560 <td>123</td>
7561 <td>6</td>
7562 <td>J721E_DEV_PCIE2</td>
7563 <td>pcie_cpts_comp</td>
7564 <td>0</td>
7565 </tr>
7566 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7567 <td>123</td>
7568 <td>7</td>
7569 <td>J721E_DEV_PCIE3</td>
7570 <td>pcie_cpts_comp</td>
7571 <td>0</td>
7572 </tr>
7573 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7574 <td>123</td>
7575 <td>8</td>
7576 <td>J721E_DEV_NAVSS0</td>
7577 <td>cpts0_comp</td>
7578 <td>0</td>
7579 </tr>
7580 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7581 <td>123</td>
7582 <td>9</td>
7583 <td>J721E_DEV_CPSW0</td>
7584 <td>cpts_comp</td>
7585 <td>0</td>
7586 </tr>
7587 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7588 <td>123</td>
7589 <td>10</td>
7590 <td>J721E_DEV_MCU_CPSW0</td>
7591 <td>cpts_comp</td>
7592 <td>0</td>
7593 </tr>
7594 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7595 <td>123</td>
7596 <td>11</td>
7597 <td>Not Connected</td>
7598 <td>&#160;</td>
7599 <td>&#160;</td>
7600 </tr>
7601 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7602 <td>123</td>
7603 <td>12</td>
7604 <td>Not Connected</td>
7605 <td>&#160;</td>
7606 <td>&#160;</td>
7607 </tr>
7608 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7609 <td>123</td>
7610 <td>13</td>
7611 <td>Not Connected</td>
7612 <td>&#160;</td>
7613 <td>&#160;</td>
7614 </tr>
7615 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7616 <td>123</td>
7617 <td>14</td>
7618 <td>Not Connected</td>
7619 <td>&#160;</td>
7620 <td>&#160;</td>
7621 </tr>
7622 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7623 <td>123</td>
7624 <td>15</td>
7625 <td>Not Connected</td>
7626 <td>&#160;</td>
7627 <td>&#160;</td>
7628 </tr>
7629 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7630 <td>123</td>
7631 <td>16</td>
7632 <td>J721E_DEV_PRU_ICSSG0</td>
7633 <td>pr1_host_intr_req</td>
7634 <td>0</td>
7635 </tr>
7636 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7637 <td>123</td>
7638 <td>17</td>
7639 <td>J721E_DEV_PRU_ICSSG0</td>
7640 <td>pr1_host_intr_req</td>
7641 <td>1</td>
7642 </tr>
7643 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7644 <td>123</td>
7645 <td>18</td>
7646 <td>J721E_DEV_PRU_ICSSG0</td>
7647 <td>pr1_host_intr_req</td>
7648 <td>2</td>
7649 </tr>
7650 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7651 <td>123</td>
7652 <td>19</td>
7653 <td>J721E_DEV_PRU_ICSSG0</td>
7654 <td>pr1_host_intr_req</td>
7655 <td>3</td>
7656 </tr>
7657 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7658 <td>123</td>
7659 <td>20</td>
7660 <td>J721E_DEV_PRU_ICSSG0</td>
7661 <td>pr1_host_intr_req</td>
7662 <td>4</td>
7663 </tr>
7664 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7665 <td>123</td>
7666 <td>21</td>
7667 <td>J721E_DEV_PRU_ICSSG0</td>
7668 <td>pr1_host_intr_req</td>
7669 <td>5</td>
7670 </tr>
7671 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7672 <td>123</td>
7673 <td>22</td>
7674 <td>J721E_DEV_PRU_ICSSG0</td>
7675 <td>pr1_host_intr_req</td>
7676 <td>6</td>
7677 </tr>
7678 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7679 <td>123</td>
7680 <td>23</td>
7681 <td>J721E_DEV_PRU_ICSSG0</td>
7682 <td>pr1_host_intr_req</td>
7683 <td>7</td>
7684 </tr>
7685 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7686 <td>123</td>
7687 <td>24</td>
7688 <td>J721E_DEV_PRU_ICSSG1</td>
7689 <td>pr1_host_intr_req</td>
7690 <td>0</td>
7691 </tr>
7692 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7693 <td>123</td>
7694 <td>25</td>
7695 <td>J721E_DEV_PRU_ICSSG1</td>
7696 <td>pr1_host_intr_req</td>
7697 <td>1</td>
7698 </tr>
7699 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7700 <td>123</td>
7701 <td>26</td>
7702 <td>J721E_DEV_PRU_ICSSG1</td>
7703 <td>pr1_host_intr_req</td>
7704 <td>2</td>
7705 </tr>
7706 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7707 <td>123</td>
7708 <td>27</td>
7709 <td>J721E_DEV_PRU_ICSSG1</td>
7710 <td>pr1_host_intr_req</td>
7711 <td>3</td>
7712 </tr>
7713 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7714 <td>123</td>
7715 <td>28</td>
7716 <td>J721E_DEV_PRU_ICSSG1</td>
7717 <td>pr1_host_intr_req</td>
7718 <td>4</td>
7719 </tr>
7720 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7721 <td>123</td>
7722 <td>29</td>
7723 <td>J721E_DEV_PRU_ICSSG1</td>
7724 <td>pr1_host_intr_req</td>
7725 <td>5</td>
7726 </tr>
7727 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7728 <td>123</td>
7729 <td>30</td>
7730 <td>J721E_DEV_PRU_ICSSG1</td>
7731 <td>pr1_host_intr_req</td>
7732 <td>6</td>
7733 </tr>
7734 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7735 <td>123</td>
7736 <td>31</td>
7737 <td>J721E_DEV_PRU_ICSSG1</td>
7738 <td>pr1_host_intr_req</td>
7739 <td>7</td>
7740 </tr>
7741 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7742 <td>123</td>
7743 <td>32</td>
7744 <td>J721E_DEV_PRU_ICSSG0</td>
7745 <td>pr1_iep0_cmp_intr_req</td>
7746 <td>0</td>
7747 </tr>
7748 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7749 <td>123</td>
7750 <td>33</td>
7751 <td>J721E_DEV_PRU_ICSSG0</td>
7752 <td>pr1_iep0_cmp_intr_req</td>
7753 <td>1</td>
7754 </tr>
7755 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7756 <td>123</td>
7757 <td>34</td>
7758 <td>J721E_DEV_PRU_ICSSG0</td>
7759 <td>pr1_iep0_cmp_intr_req</td>
7760 <td>2</td>
7761 </tr>
7762 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7763 <td>123</td>
7764 <td>35</td>
7765 <td>J721E_DEV_PRU_ICSSG0</td>
7766 <td>pr1_iep0_cmp_intr_req</td>
7767 <td>3</td>
7768 </tr>
7769 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7770 <td>123</td>
7771 <td>36</td>
7772 <td>J721E_DEV_PRU_ICSSG0</td>
7773 <td>pr1_iep0_cmp_intr_req</td>
7774 <td>4</td>
7775 </tr>
7776 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7777 <td>123</td>
7778 <td>37</td>
7779 <td>J721E_DEV_PRU_ICSSG0</td>
7780 <td>pr1_iep0_cmp_intr_req</td>
7781 <td>5</td>
7782 </tr>
7783 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7784 <td>123</td>
7785 <td>38</td>
7786 <td>J721E_DEV_PRU_ICSSG0</td>
7787 <td>pr1_iep0_cmp_intr_req</td>
7788 <td>6</td>
7789 </tr>
7790 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7791 <td>123</td>
7792 <td>39</td>
7793 <td>J721E_DEV_PRU_ICSSG0</td>
7794 <td>pr1_iep0_cmp_intr_req</td>
7795 <td>7</td>
7796 </tr>
7797 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7798 <td>123</td>
7799 <td>40</td>
7800 <td>J721E_DEV_PRU_ICSSG0</td>
7801 <td>pr1_iep0_cmp_intr_req</td>
7802 <td>8</td>
7803 </tr>
7804 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7805 <td>123</td>
7806 <td>41</td>
7807 <td>J721E_DEV_PRU_ICSSG0</td>
7808 <td>pr1_iep0_cmp_intr_req</td>
7809 <td>9</td>
7810 </tr>
7811 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7812 <td>123</td>
7813 <td>42</td>
7814 <td>J721E_DEV_PRU_ICSSG0</td>
7815 <td>pr1_iep0_cmp_intr_req</td>
7816 <td>10</td>
7817 </tr>
7818 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7819 <td>123</td>
7820 <td>43</td>
7821 <td>J721E_DEV_PRU_ICSSG0</td>
7822 <td>pr1_iep0_cmp_intr_req</td>
7823 <td>11</td>
7824 </tr>
7825 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7826 <td>123</td>
7827 <td>44</td>
7828 <td>J721E_DEV_PRU_ICSSG0</td>
7829 <td>pr1_iep0_cmp_intr_req</td>
7830 <td>12</td>
7831 </tr>
7832 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7833 <td>123</td>
7834 <td>45</td>
7835 <td>J721E_DEV_PRU_ICSSG0</td>
7836 <td>pr1_iep0_cmp_intr_req</td>
7837 <td>13</td>
7838 </tr>
7839 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7840 <td>123</td>
7841 <td>46</td>
7842 <td>J721E_DEV_PRU_ICSSG0</td>
7843 <td>pr1_iep0_cmp_intr_req</td>
7844 <td>14</td>
7845 </tr>
7846 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7847 <td>123</td>
7848 <td>47</td>
7849 <td>J721E_DEV_PRU_ICSSG0</td>
7850 <td>pr1_iep0_cmp_intr_req</td>
7851 <td>15</td>
7852 </tr>
7853 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7854 <td>123</td>
7855 <td>48</td>
7856 <td>J721E_DEV_PRU_ICSSG0</td>
7857 <td>pr1_iep1_cmp_intr_req</td>
7858 <td>0</td>
7859 </tr>
7860 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7861 <td>123</td>
7862 <td>49</td>
7863 <td>J721E_DEV_PRU_ICSSG0</td>
7864 <td>pr1_iep1_cmp_intr_req</td>
7865 <td>1</td>
7866 </tr>
7867 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7868 <td>123</td>
7869 <td>50</td>
7870 <td>J721E_DEV_PRU_ICSSG0</td>
7871 <td>pr1_iep1_cmp_intr_req</td>
7872 <td>2</td>
7873 </tr>
7874 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7875 <td>123</td>
7876 <td>51</td>
7877 <td>J721E_DEV_PRU_ICSSG0</td>
7878 <td>pr1_iep1_cmp_intr_req</td>
7879 <td>3</td>
7880 </tr>
7881 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7882 <td>123</td>
7883 <td>52</td>
7884 <td>J721E_DEV_PRU_ICSSG0</td>
7885 <td>pr1_iep1_cmp_intr_req</td>
7886 <td>4</td>
7887 </tr>
7888 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7889 <td>123</td>
7890 <td>53</td>
7891 <td>J721E_DEV_PRU_ICSSG0</td>
7892 <td>pr1_iep1_cmp_intr_req</td>
7893 <td>5</td>
7894 </tr>
7895 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7896 <td>123</td>
7897 <td>54</td>
7898 <td>J721E_DEV_PRU_ICSSG0</td>
7899 <td>pr1_iep1_cmp_intr_req</td>
7900 <td>6</td>
7901 </tr>
7902 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7903 <td>123</td>
7904 <td>55</td>
7905 <td>J721E_DEV_PRU_ICSSG0</td>
7906 <td>pr1_iep1_cmp_intr_req</td>
7907 <td>7</td>
7908 </tr>
7909 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7910 <td>123</td>
7911 <td>56</td>
7912 <td>J721E_DEV_PRU_ICSSG0</td>
7913 <td>pr1_iep1_cmp_intr_req</td>
7914 <td>8</td>
7915 </tr>
7916 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7917 <td>123</td>
7918 <td>57</td>
7919 <td>J721E_DEV_PRU_ICSSG0</td>
7920 <td>pr1_iep1_cmp_intr_req</td>
7921 <td>9</td>
7922 </tr>
7923 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7924 <td>123</td>
7925 <td>58</td>
7926 <td>J721E_DEV_PRU_ICSSG0</td>
7927 <td>pr1_iep1_cmp_intr_req</td>
7928 <td>10</td>
7929 </tr>
7930 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7931 <td>123</td>
7932 <td>59</td>
7933 <td>J721E_DEV_PRU_ICSSG0</td>
7934 <td>pr1_iep1_cmp_intr_req</td>
7935 <td>11</td>
7936 </tr>
7937 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7938 <td>123</td>
7939 <td>60</td>
7940 <td>J721E_DEV_PRU_ICSSG0</td>
7941 <td>pr1_iep1_cmp_intr_req</td>
7942 <td>12</td>
7943 </tr>
7944 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7945 <td>123</td>
7946 <td>61</td>
7947 <td>J721E_DEV_PRU_ICSSG0</td>
7948 <td>pr1_iep1_cmp_intr_req</td>
7949 <td>13</td>
7950 </tr>
7951 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7952 <td>123</td>
7953 <td>62</td>
7954 <td>J721E_DEV_PRU_ICSSG0</td>
7955 <td>pr1_iep1_cmp_intr_req</td>
7956 <td>14</td>
7957 </tr>
7958 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7959 <td>123</td>
7960 <td>63</td>
7961 <td>J721E_DEV_PRU_ICSSG0</td>
7962 <td>pr1_iep1_cmp_intr_req</td>
7963 <td>15</td>
7964 </tr>
7965 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7966 <td>123</td>
7967 <td>64</td>
7968 <td>J721E_DEV_PRU_ICSSG1</td>
7969 <td>pr1_iep0_cmp_intr_req</td>
7970 <td>0</td>
7971 </tr>
7972 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7973 <td>123</td>
7974 <td>65</td>
7975 <td>J721E_DEV_PRU_ICSSG1</td>
7976 <td>pr1_iep0_cmp_intr_req</td>
7977 <td>1</td>
7978 </tr>
7979 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7980 <td>123</td>
7981 <td>66</td>
7982 <td>J721E_DEV_PRU_ICSSG1</td>
7983 <td>pr1_iep0_cmp_intr_req</td>
7984 <td>2</td>
7985 </tr>
7986 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7987 <td>123</td>
7988 <td>67</td>
7989 <td>J721E_DEV_PRU_ICSSG1</td>
7990 <td>pr1_iep0_cmp_intr_req</td>
7991 <td>3</td>
7992 </tr>
7993 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
7994 <td>123</td>
7995 <td>68</td>
7996 <td>J721E_DEV_PRU_ICSSG1</td>
7997 <td>pr1_iep0_cmp_intr_req</td>
7998 <td>4</td>
7999 </tr>
8000 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8001 <td>123</td>
8002 <td>69</td>
8003 <td>J721E_DEV_PRU_ICSSG1</td>
8004 <td>pr1_iep0_cmp_intr_req</td>
8005 <td>5</td>
8006 </tr>
8007 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8008 <td>123</td>
8009 <td>70</td>
8010 <td>J721E_DEV_PRU_ICSSG1</td>
8011 <td>pr1_iep0_cmp_intr_req</td>
8012 <td>6</td>
8013 </tr>
8014 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8015 <td>123</td>
8016 <td>71</td>
8017 <td>J721E_DEV_PRU_ICSSG1</td>
8018 <td>pr1_iep0_cmp_intr_req</td>
8019 <td>7</td>
8020 </tr>
8021 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8022 <td>123</td>
8023 <td>72</td>
8024 <td>J721E_DEV_PRU_ICSSG1</td>
8025 <td>pr1_iep0_cmp_intr_req</td>
8026 <td>8</td>
8027 </tr>
8028 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8029 <td>123</td>
8030 <td>73</td>
8031 <td>J721E_DEV_PRU_ICSSG1</td>
8032 <td>pr1_iep0_cmp_intr_req</td>
8033 <td>9</td>
8034 </tr>
8035 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8036 <td>123</td>
8037 <td>74</td>
8038 <td>J721E_DEV_PRU_ICSSG1</td>
8039 <td>pr1_iep0_cmp_intr_req</td>
8040 <td>10</td>
8041 </tr>
8042 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8043 <td>123</td>
8044 <td>75</td>
8045 <td>J721E_DEV_PRU_ICSSG1</td>
8046 <td>pr1_iep0_cmp_intr_req</td>
8047 <td>11</td>
8048 </tr>
8049 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8050 <td>123</td>
8051 <td>76</td>
8052 <td>J721E_DEV_PRU_ICSSG1</td>
8053 <td>pr1_iep0_cmp_intr_req</td>
8054 <td>12</td>
8055 </tr>
8056 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8057 <td>123</td>
8058 <td>77</td>
8059 <td>J721E_DEV_PRU_ICSSG1</td>
8060 <td>pr1_iep0_cmp_intr_req</td>
8061 <td>13</td>
8062 </tr>
8063 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8064 <td>123</td>
8065 <td>78</td>
8066 <td>J721E_DEV_PRU_ICSSG1</td>
8067 <td>pr1_iep0_cmp_intr_req</td>
8068 <td>14</td>
8069 </tr>
8070 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8071 <td>123</td>
8072 <td>79</td>
8073 <td>J721E_DEV_PRU_ICSSG1</td>
8074 <td>pr1_iep0_cmp_intr_req</td>
8075 <td>15</td>
8076 </tr>
8077 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8078 <td>123</td>
8079 <td>80</td>
8080 <td>J721E_DEV_PRU_ICSSG1</td>
8081 <td>pr1_iep1_cmp_intr_req</td>
8082 <td>0</td>
8083 </tr>
8084 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8085 <td>123</td>
8086 <td>81</td>
8087 <td>J721E_DEV_PRU_ICSSG1</td>
8088 <td>pr1_iep1_cmp_intr_req</td>
8089 <td>1</td>
8090 </tr>
8091 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8092 <td>123</td>
8093 <td>82</td>
8094 <td>J721E_DEV_PRU_ICSSG1</td>
8095 <td>pr1_iep1_cmp_intr_req</td>
8096 <td>2</td>
8097 </tr>
8098 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8099 <td>123</td>
8100 <td>83</td>
8101 <td>J721E_DEV_PRU_ICSSG1</td>
8102 <td>pr1_iep1_cmp_intr_req</td>
8103 <td>3</td>
8104 </tr>
8105 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8106 <td>123</td>
8107 <td>84</td>
8108 <td>J721E_DEV_PRU_ICSSG1</td>
8109 <td>pr1_iep1_cmp_intr_req</td>
8110 <td>4</td>
8111 </tr>
8112 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8113 <td>123</td>
8114 <td>85</td>
8115 <td>J721E_DEV_PRU_ICSSG1</td>
8116 <td>pr1_iep1_cmp_intr_req</td>
8117 <td>5</td>
8118 </tr>
8119 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8120 <td>123</td>
8121 <td>86</td>
8122 <td>J721E_DEV_PRU_ICSSG1</td>
8123 <td>pr1_iep1_cmp_intr_req</td>
8124 <td>6</td>
8125 </tr>
8126 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8127 <td>123</td>
8128 <td>87</td>
8129 <td>J721E_DEV_PRU_ICSSG1</td>
8130 <td>pr1_iep1_cmp_intr_req</td>
8131 <td>7</td>
8132 </tr>
8133 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8134 <td>123</td>
8135 <td>88</td>
8136 <td>J721E_DEV_PRU_ICSSG1</td>
8137 <td>pr1_iep1_cmp_intr_req</td>
8138 <td>8</td>
8139 </tr>
8140 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8141 <td>123</td>
8142 <td>89</td>
8143 <td>J721E_DEV_PRU_ICSSG1</td>
8144 <td>pr1_iep1_cmp_intr_req</td>
8145 <td>9</td>
8146 </tr>
8147 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8148 <td>123</td>
8149 <td>90</td>
8150 <td>J721E_DEV_PRU_ICSSG1</td>
8151 <td>pr1_iep1_cmp_intr_req</td>
8152 <td>10</td>
8153 </tr>
8154 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8155 <td>123</td>
8156 <td>91</td>
8157 <td>J721E_DEV_PRU_ICSSG1</td>
8158 <td>pr1_iep1_cmp_intr_req</td>
8159 <td>11</td>
8160 </tr>
8161 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8162 <td>123</td>
8163 <td>92</td>
8164 <td>J721E_DEV_PRU_ICSSG1</td>
8165 <td>pr1_iep1_cmp_intr_req</td>
8166 <td>12</td>
8167 </tr>
8168 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8169 <td>123</td>
8170 <td>93</td>
8171 <td>J721E_DEV_PRU_ICSSG1</td>
8172 <td>pr1_iep1_cmp_intr_req</td>
8173 <td>13</td>
8174 </tr>
8175 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8176 <td>123</td>
8177 <td>94</td>
8178 <td>J721E_DEV_PRU_ICSSG1</td>
8179 <td>pr1_iep1_cmp_intr_req</td>
8180 <td>14</td>
8181 </tr>
8182 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8183 <td>123</td>
8184 <td>95</td>
8185 <td>J721E_DEV_PRU_ICSSG1</td>
8186 <td>pr1_iep1_cmp_intr_req</td>
8187 <td>15</td>
8188 </tr>
8189 </tbody>
8190 </table>
8191 </div>
8192 <div class="section" id="cmpevent-intrtr0-interrupt-router-output-destinations">
8193 <span id="pub-soc-j721e-cmpevent-intrtr0-output-src-list"></span><h2>CMPEVENT_INTRTR0 Interrupt Router Output Destinations<a class="headerlink" href="#cmpevent-intrtr0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
8194 <div class="admonition warning">
8195 <p class="first admonition-title">Warning</p>
8196 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
8197 host within the RM Board Configuration resource assignment array.  The RM
8198 Board Configuration is rejected if an overlap with a reserved resource is
8199 detected.</p>
8200 </div>
8201 <table border="1" class="docutils">
8202 <colgroup>
8203 <col width="19%" />
8204 <col width="11%" />
8205 <col width="13%" />
8206 <col width="25%" />
8207 <col width="17%" />
8208 <col width="14%" />
8209 </colgroup>
8210 <thead valign="bottom">
8211 <tr class="row-odd"><th class="head">IR Name</th>
8212 <th class="head">IR Device ID</th>
8213 <th class="head">IR Output Index</th>
8214 <th class="head">Destination Name</th>
8215 <th class="head">Destination Interface</th>
8216 <th class="head">Destination Index</th>
8217 </tr>
8218 </thead>
8219 <tbody valign="top">
8220 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8221 <td>123</td>
8222 <td>0</td>
8223 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8224 <td>soc_events_in</td>
8225 <td>544</td>
8226 </tr>
8227 <tr class="row-odd"><td>&#160;</td>
8228 <td>&#160;</td>
8229 <td>&#160;</td>
8230 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8231 <td>spi</td>
8232 <td>544</td>
8233 </tr>
8234 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8235 <td>123</td>
8236 <td>0</td>
8237 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8238 <td>in</td>
8239 <td>288</td>
8240 </tr>
8241 <tr class="row-odd"><td>&#160;</td>
8242 <td>&#160;</td>
8243 <td>&#160;</td>
8244 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8245 <td>in</td>
8246 <td>288</td>
8247 </tr>
8248 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8249 <td>123</td>
8250 <td>1</td>
8251 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8252 <td>soc_events_in</td>
8253 <td>545</td>
8254 </tr>
8255 <tr class="row-odd"><td>&#160;</td>
8256 <td>&#160;</td>
8257 <td>&#160;</td>
8258 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8259 <td>spi</td>
8260 <td>545</td>
8261 </tr>
8262 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8263 <td>123</td>
8264 <td>1</td>
8265 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8266 <td>in</td>
8267 <td>289</td>
8268 </tr>
8269 <tr class="row-odd"><td>&#160;</td>
8270 <td>&#160;</td>
8271 <td>&#160;</td>
8272 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8273 <td>in</td>
8274 <td>289</td>
8275 </tr>
8276 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8277 <td>123</td>
8278 <td>2</td>
8279 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8280 <td>soc_events_in</td>
8281 <td>546</td>
8282 </tr>
8283 <tr class="row-odd"><td>&#160;</td>
8284 <td>&#160;</td>
8285 <td>&#160;</td>
8286 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8287 <td>spi</td>
8288 <td>546</td>
8289 </tr>
8290 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8291 <td>123</td>
8292 <td>2</td>
8293 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8294 <td>in</td>
8295 <td>290</td>
8296 </tr>
8297 <tr class="row-odd"><td>&#160;</td>
8298 <td>&#160;</td>
8299 <td>&#160;</td>
8300 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8301 <td>in</td>
8302 <td>290</td>
8303 </tr>
8304 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8305 <td>123</td>
8306 <td>3</td>
8307 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8308 <td>soc_events_in</td>
8309 <td>547</td>
8310 </tr>
8311 <tr class="row-odd"><td>&#160;</td>
8312 <td>&#160;</td>
8313 <td>&#160;</td>
8314 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8315 <td>spi</td>
8316 <td>547</td>
8317 </tr>
8318 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8319 <td>123</td>
8320 <td>3</td>
8321 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8322 <td>in</td>
8323 <td>291</td>
8324 </tr>
8325 <tr class="row-odd"><td>&#160;</td>
8326 <td>&#160;</td>
8327 <td>&#160;</td>
8328 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8329 <td>in</td>
8330 <td>291</td>
8331 </tr>
8332 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8333 <td>123</td>
8334 <td>4</td>
8335 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8336 <td>soc_events_in</td>
8337 <td>548</td>
8338 </tr>
8339 <tr class="row-odd"><td>&#160;</td>
8340 <td>&#160;</td>
8341 <td>&#160;</td>
8342 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8343 <td>spi</td>
8344 <td>548</td>
8345 </tr>
8346 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8347 <td>123</td>
8348 <td>4</td>
8349 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8350 <td>in</td>
8351 <td>292</td>
8352 </tr>
8353 <tr class="row-odd"><td>&#160;</td>
8354 <td>&#160;</td>
8355 <td>&#160;</td>
8356 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8357 <td>in</td>
8358 <td>292</td>
8359 </tr>
8360 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8361 <td>123</td>
8362 <td>5</td>
8363 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8364 <td>soc_events_in</td>
8365 <td>549</td>
8366 </tr>
8367 <tr class="row-odd"><td>&#160;</td>
8368 <td>&#160;</td>
8369 <td>&#160;</td>
8370 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8371 <td>spi</td>
8372 <td>549</td>
8373 </tr>
8374 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8375 <td>123</td>
8376 <td>5</td>
8377 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8378 <td>in</td>
8379 <td>293</td>
8380 </tr>
8381 <tr class="row-odd"><td>&#160;</td>
8382 <td>&#160;</td>
8383 <td>&#160;</td>
8384 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8385 <td>in</td>
8386 <td>293</td>
8387 </tr>
8388 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8389 <td>123</td>
8390 <td>6</td>
8391 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8392 <td>soc_events_in</td>
8393 <td>550</td>
8394 </tr>
8395 <tr class="row-odd"><td>&#160;</td>
8396 <td>&#160;</td>
8397 <td>&#160;</td>
8398 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8399 <td>spi</td>
8400 <td>550</td>
8401 </tr>
8402 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8403 <td>123</td>
8404 <td>6</td>
8405 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8406 <td>in</td>
8407 <td>294</td>
8408 </tr>
8409 <tr class="row-odd"><td>&#160;</td>
8410 <td>&#160;</td>
8411 <td>&#160;</td>
8412 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8413 <td>in</td>
8414 <td>294</td>
8415 </tr>
8416 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8417 <td>123</td>
8418 <td>7</td>
8419 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8420 <td>soc_events_in</td>
8421 <td>551</td>
8422 </tr>
8423 <tr class="row-odd"><td>&#160;</td>
8424 <td>&#160;</td>
8425 <td>&#160;</td>
8426 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8427 <td>spi</td>
8428 <td>551</td>
8429 </tr>
8430 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8431 <td>123</td>
8432 <td>7</td>
8433 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8434 <td>in</td>
8435 <td>295</td>
8436 </tr>
8437 <tr class="row-odd"><td>&#160;</td>
8438 <td>&#160;</td>
8439 <td>&#160;</td>
8440 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8441 <td>in</td>
8442 <td>295</td>
8443 </tr>
8444 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8445 <td>123</td>
8446 <td>8</td>
8447 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8448 <td>soc_events_in</td>
8449 <td>552</td>
8450 </tr>
8451 <tr class="row-odd"><td>&#160;</td>
8452 <td>&#160;</td>
8453 <td>&#160;</td>
8454 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8455 <td>spi</td>
8456 <td>552</td>
8457 </tr>
8458 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8459 <td>123</td>
8460 <td>8</td>
8461 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8462 <td>in</td>
8463 <td>296</td>
8464 </tr>
8465 <tr class="row-odd"><td>&#160;</td>
8466 <td>&#160;</td>
8467 <td>&#160;</td>
8468 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8469 <td>in</td>
8470 <td>296</td>
8471 </tr>
8472 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8473 <td>123</td>
8474 <td>9</td>
8475 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8476 <td>soc_events_in</td>
8477 <td>553</td>
8478 </tr>
8479 <tr class="row-odd"><td>&#160;</td>
8480 <td>&#160;</td>
8481 <td>&#160;</td>
8482 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8483 <td>spi</td>
8484 <td>553</td>
8485 </tr>
8486 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8487 <td>123</td>
8488 <td>9</td>
8489 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8490 <td>in</td>
8491 <td>297</td>
8492 </tr>
8493 <tr class="row-odd"><td>&#160;</td>
8494 <td>&#160;</td>
8495 <td>&#160;</td>
8496 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8497 <td>in</td>
8498 <td>297</td>
8499 </tr>
8500 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8501 <td>123</td>
8502 <td>10</td>
8503 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8504 <td>soc_events_in</td>
8505 <td>554</td>
8506 </tr>
8507 <tr class="row-odd"><td>&#160;</td>
8508 <td>&#160;</td>
8509 <td>&#160;</td>
8510 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8511 <td>spi</td>
8512 <td>554</td>
8513 </tr>
8514 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8515 <td>123</td>
8516 <td>10</td>
8517 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8518 <td>in</td>
8519 <td>298</td>
8520 </tr>
8521 <tr class="row-odd"><td>&#160;</td>
8522 <td>&#160;</td>
8523 <td>&#160;</td>
8524 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8525 <td>in</td>
8526 <td>298</td>
8527 </tr>
8528 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8529 <td>123</td>
8530 <td>11</td>
8531 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8532 <td>soc_events_in</td>
8533 <td>555</td>
8534 </tr>
8535 <tr class="row-odd"><td>&#160;</td>
8536 <td>&#160;</td>
8537 <td>&#160;</td>
8538 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8539 <td>spi</td>
8540 <td>555</td>
8541 </tr>
8542 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8543 <td>123</td>
8544 <td>11</td>
8545 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8546 <td>in</td>
8547 <td>299</td>
8548 </tr>
8549 <tr class="row-odd"><td>&#160;</td>
8550 <td>&#160;</td>
8551 <td>&#160;</td>
8552 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8553 <td>in</td>
8554 <td>299</td>
8555 </tr>
8556 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8557 <td>123</td>
8558 <td>12</td>
8559 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8560 <td>soc_events_in</td>
8561 <td>556</td>
8562 </tr>
8563 <tr class="row-odd"><td>&#160;</td>
8564 <td>&#160;</td>
8565 <td>&#160;</td>
8566 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8567 <td>spi</td>
8568 <td>556</td>
8569 </tr>
8570 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8571 <td>123</td>
8572 <td>12</td>
8573 <td>J721E_DEV_C66SS0_INTROUTER0</td>
8574 <td>in</td>
8575 <td>344</td>
8576 </tr>
8577 <tr class="row-odd"><td>&#160;</td>
8578 <td>&#160;</td>
8579 <td>&#160;</td>
8580 <td>J721E_DEV_C66SS1_INTROUTER0</td>
8581 <td>in</td>
8582 <td>344</td>
8583 </tr>
8584 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8585 <td>123</td>
8586 <td>12</td>
8587 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8588 <td>in</td>
8589 <td>300</td>
8590 </tr>
8591 <tr class="row-odd"><td>&#160;</td>
8592 <td>&#160;</td>
8593 <td>&#160;</td>
8594 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8595 <td>in</td>
8596 <td>300</td>
8597 </tr>
8598 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8599 <td>123</td>
8600 <td>13</td>
8601 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8602 <td>soc_events_in</td>
8603 <td>557</td>
8604 </tr>
8605 <tr class="row-odd"><td>&#160;</td>
8606 <td>&#160;</td>
8607 <td>&#160;</td>
8608 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8609 <td>spi</td>
8610 <td>557</td>
8611 </tr>
8612 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8613 <td>123</td>
8614 <td>13</td>
8615 <td>J721E_DEV_C66SS0_INTROUTER0</td>
8616 <td>in</td>
8617 <td>345</td>
8618 </tr>
8619 <tr class="row-odd"><td>&#160;</td>
8620 <td>&#160;</td>
8621 <td>&#160;</td>
8622 <td>J721E_DEV_C66SS1_INTROUTER0</td>
8623 <td>in</td>
8624 <td>345</td>
8625 </tr>
8626 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8627 <td>123</td>
8628 <td>13</td>
8629 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8630 <td>in</td>
8631 <td>301</td>
8632 </tr>
8633 <tr class="row-odd"><td>&#160;</td>
8634 <td>&#160;</td>
8635 <td>&#160;</td>
8636 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8637 <td>in</td>
8638 <td>301</td>
8639 </tr>
8640 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8641 <td>123</td>
8642 <td>14</td>
8643 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8644 <td>soc_events_in</td>
8645 <td>558</td>
8646 </tr>
8647 <tr class="row-odd"><td>&#160;</td>
8648 <td>&#160;</td>
8649 <td>&#160;</td>
8650 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8651 <td>spi</td>
8652 <td>558</td>
8653 </tr>
8654 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8655 <td>123</td>
8656 <td>14</td>
8657 <td>J721E_DEV_C66SS0_INTROUTER0</td>
8658 <td>in</td>
8659 <td>346</td>
8660 </tr>
8661 <tr class="row-odd"><td>&#160;</td>
8662 <td>&#160;</td>
8663 <td>&#160;</td>
8664 <td>J721E_DEV_C66SS1_INTROUTER0</td>
8665 <td>in</td>
8666 <td>346</td>
8667 </tr>
8668 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8669 <td>123</td>
8670 <td>14</td>
8671 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8672 <td>in</td>
8673 <td>302</td>
8674 </tr>
8675 <tr class="row-odd"><td>&#160;</td>
8676 <td>&#160;</td>
8677 <td>&#160;</td>
8678 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8679 <td>in</td>
8680 <td>302</td>
8681 </tr>
8682 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8683 <td>123</td>
8684 <td>15</td>
8685 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
8686 <td>soc_events_in</td>
8687 <td>559</td>
8688 </tr>
8689 <tr class="row-odd"><td>&#160;</td>
8690 <td>&#160;</td>
8691 <td>&#160;</td>
8692 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
8693 <td>spi</td>
8694 <td>559</td>
8695 </tr>
8696 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8697 <td>123</td>
8698 <td>15</td>
8699 <td>J721E_DEV_C66SS0_INTROUTER0</td>
8700 <td>in</td>
8701 <td>347</td>
8702 </tr>
8703 <tr class="row-odd"><td>&#160;</td>
8704 <td>&#160;</td>
8705 <td>&#160;</td>
8706 <td>J721E_DEV_C66SS1_INTROUTER0</td>
8707 <td>in</td>
8708 <td>347</td>
8709 </tr>
8710 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8711 <td>123</td>
8712 <td>15</td>
8713 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8714 <td>in</td>
8715 <td>303</td>
8716 </tr>
8717 <tr class="row-odd"><td>&#160;</td>
8718 <td>&#160;</td>
8719 <td>&#160;</td>
8720 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8721 <td>in</td>
8722 <td>303</td>
8723 </tr>
8724 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8725 <td>123</td>
8726 <td>16</td>
8727 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
8728 <td>in</td>
8729 <td>96</td>
8730 </tr>
8731 <tr class="row-odd"><td>&#160;</td>
8732 <td>&#160;</td>
8733 <td>&#160;</td>
8734 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8735 <td>in</td>
8736 <td>100</td>
8737 </tr>
8738 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8739 <td>123</td>
8740 <td>16</td>
8741 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8742 <td>in</td>
8743 <td>100</td>
8744 </tr>
8745 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8746 <td>123</td>
8747 <td>17</td>
8748 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
8749 <td>in</td>
8750 <td>97</td>
8751 </tr>
8752 <tr class="row-even"><td>&#160;</td>
8753 <td>&#160;</td>
8754 <td>&#160;</td>
8755 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8756 <td>in</td>
8757 <td>101</td>
8758 </tr>
8759 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8760 <td>123</td>
8761 <td>17</td>
8762 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8763 <td>in</td>
8764 <td>101</td>
8765 </tr>
8766 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8767 <td>123</td>
8768 <td>18</td>
8769 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
8770 <td>in</td>
8771 <td>98</td>
8772 </tr>
8773 <tr class="row-odd"><td>&#160;</td>
8774 <td>&#160;</td>
8775 <td>&#160;</td>
8776 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8777 <td>in</td>
8778 <td>102</td>
8779 </tr>
8780 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8781 <td>123</td>
8782 <td>18</td>
8783 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8784 <td>in</td>
8785 <td>102</td>
8786 </tr>
8787 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8788 <td>123</td>
8789 <td>19</td>
8790 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
8791 <td>in</td>
8792 <td>99</td>
8793 </tr>
8794 <tr class="row-even"><td>&#160;</td>
8795 <td>&#160;</td>
8796 <td>&#160;</td>
8797 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8798 <td>in</td>
8799 <td>103</td>
8800 </tr>
8801 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8802 <td>123</td>
8803 <td>19</td>
8804 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8805 <td>in</td>
8806 <td>103</td>
8807 </tr>
8808 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8809 <td>123</td>
8810 <td>20</td>
8811 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
8812 <td>in</td>
8813 <td>100</td>
8814 </tr>
8815 <tr class="row-odd"><td>&#160;</td>
8816 <td>&#160;</td>
8817 <td>&#160;</td>
8818 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8819 <td>in</td>
8820 <td>104</td>
8821 </tr>
8822 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8823 <td>123</td>
8824 <td>20</td>
8825 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8826 <td>in</td>
8827 <td>104</td>
8828 </tr>
8829 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8830 <td>123</td>
8831 <td>21</td>
8832 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
8833 <td>in</td>
8834 <td>101</td>
8835 </tr>
8836 <tr class="row-even"><td>&#160;</td>
8837 <td>&#160;</td>
8838 <td>&#160;</td>
8839 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8840 <td>in</td>
8841 <td>105</td>
8842 </tr>
8843 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8844 <td>123</td>
8845 <td>21</td>
8846 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8847 <td>in</td>
8848 <td>105</td>
8849 </tr>
8850 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8851 <td>123</td>
8852 <td>22</td>
8853 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
8854 <td>in</td>
8855 <td>102</td>
8856 </tr>
8857 <tr class="row-odd"><td>&#160;</td>
8858 <td>&#160;</td>
8859 <td>&#160;</td>
8860 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8861 <td>in</td>
8862 <td>106</td>
8863 </tr>
8864 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8865 <td>123</td>
8866 <td>22</td>
8867 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8868 <td>in</td>
8869 <td>106</td>
8870 </tr>
8871 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8872 <td>123</td>
8873 <td>23</td>
8874 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
8875 <td>in</td>
8876 <td>103</td>
8877 </tr>
8878 <tr class="row-even"><td>&#160;</td>
8879 <td>&#160;</td>
8880 <td>&#160;</td>
8881 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8882 <td>in</td>
8883 <td>107</td>
8884 </tr>
8885 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8886 <td>123</td>
8887 <td>23</td>
8888 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8889 <td>in</td>
8890 <td>107</td>
8891 </tr>
8892 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8893 <td>123</td>
8894 <td>24</td>
8895 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8896 <td>in</td>
8897 <td>108</td>
8898 </tr>
8899 <tr class="row-odd"><td>&#160;</td>
8900 <td>&#160;</td>
8901 <td>&#160;</td>
8902 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8903 <td>in</td>
8904 <td>108</td>
8905 </tr>
8906 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8907 <td>123</td>
8908 <td>24</td>
8909 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
8910 <td>intaggr_levi_pend</td>
8911 <td>60</td>
8912 </tr>
8913 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8914 <td>123</td>
8915 <td>25</td>
8916 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8917 <td>in</td>
8918 <td>109</td>
8919 </tr>
8920 <tr class="row-even"><td>&#160;</td>
8921 <td>&#160;</td>
8922 <td>&#160;</td>
8923 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8924 <td>in</td>
8925 <td>109</td>
8926 </tr>
8927 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8928 <td>123</td>
8929 <td>25</td>
8930 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
8931 <td>intaggr_levi_pend</td>
8932 <td>61</td>
8933 </tr>
8934 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8935 <td>123</td>
8936 <td>26</td>
8937 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8938 <td>in</td>
8939 <td>110</td>
8940 </tr>
8941 <tr class="row-odd"><td>&#160;</td>
8942 <td>&#160;</td>
8943 <td>&#160;</td>
8944 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8945 <td>in</td>
8946 <td>110</td>
8947 </tr>
8948 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8949 <td>123</td>
8950 <td>26</td>
8951 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
8952 <td>intaggr_levi_pend</td>
8953 <td>62</td>
8954 </tr>
8955 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8956 <td>123</td>
8957 <td>27</td>
8958 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8959 <td>in</td>
8960 <td>111</td>
8961 </tr>
8962 <tr class="row-even"><td>&#160;</td>
8963 <td>&#160;</td>
8964 <td>&#160;</td>
8965 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8966 <td>in</td>
8967 <td>111</td>
8968 </tr>
8969 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8970 <td>123</td>
8971 <td>27</td>
8972 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
8973 <td>intaggr_levi_pend</td>
8974 <td>63</td>
8975 </tr>
8976 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8977 <td>123</td>
8978 <td>28</td>
8979 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
8980 <td>in</td>
8981 <td>112</td>
8982 </tr>
8983 <tr class="row-odd"><td>&#160;</td>
8984 <td>&#160;</td>
8985 <td>&#160;</td>
8986 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
8987 <td>in</td>
8988 <td>112</td>
8989 </tr>
8990 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8991 <td>123</td>
8992 <td>28</td>
8993 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
8994 <td>intaggr_levi_pend</td>
8995 <td>64</td>
8996 </tr>
8997 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
8998 <td>123</td>
8999 <td>29</td>
9000 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
9001 <td>in</td>
9002 <td>113</td>
9003 </tr>
9004 <tr class="row-even"><td>&#160;</td>
9005 <td>&#160;</td>
9006 <td>&#160;</td>
9007 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
9008 <td>in</td>
9009 <td>113</td>
9010 </tr>
9011 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
9012 <td>123</td>
9013 <td>29</td>
9014 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
9015 <td>intaggr_levi_pend</td>
9016 <td>65</td>
9017 </tr>
9018 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
9019 <td>123</td>
9020 <td>30</td>
9021 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
9022 <td>in</td>
9023 <td>114</td>
9024 </tr>
9025 <tr class="row-odd"><td>&#160;</td>
9026 <td>&#160;</td>
9027 <td>&#160;</td>
9028 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
9029 <td>in</td>
9030 <td>114</td>
9031 </tr>
9032 <tr class="row-even"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
9033 <td>123</td>
9034 <td>30</td>
9035 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
9036 <td>intaggr_levi_pend</td>
9037 <td>66</td>
9038 </tr>
9039 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
9040 <td>123</td>
9041 <td>31</td>
9042 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
9043 <td>in</td>
9044 <td>115</td>
9045 </tr>
9046 <tr class="row-even"><td>&#160;</td>
9047 <td>&#160;</td>
9048 <td>&#160;</td>
9049 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
9050 <td>in</td>
9051 <td>115</td>
9052 </tr>
9053 <tr class="row-odd"><td>J721E_DEV_CMPEVENT_INTRTR0</td>
9054 <td>123</td>
9055 <td>31</td>
9056 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
9057 <td>intaggr_levi_pend</td>
9058 <td>67</td>
9059 </tr>
9060 </tbody>
9061 </table>
9062 </div>
9063 <div class="section" id="main2mcu-lvl-intrtr0-interrupt-router-input-sources">
9064 <span id="pub-soc-j721e-main2mcu-lvl-intrtr0-input-src-list"></span><h2>MAIN2MCU_LVL_INTRTR0 Interrupt Router Input Sources<a class="headerlink" href="#main2mcu-lvl-intrtr0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
9065 <div class="admonition warning">
9066 <p class="first admonition-title">Warning</p>
9067 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
9068 host within the RM Board Configuration resource assignment array.  The RM
9069 Board Configuration is rejected if an overlap with a reserved resource is
9070 detected.</p>
9071 </div>
9072 <table border="1" class="docutils">
9073 <colgroup>
9074 <col width="22%" />
9075 <col width="11%" />
9076 <col width="13%" />
9077 <col width="15%" />
9078 <col width="28%" />
9079 <col width="11%" />
9080 </colgroup>
9081 <thead valign="bottom">
9082 <tr class="row-odd"><th class="head">IR Name</th>
9083 <th class="head">IR Device ID</th>
9084 <th class="head">IR Input Index</th>
9085 <th class="head">Source Name</th>
9086 <th class="head">Source Interface</th>
9087 <th class="head">Source Index</th>
9088 </tr>
9089 </thead>
9090 <tbody valign="top">
9091 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9092 <td>128</td>
9093 <td>0</td>
9094 <td>Not Connected</td>
9095 <td>&#160;</td>
9096 <td>&#160;</td>
9097 </tr>
9098 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9099 <td>128</td>
9100 <td>1</td>
9101 <td>Not Connected</td>
9102 <td>&#160;</td>
9103 <td>&#160;</td>
9104 </tr>
9105 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9106 <td>128</td>
9107 <td>2</td>
9108 <td>Not Connected</td>
9109 <td>&#160;</td>
9110 <td>&#160;</td>
9111 </tr>
9112 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9113 <td>128</td>
9114 <td>3</td>
9115 <td>Not Connected</td>
9116 <td>&#160;</td>
9117 <td>&#160;</td>
9118 </tr>
9119 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9120 <td>128</td>
9121 <td>4</td>
9122 <td>J721E_DEV_SA2_UL0</td>
9123 <td>sa_ul_trng</td>
9124 <td>0</td>
9125 </tr>
9126 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9127 <td>128</td>
9128 <td>5</td>
9129 <td>J721E_DEV_SA2_UL0</td>
9130 <td>sa_ul_pka</td>
9131 <td>0</td>
9132 </tr>
9133 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9134 <td>128</td>
9135 <td>6</td>
9136 <td>Not Connected</td>
9137 <td>&#160;</td>
9138 <td>&#160;</td>
9139 </tr>
9140 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9141 <td>128</td>
9142 <td>7</td>
9143 <td>J721E_DEV_ELM0</td>
9144 <td>elm_porocpsinterrupt_lvl</td>
9145 <td>0</td>
9146 </tr>
9147 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9148 <td>128</td>
9149 <td>8</td>
9150 <td>J721E_DEV_GPMC0</td>
9151 <td>gpmc_sinterrupt</td>
9152 <td>0</td>
9153 </tr>
9154 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9155 <td>128</td>
9156 <td>9</td>
9157 <td>J721E_DEV_DDR0</td>
9158 <td>ddrss_pll_freq_change_req</td>
9159 <td>0</td>
9160 </tr>
9161 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9162 <td>128</td>
9163 <td>10</td>
9164 <td>J721E_DEV_DDR0</td>
9165 <td>ddrss_controller</td>
9166 <td>0</td>
9167 </tr>
9168 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9169 <td>128</td>
9170 <td>11</td>
9171 <td>J721E_DEV_DDR0</td>
9172 <td>ddrss_v2a_other_err_lvl</td>
9173 <td>0</td>
9174 </tr>
9175 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9176 <td>128</td>
9177 <td>12</td>
9178 <td>J721E_DEV_DDR0</td>
9179 <td>ddrss_hs_phy_global_error</td>
9180 <td>0</td>
9181 </tr>
9182 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9183 <td>128</td>
9184 <td>13</td>
9185 <td>Not Connected</td>
9186 <td>&#160;</td>
9187 <td>&#160;</td>
9188 </tr>
9189 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9190 <td>128</td>
9191 <td>14</td>
9192 <td>Not Connected</td>
9193 <td>&#160;</td>
9194 <td>&#160;</td>
9195 </tr>
9196 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9197 <td>128</td>
9198 <td>15</td>
9199 <td>Not Connected</td>
9200 <td>&#160;</td>
9201 <td>&#160;</td>
9202 </tr>
9203 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9204 <td>128</td>
9205 <td>16</td>
9206 <td>J721E_DEV_MCAN0</td>
9207 <td>mcanss_mcan_lvl_int</td>
9208 <td>0</td>
9209 </tr>
9210 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9211 <td>128</td>
9212 <td>17</td>
9213 <td>J721E_DEV_MCAN0</td>
9214 <td>mcanss_mcan_lvl_int</td>
9215 <td>1</td>
9216 </tr>
9217 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9218 <td>128</td>
9219 <td>18</td>
9220 <td>J721E_DEV_MCAN0</td>
9221 <td>mcanss_ext_ts_rollover_lvl_int</td>
9222 <td>0</td>
9223 </tr>
9224 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9225 <td>128</td>
9226 <td>19</td>
9227 <td>J721E_DEV_MCAN1</td>
9228 <td>mcanss_mcan_lvl_int</td>
9229 <td>0</td>
9230 </tr>
9231 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9232 <td>128</td>
9233 <td>20</td>
9234 <td>J721E_DEV_MCAN1</td>
9235 <td>mcanss_mcan_lvl_int</td>
9236 <td>1</td>
9237 </tr>
9238 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9239 <td>128</td>
9240 <td>21</td>
9241 <td>J721E_DEV_MCAN1</td>
9242 <td>mcanss_ext_ts_rollover_lvl_int</td>
9243 <td>0</td>
9244 </tr>
9245 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9246 <td>128</td>
9247 <td>22</td>
9248 <td>J721E_DEV_MCAN2</td>
9249 <td>mcanss_mcan_lvl_int</td>
9250 <td>0</td>
9251 </tr>
9252 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9253 <td>128</td>
9254 <td>23</td>
9255 <td>J721E_DEV_MCAN2</td>
9256 <td>mcanss_mcan_lvl_int</td>
9257 <td>1</td>
9258 </tr>
9259 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9260 <td>128</td>
9261 <td>24</td>
9262 <td>J721E_DEV_MCAN2</td>
9263 <td>mcanss_ext_ts_rollover_lvl_int</td>
9264 <td>0</td>
9265 </tr>
9266 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9267 <td>128</td>
9268 <td>25</td>
9269 <td>J721E_DEV_MCAN3</td>
9270 <td>mcanss_mcan_lvl_int</td>
9271 <td>0</td>
9272 </tr>
9273 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9274 <td>128</td>
9275 <td>26</td>
9276 <td>J721E_DEV_MCAN3</td>
9277 <td>mcanss_mcan_lvl_int</td>
9278 <td>1</td>
9279 </tr>
9280 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9281 <td>128</td>
9282 <td>27</td>
9283 <td>J721E_DEV_MCAN3</td>
9284 <td>mcanss_ext_ts_rollover_lvl_int</td>
9285 <td>0</td>
9286 </tr>
9287 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9288 <td>128</td>
9289 <td>28</td>
9290 <td>J721E_DEV_MMCSD0</td>
9291 <td>emmcss_intr</td>
9292 <td>0</td>
9293 </tr>
9294 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9295 <td>128</td>
9296 <td>29</td>
9297 <td>J721E_DEV_MMCSD1</td>
9298 <td>emmcsdss_intr</td>
9299 <td>0</td>
9300 </tr>
9301 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9302 <td>128</td>
9303 <td>30</td>
9304 <td>J721E_DEV_MMCSD2</td>
9305 <td>emmcsdss_intr</td>
9306 <td>0</td>
9307 </tr>
9308 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9309 <td>128</td>
9310 <td>31</td>
9311 <td>Not Connected</td>
9312 <td>&#160;</td>
9313 <td>&#160;</td>
9314 </tr>
9315 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9316 <td>128</td>
9317 <td>32</td>
9318 <td>J721E_DEV_PRU_ICSSG0</td>
9319 <td>pr1_host_intr_pend</td>
9320 <td>0</td>
9321 </tr>
9322 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9323 <td>128</td>
9324 <td>33</td>
9325 <td>J721E_DEV_PRU_ICSSG0</td>
9326 <td>pr1_host_intr_pend</td>
9327 <td>1</td>
9328 </tr>
9329 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9330 <td>128</td>
9331 <td>34</td>
9332 <td>J721E_DEV_PRU_ICSSG0</td>
9333 <td>pr1_host_intr_pend</td>
9334 <td>2</td>
9335 </tr>
9336 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9337 <td>128</td>
9338 <td>35</td>
9339 <td>J721E_DEV_PRU_ICSSG0</td>
9340 <td>pr1_host_intr_pend</td>
9341 <td>3</td>
9342 </tr>
9343 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9344 <td>128</td>
9345 <td>36</td>
9346 <td>J721E_DEV_PRU_ICSSG0</td>
9347 <td>pr1_host_intr_pend</td>
9348 <td>4</td>
9349 </tr>
9350 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9351 <td>128</td>
9352 <td>37</td>
9353 <td>J721E_DEV_PRU_ICSSG0</td>
9354 <td>pr1_host_intr_pend</td>
9355 <td>5</td>
9356 </tr>
9357 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9358 <td>128</td>
9359 <td>38</td>
9360 <td>J721E_DEV_PRU_ICSSG0</td>
9361 <td>pr1_host_intr_pend</td>
9362 <td>6</td>
9363 </tr>
9364 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9365 <td>128</td>
9366 <td>39</td>
9367 <td>J721E_DEV_PRU_ICSSG0</td>
9368 <td>pr1_host_intr_pend</td>
9369 <td>7</td>
9370 </tr>
9371 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9372 <td>128</td>
9373 <td>40</td>
9374 <td>J721E_DEV_PRU_ICSSG1</td>
9375 <td>pr1_host_intr_pend</td>
9376 <td>0</td>
9377 </tr>
9378 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9379 <td>128</td>
9380 <td>41</td>
9381 <td>J721E_DEV_PRU_ICSSG1</td>
9382 <td>pr1_host_intr_pend</td>
9383 <td>1</td>
9384 </tr>
9385 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9386 <td>128</td>
9387 <td>42</td>
9388 <td>J721E_DEV_PRU_ICSSG1</td>
9389 <td>pr1_host_intr_pend</td>
9390 <td>2</td>
9391 </tr>
9392 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9393 <td>128</td>
9394 <td>43</td>
9395 <td>J721E_DEV_PRU_ICSSG1</td>
9396 <td>pr1_host_intr_pend</td>
9397 <td>3</td>
9398 </tr>
9399 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9400 <td>128</td>
9401 <td>44</td>
9402 <td>J721E_DEV_PRU_ICSSG1</td>
9403 <td>pr1_host_intr_pend</td>
9404 <td>4</td>
9405 </tr>
9406 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9407 <td>128</td>
9408 <td>45</td>
9409 <td>J721E_DEV_PRU_ICSSG1</td>
9410 <td>pr1_host_intr_pend</td>
9411 <td>5</td>
9412 </tr>
9413 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9414 <td>128</td>
9415 <td>46</td>
9416 <td>J721E_DEV_PRU_ICSSG1</td>
9417 <td>pr1_host_intr_pend</td>
9418 <td>6</td>
9419 </tr>
9420 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9421 <td>128</td>
9422 <td>47</td>
9423 <td>J721E_DEV_PRU_ICSSG1</td>
9424 <td>pr1_host_intr_pend</td>
9425 <td>7</td>
9426 </tr>
9427 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9428 <td>128</td>
9429 <td>48</td>
9430 <td>J721E_DEV_MCSPI0</td>
9431 <td>intr_spi</td>
9432 <td>0</td>
9433 </tr>
9434 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9435 <td>128</td>
9436 <td>49</td>
9437 <td>J721E_DEV_MCSPI1</td>
9438 <td>intr_spi</td>
9439 <td>0</td>
9440 </tr>
9441 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9442 <td>128</td>
9443 <td>50</td>
9444 <td>J721E_DEV_MCSPI2</td>
9445 <td>intr_spi</td>
9446 <td>0</td>
9447 </tr>
9448 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9449 <td>128</td>
9450 <td>51</td>
9451 <td>J721E_DEV_MCSPI3</td>
9452 <td>intr_spi</td>
9453 <td>0</td>
9454 </tr>
9455 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9456 <td>128</td>
9457 <td>52</td>
9458 <td>J721E_DEV_MCSPI4</td>
9459 <td>intr_spi</td>
9460 <td>0</td>
9461 </tr>
9462 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9463 <td>128</td>
9464 <td>53</td>
9465 <td>J721E_DEV_MCSPI5</td>
9466 <td>intr_spi</td>
9467 <td>0</td>
9468 </tr>
9469 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9470 <td>128</td>
9471 <td>54</td>
9472 <td>J721E_DEV_MCSPI6</td>
9473 <td>intr_spi</td>
9474 <td>0</td>
9475 </tr>
9476 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9477 <td>128</td>
9478 <td>55</td>
9479 <td>J721E_DEV_MCSPI7</td>
9480 <td>intr_spi</td>
9481 <td>0</td>
9482 </tr>
9483 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9484 <td>128</td>
9485 <td>56</td>
9486 <td>J721E_DEV_I2C0</td>
9487 <td>pointrpend</td>
9488 <td>0</td>
9489 </tr>
9490 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9491 <td>128</td>
9492 <td>57</td>
9493 <td>J721E_DEV_I2C1</td>
9494 <td>pointrpend</td>
9495 <td>0</td>
9496 </tr>
9497 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9498 <td>128</td>
9499 <td>58</td>
9500 <td>J721E_DEV_I2C2</td>
9501 <td>pointrpend</td>
9502 <td>0</td>
9503 </tr>
9504 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9505 <td>128</td>
9506 <td>59</td>
9507 <td>J721E_DEV_I2C3</td>
9508 <td>pointrpend</td>
9509 <td>0</td>
9510 </tr>
9511 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9512 <td>128</td>
9513 <td>60</td>
9514 <td>J721E_DEV_I2C4</td>
9515 <td>pointrpend</td>
9516 <td>0</td>
9517 </tr>
9518 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9519 <td>128</td>
9520 <td>61</td>
9521 <td>J721E_DEV_I2C5</td>
9522 <td>pointrpend</td>
9523 <td>0</td>
9524 </tr>
9525 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9526 <td>128</td>
9527 <td>62</td>
9528 <td>J721E_DEV_I2C6</td>
9529 <td>pointrpend</td>
9530 <td>0</td>
9531 </tr>
9532 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9533 <td>128</td>
9534 <td>63</td>
9535 <td>Not Connected</td>
9536 <td>&#160;</td>
9537 <td>&#160;</td>
9538 </tr>
9539 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9540 <td>128</td>
9541 <td>64</td>
9542 <td>Not Connected</td>
9543 <td>&#160;</td>
9544 <td>&#160;</td>
9545 </tr>
9546 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9547 <td>128</td>
9548 <td>65</td>
9549 <td>Not Connected</td>
9550 <td>&#160;</td>
9551 <td>&#160;</td>
9552 </tr>
9553 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9554 <td>128</td>
9555 <td>66</td>
9556 <td>Not Connected</td>
9557 <td>&#160;</td>
9558 <td>&#160;</td>
9559 </tr>
9560 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9561 <td>128</td>
9562 <td>67</td>
9563 <td>J721E_DEV_PCIE0</td>
9564 <td>pcie_phy_level</td>
9565 <td>0</td>
9566 </tr>
9567 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9568 <td>128</td>
9569 <td>68</td>
9570 <td>J721E_DEV_PCIE0</td>
9571 <td>pcie_local_level</td>
9572 <td>0</td>
9573 </tr>
9574 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9575 <td>128</td>
9576 <td>69</td>
9577 <td>J721E_DEV_PCIE0</td>
9578 <td>pcie_cpts_pend</td>
9579 <td>0</td>
9580 </tr>
9581 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9582 <td>128</td>
9583 <td>70</td>
9584 <td>Not Connected</td>
9585 <td>&#160;</td>
9586 <td>&#160;</td>
9587 </tr>
9588 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9589 <td>128</td>
9590 <td>71</td>
9591 <td>Not Connected</td>
9592 <td>&#160;</td>
9593 <td>&#160;</td>
9594 </tr>
9595 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9596 <td>128</td>
9597 <td>72</td>
9598 <td>Not Connected</td>
9599 <td>&#160;</td>
9600 <td>&#160;</td>
9601 </tr>
9602 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9603 <td>128</td>
9604 <td>73</td>
9605 <td>J721E_DEV_PCIE1</td>
9606 <td>pcie_phy_level</td>
9607 <td>0</td>
9608 </tr>
9609 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9610 <td>128</td>
9611 <td>74</td>
9612 <td>J721E_DEV_PCIE1</td>
9613 <td>pcie_local_level</td>
9614 <td>0</td>
9615 </tr>
9616 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9617 <td>128</td>
9618 <td>75</td>
9619 <td>J721E_DEV_PCIE1</td>
9620 <td>pcie_cpts_pend</td>
9621 <td>0</td>
9622 </tr>
9623 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9624 <td>128</td>
9625 <td>76</td>
9626 <td>Not Connected</td>
9627 <td>&#160;</td>
9628 <td>&#160;</td>
9629 </tr>
9630 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9631 <td>128</td>
9632 <td>77</td>
9633 <td>Not Connected</td>
9634 <td>&#160;</td>
9635 <td>&#160;</td>
9636 </tr>
9637 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9638 <td>128</td>
9639 <td>78</td>
9640 <td>Not Connected</td>
9641 <td>&#160;</td>
9642 <td>&#160;</td>
9643 </tr>
9644 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9645 <td>128</td>
9646 <td>79</td>
9647 <td>J721E_DEV_PCIE2</td>
9648 <td>pcie_phy_level</td>
9649 <td>0</td>
9650 </tr>
9651 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9652 <td>128</td>
9653 <td>80</td>
9654 <td>J721E_DEV_PCIE2</td>
9655 <td>pcie_local_level</td>
9656 <td>0</td>
9657 </tr>
9658 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9659 <td>128</td>
9660 <td>81</td>
9661 <td>J721E_DEV_PCIE2</td>
9662 <td>pcie_cpts_pend</td>
9663 <td>0</td>
9664 </tr>
9665 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9666 <td>128</td>
9667 <td>82</td>
9668 <td>Not Connected</td>
9669 <td>&#160;</td>
9670 <td>&#160;</td>
9671 </tr>
9672 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9673 <td>128</td>
9674 <td>83</td>
9675 <td>Not Connected</td>
9676 <td>&#160;</td>
9677 <td>&#160;</td>
9678 </tr>
9679 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9680 <td>128</td>
9681 <td>84</td>
9682 <td>Not Connected</td>
9683 <td>&#160;</td>
9684 <td>&#160;</td>
9685 </tr>
9686 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9687 <td>128</td>
9688 <td>85</td>
9689 <td>J721E_DEV_PCIE3</td>
9690 <td>pcie_phy_level</td>
9691 <td>0</td>
9692 </tr>
9693 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9694 <td>128</td>
9695 <td>86</td>
9696 <td>J721E_DEV_PCIE3</td>
9697 <td>pcie_local_level</td>
9698 <td>0</td>
9699 </tr>
9700 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9701 <td>128</td>
9702 <td>87</td>
9703 <td>J721E_DEV_PCIE3</td>
9704 <td>pcie_cpts_pend</td>
9705 <td>0</td>
9706 </tr>
9707 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9708 <td>128</td>
9709 <td>88</td>
9710 <td>J721E_DEV_DCC0</td>
9711 <td>intr_done_level</td>
9712 <td>0</td>
9713 </tr>
9714 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9715 <td>128</td>
9716 <td>89</td>
9717 <td>J721E_DEV_DCC1</td>
9718 <td>intr_done_level</td>
9719 <td>0</td>
9720 </tr>
9721 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9722 <td>128</td>
9723 <td>90</td>
9724 <td>J721E_DEV_DCC2</td>
9725 <td>intr_done_level</td>
9726 <td>0</td>
9727 </tr>
9728 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9729 <td>128</td>
9730 <td>91</td>
9731 <td>J721E_DEV_DCC3</td>
9732 <td>intr_done_level</td>
9733 <td>0</td>
9734 </tr>
9735 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9736 <td>128</td>
9737 <td>92</td>
9738 <td>J721E_DEV_DCC4</td>
9739 <td>intr_done_level</td>
9740 <td>0</td>
9741 </tr>
9742 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9743 <td>128</td>
9744 <td>93</td>
9745 <td>J721E_DEV_DCC5</td>
9746 <td>intr_done_level</td>
9747 <td>0</td>
9748 </tr>
9749 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9750 <td>128</td>
9751 <td>94</td>
9752 <td>J721E_DEV_DCC6</td>
9753 <td>intr_done_level</td>
9754 <td>0</td>
9755 </tr>
9756 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9757 <td>128</td>
9758 <td>95</td>
9759 <td>J721E_DEV_DCC7</td>
9760 <td>intr_done_level</td>
9761 <td>0</td>
9762 </tr>
9763 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9764 <td>128</td>
9765 <td>96</td>
9766 <td>J721E_DEV_UART0</td>
9767 <td>usart_irq</td>
9768 <td>0</td>
9769 </tr>
9770 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9771 <td>128</td>
9772 <td>97</td>
9773 <td>J721E_DEV_UART1</td>
9774 <td>usart_irq</td>
9775 <td>0</td>
9776 </tr>
9777 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9778 <td>128</td>
9779 <td>98</td>
9780 <td>J721E_DEV_UART2</td>
9781 <td>usart_irq</td>
9782 <td>0</td>
9783 </tr>
9784 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9785 <td>128</td>
9786 <td>99</td>
9787 <td>J721E_DEV_UART3</td>
9788 <td>usart_irq</td>
9789 <td>0</td>
9790 </tr>
9791 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9792 <td>128</td>
9793 <td>100</td>
9794 <td>J721E_DEV_UART4</td>
9795 <td>usart_irq</td>
9796 <td>0</td>
9797 </tr>
9798 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9799 <td>128</td>
9800 <td>101</td>
9801 <td>J721E_DEV_UART5</td>
9802 <td>usart_irq</td>
9803 <td>0</td>
9804 </tr>
9805 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9806 <td>128</td>
9807 <td>102</td>
9808 <td>J721E_DEV_UART6</td>
9809 <td>usart_irq</td>
9810 <td>0</td>
9811 </tr>
9812 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9813 <td>128</td>
9814 <td>103</td>
9815 <td>J721E_DEV_UART7</td>
9816 <td>usart_irq</td>
9817 <td>0</td>
9818 </tr>
9819 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9820 <td>128</td>
9821 <td>104</td>
9822 <td>J721E_DEV_UART8</td>
9823 <td>usart_irq</td>
9824 <td>0</td>
9825 </tr>
9826 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9827 <td>128</td>
9828 <td>105</td>
9829 <td>J721E_DEV_UART9</td>
9830 <td>usart_irq</td>
9831 <td>0</td>
9832 </tr>
9833 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9834 <td>128</td>
9835 <td>106</td>
9836 <td>Not Connected</td>
9837 <td>&#160;</td>
9838 <td>&#160;</td>
9839 </tr>
9840 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9841 <td>128</td>
9842 <td>107</td>
9843 <td>Not Connected</td>
9844 <td>&#160;</td>
9845 <td>&#160;</td>
9846 </tr>
9847 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9848 <td>128</td>
9849 <td>108</td>
9850 <td>J721E_DEV_TIMER0</td>
9851 <td>intr_pend</td>
9852 <td>0</td>
9853 </tr>
9854 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9855 <td>128</td>
9856 <td>109</td>
9857 <td>J721E_DEV_TIMER1</td>
9858 <td>intr_pend</td>
9859 <td>0</td>
9860 </tr>
9861 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9862 <td>128</td>
9863 <td>110</td>
9864 <td>J721E_DEV_TIMER2</td>
9865 <td>intr_pend</td>
9866 <td>0</td>
9867 </tr>
9868 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9869 <td>128</td>
9870 <td>111</td>
9871 <td>J721E_DEV_TIMER3</td>
9872 <td>intr_pend</td>
9873 <td>0</td>
9874 </tr>
9875 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9876 <td>128</td>
9877 <td>112</td>
9878 <td>J721E_DEV_TIMER4</td>
9879 <td>intr_pend</td>
9880 <td>0</td>
9881 </tr>
9882 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9883 <td>128</td>
9884 <td>113</td>
9885 <td>J721E_DEV_TIMER5</td>
9886 <td>intr_pend</td>
9887 <td>0</td>
9888 </tr>
9889 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9890 <td>128</td>
9891 <td>114</td>
9892 <td>J721E_DEV_TIMER6</td>
9893 <td>intr_pend</td>
9894 <td>0</td>
9895 </tr>
9896 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9897 <td>128</td>
9898 <td>115</td>
9899 <td>J721E_DEV_TIMER7</td>
9900 <td>intr_pend</td>
9901 <td>0</td>
9902 </tr>
9903 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9904 <td>128</td>
9905 <td>116</td>
9906 <td>J721E_DEV_TIMER8</td>
9907 <td>intr_pend</td>
9908 <td>0</td>
9909 </tr>
9910 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9911 <td>128</td>
9912 <td>117</td>
9913 <td>J721E_DEV_TIMER9</td>
9914 <td>intr_pend</td>
9915 <td>0</td>
9916 </tr>
9917 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9918 <td>128</td>
9919 <td>118</td>
9920 <td>J721E_DEV_TIMER10</td>
9921 <td>intr_pend</td>
9922 <td>0</td>
9923 </tr>
9924 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9925 <td>128</td>
9926 <td>119</td>
9927 <td>J721E_DEV_TIMER11</td>
9928 <td>intr_pend</td>
9929 <td>0</td>
9930 </tr>
9931 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9932 <td>128</td>
9933 <td>120</td>
9934 <td>J721E_DEV_TIMER12</td>
9935 <td>intr_pend</td>
9936 <td>0</td>
9937 </tr>
9938 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9939 <td>128</td>
9940 <td>121</td>
9941 <td>J721E_DEV_TIMER13</td>
9942 <td>intr_pend</td>
9943 <td>0</td>
9944 </tr>
9945 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9946 <td>128</td>
9947 <td>122</td>
9948 <td>J721E_DEV_TIMER14</td>
9949 <td>intr_pend</td>
9950 <td>0</td>
9951 </tr>
9952 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9953 <td>128</td>
9954 <td>123</td>
9955 <td>J721E_DEV_TIMER15</td>
9956 <td>intr_pend</td>
9957 <td>0</td>
9958 </tr>
9959 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9960 <td>128</td>
9961 <td>124</td>
9962 <td>J721E_DEV_TIMER16</td>
9963 <td>intr_pend</td>
9964 <td>0</td>
9965 </tr>
9966 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9967 <td>128</td>
9968 <td>125</td>
9969 <td>J721E_DEV_TIMER17</td>
9970 <td>intr_pend</td>
9971 <td>0</td>
9972 </tr>
9973 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9974 <td>128</td>
9975 <td>126</td>
9976 <td>J721E_DEV_TIMER18</td>
9977 <td>intr_pend</td>
9978 <td>0</td>
9979 </tr>
9980 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9981 <td>128</td>
9982 <td>127</td>
9983 <td>J721E_DEV_TIMER19</td>
9984 <td>intr_pend</td>
9985 <td>0</td>
9986 </tr>
9987 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9988 <td>128</td>
9989 <td>128</td>
9990 <td>J721E_DEV_USB0</td>
9991 <td>irq</td>
9992 <td>0</td>
9993 </tr>
9994 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
9995 <td>128</td>
9996 <td>129</td>
9997 <td>J721E_DEV_USB0</td>
9998 <td>irq</td>
9999 <td>1</td>
10000 </tr>
10001 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10002 <td>128</td>
10003 <td>130</td>
10004 <td>J721E_DEV_USB0</td>
10005 <td>irq</td>
10006 <td>2</td>
10007 </tr>
10008 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10009 <td>128</td>
10010 <td>131</td>
10011 <td>J721E_DEV_USB0</td>
10012 <td>irq</td>
10013 <td>3</td>
10014 </tr>
10015 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10016 <td>128</td>
10017 <td>132</td>
10018 <td>J721E_DEV_USB0</td>
10019 <td>irq</td>
10020 <td>4</td>
10021 </tr>
10022 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10023 <td>128</td>
10024 <td>133</td>
10025 <td>J721E_DEV_USB0</td>
10026 <td>irq</td>
10027 <td>5</td>
10028 </tr>
10029 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10030 <td>128</td>
10031 <td>134</td>
10032 <td>J721E_DEV_USB0</td>
10033 <td>irq</td>
10034 <td>6</td>
10035 </tr>
10036 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10037 <td>128</td>
10038 <td>135</td>
10039 <td>J721E_DEV_USB0</td>
10040 <td>irq</td>
10041 <td>7</td>
10042 </tr>
10043 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10044 <td>128</td>
10045 <td>136</td>
10046 <td>J721E_DEV_USB1</td>
10047 <td>irq</td>
10048 <td>0</td>
10049 </tr>
10050 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10051 <td>128</td>
10052 <td>137</td>
10053 <td>J721E_DEV_USB1</td>
10054 <td>irq</td>
10055 <td>1</td>
10056 </tr>
10057 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10058 <td>128</td>
10059 <td>138</td>
10060 <td>J721E_DEV_USB1</td>
10061 <td>irq</td>
10062 <td>2</td>
10063 </tr>
10064 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10065 <td>128</td>
10066 <td>139</td>
10067 <td>J721E_DEV_USB1</td>
10068 <td>irq</td>
10069 <td>3</td>
10070 </tr>
10071 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10072 <td>128</td>
10073 <td>140</td>
10074 <td>J721E_DEV_USB1</td>
10075 <td>irq</td>
10076 <td>4</td>
10077 </tr>
10078 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10079 <td>128</td>
10080 <td>141</td>
10081 <td>J721E_DEV_USB1</td>
10082 <td>irq</td>
10083 <td>5</td>
10084 </tr>
10085 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10086 <td>128</td>
10087 <td>142</td>
10088 <td>J721E_DEV_USB1</td>
10089 <td>irq</td>
10090 <td>6</td>
10091 </tr>
10092 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10093 <td>128</td>
10094 <td>143</td>
10095 <td>J721E_DEV_USB1</td>
10096 <td>irq</td>
10097 <td>7</td>
10098 </tr>
10099 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10100 <td>128</td>
10101 <td>144</td>
10102 <td>Not Connected</td>
10103 <td>&#160;</td>
10104 <td>&#160;</td>
10105 </tr>
10106 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10107 <td>128</td>
10108 <td>145</td>
10109 <td>Not Connected</td>
10110 <td>&#160;</td>
10111 <td>&#160;</td>
10112 </tr>
10113 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10114 <td>128</td>
10115 <td>146</td>
10116 <td>Not Connected</td>
10117 <td>&#160;</td>
10118 <td>&#160;</td>
10119 </tr>
10120 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10121 <td>128</td>
10122 <td>147</td>
10123 <td>Not Connected</td>
10124 <td>&#160;</td>
10125 <td>&#160;</td>
10126 </tr>
10127 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10128 <td>128</td>
10129 <td>148</td>
10130 <td>Not Connected</td>
10131 <td>&#160;</td>
10132 <td>&#160;</td>
10133 </tr>
10134 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10135 <td>128</td>
10136 <td>149</td>
10137 <td>Not Connected</td>
10138 <td>&#160;</td>
10139 <td>&#160;</td>
10140 </tr>
10141 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10142 <td>128</td>
10143 <td>150</td>
10144 <td>Not Connected</td>
10145 <td>&#160;</td>
10146 <td>&#160;</td>
10147 </tr>
10148 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10149 <td>128</td>
10150 <td>151</td>
10151 <td>Not Connected</td>
10152 <td>&#160;</td>
10153 <td>&#160;</td>
10154 </tr>
10155 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10156 <td>128</td>
10157 <td>152</td>
10158 <td>J721E_DEV_USB0</td>
10159 <td>otgirq</td>
10160 <td>0</td>
10161 </tr>
10162 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10163 <td>128</td>
10164 <td>153</td>
10165 <td>J721E_DEV_USB1</td>
10166 <td>otgirq</td>
10167 <td>0</td>
10168 </tr>
10169 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10170 <td>128</td>
10171 <td>154</td>
10172 <td>Not Connected</td>
10173 <td>&#160;</td>
10174 <td>&#160;</td>
10175 </tr>
10176 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10177 <td>128</td>
10178 <td>155</td>
10179 <td>Not Connected</td>
10180 <td>&#160;</td>
10181 <td>&#160;</td>
10182 </tr>
10183 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10184 <td>128</td>
10185 <td>156</td>
10186 <td>Not Connected</td>
10187 <td>&#160;</td>
10188 <td>&#160;</td>
10189 </tr>
10190 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10191 <td>128</td>
10192 <td>157</td>
10193 <td>J721E_DEV_USB0</td>
10194 <td>host_system_error</td>
10195 <td>0</td>
10196 </tr>
10197 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10198 <td>128</td>
10199 <td>158</td>
10200 <td>J721E_DEV_USB1</td>
10201 <td>host_system_error</td>
10202 <td>0</td>
10203 </tr>
10204 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10205 <td>128</td>
10206 <td>159</td>
10207 <td>Not Connected</td>
10208 <td>&#160;</td>
10209 <td>&#160;</td>
10210 </tr>
10211 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10212 <td>128</td>
10213 <td>160</td>
10214 <td>Not Connected</td>
10215 <td>&#160;</td>
10216 <td>&#160;</td>
10217 </tr>
10218 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10219 <td>128</td>
10220 <td>161</td>
10221 <td>Not Connected</td>
10222 <td>&#160;</td>
10223 <td>&#160;</td>
10224 </tr>
10225 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10226 <td>128</td>
10227 <td>162</td>
10228 <td>Not Connected</td>
10229 <td>&#160;</td>
10230 <td>&#160;</td>
10231 </tr>
10232 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10233 <td>128</td>
10234 <td>163</td>
10235 <td>Not Connected</td>
10236 <td>&#160;</td>
10237 <td>&#160;</td>
10238 </tr>
10239 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10240 <td>128</td>
10241 <td>164</td>
10242 <td>Not Connected</td>
10243 <td>&#160;</td>
10244 <td>&#160;</td>
10245 </tr>
10246 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10247 <td>128</td>
10248 <td>165</td>
10249 <td>Not Connected</td>
10250 <td>&#160;</td>
10251 <td>&#160;</td>
10252 </tr>
10253 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10254 <td>128</td>
10255 <td>166</td>
10256 <td>Not Connected</td>
10257 <td>&#160;</td>
10258 <td>&#160;</td>
10259 </tr>
10260 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10261 <td>128</td>
10262 <td>167</td>
10263 <td>Not Connected</td>
10264 <td>&#160;</td>
10265 <td>&#160;</td>
10266 </tr>
10267 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10268 <td>128</td>
10269 <td>168</td>
10270 <td>Not Connected</td>
10271 <td>&#160;</td>
10272 <td>&#160;</td>
10273 </tr>
10274 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10275 <td>128</td>
10276 <td>169</td>
10277 <td>Not Connected</td>
10278 <td>&#160;</td>
10279 <td>&#160;</td>
10280 </tr>
10281 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10282 <td>128</td>
10283 <td>170</td>
10284 <td>Not Connected</td>
10285 <td>&#160;</td>
10286 <td>&#160;</td>
10287 </tr>
10288 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10289 <td>128</td>
10290 <td>171</td>
10291 <td>Not Connected</td>
10292 <td>&#160;</td>
10293 <td>&#160;</td>
10294 </tr>
10295 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10296 <td>128</td>
10297 <td>172</td>
10298 <td>Not Connected</td>
10299 <td>&#160;</td>
10300 <td>&#160;</td>
10301 </tr>
10302 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10303 <td>128</td>
10304 <td>173</td>
10305 <td>Not Connected</td>
10306 <td>&#160;</td>
10307 <td>&#160;</td>
10308 </tr>
10309 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10310 <td>128</td>
10311 <td>174</td>
10312 <td>Not Connected</td>
10313 <td>&#160;</td>
10314 <td>&#160;</td>
10315 </tr>
10316 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10317 <td>128</td>
10318 <td>175</td>
10319 <td>Not Connected</td>
10320 <td>&#160;</td>
10321 <td>&#160;</td>
10322 </tr>
10323 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10324 <td>128</td>
10325 <td>176</td>
10326 <td>J721E_DEV_MCASP0</td>
10327 <td>xmit_intr_pend</td>
10328 <td>0</td>
10329 </tr>
10330 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10331 <td>128</td>
10332 <td>177</td>
10333 <td>J721E_DEV_MCASP0</td>
10334 <td>rec_intr_pend</td>
10335 <td>0</td>
10336 </tr>
10337 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10338 <td>128</td>
10339 <td>178</td>
10340 <td>J721E_DEV_MCASP1</td>
10341 <td>xmit_intr_pend</td>
10342 <td>0</td>
10343 </tr>
10344 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10345 <td>128</td>
10346 <td>179</td>
10347 <td>J721E_DEV_MCASP1</td>
10348 <td>rec_intr_pend</td>
10349 <td>0</td>
10350 </tr>
10351 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10352 <td>128</td>
10353 <td>180</td>
10354 <td>J721E_DEV_MCASP2</td>
10355 <td>xmit_intr_pend</td>
10356 <td>0</td>
10357 </tr>
10358 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10359 <td>128</td>
10360 <td>181</td>
10361 <td>J721E_DEV_MCASP2</td>
10362 <td>rec_intr_pend</td>
10363 <td>0</td>
10364 </tr>
10365 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10366 <td>128</td>
10367 <td>182</td>
10368 <td>J721E_DEV_MCASP3</td>
10369 <td>xmit_intr_pend</td>
10370 <td>0</td>
10371 </tr>
10372 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10373 <td>128</td>
10374 <td>183</td>
10375 <td>J721E_DEV_MCASP3</td>
10376 <td>rec_intr_pend</td>
10377 <td>0</td>
10378 </tr>
10379 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10380 <td>128</td>
10381 <td>184</td>
10382 <td>J721E_DEV_MCASP4</td>
10383 <td>xmit_intr_pend</td>
10384 <td>0</td>
10385 </tr>
10386 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10387 <td>128</td>
10388 <td>185</td>
10389 <td>J721E_DEV_MCASP4</td>
10390 <td>rec_intr_pend</td>
10391 <td>0</td>
10392 </tr>
10393 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10394 <td>128</td>
10395 <td>186</td>
10396 <td>J721E_DEV_MCASP5</td>
10397 <td>xmit_intr_pend</td>
10398 <td>0</td>
10399 </tr>
10400 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10401 <td>128</td>
10402 <td>187</td>
10403 <td>J721E_DEV_MCASP5</td>
10404 <td>rec_intr_pend</td>
10405 <td>0</td>
10406 </tr>
10407 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10408 <td>128</td>
10409 <td>188</td>
10410 <td>J721E_DEV_MCASP6</td>
10411 <td>xmit_intr_pend</td>
10412 <td>0</td>
10413 </tr>
10414 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10415 <td>128</td>
10416 <td>189</td>
10417 <td>J721E_DEV_MCASP6</td>
10418 <td>rec_intr_pend</td>
10419 <td>0</td>
10420 </tr>
10421 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10422 <td>128</td>
10423 <td>190</td>
10424 <td>J721E_DEV_MCASP7</td>
10425 <td>xmit_intr_pend</td>
10426 <td>0</td>
10427 </tr>
10428 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10429 <td>128</td>
10430 <td>191</td>
10431 <td>J721E_DEV_MCASP7</td>
10432 <td>rec_intr_pend</td>
10433 <td>0</td>
10434 </tr>
10435 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10436 <td>128</td>
10437 <td>192</td>
10438 <td>J721E_DEV_MCASP8</td>
10439 <td>xmit_intr_pend</td>
10440 <td>0</td>
10441 </tr>
10442 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10443 <td>128</td>
10444 <td>193</td>
10445 <td>J721E_DEV_MCASP8</td>
10446 <td>rec_intr_pend</td>
10447 <td>0</td>
10448 </tr>
10449 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10450 <td>128</td>
10451 <td>194</td>
10452 <td>J721E_DEV_MCASP9</td>
10453 <td>xmit_intr_pend</td>
10454 <td>0</td>
10455 </tr>
10456 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10457 <td>128</td>
10458 <td>195</td>
10459 <td>J721E_DEV_MCASP9</td>
10460 <td>rec_intr_pend</td>
10461 <td>0</td>
10462 </tr>
10463 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10464 <td>128</td>
10465 <td>196</td>
10466 <td>J721E_DEV_MCASP10</td>
10467 <td>xmit_intr_pend</td>
10468 <td>0</td>
10469 </tr>
10470 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10471 <td>128</td>
10472 <td>197</td>
10473 <td>J721E_DEV_MCASP10</td>
10474 <td>rec_intr_pend</td>
10475 <td>0</td>
10476 </tr>
10477 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10478 <td>128</td>
10479 <td>198</td>
10480 <td>J721E_DEV_MCASP11</td>
10481 <td>xmit_intr_pend</td>
10482 <td>0</td>
10483 </tr>
10484 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10485 <td>128</td>
10486 <td>199</td>
10487 <td>J721E_DEV_MCASP11</td>
10488 <td>rec_intr_pend</td>
10489 <td>0</td>
10490 </tr>
10491 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10492 <td>128</td>
10493 <td>200</td>
10494 <td>J721E_DEV_AASRC0</td>
10495 <td>infifo_level</td>
10496 <td>0</td>
10497 </tr>
10498 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10499 <td>128</td>
10500 <td>201</td>
10501 <td>J721E_DEV_AASRC0</td>
10502 <td>ingroup_level</td>
10503 <td>0</td>
10504 </tr>
10505 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10506 <td>128</td>
10507 <td>202</td>
10508 <td>J721E_DEV_AASRC0</td>
10509 <td>outfifo_level</td>
10510 <td>0</td>
10511 </tr>
10512 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10513 <td>128</td>
10514 <td>203</td>
10515 <td>J721E_DEV_AASRC0</td>
10516 <td>outgroup_level</td>
10517 <td>0</td>
10518 </tr>
10519 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10520 <td>128</td>
10521 <td>204</td>
10522 <td>J721E_DEV_AASRC0</td>
10523 <td>err_level</td>
10524 <td>0</td>
10525 </tr>
10526 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10527 <td>128</td>
10528 <td>205</td>
10529 <td>J721E_DEV_MLB0</td>
10530 <td>mlbss_mlb_int</td>
10531 <td>0</td>
10532 </tr>
10533 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10534 <td>128</td>
10535 <td>206</td>
10536 <td>J721E_DEV_MLB0</td>
10537 <td>mlbss_mlb_ahb_int</td>
10538 <td>0</td>
10539 </tr>
10540 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10541 <td>128</td>
10542 <td>207</td>
10543 <td>J721E_DEV_MLB0</td>
10544 <td>mlbss_mlb_ahb_int</td>
10545 <td>1</td>
10546 </tr>
10547 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10548 <td>128</td>
10549 <td>208</td>
10550 <td>J721E_DEV_DCC8</td>
10551 <td>intr_done_level</td>
10552 <td>0</td>
10553 </tr>
10554 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10555 <td>128</td>
10556 <td>209</td>
10557 <td>J721E_DEV_DCC9</td>
10558 <td>intr_done_level</td>
10559 <td>0</td>
10560 </tr>
10561 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10562 <td>128</td>
10563 <td>210</td>
10564 <td>J721E_DEV_DCC10</td>
10565 <td>intr_done_level</td>
10566 <td>0</td>
10567 </tr>
10568 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10569 <td>128</td>
10570 <td>211</td>
10571 <td>J721E_DEV_DCC11</td>
10572 <td>intr_done_level</td>
10573 <td>0</td>
10574 </tr>
10575 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10576 <td>128</td>
10577 <td>212</td>
10578 <td>J721E_DEV_DCC12</td>
10579 <td>intr_done_level</td>
10580 <td>0</td>
10581 </tr>
10582 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10583 <td>128</td>
10584 <td>213</td>
10585 <td>Not Connected</td>
10586 <td>&#160;</td>
10587 <td>&#160;</td>
10588 </tr>
10589 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10590 <td>128</td>
10591 <td>214</td>
10592 <td>Not Connected</td>
10593 <td>&#160;</td>
10594 <td>&#160;</td>
10595 </tr>
10596 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10597 <td>128</td>
10598 <td>215</td>
10599 <td>Not Connected</td>
10600 <td>&#160;</td>
10601 <td>&#160;</td>
10602 </tr>
10603 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10604 <td>128</td>
10605 <td>216</td>
10606 <td>Not Connected</td>
10607 <td>&#160;</td>
10608 <td>&#160;</td>
10609 </tr>
10610 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10611 <td>128</td>
10612 <td>217</td>
10613 <td>Not Connected</td>
10614 <td>&#160;</td>
10615 <td>&#160;</td>
10616 </tr>
10617 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10618 <td>128</td>
10619 <td>218</td>
10620 <td>J721E_DEV_UFS0</td>
10621 <td>ufs_intr</td>
10622 <td>0</td>
10623 </tr>
10624 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10625 <td>128</td>
10626 <td>219</td>
10627 <td>Not Connected</td>
10628 <td>&#160;</td>
10629 <td>&#160;</td>
10630 </tr>
10631 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10632 <td>128</td>
10633 <td>220</td>
10634 <td>J721E_DEV_I3C0</td>
10635 <td>i3c__int</td>
10636 <td>0</td>
10637 </tr>
10638 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10639 <td>128</td>
10640 <td>221</td>
10641 <td>J721E_DEV_CPSW0</td>
10642 <td>stat_pend</td>
10643 <td>0</td>
10644 </tr>
10645 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10646 <td>128</td>
10647 <td>222</td>
10648 <td>J721E_DEV_CPSW0</td>
10649 <td>mdio_pend</td>
10650 <td>0</td>
10651 </tr>
10652 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10653 <td>128</td>
10654 <td>223</td>
10655 <td>J721E_DEV_CPSW0</td>
10656 <td>evnt_pend</td>
10657 <td>0</td>
10658 </tr>
10659 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10660 <td>128</td>
10661 <td>224</td>
10662 <td>J721E_DEV_DSS_DSI0</td>
10663 <td>dsi_0_func_intr</td>
10664 <td>0</td>
10665 </tr>
10666 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10667 <td>128</td>
10668 <td>225</td>
10669 <td>Not Connected</td>
10670 <td>&#160;</td>
10671 <td>&#160;</td>
10672 </tr>
10673 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10674 <td>128</td>
10675 <td>226</td>
10676 <td>J721E_DEV_DSS0</td>
10677 <td>dss_inst0_dispc_func_irq_proc0</td>
10678 <td>0</td>
10679 </tr>
10680 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10681 <td>128</td>
10682 <td>227</td>
10683 <td>J721E_DEV_DSS0</td>
10684 <td>dss_inst0_dispc_func_irq_proc1</td>
10685 <td>0</td>
10686 </tr>
10687 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10688 <td>128</td>
10689 <td>228</td>
10690 <td>J721E_DEV_DSS0</td>
10691 <td>dss_inst0_dispc_secure_irq_proc0</td>
10692 <td>0</td>
10693 </tr>
10694 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10695 <td>128</td>
10696 <td>229</td>
10697 <td>J721E_DEV_DSS0</td>
10698 <td>dss_inst0_dispc_secure_irq_proc1</td>
10699 <td>0</td>
10700 </tr>
10701 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10702 <td>128</td>
10703 <td>230</td>
10704 <td>J721E_DEV_DSS0</td>
10705 <td>dss_inst0_dispc_safety_error_irq_proc0</td>
10706 <td>0</td>
10707 </tr>
10708 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10709 <td>128</td>
10710 <td>231</td>
10711 <td>J721E_DEV_DSS0</td>
10712 <td>dss_inst0_dispc_safety_error_irq_proc1</td>
10713 <td>0</td>
10714 </tr>
10715 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10716 <td>128</td>
10717 <td>232</td>
10718 <td>Not Connected</td>
10719 <td>&#160;</td>
10720 <td>&#160;</td>
10721 </tr>
10722 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10723 <td>128</td>
10724 <td>233</td>
10725 <td>Not Connected</td>
10726 <td>&#160;</td>
10727 <td>&#160;</td>
10728 </tr>
10729 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10730 <td>128</td>
10731 <td>234</td>
10732 <td>Not Connected</td>
10733 <td>&#160;</td>
10734 <td>&#160;</td>
10735 </tr>
10736 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10737 <td>128</td>
10738 <td>235</td>
10739 <td>Not Connected</td>
10740 <td>&#160;</td>
10741 <td>&#160;</td>
10742 </tr>
10743 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10744 <td>128</td>
10745 <td>236</td>
10746 <td>Not Connected</td>
10747 <td>&#160;</td>
10748 <td>&#160;</td>
10749 </tr>
10750 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10751 <td>128</td>
10752 <td>237</td>
10753 <td>Not Connected</td>
10754 <td>&#160;</td>
10755 <td>&#160;</td>
10756 </tr>
10757 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10758 <td>128</td>
10759 <td>238</td>
10760 <td>J721E_DEV_DSS_EDP0</td>
10761 <td>intr</td>
10762 <td>0</td>
10763 </tr>
10764 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10765 <td>128</td>
10766 <td>239</td>
10767 <td>J721E_DEV_DSS_EDP0</td>
10768 <td>intr</td>
10769 <td>1</td>
10770 </tr>
10771 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10772 <td>128</td>
10773 <td>240</td>
10774 <td>J721E_DEV_DSS_EDP0</td>
10775 <td>intr</td>
10776 <td>2</td>
10777 </tr>
10778 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10779 <td>128</td>
10780 <td>241</td>
10781 <td>J721E_DEV_DSS_EDP0</td>
10782 <td>intr</td>
10783 <td>3</td>
10784 </tr>
10785 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10786 <td>128</td>
10787 <td>242</td>
10788 <td>Not Connected</td>
10789 <td>&#160;</td>
10790 <td>&#160;</td>
10791 </tr>
10792 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10793 <td>128</td>
10794 <td>243</td>
10795 <td>Not Connected</td>
10796 <td>&#160;</td>
10797 <td>&#160;</td>
10798 </tr>
10799 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10800 <td>128</td>
10801 <td>244</td>
10802 <td>Not Connected</td>
10803 <td>&#160;</td>
10804 <td>&#160;</td>
10805 </tr>
10806 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10807 <td>128</td>
10808 <td>245</td>
10809 <td>Not Connected</td>
10810 <td>&#160;</td>
10811 <td>&#160;</td>
10812 </tr>
10813 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10814 <td>128</td>
10815 <td>246</td>
10816 <td>Not Connected</td>
10817 <td>&#160;</td>
10818 <td>&#160;</td>
10819 </tr>
10820 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10821 <td>128</td>
10822 <td>247</td>
10823 <td>Not Connected</td>
10824 <td>&#160;</td>
10825 <td>&#160;</td>
10826 </tr>
10827 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10828 <td>128</td>
10829 <td>248</td>
10830 <td>Not Connected</td>
10831 <td>&#160;</td>
10832 <td>&#160;</td>
10833 </tr>
10834 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10835 <td>128</td>
10836 <td>249</td>
10837 <td>Not Connected</td>
10838 <td>&#160;</td>
10839 <td>&#160;</td>
10840 </tr>
10841 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10842 <td>128</td>
10843 <td>250</td>
10844 <td>J721E_DEV_CSI_TX_IF0</td>
10845 <td>csi_interrupt</td>
10846 <td>0</td>
10847 </tr>
10848 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10849 <td>128</td>
10850 <td>251</td>
10851 <td>J721E_DEV_CSI_TX_IF0</td>
10852 <td>csi_level</td>
10853 <td>0</td>
10854 </tr>
10855 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10856 <td>128</td>
10857 <td>252</td>
10858 <td>J721E_DEV_DECODER0</td>
10859 <td>irq</td>
10860 <td>0</td>
10861 </tr>
10862 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10863 <td>128</td>
10864 <td>253</td>
10865 <td>J721E_DEV_ENCODER0</td>
10866 <td>irq</td>
10867 <td>0</td>
10868 </tr>
10869 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10870 <td>128</td>
10871 <td>254</td>
10872 <td>J721E_DEV_CSI_RX_IF0</td>
10873 <td>csi_irq</td>
10874 <td>0</td>
10875 </tr>
10876 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10877 <td>128</td>
10878 <td>255</td>
10879 <td>J721E_DEV_CSI_RX_IF0</td>
10880 <td>csi_err_irq</td>
10881 <td>0</td>
10882 </tr>
10883 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10884 <td>128</td>
10885 <td>256</td>
10886 <td>J721E_DEV_CSI_RX_IF0</td>
10887 <td>csi_level</td>
10888 <td>0</td>
10889 </tr>
10890 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10891 <td>128</td>
10892 <td>257</td>
10893 <td>J721E_DEV_CSI_RX_IF1</td>
10894 <td>csi_irq</td>
10895 <td>0</td>
10896 </tr>
10897 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10898 <td>128</td>
10899 <td>258</td>
10900 <td>J721E_DEV_CSI_RX_IF1</td>
10901 <td>csi_err_irq</td>
10902 <td>0</td>
10903 </tr>
10904 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10905 <td>128</td>
10906 <td>259</td>
10907 <td>J721E_DEV_CSI_RX_IF1</td>
10908 <td>csi_level</td>
10909 <td>0</td>
10910 </tr>
10911 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10912 <td>128</td>
10913 <td>260</td>
10914 <td>Not Connected</td>
10915 <td>&#160;</td>
10916 <td>&#160;</td>
10917 </tr>
10918 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10919 <td>128</td>
10920 <td>261</td>
10921 <td>Not Connected</td>
10922 <td>&#160;</td>
10923 <td>&#160;</td>
10924 </tr>
10925 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10926 <td>128</td>
10927 <td>262</td>
10928 <td>Not Connected</td>
10929 <td>&#160;</td>
10930 <td>&#160;</td>
10931 </tr>
10932 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10933 <td>128</td>
10934 <td>263</td>
10935 <td>Not Connected</td>
10936 <td>&#160;</td>
10937 <td>&#160;</td>
10938 </tr>
10939 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10940 <td>128</td>
10941 <td>264</td>
10942 <td>Not Connected</td>
10943 <td>&#160;</td>
10944 <td>&#160;</td>
10945 </tr>
10946 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10947 <td>128</td>
10948 <td>265</td>
10949 <td>Not Connected</td>
10950 <td>&#160;</td>
10951 <td>&#160;</td>
10952 </tr>
10953 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10954 <td>128</td>
10955 <td>266</td>
10956 <td>Not Connected</td>
10957 <td>&#160;</td>
10958 <td>&#160;</td>
10959 </tr>
10960 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10961 <td>128</td>
10962 <td>267</td>
10963 <td>Not Connected</td>
10964 <td>&#160;</td>
10965 <td>&#160;</td>
10966 </tr>
10967 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10968 <td>128</td>
10969 <td>268</td>
10970 <td>Not Connected</td>
10971 <td>&#160;</td>
10972 <td>&#160;</td>
10973 </tr>
10974 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10975 <td>128</td>
10976 <td>269</td>
10977 <td>Not Connected</td>
10978 <td>&#160;</td>
10979 <td>&#160;</td>
10980 </tr>
10981 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10982 <td>128</td>
10983 <td>270</td>
10984 <td>Not Connected</td>
10985 <td>&#160;</td>
10986 <td>&#160;</td>
10987 </tr>
10988 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10989 <td>128</td>
10990 <td>271</td>
10991 <td>Not Connected</td>
10992 <td>&#160;</td>
10993 <td>&#160;</td>
10994 </tr>
10995 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
10996 <td>128</td>
10997 <td>272</td>
10998 <td>Not Connected</td>
10999 <td>&#160;</td>
11000 <td>&#160;</td>
11001 </tr>
11002 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11003 <td>128</td>
11004 <td>273</td>
11005 <td>Not Connected</td>
11006 <td>&#160;</td>
11007 <td>&#160;</td>
11008 </tr>
11009 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11010 <td>128</td>
11011 <td>274</td>
11012 <td>Not Connected</td>
11013 <td>&#160;</td>
11014 <td>&#160;</td>
11015 </tr>
11016 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11017 <td>128</td>
11018 <td>275</td>
11019 <td>Not Connected</td>
11020 <td>&#160;</td>
11021 <td>&#160;</td>
11022 </tr>
11023 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11024 <td>128</td>
11025 <td>276</td>
11026 <td>J721E_DEV_VPFE0</td>
11027 <td>ccdc_intr_pend</td>
11028 <td>0</td>
11029 </tr>
11030 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11031 <td>128</td>
11032 <td>277</td>
11033 <td>J721E_DEV_VPFE0</td>
11034 <td>rat_exp_intr</td>
11035 <td>0</td>
11036 </tr>
11037 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11038 <td>128</td>
11039 <td>278</td>
11040 <td>J721E_DEV_MCAN4</td>
11041 <td>mcanss_mcan_lvl_int</td>
11042 <td>0</td>
11043 </tr>
11044 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11045 <td>128</td>
11046 <td>279</td>
11047 <td>J721E_DEV_MCAN4</td>
11048 <td>mcanss_mcan_lvl_int</td>
11049 <td>1</td>
11050 </tr>
11051 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11052 <td>128</td>
11053 <td>280</td>
11054 <td>J721E_DEV_MCAN4</td>
11055 <td>mcanss_ext_ts_rollover_lvl_int</td>
11056 <td>0</td>
11057 </tr>
11058 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11059 <td>128</td>
11060 <td>281</td>
11061 <td>J721E_DEV_MCAN5</td>
11062 <td>mcanss_mcan_lvl_int</td>
11063 <td>0</td>
11064 </tr>
11065 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11066 <td>128</td>
11067 <td>282</td>
11068 <td>J721E_DEV_MCAN5</td>
11069 <td>mcanss_mcan_lvl_int</td>
11070 <td>1</td>
11071 </tr>
11072 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11073 <td>128</td>
11074 <td>283</td>
11075 <td>J721E_DEV_MCAN5</td>
11076 <td>mcanss_ext_ts_rollover_lvl_int</td>
11077 <td>0</td>
11078 </tr>
11079 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11080 <td>128</td>
11081 <td>284</td>
11082 <td>J721E_DEV_MCAN6</td>
11083 <td>mcanss_mcan_lvl_int</td>
11084 <td>0</td>
11085 </tr>
11086 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11087 <td>128</td>
11088 <td>285</td>
11089 <td>J721E_DEV_MCAN6</td>
11090 <td>mcanss_mcan_lvl_int</td>
11091 <td>1</td>
11092 </tr>
11093 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11094 <td>128</td>
11095 <td>286</td>
11096 <td>J721E_DEV_MCAN6</td>
11097 <td>mcanss_ext_ts_rollover_lvl_int</td>
11098 <td>0</td>
11099 </tr>
11100 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11101 <td>128</td>
11102 <td>287</td>
11103 <td>J721E_DEV_MCAN7</td>
11104 <td>mcanss_mcan_lvl_int</td>
11105 <td>0</td>
11106 </tr>
11107 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11108 <td>128</td>
11109 <td>288</td>
11110 <td>J721E_DEV_MCAN7</td>
11111 <td>mcanss_mcan_lvl_int</td>
11112 <td>1</td>
11113 </tr>
11114 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11115 <td>128</td>
11116 <td>289</td>
11117 <td>J721E_DEV_MCAN7</td>
11118 <td>mcanss_ext_ts_rollover_lvl_int</td>
11119 <td>0</td>
11120 </tr>
11121 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11122 <td>128</td>
11123 <td>290</td>
11124 <td>J721E_DEV_MCAN8</td>
11125 <td>mcanss_mcan_lvl_int</td>
11126 <td>0</td>
11127 </tr>
11128 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11129 <td>128</td>
11130 <td>291</td>
11131 <td>J721E_DEV_MCAN8</td>
11132 <td>mcanss_mcan_lvl_int</td>
11133 <td>1</td>
11134 </tr>
11135 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11136 <td>128</td>
11137 <td>292</td>
11138 <td>J721E_DEV_MCAN8</td>
11139 <td>mcanss_ext_ts_rollover_lvl_int</td>
11140 <td>0</td>
11141 </tr>
11142 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11143 <td>128</td>
11144 <td>293</td>
11145 <td>J721E_DEV_MCAN9</td>
11146 <td>mcanss_mcan_lvl_int</td>
11147 <td>0</td>
11148 </tr>
11149 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11150 <td>128</td>
11151 <td>294</td>
11152 <td>J721E_DEV_MCAN9</td>
11153 <td>mcanss_mcan_lvl_int</td>
11154 <td>1</td>
11155 </tr>
11156 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11157 <td>128</td>
11158 <td>295</td>
11159 <td>J721E_DEV_MCAN9</td>
11160 <td>mcanss_ext_ts_rollover_lvl_int</td>
11161 <td>0</td>
11162 </tr>
11163 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11164 <td>128</td>
11165 <td>296</td>
11166 <td>J721E_DEV_MCAN10</td>
11167 <td>mcanss_mcan_lvl_int</td>
11168 <td>0</td>
11169 </tr>
11170 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11171 <td>128</td>
11172 <td>297</td>
11173 <td>J721E_DEV_MCAN10</td>
11174 <td>mcanss_mcan_lvl_int</td>
11175 <td>1</td>
11176 </tr>
11177 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11178 <td>128</td>
11179 <td>298</td>
11180 <td>J721E_DEV_MCAN10</td>
11181 <td>mcanss_ext_ts_rollover_lvl_int</td>
11182 <td>0</td>
11183 </tr>
11184 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11185 <td>128</td>
11186 <td>299</td>
11187 <td>J721E_DEV_MCAN11</td>
11188 <td>mcanss_mcan_lvl_int</td>
11189 <td>0</td>
11190 </tr>
11191 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11192 <td>128</td>
11193 <td>300</td>
11194 <td>J721E_DEV_MCAN11</td>
11195 <td>mcanss_mcan_lvl_int</td>
11196 <td>1</td>
11197 </tr>
11198 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11199 <td>128</td>
11200 <td>301</td>
11201 <td>J721E_DEV_MCAN11</td>
11202 <td>mcanss_ext_ts_rollover_lvl_int</td>
11203 <td>0</td>
11204 </tr>
11205 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11206 <td>128</td>
11207 <td>302</td>
11208 <td>J721E_DEV_MCAN12</td>
11209 <td>mcanss_mcan_lvl_int</td>
11210 <td>0</td>
11211 </tr>
11212 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11213 <td>128</td>
11214 <td>303</td>
11215 <td>J721E_DEV_MCAN12</td>
11216 <td>mcanss_mcan_lvl_int</td>
11217 <td>1</td>
11218 </tr>
11219 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11220 <td>128</td>
11221 <td>304</td>
11222 <td>J721E_DEV_MCAN12</td>
11223 <td>mcanss_ext_ts_rollover_lvl_int</td>
11224 <td>0</td>
11225 </tr>
11226 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11227 <td>128</td>
11228 <td>305</td>
11229 <td>J721E_DEV_MCAN13</td>
11230 <td>mcanss_mcan_lvl_int</td>
11231 <td>0</td>
11232 </tr>
11233 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11234 <td>128</td>
11235 <td>306</td>
11236 <td>J721E_DEV_MCAN13</td>
11237 <td>mcanss_mcan_lvl_int</td>
11238 <td>1</td>
11239 </tr>
11240 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11241 <td>128</td>
11242 <td>307</td>
11243 <td>J721E_DEV_MCAN13</td>
11244 <td>mcanss_ext_ts_rollover_lvl_int</td>
11245 <td>0</td>
11246 </tr>
11247 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11248 <td>128</td>
11249 <td>308</td>
11250 <td>Not Connected</td>
11251 <td>&#160;</td>
11252 <td>&#160;</td>
11253 </tr>
11254 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11255 <td>128</td>
11256 <td>309</td>
11257 <td>Not Connected</td>
11258 <td>&#160;</td>
11259 <td>&#160;</td>
11260 </tr>
11261 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11262 <td>128</td>
11263 <td>310</td>
11264 <td>Not Connected</td>
11265 <td>&#160;</td>
11266 <td>&#160;</td>
11267 </tr>
11268 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11269 <td>128</td>
11270 <td>311</td>
11271 <td>Not Connected</td>
11272 <td>&#160;</td>
11273 <td>&#160;</td>
11274 </tr>
11275 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11276 <td>128</td>
11277 <td>312</td>
11278 <td>Not Connected</td>
11279 <td>&#160;</td>
11280 <td>&#160;</td>
11281 </tr>
11282 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11283 <td>128</td>
11284 <td>313</td>
11285 <td>Not Connected</td>
11286 <td>&#160;</td>
11287 <td>&#160;</td>
11288 </tr>
11289 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11290 <td>128</td>
11291 <td>314</td>
11292 <td>Not Connected</td>
11293 <td>&#160;</td>
11294 <td>&#160;</td>
11295 </tr>
11296 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11297 <td>128</td>
11298 <td>315</td>
11299 <td>Not Connected</td>
11300 <td>&#160;</td>
11301 <td>&#160;</td>
11302 </tr>
11303 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11304 <td>128</td>
11305 <td>316</td>
11306 <td>Not Connected</td>
11307 <td>&#160;</td>
11308 <td>&#160;</td>
11309 </tr>
11310 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11311 <td>128</td>
11312 <td>317</td>
11313 <td>Not Connected</td>
11314 <td>&#160;</td>
11315 <td>&#160;</td>
11316 </tr>
11317 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11318 <td>128</td>
11319 <td>318</td>
11320 <td>Not Connected</td>
11321 <td>&#160;</td>
11322 <td>&#160;</td>
11323 </tr>
11324 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11325 <td>128</td>
11326 <td>319</td>
11327 <td>Not Connected</td>
11328 <td>&#160;</td>
11329 <td>&#160;</td>
11330 </tr>
11331 </tbody>
11332 </table>
11333 </div>
11334 <div class="section" id="main2mcu-lvl-intrtr0-interrupt-router-output-destinations">
11335 <span id="pub-soc-j721e-main2mcu-lvl-intrtr0-output-src-list"></span><h2>MAIN2MCU_LVL_INTRTR0 Interrupt Router Output Destinations<a class="headerlink" href="#main2mcu-lvl-intrtr0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
11336 <div class="admonition warning">
11337 <p class="first admonition-title">Warning</p>
11338 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
11339 host within the RM Board Configuration resource assignment array.  The RM
11340 Board Configuration is rejected if an overlap with a reserved resource is
11341 detected.</p>
11342 </div>
11343 <table border="1" class="docutils">
11344 <colgroup>
11345 <col width="23%" />
11346 <col width="11%" />
11347 <col width="13%" />
11348 <col width="20%" />
11349 <col width="18%" />
11350 <col width="15%" />
11351 </colgroup>
11352 <thead valign="bottom">
11353 <tr class="row-odd"><th class="head">IR Name</th>
11354 <th class="head">IR Device ID</th>
11355 <th class="head">IR Output Index</th>
11356 <th class="head">Destination Name</th>
11357 <th class="head">Destination Interface</th>
11358 <th class="head">Destination Index</th>
11359 </tr>
11360 </thead>
11361 <tbody valign="top">
11362 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11363 <td>128</td>
11364 <td>0</td>
11365 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11366 <td>intr</td>
11367 <td>160</td>
11368 </tr>
11369 <tr class="row-odd"><td>&#160;</td>
11370 <td>&#160;</td>
11371 <td>&#160;</td>
11372 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11373 <td>intr</td>
11374 <td>160</td>
11375 </tr>
11376 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11377 <td>128</td>
11378 <td>1</td>
11379 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11380 <td>intr</td>
11381 <td>161</td>
11382 </tr>
11383 <tr class="row-odd"><td>&#160;</td>
11384 <td>&#160;</td>
11385 <td>&#160;</td>
11386 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11387 <td>intr</td>
11388 <td>161</td>
11389 </tr>
11390 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11391 <td>128</td>
11392 <td>2</td>
11393 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11394 <td>intr</td>
11395 <td>162</td>
11396 </tr>
11397 <tr class="row-odd"><td>&#160;</td>
11398 <td>&#160;</td>
11399 <td>&#160;</td>
11400 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11401 <td>intr</td>
11402 <td>162</td>
11403 </tr>
11404 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11405 <td>128</td>
11406 <td>3</td>
11407 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11408 <td>intr</td>
11409 <td>163</td>
11410 </tr>
11411 <tr class="row-odd"><td>&#160;</td>
11412 <td>&#160;</td>
11413 <td>&#160;</td>
11414 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11415 <td>intr</td>
11416 <td>163</td>
11417 </tr>
11418 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11419 <td>128</td>
11420 <td>4</td>
11421 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11422 <td>intr</td>
11423 <td>164</td>
11424 </tr>
11425 <tr class="row-odd"><td>&#160;</td>
11426 <td>&#160;</td>
11427 <td>&#160;</td>
11428 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11429 <td>intr</td>
11430 <td>164</td>
11431 </tr>
11432 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11433 <td>128</td>
11434 <td>5</td>
11435 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11436 <td>intr</td>
11437 <td>165</td>
11438 </tr>
11439 <tr class="row-odd"><td>&#160;</td>
11440 <td>&#160;</td>
11441 <td>&#160;</td>
11442 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11443 <td>intr</td>
11444 <td>165</td>
11445 </tr>
11446 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11447 <td>128</td>
11448 <td>6</td>
11449 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11450 <td>intr</td>
11451 <td>166</td>
11452 </tr>
11453 <tr class="row-odd"><td>&#160;</td>
11454 <td>&#160;</td>
11455 <td>&#160;</td>
11456 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11457 <td>intr</td>
11458 <td>166</td>
11459 </tr>
11460 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11461 <td>128</td>
11462 <td>7</td>
11463 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11464 <td>intr</td>
11465 <td>167</td>
11466 </tr>
11467 <tr class="row-odd"><td>&#160;</td>
11468 <td>&#160;</td>
11469 <td>&#160;</td>
11470 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11471 <td>intr</td>
11472 <td>167</td>
11473 </tr>
11474 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11475 <td>128</td>
11476 <td>8</td>
11477 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11478 <td>intr</td>
11479 <td>168</td>
11480 </tr>
11481 <tr class="row-odd"><td>&#160;</td>
11482 <td>&#160;</td>
11483 <td>&#160;</td>
11484 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11485 <td>intr</td>
11486 <td>168</td>
11487 </tr>
11488 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11489 <td>128</td>
11490 <td>9</td>
11491 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11492 <td>intr</td>
11493 <td>169</td>
11494 </tr>
11495 <tr class="row-odd"><td>&#160;</td>
11496 <td>&#160;</td>
11497 <td>&#160;</td>
11498 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11499 <td>intr</td>
11500 <td>169</td>
11501 </tr>
11502 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11503 <td>128</td>
11504 <td>10</td>
11505 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11506 <td>intr</td>
11507 <td>170</td>
11508 </tr>
11509 <tr class="row-odd"><td>&#160;</td>
11510 <td>&#160;</td>
11511 <td>&#160;</td>
11512 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11513 <td>intr</td>
11514 <td>170</td>
11515 </tr>
11516 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11517 <td>128</td>
11518 <td>11</td>
11519 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11520 <td>intr</td>
11521 <td>171</td>
11522 </tr>
11523 <tr class="row-odd"><td>&#160;</td>
11524 <td>&#160;</td>
11525 <td>&#160;</td>
11526 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11527 <td>intr</td>
11528 <td>171</td>
11529 </tr>
11530 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11531 <td>128</td>
11532 <td>12</td>
11533 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11534 <td>intr</td>
11535 <td>172</td>
11536 </tr>
11537 <tr class="row-odd"><td>&#160;</td>
11538 <td>&#160;</td>
11539 <td>&#160;</td>
11540 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11541 <td>intr</td>
11542 <td>172</td>
11543 </tr>
11544 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11545 <td>128</td>
11546 <td>13</td>
11547 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11548 <td>intr</td>
11549 <td>173</td>
11550 </tr>
11551 <tr class="row-odd"><td>&#160;</td>
11552 <td>&#160;</td>
11553 <td>&#160;</td>
11554 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11555 <td>intr</td>
11556 <td>173</td>
11557 </tr>
11558 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11559 <td>128</td>
11560 <td>14</td>
11561 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11562 <td>intr</td>
11563 <td>174</td>
11564 </tr>
11565 <tr class="row-odd"><td>&#160;</td>
11566 <td>&#160;</td>
11567 <td>&#160;</td>
11568 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11569 <td>intr</td>
11570 <td>174</td>
11571 </tr>
11572 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11573 <td>128</td>
11574 <td>15</td>
11575 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11576 <td>intr</td>
11577 <td>175</td>
11578 </tr>
11579 <tr class="row-odd"><td>&#160;</td>
11580 <td>&#160;</td>
11581 <td>&#160;</td>
11582 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11583 <td>intr</td>
11584 <td>175</td>
11585 </tr>
11586 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11587 <td>128</td>
11588 <td>16</td>
11589 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11590 <td>intr</td>
11591 <td>176</td>
11592 </tr>
11593 <tr class="row-odd"><td>&#160;</td>
11594 <td>&#160;</td>
11595 <td>&#160;</td>
11596 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11597 <td>intr</td>
11598 <td>176</td>
11599 </tr>
11600 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11601 <td>128</td>
11602 <td>17</td>
11603 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11604 <td>intr</td>
11605 <td>177</td>
11606 </tr>
11607 <tr class="row-odd"><td>&#160;</td>
11608 <td>&#160;</td>
11609 <td>&#160;</td>
11610 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11611 <td>intr</td>
11612 <td>177</td>
11613 </tr>
11614 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11615 <td>128</td>
11616 <td>18</td>
11617 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11618 <td>intr</td>
11619 <td>178</td>
11620 </tr>
11621 <tr class="row-odd"><td>&#160;</td>
11622 <td>&#160;</td>
11623 <td>&#160;</td>
11624 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11625 <td>intr</td>
11626 <td>178</td>
11627 </tr>
11628 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11629 <td>128</td>
11630 <td>19</td>
11631 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11632 <td>intr</td>
11633 <td>179</td>
11634 </tr>
11635 <tr class="row-odd"><td>&#160;</td>
11636 <td>&#160;</td>
11637 <td>&#160;</td>
11638 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11639 <td>intr</td>
11640 <td>179</td>
11641 </tr>
11642 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11643 <td>128</td>
11644 <td>20</td>
11645 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11646 <td>intr</td>
11647 <td>180</td>
11648 </tr>
11649 <tr class="row-odd"><td>&#160;</td>
11650 <td>&#160;</td>
11651 <td>&#160;</td>
11652 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11653 <td>intr</td>
11654 <td>180</td>
11655 </tr>
11656 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11657 <td>128</td>
11658 <td>21</td>
11659 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11660 <td>intr</td>
11661 <td>181</td>
11662 </tr>
11663 <tr class="row-odd"><td>&#160;</td>
11664 <td>&#160;</td>
11665 <td>&#160;</td>
11666 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11667 <td>intr</td>
11668 <td>181</td>
11669 </tr>
11670 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11671 <td>128</td>
11672 <td>22</td>
11673 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11674 <td>intr</td>
11675 <td>182</td>
11676 </tr>
11677 <tr class="row-odd"><td>&#160;</td>
11678 <td>&#160;</td>
11679 <td>&#160;</td>
11680 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11681 <td>intr</td>
11682 <td>182</td>
11683 </tr>
11684 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11685 <td>128</td>
11686 <td>23</td>
11687 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11688 <td>intr</td>
11689 <td>183</td>
11690 </tr>
11691 <tr class="row-odd"><td>&#160;</td>
11692 <td>&#160;</td>
11693 <td>&#160;</td>
11694 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11695 <td>intr</td>
11696 <td>183</td>
11697 </tr>
11698 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11699 <td>128</td>
11700 <td>24</td>
11701 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11702 <td>intr</td>
11703 <td>184</td>
11704 </tr>
11705 <tr class="row-odd"><td>&#160;</td>
11706 <td>&#160;</td>
11707 <td>&#160;</td>
11708 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11709 <td>intr</td>
11710 <td>184</td>
11711 </tr>
11712 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11713 <td>128</td>
11714 <td>25</td>
11715 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11716 <td>intr</td>
11717 <td>185</td>
11718 </tr>
11719 <tr class="row-odd"><td>&#160;</td>
11720 <td>&#160;</td>
11721 <td>&#160;</td>
11722 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11723 <td>intr</td>
11724 <td>185</td>
11725 </tr>
11726 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11727 <td>128</td>
11728 <td>26</td>
11729 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11730 <td>intr</td>
11731 <td>186</td>
11732 </tr>
11733 <tr class="row-odd"><td>&#160;</td>
11734 <td>&#160;</td>
11735 <td>&#160;</td>
11736 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11737 <td>intr</td>
11738 <td>186</td>
11739 </tr>
11740 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11741 <td>128</td>
11742 <td>27</td>
11743 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11744 <td>intr</td>
11745 <td>187</td>
11746 </tr>
11747 <tr class="row-odd"><td>&#160;</td>
11748 <td>&#160;</td>
11749 <td>&#160;</td>
11750 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11751 <td>intr</td>
11752 <td>187</td>
11753 </tr>
11754 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11755 <td>128</td>
11756 <td>28</td>
11757 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11758 <td>intr</td>
11759 <td>188</td>
11760 </tr>
11761 <tr class="row-odd"><td>&#160;</td>
11762 <td>&#160;</td>
11763 <td>&#160;</td>
11764 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11765 <td>intr</td>
11766 <td>188</td>
11767 </tr>
11768 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11769 <td>128</td>
11770 <td>29</td>
11771 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11772 <td>intr</td>
11773 <td>189</td>
11774 </tr>
11775 <tr class="row-odd"><td>&#160;</td>
11776 <td>&#160;</td>
11777 <td>&#160;</td>
11778 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11779 <td>intr</td>
11780 <td>189</td>
11781 </tr>
11782 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11783 <td>128</td>
11784 <td>30</td>
11785 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11786 <td>intr</td>
11787 <td>190</td>
11788 </tr>
11789 <tr class="row-odd"><td>&#160;</td>
11790 <td>&#160;</td>
11791 <td>&#160;</td>
11792 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11793 <td>intr</td>
11794 <td>190</td>
11795 </tr>
11796 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11797 <td>128</td>
11798 <td>31</td>
11799 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11800 <td>intr</td>
11801 <td>191</td>
11802 </tr>
11803 <tr class="row-odd"><td>&#160;</td>
11804 <td>&#160;</td>
11805 <td>&#160;</td>
11806 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11807 <td>intr</td>
11808 <td>191</td>
11809 </tr>
11810 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11811 <td>128</td>
11812 <td>32</td>
11813 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11814 <td>intr</td>
11815 <td>192</td>
11816 </tr>
11817 <tr class="row-odd"><td>&#160;</td>
11818 <td>&#160;</td>
11819 <td>&#160;</td>
11820 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11821 <td>intr</td>
11822 <td>192</td>
11823 </tr>
11824 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11825 <td>128</td>
11826 <td>33</td>
11827 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11828 <td>intr</td>
11829 <td>193</td>
11830 </tr>
11831 <tr class="row-odd"><td>&#160;</td>
11832 <td>&#160;</td>
11833 <td>&#160;</td>
11834 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11835 <td>intr</td>
11836 <td>193</td>
11837 </tr>
11838 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11839 <td>128</td>
11840 <td>34</td>
11841 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11842 <td>intr</td>
11843 <td>194</td>
11844 </tr>
11845 <tr class="row-odd"><td>&#160;</td>
11846 <td>&#160;</td>
11847 <td>&#160;</td>
11848 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11849 <td>intr</td>
11850 <td>194</td>
11851 </tr>
11852 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11853 <td>128</td>
11854 <td>35</td>
11855 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11856 <td>intr</td>
11857 <td>195</td>
11858 </tr>
11859 <tr class="row-odd"><td>&#160;</td>
11860 <td>&#160;</td>
11861 <td>&#160;</td>
11862 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11863 <td>intr</td>
11864 <td>195</td>
11865 </tr>
11866 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11867 <td>128</td>
11868 <td>36</td>
11869 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11870 <td>intr</td>
11871 <td>196</td>
11872 </tr>
11873 <tr class="row-odd"><td>&#160;</td>
11874 <td>&#160;</td>
11875 <td>&#160;</td>
11876 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11877 <td>intr</td>
11878 <td>196</td>
11879 </tr>
11880 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11881 <td>128</td>
11882 <td>37</td>
11883 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11884 <td>intr</td>
11885 <td>197</td>
11886 </tr>
11887 <tr class="row-odd"><td>&#160;</td>
11888 <td>&#160;</td>
11889 <td>&#160;</td>
11890 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11891 <td>intr</td>
11892 <td>197</td>
11893 </tr>
11894 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11895 <td>128</td>
11896 <td>38</td>
11897 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11898 <td>intr</td>
11899 <td>198</td>
11900 </tr>
11901 <tr class="row-odd"><td>&#160;</td>
11902 <td>&#160;</td>
11903 <td>&#160;</td>
11904 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11905 <td>intr</td>
11906 <td>198</td>
11907 </tr>
11908 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11909 <td>128</td>
11910 <td>39</td>
11911 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11912 <td>intr</td>
11913 <td>199</td>
11914 </tr>
11915 <tr class="row-odd"><td>&#160;</td>
11916 <td>&#160;</td>
11917 <td>&#160;</td>
11918 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11919 <td>intr</td>
11920 <td>199</td>
11921 </tr>
11922 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11923 <td>128</td>
11924 <td>40</td>
11925 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11926 <td>intr</td>
11927 <td>200</td>
11928 </tr>
11929 <tr class="row-odd"><td>&#160;</td>
11930 <td>&#160;</td>
11931 <td>&#160;</td>
11932 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11933 <td>intr</td>
11934 <td>200</td>
11935 </tr>
11936 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11937 <td>128</td>
11938 <td>41</td>
11939 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11940 <td>intr</td>
11941 <td>201</td>
11942 </tr>
11943 <tr class="row-odd"><td>&#160;</td>
11944 <td>&#160;</td>
11945 <td>&#160;</td>
11946 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11947 <td>intr</td>
11948 <td>201</td>
11949 </tr>
11950 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11951 <td>128</td>
11952 <td>42</td>
11953 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11954 <td>intr</td>
11955 <td>202</td>
11956 </tr>
11957 <tr class="row-odd"><td>&#160;</td>
11958 <td>&#160;</td>
11959 <td>&#160;</td>
11960 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11961 <td>intr</td>
11962 <td>202</td>
11963 </tr>
11964 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11965 <td>128</td>
11966 <td>43</td>
11967 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11968 <td>intr</td>
11969 <td>203</td>
11970 </tr>
11971 <tr class="row-odd"><td>&#160;</td>
11972 <td>&#160;</td>
11973 <td>&#160;</td>
11974 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11975 <td>intr</td>
11976 <td>203</td>
11977 </tr>
11978 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11979 <td>128</td>
11980 <td>44</td>
11981 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11982 <td>intr</td>
11983 <td>204</td>
11984 </tr>
11985 <tr class="row-odd"><td>&#160;</td>
11986 <td>&#160;</td>
11987 <td>&#160;</td>
11988 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
11989 <td>intr</td>
11990 <td>204</td>
11991 </tr>
11992 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
11993 <td>128</td>
11994 <td>45</td>
11995 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
11996 <td>intr</td>
11997 <td>205</td>
11998 </tr>
11999 <tr class="row-odd"><td>&#160;</td>
12000 <td>&#160;</td>
12001 <td>&#160;</td>
12002 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12003 <td>intr</td>
12004 <td>205</td>
12005 </tr>
12006 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12007 <td>128</td>
12008 <td>46</td>
12009 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12010 <td>intr</td>
12011 <td>206</td>
12012 </tr>
12013 <tr class="row-odd"><td>&#160;</td>
12014 <td>&#160;</td>
12015 <td>&#160;</td>
12016 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12017 <td>intr</td>
12018 <td>206</td>
12019 </tr>
12020 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12021 <td>128</td>
12022 <td>47</td>
12023 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12024 <td>intr</td>
12025 <td>207</td>
12026 </tr>
12027 <tr class="row-odd"><td>&#160;</td>
12028 <td>&#160;</td>
12029 <td>&#160;</td>
12030 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12031 <td>intr</td>
12032 <td>207</td>
12033 </tr>
12034 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12035 <td>128</td>
12036 <td>48</td>
12037 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12038 <td>intr</td>
12039 <td>208</td>
12040 </tr>
12041 <tr class="row-odd"><td>&#160;</td>
12042 <td>&#160;</td>
12043 <td>&#160;</td>
12044 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12045 <td>intr</td>
12046 <td>208</td>
12047 </tr>
12048 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12049 <td>128</td>
12050 <td>49</td>
12051 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12052 <td>intr</td>
12053 <td>209</td>
12054 </tr>
12055 <tr class="row-odd"><td>&#160;</td>
12056 <td>&#160;</td>
12057 <td>&#160;</td>
12058 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12059 <td>intr</td>
12060 <td>209</td>
12061 </tr>
12062 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12063 <td>128</td>
12064 <td>50</td>
12065 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12066 <td>intr</td>
12067 <td>210</td>
12068 </tr>
12069 <tr class="row-odd"><td>&#160;</td>
12070 <td>&#160;</td>
12071 <td>&#160;</td>
12072 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12073 <td>intr</td>
12074 <td>210</td>
12075 </tr>
12076 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12077 <td>128</td>
12078 <td>51</td>
12079 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12080 <td>intr</td>
12081 <td>211</td>
12082 </tr>
12083 <tr class="row-odd"><td>&#160;</td>
12084 <td>&#160;</td>
12085 <td>&#160;</td>
12086 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12087 <td>intr</td>
12088 <td>211</td>
12089 </tr>
12090 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12091 <td>128</td>
12092 <td>52</td>
12093 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12094 <td>intr</td>
12095 <td>212</td>
12096 </tr>
12097 <tr class="row-odd"><td>&#160;</td>
12098 <td>&#160;</td>
12099 <td>&#160;</td>
12100 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12101 <td>intr</td>
12102 <td>212</td>
12103 </tr>
12104 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12105 <td>128</td>
12106 <td>53</td>
12107 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12108 <td>intr</td>
12109 <td>213</td>
12110 </tr>
12111 <tr class="row-odd"><td>&#160;</td>
12112 <td>&#160;</td>
12113 <td>&#160;</td>
12114 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12115 <td>intr</td>
12116 <td>213</td>
12117 </tr>
12118 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12119 <td>128</td>
12120 <td>54</td>
12121 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12122 <td>intr</td>
12123 <td>214</td>
12124 </tr>
12125 <tr class="row-odd"><td>&#160;</td>
12126 <td>&#160;</td>
12127 <td>&#160;</td>
12128 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12129 <td>intr</td>
12130 <td>214</td>
12131 </tr>
12132 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12133 <td>128</td>
12134 <td>55</td>
12135 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12136 <td>intr</td>
12137 <td>215</td>
12138 </tr>
12139 <tr class="row-odd"><td>&#160;</td>
12140 <td>&#160;</td>
12141 <td>&#160;</td>
12142 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12143 <td>intr</td>
12144 <td>215</td>
12145 </tr>
12146 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12147 <td>128</td>
12148 <td>56</td>
12149 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12150 <td>intr</td>
12151 <td>216</td>
12152 </tr>
12153 <tr class="row-odd"><td>&#160;</td>
12154 <td>&#160;</td>
12155 <td>&#160;</td>
12156 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12157 <td>intr</td>
12158 <td>216</td>
12159 </tr>
12160 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12161 <td>128</td>
12162 <td>57</td>
12163 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12164 <td>intr</td>
12165 <td>217</td>
12166 </tr>
12167 <tr class="row-odd"><td>&#160;</td>
12168 <td>&#160;</td>
12169 <td>&#160;</td>
12170 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12171 <td>intr</td>
12172 <td>217</td>
12173 </tr>
12174 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12175 <td>128</td>
12176 <td>58</td>
12177 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12178 <td>intr</td>
12179 <td>218</td>
12180 </tr>
12181 <tr class="row-odd"><td>&#160;</td>
12182 <td>&#160;</td>
12183 <td>&#160;</td>
12184 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12185 <td>intr</td>
12186 <td>218</td>
12187 </tr>
12188 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12189 <td>128</td>
12190 <td>59</td>
12191 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12192 <td>intr</td>
12193 <td>219</td>
12194 </tr>
12195 <tr class="row-odd"><td>&#160;</td>
12196 <td>&#160;</td>
12197 <td>&#160;</td>
12198 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12199 <td>intr</td>
12200 <td>219</td>
12201 </tr>
12202 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12203 <td>128</td>
12204 <td>60</td>
12205 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12206 <td>intr</td>
12207 <td>220</td>
12208 </tr>
12209 <tr class="row-odd"><td>&#160;</td>
12210 <td>&#160;</td>
12211 <td>&#160;</td>
12212 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12213 <td>intr</td>
12214 <td>220</td>
12215 </tr>
12216 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12217 <td>128</td>
12218 <td>61</td>
12219 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12220 <td>intr</td>
12221 <td>221</td>
12222 </tr>
12223 <tr class="row-odd"><td>&#160;</td>
12224 <td>&#160;</td>
12225 <td>&#160;</td>
12226 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12227 <td>intr</td>
12228 <td>221</td>
12229 </tr>
12230 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12231 <td>128</td>
12232 <td>62</td>
12233 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12234 <td>intr</td>
12235 <td>222</td>
12236 </tr>
12237 <tr class="row-odd"><td>&#160;</td>
12238 <td>&#160;</td>
12239 <td>&#160;</td>
12240 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12241 <td>intr</td>
12242 <td>222</td>
12243 </tr>
12244 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_LVL_INTRTR0</td>
12245 <td>128</td>
12246 <td>63</td>
12247 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
12248 <td>intr</td>
12249 <td>223</td>
12250 </tr>
12251 <tr class="row-odd"><td>&#160;</td>
12252 <td>&#160;</td>
12253 <td>&#160;</td>
12254 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
12255 <td>intr</td>
12256 <td>223</td>
12257 </tr>
12258 </tbody>
12259 </table>
12260 </div>
12261 <div class="section" id="main2mcu-pls-intrtr0-interrupt-router-input-sources">
12262 <span id="pub-soc-j721e-main2mcu-pls-intrtr0-input-src-list"></span><h2>MAIN2MCU_PLS_INTRTR0 Interrupt Router Input Sources<a class="headerlink" href="#main2mcu-pls-intrtr0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
12263 <div class="admonition warning">
12264 <p class="first admonition-title">Warning</p>
12265 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
12266 host within the RM Board Configuration resource assignment array.  The RM
12267 Board Configuration is rejected if an overlap with a reserved resource is
12268 detected.</p>
12269 </div>
12270 <table border="1" class="docutils">
12271 <colgroup>
12272 <col width="24%" />
12273 <col width="12%" />
12274 <col width="14%" />
12275 <col width="21%" />
12276 <col width="17%" />
12277 <col width="12%" />
12278 </colgroup>
12279 <thead valign="bottom">
12280 <tr class="row-odd"><th class="head">IR Name</th>
12281 <th class="head">IR Device ID</th>
12282 <th class="head">IR Input Index</th>
12283 <th class="head">Source Name</th>
12284 <th class="head">Source Interface</th>
12285 <th class="head">Source Index</th>
12286 </tr>
12287 </thead>
12288 <tbody valign="top">
12289 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12290 <td>130</td>
12291 <td>0</td>
12292 <td>Not Connected</td>
12293 <td>&#160;</td>
12294 <td>&#160;</td>
12295 </tr>
12296 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12297 <td>130</td>
12298 <td>1</td>
12299 <td>Not Connected</td>
12300 <td>&#160;</td>
12301 <td>&#160;</td>
12302 </tr>
12303 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12304 <td>130</td>
12305 <td>2</td>
12306 <td>J721E_DEV_EHRPWM0</td>
12307 <td>epwm_etint</td>
12308 <td>0</td>
12309 </tr>
12310 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12311 <td>130</td>
12312 <td>3</td>
12313 <td>J721E_DEV_EHRPWM1</td>
12314 <td>epwm_etint</td>
12315 <td>0</td>
12316 </tr>
12317 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12318 <td>130</td>
12319 <td>4</td>
12320 <td>J721E_DEV_EHRPWM2</td>
12321 <td>epwm_etint</td>
12322 <td>0</td>
12323 </tr>
12324 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12325 <td>130</td>
12326 <td>5</td>
12327 <td>J721E_DEV_EHRPWM3</td>
12328 <td>epwm_etint</td>
12329 <td>0</td>
12330 </tr>
12331 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12332 <td>130</td>
12333 <td>6</td>
12334 <td>J721E_DEV_EHRPWM4</td>
12335 <td>epwm_etint</td>
12336 <td>0</td>
12337 </tr>
12338 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12339 <td>130</td>
12340 <td>7</td>
12341 <td>J721E_DEV_EHRPWM5</td>
12342 <td>epwm_etint</td>
12343 <td>0</td>
12344 </tr>
12345 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12346 <td>130</td>
12347 <td>8</td>
12348 <td>J721E_DEV_EHRPWM0</td>
12349 <td>epwm_tripzint</td>
12350 <td>0</td>
12351 </tr>
12352 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12353 <td>130</td>
12354 <td>9</td>
12355 <td>J721E_DEV_EHRPWM1</td>
12356 <td>epwm_tripzint</td>
12357 <td>0</td>
12358 </tr>
12359 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12360 <td>130</td>
12361 <td>10</td>
12362 <td>J721E_DEV_EHRPWM2</td>
12363 <td>epwm_tripzint</td>
12364 <td>0</td>
12365 </tr>
12366 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12367 <td>130</td>
12368 <td>11</td>
12369 <td>J721E_DEV_EHRPWM3</td>
12370 <td>epwm_tripzint</td>
12371 <td>0</td>
12372 </tr>
12373 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12374 <td>130</td>
12375 <td>12</td>
12376 <td>J721E_DEV_EHRPWM4</td>
12377 <td>epwm_tripzint</td>
12378 <td>0</td>
12379 </tr>
12380 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12381 <td>130</td>
12382 <td>13</td>
12383 <td>J721E_DEV_EHRPWM5</td>
12384 <td>epwm_tripzint</td>
12385 <td>0</td>
12386 </tr>
12387 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12388 <td>130</td>
12389 <td>14</td>
12390 <td>J721E_DEV_EQEP0</td>
12391 <td>eqep_int</td>
12392 <td>0</td>
12393 </tr>
12394 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12395 <td>130</td>
12396 <td>15</td>
12397 <td>J721E_DEV_EQEP1</td>
12398 <td>eqep_int</td>
12399 <td>0</td>
12400 </tr>
12401 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12402 <td>130</td>
12403 <td>16</td>
12404 <td>J721E_DEV_EQEP2</td>
12405 <td>eqep_int</td>
12406 <td>0</td>
12407 </tr>
12408 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12409 <td>130</td>
12410 <td>17</td>
12411 <td>J721E_DEV_ECAP0</td>
12412 <td>ecap_int</td>
12413 <td>0</td>
12414 </tr>
12415 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12416 <td>130</td>
12417 <td>18</td>
12418 <td>J721E_DEV_ECAP1</td>
12419 <td>ecap_int</td>
12420 <td>0</td>
12421 </tr>
12422 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12423 <td>130</td>
12424 <td>19</td>
12425 <td>J721E_DEV_ECAP2</td>
12426 <td>ecap_int</td>
12427 <td>0</td>
12428 </tr>
12429 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12430 <td>130</td>
12431 <td>20</td>
12432 <td>J721E_DEV_PRU_ICSSG0</td>
12433 <td>pr1_tx_sof_intr_req</td>
12434 <td>0</td>
12435 </tr>
12436 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12437 <td>130</td>
12438 <td>21</td>
12439 <td>J721E_DEV_PRU_ICSSG0</td>
12440 <td>pr1_tx_sof_intr_req</td>
12441 <td>1</td>
12442 </tr>
12443 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12444 <td>130</td>
12445 <td>22</td>
12446 <td>J721E_DEV_PRU_ICSSG0</td>
12447 <td>pr1_rx_sof_intr_req</td>
12448 <td>0</td>
12449 </tr>
12450 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12451 <td>130</td>
12452 <td>23</td>
12453 <td>J721E_DEV_PRU_ICSSG0</td>
12454 <td>pr1_rx_sof_intr_req</td>
12455 <td>1</td>
12456 </tr>
12457 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12458 <td>130</td>
12459 <td>24</td>
12460 <td>J721E_DEV_PRU_ICSSG1</td>
12461 <td>pr1_tx_sof_intr_req</td>
12462 <td>0</td>
12463 </tr>
12464 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12465 <td>130</td>
12466 <td>25</td>
12467 <td>J721E_DEV_PRU_ICSSG1</td>
12468 <td>pr1_tx_sof_intr_req</td>
12469 <td>1</td>
12470 </tr>
12471 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12472 <td>130</td>
12473 <td>26</td>
12474 <td>J721E_DEV_PRU_ICSSG1</td>
12475 <td>pr1_rx_sof_intr_req</td>
12476 <td>0</td>
12477 </tr>
12478 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12479 <td>130</td>
12480 <td>27</td>
12481 <td>J721E_DEV_PRU_ICSSG1</td>
12482 <td>pr1_rx_sof_intr_req</td>
12483 <td>1</td>
12484 </tr>
12485 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12486 <td>130</td>
12487 <td>28</td>
12488 <td>Not Connected</td>
12489 <td>&#160;</td>
12490 <td>&#160;</td>
12491 </tr>
12492 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12493 <td>130</td>
12494 <td>29</td>
12495 <td>Not Connected</td>
12496 <td>&#160;</td>
12497 <td>&#160;</td>
12498 </tr>
12499 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12500 <td>130</td>
12501 <td>30</td>
12502 <td>Not Connected</td>
12503 <td>&#160;</td>
12504 <td>&#160;</td>
12505 </tr>
12506 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12507 <td>130</td>
12508 <td>31</td>
12509 <td>Not Connected</td>
12510 <td>&#160;</td>
12511 <td>&#160;</td>
12512 </tr>
12513 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12514 <td>130</td>
12515 <td>32</td>
12516 <td>J721E_DEV_PCIE0</td>
12517 <td>pcie_legacy_pulse</td>
12518 <td>0</td>
12519 </tr>
12520 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12521 <td>130</td>
12522 <td>33</td>
12523 <td>J721E_DEV_PCIE0</td>
12524 <td>pcie_downstream_pulse</td>
12525 <td>0</td>
12526 </tr>
12527 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12528 <td>130</td>
12529 <td>34</td>
12530 <td>J721E_DEV_PCIE0</td>
12531 <td>pcie_flr_pulse</td>
12532 <td>0</td>
12533 </tr>
12534 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12535 <td>130</td>
12536 <td>35</td>
12537 <td>J721E_DEV_PCIE0</td>
12538 <td>pcie_error_pulse</td>
12539 <td>0</td>
12540 </tr>
12541 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12542 <td>130</td>
12543 <td>36</td>
12544 <td>J721E_DEV_PCIE0</td>
12545 <td>pcie_link_state_pulse</td>
12546 <td>0</td>
12547 </tr>
12548 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12549 <td>130</td>
12550 <td>37</td>
12551 <td>J721E_DEV_PCIE0</td>
12552 <td>pcie_pwr_state_pulse</td>
12553 <td>0</td>
12554 </tr>
12555 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12556 <td>130</td>
12557 <td>38</td>
12558 <td>J721E_DEV_PCIE0</td>
12559 <td>pcie_ptm_valid_pulse</td>
12560 <td>0</td>
12561 </tr>
12562 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12563 <td>130</td>
12564 <td>39</td>
12565 <td>J721E_DEV_PCIE0</td>
12566 <td>pcie_hot_reset_pulse</td>
12567 <td>0</td>
12568 </tr>
12569 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12570 <td>130</td>
12571 <td>40</td>
12572 <td>J721E_DEV_PCIE1</td>
12573 <td>pcie_legacy_pulse</td>
12574 <td>0</td>
12575 </tr>
12576 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12577 <td>130</td>
12578 <td>41</td>
12579 <td>J721E_DEV_PCIE1</td>
12580 <td>pcie_downstream_pulse</td>
12581 <td>0</td>
12582 </tr>
12583 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12584 <td>130</td>
12585 <td>42</td>
12586 <td>J721E_DEV_PCIE1</td>
12587 <td>pcie_flr_pulse</td>
12588 <td>0</td>
12589 </tr>
12590 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12591 <td>130</td>
12592 <td>43</td>
12593 <td>J721E_DEV_PCIE1</td>
12594 <td>pcie_error_pulse</td>
12595 <td>0</td>
12596 </tr>
12597 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12598 <td>130</td>
12599 <td>44</td>
12600 <td>J721E_DEV_PCIE1</td>
12601 <td>pcie_link_state_pulse</td>
12602 <td>0</td>
12603 </tr>
12604 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12605 <td>130</td>
12606 <td>45</td>
12607 <td>J721E_DEV_PCIE1</td>
12608 <td>pcie_pwr_state_pulse</td>
12609 <td>0</td>
12610 </tr>
12611 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12612 <td>130</td>
12613 <td>46</td>
12614 <td>J721E_DEV_PCIE1</td>
12615 <td>pcie_ptm_valid_pulse</td>
12616 <td>0</td>
12617 </tr>
12618 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12619 <td>130</td>
12620 <td>47</td>
12621 <td>J721E_DEV_PCIE1</td>
12622 <td>pcie_hot_reset_pulse</td>
12623 <td>0</td>
12624 </tr>
12625 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12626 <td>130</td>
12627 <td>48</td>
12628 <td>J721E_DEV_PCIE2</td>
12629 <td>pcie_legacy_pulse</td>
12630 <td>0</td>
12631 </tr>
12632 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12633 <td>130</td>
12634 <td>49</td>
12635 <td>J721E_DEV_PCIE2</td>
12636 <td>pcie_downstream_pulse</td>
12637 <td>0</td>
12638 </tr>
12639 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12640 <td>130</td>
12641 <td>50</td>
12642 <td>J721E_DEV_PCIE2</td>
12643 <td>pcie_flr_pulse</td>
12644 <td>0</td>
12645 </tr>
12646 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12647 <td>130</td>
12648 <td>51</td>
12649 <td>J721E_DEV_PCIE2</td>
12650 <td>pcie_error_pulse</td>
12651 <td>0</td>
12652 </tr>
12653 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12654 <td>130</td>
12655 <td>52</td>
12656 <td>J721E_DEV_PCIE2</td>
12657 <td>pcie_link_state_pulse</td>
12658 <td>0</td>
12659 </tr>
12660 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12661 <td>130</td>
12662 <td>53</td>
12663 <td>J721E_DEV_PCIE2</td>
12664 <td>pcie_pwr_state_pulse</td>
12665 <td>0</td>
12666 </tr>
12667 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12668 <td>130</td>
12669 <td>54</td>
12670 <td>J721E_DEV_PCIE2</td>
12671 <td>pcie_ptm_valid_pulse</td>
12672 <td>0</td>
12673 </tr>
12674 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12675 <td>130</td>
12676 <td>55</td>
12677 <td>J721E_DEV_PCIE2</td>
12678 <td>pcie_hot_reset_pulse</td>
12679 <td>0</td>
12680 </tr>
12681 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12682 <td>130</td>
12683 <td>56</td>
12684 <td>J721E_DEV_PCIE3</td>
12685 <td>pcie_legacy_pulse</td>
12686 <td>0</td>
12687 </tr>
12688 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12689 <td>130</td>
12690 <td>57</td>
12691 <td>J721E_DEV_PCIE3</td>
12692 <td>pcie_downstream_pulse</td>
12693 <td>0</td>
12694 </tr>
12695 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12696 <td>130</td>
12697 <td>58</td>
12698 <td>J721E_DEV_PCIE3</td>
12699 <td>pcie_flr_pulse</td>
12700 <td>0</td>
12701 </tr>
12702 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12703 <td>130</td>
12704 <td>59</td>
12705 <td>J721E_DEV_PCIE3</td>
12706 <td>pcie_error_pulse</td>
12707 <td>0</td>
12708 </tr>
12709 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12710 <td>130</td>
12711 <td>60</td>
12712 <td>J721E_DEV_PCIE3</td>
12713 <td>pcie_link_state_pulse</td>
12714 <td>0</td>
12715 </tr>
12716 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12717 <td>130</td>
12718 <td>61</td>
12719 <td>J721E_DEV_PCIE3</td>
12720 <td>pcie_pwr_state_pulse</td>
12721 <td>0</td>
12722 </tr>
12723 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12724 <td>130</td>
12725 <td>62</td>
12726 <td>J721E_DEV_PCIE3</td>
12727 <td>pcie_ptm_valid_pulse</td>
12728 <td>0</td>
12729 </tr>
12730 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12731 <td>130</td>
12732 <td>63</td>
12733 <td>J721E_DEV_PCIE3</td>
12734 <td>pcie_hot_reset_pulse</td>
12735 <td>0</td>
12736 </tr>
12737 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12738 <td>130</td>
12739 <td>64</td>
12740 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12741 <td>outp</td>
12742 <td>0</td>
12743 </tr>
12744 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12745 <td>130</td>
12746 <td>65</td>
12747 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12748 <td>outp</td>
12749 <td>1</td>
12750 </tr>
12751 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12752 <td>130</td>
12753 <td>66</td>
12754 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12755 <td>outp</td>
12756 <td>2</td>
12757 </tr>
12758 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12759 <td>130</td>
12760 <td>67</td>
12761 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12762 <td>outp</td>
12763 <td>3</td>
12764 </tr>
12765 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12766 <td>130</td>
12767 <td>68</td>
12768 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12769 <td>outp</td>
12770 <td>4</td>
12771 </tr>
12772 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12773 <td>130</td>
12774 <td>69</td>
12775 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12776 <td>outp</td>
12777 <td>5</td>
12778 </tr>
12779 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12780 <td>130</td>
12781 <td>70</td>
12782 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12783 <td>outp</td>
12784 <td>6</td>
12785 </tr>
12786 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12787 <td>130</td>
12788 <td>71</td>
12789 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12790 <td>outp</td>
12791 <td>7</td>
12792 </tr>
12793 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12794 <td>130</td>
12795 <td>72</td>
12796 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12797 <td>outp</td>
12798 <td>8</td>
12799 </tr>
12800 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12801 <td>130</td>
12802 <td>73</td>
12803 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12804 <td>outp</td>
12805 <td>9</td>
12806 </tr>
12807 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12808 <td>130</td>
12809 <td>74</td>
12810 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12811 <td>outp</td>
12812 <td>10</td>
12813 </tr>
12814 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12815 <td>130</td>
12816 <td>75</td>
12817 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12818 <td>outp</td>
12819 <td>11</td>
12820 </tr>
12821 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12822 <td>130</td>
12823 <td>76</td>
12824 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12825 <td>outp</td>
12826 <td>12</td>
12827 </tr>
12828 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12829 <td>130</td>
12830 <td>77</td>
12831 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12832 <td>outp</td>
12833 <td>13</td>
12834 </tr>
12835 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12836 <td>130</td>
12837 <td>78</td>
12838 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12839 <td>outp</td>
12840 <td>14</td>
12841 </tr>
12842 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12843 <td>130</td>
12844 <td>79</td>
12845 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12846 <td>outp</td>
12847 <td>15</td>
12848 </tr>
12849 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12850 <td>130</td>
12851 <td>80</td>
12852 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12853 <td>outp</td>
12854 <td>16</td>
12855 </tr>
12856 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12857 <td>130</td>
12858 <td>81</td>
12859 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12860 <td>outp</td>
12861 <td>17</td>
12862 </tr>
12863 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12864 <td>130</td>
12865 <td>82</td>
12866 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12867 <td>outp</td>
12868 <td>18</td>
12869 </tr>
12870 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12871 <td>130</td>
12872 <td>83</td>
12873 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12874 <td>outp</td>
12875 <td>19</td>
12876 </tr>
12877 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12878 <td>130</td>
12879 <td>84</td>
12880 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12881 <td>outp</td>
12882 <td>20</td>
12883 </tr>
12884 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12885 <td>130</td>
12886 <td>85</td>
12887 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12888 <td>outp</td>
12889 <td>21</td>
12890 </tr>
12891 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12892 <td>130</td>
12893 <td>86</td>
12894 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12895 <td>outp</td>
12896 <td>22</td>
12897 </tr>
12898 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12899 <td>130</td>
12900 <td>87</td>
12901 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12902 <td>outp</td>
12903 <td>23</td>
12904 </tr>
12905 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12906 <td>130</td>
12907 <td>88</td>
12908 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12909 <td>outp</td>
12910 <td>24</td>
12911 </tr>
12912 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12913 <td>130</td>
12914 <td>89</td>
12915 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12916 <td>outp</td>
12917 <td>25</td>
12918 </tr>
12919 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12920 <td>130</td>
12921 <td>90</td>
12922 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12923 <td>outp</td>
12924 <td>26</td>
12925 </tr>
12926 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12927 <td>130</td>
12928 <td>91</td>
12929 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12930 <td>outp</td>
12931 <td>27</td>
12932 </tr>
12933 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12934 <td>130</td>
12935 <td>92</td>
12936 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12937 <td>outp</td>
12938 <td>28</td>
12939 </tr>
12940 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12941 <td>130</td>
12942 <td>93</td>
12943 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12944 <td>outp</td>
12945 <td>29</td>
12946 </tr>
12947 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12948 <td>130</td>
12949 <td>94</td>
12950 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12951 <td>outp</td>
12952 <td>30</td>
12953 </tr>
12954 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12955 <td>130</td>
12956 <td>95</td>
12957 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
12958 <td>outp</td>
12959 <td>31</td>
12960 </tr>
12961 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12962 <td>130</td>
12963 <td>96</td>
12964 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
12965 <td>outp</td>
12966 <td>16</td>
12967 </tr>
12968 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12969 <td>130</td>
12970 <td>97</td>
12971 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
12972 <td>outp</td>
12973 <td>17</td>
12974 </tr>
12975 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12976 <td>130</td>
12977 <td>98</td>
12978 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
12979 <td>outp</td>
12980 <td>18</td>
12981 </tr>
12982 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12983 <td>130</td>
12984 <td>99</td>
12985 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
12986 <td>outp</td>
12987 <td>19</td>
12988 </tr>
12989 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12990 <td>130</td>
12991 <td>100</td>
12992 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
12993 <td>outp</td>
12994 <td>20</td>
12995 </tr>
12996 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
12997 <td>130</td>
12998 <td>101</td>
12999 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
13000 <td>outp</td>
13001 <td>21</td>
13002 </tr>
13003 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13004 <td>130</td>
13005 <td>102</td>
13006 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
13007 <td>outp</td>
13008 <td>22</td>
13009 </tr>
13010 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13011 <td>130</td>
13012 <td>103</td>
13013 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
13014 <td>outp</td>
13015 <td>23</td>
13016 </tr>
13017 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13018 <td>130</td>
13019 <td>104</td>
13020 <td>Not Connected</td>
13021 <td>&#160;</td>
13022 <td>&#160;</td>
13023 </tr>
13024 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13025 <td>130</td>
13026 <td>105</td>
13027 <td>Not Connected</td>
13028 <td>&#160;</td>
13029 <td>&#160;</td>
13030 </tr>
13031 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13032 <td>130</td>
13033 <td>106</td>
13034 <td>Not Connected</td>
13035 <td>&#160;</td>
13036 <td>&#160;</td>
13037 </tr>
13038 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13039 <td>130</td>
13040 <td>107</td>
13041 <td>Not Connected</td>
13042 <td>&#160;</td>
13043 <td>&#160;</td>
13044 </tr>
13045 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13046 <td>130</td>
13047 <td>108</td>
13048 <td>Not Connected</td>
13049 <td>&#160;</td>
13050 <td>&#160;</td>
13051 </tr>
13052 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13053 <td>130</td>
13054 <td>109</td>
13055 <td>Not Connected</td>
13056 <td>&#160;</td>
13057 <td>&#160;</td>
13058 </tr>
13059 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13060 <td>130</td>
13061 <td>110</td>
13062 <td>Not Connected</td>
13063 <td>&#160;</td>
13064 <td>&#160;</td>
13065 </tr>
13066 <tr class="row-odd"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13067 <td>130</td>
13068 <td>111</td>
13069 <td>Not Connected</td>
13070 <td>&#160;</td>
13071 <td>&#160;</td>
13072 </tr>
13073 </tbody>
13074 </table>
13075 </div>
13076 <div class="section" id="main2mcu-pls-intrtr0-interrupt-router-output-destinations">
13077 <span id="pub-soc-j721e-main2mcu-pls-intrtr0-output-src-list"></span><h2>MAIN2MCU_PLS_INTRTR0 Interrupt Router Output Destinations<a class="headerlink" href="#main2mcu-pls-intrtr0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
13078 <div class="admonition warning">
13079 <p class="first admonition-title">Warning</p>
13080 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
13081 host within the RM Board Configuration resource assignment array.  The RM
13082 Board Configuration is rejected if an overlap with a reserved resource is
13083 detected.</p>
13084 </div>
13085 <table border="1" class="docutils">
13086 <colgroup>
13087 <col width="23%" />
13088 <col width="11%" />
13089 <col width="13%" />
13090 <col width="20%" />
13091 <col width="18%" />
13092 <col width="15%" />
13093 </colgroup>
13094 <thead valign="bottom">
13095 <tr class="row-odd"><th class="head">IR Name</th>
13096 <th class="head">IR Device ID</th>
13097 <th class="head">IR Output Index</th>
13098 <th class="head">Destination Name</th>
13099 <th class="head">Destination Interface</th>
13100 <th class="head">Destination Index</th>
13101 </tr>
13102 </thead>
13103 <tbody valign="top">
13104 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13105 <td>130</td>
13106 <td>0</td>
13107 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13108 <td>intr</td>
13109 <td>224</td>
13110 </tr>
13111 <tr class="row-odd"><td>&#160;</td>
13112 <td>&#160;</td>
13113 <td>&#160;</td>
13114 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13115 <td>intr</td>
13116 <td>224</td>
13117 </tr>
13118 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13119 <td>130</td>
13120 <td>1</td>
13121 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13122 <td>intr</td>
13123 <td>225</td>
13124 </tr>
13125 <tr class="row-odd"><td>&#160;</td>
13126 <td>&#160;</td>
13127 <td>&#160;</td>
13128 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13129 <td>intr</td>
13130 <td>225</td>
13131 </tr>
13132 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13133 <td>130</td>
13134 <td>2</td>
13135 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13136 <td>intr</td>
13137 <td>226</td>
13138 </tr>
13139 <tr class="row-odd"><td>&#160;</td>
13140 <td>&#160;</td>
13141 <td>&#160;</td>
13142 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13143 <td>intr</td>
13144 <td>226</td>
13145 </tr>
13146 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13147 <td>130</td>
13148 <td>3</td>
13149 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13150 <td>intr</td>
13151 <td>227</td>
13152 </tr>
13153 <tr class="row-odd"><td>&#160;</td>
13154 <td>&#160;</td>
13155 <td>&#160;</td>
13156 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13157 <td>intr</td>
13158 <td>227</td>
13159 </tr>
13160 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13161 <td>130</td>
13162 <td>4</td>
13163 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13164 <td>intr</td>
13165 <td>228</td>
13166 </tr>
13167 <tr class="row-odd"><td>&#160;</td>
13168 <td>&#160;</td>
13169 <td>&#160;</td>
13170 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13171 <td>intr</td>
13172 <td>228</td>
13173 </tr>
13174 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13175 <td>130</td>
13176 <td>5</td>
13177 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13178 <td>intr</td>
13179 <td>229</td>
13180 </tr>
13181 <tr class="row-odd"><td>&#160;</td>
13182 <td>&#160;</td>
13183 <td>&#160;</td>
13184 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13185 <td>intr</td>
13186 <td>229</td>
13187 </tr>
13188 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13189 <td>130</td>
13190 <td>6</td>
13191 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13192 <td>intr</td>
13193 <td>230</td>
13194 </tr>
13195 <tr class="row-odd"><td>&#160;</td>
13196 <td>&#160;</td>
13197 <td>&#160;</td>
13198 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13199 <td>intr</td>
13200 <td>230</td>
13201 </tr>
13202 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13203 <td>130</td>
13204 <td>7</td>
13205 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13206 <td>intr</td>
13207 <td>231</td>
13208 </tr>
13209 <tr class="row-odd"><td>&#160;</td>
13210 <td>&#160;</td>
13211 <td>&#160;</td>
13212 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13213 <td>intr</td>
13214 <td>231</td>
13215 </tr>
13216 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13217 <td>130</td>
13218 <td>8</td>
13219 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13220 <td>intr</td>
13221 <td>232</td>
13222 </tr>
13223 <tr class="row-odd"><td>&#160;</td>
13224 <td>&#160;</td>
13225 <td>&#160;</td>
13226 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13227 <td>intr</td>
13228 <td>232</td>
13229 </tr>
13230 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13231 <td>130</td>
13232 <td>9</td>
13233 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13234 <td>intr</td>
13235 <td>233</td>
13236 </tr>
13237 <tr class="row-odd"><td>&#160;</td>
13238 <td>&#160;</td>
13239 <td>&#160;</td>
13240 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13241 <td>intr</td>
13242 <td>233</td>
13243 </tr>
13244 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13245 <td>130</td>
13246 <td>10</td>
13247 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13248 <td>intr</td>
13249 <td>234</td>
13250 </tr>
13251 <tr class="row-odd"><td>&#160;</td>
13252 <td>&#160;</td>
13253 <td>&#160;</td>
13254 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13255 <td>intr</td>
13256 <td>234</td>
13257 </tr>
13258 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13259 <td>130</td>
13260 <td>11</td>
13261 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13262 <td>intr</td>
13263 <td>235</td>
13264 </tr>
13265 <tr class="row-odd"><td>&#160;</td>
13266 <td>&#160;</td>
13267 <td>&#160;</td>
13268 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13269 <td>intr</td>
13270 <td>235</td>
13271 </tr>
13272 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13273 <td>130</td>
13274 <td>12</td>
13275 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13276 <td>intr</td>
13277 <td>236</td>
13278 </tr>
13279 <tr class="row-odd"><td>&#160;</td>
13280 <td>&#160;</td>
13281 <td>&#160;</td>
13282 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13283 <td>intr</td>
13284 <td>236</td>
13285 </tr>
13286 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13287 <td>130</td>
13288 <td>13</td>
13289 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13290 <td>intr</td>
13291 <td>237</td>
13292 </tr>
13293 <tr class="row-odd"><td>&#160;</td>
13294 <td>&#160;</td>
13295 <td>&#160;</td>
13296 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13297 <td>intr</td>
13298 <td>237</td>
13299 </tr>
13300 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13301 <td>130</td>
13302 <td>14</td>
13303 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13304 <td>intr</td>
13305 <td>238</td>
13306 </tr>
13307 <tr class="row-odd"><td>&#160;</td>
13308 <td>&#160;</td>
13309 <td>&#160;</td>
13310 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13311 <td>intr</td>
13312 <td>238</td>
13313 </tr>
13314 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13315 <td>130</td>
13316 <td>15</td>
13317 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13318 <td>intr</td>
13319 <td>239</td>
13320 </tr>
13321 <tr class="row-odd"><td>&#160;</td>
13322 <td>&#160;</td>
13323 <td>&#160;</td>
13324 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13325 <td>intr</td>
13326 <td>239</td>
13327 </tr>
13328 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13329 <td>130</td>
13330 <td>16</td>
13331 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13332 <td>intr</td>
13333 <td>240</td>
13334 </tr>
13335 <tr class="row-odd"><td>&#160;</td>
13336 <td>&#160;</td>
13337 <td>&#160;</td>
13338 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13339 <td>intr</td>
13340 <td>240</td>
13341 </tr>
13342 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13343 <td>130</td>
13344 <td>17</td>
13345 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13346 <td>intr</td>
13347 <td>241</td>
13348 </tr>
13349 <tr class="row-odd"><td>&#160;</td>
13350 <td>&#160;</td>
13351 <td>&#160;</td>
13352 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13353 <td>intr</td>
13354 <td>241</td>
13355 </tr>
13356 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13357 <td>130</td>
13358 <td>18</td>
13359 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13360 <td>intr</td>
13361 <td>242</td>
13362 </tr>
13363 <tr class="row-odd"><td>&#160;</td>
13364 <td>&#160;</td>
13365 <td>&#160;</td>
13366 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13367 <td>intr</td>
13368 <td>242</td>
13369 </tr>
13370 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13371 <td>130</td>
13372 <td>19</td>
13373 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13374 <td>intr</td>
13375 <td>243</td>
13376 </tr>
13377 <tr class="row-odd"><td>&#160;</td>
13378 <td>&#160;</td>
13379 <td>&#160;</td>
13380 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13381 <td>intr</td>
13382 <td>243</td>
13383 </tr>
13384 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13385 <td>130</td>
13386 <td>20</td>
13387 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13388 <td>intr</td>
13389 <td>244</td>
13390 </tr>
13391 <tr class="row-odd"><td>&#160;</td>
13392 <td>&#160;</td>
13393 <td>&#160;</td>
13394 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13395 <td>intr</td>
13396 <td>244</td>
13397 </tr>
13398 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13399 <td>130</td>
13400 <td>21</td>
13401 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13402 <td>intr</td>
13403 <td>245</td>
13404 </tr>
13405 <tr class="row-odd"><td>&#160;</td>
13406 <td>&#160;</td>
13407 <td>&#160;</td>
13408 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13409 <td>intr</td>
13410 <td>245</td>
13411 </tr>
13412 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13413 <td>130</td>
13414 <td>22</td>
13415 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13416 <td>intr</td>
13417 <td>246</td>
13418 </tr>
13419 <tr class="row-odd"><td>&#160;</td>
13420 <td>&#160;</td>
13421 <td>&#160;</td>
13422 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13423 <td>intr</td>
13424 <td>246</td>
13425 </tr>
13426 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13427 <td>130</td>
13428 <td>23</td>
13429 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13430 <td>intr</td>
13431 <td>247</td>
13432 </tr>
13433 <tr class="row-odd"><td>&#160;</td>
13434 <td>&#160;</td>
13435 <td>&#160;</td>
13436 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13437 <td>intr</td>
13438 <td>247</td>
13439 </tr>
13440 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13441 <td>130</td>
13442 <td>24</td>
13443 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13444 <td>intr</td>
13445 <td>248</td>
13446 </tr>
13447 <tr class="row-odd"><td>&#160;</td>
13448 <td>&#160;</td>
13449 <td>&#160;</td>
13450 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13451 <td>intr</td>
13452 <td>248</td>
13453 </tr>
13454 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13455 <td>130</td>
13456 <td>25</td>
13457 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13458 <td>intr</td>
13459 <td>249</td>
13460 </tr>
13461 <tr class="row-odd"><td>&#160;</td>
13462 <td>&#160;</td>
13463 <td>&#160;</td>
13464 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13465 <td>intr</td>
13466 <td>249</td>
13467 </tr>
13468 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13469 <td>130</td>
13470 <td>26</td>
13471 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13472 <td>intr</td>
13473 <td>250</td>
13474 </tr>
13475 <tr class="row-odd"><td>&#160;</td>
13476 <td>&#160;</td>
13477 <td>&#160;</td>
13478 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13479 <td>intr</td>
13480 <td>250</td>
13481 </tr>
13482 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13483 <td>130</td>
13484 <td>27</td>
13485 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13486 <td>intr</td>
13487 <td>251</td>
13488 </tr>
13489 <tr class="row-odd"><td>&#160;</td>
13490 <td>&#160;</td>
13491 <td>&#160;</td>
13492 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13493 <td>intr</td>
13494 <td>251</td>
13495 </tr>
13496 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13497 <td>130</td>
13498 <td>28</td>
13499 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13500 <td>intr</td>
13501 <td>252</td>
13502 </tr>
13503 <tr class="row-odd"><td>&#160;</td>
13504 <td>&#160;</td>
13505 <td>&#160;</td>
13506 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13507 <td>intr</td>
13508 <td>252</td>
13509 </tr>
13510 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13511 <td>130</td>
13512 <td>29</td>
13513 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13514 <td>intr</td>
13515 <td>253</td>
13516 </tr>
13517 <tr class="row-odd"><td>&#160;</td>
13518 <td>&#160;</td>
13519 <td>&#160;</td>
13520 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13521 <td>intr</td>
13522 <td>253</td>
13523 </tr>
13524 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13525 <td>130</td>
13526 <td>30</td>
13527 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13528 <td>intr</td>
13529 <td>254</td>
13530 </tr>
13531 <tr class="row-odd"><td>&#160;</td>
13532 <td>&#160;</td>
13533 <td>&#160;</td>
13534 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13535 <td>intr</td>
13536 <td>254</td>
13537 </tr>
13538 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13539 <td>130</td>
13540 <td>31</td>
13541 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13542 <td>intr</td>
13543 <td>255</td>
13544 </tr>
13545 <tr class="row-odd"><td>&#160;</td>
13546 <td>&#160;</td>
13547 <td>&#160;</td>
13548 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13549 <td>intr</td>
13550 <td>255</td>
13551 </tr>
13552 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13553 <td>130</td>
13554 <td>32</td>
13555 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13556 <td>intr</td>
13557 <td>256</td>
13558 </tr>
13559 <tr class="row-odd"><td>&#160;</td>
13560 <td>&#160;</td>
13561 <td>&#160;</td>
13562 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13563 <td>intr</td>
13564 <td>256</td>
13565 </tr>
13566 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13567 <td>130</td>
13568 <td>33</td>
13569 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13570 <td>intr</td>
13571 <td>257</td>
13572 </tr>
13573 <tr class="row-odd"><td>&#160;</td>
13574 <td>&#160;</td>
13575 <td>&#160;</td>
13576 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13577 <td>intr</td>
13578 <td>257</td>
13579 </tr>
13580 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13581 <td>130</td>
13582 <td>34</td>
13583 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13584 <td>intr</td>
13585 <td>258</td>
13586 </tr>
13587 <tr class="row-odd"><td>&#160;</td>
13588 <td>&#160;</td>
13589 <td>&#160;</td>
13590 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13591 <td>intr</td>
13592 <td>258</td>
13593 </tr>
13594 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13595 <td>130</td>
13596 <td>35</td>
13597 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13598 <td>intr</td>
13599 <td>259</td>
13600 </tr>
13601 <tr class="row-odd"><td>&#160;</td>
13602 <td>&#160;</td>
13603 <td>&#160;</td>
13604 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13605 <td>intr</td>
13606 <td>259</td>
13607 </tr>
13608 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13609 <td>130</td>
13610 <td>36</td>
13611 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13612 <td>intr</td>
13613 <td>260</td>
13614 </tr>
13615 <tr class="row-odd"><td>&#160;</td>
13616 <td>&#160;</td>
13617 <td>&#160;</td>
13618 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13619 <td>intr</td>
13620 <td>260</td>
13621 </tr>
13622 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13623 <td>130</td>
13624 <td>37</td>
13625 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13626 <td>intr</td>
13627 <td>261</td>
13628 </tr>
13629 <tr class="row-odd"><td>&#160;</td>
13630 <td>&#160;</td>
13631 <td>&#160;</td>
13632 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13633 <td>intr</td>
13634 <td>261</td>
13635 </tr>
13636 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13637 <td>130</td>
13638 <td>38</td>
13639 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13640 <td>intr</td>
13641 <td>262</td>
13642 </tr>
13643 <tr class="row-odd"><td>&#160;</td>
13644 <td>&#160;</td>
13645 <td>&#160;</td>
13646 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13647 <td>intr</td>
13648 <td>262</td>
13649 </tr>
13650 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13651 <td>130</td>
13652 <td>39</td>
13653 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13654 <td>intr</td>
13655 <td>263</td>
13656 </tr>
13657 <tr class="row-odd"><td>&#160;</td>
13658 <td>&#160;</td>
13659 <td>&#160;</td>
13660 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13661 <td>intr</td>
13662 <td>263</td>
13663 </tr>
13664 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13665 <td>130</td>
13666 <td>40</td>
13667 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13668 <td>intr</td>
13669 <td>264</td>
13670 </tr>
13671 <tr class="row-odd"><td>&#160;</td>
13672 <td>&#160;</td>
13673 <td>&#160;</td>
13674 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13675 <td>intr</td>
13676 <td>264</td>
13677 </tr>
13678 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13679 <td>130</td>
13680 <td>41</td>
13681 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13682 <td>intr</td>
13683 <td>265</td>
13684 </tr>
13685 <tr class="row-odd"><td>&#160;</td>
13686 <td>&#160;</td>
13687 <td>&#160;</td>
13688 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13689 <td>intr</td>
13690 <td>265</td>
13691 </tr>
13692 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13693 <td>130</td>
13694 <td>42</td>
13695 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13696 <td>intr</td>
13697 <td>266</td>
13698 </tr>
13699 <tr class="row-odd"><td>&#160;</td>
13700 <td>&#160;</td>
13701 <td>&#160;</td>
13702 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13703 <td>intr</td>
13704 <td>266</td>
13705 </tr>
13706 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13707 <td>130</td>
13708 <td>43</td>
13709 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13710 <td>intr</td>
13711 <td>267</td>
13712 </tr>
13713 <tr class="row-odd"><td>&#160;</td>
13714 <td>&#160;</td>
13715 <td>&#160;</td>
13716 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13717 <td>intr</td>
13718 <td>267</td>
13719 </tr>
13720 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13721 <td>130</td>
13722 <td>44</td>
13723 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13724 <td>intr</td>
13725 <td>268</td>
13726 </tr>
13727 <tr class="row-odd"><td>&#160;</td>
13728 <td>&#160;</td>
13729 <td>&#160;</td>
13730 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13731 <td>intr</td>
13732 <td>268</td>
13733 </tr>
13734 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13735 <td>130</td>
13736 <td>45</td>
13737 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13738 <td>intr</td>
13739 <td>269</td>
13740 </tr>
13741 <tr class="row-odd"><td>&#160;</td>
13742 <td>&#160;</td>
13743 <td>&#160;</td>
13744 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13745 <td>intr</td>
13746 <td>269</td>
13747 </tr>
13748 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13749 <td>130</td>
13750 <td>46</td>
13751 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13752 <td>intr</td>
13753 <td>270</td>
13754 </tr>
13755 <tr class="row-odd"><td>&#160;</td>
13756 <td>&#160;</td>
13757 <td>&#160;</td>
13758 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13759 <td>intr</td>
13760 <td>270</td>
13761 </tr>
13762 <tr class="row-even"><td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
13763 <td>130</td>
13764 <td>47</td>
13765 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
13766 <td>intr</td>
13767 <td>271</td>
13768 </tr>
13769 <tr class="row-odd"><td>&#160;</td>
13770 <td>&#160;</td>
13771 <td>&#160;</td>
13772 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
13773 <td>intr</td>
13774 <td>271</td>
13775 </tr>
13776 </tbody>
13777 </table>
13778 </div>
13779 <div class="section" id="gpiomux-intrtr0-interrupt-router-input-sources">
13780 <span id="pub-soc-j721e-gpiomux-intrtr0-input-src-list"></span><h2>GPIOMUX_INTRTR0 Interrupt Router Input Sources<a class="headerlink" href="#gpiomux-intrtr0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
13781 <div class="admonition warning">
13782 <p class="first admonition-title">Warning</p>
13783 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
13784 host within the RM Board Configuration resource assignment array.  The RM
13785 Board Configuration is rejected if an overlap with a reserved resource is
13786 detected.</p>
13787 </div>
13788 <table border="1" class="docutils">
13789 <colgroup>
13790 <col width="24%" />
13791 <col width="14%" />
13792 <col width="16%" />
13793 <col width="15%" />
13794 <col width="18%" />
13795 <col width="14%" />
13796 </colgroup>
13797 <thead valign="bottom">
13798 <tr class="row-odd"><th class="head">IR Name</th>
13799 <th class="head">IR Device ID</th>
13800 <th class="head">IR Input Index</th>
13801 <th class="head">Source Name</th>
13802 <th class="head">Source Interface</th>
13803 <th class="head">Source Index</th>
13804 </tr>
13805 </thead>
13806 <tbody valign="top">
13807 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13808 <td>131</td>
13809 <td>0</td>
13810 <td>Not Connected</td>
13811 <td>&#160;</td>
13812 <td>&#160;</td>
13813 </tr>
13814 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13815 <td>131</td>
13816 <td>1</td>
13817 <td>Not Connected</td>
13818 <td>&#160;</td>
13819 <td>&#160;</td>
13820 </tr>
13821 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13822 <td>131</td>
13823 <td>2</td>
13824 <td>Not Connected</td>
13825 <td>&#160;</td>
13826 <td>&#160;</td>
13827 </tr>
13828 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13829 <td>131</td>
13830 <td>3</td>
13831 <td>Not Connected</td>
13832 <td>&#160;</td>
13833 <td>&#160;</td>
13834 </tr>
13835 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13836 <td>131</td>
13837 <td>4</td>
13838 <td>Not Connected</td>
13839 <td>&#160;</td>
13840 <td>&#160;</td>
13841 </tr>
13842 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13843 <td>131</td>
13844 <td>5</td>
13845 <td>Not Connected</td>
13846 <td>&#160;</td>
13847 <td>&#160;</td>
13848 </tr>
13849 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13850 <td>131</td>
13851 <td>6</td>
13852 <td>Not Connected</td>
13853 <td>&#160;</td>
13854 <td>&#160;</td>
13855 </tr>
13856 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13857 <td>131</td>
13858 <td>7</td>
13859 <td>Not Connected</td>
13860 <td>&#160;</td>
13861 <td>&#160;</td>
13862 </tr>
13863 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13864 <td>131</td>
13865 <td>8</td>
13866 <td>Not Connected</td>
13867 <td>&#160;</td>
13868 <td>&#160;</td>
13869 </tr>
13870 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13871 <td>131</td>
13872 <td>9</td>
13873 <td>Not Connected</td>
13874 <td>&#160;</td>
13875 <td>&#160;</td>
13876 </tr>
13877 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13878 <td>131</td>
13879 <td>10</td>
13880 <td>Not Connected</td>
13881 <td>&#160;</td>
13882 <td>&#160;</td>
13883 </tr>
13884 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13885 <td>131</td>
13886 <td>11</td>
13887 <td>Not Connected</td>
13888 <td>&#160;</td>
13889 <td>&#160;</td>
13890 </tr>
13891 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13892 <td>131</td>
13893 <td>12</td>
13894 <td>Not Connected</td>
13895 <td>&#160;</td>
13896 <td>&#160;</td>
13897 </tr>
13898 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13899 <td>131</td>
13900 <td>13</td>
13901 <td>Not Connected</td>
13902 <td>&#160;</td>
13903 <td>&#160;</td>
13904 </tr>
13905 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13906 <td>131</td>
13907 <td>14</td>
13908 <td>Not Connected</td>
13909 <td>&#160;</td>
13910 <td>&#160;</td>
13911 </tr>
13912 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13913 <td>131</td>
13914 <td>15</td>
13915 <td>Not Connected</td>
13916 <td>&#160;</td>
13917 <td>&#160;</td>
13918 </tr>
13919 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13920 <td>131</td>
13921 <td>16</td>
13922 <td>Not Connected</td>
13923 <td>&#160;</td>
13924 <td>&#160;</td>
13925 </tr>
13926 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13927 <td>131</td>
13928 <td>17</td>
13929 <td>Not Connected</td>
13930 <td>&#160;</td>
13931 <td>&#160;</td>
13932 </tr>
13933 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13934 <td>131</td>
13935 <td>18</td>
13936 <td>Not Connected</td>
13937 <td>&#160;</td>
13938 <td>&#160;</td>
13939 </tr>
13940 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13941 <td>131</td>
13942 <td>19</td>
13943 <td>Not Connected</td>
13944 <td>&#160;</td>
13945 <td>&#160;</td>
13946 </tr>
13947 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13948 <td>131</td>
13949 <td>20</td>
13950 <td>Not Connected</td>
13951 <td>&#160;</td>
13952 <td>&#160;</td>
13953 </tr>
13954 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13955 <td>131</td>
13956 <td>21</td>
13957 <td>Not Connected</td>
13958 <td>&#160;</td>
13959 <td>&#160;</td>
13960 </tr>
13961 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13962 <td>131</td>
13963 <td>22</td>
13964 <td>Not Connected</td>
13965 <td>&#160;</td>
13966 <td>&#160;</td>
13967 </tr>
13968 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13969 <td>131</td>
13970 <td>23</td>
13971 <td>Not Connected</td>
13972 <td>&#160;</td>
13973 <td>&#160;</td>
13974 </tr>
13975 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13976 <td>131</td>
13977 <td>24</td>
13978 <td>Not Connected</td>
13979 <td>&#160;</td>
13980 <td>&#160;</td>
13981 </tr>
13982 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13983 <td>131</td>
13984 <td>25</td>
13985 <td>Not Connected</td>
13986 <td>&#160;</td>
13987 <td>&#160;</td>
13988 </tr>
13989 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13990 <td>131</td>
13991 <td>26</td>
13992 <td>Not Connected</td>
13993 <td>&#160;</td>
13994 <td>&#160;</td>
13995 </tr>
13996 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
13997 <td>131</td>
13998 <td>27</td>
13999 <td>Not Connected</td>
14000 <td>&#160;</td>
14001 <td>&#160;</td>
14002 </tr>
14003 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14004 <td>131</td>
14005 <td>28</td>
14006 <td>Not Connected</td>
14007 <td>&#160;</td>
14008 <td>&#160;</td>
14009 </tr>
14010 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14011 <td>131</td>
14012 <td>29</td>
14013 <td>Not Connected</td>
14014 <td>&#160;</td>
14015 <td>&#160;</td>
14016 </tr>
14017 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14018 <td>131</td>
14019 <td>30</td>
14020 <td>Not Connected</td>
14021 <td>&#160;</td>
14022 <td>&#160;</td>
14023 </tr>
14024 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14025 <td>131</td>
14026 <td>31</td>
14027 <td>Not Connected</td>
14028 <td>&#160;</td>
14029 <td>&#160;</td>
14030 </tr>
14031 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14032 <td>131</td>
14033 <td>32</td>
14034 <td>Not Connected</td>
14035 <td>&#160;</td>
14036 <td>&#160;</td>
14037 </tr>
14038 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14039 <td>131</td>
14040 <td>33</td>
14041 <td>Not Connected</td>
14042 <td>&#160;</td>
14043 <td>&#160;</td>
14044 </tr>
14045 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14046 <td>131</td>
14047 <td>34</td>
14048 <td>Not Connected</td>
14049 <td>&#160;</td>
14050 <td>&#160;</td>
14051 </tr>
14052 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14053 <td>131</td>
14054 <td>35</td>
14055 <td>Not Connected</td>
14056 <td>&#160;</td>
14057 <td>&#160;</td>
14058 </tr>
14059 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14060 <td>131</td>
14061 <td>36</td>
14062 <td>Not Connected</td>
14063 <td>&#160;</td>
14064 <td>&#160;</td>
14065 </tr>
14066 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14067 <td>131</td>
14068 <td>37</td>
14069 <td>Not Connected</td>
14070 <td>&#160;</td>
14071 <td>&#160;</td>
14072 </tr>
14073 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14074 <td>131</td>
14075 <td>38</td>
14076 <td>Not Connected</td>
14077 <td>&#160;</td>
14078 <td>&#160;</td>
14079 </tr>
14080 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14081 <td>131</td>
14082 <td>39</td>
14083 <td>Not Connected</td>
14084 <td>&#160;</td>
14085 <td>&#160;</td>
14086 </tr>
14087 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14088 <td>131</td>
14089 <td>40</td>
14090 <td>Not Connected</td>
14091 <td>&#160;</td>
14092 <td>&#160;</td>
14093 </tr>
14094 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14095 <td>131</td>
14096 <td>41</td>
14097 <td>Not Connected</td>
14098 <td>&#160;</td>
14099 <td>&#160;</td>
14100 </tr>
14101 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14102 <td>131</td>
14103 <td>42</td>
14104 <td>Not Connected</td>
14105 <td>&#160;</td>
14106 <td>&#160;</td>
14107 </tr>
14108 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14109 <td>131</td>
14110 <td>43</td>
14111 <td>Not Connected</td>
14112 <td>&#160;</td>
14113 <td>&#160;</td>
14114 </tr>
14115 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14116 <td>131</td>
14117 <td>44</td>
14118 <td>Not Connected</td>
14119 <td>&#160;</td>
14120 <td>&#160;</td>
14121 </tr>
14122 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14123 <td>131</td>
14124 <td>45</td>
14125 <td>Not Connected</td>
14126 <td>&#160;</td>
14127 <td>&#160;</td>
14128 </tr>
14129 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14130 <td>131</td>
14131 <td>46</td>
14132 <td>Not Connected</td>
14133 <td>&#160;</td>
14134 <td>&#160;</td>
14135 </tr>
14136 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14137 <td>131</td>
14138 <td>47</td>
14139 <td>Not Connected</td>
14140 <td>&#160;</td>
14141 <td>&#160;</td>
14142 </tr>
14143 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14144 <td>131</td>
14145 <td>48</td>
14146 <td>Not Connected</td>
14147 <td>&#160;</td>
14148 <td>&#160;</td>
14149 </tr>
14150 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14151 <td>131</td>
14152 <td>49</td>
14153 <td>Not Connected</td>
14154 <td>&#160;</td>
14155 <td>&#160;</td>
14156 </tr>
14157 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14158 <td>131</td>
14159 <td>50</td>
14160 <td>Not Connected</td>
14161 <td>&#160;</td>
14162 <td>&#160;</td>
14163 </tr>
14164 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14165 <td>131</td>
14166 <td>51</td>
14167 <td>Not Connected</td>
14168 <td>&#160;</td>
14169 <td>&#160;</td>
14170 </tr>
14171 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14172 <td>131</td>
14173 <td>52</td>
14174 <td>Not Connected</td>
14175 <td>&#160;</td>
14176 <td>&#160;</td>
14177 </tr>
14178 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14179 <td>131</td>
14180 <td>53</td>
14181 <td>Not Connected</td>
14182 <td>&#160;</td>
14183 <td>&#160;</td>
14184 </tr>
14185 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14186 <td>131</td>
14187 <td>54</td>
14188 <td>Not Connected</td>
14189 <td>&#160;</td>
14190 <td>&#160;</td>
14191 </tr>
14192 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14193 <td>131</td>
14194 <td>55</td>
14195 <td>Not Connected</td>
14196 <td>&#160;</td>
14197 <td>&#160;</td>
14198 </tr>
14199 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14200 <td>131</td>
14201 <td>56</td>
14202 <td>Not Connected</td>
14203 <td>&#160;</td>
14204 <td>&#160;</td>
14205 </tr>
14206 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14207 <td>131</td>
14208 <td>57</td>
14209 <td>Not Connected</td>
14210 <td>&#160;</td>
14211 <td>&#160;</td>
14212 </tr>
14213 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14214 <td>131</td>
14215 <td>58</td>
14216 <td>Not Connected</td>
14217 <td>&#160;</td>
14218 <td>&#160;</td>
14219 </tr>
14220 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14221 <td>131</td>
14222 <td>59</td>
14223 <td>Not Connected</td>
14224 <td>&#160;</td>
14225 <td>&#160;</td>
14226 </tr>
14227 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14228 <td>131</td>
14229 <td>60</td>
14230 <td>Not Connected</td>
14231 <td>&#160;</td>
14232 <td>&#160;</td>
14233 </tr>
14234 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14235 <td>131</td>
14236 <td>61</td>
14237 <td>Not Connected</td>
14238 <td>&#160;</td>
14239 <td>&#160;</td>
14240 </tr>
14241 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14242 <td>131</td>
14243 <td>62</td>
14244 <td>Not Connected</td>
14245 <td>&#160;</td>
14246 <td>&#160;</td>
14247 </tr>
14248 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14249 <td>131</td>
14250 <td>63</td>
14251 <td>Not Connected</td>
14252 <td>&#160;</td>
14253 <td>&#160;</td>
14254 </tr>
14255 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14256 <td>131</td>
14257 <td>64</td>
14258 <td>Not Connected</td>
14259 <td>&#160;</td>
14260 <td>&#160;</td>
14261 </tr>
14262 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14263 <td>131</td>
14264 <td>65</td>
14265 <td>Not Connected</td>
14266 <td>&#160;</td>
14267 <td>&#160;</td>
14268 </tr>
14269 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14270 <td>131</td>
14271 <td>66</td>
14272 <td>Not Connected</td>
14273 <td>&#160;</td>
14274 <td>&#160;</td>
14275 </tr>
14276 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14277 <td>131</td>
14278 <td>67</td>
14279 <td>Not Connected</td>
14280 <td>&#160;</td>
14281 <td>&#160;</td>
14282 </tr>
14283 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14284 <td>131</td>
14285 <td>68</td>
14286 <td>Not Connected</td>
14287 <td>&#160;</td>
14288 <td>&#160;</td>
14289 </tr>
14290 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14291 <td>131</td>
14292 <td>69</td>
14293 <td>Not Connected</td>
14294 <td>&#160;</td>
14295 <td>&#160;</td>
14296 </tr>
14297 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14298 <td>131</td>
14299 <td>70</td>
14300 <td>Not Connected</td>
14301 <td>&#160;</td>
14302 <td>&#160;</td>
14303 </tr>
14304 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14305 <td>131</td>
14306 <td>71</td>
14307 <td>Not Connected</td>
14308 <td>&#160;</td>
14309 <td>&#160;</td>
14310 </tr>
14311 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14312 <td>131</td>
14313 <td>72</td>
14314 <td>Not Connected</td>
14315 <td>&#160;</td>
14316 <td>&#160;</td>
14317 </tr>
14318 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14319 <td>131</td>
14320 <td>73</td>
14321 <td>Not Connected</td>
14322 <td>&#160;</td>
14323 <td>&#160;</td>
14324 </tr>
14325 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14326 <td>131</td>
14327 <td>74</td>
14328 <td>Not Connected</td>
14329 <td>&#160;</td>
14330 <td>&#160;</td>
14331 </tr>
14332 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14333 <td>131</td>
14334 <td>75</td>
14335 <td>Not Connected</td>
14336 <td>&#160;</td>
14337 <td>&#160;</td>
14338 </tr>
14339 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14340 <td>131</td>
14341 <td>76</td>
14342 <td>Not Connected</td>
14343 <td>&#160;</td>
14344 <td>&#160;</td>
14345 </tr>
14346 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14347 <td>131</td>
14348 <td>77</td>
14349 <td>Not Connected</td>
14350 <td>&#160;</td>
14351 <td>&#160;</td>
14352 </tr>
14353 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14354 <td>131</td>
14355 <td>78</td>
14356 <td>Not Connected</td>
14357 <td>&#160;</td>
14358 <td>&#160;</td>
14359 </tr>
14360 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14361 <td>131</td>
14362 <td>79</td>
14363 <td>Not Connected</td>
14364 <td>&#160;</td>
14365 <td>&#160;</td>
14366 </tr>
14367 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14368 <td>131</td>
14369 <td>80</td>
14370 <td>Not Connected</td>
14371 <td>&#160;</td>
14372 <td>&#160;</td>
14373 </tr>
14374 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14375 <td>131</td>
14376 <td>81</td>
14377 <td>Not Connected</td>
14378 <td>&#160;</td>
14379 <td>&#160;</td>
14380 </tr>
14381 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14382 <td>131</td>
14383 <td>82</td>
14384 <td>Not Connected</td>
14385 <td>&#160;</td>
14386 <td>&#160;</td>
14387 </tr>
14388 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14389 <td>131</td>
14390 <td>83</td>
14391 <td>Not Connected</td>
14392 <td>&#160;</td>
14393 <td>&#160;</td>
14394 </tr>
14395 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14396 <td>131</td>
14397 <td>84</td>
14398 <td>Not Connected</td>
14399 <td>&#160;</td>
14400 <td>&#160;</td>
14401 </tr>
14402 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14403 <td>131</td>
14404 <td>85</td>
14405 <td>Not Connected</td>
14406 <td>&#160;</td>
14407 <td>&#160;</td>
14408 </tr>
14409 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14410 <td>131</td>
14411 <td>86</td>
14412 <td>Not Connected</td>
14413 <td>&#160;</td>
14414 <td>&#160;</td>
14415 </tr>
14416 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14417 <td>131</td>
14418 <td>87</td>
14419 <td>Not Connected</td>
14420 <td>&#160;</td>
14421 <td>&#160;</td>
14422 </tr>
14423 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14424 <td>131</td>
14425 <td>88</td>
14426 <td>Not Connected</td>
14427 <td>&#160;</td>
14428 <td>&#160;</td>
14429 </tr>
14430 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14431 <td>131</td>
14432 <td>89</td>
14433 <td>Not Connected</td>
14434 <td>&#160;</td>
14435 <td>&#160;</td>
14436 </tr>
14437 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14438 <td>131</td>
14439 <td>90</td>
14440 <td>Not Connected</td>
14441 <td>&#160;</td>
14442 <td>&#160;</td>
14443 </tr>
14444 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14445 <td>131</td>
14446 <td>91</td>
14447 <td>Not Connected</td>
14448 <td>&#160;</td>
14449 <td>&#160;</td>
14450 </tr>
14451 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14452 <td>131</td>
14453 <td>92</td>
14454 <td>Not Connected</td>
14455 <td>&#160;</td>
14456 <td>&#160;</td>
14457 </tr>
14458 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14459 <td>131</td>
14460 <td>93</td>
14461 <td>Not Connected</td>
14462 <td>&#160;</td>
14463 <td>&#160;</td>
14464 </tr>
14465 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14466 <td>131</td>
14467 <td>94</td>
14468 <td>Not Connected</td>
14469 <td>&#160;</td>
14470 <td>&#160;</td>
14471 </tr>
14472 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14473 <td>131</td>
14474 <td>95</td>
14475 <td>Not Connected</td>
14476 <td>&#160;</td>
14477 <td>&#160;</td>
14478 </tr>
14479 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14480 <td>131</td>
14481 <td>96</td>
14482 <td>Not Connected</td>
14483 <td>&#160;</td>
14484 <td>&#160;</td>
14485 </tr>
14486 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14487 <td>131</td>
14488 <td>97</td>
14489 <td>Not Connected</td>
14490 <td>&#160;</td>
14491 <td>&#160;</td>
14492 </tr>
14493 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14494 <td>131</td>
14495 <td>98</td>
14496 <td>Not Connected</td>
14497 <td>&#160;</td>
14498 <td>&#160;</td>
14499 </tr>
14500 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14501 <td>131</td>
14502 <td>99</td>
14503 <td>Not Connected</td>
14504 <td>&#160;</td>
14505 <td>&#160;</td>
14506 </tr>
14507 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14508 <td>131</td>
14509 <td>100</td>
14510 <td>Not Connected</td>
14511 <td>&#160;</td>
14512 <td>&#160;</td>
14513 </tr>
14514 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14515 <td>131</td>
14516 <td>101</td>
14517 <td>Not Connected</td>
14518 <td>&#160;</td>
14519 <td>&#160;</td>
14520 </tr>
14521 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14522 <td>131</td>
14523 <td>102</td>
14524 <td>Not Connected</td>
14525 <td>&#160;</td>
14526 <td>&#160;</td>
14527 </tr>
14528 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14529 <td>131</td>
14530 <td>103</td>
14531 <td>Not Connected</td>
14532 <td>&#160;</td>
14533 <td>&#160;</td>
14534 </tr>
14535 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14536 <td>131</td>
14537 <td>104</td>
14538 <td>Not Connected</td>
14539 <td>&#160;</td>
14540 <td>&#160;</td>
14541 </tr>
14542 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14543 <td>131</td>
14544 <td>105</td>
14545 <td>Not Connected</td>
14546 <td>&#160;</td>
14547 <td>&#160;</td>
14548 </tr>
14549 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14550 <td>131</td>
14551 <td>106</td>
14552 <td>Not Connected</td>
14553 <td>&#160;</td>
14554 <td>&#160;</td>
14555 </tr>
14556 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14557 <td>131</td>
14558 <td>107</td>
14559 <td>Not Connected</td>
14560 <td>&#160;</td>
14561 <td>&#160;</td>
14562 </tr>
14563 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14564 <td>131</td>
14565 <td>108</td>
14566 <td>Not Connected</td>
14567 <td>&#160;</td>
14568 <td>&#160;</td>
14569 </tr>
14570 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14571 <td>131</td>
14572 <td>109</td>
14573 <td>Not Connected</td>
14574 <td>&#160;</td>
14575 <td>&#160;</td>
14576 </tr>
14577 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14578 <td>131</td>
14579 <td>110</td>
14580 <td>Not Connected</td>
14581 <td>&#160;</td>
14582 <td>&#160;</td>
14583 </tr>
14584 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14585 <td>131</td>
14586 <td>111</td>
14587 <td>Not Connected</td>
14588 <td>&#160;</td>
14589 <td>&#160;</td>
14590 </tr>
14591 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14592 <td>131</td>
14593 <td>112</td>
14594 <td>Not Connected</td>
14595 <td>&#160;</td>
14596 <td>&#160;</td>
14597 </tr>
14598 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14599 <td>131</td>
14600 <td>113</td>
14601 <td>Not Connected</td>
14602 <td>&#160;</td>
14603 <td>&#160;</td>
14604 </tr>
14605 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14606 <td>131</td>
14607 <td>114</td>
14608 <td>Not Connected</td>
14609 <td>&#160;</td>
14610 <td>&#160;</td>
14611 </tr>
14612 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14613 <td>131</td>
14614 <td>115</td>
14615 <td>Not Connected</td>
14616 <td>&#160;</td>
14617 <td>&#160;</td>
14618 </tr>
14619 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14620 <td>131</td>
14621 <td>116</td>
14622 <td>Not Connected</td>
14623 <td>&#160;</td>
14624 <td>&#160;</td>
14625 </tr>
14626 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14627 <td>131</td>
14628 <td>117</td>
14629 <td>Not Connected</td>
14630 <td>&#160;</td>
14631 <td>&#160;</td>
14632 </tr>
14633 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14634 <td>131</td>
14635 <td>118</td>
14636 <td>Not Connected</td>
14637 <td>&#160;</td>
14638 <td>&#160;</td>
14639 </tr>
14640 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14641 <td>131</td>
14642 <td>119</td>
14643 <td>Not Connected</td>
14644 <td>&#160;</td>
14645 <td>&#160;</td>
14646 </tr>
14647 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14648 <td>131</td>
14649 <td>120</td>
14650 <td>Not Connected</td>
14651 <td>&#160;</td>
14652 <td>&#160;</td>
14653 </tr>
14654 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14655 <td>131</td>
14656 <td>121</td>
14657 <td>Not Connected</td>
14658 <td>&#160;</td>
14659 <td>&#160;</td>
14660 </tr>
14661 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14662 <td>131</td>
14663 <td>122</td>
14664 <td>Not Connected</td>
14665 <td>&#160;</td>
14666 <td>&#160;</td>
14667 </tr>
14668 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14669 <td>131</td>
14670 <td>123</td>
14671 <td>Not Connected</td>
14672 <td>&#160;</td>
14673 <td>&#160;</td>
14674 </tr>
14675 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14676 <td>131</td>
14677 <td>124</td>
14678 <td>Not Connected</td>
14679 <td>&#160;</td>
14680 <td>&#160;</td>
14681 </tr>
14682 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14683 <td>131</td>
14684 <td>125</td>
14685 <td>Not Connected</td>
14686 <td>&#160;</td>
14687 <td>&#160;</td>
14688 </tr>
14689 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14690 <td>131</td>
14691 <td>126</td>
14692 <td>Not Connected</td>
14693 <td>&#160;</td>
14694 <td>&#160;</td>
14695 </tr>
14696 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14697 <td>131</td>
14698 <td>127</td>
14699 <td>Not Connected</td>
14700 <td>&#160;</td>
14701 <td>&#160;</td>
14702 </tr>
14703 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14704 <td>131</td>
14705 <td>128</td>
14706 <td>Not Connected</td>
14707 <td>&#160;</td>
14708 <td>&#160;</td>
14709 </tr>
14710 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14711 <td>131</td>
14712 <td>129</td>
14713 <td>Not Connected</td>
14714 <td>&#160;</td>
14715 <td>&#160;</td>
14716 </tr>
14717 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14718 <td>131</td>
14719 <td>130</td>
14720 <td>Not Connected</td>
14721 <td>&#160;</td>
14722 <td>&#160;</td>
14723 </tr>
14724 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14725 <td>131</td>
14726 <td>131</td>
14727 <td>Not Connected</td>
14728 <td>&#160;</td>
14729 <td>&#160;</td>
14730 </tr>
14731 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14732 <td>131</td>
14733 <td>132</td>
14734 <td>Not Connected</td>
14735 <td>&#160;</td>
14736 <td>&#160;</td>
14737 </tr>
14738 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14739 <td>131</td>
14740 <td>133</td>
14741 <td>Not Connected</td>
14742 <td>&#160;</td>
14743 <td>&#160;</td>
14744 </tr>
14745 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14746 <td>131</td>
14747 <td>134</td>
14748 <td>Not Connected</td>
14749 <td>&#160;</td>
14750 <td>&#160;</td>
14751 </tr>
14752 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14753 <td>131</td>
14754 <td>135</td>
14755 <td>Not Connected</td>
14756 <td>&#160;</td>
14757 <td>&#160;</td>
14758 </tr>
14759 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14760 <td>131</td>
14761 <td>136</td>
14762 <td>Not Connected</td>
14763 <td>&#160;</td>
14764 <td>&#160;</td>
14765 </tr>
14766 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14767 <td>131</td>
14768 <td>137</td>
14769 <td>Not Connected</td>
14770 <td>&#160;</td>
14771 <td>&#160;</td>
14772 </tr>
14773 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14774 <td>131</td>
14775 <td>138</td>
14776 <td>Not Connected</td>
14777 <td>&#160;</td>
14778 <td>&#160;</td>
14779 </tr>
14780 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14781 <td>131</td>
14782 <td>139</td>
14783 <td>Not Connected</td>
14784 <td>&#160;</td>
14785 <td>&#160;</td>
14786 </tr>
14787 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14788 <td>131</td>
14789 <td>140</td>
14790 <td>Not Connected</td>
14791 <td>&#160;</td>
14792 <td>&#160;</td>
14793 </tr>
14794 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14795 <td>131</td>
14796 <td>141</td>
14797 <td>Not Connected</td>
14798 <td>&#160;</td>
14799 <td>&#160;</td>
14800 </tr>
14801 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14802 <td>131</td>
14803 <td>142</td>
14804 <td>Not Connected</td>
14805 <td>&#160;</td>
14806 <td>&#160;</td>
14807 </tr>
14808 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14809 <td>131</td>
14810 <td>143</td>
14811 <td>Not Connected</td>
14812 <td>&#160;</td>
14813 <td>&#160;</td>
14814 </tr>
14815 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14816 <td>131</td>
14817 <td>144</td>
14818 <td>Not Connected</td>
14819 <td>&#160;</td>
14820 <td>&#160;</td>
14821 </tr>
14822 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14823 <td>131</td>
14824 <td>145</td>
14825 <td>Not Connected</td>
14826 <td>&#160;</td>
14827 <td>&#160;</td>
14828 </tr>
14829 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14830 <td>131</td>
14831 <td>146</td>
14832 <td>Not Connected</td>
14833 <td>&#160;</td>
14834 <td>&#160;</td>
14835 </tr>
14836 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14837 <td>131</td>
14838 <td>147</td>
14839 <td>Not Connected</td>
14840 <td>&#160;</td>
14841 <td>&#160;</td>
14842 </tr>
14843 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14844 <td>131</td>
14845 <td>148</td>
14846 <td>Not Connected</td>
14847 <td>&#160;</td>
14848 <td>&#160;</td>
14849 </tr>
14850 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14851 <td>131</td>
14852 <td>149</td>
14853 <td>Not Connected</td>
14854 <td>&#160;</td>
14855 <td>&#160;</td>
14856 </tr>
14857 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14858 <td>131</td>
14859 <td>150</td>
14860 <td>Not Connected</td>
14861 <td>&#160;</td>
14862 <td>&#160;</td>
14863 </tr>
14864 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14865 <td>131</td>
14866 <td>151</td>
14867 <td>Not Connected</td>
14868 <td>&#160;</td>
14869 <td>&#160;</td>
14870 </tr>
14871 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14872 <td>131</td>
14873 <td>152</td>
14874 <td>Not Connected</td>
14875 <td>&#160;</td>
14876 <td>&#160;</td>
14877 </tr>
14878 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14879 <td>131</td>
14880 <td>153</td>
14881 <td>Not Connected</td>
14882 <td>&#160;</td>
14883 <td>&#160;</td>
14884 </tr>
14885 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14886 <td>131</td>
14887 <td>154</td>
14888 <td>Not Connected</td>
14889 <td>&#160;</td>
14890 <td>&#160;</td>
14891 </tr>
14892 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14893 <td>131</td>
14894 <td>155</td>
14895 <td>Not Connected</td>
14896 <td>&#160;</td>
14897 <td>&#160;</td>
14898 </tr>
14899 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14900 <td>131</td>
14901 <td>156</td>
14902 <td>Not Connected</td>
14903 <td>&#160;</td>
14904 <td>&#160;</td>
14905 </tr>
14906 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14907 <td>131</td>
14908 <td>157</td>
14909 <td>Not Connected</td>
14910 <td>&#160;</td>
14911 <td>&#160;</td>
14912 </tr>
14913 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14914 <td>131</td>
14915 <td>158</td>
14916 <td>Not Connected</td>
14917 <td>&#160;</td>
14918 <td>&#160;</td>
14919 </tr>
14920 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14921 <td>131</td>
14922 <td>159</td>
14923 <td>Not Connected</td>
14924 <td>&#160;</td>
14925 <td>&#160;</td>
14926 </tr>
14927 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14928 <td>131</td>
14929 <td>160</td>
14930 <td>Not Connected</td>
14931 <td>&#160;</td>
14932 <td>&#160;</td>
14933 </tr>
14934 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14935 <td>131</td>
14936 <td>161</td>
14937 <td>Not Connected</td>
14938 <td>&#160;</td>
14939 <td>&#160;</td>
14940 </tr>
14941 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14942 <td>131</td>
14943 <td>162</td>
14944 <td>Not Connected</td>
14945 <td>&#160;</td>
14946 <td>&#160;</td>
14947 </tr>
14948 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14949 <td>131</td>
14950 <td>163</td>
14951 <td>Not Connected</td>
14952 <td>&#160;</td>
14953 <td>&#160;</td>
14954 </tr>
14955 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14956 <td>131</td>
14957 <td>164</td>
14958 <td>Not Connected</td>
14959 <td>&#160;</td>
14960 <td>&#160;</td>
14961 </tr>
14962 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14963 <td>131</td>
14964 <td>165</td>
14965 <td>Not Connected</td>
14966 <td>&#160;</td>
14967 <td>&#160;</td>
14968 </tr>
14969 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14970 <td>131</td>
14971 <td>166</td>
14972 <td>Not Connected</td>
14973 <td>&#160;</td>
14974 <td>&#160;</td>
14975 </tr>
14976 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14977 <td>131</td>
14978 <td>167</td>
14979 <td>Not Connected</td>
14980 <td>&#160;</td>
14981 <td>&#160;</td>
14982 </tr>
14983 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14984 <td>131</td>
14985 <td>168</td>
14986 <td>Not Connected</td>
14987 <td>&#160;</td>
14988 <td>&#160;</td>
14989 </tr>
14990 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14991 <td>131</td>
14992 <td>169</td>
14993 <td>Not Connected</td>
14994 <td>&#160;</td>
14995 <td>&#160;</td>
14996 </tr>
14997 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
14998 <td>131</td>
14999 <td>170</td>
15000 <td>Not Connected</td>
15001 <td>&#160;</td>
15002 <td>&#160;</td>
15003 </tr>
15004 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15005 <td>131</td>
15006 <td>171</td>
15007 <td>Not Connected</td>
15008 <td>&#160;</td>
15009 <td>&#160;</td>
15010 </tr>
15011 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15012 <td>131</td>
15013 <td>172</td>
15014 <td>Not Connected</td>
15015 <td>&#160;</td>
15016 <td>&#160;</td>
15017 </tr>
15018 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15019 <td>131</td>
15020 <td>173</td>
15021 <td>Not Connected</td>
15022 <td>&#160;</td>
15023 <td>&#160;</td>
15024 </tr>
15025 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15026 <td>131</td>
15027 <td>174</td>
15028 <td>Not Connected</td>
15029 <td>&#160;</td>
15030 <td>&#160;</td>
15031 </tr>
15032 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15033 <td>131</td>
15034 <td>175</td>
15035 <td>Not Connected</td>
15036 <td>&#160;</td>
15037 <td>&#160;</td>
15038 </tr>
15039 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15040 <td>131</td>
15041 <td>176</td>
15042 <td>Not Connected</td>
15043 <td>&#160;</td>
15044 <td>&#160;</td>
15045 </tr>
15046 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15047 <td>131</td>
15048 <td>177</td>
15049 <td>Not Connected</td>
15050 <td>&#160;</td>
15051 <td>&#160;</td>
15052 </tr>
15053 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15054 <td>131</td>
15055 <td>178</td>
15056 <td>Not Connected</td>
15057 <td>&#160;</td>
15058 <td>&#160;</td>
15059 </tr>
15060 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15061 <td>131</td>
15062 <td>179</td>
15063 <td>Not Connected</td>
15064 <td>&#160;</td>
15065 <td>&#160;</td>
15066 </tr>
15067 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15068 <td>131</td>
15069 <td>180</td>
15070 <td>Not Connected</td>
15071 <td>&#160;</td>
15072 <td>&#160;</td>
15073 </tr>
15074 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15075 <td>131</td>
15076 <td>181</td>
15077 <td>Not Connected</td>
15078 <td>&#160;</td>
15079 <td>&#160;</td>
15080 </tr>
15081 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15082 <td>131</td>
15083 <td>182</td>
15084 <td>Not Connected</td>
15085 <td>&#160;</td>
15086 <td>&#160;</td>
15087 </tr>
15088 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15089 <td>131</td>
15090 <td>183</td>
15091 <td>Not Connected</td>
15092 <td>&#160;</td>
15093 <td>&#160;</td>
15094 </tr>
15095 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15096 <td>131</td>
15097 <td>184</td>
15098 <td>Not Connected</td>
15099 <td>&#160;</td>
15100 <td>&#160;</td>
15101 </tr>
15102 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15103 <td>131</td>
15104 <td>185</td>
15105 <td>Not Connected</td>
15106 <td>&#160;</td>
15107 <td>&#160;</td>
15108 </tr>
15109 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15110 <td>131</td>
15111 <td>186</td>
15112 <td>Not Connected</td>
15113 <td>&#160;</td>
15114 <td>&#160;</td>
15115 </tr>
15116 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15117 <td>131</td>
15118 <td>187</td>
15119 <td>Not Connected</td>
15120 <td>&#160;</td>
15121 <td>&#160;</td>
15122 </tr>
15123 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15124 <td>131</td>
15125 <td>188</td>
15126 <td>Not Connected</td>
15127 <td>&#160;</td>
15128 <td>&#160;</td>
15129 </tr>
15130 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15131 <td>131</td>
15132 <td>189</td>
15133 <td>Not Connected</td>
15134 <td>&#160;</td>
15135 <td>&#160;</td>
15136 </tr>
15137 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15138 <td>131</td>
15139 <td>190</td>
15140 <td>Not Connected</td>
15141 <td>&#160;</td>
15142 <td>&#160;</td>
15143 </tr>
15144 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15145 <td>131</td>
15146 <td>191</td>
15147 <td>Not Connected</td>
15148 <td>&#160;</td>
15149 <td>&#160;</td>
15150 </tr>
15151 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15152 <td>131</td>
15153 <td>192</td>
15154 <td>Not Connected</td>
15155 <td>&#160;</td>
15156 <td>&#160;</td>
15157 </tr>
15158 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15159 <td>131</td>
15160 <td>193</td>
15161 <td>Not Connected</td>
15162 <td>&#160;</td>
15163 <td>&#160;</td>
15164 </tr>
15165 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15166 <td>131</td>
15167 <td>194</td>
15168 <td>Not Connected</td>
15169 <td>&#160;</td>
15170 <td>&#160;</td>
15171 </tr>
15172 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15173 <td>131</td>
15174 <td>195</td>
15175 <td>Not Connected</td>
15176 <td>&#160;</td>
15177 <td>&#160;</td>
15178 </tr>
15179 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15180 <td>131</td>
15181 <td>196</td>
15182 <td>Not Connected</td>
15183 <td>&#160;</td>
15184 <td>&#160;</td>
15185 </tr>
15186 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15187 <td>131</td>
15188 <td>197</td>
15189 <td>Not Connected</td>
15190 <td>&#160;</td>
15191 <td>&#160;</td>
15192 </tr>
15193 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15194 <td>131</td>
15195 <td>198</td>
15196 <td>Not Connected</td>
15197 <td>&#160;</td>
15198 <td>&#160;</td>
15199 </tr>
15200 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15201 <td>131</td>
15202 <td>199</td>
15203 <td>Not Connected</td>
15204 <td>&#160;</td>
15205 <td>&#160;</td>
15206 </tr>
15207 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15208 <td>131</td>
15209 <td>200</td>
15210 <td>Not Connected</td>
15211 <td>&#160;</td>
15212 <td>&#160;</td>
15213 </tr>
15214 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15215 <td>131</td>
15216 <td>201</td>
15217 <td>Not Connected</td>
15218 <td>&#160;</td>
15219 <td>&#160;</td>
15220 </tr>
15221 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15222 <td>131</td>
15223 <td>202</td>
15224 <td>Not Connected</td>
15225 <td>&#160;</td>
15226 <td>&#160;</td>
15227 </tr>
15228 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15229 <td>131</td>
15230 <td>203</td>
15231 <td>Not Connected</td>
15232 <td>&#160;</td>
15233 <td>&#160;</td>
15234 </tr>
15235 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15236 <td>131</td>
15237 <td>204</td>
15238 <td>Not Connected</td>
15239 <td>&#160;</td>
15240 <td>&#160;</td>
15241 </tr>
15242 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15243 <td>131</td>
15244 <td>205</td>
15245 <td>Not Connected</td>
15246 <td>&#160;</td>
15247 <td>&#160;</td>
15248 </tr>
15249 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15250 <td>131</td>
15251 <td>206</td>
15252 <td>Not Connected</td>
15253 <td>&#160;</td>
15254 <td>&#160;</td>
15255 </tr>
15256 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15257 <td>131</td>
15258 <td>207</td>
15259 <td>Not Connected</td>
15260 <td>&#160;</td>
15261 <td>&#160;</td>
15262 </tr>
15263 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15264 <td>131</td>
15265 <td>208</td>
15266 <td>Not Connected</td>
15267 <td>&#160;</td>
15268 <td>&#160;</td>
15269 </tr>
15270 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15271 <td>131</td>
15272 <td>209</td>
15273 <td>Not Connected</td>
15274 <td>&#160;</td>
15275 <td>&#160;</td>
15276 </tr>
15277 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15278 <td>131</td>
15279 <td>210</td>
15280 <td>Not Connected</td>
15281 <td>&#160;</td>
15282 <td>&#160;</td>
15283 </tr>
15284 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15285 <td>131</td>
15286 <td>211</td>
15287 <td>Not Connected</td>
15288 <td>&#160;</td>
15289 <td>&#160;</td>
15290 </tr>
15291 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15292 <td>131</td>
15293 <td>212</td>
15294 <td>Not Connected</td>
15295 <td>&#160;</td>
15296 <td>&#160;</td>
15297 </tr>
15298 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15299 <td>131</td>
15300 <td>213</td>
15301 <td>Not Connected</td>
15302 <td>&#160;</td>
15303 <td>&#160;</td>
15304 </tr>
15305 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15306 <td>131</td>
15307 <td>214</td>
15308 <td>Not Connected</td>
15309 <td>&#160;</td>
15310 <td>&#160;</td>
15311 </tr>
15312 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15313 <td>131</td>
15314 <td>215</td>
15315 <td>Not Connected</td>
15316 <td>&#160;</td>
15317 <td>&#160;</td>
15318 </tr>
15319 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15320 <td>131</td>
15321 <td>216</td>
15322 <td>Not Connected</td>
15323 <td>&#160;</td>
15324 <td>&#160;</td>
15325 </tr>
15326 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15327 <td>131</td>
15328 <td>217</td>
15329 <td>Not Connected</td>
15330 <td>&#160;</td>
15331 <td>&#160;</td>
15332 </tr>
15333 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15334 <td>131</td>
15335 <td>218</td>
15336 <td>Not Connected</td>
15337 <td>&#160;</td>
15338 <td>&#160;</td>
15339 </tr>
15340 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15341 <td>131</td>
15342 <td>219</td>
15343 <td>Not Connected</td>
15344 <td>&#160;</td>
15345 <td>&#160;</td>
15346 </tr>
15347 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15348 <td>131</td>
15349 <td>220</td>
15350 <td>Not Connected</td>
15351 <td>&#160;</td>
15352 <td>&#160;</td>
15353 </tr>
15354 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15355 <td>131</td>
15356 <td>221</td>
15357 <td>Not Connected</td>
15358 <td>&#160;</td>
15359 <td>&#160;</td>
15360 </tr>
15361 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15362 <td>131</td>
15363 <td>222</td>
15364 <td>Not Connected</td>
15365 <td>&#160;</td>
15366 <td>&#160;</td>
15367 </tr>
15368 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15369 <td>131</td>
15370 <td>223</td>
15371 <td>Not Connected</td>
15372 <td>&#160;</td>
15373 <td>&#160;</td>
15374 </tr>
15375 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15376 <td>131</td>
15377 <td>224</td>
15378 <td>Not Connected</td>
15379 <td>&#160;</td>
15380 <td>&#160;</td>
15381 </tr>
15382 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15383 <td>131</td>
15384 <td>225</td>
15385 <td>Not Connected</td>
15386 <td>&#160;</td>
15387 <td>&#160;</td>
15388 </tr>
15389 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15390 <td>131</td>
15391 <td>226</td>
15392 <td>Not Connected</td>
15393 <td>&#160;</td>
15394 <td>&#160;</td>
15395 </tr>
15396 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15397 <td>131</td>
15398 <td>227</td>
15399 <td>Not Connected</td>
15400 <td>&#160;</td>
15401 <td>&#160;</td>
15402 </tr>
15403 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15404 <td>131</td>
15405 <td>228</td>
15406 <td>Not Connected</td>
15407 <td>&#160;</td>
15408 <td>&#160;</td>
15409 </tr>
15410 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15411 <td>131</td>
15412 <td>229</td>
15413 <td>Not Connected</td>
15414 <td>&#160;</td>
15415 <td>&#160;</td>
15416 </tr>
15417 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15418 <td>131</td>
15419 <td>230</td>
15420 <td>Not Connected</td>
15421 <td>&#160;</td>
15422 <td>&#160;</td>
15423 </tr>
15424 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15425 <td>131</td>
15426 <td>231</td>
15427 <td>Not Connected</td>
15428 <td>&#160;</td>
15429 <td>&#160;</td>
15430 </tr>
15431 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15432 <td>131</td>
15433 <td>232</td>
15434 <td>Not Connected</td>
15435 <td>&#160;</td>
15436 <td>&#160;</td>
15437 </tr>
15438 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15439 <td>131</td>
15440 <td>233</td>
15441 <td>Not Connected</td>
15442 <td>&#160;</td>
15443 <td>&#160;</td>
15444 </tr>
15445 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15446 <td>131</td>
15447 <td>234</td>
15448 <td>Not Connected</td>
15449 <td>&#160;</td>
15450 <td>&#160;</td>
15451 </tr>
15452 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15453 <td>131</td>
15454 <td>235</td>
15455 <td>Not Connected</td>
15456 <td>&#160;</td>
15457 <td>&#160;</td>
15458 </tr>
15459 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15460 <td>131</td>
15461 <td>236</td>
15462 <td>Not Connected</td>
15463 <td>&#160;</td>
15464 <td>&#160;</td>
15465 </tr>
15466 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15467 <td>131</td>
15468 <td>237</td>
15469 <td>Not Connected</td>
15470 <td>&#160;</td>
15471 <td>&#160;</td>
15472 </tr>
15473 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15474 <td>131</td>
15475 <td>238</td>
15476 <td>Not Connected</td>
15477 <td>&#160;</td>
15478 <td>&#160;</td>
15479 </tr>
15480 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15481 <td>131</td>
15482 <td>239</td>
15483 <td>Not Connected</td>
15484 <td>&#160;</td>
15485 <td>&#160;</td>
15486 </tr>
15487 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15488 <td>131</td>
15489 <td>240</td>
15490 <td>Not Connected</td>
15491 <td>&#160;</td>
15492 <td>&#160;</td>
15493 </tr>
15494 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15495 <td>131</td>
15496 <td>241</td>
15497 <td>Not Connected</td>
15498 <td>&#160;</td>
15499 <td>&#160;</td>
15500 </tr>
15501 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15502 <td>131</td>
15503 <td>242</td>
15504 <td>Not Connected</td>
15505 <td>&#160;</td>
15506 <td>&#160;</td>
15507 </tr>
15508 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15509 <td>131</td>
15510 <td>243</td>
15511 <td>Not Connected</td>
15512 <td>&#160;</td>
15513 <td>&#160;</td>
15514 </tr>
15515 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15516 <td>131</td>
15517 <td>244</td>
15518 <td>Not Connected</td>
15519 <td>&#160;</td>
15520 <td>&#160;</td>
15521 </tr>
15522 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15523 <td>131</td>
15524 <td>245</td>
15525 <td>Not Connected</td>
15526 <td>&#160;</td>
15527 <td>&#160;</td>
15528 </tr>
15529 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15530 <td>131</td>
15531 <td>246</td>
15532 <td>Not Connected</td>
15533 <td>&#160;</td>
15534 <td>&#160;</td>
15535 </tr>
15536 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15537 <td>131</td>
15538 <td>247</td>
15539 <td>Not Connected</td>
15540 <td>&#160;</td>
15541 <td>&#160;</td>
15542 </tr>
15543 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15544 <td>131</td>
15545 <td>248</td>
15546 <td>Not Connected</td>
15547 <td>&#160;</td>
15548 <td>&#160;</td>
15549 </tr>
15550 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15551 <td>131</td>
15552 <td>249</td>
15553 <td>Not Connected</td>
15554 <td>&#160;</td>
15555 <td>&#160;</td>
15556 </tr>
15557 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15558 <td>131</td>
15559 <td>250</td>
15560 <td>Not Connected</td>
15561 <td>&#160;</td>
15562 <td>&#160;</td>
15563 </tr>
15564 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15565 <td>131</td>
15566 <td>251</td>
15567 <td>Not Connected</td>
15568 <td>&#160;</td>
15569 <td>&#160;</td>
15570 </tr>
15571 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15572 <td>131</td>
15573 <td>252</td>
15574 <td>Not Connected</td>
15575 <td>&#160;</td>
15576 <td>&#160;</td>
15577 </tr>
15578 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15579 <td>131</td>
15580 <td>253</td>
15581 <td>Not Connected</td>
15582 <td>&#160;</td>
15583 <td>&#160;</td>
15584 </tr>
15585 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15586 <td>131</td>
15587 <td>254</td>
15588 <td>Not Connected</td>
15589 <td>&#160;</td>
15590 <td>&#160;</td>
15591 </tr>
15592 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15593 <td>131</td>
15594 <td>255</td>
15595 <td>Not Connected</td>
15596 <td>&#160;</td>
15597 <td>&#160;</td>
15598 </tr>
15599 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15600 <td>131</td>
15601 <td>256</td>
15602 <td>J721E_DEV_GPIO0</td>
15603 <td>gpio_bank</td>
15604 <td>0</td>
15605 </tr>
15606 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15607 <td>131</td>
15608 <td>257</td>
15609 <td>J721E_DEV_GPIO0</td>
15610 <td>gpio_bank</td>
15611 <td>1</td>
15612 </tr>
15613 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15614 <td>131</td>
15615 <td>258</td>
15616 <td>J721E_DEV_GPIO0</td>
15617 <td>gpio_bank</td>
15618 <td>2</td>
15619 </tr>
15620 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15621 <td>131</td>
15622 <td>259</td>
15623 <td>J721E_DEV_GPIO0</td>
15624 <td>gpio_bank</td>
15625 <td>3</td>
15626 </tr>
15627 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15628 <td>131</td>
15629 <td>260</td>
15630 <td>J721E_DEV_GPIO0</td>
15631 <td>gpio_bank</td>
15632 <td>4</td>
15633 </tr>
15634 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15635 <td>131</td>
15636 <td>261</td>
15637 <td>J721E_DEV_GPIO0</td>
15638 <td>gpio_bank</td>
15639 <td>5</td>
15640 </tr>
15641 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15642 <td>131</td>
15643 <td>262</td>
15644 <td>J721E_DEV_GPIO0</td>
15645 <td>gpio_bank</td>
15646 <td>6</td>
15647 </tr>
15648 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15649 <td>131</td>
15650 <td>263</td>
15651 <td>J721E_DEV_GPIO0</td>
15652 <td>gpio_bank</td>
15653 <td>7</td>
15654 </tr>
15655 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15656 <td>131</td>
15657 <td>264</td>
15658 <td>J721E_DEV_GPIO2</td>
15659 <td>gpio_bank</td>
15660 <td>0</td>
15661 </tr>
15662 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15663 <td>131</td>
15664 <td>265</td>
15665 <td>J721E_DEV_GPIO2</td>
15666 <td>gpio_bank</td>
15667 <td>1</td>
15668 </tr>
15669 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15670 <td>131</td>
15671 <td>266</td>
15672 <td>J721E_DEV_GPIO2</td>
15673 <td>gpio_bank</td>
15674 <td>2</td>
15675 </tr>
15676 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15677 <td>131</td>
15678 <td>267</td>
15679 <td>J721E_DEV_GPIO2</td>
15680 <td>gpio_bank</td>
15681 <td>3</td>
15682 </tr>
15683 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15684 <td>131</td>
15685 <td>268</td>
15686 <td>J721E_DEV_GPIO2</td>
15687 <td>gpio_bank</td>
15688 <td>4</td>
15689 </tr>
15690 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15691 <td>131</td>
15692 <td>269</td>
15693 <td>J721E_DEV_GPIO2</td>
15694 <td>gpio_bank</td>
15695 <td>5</td>
15696 </tr>
15697 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15698 <td>131</td>
15699 <td>270</td>
15700 <td>J721E_DEV_GPIO2</td>
15701 <td>gpio_bank</td>
15702 <td>6</td>
15703 </tr>
15704 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15705 <td>131</td>
15706 <td>271</td>
15707 <td>J721E_DEV_GPIO2</td>
15708 <td>gpio_bank</td>
15709 <td>7</td>
15710 </tr>
15711 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15712 <td>131</td>
15713 <td>272</td>
15714 <td>J721E_DEV_GPIO4</td>
15715 <td>gpio_bank</td>
15716 <td>0</td>
15717 </tr>
15718 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15719 <td>131</td>
15720 <td>273</td>
15721 <td>J721E_DEV_GPIO4</td>
15722 <td>gpio_bank</td>
15723 <td>1</td>
15724 </tr>
15725 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15726 <td>131</td>
15727 <td>274</td>
15728 <td>J721E_DEV_GPIO4</td>
15729 <td>gpio_bank</td>
15730 <td>2</td>
15731 </tr>
15732 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15733 <td>131</td>
15734 <td>275</td>
15735 <td>J721E_DEV_GPIO4</td>
15736 <td>gpio_bank</td>
15737 <td>3</td>
15738 </tr>
15739 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15740 <td>131</td>
15741 <td>276</td>
15742 <td>J721E_DEV_GPIO4</td>
15743 <td>gpio_bank</td>
15744 <td>4</td>
15745 </tr>
15746 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15747 <td>131</td>
15748 <td>277</td>
15749 <td>J721E_DEV_GPIO4</td>
15750 <td>gpio_bank</td>
15751 <td>5</td>
15752 </tr>
15753 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15754 <td>131</td>
15755 <td>278</td>
15756 <td>J721E_DEV_GPIO4</td>
15757 <td>gpio_bank</td>
15758 <td>6</td>
15759 </tr>
15760 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15761 <td>131</td>
15762 <td>279</td>
15763 <td>J721E_DEV_GPIO4</td>
15764 <td>gpio_bank</td>
15765 <td>7</td>
15766 </tr>
15767 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15768 <td>131</td>
15769 <td>280</td>
15770 <td>J721E_DEV_GPIO6</td>
15771 <td>gpio_bank</td>
15772 <td>0</td>
15773 </tr>
15774 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15775 <td>131</td>
15776 <td>281</td>
15777 <td>J721E_DEV_GPIO6</td>
15778 <td>gpio_bank</td>
15779 <td>1</td>
15780 </tr>
15781 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15782 <td>131</td>
15783 <td>282</td>
15784 <td>J721E_DEV_GPIO6</td>
15785 <td>gpio_bank</td>
15786 <td>2</td>
15787 </tr>
15788 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15789 <td>131</td>
15790 <td>283</td>
15791 <td>J721E_DEV_GPIO6</td>
15792 <td>gpio_bank</td>
15793 <td>3</td>
15794 </tr>
15795 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15796 <td>131</td>
15797 <td>284</td>
15798 <td>J721E_DEV_GPIO6</td>
15799 <td>gpio_bank</td>
15800 <td>4</td>
15801 </tr>
15802 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15803 <td>131</td>
15804 <td>285</td>
15805 <td>J721E_DEV_GPIO6</td>
15806 <td>gpio_bank</td>
15807 <td>5</td>
15808 </tr>
15809 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15810 <td>131</td>
15811 <td>286</td>
15812 <td>J721E_DEV_GPIO6</td>
15813 <td>gpio_bank</td>
15814 <td>6</td>
15815 </tr>
15816 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15817 <td>131</td>
15818 <td>287</td>
15819 <td>J721E_DEV_GPIO6</td>
15820 <td>gpio_bank</td>
15821 <td>7</td>
15822 </tr>
15823 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15824 <td>131</td>
15825 <td>288</td>
15826 <td>J721E_DEV_GPIO1</td>
15827 <td>gpio_bank</td>
15828 <td>0</td>
15829 </tr>
15830 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15831 <td>131</td>
15832 <td>289</td>
15833 <td>J721E_DEV_GPIO1</td>
15834 <td>gpio_bank</td>
15835 <td>1</td>
15836 </tr>
15837 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15838 <td>131</td>
15839 <td>290</td>
15840 <td>J721E_DEV_GPIO1</td>
15841 <td>gpio_bank</td>
15842 <td>2</td>
15843 </tr>
15844 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15845 <td>131</td>
15846 <td>291</td>
15847 <td>Not Connected</td>
15848 <td>&#160;</td>
15849 <td>&#160;</td>
15850 </tr>
15851 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15852 <td>131</td>
15853 <td>292</td>
15854 <td>J721E_DEV_GPIO3</td>
15855 <td>gpio_bank</td>
15856 <td>0</td>
15857 </tr>
15858 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15859 <td>131</td>
15860 <td>293</td>
15861 <td>J721E_DEV_GPIO3</td>
15862 <td>gpio_bank</td>
15863 <td>1</td>
15864 </tr>
15865 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15866 <td>131</td>
15867 <td>294</td>
15868 <td>J721E_DEV_GPIO3</td>
15869 <td>gpio_bank</td>
15870 <td>2</td>
15871 </tr>
15872 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15873 <td>131</td>
15874 <td>295</td>
15875 <td>Not Connected</td>
15876 <td>&#160;</td>
15877 <td>&#160;</td>
15878 </tr>
15879 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15880 <td>131</td>
15881 <td>296</td>
15882 <td>J721E_DEV_GPIO5</td>
15883 <td>gpio_bank</td>
15884 <td>0</td>
15885 </tr>
15886 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15887 <td>131</td>
15888 <td>297</td>
15889 <td>J721E_DEV_GPIO5</td>
15890 <td>gpio_bank</td>
15891 <td>1</td>
15892 </tr>
15893 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15894 <td>131</td>
15895 <td>298</td>
15896 <td>J721E_DEV_GPIO5</td>
15897 <td>gpio_bank</td>
15898 <td>2</td>
15899 </tr>
15900 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15901 <td>131</td>
15902 <td>299</td>
15903 <td>Not Connected</td>
15904 <td>&#160;</td>
15905 <td>&#160;</td>
15906 </tr>
15907 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15908 <td>131</td>
15909 <td>300</td>
15910 <td>J721E_DEV_GPIO7</td>
15911 <td>gpio_bank</td>
15912 <td>0</td>
15913 </tr>
15914 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15915 <td>131</td>
15916 <td>301</td>
15917 <td>J721E_DEV_GPIO7</td>
15918 <td>gpio_bank</td>
15919 <td>1</td>
15920 </tr>
15921 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15922 <td>131</td>
15923 <td>302</td>
15924 <td>J721E_DEV_GPIO7</td>
15925 <td>gpio_bank</td>
15926 <td>2</td>
15927 </tr>
15928 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15929 <td>131</td>
15930 <td>303</td>
15931 <td>Not Connected</td>
15932 <td>&#160;</td>
15933 <td>&#160;</td>
15934 </tr>
15935 </tbody>
15936 </table>
15937 </div>
15938 <div class="section" id="gpiomux-intrtr0-interrupt-router-output-destinations">
15939 <span id="pub-soc-j721e-gpiomux-intrtr0-output-src-list"></span><h2>GPIOMUX_INTRTR0 Interrupt Router Output Destinations<a class="headerlink" href="#gpiomux-intrtr0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
15940 <div class="admonition warning">
15941 <p class="first admonition-title">Warning</p>
15942 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
15943 host within the RM Board Configuration resource assignment array.  The RM
15944 Board Configuration is rejected if an overlap with a reserved resource is
15945 detected.</p>
15946 </div>
15947 <table border="1" class="docutils">
15948 <colgroup>
15949 <col width="19%" />
15950 <col width="11%" />
15951 <col width="13%" />
15952 <col width="26%" />
15953 <col width="17%" />
15954 <col width="14%" />
15955 </colgroup>
15956 <thead valign="bottom">
15957 <tr class="row-odd"><th class="head">IR Name</th>
15958 <th class="head">IR Device ID</th>
15959 <th class="head">IR Output Index</th>
15960 <th class="head">Destination Name</th>
15961 <th class="head">Destination Interface</th>
15962 <th class="head">Destination Index</th>
15963 </tr>
15964 </thead>
15965 <tbody valign="top">
15966 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15967 <td>131</td>
15968 <td>0</td>
15969 <td>J721E_DEV_ESM0</td>
15970 <td>esm_pls_event0</td>
15971 <td>632</td>
15972 </tr>
15973 <tr class="row-odd"><td>&#160;</td>
15974 <td>&#160;</td>
15975 <td>&#160;</td>
15976 <td>J721E_DEV_ESM0</td>
15977 <td>esm_pls_event1</td>
15978 <td>632</td>
15979 </tr>
15980 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15981 <td>131</td>
15982 <td>0</td>
15983 <td>J721E_DEV_ESM0</td>
15984 <td>esm_pls_event2</td>
15985 <td>632</td>
15986 </tr>
15987 <tr class="row-odd"><td>&#160;</td>
15988 <td>&#160;</td>
15989 <td>&#160;</td>
15990 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
15991 <td>in</td>
15992 <td>64</td>
15993 </tr>
15994 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
15995 <td>131</td>
15996 <td>0</td>
15997 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
15998 <td>in</td>
15999 <td>68</td>
16000 </tr>
16001 <tr class="row-odd"><td>&#160;</td>
16002 <td>&#160;</td>
16003 <td>&#160;</td>
16004 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16005 <td>in</td>
16006 <td>68</td>
16007 </tr>
16008 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16009 <td>131</td>
16010 <td>1</td>
16011 <td>J721E_DEV_ESM0</td>
16012 <td>esm_pls_event0</td>
16013 <td>633</td>
16014 </tr>
16015 <tr class="row-odd"><td>&#160;</td>
16016 <td>&#160;</td>
16017 <td>&#160;</td>
16018 <td>J721E_DEV_ESM0</td>
16019 <td>esm_pls_event1</td>
16020 <td>633</td>
16021 </tr>
16022 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16023 <td>131</td>
16024 <td>1</td>
16025 <td>J721E_DEV_ESM0</td>
16026 <td>esm_pls_event2</td>
16027 <td>633</td>
16028 </tr>
16029 <tr class="row-odd"><td>&#160;</td>
16030 <td>&#160;</td>
16031 <td>&#160;</td>
16032 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16033 <td>in</td>
16034 <td>65</td>
16035 </tr>
16036 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16037 <td>131</td>
16038 <td>1</td>
16039 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16040 <td>in</td>
16041 <td>69</td>
16042 </tr>
16043 <tr class="row-odd"><td>&#160;</td>
16044 <td>&#160;</td>
16045 <td>&#160;</td>
16046 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16047 <td>in</td>
16048 <td>69</td>
16049 </tr>
16050 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16051 <td>131</td>
16052 <td>2</td>
16053 <td>J721E_DEV_ESM0</td>
16054 <td>esm_pls_event0</td>
16055 <td>634</td>
16056 </tr>
16057 <tr class="row-odd"><td>&#160;</td>
16058 <td>&#160;</td>
16059 <td>&#160;</td>
16060 <td>J721E_DEV_ESM0</td>
16061 <td>esm_pls_event1</td>
16062 <td>634</td>
16063 </tr>
16064 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16065 <td>131</td>
16066 <td>2</td>
16067 <td>J721E_DEV_ESM0</td>
16068 <td>esm_pls_event2</td>
16069 <td>634</td>
16070 </tr>
16071 <tr class="row-odd"><td>&#160;</td>
16072 <td>&#160;</td>
16073 <td>&#160;</td>
16074 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16075 <td>in</td>
16076 <td>66</td>
16077 </tr>
16078 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16079 <td>131</td>
16080 <td>2</td>
16081 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16082 <td>in</td>
16083 <td>70</td>
16084 </tr>
16085 <tr class="row-odd"><td>&#160;</td>
16086 <td>&#160;</td>
16087 <td>&#160;</td>
16088 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16089 <td>in</td>
16090 <td>70</td>
16091 </tr>
16092 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16093 <td>131</td>
16094 <td>3</td>
16095 <td>J721E_DEV_ESM0</td>
16096 <td>esm_pls_event0</td>
16097 <td>635</td>
16098 </tr>
16099 <tr class="row-odd"><td>&#160;</td>
16100 <td>&#160;</td>
16101 <td>&#160;</td>
16102 <td>J721E_DEV_ESM0</td>
16103 <td>esm_pls_event1</td>
16104 <td>635</td>
16105 </tr>
16106 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16107 <td>131</td>
16108 <td>3</td>
16109 <td>J721E_DEV_ESM0</td>
16110 <td>esm_pls_event2</td>
16111 <td>635</td>
16112 </tr>
16113 <tr class="row-odd"><td>&#160;</td>
16114 <td>&#160;</td>
16115 <td>&#160;</td>
16116 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16117 <td>in</td>
16118 <td>67</td>
16119 </tr>
16120 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16121 <td>131</td>
16122 <td>3</td>
16123 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16124 <td>in</td>
16125 <td>71</td>
16126 </tr>
16127 <tr class="row-odd"><td>&#160;</td>
16128 <td>&#160;</td>
16129 <td>&#160;</td>
16130 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16131 <td>in</td>
16132 <td>71</td>
16133 </tr>
16134 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16135 <td>131</td>
16136 <td>4</td>
16137 <td>J721E_DEV_ESM0</td>
16138 <td>esm_pls_event0</td>
16139 <td>636</td>
16140 </tr>
16141 <tr class="row-odd"><td>&#160;</td>
16142 <td>&#160;</td>
16143 <td>&#160;</td>
16144 <td>J721E_DEV_ESM0</td>
16145 <td>esm_pls_event1</td>
16146 <td>636</td>
16147 </tr>
16148 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16149 <td>131</td>
16150 <td>4</td>
16151 <td>J721E_DEV_ESM0</td>
16152 <td>esm_pls_event2</td>
16153 <td>636</td>
16154 </tr>
16155 <tr class="row-odd"><td>&#160;</td>
16156 <td>&#160;</td>
16157 <td>&#160;</td>
16158 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16159 <td>in</td>
16160 <td>68</td>
16161 </tr>
16162 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16163 <td>131</td>
16164 <td>4</td>
16165 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16166 <td>in</td>
16167 <td>72</td>
16168 </tr>
16169 <tr class="row-odd"><td>&#160;</td>
16170 <td>&#160;</td>
16171 <td>&#160;</td>
16172 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16173 <td>in</td>
16174 <td>72</td>
16175 </tr>
16176 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16177 <td>131</td>
16178 <td>5</td>
16179 <td>J721E_DEV_ESM0</td>
16180 <td>esm_pls_event0</td>
16181 <td>637</td>
16182 </tr>
16183 <tr class="row-odd"><td>&#160;</td>
16184 <td>&#160;</td>
16185 <td>&#160;</td>
16186 <td>J721E_DEV_ESM0</td>
16187 <td>esm_pls_event1</td>
16188 <td>637</td>
16189 </tr>
16190 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16191 <td>131</td>
16192 <td>5</td>
16193 <td>J721E_DEV_ESM0</td>
16194 <td>esm_pls_event2</td>
16195 <td>637</td>
16196 </tr>
16197 <tr class="row-odd"><td>&#160;</td>
16198 <td>&#160;</td>
16199 <td>&#160;</td>
16200 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16201 <td>in</td>
16202 <td>69</td>
16203 </tr>
16204 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16205 <td>131</td>
16206 <td>5</td>
16207 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16208 <td>in</td>
16209 <td>73</td>
16210 </tr>
16211 <tr class="row-odd"><td>&#160;</td>
16212 <td>&#160;</td>
16213 <td>&#160;</td>
16214 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16215 <td>in</td>
16216 <td>73</td>
16217 </tr>
16218 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16219 <td>131</td>
16220 <td>6</td>
16221 <td>J721E_DEV_ESM0</td>
16222 <td>esm_pls_event0</td>
16223 <td>638</td>
16224 </tr>
16225 <tr class="row-odd"><td>&#160;</td>
16226 <td>&#160;</td>
16227 <td>&#160;</td>
16228 <td>J721E_DEV_ESM0</td>
16229 <td>esm_pls_event1</td>
16230 <td>638</td>
16231 </tr>
16232 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16233 <td>131</td>
16234 <td>6</td>
16235 <td>J721E_DEV_ESM0</td>
16236 <td>esm_pls_event2</td>
16237 <td>638</td>
16238 </tr>
16239 <tr class="row-odd"><td>&#160;</td>
16240 <td>&#160;</td>
16241 <td>&#160;</td>
16242 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16243 <td>in</td>
16244 <td>70</td>
16245 </tr>
16246 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16247 <td>131</td>
16248 <td>6</td>
16249 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16250 <td>in</td>
16251 <td>74</td>
16252 </tr>
16253 <tr class="row-odd"><td>&#160;</td>
16254 <td>&#160;</td>
16255 <td>&#160;</td>
16256 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16257 <td>in</td>
16258 <td>74</td>
16259 </tr>
16260 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16261 <td>131</td>
16262 <td>7</td>
16263 <td>J721E_DEV_ESM0</td>
16264 <td>esm_pls_event0</td>
16265 <td>639</td>
16266 </tr>
16267 <tr class="row-odd"><td>&#160;</td>
16268 <td>&#160;</td>
16269 <td>&#160;</td>
16270 <td>J721E_DEV_ESM0</td>
16271 <td>esm_pls_event1</td>
16272 <td>639</td>
16273 </tr>
16274 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16275 <td>131</td>
16276 <td>7</td>
16277 <td>J721E_DEV_ESM0</td>
16278 <td>esm_pls_event2</td>
16279 <td>639</td>
16280 </tr>
16281 <tr class="row-odd"><td>&#160;</td>
16282 <td>&#160;</td>
16283 <td>&#160;</td>
16284 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16285 <td>in</td>
16286 <td>71</td>
16287 </tr>
16288 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16289 <td>131</td>
16290 <td>7</td>
16291 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16292 <td>in</td>
16293 <td>75</td>
16294 </tr>
16295 <tr class="row-odd"><td>&#160;</td>
16296 <td>&#160;</td>
16297 <td>&#160;</td>
16298 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16299 <td>in</td>
16300 <td>75</td>
16301 </tr>
16302 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16303 <td>131</td>
16304 <td>8</td>
16305 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16306 <td>soc_events_in</td>
16307 <td>392</td>
16308 </tr>
16309 <tr class="row-odd"><td>&#160;</td>
16310 <td>&#160;</td>
16311 <td>&#160;</td>
16312 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16313 <td>spi</td>
16314 <td>392</td>
16315 </tr>
16316 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16317 <td>131</td>
16318 <td>8</td>
16319 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16320 <td>in</td>
16321 <td>72</td>
16322 </tr>
16323 <tr class="row-odd"><td>&#160;</td>
16324 <td>&#160;</td>
16325 <td>&#160;</td>
16326 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16327 <td>in</td>
16328 <td>76</td>
16329 </tr>
16330 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16331 <td>131</td>
16332 <td>8</td>
16333 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16334 <td>in</td>
16335 <td>76</td>
16336 </tr>
16337 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16338 <td>131</td>
16339 <td>9</td>
16340 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16341 <td>soc_events_in</td>
16342 <td>393</td>
16343 </tr>
16344 <tr class="row-even"><td>&#160;</td>
16345 <td>&#160;</td>
16346 <td>&#160;</td>
16347 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16348 <td>spi</td>
16349 <td>393</td>
16350 </tr>
16351 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16352 <td>131</td>
16353 <td>9</td>
16354 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16355 <td>in</td>
16356 <td>73</td>
16357 </tr>
16358 <tr class="row-even"><td>&#160;</td>
16359 <td>&#160;</td>
16360 <td>&#160;</td>
16361 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16362 <td>in</td>
16363 <td>77</td>
16364 </tr>
16365 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16366 <td>131</td>
16367 <td>9</td>
16368 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16369 <td>in</td>
16370 <td>77</td>
16371 </tr>
16372 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16373 <td>131</td>
16374 <td>10</td>
16375 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16376 <td>soc_events_in</td>
16377 <td>394</td>
16378 </tr>
16379 <tr class="row-odd"><td>&#160;</td>
16380 <td>&#160;</td>
16381 <td>&#160;</td>
16382 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16383 <td>spi</td>
16384 <td>394</td>
16385 </tr>
16386 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16387 <td>131</td>
16388 <td>10</td>
16389 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16390 <td>in</td>
16391 <td>74</td>
16392 </tr>
16393 <tr class="row-odd"><td>&#160;</td>
16394 <td>&#160;</td>
16395 <td>&#160;</td>
16396 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16397 <td>in</td>
16398 <td>78</td>
16399 </tr>
16400 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16401 <td>131</td>
16402 <td>10</td>
16403 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16404 <td>in</td>
16405 <td>78</td>
16406 </tr>
16407 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16408 <td>131</td>
16409 <td>11</td>
16410 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16411 <td>soc_events_in</td>
16412 <td>395</td>
16413 </tr>
16414 <tr class="row-even"><td>&#160;</td>
16415 <td>&#160;</td>
16416 <td>&#160;</td>
16417 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16418 <td>spi</td>
16419 <td>395</td>
16420 </tr>
16421 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16422 <td>131</td>
16423 <td>11</td>
16424 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16425 <td>in</td>
16426 <td>75</td>
16427 </tr>
16428 <tr class="row-even"><td>&#160;</td>
16429 <td>&#160;</td>
16430 <td>&#160;</td>
16431 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16432 <td>in</td>
16433 <td>79</td>
16434 </tr>
16435 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16436 <td>131</td>
16437 <td>11</td>
16438 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16439 <td>in</td>
16440 <td>79</td>
16441 </tr>
16442 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16443 <td>131</td>
16444 <td>12</td>
16445 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16446 <td>soc_events_in</td>
16447 <td>396</td>
16448 </tr>
16449 <tr class="row-odd"><td>&#160;</td>
16450 <td>&#160;</td>
16451 <td>&#160;</td>
16452 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16453 <td>spi</td>
16454 <td>396</td>
16455 </tr>
16456 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16457 <td>131</td>
16458 <td>12</td>
16459 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16460 <td>in</td>
16461 <td>76</td>
16462 </tr>
16463 <tr class="row-odd"><td>&#160;</td>
16464 <td>&#160;</td>
16465 <td>&#160;</td>
16466 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16467 <td>in</td>
16468 <td>80</td>
16469 </tr>
16470 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16471 <td>131</td>
16472 <td>12</td>
16473 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16474 <td>in</td>
16475 <td>80</td>
16476 </tr>
16477 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16478 <td>131</td>
16479 <td>13</td>
16480 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16481 <td>soc_events_in</td>
16482 <td>397</td>
16483 </tr>
16484 <tr class="row-even"><td>&#160;</td>
16485 <td>&#160;</td>
16486 <td>&#160;</td>
16487 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16488 <td>spi</td>
16489 <td>397</td>
16490 </tr>
16491 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16492 <td>131</td>
16493 <td>13</td>
16494 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16495 <td>in</td>
16496 <td>77</td>
16497 </tr>
16498 <tr class="row-even"><td>&#160;</td>
16499 <td>&#160;</td>
16500 <td>&#160;</td>
16501 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16502 <td>in</td>
16503 <td>81</td>
16504 </tr>
16505 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16506 <td>131</td>
16507 <td>13</td>
16508 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16509 <td>in</td>
16510 <td>81</td>
16511 </tr>
16512 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16513 <td>131</td>
16514 <td>14</td>
16515 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16516 <td>soc_events_in</td>
16517 <td>398</td>
16518 </tr>
16519 <tr class="row-odd"><td>&#160;</td>
16520 <td>&#160;</td>
16521 <td>&#160;</td>
16522 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16523 <td>spi</td>
16524 <td>398</td>
16525 </tr>
16526 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16527 <td>131</td>
16528 <td>14</td>
16529 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16530 <td>in</td>
16531 <td>78</td>
16532 </tr>
16533 <tr class="row-odd"><td>&#160;</td>
16534 <td>&#160;</td>
16535 <td>&#160;</td>
16536 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16537 <td>in</td>
16538 <td>82</td>
16539 </tr>
16540 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16541 <td>131</td>
16542 <td>14</td>
16543 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16544 <td>in</td>
16545 <td>82</td>
16546 </tr>
16547 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16548 <td>131</td>
16549 <td>15</td>
16550 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16551 <td>soc_events_in</td>
16552 <td>399</td>
16553 </tr>
16554 <tr class="row-even"><td>&#160;</td>
16555 <td>&#160;</td>
16556 <td>&#160;</td>
16557 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16558 <td>spi</td>
16559 <td>399</td>
16560 </tr>
16561 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16562 <td>131</td>
16563 <td>15</td>
16564 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16565 <td>in</td>
16566 <td>79</td>
16567 </tr>
16568 <tr class="row-even"><td>&#160;</td>
16569 <td>&#160;</td>
16570 <td>&#160;</td>
16571 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
16572 <td>in</td>
16573 <td>83</td>
16574 </tr>
16575 <tr class="row-odd"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16576 <td>131</td>
16577 <td>15</td>
16578 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
16579 <td>in</td>
16580 <td>83</td>
16581 </tr>
16582 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16583 <td>131</td>
16584 <td>16</td>
16585 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16586 <td>soc_events_in</td>
16587 <td>400</td>
16588 </tr>
16589 <tr class="row-odd"><td>&#160;</td>
16590 <td>&#160;</td>
16591 <td>&#160;</td>
16592 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16593 <td>spi</td>
16594 <td>400</td>
16595 </tr>
16596 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16597 <td>131</td>
16598 <td>16</td>
16599 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16600 <td>in</td>
16601 <td>80</td>
16602 </tr>
16603 <tr class="row-odd"><td>&#160;</td>
16604 <td>&#160;</td>
16605 <td>&#160;</td>
16606 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
16607 <td>intaggr_levi_pend</td>
16608 <td>68</td>
16609 </tr>
16610 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16611 <td>131</td>
16612 <td>16</td>
16613 <td>J721E_DEV_R5FSS0_CORE0</td>
16614 <td>intr</td>
16615 <td>176</td>
16616 </tr>
16617 <tr class="row-odd"><td>&#160;</td>
16618 <td>&#160;</td>
16619 <td>&#160;</td>
16620 <td>J721E_DEV_R5FSS0_CORE1</td>
16621 <td>intr</td>
16622 <td>176</td>
16623 </tr>
16624 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16625 <td>131</td>
16626 <td>16</td>
16627 <td>J721E_DEV_R5FSS1_CORE0</td>
16628 <td>intr</td>
16629 <td>176</td>
16630 </tr>
16631 <tr class="row-odd"><td>&#160;</td>
16632 <td>&#160;</td>
16633 <td>&#160;</td>
16634 <td>J721E_DEV_R5FSS1_CORE1</td>
16635 <td>intr</td>
16636 <td>176</td>
16637 </tr>
16638 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16639 <td>131</td>
16640 <td>17</td>
16641 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16642 <td>soc_events_in</td>
16643 <td>401</td>
16644 </tr>
16645 <tr class="row-odd"><td>&#160;</td>
16646 <td>&#160;</td>
16647 <td>&#160;</td>
16648 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16649 <td>spi</td>
16650 <td>401</td>
16651 </tr>
16652 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16653 <td>131</td>
16654 <td>17</td>
16655 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16656 <td>in</td>
16657 <td>81</td>
16658 </tr>
16659 <tr class="row-odd"><td>&#160;</td>
16660 <td>&#160;</td>
16661 <td>&#160;</td>
16662 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
16663 <td>intaggr_levi_pend</td>
16664 <td>69</td>
16665 </tr>
16666 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16667 <td>131</td>
16668 <td>17</td>
16669 <td>J721E_DEV_R5FSS0_CORE0</td>
16670 <td>intr</td>
16671 <td>177</td>
16672 </tr>
16673 <tr class="row-odd"><td>&#160;</td>
16674 <td>&#160;</td>
16675 <td>&#160;</td>
16676 <td>J721E_DEV_R5FSS0_CORE1</td>
16677 <td>intr</td>
16678 <td>177</td>
16679 </tr>
16680 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16681 <td>131</td>
16682 <td>17</td>
16683 <td>J721E_DEV_R5FSS1_CORE0</td>
16684 <td>intr</td>
16685 <td>177</td>
16686 </tr>
16687 <tr class="row-odd"><td>&#160;</td>
16688 <td>&#160;</td>
16689 <td>&#160;</td>
16690 <td>J721E_DEV_R5FSS1_CORE1</td>
16691 <td>intr</td>
16692 <td>177</td>
16693 </tr>
16694 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16695 <td>131</td>
16696 <td>18</td>
16697 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16698 <td>soc_events_in</td>
16699 <td>402</td>
16700 </tr>
16701 <tr class="row-odd"><td>&#160;</td>
16702 <td>&#160;</td>
16703 <td>&#160;</td>
16704 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16705 <td>spi</td>
16706 <td>402</td>
16707 </tr>
16708 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16709 <td>131</td>
16710 <td>18</td>
16711 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16712 <td>in</td>
16713 <td>82</td>
16714 </tr>
16715 <tr class="row-odd"><td>&#160;</td>
16716 <td>&#160;</td>
16717 <td>&#160;</td>
16718 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
16719 <td>intaggr_levi_pend</td>
16720 <td>70</td>
16721 </tr>
16722 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16723 <td>131</td>
16724 <td>18</td>
16725 <td>J721E_DEV_R5FSS0_CORE0</td>
16726 <td>intr</td>
16727 <td>178</td>
16728 </tr>
16729 <tr class="row-odd"><td>&#160;</td>
16730 <td>&#160;</td>
16731 <td>&#160;</td>
16732 <td>J721E_DEV_R5FSS0_CORE1</td>
16733 <td>intr</td>
16734 <td>178</td>
16735 </tr>
16736 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16737 <td>131</td>
16738 <td>18</td>
16739 <td>J721E_DEV_R5FSS1_CORE0</td>
16740 <td>intr</td>
16741 <td>178</td>
16742 </tr>
16743 <tr class="row-odd"><td>&#160;</td>
16744 <td>&#160;</td>
16745 <td>&#160;</td>
16746 <td>J721E_DEV_R5FSS1_CORE1</td>
16747 <td>intr</td>
16748 <td>178</td>
16749 </tr>
16750 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16751 <td>131</td>
16752 <td>19</td>
16753 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16754 <td>soc_events_in</td>
16755 <td>403</td>
16756 </tr>
16757 <tr class="row-odd"><td>&#160;</td>
16758 <td>&#160;</td>
16759 <td>&#160;</td>
16760 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16761 <td>spi</td>
16762 <td>403</td>
16763 </tr>
16764 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16765 <td>131</td>
16766 <td>19</td>
16767 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16768 <td>in</td>
16769 <td>83</td>
16770 </tr>
16771 <tr class="row-odd"><td>&#160;</td>
16772 <td>&#160;</td>
16773 <td>&#160;</td>
16774 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
16775 <td>intaggr_levi_pend</td>
16776 <td>71</td>
16777 </tr>
16778 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16779 <td>131</td>
16780 <td>19</td>
16781 <td>J721E_DEV_R5FSS0_CORE0</td>
16782 <td>intr</td>
16783 <td>179</td>
16784 </tr>
16785 <tr class="row-odd"><td>&#160;</td>
16786 <td>&#160;</td>
16787 <td>&#160;</td>
16788 <td>J721E_DEV_R5FSS0_CORE1</td>
16789 <td>intr</td>
16790 <td>179</td>
16791 </tr>
16792 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16793 <td>131</td>
16794 <td>19</td>
16795 <td>J721E_DEV_R5FSS1_CORE0</td>
16796 <td>intr</td>
16797 <td>179</td>
16798 </tr>
16799 <tr class="row-odd"><td>&#160;</td>
16800 <td>&#160;</td>
16801 <td>&#160;</td>
16802 <td>J721E_DEV_R5FSS1_CORE1</td>
16803 <td>intr</td>
16804 <td>179</td>
16805 </tr>
16806 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16807 <td>131</td>
16808 <td>20</td>
16809 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16810 <td>soc_events_in</td>
16811 <td>404</td>
16812 </tr>
16813 <tr class="row-odd"><td>&#160;</td>
16814 <td>&#160;</td>
16815 <td>&#160;</td>
16816 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16817 <td>spi</td>
16818 <td>404</td>
16819 </tr>
16820 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16821 <td>131</td>
16822 <td>20</td>
16823 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16824 <td>in</td>
16825 <td>84</td>
16826 </tr>
16827 <tr class="row-odd"><td>&#160;</td>
16828 <td>&#160;</td>
16829 <td>&#160;</td>
16830 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
16831 <td>intaggr_levi_pend</td>
16832 <td>72</td>
16833 </tr>
16834 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16835 <td>131</td>
16836 <td>20</td>
16837 <td>J721E_DEV_R5FSS0_CORE0</td>
16838 <td>intr</td>
16839 <td>180</td>
16840 </tr>
16841 <tr class="row-odd"><td>&#160;</td>
16842 <td>&#160;</td>
16843 <td>&#160;</td>
16844 <td>J721E_DEV_R5FSS0_CORE1</td>
16845 <td>intr</td>
16846 <td>180</td>
16847 </tr>
16848 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16849 <td>131</td>
16850 <td>20</td>
16851 <td>J721E_DEV_R5FSS1_CORE0</td>
16852 <td>intr</td>
16853 <td>180</td>
16854 </tr>
16855 <tr class="row-odd"><td>&#160;</td>
16856 <td>&#160;</td>
16857 <td>&#160;</td>
16858 <td>J721E_DEV_R5FSS1_CORE1</td>
16859 <td>intr</td>
16860 <td>180</td>
16861 </tr>
16862 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16863 <td>131</td>
16864 <td>21</td>
16865 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16866 <td>soc_events_in</td>
16867 <td>405</td>
16868 </tr>
16869 <tr class="row-odd"><td>&#160;</td>
16870 <td>&#160;</td>
16871 <td>&#160;</td>
16872 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16873 <td>spi</td>
16874 <td>405</td>
16875 </tr>
16876 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16877 <td>131</td>
16878 <td>21</td>
16879 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16880 <td>in</td>
16881 <td>85</td>
16882 </tr>
16883 <tr class="row-odd"><td>&#160;</td>
16884 <td>&#160;</td>
16885 <td>&#160;</td>
16886 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
16887 <td>intaggr_levi_pend</td>
16888 <td>73</td>
16889 </tr>
16890 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16891 <td>131</td>
16892 <td>21</td>
16893 <td>J721E_DEV_R5FSS0_CORE0</td>
16894 <td>intr</td>
16895 <td>181</td>
16896 </tr>
16897 <tr class="row-odd"><td>&#160;</td>
16898 <td>&#160;</td>
16899 <td>&#160;</td>
16900 <td>J721E_DEV_R5FSS0_CORE1</td>
16901 <td>intr</td>
16902 <td>181</td>
16903 </tr>
16904 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16905 <td>131</td>
16906 <td>21</td>
16907 <td>J721E_DEV_R5FSS1_CORE0</td>
16908 <td>intr</td>
16909 <td>181</td>
16910 </tr>
16911 <tr class="row-odd"><td>&#160;</td>
16912 <td>&#160;</td>
16913 <td>&#160;</td>
16914 <td>J721E_DEV_R5FSS1_CORE1</td>
16915 <td>intr</td>
16916 <td>181</td>
16917 </tr>
16918 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16919 <td>131</td>
16920 <td>22</td>
16921 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16922 <td>soc_events_in</td>
16923 <td>406</td>
16924 </tr>
16925 <tr class="row-odd"><td>&#160;</td>
16926 <td>&#160;</td>
16927 <td>&#160;</td>
16928 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16929 <td>spi</td>
16930 <td>406</td>
16931 </tr>
16932 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16933 <td>131</td>
16934 <td>22</td>
16935 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16936 <td>in</td>
16937 <td>86</td>
16938 </tr>
16939 <tr class="row-odd"><td>&#160;</td>
16940 <td>&#160;</td>
16941 <td>&#160;</td>
16942 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
16943 <td>intaggr_levi_pend</td>
16944 <td>74</td>
16945 </tr>
16946 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16947 <td>131</td>
16948 <td>22</td>
16949 <td>J721E_DEV_R5FSS0_CORE0</td>
16950 <td>intr</td>
16951 <td>182</td>
16952 </tr>
16953 <tr class="row-odd"><td>&#160;</td>
16954 <td>&#160;</td>
16955 <td>&#160;</td>
16956 <td>J721E_DEV_R5FSS0_CORE1</td>
16957 <td>intr</td>
16958 <td>182</td>
16959 </tr>
16960 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16961 <td>131</td>
16962 <td>22</td>
16963 <td>J721E_DEV_R5FSS1_CORE0</td>
16964 <td>intr</td>
16965 <td>182</td>
16966 </tr>
16967 <tr class="row-odd"><td>&#160;</td>
16968 <td>&#160;</td>
16969 <td>&#160;</td>
16970 <td>J721E_DEV_R5FSS1_CORE1</td>
16971 <td>intr</td>
16972 <td>182</td>
16973 </tr>
16974 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16975 <td>131</td>
16976 <td>23</td>
16977 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
16978 <td>soc_events_in</td>
16979 <td>407</td>
16980 </tr>
16981 <tr class="row-odd"><td>&#160;</td>
16982 <td>&#160;</td>
16983 <td>&#160;</td>
16984 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
16985 <td>spi</td>
16986 <td>407</td>
16987 </tr>
16988 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
16989 <td>131</td>
16990 <td>23</td>
16991 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
16992 <td>in</td>
16993 <td>87</td>
16994 </tr>
16995 <tr class="row-odd"><td>&#160;</td>
16996 <td>&#160;</td>
16997 <td>&#160;</td>
16998 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
16999 <td>intaggr_levi_pend</td>
17000 <td>75</td>
17001 </tr>
17002 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17003 <td>131</td>
17004 <td>23</td>
17005 <td>J721E_DEV_R5FSS0_CORE0</td>
17006 <td>intr</td>
17007 <td>183</td>
17008 </tr>
17009 <tr class="row-odd"><td>&#160;</td>
17010 <td>&#160;</td>
17011 <td>&#160;</td>
17012 <td>J721E_DEV_R5FSS0_CORE1</td>
17013 <td>intr</td>
17014 <td>183</td>
17015 </tr>
17016 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17017 <td>131</td>
17018 <td>23</td>
17019 <td>J721E_DEV_R5FSS1_CORE0</td>
17020 <td>intr</td>
17021 <td>183</td>
17022 </tr>
17023 <tr class="row-odd"><td>&#160;</td>
17024 <td>&#160;</td>
17025 <td>&#160;</td>
17026 <td>J721E_DEV_R5FSS1_CORE1</td>
17027 <td>intr</td>
17028 <td>183</td>
17029 </tr>
17030 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17031 <td>131</td>
17032 <td>24</td>
17033 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17034 <td>soc_events_in</td>
17035 <td>408</td>
17036 </tr>
17037 <tr class="row-odd"><td>&#160;</td>
17038 <td>&#160;</td>
17039 <td>&#160;</td>
17040 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17041 <td>spi</td>
17042 <td>408</td>
17043 </tr>
17044 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17045 <td>131</td>
17046 <td>24</td>
17047 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
17048 <td>in</td>
17049 <td>88</td>
17050 </tr>
17051 <tr class="row-odd"><td>&#160;</td>
17052 <td>&#160;</td>
17053 <td>&#160;</td>
17054 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
17055 <td>intaggr_levi_pend</td>
17056 <td>76</td>
17057 </tr>
17058 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17059 <td>131</td>
17060 <td>24</td>
17061 <td>J721E_DEV_R5FSS0_CORE0</td>
17062 <td>intr</td>
17063 <td>184</td>
17064 </tr>
17065 <tr class="row-odd"><td>&#160;</td>
17066 <td>&#160;</td>
17067 <td>&#160;</td>
17068 <td>J721E_DEV_R5FSS0_CORE1</td>
17069 <td>intr</td>
17070 <td>184</td>
17071 </tr>
17072 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17073 <td>131</td>
17074 <td>24</td>
17075 <td>J721E_DEV_R5FSS1_CORE0</td>
17076 <td>intr</td>
17077 <td>184</td>
17078 </tr>
17079 <tr class="row-odd"><td>&#160;</td>
17080 <td>&#160;</td>
17081 <td>&#160;</td>
17082 <td>J721E_DEV_R5FSS1_CORE1</td>
17083 <td>intr</td>
17084 <td>184</td>
17085 </tr>
17086 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17087 <td>131</td>
17088 <td>25</td>
17089 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17090 <td>soc_events_in</td>
17091 <td>409</td>
17092 </tr>
17093 <tr class="row-odd"><td>&#160;</td>
17094 <td>&#160;</td>
17095 <td>&#160;</td>
17096 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17097 <td>spi</td>
17098 <td>409</td>
17099 </tr>
17100 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17101 <td>131</td>
17102 <td>25</td>
17103 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
17104 <td>in</td>
17105 <td>89</td>
17106 </tr>
17107 <tr class="row-odd"><td>&#160;</td>
17108 <td>&#160;</td>
17109 <td>&#160;</td>
17110 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
17111 <td>intaggr_levi_pend</td>
17112 <td>77</td>
17113 </tr>
17114 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17115 <td>131</td>
17116 <td>25</td>
17117 <td>J721E_DEV_R5FSS0_CORE0</td>
17118 <td>intr</td>
17119 <td>185</td>
17120 </tr>
17121 <tr class="row-odd"><td>&#160;</td>
17122 <td>&#160;</td>
17123 <td>&#160;</td>
17124 <td>J721E_DEV_R5FSS0_CORE1</td>
17125 <td>intr</td>
17126 <td>185</td>
17127 </tr>
17128 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17129 <td>131</td>
17130 <td>25</td>
17131 <td>J721E_DEV_R5FSS1_CORE0</td>
17132 <td>intr</td>
17133 <td>185</td>
17134 </tr>
17135 <tr class="row-odd"><td>&#160;</td>
17136 <td>&#160;</td>
17137 <td>&#160;</td>
17138 <td>J721E_DEV_R5FSS1_CORE1</td>
17139 <td>intr</td>
17140 <td>185</td>
17141 </tr>
17142 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17143 <td>131</td>
17144 <td>26</td>
17145 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17146 <td>soc_events_in</td>
17147 <td>410</td>
17148 </tr>
17149 <tr class="row-odd"><td>&#160;</td>
17150 <td>&#160;</td>
17151 <td>&#160;</td>
17152 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17153 <td>spi</td>
17154 <td>410</td>
17155 </tr>
17156 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17157 <td>131</td>
17158 <td>26</td>
17159 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
17160 <td>in</td>
17161 <td>90</td>
17162 </tr>
17163 <tr class="row-odd"><td>&#160;</td>
17164 <td>&#160;</td>
17165 <td>&#160;</td>
17166 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
17167 <td>intaggr_levi_pend</td>
17168 <td>78</td>
17169 </tr>
17170 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17171 <td>131</td>
17172 <td>26</td>
17173 <td>J721E_DEV_R5FSS0_CORE0</td>
17174 <td>intr</td>
17175 <td>186</td>
17176 </tr>
17177 <tr class="row-odd"><td>&#160;</td>
17178 <td>&#160;</td>
17179 <td>&#160;</td>
17180 <td>J721E_DEV_R5FSS0_CORE1</td>
17181 <td>intr</td>
17182 <td>186</td>
17183 </tr>
17184 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17185 <td>131</td>
17186 <td>26</td>
17187 <td>J721E_DEV_R5FSS1_CORE0</td>
17188 <td>intr</td>
17189 <td>186</td>
17190 </tr>
17191 <tr class="row-odd"><td>&#160;</td>
17192 <td>&#160;</td>
17193 <td>&#160;</td>
17194 <td>J721E_DEV_R5FSS1_CORE1</td>
17195 <td>intr</td>
17196 <td>186</td>
17197 </tr>
17198 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17199 <td>131</td>
17200 <td>27</td>
17201 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17202 <td>soc_events_in</td>
17203 <td>411</td>
17204 </tr>
17205 <tr class="row-odd"><td>&#160;</td>
17206 <td>&#160;</td>
17207 <td>&#160;</td>
17208 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17209 <td>spi</td>
17210 <td>411</td>
17211 </tr>
17212 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17213 <td>131</td>
17214 <td>27</td>
17215 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
17216 <td>in</td>
17217 <td>91</td>
17218 </tr>
17219 <tr class="row-odd"><td>&#160;</td>
17220 <td>&#160;</td>
17221 <td>&#160;</td>
17222 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
17223 <td>intaggr_levi_pend</td>
17224 <td>79</td>
17225 </tr>
17226 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17227 <td>131</td>
17228 <td>27</td>
17229 <td>J721E_DEV_R5FSS0_CORE0</td>
17230 <td>intr</td>
17231 <td>187</td>
17232 </tr>
17233 <tr class="row-odd"><td>&#160;</td>
17234 <td>&#160;</td>
17235 <td>&#160;</td>
17236 <td>J721E_DEV_R5FSS0_CORE1</td>
17237 <td>intr</td>
17238 <td>187</td>
17239 </tr>
17240 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17241 <td>131</td>
17242 <td>27</td>
17243 <td>J721E_DEV_R5FSS1_CORE0</td>
17244 <td>intr</td>
17245 <td>187</td>
17246 </tr>
17247 <tr class="row-odd"><td>&#160;</td>
17248 <td>&#160;</td>
17249 <td>&#160;</td>
17250 <td>J721E_DEV_R5FSS1_CORE1</td>
17251 <td>intr</td>
17252 <td>187</td>
17253 </tr>
17254 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17255 <td>131</td>
17256 <td>28</td>
17257 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17258 <td>soc_events_in</td>
17259 <td>412</td>
17260 </tr>
17261 <tr class="row-odd"><td>&#160;</td>
17262 <td>&#160;</td>
17263 <td>&#160;</td>
17264 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17265 <td>spi</td>
17266 <td>412</td>
17267 </tr>
17268 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17269 <td>131</td>
17270 <td>28</td>
17271 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
17272 <td>in</td>
17273 <td>92</td>
17274 </tr>
17275 <tr class="row-odd"><td>&#160;</td>
17276 <td>&#160;</td>
17277 <td>&#160;</td>
17278 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
17279 <td>intaggr_levi_pend</td>
17280 <td>80</td>
17281 </tr>
17282 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17283 <td>131</td>
17284 <td>28</td>
17285 <td>J721E_DEV_R5FSS0_CORE0</td>
17286 <td>intr</td>
17287 <td>188</td>
17288 </tr>
17289 <tr class="row-odd"><td>&#160;</td>
17290 <td>&#160;</td>
17291 <td>&#160;</td>
17292 <td>J721E_DEV_R5FSS0_CORE1</td>
17293 <td>intr</td>
17294 <td>188</td>
17295 </tr>
17296 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17297 <td>131</td>
17298 <td>28</td>
17299 <td>J721E_DEV_R5FSS1_CORE0</td>
17300 <td>intr</td>
17301 <td>188</td>
17302 </tr>
17303 <tr class="row-odd"><td>&#160;</td>
17304 <td>&#160;</td>
17305 <td>&#160;</td>
17306 <td>J721E_DEV_R5FSS1_CORE1</td>
17307 <td>intr</td>
17308 <td>188</td>
17309 </tr>
17310 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17311 <td>131</td>
17312 <td>29</td>
17313 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17314 <td>soc_events_in</td>
17315 <td>413</td>
17316 </tr>
17317 <tr class="row-odd"><td>&#160;</td>
17318 <td>&#160;</td>
17319 <td>&#160;</td>
17320 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17321 <td>spi</td>
17322 <td>413</td>
17323 </tr>
17324 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17325 <td>131</td>
17326 <td>29</td>
17327 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
17328 <td>in</td>
17329 <td>93</td>
17330 </tr>
17331 <tr class="row-odd"><td>&#160;</td>
17332 <td>&#160;</td>
17333 <td>&#160;</td>
17334 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
17335 <td>intaggr_levi_pend</td>
17336 <td>81</td>
17337 </tr>
17338 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17339 <td>131</td>
17340 <td>29</td>
17341 <td>J721E_DEV_R5FSS0_CORE0</td>
17342 <td>intr</td>
17343 <td>189</td>
17344 </tr>
17345 <tr class="row-odd"><td>&#160;</td>
17346 <td>&#160;</td>
17347 <td>&#160;</td>
17348 <td>J721E_DEV_R5FSS0_CORE1</td>
17349 <td>intr</td>
17350 <td>189</td>
17351 </tr>
17352 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17353 <td>131</td>
17354 <td>29</td>
17355 <td>J721E_DEV_R5FSS1_CORE0</td>
17356 <td>intr</td>
17357 <td>189</td>
17358 </tr>
17359 <tr class="row-odd"><td>&#160;</td>
17360 <td>&#160;</td>
17361 <td>&#160;</td>
17362 <td>J721E_DEV_R5FSS1_CORE1</td>
17363 <td>intr</td>
17364 <td>189</td>
17365 </tr>
17366 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17367 <td>131</td>
17368 <td>30</td>
17369 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17370 <td>soc_events_in</td>
17371 <td>414</td>
17372 </tr>
17373 <tr class="row-odd"><td>&#160;</td>
17374 <td>&#160;</td>
17375 <td>&#160;</td>
17376 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17377 <td>spi</td>
17378 <td>414</td>
17379 </tr>
17380 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17381 <td>131</td>
17382 <td>30</td>
17383 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
17384 <td>in</td>
17385 <td>94</td>
17386 </tr>
17387 <tr class="row-odd"><td>&#160;</td>
17388 <td>&#160;</td>
17389 <td>&#160;</td>
17390 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
17391 <td>intaggr_levi_pend</td>
17392 <td>82</td>
17393 </tr>
17394 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17395 <td>131</td>
17396 <td>30</td>
17397 <td>J721E_DEV_R5FSS0_CORE0</td>
17398 <td>intr</td>
17399 <td>190</td>
17400 </tr>
17401 <tr class="row-odd"><td>&#160;</td>
17402 <td>&#160;</td>
17403 <td>&#160;</td>
17404 <td>J721E_DEV_R5FSS0_CORE1</td>
17405 <td>intr</td>
17406 <td>190</td>
17407 </tr>
17408 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17409 <td>131</td>
17410 <td>30</td>
17411 <td>J721E_DEV_R5FSS1_CORE0</td>
17412 <td>intr</td>
17413 <td>190</td>
17414 </tr>
17415 <tr class="row-odd"><td>&#160;</td>
17416 <td>&#160;</td>
17417 <td>&#160;</td>
17418 <td>J721E_DEV_R5FSS1_CORE1</td>
17419 <td>intr</td>
17420 <td>190</td>
17421 </tr>
17422 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17423 <td>131</td>
17424 <td>31</td>
17425 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17426 <td>soc_events_in</td>
17427 <td>415</td>
17428 </tr>
17429 <tr class="row-odd"><td>&#160;</td>
17430 <td>&#160;</td>
17431 <td>&#160;</td>
17432 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17433 <td>spi</td>
17434 <td>415</td>
17435 </tr>
17436 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17437 <td>131</td>
17438 <td>31</td>
17439 <td>J721E_DEV_MAIN2MCU_PLS_INTRTR0</td>
17440 <td>in</td>
17441 <td>95</td>
17442 </tr>
17443 <tr class="row-odd"><td>&#160;</td>
17444 <td>&#160;</td>
17445 <td>&#160;</td>
17446 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
17447 <td>intaggr_levi_pend</td>
17448 <td>83</td>
17449 </tr>
17450 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17451 <td>131</td>
17452 <td>31</td>
17453 <td>J721E_DEV_R5FSS0_CORE0</td>
17454 <td>intr</td>
17455 <td>191</td>
17456 </tr>
17457 <tr class="row-odd"><td>&#160;</td>
17458 <td>&#160;</td>
17459 <td>&#160;</td>
17460 <td>J721E_DEV_R5FSS0_CORE1</td>
17461 <td>intr</td>
17462 <td>191</td>
17463 </tr>
17464 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17465 <td>131</td>
17466 <td>31</td>
17467 <td>J721E_DEV_R5FSS1_CORE0</td>
17468 <td>intr</td>
17469 <td>191</td>
17470 </tr>
17471 <tr class="row-odd"><td>&#160;</td>
17472 <td>&#160;</td>
17473 <td>&#160;</td>
17474 <td>J721E_DEV_R5FSS1_CORE1</td>
17475 <td>intr</td>
17476 <td>191</td>
17477 </tr>
17478 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17479 <td>131</td>
17480 <td>32</td>
17481 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17482 <td>soc_events_in</td>
17483 <td>416</td>
17484 </tr>
17485 <tr class="row-odd"><td>&#160;</td>
17486 <td>&#160;</td>
17487 <td>&#160;</td>
17488 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17489 <td>spi</td>
17490 <td>416</td>
17491 </tr>
17492 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17493 <td>131</td>
17494 <td>32</td>
17495 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17496 <td>in</td>
17497 <td>391</td>
17498 </tr>
17499 <tr class="row-odd"><td>&#160;</td>
17500 <td>&#160;</td>
17501 <td>&#160;</td>
17502 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17503 <td>in</td>
17504 <td>391</td>
17505 </tr>
17506 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17507 <td>131</td>
17508 <td>33</td>
17509 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17510 <td>soc_events_in</td>
17511 <td>417</td>
17512 </tr>
17513 <tr class="row-odd"><td>&#160;</td>
17514 <td>&#160;</td>
17515 <td>&#160;</td>
17516 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17517 <td>spi</td>
17518 <td>417</td>
17519 </tr>
17520 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17521 <td>131</td>
17522 <td>33</td>
17523 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17524 <td>in</td>
17525 <td>392</td>
17526 </tr>
17527 <tr class="row-odd"><td>&#160;</td>
17528 <td>&#160;</td>
17529 <td>&#160;</td>
17530 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17531 <td>in</td>
17532 <td>392</td>
17533 </tr>
17534 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17535 <td>131</td>
17536 <td>34</td>
17537 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17538 <td>soc_events_in</td>
17539 <td>418</td>
17540 </tr>
17541 <tr class="row-odd"><td>&#160;</td>
17542 <td>&#160;</td>
17543 <td>&#160;</td>
17544 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17545 <td>spi</td>
17546 <td>418</td>
17547 </tr>
17548 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17549 <td>131</td>
17550 <td>34</td>
17551 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17552 <td>in</td>
17553 <td>393</td>
17554 </tr>
17555 <tr class="row-odd"><td>&#160;</td>
17556 <td>&#160;</td>
17557 <td>&#160;</td>
17558 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17559 <td>in</td>
17560 <td>393</td>
17561 </tr>
17562 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17563 <td>131</td>
17564 <td>35</td>
17565 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17566 <td>soc_events_in</td>
17567 <td>419</td>
17568 </tr>
17569 <tr class="row-odd"><td>&#160;</td>
17570 <td>&#160;</td>
17571 <td>&#160;</td>
17572 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17573 <td>spi</td>
17574 <td>419</td>
17575 </tr>
17576 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17577 <td>131</td>
17578 <td>35</td>
17579 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17580 <td>in</td>
17581 <td>394</td>
17582 </tr>
17583 <tr class="row-odd"><td>&#160;</td>
17584 <td>&#160;</td>
17585 <td>&#160;</td>
17586 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17587 <td>in</td>
17588 <td>394</td>
17589 </tr>
17590 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17591 <td>131</td>
17592 <td>36</td>
17593 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17594 <td>soc_events_in</td>
17595 <td>420</td>
17596 </tr>
17597 <tr class="row-odd"><td>&#160;</td>
17598 <td>&#160;</td>
17599 <td>&#160;</td>
17600 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17601 <td>spi</td>
17602 <td>420</td>
17603 </tr>
17604 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17605 <td>131</td>
17606 <td>36</td>
17607 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17608 <td>in</td>
17609 <td>395</td>
17610 </tr>
17611 <tr class="row-odd"><td>&#160;</td>
17612 <td>&#160;</td>
17613 <td>&#160;</td>
17614 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17615 <td>in</td>
17616 <td>395</td>
17617 </tr>
17618 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17619 <td>131</td>
17620 <td>37</td>
17621 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17622 <td>soc_events_in</td>
17623 <td>421</td>
17624 </tr>
17625 <tr class="row-odd"><td>&#160;</td>
17626 <td>&#160;</td>
17627 <td>&#160;</td>
17628 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17629 <td>spi</td>
17630 <td>421</td>
17631 </tr>
17632 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17633 <td>131</td>
17634 <td>37</td>
17635 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17636 <td>in</td>
17637 <td>396</td>
17638 </tr>
17639 <tr class="row-odd"><td>&#160;</td>
17640 <td>&#160;</td>
17641 <td>&#160;</td>
17642 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17643 <td>in</td>
17644 <td>396</td>
17645 </tr>
17646 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17647 <td>131</td>
17648 <td>38</td>
17649 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17650 <td>soc_events_in</td>
17651 <td>422</td>
17652 </tr>
17653 <tr class="row-odd"><td>&#160;</td>
17654 <td>&#160;</td>
17655 <td>&#160;</td>
17656 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17657 <td>spi</td>
17658 <td>422</td>
17659 </tr>
17660 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17661 <td>131</td>
17662 <td>38</td>
17663 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17664 <td>in</td>
17665 <td>397</td>
17666 </tr>
17667 <tr class="row-odd"><td>&#160;</td>
17668 <td>&#160;</td>
17669 <td>&#160;</td>
17670 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17671 <td>in</td>
17672 <td>397</td>
17673 </tr>
17674 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17675 <td>131</td>
17676 <td>39</td>
17677 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17678 <td>soc_events_in</td>
17679 <td>423</td>
17680 </tr>
17681 <tr class="row-odd"><td>&#160;</td>
17682 <td>&#160;</td>
17683 <td>&#160;</td>
17684 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17685 <td>spi</td>
17686 <td>423</td>
17687 </tr>
17688 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17689 <td>131</td>
17690 <td>39</td>
17691 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17692 <td>in</td>
17693 <td>398</td>
17694 </tr>
17695 <tr class="row-odd"><td>&#160;</td>
17696 <td>&#160;</td>
17697 <td>&#160;</td>
17698 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17699 <td>in</td>
17700 <td>398</td>
17701 </tr>
17702 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17703 <td>131</td>
17704 <td>40</td>
17705 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17706 <td>soc_events_in</td>
17707 <td>424</td>
17708 </tr>
17709 <tr class="row-odd"><td>&#160;</td>
17710 <td>&#160;</td>
17711 <td>&#160;</td>
17712 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17713 <td>spi</td>
17714 <td>424</td>
17715 </tr>
17716 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17717 <td>131</td>
17718 <td>40</td>
17719 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17720 <td>in</td>
17721 <td>128</td>
17722 </tr>
17723 <tr class="row-odd"><td>&#160;</td>
17724 <td>&#160;</td>
17725 <td>&#160;</td>
17726 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17727 <td>in</td>
17728 <td>128</td>
17729 </tr>
17730 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17731 <td>131</td>
17732 <td>41</td>
17733 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17734 <td>soc_events_in</td>
17735 <td>425</td>
17736 </tr>
17737 <tr class="row-odd"><td>&#160;</td>
17738 <td>&#160;</td>
17739 <td>&#160;</td>
17740 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17741 <td>spi</td>
17742 <td>425</td>
17743 </tr>
17744 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17745 <td>131</td>
17746 <td>41</td>
17747 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17748 <td>in</td>
17749 <td>129</td>
17750 </tr>
17751 <tr class="row-odd"><td>&#160;</td>
17752 <td>&#160;</td>
17753 <td>&#160;</td>
17754 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17755 <td>in</td>
17756 <td>129</td>
17757 </tr>
17758 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17759 <td>131</td>
17760 <td>42</td>
17761 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17762 <td>soc_events_in</td>
17763 <td>426</td>
17764 </tr>
17765 <tr class="row-odd"><td>&#160;</td>
17766 <td>&#160;</td>
17767 <td>&#160;</td>
17768 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17769 <td>spi</td>
17770 <td>426</td>
17771 </tr>
17772 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17773 <td>131</td>
17774 <td>42</td>
17775 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17776 <td>in</td>
17777 <td>130</td>
17778 </tr>
17779 <tr class="row-odd"><td>&#160;</td>
17780 <td>&#160;</td>
17781 <td>&#160;</td>
17782 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17783 <td>in</td>
17784 <td>130</td>
17785 </tr>
17786 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17787 <td>131</td>
17788 <td>43</td>
17789 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17790 <td>soc_events_in</td>
17791 <td>427</td>
17792 </tr>
17793 <tr class="row-odd"><td>&#160;</td>
17794 <td>&#160;</td>
17795 <td>&#160;</td>
17796 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17797 <td>spi</td>
17798 <td>427</td>
17799 </tr>
17800 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17801 <td>131</td>
17802 <td>43</td>
17803 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17804 <td>in</td>
17805 <td>131</td>
17806 </tr>
17807 <tr class="row-odd"><td>&#160;</td>
17808 <td>&#160;</td>
17809 <td>&#160;</td>
17810 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17811 <td>in</td>
17812 <td>131</td>
17813 </tr>
17814 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17815 <td>131</td>
17816 <td>44</td>
17817 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17818 <td>soc_events_in</td>
17819 <td>428</td>
17820 </tr>
17821 <tr class="row-odd"><td>&#160;</td>
17822 <td>&#160;</td>
17823 <td>&#160;</td>
17824 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17825 <td>spi</td>
17826 <td>428</td>
17827 </tr>
17828 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17829 <td>131</td>
17830 <td>44</td>
17831 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17832 <td>in</td>
17833 <td>132</td>
17834 </tr>
17835 <tr class="row-odd"><td>&#160;</td>
17836 <td>&#160;</td>
17837 <td>&#160;</td>
17838 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17839 <td>in</td>
17840 <td>132</td>
17841 </tr>
17842 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17843 <td>131</td>
17844 <td>45</td>
17845 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17846 <td>soc_events_in</td>
17847 <td>429</td>
17848 </tr>
17849 <tr class="row-odd"><td>&#160;</td>
17850 <td>&#160;</td>
17851 <td>&#160;</td>
17852 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17853 <td>spi</td>
17854 <td>429</td>
17855 </tr>
17856 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17857 <td>131</td>
17858 <td>45</td>
17859 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17860 <td>in</td>
17861 <td>133</td>
17862 </tr>
17863 <tr class="row-odd"><td>&#160;</td>
17864 <td>&#160;</td>
17865 <td>&#160;</td>
17866 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17867 <td>in</td>
17868 <td>133</td>
17869 </tr>
17870 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17871 <td>131</td>
17872 <td>46</td>
17873 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17874 <td>soc_events_in</td>
17875 <td>430</td>
17876 </tr>
17877 <tr class="row-odd"><td>&#160;</td>
17878 <td>&#160;</td>
17879 <td>&#160;</td>
17880 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17881 <td>spi</td>
17882 <td>430</td>
17883 </tr>
17884 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17885 <td>131</td>
17886 <td>46</td>
17887 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17888 <td>in</td>
17889 <td>134</td>
17890 </tr>
17891 <tr class="row-odd"><td>&#160;</td>
17892 <td>&#160;</td>
17893 <td>&#160;</td>
17894 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17895 <td>in</td>
17896 <td>134</td>
17897 </tr>
17898 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17899 <td>131</td>
17900 <td>47</td>
17901 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17902 <td>soc_events_in</td>
17903 <td>431</td>
17904 </tr>
17905 <tr class="row-odd"><td>&#160;</td>
17906 <td>&#160;</td>
17907 <td>&#160;</td>
17908 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17909 <td>spi</td>
17910 <td>431</td>
17911 </tr>
17912 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17913 <td>131</td>
17914 <td>47</td>
17915 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17916 <td>in</td>
17917 <td>135</td>
17918 </tr>
17919 <tr class="row-odd"><td>&#160;</td>
17920 <td>&#160;</td>
17921 <td>&#160;</td>
17922 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17923 <td>in</td>
17924 <td>135</td>
17925 </tr>
17926 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17927 <td>131</td>
17928 <td>48</td>
17929 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17930 <td>soc_events_in</td>
17931 <td>432</td>
17932 </tr>
17933 <tr class="row-odd"><td>&#160;</td>
17934 <td>&#160;</td>
17935 <td>&#160;</td>
17936 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17937 <td>spi</td>
17938 <td>432</td>
17939 </tr>
17940 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17941 <td>131</td>
17942 <td>48</td>
17943 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17944 <td>in</td>
17945 <td>136</td>
17946 </tr>
17947 <tr class="row-odd"><td>&#160;</td>
17948 <td>&#160;</td>
17949 <td>&#160;</td>
17950 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17951 <td>in</td>
17952 <td>136</td>
17953 </tr>
17954 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17955 <td>131</td>
17956 <td>49</td>
17957 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17958 <td>soc_events_in</td>
17959 <td>433</td>
17960 </tr>
17961 <tr class="row-odd"><td>&#160;</td>
17962 <td>&#160;</td>
17963 <td>&#160;</td>
17964 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17965 <td>spi</td>
17966 <td>433</td>
17967 </tr>
17968 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17969 <td>131</td>
17970 <td>49</td>
17971 <td>J721E_DEV_C66SS0_INTROUTER0</td>
17972 <td>in</td>
17973 <td>137</td>
17974 </tr>
17975 <tr class="row-odd"><td>&#160;</td>
17976 <td>&#160;</td>
17977 <td>&#160;</td>
17978 <td>J721E_DEV_C66SS1_INTROUTER0</td>
17979 <td>in</td>
17980 <td>137</td>
17981 </tr>
17982 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17983 <td>131</td>
17984 <td>50</td>
17985 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
17986 <td>soc_events_in</td>
17987 <td>434</td>
17988 </tr>
17989 <tr class="row-odd"><td>&#160;</td>
17990 <td>&#160;</td>
17991 <td>&#160;</td>
17992 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
17993 <td>spi</td>
17994 <td>434</td>
17995 </tr>
17996 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
17997 <td>131</td>
17998 <td>50</td>
17999 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18000 <td>in</td>
18001 <td>138</td>
18002 </tr>
18003 <tr class="row-odd"><td>&#160;</td>
18004 <td>&#160;</td>
18005 <td>&#160;</td>
18006 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18007 <td>in</td>
18008 <td>138</td>
18009 </tr>
18010 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18011 <td>131</td>
18012 <td>51</td>
18013 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18014 <td>soc_events_in</td>
18015 <td>435</td>
18016 </tr>
18017 <tr class="row-odd"><td>&#160;</td>
18018 <td>&#160;</td>
18019 <td>&#160;</td>
18020 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18021 <td>spi</td>
18022 <td>435</td>
18023 </tr>
18024 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18025 <td>131</td>
18026 <td>51</td>
18027 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18028 <td>in</td>
18029 <td>139</td>
18030 </tr>
18031 <tr class="row-odd"><td>&#160;</td>
18032 <td>&#160;</td>
18033 <td>&#160;</td>
18034 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18035 <td>in</td>
18036 <td>139</td>
18037 </tr>
18038 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18039 <td>131</td>
18040 <td>52</td>
18041 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18042 <td>soc_events_in</td>
18043 <td>436</td>
18044 </tr>
18045 <tr class="row-odd"><td>&#160;</td>
18046 <td>&#160;</td>
18047 <td>&#160;</td>
18048 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18049 <td>spi</td>
18050 <td>436</td>
18051 </tr>
18052 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18053 <td>131</td>
18054 <td>52</td>
18055 <td>J721E_DEV_PRU_ICSSG0</td>
18056 <td>pr1_iep0_cap_intr_req</td>
18057 <td>0</td>
18058 </tr>
18059 <tr class="row-odd"><td>&#160;</td>
18060 <td>&#160;</td>
18061 <td>&#160;</td>
18062 <td>J721E_DEV_PRU_ICSSG1</td>
18063 <td>pr1_iep0_cap_intr_req</td>
18064 <td>0</td>
18065 </tr>
18066 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18067 <td>131</td>
18068 <td>52</td>
18069 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18070 <td>in</td>
18071 <td>140</td>
18072 </tr>
18073 <tr class="row-odd"><td>&#160;</td>
18074 <td>&#160;</td>
18075 <td>&#160;</td>
18076 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18077 <td>in</td>
18078 <td>140</td>
18079 </tr>
18080 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18081 <td>131</td>
18082 <td>53</td>
18083 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18084 <td>soc_events_in</td>
18085 <td>437</td>
18086 </tr>
18087 <tr class="row-odd"><td>&#160;</td>
18088 <td>&#160;</td>
18089 <td>&#160;</td>
18090 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18091 <td>spi</td>
18092 <td>437</td>
18093 </tr>
18094 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18095 <td>131</td>
18096 <td>53</td>
18097 <td>J721E_DEV_PRU_ICSSG0</td>
18098 <td>pr1_iep0_cap_intr_req</td>
18099 <td>1</td>
18100 </tr>
18101 <tr class="row-odd"><td>&#160;</td>
18102 <td>&#160;</td>
18103 <td>&#160;</td>
18104 <td>J721E_DEV_PRU_ICSSG1</td>
18105 <td>pr1_iep0_cap_intr_req</td>
18106 <td>1</td>
18107 </tr>
18108 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18109 <td>131</td>
18110 <td>53</td>
18111 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18112 <td>in</td>
18113 <td>141</td>
18114 </tr>
18115 <tr class="row-odd"><td>&#160;</td>
18116 <td>&#160;</td>
18117 <td>&#160;</td>
18118 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18119 <td>in</td>
18120 <td>141</td>
18121 </tr>
18122 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18123 <td>131</td>
18124 <td>54</td>
18125 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18126 <td>soc_events_in</td>
18127 <td>438</td>
18128 </tr>
18129 <tr class="row-odd"><td>&#160;</td>
18130 <td>&#160;</td>
18131 <td>&#160;</td>
18132 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18133 <td>spi</td>
18134 <td>438</td>
18135 </tr>
18136 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18137 <td>131</td>
18138 <td>54</td>
18139 <td>J721E_DEV_PRU_ICSSG0</td>
18140 <td>pr1_iep0_cap_intr_req</td>
18141 <td>2</td>
18142 </tr>
18143 <tr class="row-odd"><td>&#160;</td>
18144 <td>&#160;</td>
18145 <td>&#160;</td>
18146 <td>J721E_DEV_PRU_ICSSG1</td>
18147 <td>pr1_iep0_cap_intr_req</td>
18148 <td>2</td>
18149 </tr>
18150 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18151 <td>131</td>
18152 <td>54</td>
18153 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18154 <td>in</td>
18155 <td>142</td>
18156 </tr>
18157 <tr class="row-odd"><td>&#160;</td>
18158 <td>&#160;</td>
18159 <td>&#160;</td>
18160 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18161 <td>in</td>
18162 <td>142</td>
18163 </tr>
18164 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18165 <td>131</td>
18166 <td>55</td>
18167 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18168 <td>soc_events_in</td>
18169 <td>439</td>
18170 </tr>
18171 <tr class="row-odd"><td>&#160;</td>
18172 <td>&#160;</td>
18173 <td>&#160;</td>
18174 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18175 <td>spi</td>
18176 <td>439</td>
18177 </tr>
18178 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18179 <td>131</td>
18180 <td>55</td>
18181 <td>J721E_DEV_PRU_ICSSG0</td>
18182 <td>pr1_iep0_cap_intr_req</td>
18183 <td>3</td>
18184 </tr>
18185 <tr class="row-odd"><td>&#160;</td>
18186 <td>&#160;</td>
18187 <td>&#160;</td>
18188 <td>J721E_DEV_PRU_ICSSG1</td>
18189 <td>pr1_iep0_cap_intr_req</td>
18190 <td>3</td>
18191 </tr>
18192 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18193 <td>131</td>
18194 <td>55</td>
18195 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18196 <td>in</td>
18197 <td>143</td>
18198 </tr>
18199 <tr class="row-odd"><td>&#160;</td>
18200 <td>&#160;</td>
18201 <td>&#160;</td>
18202 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18203 <td>in</td>
18204 <td>143</td>
18205 </tr>
18206 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18207 <td>131</td>
18208 <td>56</td>
18209 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18210 <td>soc_events_in</td>
18211 <td>440</td>
18212 </tr>
18213 <tr class="row-odd"><td>&#160;</td>
18214 <td>&#160;</td>
18215 <td>&#160;</td>
18216 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18217 <td>spi</td>
18218 <td>440</td>
18219 </tr>
18220 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18221 <td>131</td>
18222 <td>56</td>
18223 <td>J721E_DEV_PRU_ICSSG0</td>
18224 <td>pr1_iep0_cap_intr_req</td>
18225 <td>4</td>
18226 </tr>
18227 <tr class="row-odd"><td>&#160;</td>
18228 <td>&#160;</td>
18229 <td>&#160;</td>
18230 <td>J721E_DEV_PRU_ICSSG1</td>
18231 <td>pr1_iep0_cap_intr_req</td>
18232 <td>4</td>
18233 </tr>
18234 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18235 <td>131</td>
18236 <td>56</td>
18237 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18238 <td>in</td>
18239 <td>144</td>
18240 </tr>
18241 <tr class="row-odd"><td>&#160;</td>
18242 <td>&#160;</td>
18243 <td>&#160;</td>
18244 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18245 <td>in</td>
18246 <td>144</td>
18247 </tr>
18248 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18249 <td>131</td>
18250 <td>57</td>
18251 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18252 <td>soc_events_in</td>
18253 <td>441</td>
18254 </tr>
18255 <tr class="row-odd"><td>&#160;</td>
18256 <td>&#160;</td>
18257 <td>&#160;</td>
18258 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18259 <td>spi</td>
18260 <td>441</td>
18261 </tr>
18262 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18263 <td>131</td>
18264 <td>57</td>
18265 <td>J721E_DEV_PRU_ICSSG0</td>
18266 <td>pr1_iep0_cap_intr_req</td>
18267 <td>5</td>
18268 </tr>
18269 <tr class="row-odd"><td>&#160;</td>
18270 <td>&#160;</td>
18271 <td>&#160;</td>
18272 <td>J721E_DEV_PRU_ICSSG1</td>
18273 <td>pr1_iep0_cap_intr_req</td>
18274 <td>5</td>
18275 </tr>
18276 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18277 <td>131</td>
18278 <td>57</td>
18279 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18280 <td>in</td>
18281 <td>145</td>
18282 </tr>
18283 <tr class="row-odd"><td>&#160;</td>
18284 <td>&#160;</td>
18285 <td>&#160;</td>
18286 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18287 <td>in</td>
18288 <td>145</td>
18289 </tr>
18290 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18291 <td>131</td>
18292 <td>58</td>
18293 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18294 <td>soc_events_in</td>
18295 <td>442</td>
18296 </tr>
18297 <tr class="row-odd"><td>&#160;</td>
18298 <td>&#160;</td>
18299 <td>&#160;</td>
18300 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18301 <td>spi</td>
18302 <td>442</td>
18303 </tr>
18304 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18305 <td>131</td>
18306 <td>58</td>
18307 <td>J721E_DEV_PRU_ICSSG0</td>
18308 <td>pr1_iep1_cap_intr_req</td>
18309 <td>0</td>
18310 </tr>
18311 <tr class="row-odd"><td>&#160;</td>
18312 <td>&#160;</td>
18313 <td>&#160;</td>
18314 <td>J721E_DEV_PRU_ICSSG1</td>
18315 <td>pr1_iep1_cap_intr_req</td>
18316 <td>0</td>
18317 </tr>
18318 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18319 <td>131</td>
18320 <td>58</td>
18321 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18322 <td>in</td>
18323 <td>146</td>
18324 </tr>
18325 <tr class="row-odd"><td>&#160;</td>
18326 <td>&#160;</td>
18327 <td>&#160;</td>
18328 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18329 <td>in</td>
18330 <td>146</td>
18331 </tr>
18332 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18333 <td>131</td>
18334 <td>59</td>
18335 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18336 <td>soc_events_in</td>
18337 <td>443</td>
18338 </tr>
18339 <tr class="row-odd"><td>&#160;</td>
18340 <td>&#160;</td>
18341 <td>&#160;</td>
18342 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18343 <td>spi</td>
18344 <td>443</td>
18345 </tr>
18346 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18347 <td>131</td>
18348 <td>59</td>
18349 <td>J721E_DEV_PRU_ICSSG0</td>
18350 <td>pr1_iep1_cap_intr_req</td>
18351 <td>1</td>
18352 </tr>
18353 <tr class="row-odd"><td>&#160;</td>
18354 <td>&#160;</td>
18355 <td>&#160;</td>
18356 <td>J721E_DEV_PRU_ICSSG1</td>
18357 <td>pr1_iep1_cap_intr_req</td>
18358 <td>1</td>
18359 </tr>
18360 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18361 <td>131</td>
18362 <td>59</td>
18363 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18364 <td>in</td>
18365 <td>147</td>
18366 </tr>
18367 <tr class="row-odd"><td>&#160;</td>
18368 <td>&#160;</td>
18369 <td>&#160;</td>
18370 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18371 <td>in</td>
18372 <td>147</td>
18373 </tr>
18374 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18375 <td>131</td>
18376 <td>60</td>
18377 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18378 <td>soc_events_in</td>
18379 <td>444</td>
18380 </tr>
18381 <tr class="row-odd"><td>&#160;</td>
18382 <td>&#160;</td>
18383 <td>&#160;</td>
18384 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18385 <td>spi</td>
18386 <td>444</td>
18387 </tr>
18388 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18389 <td>131</td>
18390 <td>60</td>
18391 <td>J721E_DEV_PRU_ICSSG0</td>
18392 <td>pr1_iep1_cap_intr_req</td>
18393 <td>2</td>
18394 </tr>
18395 <tr class="row-odd"><td>&#160;</td>
18396 <td>&#160;</td>
18397 <td>&#160;</td>
18398 <td>J721E_DEV_PRU_ICSSG1</td>
18399 <td>pr1_iep1_cap_intr_req</td>
18400 <td>2</td>
18401 </tr>
18402 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18403 <td>131</td>
18404 <td>60</td>
18405 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18406 <td>in</td>
18407 <td>148</td>
18408 </tr>
18409 <tr class="row-odd"><td>&#160;</td>
18410 <td>&#160;</td>
18411 <td>&#160;</td>
18412 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18413 <td>in</td>
18414 <td>148</td>
18415 </tr>
18416 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18417 <td>131</td>
18418 <td>61</td>
18419 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18420 <td>soc_events_in</td>
18421 <td>445</td>
18422 </tr>
18423 <tr class="row-odd"><td>&#160;</td>
18424 <td>&#160;</td>
18425 <td>&#160;</td>
18426 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18427 <td>spi</td>
18428 <td>445</td>
18429 </tr>
18430 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18431 <td>131</td>
18432 <td>61</td>
18433 <td>J721E_DEV_PRU_ICSSG0</td>
18434 <td>pr1_iep1_cap_intr_req</td>
18435 <td>3</td>
18436 </tr>
18437 <tr class="row-odd"><td>&#160;</td>
18438 <td>&#160;</td>
18439 <td>&#160;</td>
18440 <td>J721E_DEV_PRU_ICSSG1</td>
18441 <td>pr1_iep1_cap_intr_req</td>
18442 <td>3</td>
18443 </tr>
18444 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18445 <td>131</td>
18446 <td>61</td>
18447 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18448 <td>in</td>
18449 <td>149</td>
18450 </tr>
18451 <tr class="row-odd"><td>&#160;</td>
18452 <td>&#160;</td>
18453 <td>&#160;</td>
18454 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18455 <td>in</td>
18456 <td>149</td>
18457 </tr>
18458 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18459 <td>131</td>
18460 <td>62</td>
18461 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18462 <td>soc_events_in</td>
18463 <td>446</td>
18464 </tr>
18465 <tr class="row-odd"><td>&#160;</td>
18466 <td>&#160;</td>
18467 <td>&#160;</td>
18468 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18469 <td>spi</td>
18470 <td>446</td>
18471 </tr>
18472 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18473 <td>131</td>
18474 <td>62</td>
18475 <td>J721E_DEV_PRU_ICSSG0</td>
18476 <td>pr1_iep1_cap_intr_req</td>
18477 <td>4</td>
18478 </tr>
18479 <tr class="row-odd"><td>&#160;</td>
18480 <td>&#160;</td>
18481 <td>&#160;</td>
18482 <td>J721E_DEV_PRU_ICSSG1</td>
18483 <td>pr1_iep1_cap_intr_req</td>
18484 <td>4</td>
18485 </tr>
18486 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18487 <td>131</td>
18488 <td>62</td>
18489 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18490 <td>in</td>
18491 <td>150</td>
18492 </tr>
18493 <tr class="row-odd"><td>&#160;</td>
18494 <td>&#160;</td>
18495 <td>&#160;</td>
18496 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18497 <td>in</td>
18498 <td>150</td>
18499 </tr>
18500 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18501 <td>131</td>
18502 <td>63</td>
18503 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
18504 <td>soc_events_in</td>
18505 <td>447</td>
18506 </tr>
18507 <tr class="row-odd"><td>&#160;</td>
18508 <td>&#160;</td>
18509 <td>&#160;</td>
18510 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
18511 <td>spi</td>
18512 <td>447</td>
18513 </tr>
18514 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18515 <td>131</td>
18516 <td>63</td>
18517 <td>J721E_DEV_PRU_ICSSG0</td>
18518 <td>pr1_iep1_cap_intr_req</td>
18519 <td>5</td>
18520 </tr>
18521 <tr class="row-odd"><td>&#160;</td>
18522 <td>&#160;</td>
18523 <td>&#160;</td>
18524 <td>J721E_DEV_PRU_ICSSG1</td>
18525 <td>pr1_iep1_cap_intr_req</td>
18526 <td>5</td>
18527 </tr>
18528 <tr class="row-even"><td>J721E_DEV_GPIOMUX_INTRTR0</td>
18529 <td>131</td>
18530 <td>63</td>
18531 <td>J721E_DEV_C66SS0_INTROUTER0</td>
18532 <td>in</td>
18533 <td>151</td>
18534 </tr>
18535 <tr class="row-odd"><td>&#160;</td>
18536 <td>&#160;</td>
18537 <td>&#160;</td>
18538 <td>J721E_DEV_C66SS1_INTROUTER0</td>
18539 <td>in</td>
18540 <td>151</td>
18541 </tr>
18542 </tbody>
18543 </table>
18544 </div>
18545 <div class="section" id="r5fss0-introuter0-interrupt-router-input-sources">
18546 <span id="pub-soc-j721e-r5fss0-introuter0-input-src-list"></span><h2>R5FSS0_INTROUTER0 Interrupt Router Input Sources<a class="headerlink" href="#r5fss0-introuter0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
18547 <div class="admonition warning">
18548 <p class="first admonition-title">Warning</p>
18549 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
18550 host within the RM Board Configuration resource assignment array.  The RM
18551 Board Configuration is rejected if an overlap with a reserved resource is
18552 detected.</p>
18553 </div>
18554 <table border="1" class="docutils">
18555 <colgroup>
18556 <col width="19%" />
18557 <col width="10%" />
18558 <col width="12%" />
18559 <col width="22%" />
18560 <col width="26%" />
18561 <col width="10%" />
18562 </colgroup>
18563 <thead valign="bottom">
18564 <tr class="row-odd"><th class="head">IR Name</th>
18565 <th class="head">IR Device ID</th>
18566 <th class="head">IR Input Index</th>
18567 <th class="head">Source Name</th>
18568 <th class="head">Source Interface</th>
18569 <th class="head">Source Index</th>
18570 </tr>
18571 </thead>
18572 <tbody valign="top">
18573 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18574 <td>134</td>
18575 <td>0</td>
18576 <td>Not Connected</td>
18577 <td>&#160;</td>
18578 <td>&#160;</td>
18579 </tr>
18580 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18581 <td>134</td>
18582 <td>1</td>
18583 <td>J721E_DEV_USB1</td>
18584 <td>otgirq</td>
18585 <td>0</td>
18586 </tr>
18587 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18588 <td>134</td>
18589 <td>2</td>
18590 <td>J721E_DEV_USB1</td>
18591 <td>irq</td>
18592 <td>0</td>
18593 </tr>
18594 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18595 <td>134</td>
18596 <td>3</td>
18597 <td>J721E_DEV_USB1</td>
18598 <td>irq</td>
18599 <td>1</td>
18600 </tr>
18601 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18602 <td>134</td>
18603 <td>4</td>
18604 <td>J721E_DEV_USB1</td>
18605 <td>irq</td>
18606 <td>2</td>
18607 </tr>
18608 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18609 <td>134</td>
18610 <td>5</td>
18611 <td>J721E_DEV_USB1</td>
18612 <td>irq</td>
18613 <td>3</td>
18614 </tr>
18615 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18616 <td>134</td>
18617 <td>6</td>
18618 <td>J721E_DEV_USB1</td>
18619 <td>irq</td>
18620 <td>4</td>
18621 </tr>
18622 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18623 <td>134</td>
18624 <td>7</td>
18625 <td>J721E_DEV_USB1</td>
18626 <td>irq</td>
18627 <td>5</td>
18628 </tr>
18629 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18630 <td>134</td>
18631 <td>8</td>
18632 <td>J721E_DEV_USB1</td>
18633 <td>irq</td>
18634 <td>6</td>
18635 </tr>
18636 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18637 <td>134</td>
18638 <td>9</td>
18639 <td>J721E_DEV_USB1</td>
18640 <td>irq</td>
18641 <td>7</td>
18642 </tr>
18643 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18644 <td>134</td>
18645 <td>10</td>
18646 <td>Not Connected</td>
18647 <td>&#160;</td>
18648 <td>&#160;</td>
18649 </tr>
18650 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18651 <td>134</td>
18652 <td>11</td>
18653 <td>Not Connected</td>
18654 <td>&#160;</td>
18655 <td>&#160;</td>
18656 </tr>
18657 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18658 <td>134</td>
18659 <td>12</td>
18660 <td>Not Connected</td>
18661 <td>&#160;</td>
18662 <td>&#160;</td>
18663 </tr>
18664 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18665 <td>134</td>
18666 <td>13</td>
18667 <td>Not Connected</td>
18668 <td>&#160;</td>
18669 <td>&#160;</td>
18670 </tr>
18671 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18672 <td>134</td>
18673 <td>14</td>
18674 <td>Not Connected</td>
18675 <td>&#160;</td>
18676 <td>&#160;</td>
18677 </tr>
18678 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18679 <td>134</td>
18680 <td>15</td>
18681 <td>Not Connected</td>
18682 <td>&#160;</td>
18683 <td>&#160;</td>
18684 </tr>
18685 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18686 <td>134</td>
18687 <td>16</td>
18688 <td>Not Connected</td>
18689 <td>&#160;</td>
18690 <td>&#160;</td>
18691 </tr>
18692 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18693 <td>134</td>
18694 <td>17</td>
18695 <td>Not Connected</td>
18696 <td>&#160;</td>
18697 <td>&#160;</td>
18698 </tr>
18699 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18700 <td>134</td>
18701 <td>18</td>
18702 <td>Not Connected</td>
18703 <td>&#160;</td>
18704 <td>&#160;</td>
18705 </tr>
18706 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18707 <td>134</td>
18708 <td>19</td>
18709 <td>J721E_DEV_PCIE2</td>
18710 <td>pcie_legacy_pulse</td>
18711 <td>0</td>
18712 </tr>
18713 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18714 <td>134</td>
18715 <td>20</td>
18716 <td>J721E_DEV_PCIE2</td>
18717 <td>pcie_downstream_pulse</td>
18718 <td>0</td>
18719 </tr>
18720 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18721 <td>134</td>
18722 <td>21</td>
18723 <td>J721E_DEV_PCIE2</td>
18724 <td>pcie_flr_pulse</td>
18725 <td>0</td>
18726 </tr>
18727 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18728 <td>134</td>
18729 <td>22</td>
18730 <td>J721E_DEV_PCIE2</td>
18731 <td>pcie_phy_level</td>
18732 <td>0</td>
18733 </tr>
18734 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18735 <td>134</td>
18736 <td>23</td>
18737 <td>J721E_DEV_PCIE2</td>
18738 <td>pcie_local_level</td>
18739 <td>0</td>
18740 </tr>
18741 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18742 <td>134</td>
18743 <td>24</td>
18744 <td>J721E_DEV_PCIE2</td>
18745 <td>pcie_error_pulse</td>
18746 <td>0</td>
18747 </tr>
18748 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18749 <td>134</td>
18750 <td>25</td>
18751 <td>J721E_DEV_PCIE2</td>
18752 <td>pcie_link_state_pulse</td>
18753 <td>0</td>
18754 </tr>
18755 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18756 <td>134</td>
18757 <td>26</td>
18758 <td>J721E_DEV_PCIE2</td>
18759 <td>pcie_pwr_state_pulse</td>
18760 <td>0</td>
18761 </tr>
18762 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18763 <td>134</td>
18764 <td>27</td>
18765 <td>J721E_DEV_PCIE2</td>
18766 <td>pcie_ptm_valid_pulse</td>
18767 <td>0</td>
18768 </tr>
18769 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18770 <td>134</td>
18771 <td>28</td>
18772 <td>J721E_DEV_PCIE2</td>
18773 <td>pcie_hot_reset_pulse</td>
18774 <td>0</td>
18775 </tr>
18776 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18777 <td>134</td>
18778 <td>29</td>
18779 <td>J721E_DEV_PCIE2</td>
18780 <td>pcie_cpts_pend</td>
18781 <td>0</td>
18782 </tr>
18783 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18784 <td>134</td>
18785 <td>30</td>
18786 <td>J721E_DEV_PRU_ICSSG0</td>
18787 <td>pr1_host_intr_pend</td>
18788 <td>0</td>
18789 </tr>
18790 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18791 <td>134</td>
18792 <td>31</td>
18793 <td>J721E_DEV_PRU_ICSSG0</td>
18794 <td>pr1_host_intr_pend</td>
18795 <td>1</td>
18796 </tr>
18797 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18798 <td>134</td>
18799 <td>32</td>
18800 <td>J721E_DEV_PRU_ICSSG0</td>
18801 <td>pr1_host_intr_pend</td>
18802 <td>2</td>
18803 </tr>
18804 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18805 <td>134</td>
18806 <td>33</td>
18807 <td>J721E_DEV_PRU_ICSSG0</td>
18808 <td>pr1_host_intr_pend</td>
18809 <td>3</td>
18810 </tr>
18811 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18812 <td>134</td>
18813 <td>34</td>
18814 <td>J721E_DEV_PRU_ICSSG0</td>
18815 <td>pr1_host_intr_pend</td>
18816 <td>4</td>
18817 </tr>
18818 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18819 <td>134</td>
18820 <td>35</td>
18821 <td>J721E_DEV_PRU_ICSSG0</td>
18822 <td>pr1_host_intr_pend</td>
18823 <td>5</td>
18824 </tr>
18825 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18826 <td>134</td>
18827 <td>36</td>
18828 <td>J721E_DEV_PRU_ICSSG0</td>
18829 <td>pr1_host_intr_pend</td>
18830 <td>6</td>
18831 </tr>
18832 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18833 <td>134</td>
18834 <td>37</td>
18835 <td>J721E_DEV_PRU_ICSSG0</td>
18836 <td>pr1_host_intr_pend</td>
18837 <td>7</td>
18838 </tr>
18839 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18840 <td>134</td>
18841 <td>38</td>
18842 <td>J721E_DEV_PRU_ICSSG1</td>
18843 <td>pr1_host_intr_pend</td>
18844 <td>0</td>
18845 </tr>
18846 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18847 <td>134</td>
18848 <td>39</td>
18849 <td>J721E_DEV_PRU_ICSSG1</td>
18850 <td>pr1_host_intr_pend</td>
18851 <td>1</td>
18852 </tr>
18853 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18854 <td>134</td>
18855 <td>40</td>
18856 <td>J721E_DEV_PRU_ICSSG1</td>
18857 <td>pr1_host_intr_pend</td>
18858 <td>2</td>
18859 </tr>
18860 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18861 <td>134</td>
18862 <td>41</td>
18863 <td>J721E_DEV_PRU_ICSSG1</td>
18864 <td>pr1_host_intr_pend</td>
18865 <td>3</td>
18866 </tr>
18867 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18868 <td>134</td>
18869 <td>42</td>
18870 <td>J721E_DEV_PRU_ICSSG1</td>
18871 <td>pr1_host_intr_pend</td>
18872 <td>4</td>
18873 </tr>
18874 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18875 <td>134</td>
18876 <td>43</td>
18877 <td>J721E_DEV_PRU_ICSSG1</td>
18878 <td>pr1_host_intr_pend</td>
18879 <td>5</td>
18880 </tr>
18881 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18882 <td>134</td>
18883 <td>44</td>
18884 <td>J721E_DEV_PRU_ICSSG1</td>
18885 <td>pr1_host_intr_pend</td>
18886 <td>6</td>
18887 </tr>
18888 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18889 <td>134</td>
18890 <td>45</td>
18891 <td>J721E_DEV_PRU_ICSSG1</td>
18892 <td>pr1_host_intr_pend</td>
18893 <td>7</td>
18894 </tr>
18895 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18896 <td>134</td>
18897 <td>46</td>
18898 <td>J721E_DEV_PRU_ICSSG0</td>
18899 <td>pr1_tx_sof_intr_req</td>
18900 <td>0</td>
18901 </tr>
18902 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18903 <td>134</td>
18904 <td>47</td>
18905 <td>J721E_DEV_PRU_ICSSG0</td>
18906 <td>pr1_tx_sof_intr_req</td>
18907 <td>1</td>
18908 </tr>
18909 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18910 <td>134</td>
18911 <td>48</td>
18912 <td>J721E_DEV_PRU_ICSSG0</td>
18913 <td>pr1_rx_sof_intr_req</td>
18914 <td>0</td>
18915 </tr>
18916 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18917 <td>134</td>
18918 <td>49</td>
18919 <td>J721E_DEV_PRU_ICSSG0</td>
18920 <td>pr1_rx_sof_intr_req</td>
18921 <td>1</td>
18922 </tr>
18923 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18924 <td>134</td>
18925 <td>50</td>
18926 <td>J721E_DEV_PRU_ICSSG1</td>
18927 <td>pr1_tx_sof_intr_req</td>
18928 <td>0</td>
18929 </tr>
18930 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18931 <td>134</td>
18932 <td>51</td>
18933 <td>J721E_DEV_PRU_ICSSG1</td>
18934 <td>pr1_tx_sof_intr_req</td>
18935 <td>1</td>
18936 </tr>
18937 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18938 <td>134</td>
18939 <td>52</td>
18940 <td>J721E_DEV_PRU_ICSSG1</td>
18941 <td>pr1_rx_sof_intr_req</td>
18942 <td>0</td>
18943 </tr>
18944 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18945 <td>134</td>
18946 <td>53</td>
18947 <td>J721E_DEV_PRU_ICSSG1</td>
18948 <td>pr1_rx_sof_intr_req</td>
18949 <td>1</td>
18950 </tr>
18951 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18952 <td>134</td>
18953 <td>54</td>
18954 <td>J721E_DEV_PCIE3</td>
18955 <td>pcie_legacy_pulse</td>
18956 <td>0</td>
18957 </tr>
18958 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18959 <td>134</td>
18960 <td>55</td>
18961 <td>J721E_DEV_PCIE3</td>
18962 <td>pcie_downstream_pulse</td>
18963 <td>0</td>
18964 </tr>
18965 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18966 <td>134</td>
18967 <td>56</td>
18968 <td>J721E_DEV_PCIE3</td>
18969 <td>pcie_flr_pulse</td>
18970 <td>0</td>
18971 </tr>
18972 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18973 <td>134</td>
18974 <td>57</td>
18975 <td>J721E_DEV_PCIE3</td>
18976 <td>pcie_phy_level</td>
18977 <td>0</td>
18978 </tr>
18979 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18980 <td>134</td>
18981 <td>58</td>
18982 <td>J721E_DEV_PCIE3</td>
18983 <td>pcie_local_level</td>
18984 <td>0</td>
18985 </tr>
18986 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18987 <td>134</td>
18988 <td>59</td>
18989 <td>J721E_DEV_PCIE3</td>
18990 <td>pcie_error_pulse</td>
18991 <td>0</td>
18992 </tr>
18993 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
18994 <td>134</td>
18995 <td>60</td>
18996 <td>J721E_DEV_PCIE3</td>
18997 <td>pcie_link_state_pulse</td>
18998 <td>0</td>
18999 </tr>
19000 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19001 <td>134</td>
19002 <td>61</td>
19003 <td>J721E_DEV_PCIE3</td>
19004 <td>pcie_pwr_state_pulse</td>
19005 <td>0</td>
19006 </tr>
19007 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19008 <td>134</td>
19009 <td>62</td>
19010 <td>J721E_DEV_PCIE3</td>
19011 <td>pcie_ptm_valid_pulse</td>
19012 <td>0</td>
19013 </tr>
19014 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19015 <td>134</td>
19016 <td>63</td>
19017 <td>J721E_DEV_PCIE3</td>
19018 <td>pcie_hot_reset_pulse</td>
19019 <td>0</td>
19020 </tr>
19021 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19022 <td>134</td>
19023 <td>64</td>
19024 <td>J721E_DEV_PCIE3</td>
19025 <td>pcie_cpts_pend</td>
19026 <td>0</td>
19027 </tr>
19028 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19029 <td>134</td>
19030 <td>65</td>
19031 <td>J721E_DEV_USB1</td>
19032 <td>host_system_error</td>
19033 <td>0</td>
19034 </tr>
19035 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19036 <td>134</td>
19037 <td>66</td>
19038 <td>Not Connected</td>
19039 <td>&#160;</td>
19040 <td>&#160;</td>
19041 </tr>
19042 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19043 <td>134</td>
19044 <td>67</td>
19045 <td>Not Connected</td>
19046 <td>&#160;</td>
19047 <td>&#160;</td>
19048 </tr>
19049 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19050 <td>134</td>
19051 <td>68</td>
19052 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19053 <td>outp</td>
19054 <td>0</td>
19055 </tr>
19056 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19057 <td>134</td>
19058 <td>69</td>
19059 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19060 <td>outp</td>
19061 <td>1</td>
19062 </tr>
19063 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19064 <td>134</td>
19065 <td>70</td>
19066 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19067 <td>outp</td>
19068 <td>2</td>
19069 </tr>
19070 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19071 <td>134</td>
19072 <td>71</td>
19073 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19074 <td>outp</td>
19075 <td>3</td>
19076 </tr>
19077 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19078 <td>134</td>
19079 <td>72</td>
19080 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19081 <td>outp</td>
19082 <td>4</td>
19083 </tr>
19084 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19085 <td>134</td>
19086 <td>73</td>
19087 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19088 <td>outp</td>
19089 <td>5</td>
19090 </tr>
19091 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19092 <td>134</td>
19093 <td>74</td>
19094 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19095 <td>outp</td>
19096 <td>6</td>
19097 </tr>
19098 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19099 <td>134</td>
19100 <td>75</td>
19101 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19102 <td>outp</td>
19103 <td>7</td>
19104 </tr>
19105 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19106 <td>134</td>
19107 <td>76</td>
19108 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19109 <td>outp</td>
19110 <td>8</td>
19111 </tr>
19112 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19113 <td>134</td>
19114 <td>77</td>
19115 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19116 <td>outp</td>
19117 <td>9</td>
19118 </tr>
19119 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19120 <td>134</td>
19121 <td>78</td>
19122 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19123 <td>outp</td>
19124 <td>10</td>
19125 </tr>
19126 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19127 <td>134</td>
19128 <td>79</td>
19129 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19130 <td>outp</td>
19131 <td>11</td>
19132 </tr>
19133 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19134 <td>134</td>
19135 <td>80</td>
19136 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19137 <td>outp</td>
19138 <td>12</td>
19139 </tr>
19140 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19141 <td>134</td>
19142 <td>81</td>
19143 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19144 <td>outp</td>
19145 <td>13</td>
19146 </tr>
19147 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19148 <td>134</td>
19149 <td>82</td>
19150 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19151 <td>outp</td>
19152 <td>14</td>
19153 </tr>
19154 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19155 <td>134</td>
19156 <td>83</td>
19157 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
19158 <td>outp</td>
19159 <td>15</td>
19160 </tr>
19161 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19162 <td>134</td>
19163 <td>84</td>
19164 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19165 <td>soc_events_out_level</td>
19166 <td>0</td>
19167 </tr>
19168 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19169 <td>134</td>
19170 <td>85</td>
19171 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19172 <td>soc_events_out_level</td>
19173 <td>1</td>
19174 </tr>
19175 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19176 <td>134</td>
19177 <td>86</td>
19178 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19179 <td>soc_events_out_level</td>
19180 <td>2</td>
19181 </tr>
19182 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19183 <td>134</td>
19184 <td>87</td>
19185 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19186 <td>soc_events_out_level</td>
19187 <td>3</td>
19188 </tr>
19189 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19190 <td>134</td>
19191 <td>88</td>
19192 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19193 <td>soc_events_out_level</td>
19194 <td>4</td>
19195 </tr>
19196 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19197 <td>134</td>
19198 <td>89</td>
19199 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19200 <td>soc_events_out_level</td>
19201 <td>5</td>
19202 </tr>
19203 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19204 <td>134</td>
19205 <td>90</td>
19206 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19207 <td>soc_events_out_level</td>
19208 <td>6</td>
19209 </tr>
19210 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19211 <td>134</td>
19212 <td>91</td>
19213 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19214 <td>soc_events_out_level</td>
19215 <td>7</td>
19216 </tr>
19217 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19218 <td>134</td>
19219 <td>92</td>
19220 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19221 <td>soc_events_out_level</td>
19222 <td>8</td>
19223 </tr>
19224 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19225 <td>134</td>
19226 <td>93</td>
19227 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19228 <td>soc_events_out_level</td>
19229 <td>9</td>
19230 </tr>
19231 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19232 <td>134</td>
19233 <td>94</td>
19234 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19235 <td>soc_events_out_level</td>
19236 <td>10</td>
19237 </tr>
19238 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19239 <td>134</td>
19240 <td>95</td>
19241 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19242 <td>soc_events_out_level</td>
19243 <td>11</td>
19244 </tr>
19245 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19246 <td>134</td>
19247 <td>96</td>
19248 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19249 <td>soc_events_out_level</td>
19250 <td>12</td>
19251 </tr>
19252 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19253 <td>134</td>
19254 <td>97</td>
19255 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19256 <td>soc_events_out_level</td>
19257 <td>13</td>
19258 </tr>
19259 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19260 <td>134</td>
19261 <td>98</td>
19262 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19263 <td>soc_events_out_level</td>
19264 <td>14</td>
19265 </tr>
19266 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19267 <td>134</td>
19268 <td>99</td>
19269 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
19270 <td>soc_events_out_level</td>
19271 <td>15</td>
19272 </tr>
19273 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19274 <td>134</td>
19275 <td>100</td>
19276 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19277 <td>outp</td>
19278 <td>16</td>
19279 </tr>
19280 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19281 <td>134</td>
19282 <td>101</td>
19283 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19284 <td>outp</td>
19285 <td>17</td>
19286 </tr>
19287 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19288 <td>134</td>
19289 <td>102</td>
19290 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19291 <td>outp</td>
19292 <td>18</td>
19293 </tr>
19294 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19295 <td>134</td>
19296 <td>103</td>
19297 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19298 <td>outp</td>
19299 <td>19</td>
19300 </tr>
19301 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19302 <td>134</td>
19303 <td>104</td>
19304 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19305 <td>outp</td>
19306 <td>20</td>
19307 </tr>
19308 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19309 <td>134</td>
19310 <td>105</td>
19311 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19312 <td>outp</td>
19313 <td>21</td>
19314 </tr>
19315 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19316 <td>134</td>
19317 <td>106</td>
19318 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19319 <td>outp</td>
19320 <td>22</td>
19321 </tr>
19322 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19323 <td>134</td>
19324 <td>107</td>
19325 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19326 <td>outp</td>
19327 <td>23</td>
19328 </tr>
19329 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19330 <td>134</td>
19331 <td>108</td>
19332 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19333 <td>outp</td>
19334 <td>24</td>
19335 </tr>
19336 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19337 <td>134</td>
19338 <td>109</td>
19339 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19340 <td>outp</td>
19341 <td>25</td>
19342 </tr>
19343 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19344 <td>134</td>
19345 <td>110</td>
19346 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19347 <td>outp</td>
19348 <td>26</td>
19349 </tr>
19350 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19351 <td>134</td>
19352 <td>111</td>
19353 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19354 <td>outp</td>
19355 <td>27</td>
19356 </tr>
19357 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19358 <td>134</td>
19359 <td>112</td>
19360 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19361 <td>outp</td>
19362 <td>28</td>
19363 </tr>
19364 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19365 <td>134</td>
19366 <td>113</td>
19367 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19368 <td>outp</td>
19369 <td>29</td>
19370 </tr>
19371 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19372 <td>134</td>
19373 <td>114</td>
19374 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19375 <td>outp</td>
19376 <td>30</td>
19377 </tr>
19378 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19379 <td>134</td>
19380 <td>115</td>
19381 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
19382 <td>outp</td>
19383 <td>31</td>
19384 </tr>
19385 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19386 <td>134</td>
19387 <td>116</td>
19388 <td>J721E_DEV_MCU_ADC12_16FFC0</td>
19389 <td>gen_level</td>
19390 <td>0</td>
19391 </tr>
19392 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19393 <td>134</td>
19394 <td>117</td>
19395 <td>J721E_DEV_MCU_ADC12_16FFC1</td>
19396 <td>gen_level</td>
19397 <td>0</td>
19398 </tr>
19399 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19400 <td>134</td>
19401 <td>118</td>
19402 <td>J721E_DEV_MCU_CPSW0</td>
19403 <td>stat_pend</td>
19404 <td>0</td>
19405 </tr>
19406 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19407 <td>134</td>
19408 <td>119</td>
19409 <td>J721E_DEV_MCU_CPSW0</td>
19410 <td>mdio_pend</td>
19411 <td>0</td>
19412 </tr>
19413 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19414 <td>134</td>
19415 <td>120</td>
19416 <td>J721E_DEV_MCU_CPSW0</td>
19417 <td>evnt_pend</td>
19418 <td>0</td>
19419 </tr>
19420 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19421 <td>134</td>
19422 <td>121</td>
19423 <td>J721E_DEV_MCU_DCC0</td>
19424 <td>intr_done_level</td>
19425 <td>0</td>
19426 </tr>
19427 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19428 <td>134</td>
19429 <td>122</td>
19430 <td>J721E_DEV_MCU_DCC1</td>
19431 <td>intr_done_level</td>
19432 <td>0</td>
19433 </tr>
19434 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19435 <td>134</td>
19436 <td>123</td>
19437 <td>J721E_DEV_MCU_DCC2</td>
19438 <td>intr_done_level</td>
19439 <td>0</td>
19440 </tr>
19441 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19442 <td>134</td>
19443 <td>124</td>
19444 <td>J721E_DEV_MCU_TIMER0</td>
19445 <td>intr_pend</td>
19446 <td>0</td>
19447 </tr>
19448 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19449 <td>134</td>
19450 <td>125</td>
19451 <td>J721E_DEV_MCU_TIMER1</td>
19452 <td>intr_pend</td>
19453 <td>0</td>
19454 </tr>
19455 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19456 <td>134</td>
19457 <td>126</td>
19458 <td>J721E_DEV_MCU_TIMER2</td>
19459 <td>intr_pend</td>
19460 <td>0</td>
19461 </tr>
19462 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19463 <td>134</td>
19464 <td>127</td>
19465 <td>J721E_DEV_MCU_TIMER3</td>
19466 <td>intr_pend</td>
19467 <td>0</td>
19468 </tr>
19469 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19470 <td>134</td>
19471 <td>128</td>
19472 <td>J721E_DEV_MCU_TIMER4</td>
19473 <td>intr_pend</td>
19474 <td>0</td>
19475 </tr>
19476 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19477 <td>134</td>
19478 <td>129</td>
19479 <td>J721E_DEV_MCU_TIMER5</td>
19480 <td>intr_pend</td>
19481 <td>0</td>
19482 </tr>
19483 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19484 <td>134</td>
19485 <td>130</td>
19486 <td>J721E_DEV_MCU_TIMER6</td>
19487 <td>intr_pend</td>
19488 <td>0</td>
19489 </tr>
19490 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19491 <td>134</td>
19492 <td>131</td>
19493 <td>J721E_DEV_MCU_TIMER7</td>
19494 <td>intr_pend</td>
19495 <td>0</td>
19496 </tr>
19497 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19498 <td>134</td>
19499 <td>132</td>
19500 <td>J721E_DEV_MCU_TIMER8</td>
19501 <td>intr_pend</td>
19502 <td>0</td>
19503 </tr>
19504 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19505 <td>134</td>
19506 <td>133</td>
19507 <td>J721E_DEV_MCU_TIMER9</td>
19508 <td>intr_pend</td>
19509 <td>0</td>
19510 </tr>
19511 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19512 <td>134</td>
19513 <td>134</td>
19514 <td>J721E_DEV_MCU_I2C0</td>
19515 <td>pointrpend</td>
19516 <td>0</td>
19517 </tr>
19518 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19519 <td>134</td>
19520 <td>135</td>
19521 <td>J721E_DEV_MCU_I2C1</td>
19522 <td>pointrpend</td>
19523 <td>0</td>
19524 </tr>
19525 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19526 <td>134</td>
19527 <td>136</td>
19528 <td>J721E_DEV_MCU_MCSPI0</td>
19529 <td>intr_spi</td>
19530 <td>0</td>
19531 </tr>
19532 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19533 <td>134</td>
19534 <td>137</td>
19535 <td>J721E_DEV_MCU_MCSPI1</td>
19536 <td>intr_spi</td>
19537 <td>0</td>
19538 </tr>
19539 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19540 <td>134</td>
19541 <td>138</td>
19542 <td>J721E_DEV_MCU_MCSPI2</td>
19543 <td>intr_spi</td>
19544 <td>0</td>
19545 </tr>
19546 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19547 <td>134</td>
19548 <td>139</td>
19549 <td>J721E_DEV_MCU_UART0</td>
19550 <td>usart_irq</td>
19551 <td>0</td>
19552 </tr>
19553 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19554 <td>134</td>
19555 <td>140</td>
19556 <td>J721E_DEV_MCU_I3C0</td>
19557 <td>i3c__int</td>
19558 <td>0</td>
19559 </tr>
19560 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19561 <td>134</td>
19562 <td>141</td>
19563 <td>J721E_DEV_MCU_I3C1</td>
19564 <td>i3c__int</td>
19565 <td>0</td>
19566 </tr>
19567 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19568 <td>134</td>
19569 <td>142</td>
19570 <td>J721E_DEV_MCU_FSS0_OSPI_0</td>
19571 <td>ospi_lvl_intr</td>
19572 <td>0</td>
19573 </tr>
19574 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19575 <td>134</td>
19576 <td>143</td>
19577 <td>J721E_DEV_MCU_FSS0_OSPI_1</td>
19578 <td>ospi_lvl_intr</td>
19579 <td>0</td>
19580 </tr>
19581 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19582 <td>134</td>
19583 <td>144</td>
19584 <td>J721E_DEV_MCU_FSS0_HYPERBUS1P0_0</td>
19585 <td>hpb_intr</td>
19586 <td>0</td>
19587 </tr>
19588 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19589 <td>134</td>
19590 <td>145</td>
19591 <td>J721E_DEV_MCU_FSS0_FSAS_0</td>
19592 <td>otfa_intr_err_pend</td>
19593 <td>0</td>
19594 </tr>
19595 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19596 <td>134</td>
19597 <td>146</td>
19598 <td>J721E_DEV_MCU_FSS0_FSAS_0</td>
19599 <td>ecc_intr_err_pend</td>
19600 <td>0</td>
19601 </tr>
19602 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19603 <td>134</td>
19604 <td>147</td>
19605 <td>J721E_DEV_MCU_SA2_UL0</td>
19606 <td>sa_ul_pka</td>
19607 <td>0</td>
19608 </tr>
19609 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19610 <td>134</td>
19611 <td>148</td>
19612 <td>J721E_DEV_MCU_SA2_UL0</td>
19613 <td>sa_ul_trng</td>
19614 <td>0</td>
19615 </tr>
19616 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19617 <td>134</td>
19618 <td>149</td>
19619 <td>J721E_DEV_MCU_ESM0</td>
19620 <td>esm_int_low_lvl</td>
19621 <td>0</td>
19622 </tr>
19623 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19624 <td>134</td>
19625 <td>150</td>
19626 <td>J721E_DEV_MCU_ESM0</td>
19627 <td>esm_int_hi_lvl</td>
19628 <td>0</td>
19629 </tr>
19630 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19631 <td>134</td>
19632 <td>151</td>
19633 <td>J721E_DEV_MCU_ESM0</td>
19634 <td>esm_int_cfg_lvl</td>
19635 <td>0</td>
19636 </tr>
19637 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19638 <td>134</td>
19639 <td>152</td>
19640 <td>Not Connected</td>
19641 <td>&#160;</td>
19642 <td>&#160;</td>
19643 </tr>
19644 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19645 <td>134</td>
19646 <td>153</td>
19647 <td>Not Connected</td>
19648 <td>&#160;</td>
19649 <td>&#160;</td>
19650 </tr>
19651 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19652 <td>134</td>
19653 <td>154</td>
19654 <td>Not Connected</td>
19655 <td>&#160;</td>
19656 <td>&#160;</td>
19657 </tr>
19658 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19659 <td>134</td>
19660 <td>155</td>
19661 <td>Not Connected</td>
19662 <td>&#160;</td>
19663 <td>&#160;</td>
19664 </tr>
19665 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19666 <td>134</td>
19667 <td>156</td>
19668 <td>Not Connected</td>
19669 <td>&#160;</td>
19670 <td>&#160;</td>
19671 </tr>
19672 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19673 <td>134</td>
19674 <td>157</td>
19675 <td>Not Connected</td>
19676 <td>&#160;</td>
19677 <td>&#160;</td>
19678 </tr>
19679 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19680 <td>134</td>
19681 <td>158</td>
19682 <td>J721E_DEV_WKUP_I2C0</td>
19683 <td>pointrpend</td>
19684 <td>0</td>
19685 </tr>
19686 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19687 <td>134</td>
19688 <td>159</td>
19689 <td>J721E_DEV_WKUP_UART0</td>
19690 <td>usart_irq</td>
19691 <td>0</td>
19692 </tr>
19693 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19694 <td>134</td>
19695 <td>160</td>
19696 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19697 <td>outp</td>
19698 <td>16</td>
19699 </tr>
19700 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19701 <td>134</td>
19702 <td>161</td>
19703 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19704 <td>outp</td>
19705 <td>17</td>
19706 </tr>
19707 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19708 <td>134</td>
19709 <td>162</td>
19710 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19711 <td>outp</td>
19712 <td>18</td>
19713 </tr>
19714 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19715 <td>134</td>
19716 <td>163</td>
19717 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19718 <td>outp</td>
19719 <td>19</td>
19720 </tr>
19721 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19722 <td>134</td>
19723 <td>164</td>
19724 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19725 <td>outp</td>
19726 <td>20</td>
19727 </tr>
19728 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19729 <td>134</td>
19730 <td>165</td>
19731 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19732 <td>outp</td>
19733 <td>21</td>
19734 </tr>
19735 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19736 <td>134</td>
19737 <td>166</td>
19738 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19739 <td>outp</td>
19740 <td>22</td>
19741 </tr>
19742 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19743 <td>134</td>
19744 <td>167</td>
19745 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19746 <td>outp</td>
19747 <td>23</td>
19748 </tr>
19749 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19750 <td>134</td>
19751 <td>168</td>
19752 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19753 <td>outp</td>
19754 <td>24</td>
19755 </tr>
19756 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19757 <td>134</td>
19758 <td>169</td>
19759 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19760 <td>outp</td>
19761 <td>25</td>
19762 </tr>
19763 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19764 <td>134</td>
19765 <td>170</td>
19766 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19767 <td>outp</td>
19768 <td>26</td>
19769 </tr>
19770 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19771 <td>134</td>
19772 <td>171</td>
19773 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19774 <td>outp</td>
19775 <td>27</td>
19776 </tr>
19777 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19778 <td>134</td>
19779 <td>172</td>
19780 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19781 <td>outp</td>
19782 <td>28</td>
19783 </tr>
19784 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19785 <td>134</td>
19786 <td>173</td>
19787 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19788 <td>outp</td>
19789 <td>29</td>
19790 </tr>
19791 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19792 <td>134</td>
19793 <td>174</td>
19794 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19795 <td>outp</td>
19796 <td>30</td>
19797 </tr>
19798 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19799 <td>134</td>
19800 <td>175</td>
19801 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
19802 <td>outp</td>
19803 <td>31</td>
19804 </tr>
19805 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19806 <td>134</td>
19807 <td>176</td>
19808 <td>Not Connected</td>
19809 <td>&#160;</td>
19810 <td>&#160;</td>
19811 </tr>
19812 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19813 <td>134</td>
19814 <td>177</td>
19815 <td>Not Connected</td>
19816 <td>&#160;</td>
19817 <td>&#160;</td>
19818 </tr>
19819 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19820 <td>134</td>
19821 <td>178</td>
19822 <td>Not Connected</td>
19823 <td>&#160;</td>
19824 <td>&#160;</td>
19825 </tr>
19826 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19827 <td>134</td>
19828 <td>179</td>
19829 <td>Not Connected</td>
19830 <td>&#160;</td>
19831 <td>&#160;</td>
19832 </tr>
19833 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19834 <td>134</td>
19835 <td>180</td>
19836 <td>Not Connected</td>
19837 <td>&#160;</td>
19838 <td>&#160;</td>
19839 </tr>
19840 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19841 <td>134</td>
19842 <td>181</td>
19843 <td>Not Connected</td>
19844 <td>&#160;</td>
19845 <td>&#160;</td>
19846 </tr>
19847 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19848 <td>134</td>
19849 <td>182</td>
19850 <td>Not Connected</td>
19851 <td>&#160;</td>
19852 <td>&#160;</td>
19853 </tr>
19854 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19855 <td>134</td>
19856 <td>183</td>
19857 <td>J721E_DEV_I2C2</td>
19858 <td>pointrpend</td>
19859 <td>0</td>
19860 </tr>
19861 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19862 <td>134</td>
19863 <td>184</td>
19864 <td>J721E_DEV_I2C3</td>
19865 <td>pointrpend</td>
19866 <td>0</td>
19867 </tr>
19868 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19869 <td>134</td>
19870 <td>185</td>
19871 <td>J721E_DEV_I2C4</td>
19872 <td>pointrpend</td>
19873 <td>0</td>
19874 </tr>
19875 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19876 <td>134</td>
19877 <td>186</td>
19878 <td>J721E_DEV_I2C5</td>
19879 <td>pointrpend</td>
19880 <td>0</td>
19881 </tr>
19882 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19883 <td>134</td>
19884 <td>187</td>
19885 <td>J721E_DEV_I2C6</td>
19886 <td>pointrpend</td>
19887 <td>0</td>
19888 </tr>
19889 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19890 <td>134</td>
19891 <td>188</td>
19892 <td>J721E_DEV_UART3</td>
19893 <td>usart_irq</td>
19894 <td>0</td>
19895 </tr>
19896 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19897 <td>134</td>
19898 <td>189</td>
19899 <td>J721E_DEV_UART4</td>
19900 <td>usart_irq</td>
19901 <td>0</td>
19902 </tr>
19903 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19904 <td>134</td>
19905 <td>190</td>
19906 <td>J721E_DEV_UART5</td>
19907 <td>usart_irq</td>
19908 <td>0</td>
19909 </tr>
19910 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19911 <td>134</td>
19912 <td>191</td>
19913 <td>J721E_DEV_UART6</td>
19914 <td>usart_irq</td>
19915 <td>0</td>
19916 </tr>
19917 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19918 <td>134</td>
19919 <td>192</td>
19920 <td>J721E_DEV_UART7</td>
19921 <td>usart_irq</td>
19922 <td>0</td>
19923 </tr>
19924 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19925 <td>134</td>
19926 <td>193</td>
19927 <td>J721E_DEV_UART8</td>
19928 <td>usart_irq</td>
19929 <td>0</td>
19930 </tr>
19931 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19932 <td>134</td>
19933 <td>194</td>
19934 <td>J721E_DEV_UART9</td>
19935 <td>usart_irq</td>
19936 <td>0</td>
19937 </tr>
19938 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19939 <td>134</td>
19940 <td>195</td>
19941 <td>J721E_DEV_MCSPI2</td>
19942 <td>intr_spi</td>
19943 <td>0</td>
19944 </tr>
19945 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19946 <td>134</td>
19947 <td>196</td>
19948 <td>J721E_DEV_MCSPI3</td>
19949 <td>intr_spi</td>
19950 <td>0</td>
19951 </tr>
19952 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19953 <td>134</td>
19954 <td>197</td>
19955 <td>J721E_DEV_MCSPI4</td>
19956 <td>intr_spi</td>
19957 <td>0</td>
19958 </tr>
19959 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19960 <td>134</td>
19961 <td>198</td>
19962 <td>J721E_DEV_MCSPI5</td>
19963 <td>intr_spi</td>
19964 <td>0</td>
19965 </tr>
19966 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19967 <td>134</td>
19968 <td>199</td>
19969 <td>J721E_DEV_MCSPI6</td>
19970 <td>intr_spi</td>
19971 <td>0</td>
19972 </tr>
19973 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19974 <td>134</td>
19975 <td>200</td>
19976 <td>J721E_DEV_MCSPI7</td>
19977 <td>intr_spi</td>
19978 <td>0</td>
19979 </tr>
19980 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19981 <td>134</td>
19982 <td>201</td>
19983 <td>J721E_DEV_I3C0</td>
19984 <td>i3c__int</td>
19985 <td>0</td>
19986 </tr>
19987 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19988 <td>134</td>
19989 <td>202</td>
19990 <td>Not Connected</td>
19991 <td>&#160;</td>
19992 <td>&#160;</td>
19993 </tr>
19994 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
19995 <td>134</td>
19996 <td>203</td>
19997 <td>J721E_DEV_AASRC0</td>
19998 <td>err_level</td>
19999 <td>0</td>
20000 </tr>
20001 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20002 <td>134</td>
20003 <td>204</td>
20004 <td>J721E_DEV_AASRC0</td>
20005 <td>infifo_level</td>
20006 <td>0</td>
20007 </tr>
20008 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20009 <td>134</td>
20010 <td>205</td>
20011 <td>J721E_DEV_AASRC0</td>
20012 <td>ingroup_level</td>
20013 <td>0</td>
20014 </tr>
20015 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20016 <td>134</td>
20017 <td>206</td>
20018 <td>J721E_DEV_AASRC0</td>
20019 <td>outfifo_level</td>
20020 <td>0</td>
20021 </tr>
20022 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20023 <td>134</td>
20024 <td>207</td>
20025 <td>J721E_DEV_AASRC0</td>
20026 <td>outgroup_level</td>
20027 <td>0</td>
20028 </tr>
20029 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20030 <td>134</td>
20031 <td>208</td>
20032 <td>J721E_DEV_MCASP2</td>
20033 <td>xmit_intr_pend</td>
20034 <td>0</td>
20035 </tr>
20036 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20037 <td>134</td>
20038 <td>209</td>
20039 <td>J721E_DEV_MCASP2</td>
20040 <td>rec_intr_pend</td>
20041 <td>0</td>
20042 </tr>
20043 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20044 <td>134</td>
20045 <td>210</td>
20046 <td>J721E_DEV_MCASP3</td>
20047 <td>xmit_intr_pend</td>
20048 <td>0</td>
20049 </tr>
20050 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20051 <td>134</td>
20052 <td>211</td>
20053 <td>J721E_DEV_MCASP3</td>
20054 <td>rec_intr_pend</td>
20055 <td>0</td>
20056 </tr>
20057 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20058 <td>134</td>
20059 <td>212</td>
20060 <td>J721E_DEV_MCASP4</td>
20061 <td>xmit_intr_pend</td>
20062 <td>0</td>
20063 </tr>
20064 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20065 <td>134</td>
20066 <td>213</td>
20067 <td>J721E_DEV_MCASP4</td>
20068 <td>rec_intr_pend</td>
20069 <td>0</td>
20070 </tr>
20071 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20072 <td>134</td>
20073 <td>214</td>
20074 <td>J721E_DEV_MCASP5</td>
20075 <td>xmit_intr_pend</td>
20076 <td>0</td>
20077 </tr>
20078 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20079 <td>134</td>
20080 <td>215</td>
20081 <td>J721E_DEV_MCASP5</td>
20082 <td>rec_intr_pend</td>
20083 <td>0</td>
20084 </tr>
20085 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20086 <td>134</td>
20087 <td>216</td>
20088 <td>J721E_DEV_MCASP6</td>
20089 <td>xmit_intr_pend</td>
20090 <td>0</td>
20091 </tr>
20092 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20093 <td>134</td>
20094 <td>217</td>
20095 <td>J721E_DEV_MCASP6</td>
20096 <td>rec_intr_pend</td>
20097 <td>0</td>
20098 </tr>
20099 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20100 <td>134</td>
20101 <td>218</td>
20102 <td>J721E_DEV_MCASP7</td>
20103 <td>xmit_intr_pend</td>
20104 <td>0</td>
20105 </tr>
20106 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20107 <td>134</td>
20108 <td>219</td>
20109 <td>J721E_DEV_MCASP7</td>
20110 <td>rec_intr_pend</td>
20111 <td>0</td>
20112 </tr>
20113 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20114 <td>134</td>
20115 <td>220</td>
20116 <td>J721E_DEV_MCASP8</td>
20117 <td>xmit_intr_pend</td>
20118 <td>0</td>
20119 </tr>
20120 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20121 <td>134</td>
20122 <td>221</td>
20123 <td>J721E_DEV_MCASP8</td>
20124 <td>rec_intr_pend</td>
20125 <td>0</td>
20126 </tr>
20127 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20128 <td>134</td>
20129 <td>222</td>
20130 <td>J721E_DEV_MCASP9</td>
20131 <td>xmit_intr_pend</td>
20132 <td>0</td>
20133 </tr>
20134 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20135 <td>134</td>
20136 <td>223</td>
20137 <td>J721E_DEV_MCASP9</td>
20138 <td>rec_intr_pend</td>
20139 <td>0</td>
20140 </tr>
20141 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20142 <td>134</td>
20143 <td>224</td>
20144 <td>J721E_DEV_MCASP10</td>
20145 <td>xmit_intr_pend</td>
20146 <td>0</td>
20147 </tr>
20148 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20149 <td>134</td>
20150 <td>225</td>
20151 <td>J721E_DEV_MCASP10</td>
20152 <td>rec_intr_pend</td>
20153 <td>0</td>
20154 </tr>
20155 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20156 <td>134</td>
20157 <td>226</td>
20158 <td>J721E_DEV_MCASP11</td>
20159 <td>xmit_intr_pend</td>
20160 <td>0</td>
20161 </tr>
20162 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20163 <td>134</td>
20164 <td>227</td>
20165 <td>J721E_DEV_MCASP11</td>
20166 <td>rec_intr_pend</td>
20167 <td>0</td>
20168 </tr>
20169 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20170 <td>134</td>
20171 <td>228</td>
20172 <td>Not Connected</td>
20173 <td>&#160;</td>
20174 <td>&#160;</td>
20175 </tr>
20176 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20177 <td>134</td>
20178 <td>229</td>
20179 <td>J721E_DEV_GPMC0</td>
20180 <td>gpmc_sinterrupt</td>
20181 <td>0</td>
20182 </tr>
20183 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20184 <td>134</td>
20185 <td>230</td>
20186 <td>J721E_DEV_ELM0</td>
20187 <td>elm_porocpsinterrupt_lvl</td>
20188 <td>0</td>
20189 </tr>
20190 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20191 <td>134</td>
20192 <td>231</td>
20193 <td>J721E_DEV_USB0</td>
20194 <td>otgirq</td>
20195 <td>0</td>
20196 </tr>
20197 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20198 <td>134</td>
20199 <td>232</td>
20200 <td>J721E_DEV_USB0</td>
20201 <td>irq</td>
20202 <td>0</td>
20203 </tr>
20204 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20205 <td>134</td>
20206 <td>233</td>
20207 <td>J721E_DEV_USB0</td>
20208 <td>irq</td>
20209 <td>1</td>
20210 </tr>
20211 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20212 <td>134</td>
20213 <td>234</td>
20214 <td>J721E_DEV_USB0</td>
20215 <td>irq</td>
20216 <td>2</td>
20217 </tr>
20218 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20219 <td>134</td>
20220 <td>235</td>
20221 <td>J721E_DEV_USB0</td>
20222 <td>irq</td>
20223 <td>3</td>
20224 </tr>
20225 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20226 <td>134</td>
20227 <td>236</td>
20228 <td>J721E_DEV_USB0</td>
20229 <td>irq</td>
20230 <td>4</td>
20231 </tr>
20232 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20233 <td>134</td>
20234 <td>237</td>
20235 <td>J721E_DEV_USB0</td>
20236 <td>irq</td>
20237 <td>5</td>
20238 </tr>
20239 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20240 <td>134</td>
20241 <td>238</td>
20242 <td>J721E_DEV_USB0</td>
20243 <td>irq</td>
20244 <td>6</td>
20245 </tr>
20246 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20247 <td>134</td>
20248 <td>239</td>
20249 <td>J721E_DEV_USB0</td>
20250 <td>irq</td>
20251 <td>7</td>
20252 </tr>
20253 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20254 <td>134</td>
20255 <td>240</td>
20256 <td>J721E_DEV_TIMER0</td>
20257 <td>intr_pend</td>
20258 <td>0</td>
20259 </tr>
20260 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20261 <td>134</td>
20262 <td>241</td>
20263 <td>J721E_DEV_TIMER1</td>
20264 <td>intr_pend</td>
20265 <td>0</td>
20266 </tr>
20267 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20268 <td>134</td>
20269 <td>242</td>
20270 <td>J721E_DEV_TIMER2</td>
20271 <td>intr_pend</td>
20272 <td>0</td>
20273 </tr>
20274 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20275 <td>134</td>
20276 <td>243</td>
20277 <td>J721E_DEV_TIMER3</td>
20278 <td>intr_pend</td>
20279 <td>0</td>
20280 </tr>
20281 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20282 <td>134</td>
20283 <td>244</td>
20284 <td>J721E_DEV_TIMER4</td>
20285 <td>intr_pend</td>
20286 <td>0</td>
20287 </tr>
20288 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20289 <td>134</td>
20290 <td>245</td>
20291 <td>J721E_DEV_TIMER5</td>
20292 <td>intr_pend</td>
20293 <td>0</td>
20294 </tr>
20295 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20296 <td>134</td>
20297 <td>246</td>
20298 <td>J721E_DEV_TIMER6</td>
20299 <td>intr_pend</td>
20300 <td>0</td>
20301 </tr>
20302 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20303 <td>134</td>
20304 <td>247</td>
20305 <td>J721E_DEV_TIMER7</td>
20306 <td>intr_pend</td>
20307 <td>0</td>
20308 </tr>
20309 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20310 <td>134</td>
20311 <td>248</td>
20312 <td>J721E_DEV_TIMER8</td>
20313 <td>intr_pend</td>
20314 <td>0</td>
20315 </tr>
20316 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20317 <td>134</td>
20318 <td>249</td>
20319 <td>J721E_DEV_TIMER9</td>
20320 <td>intr_pend</td>
20321 <td>0</td>
20322 </tr>
20323 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20324 <td>134</td>
20325 <td>250</td>
20326 <td>J721E_DEV_TIMER10</td>
20327 <td>intr_pend</td>
20328 <td>0</td>
20329 </tr>
20330 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20331 <td>134</td>
20332 <td>251</td>
20333 <td>J721E_DEV_TIMER11</td>
20334 <td>intr_pend</td>
20335 <td>0</td>
20336 </tr>
20337 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20338 <td>134</td>
20339 <td>252</td>
20340 <td>J721E_DEV_PCIE1</td>
20341 <td>pcie_legacy_pulse</td>
20342 <td>0</td>
20343 </tr>
20344 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20345 <td>134</td>
20346 <td>253</td>
20347 <td>J721E_DEV_PCIE1</td>
20348 <td>pcie_downstream_pulse</td>
20349 <td>0</td>
20350 </tr>
20351 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20352 <td>134</td>
20353 <td>254</td>
20354 <td>J721E_DEV_PCIE1</td>
20355 <td>pcie_flr_pulse</td>
20356 <td>0</td>
20357 </tr>
20358 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20359 <td>134</td>
20360 <td>255</td>
20361 <td>J721E_DEV_PCIE1</td>
20362 <td>pcie_phy_level</td>
20363 <td>0</td>
20364 </tr>
20365 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20366 <td>134</td>
20367 <td>256</td>
20368 <td>J721E_DEV_PCIE1</td>
20369 <td>pcie_local_level</td>
20370 <td>0</td>
20371 </tr>
20372 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20373 <td>134</td>
20374 <td>257</td>
20375 <td>J721E_DEV_PCIE1</td>
20376 <td>pcie_error_pulse</td>
20377 <td>0</td>
20378 </tr>
20379 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20380 <td>134</td>
20381 <td>258</td>
20382 <td>J721E_DEV_PCIE1</td>
20383 <td>pcie_link_state_pulse</td>
20384 <td>0</td>
20385 </tr>
20386 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20387 <td>134</td>
20388 <td>259</td>
20389 <td>J721E_DEV_PCIE1</td>
20390 <td>pcie_pwr_state_pulse</td>
20391 <td>0</td>
20392 </tr>
20393 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20394 <td>134</td>
20395 <td>260</td>
20396 <td>J721E_DEV_PCIE1</td>
20397 <td>pcie_ptm_valid_pulse</td>
20398 <td>0</td>
20399 </tr>
20400 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20401 <td>134</td>
20402 <td>261</td>
20403 <td>J721E_DEV_PCIE1</td>
20404 <td>pcie_hot_reset_pulse</td>
20405 <td>0</td>
20406 </tr>
20407 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20408 <td>134</td>
20409 <td>262</td>
20410 <td>J721E_DEV_PCIE1</td>
20411 <td>pcie_cpts_pend</td>
20412 <td>0</td>
20413 </tr>
20414 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20415 <td>134</td>
20416 <td>263</td>
20417 <td>Not Connected</td>
20418 <td>&#160;</td>
20419 <td>&#160;</td>
20420 </tr>
20421 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20422 <td>134</td>
20423 <td>264</td>
20424 <td>J721E_DEV_DDR0</td>
20425 <td>ddrss_controller</td>
20426 <td>0</td>
20427 </tr>
20428 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20429 <td>134</td>
20430 <td>265</td>
20431 <td>J721E_DEV_DDR0</td>
20432 <td>ddrss_v2a_other_err_lvl</td>
20433 <td>0</td>
20434 </tr>
20435 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20436 <td>134</td>
20437 <td>266</td>
20438 <td>J721E_DEV_DDR0</td>
20439 <td>ddrss_hs_phy_global_error</td>
20440 <td>0</td>
20441 </tr>
20442 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20443 <td>134</td>
20444 <td>267</td>
20445 <td>J721E_DEV_DDR0</td>
20446 <td>ddrss_pll_freq_change_req</td>
20447 <td>0</td>
20448 </tr>
20449 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20450 <td>134</td>
20451 <td>268</td>
20452 <td>J721E_DEV_CSI_TX_IF0</td>
20453 <td>csi_interrupt</td>
20454 <td>0</td>
20455 </tr>
20456 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20457 <td>134</td>
20458 <td>269</td>
20459 <td>J721E_DEV_CSI_TX_IF0</td>
20460 <td>csi_level</td>
20461 <td>0</td>
20462 </tr>
20463 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20464 <td>134</td>
20465 <td>270</td>
20466 <td>Not Connected</td>
20467 <td>&#160;</td>
20468 <td>&#160;</td>
20469 </tr>
20470 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20471 <td>134</td>
20472 <td>271</td>
20473 <td>Not Connected</td>
20474 <td>&#160;</td>
20475 <td>&#160;</td>
20476 </tr>
20477 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20478 <td>134</td>
20479 <td>272</td>
20480 <td>Not Connected</td>
20481 <td>&#160;</td>
20482 <td>&#160;</td>
20483 </tr>
20484 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20485 <td>134</td>
20486 <td>273</td>
20487 <td>Not Connected</td>
20488 <td>&#160;</td>
20489 <td>&#160;</td>
20490 </tr>
20491 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20492 <td>134</td>
20493 <td>274</td>
20494 <td>Not Connected</td>
20495 <td>&#160;</td>
20496 <td>&#160;</td>
20497 </tr>
20498 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20499 <td>134</td>
20500 <td>275</td>
20501 <td>Not Connected</td>
20502 <td>&#160;</td>
20503 <td>&#160;</td>
20504 </tr>
20505 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20506 <td>134</td>
20507 <td>276</td>
20508 <td>J721E_DEV_VPFE0</td>
20509 <td>ccdc_intr_pend</td>
20510 <td>0</td>
20511 </tr>
20512 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20513 <td>134</td>
20514 <td>277</td>
20515 <td>J721E_DEV_VPFE0</td>
20516 <td>rat_exp_intr</td>
20517 <td>0</td>
20518 </tr>
20519 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20520 <td>134</td>
20521 <td>278</td>
20522 <td>Not Connected</td>
20523 <td>&#160;</td>
20524 <td>&#160;</td>
20525 </tr>
20526 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20527 <td>134</td>
20528 <td>279</td>
20529 <td>Not Connected</td>
20530 <td>&#160;</td>
20531 <td>&#160;</td>
20532 </tr>
20533 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20534 <td>134</td>
20535 <td>280</td>
20536 <td>J721E_DEV_DCC0</td>
20537 <td>intr_done_level</td>
20538 <td>0</td>
20539 </tr>
20540 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20541 <td>134</td>
20542 <td>281</td>
20543 <td>J721E_DEV_DCC1</td>
20544 <td>intr_done_level</td>
20545 <td>0</td>
20546 </tr>
20547 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20548 <td>134</td>
20549 <td>282</td>
20550 <td>J721E_DEV_DCC2</td>
20551 <td>intr_done_level</td>
20552 <td>0</td>
20553 </tr>
20554 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20555 <td>134</td>
20556 <td>283</td>
20557 <td>J721E_DEV_DCC3</td>
20558 <td>intr_done_level</td>
20559 <td>0</td>
20560 </tr>
20561 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20562 <td>134</td>
20563 <td>284</td>
20564 <td>J721E_DEV_DCC4</td>
20565 <td>intr_done_level</td>
20566 <td>0</td>
20567 </tr>
20568 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20569 <td>134</td>
20570 <td>285</td>
20571 <td>J721E_DEV_DCC5</td>
20572 <td>intr_done_level</td>
20573 <td>0</td>
20574 </tr>
20575 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20576 <td>134</td>
20577 <td>286</td>
20578 <td>J721E_DEV_DCC6</td>
20579 <td>intr_done_level</td>
20580 <td>0</td>
20581 </tr>
20582 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20583 <td>134</td>
20584 <td>287</td>
20585 <td>J721E_DEV_DCC7</td>
20586 <td>intr_done_level</td>
20587 <td>0</td>
20588 </tr>
20589 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20590 <td>134</td>
20591 <td>288</td>
20592 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20593 <td>outp</td>
20594 <td>0</td>
20595 </tr>
20596 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20597 <td>134</td>
20598 <td>289</td>
20599 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20600 <td>outp</td>
20601 <td>1</td>
20602 </tr>
20603 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20604 <td>134</td>
20605 <td>290</td>
20606 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20607 <td>outp</td>
20608 <td>2</td>
20609 </tr>
20610 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20611 <td>134</td>
20612 <td>291</td>
20613 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20614 <td>outp</td>
20615 <td>3</td>
20616 </tr>
20617 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20618 <td>134</td>
20619 <td>292</td>
20620 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20621 <td>outp</td>
20622 <td>4</td>
20623 </tr>
20624 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20625 <td>134</td>
20626 <td>293</td>
20627 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20628 <td>outp</td>
20629 <td>5</td>
20630 </tr>
20631 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20632 <td>134</td>
20633 <td>294</td>
20634 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20635 <td>outp</td>
20636 <td>6</td>
20637 </tr>
20638 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20639 <td>134</td>
20640 <td>295</td>
20641 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20642 <td>outp</td>
20643 <td>7</td>
20644 </tr>
20645 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20646 <td>134</td>
20647 <td>296</td>
20648 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20649 <td>outp</td>
20650 <td>8</td>
20651 </tr>
20652 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20653 <td>134</td>
20654 <td>297</td>
20655 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20656 <td>outp</td>
20657 <td>9</td>
20658 </tr>
20659 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20660 <td>134</td>
20661 <td>298</td>
20662 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20663 <td>outp</td>
20664 <td>10</td>
20665 </tr>
20666 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20667 <td>134</td>
20668 <td>299</td>
20669 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20670 <td>outp</td>
20671 <td>11</td>
20672 </tr>
20673 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20674 <td>134</td>
20675 <td>300</td>
20676 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20677 <td>outp</td>
20678 <td>12</td>
20679 </tr>
20680 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20681 <td>134</td>
20682 <td>301</td>
20683 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20684 <td>outp</td>
20685 <td>13</td>
20686 </tr>
20687 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20688 <td>134</td>
20689 <td>302</td>
20690 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20691 <td>outp</td>
20692 <td>14</td>
20693 </tr>
20694 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20695 <td>134</td>
20696 <td>303</td>
20697 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
20698 <td>outp</td>
20699 <td>15</td>
20700 </tr>
20701 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20702 <td>134</td>
20703 <td>304</td>
20704 <td>J721E_DEV_DCC8</td>
20705 <td>intr_done_level</td>
20706 <td>0</td>
20707 </tr>
20708 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20709 <td>134</td>
20710 <td>305</td>
20711 <td>J721E_DEV_DCC9</td>
20712 <td>intr_done_level</td>
20713 <td>0</td>
20714 </tr>
20715 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20716 <td>134</td>
20717 <td>306</td>
20718 <td>J721E_DEV_DCC10</td>
20719 <td>intr_done_level</td>
20720 <td>0</td>
20721 </tr>
20722 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20723 <td>134</td>
20724 <td>307</td>
20725 <td>J721E_DEV_DCC11</td>
20726 <td>intr_done_level</td>
20727 <td>0</td>
20728 </tr>
20729 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20730 <td>134</td>
20731 <td>308</td>
20732 <td>J721E_DEV_DCC12</td>
20733 <td>intr_done_level</td>
20734 <td>0</td>
20735 </tr>
20736 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20737 <td>134</td>
20738 <td>309</td>
20739 <td>Not Connected</td>
20740 <td>&#160;</td>
20741 <td>&#160;</td>
20742 </tr>
20743 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20744 <td>134</td>
20745 <td>310</td>
20746 <td>J721E_DEV_MMCSD1</td>
20747 <td>emmcsdss_intr</td>
20748 <td>0</td>
20749 </tr>
20750 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20751 <td>134</td>
20752 <td>311</td>
20753 <td>J721E_DEV_MMCSD2</td>
20754 <td>emmcsdss_intr</td>
20755 <td>0</td>
20756 </tr>
20757 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20758 <td>134</td>
20759 <td>312</td>
20760 <td>J721E_DEV_UFS0</td>
20761 <td>ufs_intr</td>
20762 <td>0</td>
20763 </tr>
20764 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20765 <td>134</td>
20766 <td>313</td>
20767 <td>Not Connected</td>
20768 <td>&#160;</td>
20769 <td>&#160;</td>
20770 </tr>
20771 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20772 <td>134</td>
20773 <td>314</td>
20774 <td>J721E_DEV_SA2_UL0</td>
20775 <td>sa_ul_pka</td>
20776 <td>0</td>
20777 </tr>
20778 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20779 <td>134</td>
20780 <td>315</td>
20781 <td>J721E_DEV_SA2_UL0</td>
20782 <td>sa_ul_trng</td>
20783 <td>0</td>
20784 </tr>
20785 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20786 <td>134</td>
20787 <td>316</td>
20788 <td>J721E_DEV_ECAP0</td>
20789 <td>ecap_int</td>
20790 <td>0</td>
20791 </tr>
20792 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20793 <td>134</td>
20794 <td>317</td>
20795 <td>J721E_DEV_ECAP1</td>
20796 <td>ecap_int</td>
20797 <td>0</td>
20798 </tr>
20799 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20800 <td>134</td>
20801 <td>318</td>
20802 <td>J721E_DEV_ECAP2</td>
20803 <td>ecap_int</td>
20804 <td>0</td>
20805 </tr>
20806 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20807 <td>134</td>
20808 <td>319</td>
20809 <td>Not Connected</td>
20810 <td>&#160;</td>
20811 <td>&#160;</td>
20812 </tr>
20813 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20814 <td>134</td>
20815 <td>320</td>
20816 <td>Not Connected</td>
20817 <td>&#160;</td>
20818 <td>&#160;</td>
20819 </tr>
20820 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20821 <td>134</td>
20822 <td>321</td>
20823 <td>Not Connected</td>
20824 <td>&#160;</td>
20825 <td>&#160;</td>
20826 </tr>
20827 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20828 <td>134</td>
20829 <td>322</td>
20830 <td>Not Connected</td>
20831 <td>&#160;</td>
20832 <td>&#160;</td>
20833 </tr>
20834 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20835 <td>134</td>
20836 <td>323</td>
20837 <td>J721E_DEV_USB0</td>
20838 <td>host_system_error</td>
20839 <td>0</td>
20840 </tr>
20841 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20842 <td>134</td>
20843 <td>324</td>
20844 <td>Not Connected</td>
20845 <td>&#160;</td>
20846 <td>&#160;</td>
20847 </tr>
20848 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20849 <td>134</td>
20850 <td>325</td>
20851 <td>Not Connected</td>
20852 <td>&#160;</td>
20853 <td>&#160;</td>
20854 </tr>
20855 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20856 <td>134</td>
20857 <td>326</td>
20858 <td>Not Connected</td>
20859 <td>&#160;</td>
20860 <td>&#160;</td>
20861 </tr>
20862 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20863 <td>134</td>
20864 <td>327</td>
20865 <td>Not Connected</td>
20866 <td>&#160;</td>
20867 <td>&#160;</td>
20868 </tr>
20869 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20870 <td>134</td>
20871 <td>328</td>
20872 <td>J721E_DEV_WKUP_VTM0</td>
20873 <td>therm_lvl_gt_th1_intr</td>
20874 <td>0</td>
20875 </tr>
20876 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20877 <td>134</td>
20878 <td>329</td>
20879 <td>J721E_DEV_WKUP_VTM0</td>
20880 <td>therm_lvl_gt_th2_intr</td>
20881 <td>0</td>
20882 </tr>
20883 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20884 <td>134</td>
20885 <td>330</td>
20886 <td>J721E_DEV_WKUP_VTM0</td>
20887 <td>therm_lvl_lt_th0_intr</td>
20888 <td>0</td>
20889 </tr>
20890 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20891 <td>134</td>
20892 <td>331</td>
20893 <td>Not Connected</td>
20894 <td>&#160;</td>
20895 <td>&#160;</td>
20896 </tr>
20897 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20898 <td>134</td>
20899 <td>332</td>
20900 <td>J721E_DEV_COMPUTE_CLUSTER0</td>
20901 <td>gic_output_waker_gic_pwr0_wake_request</td>
20902 <td>0</td>
20903 </tr>
20904 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20905 <td>134</td>
20906 <td>333</td>
20907 <td>J721E_DEV_COMPUTE_CLUSTER0</td>
20908 <td>gic_output_waker_gic_pwr0_wake_request</td>
20909 <td>1</td>
20910 </tr>
20911 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20912 <td>134</td>
20913 <td>334</td>
20914 <td>Not Connected</td>
20915 <td>&#160;</td>
20916 <td>&#160;</td>
20917 </tr>
20918 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20919 <td>134</td>
20920 <td>335</td>
20921 <td>Not Connected</td>
20922 <td>&#160;</td>
20923 <td>&#160;</td>
20924 </tr>
20925 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20926 <td>134</td>
20927 <td>336</td>
20928 <td>J721E_DEV_MCU_MCAN0</td>
20929 <td>mcanss_mcan_lvl_int</td>
20930 <td>0</td>
20931 </tr>
20932 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20933 <td>134</td>
20934 <td>337</td>
20935 <td>J721E_DEV_MCU_MCAN0</td>
20936 <td>mcanss_mcan_lvl_int</td>
20937 <td>1</td>
20938 </tr>
20939 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20940 <td>134</td>
20941 <td>338</td>
20942 <td>J721E_DEV_MCU_MCAN0</td>
20943 <td>mcanss_ext_ts_rollover_lvl_int</td>
20944 <td>0</td>
20945 </tr>
20946 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20947 <td>134</td>
20948 <td>339</td>
20949 <td>J721E_DEV_MCU_MCAN1</td>
20950 <td>mcanss_mcan_lvl_int</td>
20951 <td>0</td>
20952 </tr>
20953 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20954 <td>134</td>
20955 <td>340</td>
20956 <td>J721E_DEV_MCU_MCAN1</td>
20957 <td>mcanss_mcan_lvl_int</td>
20958 <td>1</td>
20959 </tr>
20960 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20961 <td>134</td>
20962 <td>341</td>
20963 <td>J721E_DEV_MCU_MCAN1</td>
20964 <td>mcanss_ext_ts_rollover_lvl_int</td>
20965 <td>0</td>
20966 </tr>
20967 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20968 <td>134</td>
20969 <td>342</td>
20970 <td>Not Connected</td>
20971 <td>&#160;</td>
20972 <td>&#160;</td>
20973 </tr>
20974 <tr class="row-odd"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
20975 <td>134</td>
20976 <td>343</td>
20977 <td>Not Connected</td>
20978 <td>&#160;</td>
20979 <td>&#160;</td>
20980 </tr>
20981 </tbody>
20982 </table>
20983 </div>
20984 <div class="section" id="r5fss0-introuter0-interrupt-router-output-destinations">
20985 <span id="pub-soc-j721e-r5fss0-introuter0-output-src-list"></span><h2>R5FSS0_INTROUTER0 Interrupt Router Output Destinations<a class="headerlink" href="#r5fss0-introuter0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
20986 <div class="admonition warning">
20987 <p class="first admonition-title">Warning</p>
20988 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
20989 host within the RM Board Configuration resource assignment array.  The RM
20990 Board Configuration is rejected if an overlap with a reserved resource is
20991 detected.</p>
20992 </div>
20993 <table border="1" class="docutils">
20994 <colgroup>
20995 <col width="22%" />
20996 <col width="12%" />
20997 <col width="14%" />
20998 <col width="18%" />
20999 <col width="19%" />
21000 <col width="16%" />
21001 </colgroup>
21002 <thead valign="bottom">
21003 <tr class="row-odd"><th class="head">IR Name</th>
21004 <th class="head">IR Device ID</th>
21005 <th class="head">IR Output Index</th>
21006 <th class="head">Destination Name</th>
21007 <th class="head">Destination Interface</th>
21008 <th class="head">Destination Index</th>
21009 </tr>
21010 </thead>
21011 <tbody valign="top">
21012 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21013 <td>134</td>
21014 <td>0</td>
21015 <td>J721E_DEV_R5FSS0_CORE0</td>
21016 <td>intr</td>
21017 <td>256</td>
21018 </tr>
21019 <tr class="row-odd"><td>&#160;</td>
21020 <td>&#160;</td>
21021 <td>&#160;</td>
21022 <td>J721E_DEV_R5FSS0_CORE1</td>
21023 <td>intr</td>
21024 <td>256</td>
21025 </tr>
21026 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21027 <td>134</td>
21028 <td>1</td>
21029 <td>J721E_DEV_R5FSS0_CORE0</td>
21030 <td>intr</td>
21031 <td>257</td>
21032 </tr>
21033 <tr class="row-odd"><td>&#160;</td>
21034 <td>&#160;</td>
21035 <td>&#160;</td>
21036 <td>J721E_DEV_R5FSS0_CORE1</td>
21037 <td>intr</td>
21038 <td>257</td>
21039 </tr>
21040 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21041 <td>134</td>
21042 <td>2</td>
21043 <td>J721E_DEV_R5FSS0_CORE0</td>
21044 <td>intr</td>
21045 <td>258</td>
21046 </tr>
21047 <tr class="row-odd"><td>&#160;</td>
21048 <td>&#160;</td>
21049 <td>&#160;</td>
21050 <td>J721E_DEV_R5FSS0_CORE1</td>
21051 <td>intr</td>
21052 <td>258</td>
21053 </tr>
21054 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21055 <td>134</td>
21056 <td>3</td>
21057 <td>J721E_DEV_R5FSS0_CORE0</td>
21058 <td>intr</td>
21059 <td>259</td>
21060 </tr>
21061 <tr class="row-odd"><td>&#160;</td>
21062 <td>&#160;</td>
21063 <td>&#160;</td>
21064 <td>J721E_DEV_R5FSS0_CORE1</td>
21065 <td>intr</td>
21066 <td>259</td>
21067 </tr>
21068 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21069 <td>134</td>
21070 <td>4</td>
21071 <td>J721E_DEV_R5FSS0_CORE0</td>
21072 <td>intr</td>
21073 <td>260</td>
21074 </tr>
21075 <tr class="row-odd"><td>&#160;</td>
21076 <td>&#160;</td>
21077 <td>&#160;</td>
21078 <td>J721E_DEV_R5FSS0_CORE1</td>
21079 <td>intr</td>
21080 <td>260</td>
21081 </tr>
21082 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21083 <td>134</td>
21084 <td>5</td>
21085 <td>J721E_DEV_R5FSS0_CORE0</td>
21086 <td>intr</td>
21087 <td>261</td>
21088 </tr>
21089 <tr class="row-odd"><td>&#160;</td>
21090 <td>&#160;</td>
21091 <td>&#160;</td>
21092 <td>J721E_DEV_R5FSS0_CORE1</td>
21093 <td>intr</td>
21094 <td>261</td>
21095 </tr>
21096 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21097 <td>134</td>
21098 <td>6</td>
21099 <td>J721E_DEV_R5FSS0_CORE0</td>
21100 <td>intr</td>
21101 <td>262</td>
21102 </tr>
21103 <tr class="row-odd"><td>&#160;</td>
21104 <td>&#160;</td>
21105 <td>&#160;</td>
21106 <td>J721E_DEV_R5FSS0_CORE1</td>
21107 <td>intr</td>
21108 <td>262</td>
21109 </tr>
21110 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21111 <td>134</td>
21112 <td>7</td>
21113 <td>J721E_DEV_R5FSS0_CORE0</td>
21114 <td>intr</td>
21115 <td>263</td>
21116 </tr>
21117 <tr class="row-odd"><td>&#160;</td>
21118 <td>&#160;</td>
21119 <td>&#160;</td>
21120 <td>J721E_DEV_R5FSS0_CORE1</td>
21121 <td>intr</td>
21122 <td>263</td>
21123 </tr>
21124 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21125 <td>134</td>
21126 <td>8</td>
21127 <td>J721E_DEV_R5FSS0_CORE0</td>
21128 <td>intr</td>
21129 <td>264</td>
21130 </tr>
21131 <tr class="row-odd"><td>&#160;</td>
21132 <td>&#160;</td>
21133 <td>&#160;</td>
21134 <td>J721E_DEV_R5FSS0_CORE1</td>
21135 <td>intr</td>
21136 <td>264</td>
21137 </tr>
21138 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21139 <td>134</td>
21140 <td>9</td>
21141 <td>J721E_DEV_R5FSS0_CORE0</td>
21142 <td>intr</td>
21143 <td>265</td>
21144 </tr>
21145 <tr class="row-odd"><td>&#160;</td>
21146 <td>&#160;</td>
21147 <td>&#160;</td>
21148 <td>J721E_DEV_R5FSS0_CORE1</td>
21149 <td>intr</td>
21150 <td>265</td>
21151 </tr>
21152 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21153 <td>134</td>
21154 <td>10</td>
21155 <td>J721E_DEV_R5FSS0_CORE0</td>
21156 <td>intr</td>
21157 <td>266</td>
21158 </tr>
21159 <tr class="row-odd"><td>&#160;</td>
21160 <td>&#160;</td>
21161 <td>&#160;</td>
21162 <td>J721E_DEV_R5FSS0_CORE1</td>
21163 <td>intr</td>
21164 <td>266</td>
21165 </tr>
21166 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21167 <td>134</td>
21168 <td>11</td>
21169 <td>J721E_DEV_R5FSS0_CORE0</td>
21170 <td>intr</td>
21171 <td>267</td>
21172 </tr>
21173 <tr class="row-odd"><td>&#160;</td>
21174 <td>&#160;</td>
21175 <td>&#160;</td>
21176 <td>J721E_DEV_R5FSS0_CORE1</td>
21177 <td>intr</td>
21178 <td>267</td>
21179 </tr>
21180 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21181 <td>134</td>
21182 <td>12</td>
21183 <td>J721E_DEV_R5FSS0_CORE0</td>
21184 <td>intr</td>
21185 <td>268</td>
21186 </tr>
21187 <tr class="row-odd"><td>&#160;</td>
21188 <td>&#160;</td>
21189 <td>&#160;</td>
21190 <td>J721E_DEV_R5FSS0_CORE1</td>
21191 <td>intr</td>
21192 <td>268</td>
21193 </tr>
21194 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21195 <td>134</td>
21196 <td>13</td>
21197 <td>J721E_DEV_R5FSS0_CORE0</td>
21198 <td>intr</td>
21199 <td>269</td>
21200 </tr>
21201 <tr class="row-odd"><td>&#160;</td>
21202 <td>&#160;</td>
21203 <td>&#160;</td>
21204 <td>J721E_DEV_R5FSS0_CORE1</td>
21205 <td>intr</td>
21206 <td>269</td>
21207 </tr>
21208 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21209 <td>134</td>
21210 <td>14</td>
21211 <td>J721E_DEV_R5FSS0_CORE0</td>
21212 <td>intr</td>
21213 <td>270</td>
21214 </tr>
21215 <tr class="row-odd"><td>&#160;</td>
21216 <td>&#160;</td>
21217 <td>&#160;</td>
21218 <td>J721E_DEV_R5FSS0_CORE1</td>
21219 <td>intr</td>
21220 <td>270</td>
21221 </tr>
21222 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21223 <td>134</td>
21224 <td>15</td>
21225 <td>J721E_DEV_R5FSS0_CORE0</td>
21226 <td>intr</td>
21227 <td>271</td>
21228 </tr>
21229 <tr class="row-odd"><td>&#160;</td>
21230 <td>&#160;</td>
21231 <td>&#160;</td>
21232 <td>J721E_DEV_R5FSS0_CORE1</td>
21233 <td>intr</td>
21234 <td>271</td>
21235 </tr>
21236 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21237 <td>134</td>
21238 <td>16</td>
21239 <td>J721E_DEV_R5FSS0_CORE0</td>
21240 <td>intr</td>
21241 <td>272</td>
21242 </tr>
21243 <tr class="row-odd"><td>&#160;</td>
21244 <td>&#160;</td>
21245 <td>&#160;</td>
21246 <td>J721E_DEV_R5FSS0_CORE1</td>
21247 <td>intr</td>
21248 <td>272</td>
21249 </tr>
21250 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21251 <td>134</td>
21252 <td>17</td>
21253 <td>J721E_DEV_R5FSS0_CORE0</td>
21254 <td>intr</td>
21255 <td>273</td>
21256 </tr>
21257 <tr class="row-odd"><td>&#160;</td>
21258 <td>&#160;</td>
21259 <td>&#160;</td>
21260 <td>J721E_DEV_R5FSS0_CORE1</td>
21261 <td>intr</td>
21262 <td>273</td>
21263 </tr>
21264 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21265 <td>134</td>
21266 <td>18</td>
21267 <td>J721E_DEV_R5FSS0_CORE0</td>
21268 <td>intr</td>
21269 <td>274</td>
21270 </tr>
21271 <tr class="row-odd"><td>&#160;</td>
21272 <td>&#160;</td>
21273 <td>&#160;</td>
21274 <td>J721E_DEV_R5FSS0_CORE1</td>
21275 <td>intr</td>
21276 <td>274</td>
21277 </tr>
21278 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21279 <td>134</td>
21280 <td>19</td>
21281 <td>J721E_DEV_R5FSS0_CORE0</td>
21282 <td>intr</td>
21283 <td>275</td>
21284 </tr>
21285 <tr class="row-odd"><td>&#160;</td>
21286 <td>&#160;</td>
21287 <td>&#160;</td>
21288 <td>J721E_DEV_R5FSS0_CORE1</td>
21289 <td>intr</td>
21290 <td>275</td>
21291 </tr>
21292 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21293 <td>134</td>
21294 <td>20</td>
21295 <td>J721E_DEV_R5FSS0_CORE0</td>
21296 <td>intr</td>
21297 <td>276</td>
21298 </tr>
21299 <tr class="row-odd"><td>&#160;</td>
21300 <td>&#160;</td>
21301 <td>&#160;</td>
21302 <td>J721E_DEV_R5FSS0_CORE1</td>
21303 <td>intr</td>
21304 <td>276</td>
21305 </tr>
21306 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21307 <td>134</td>
21308 <td>21</td>
21309 <td>J721E_DEV_R5FSS0_CORE0</td>
21310 <td>intr</td>
21311 <td>277</td>
21312 </tr>
21313 <tr class="row-odd"><td>&#160;</td>
21314 <td>&#160;</td>
21315 <td>&#160;</td>
21316 <td>J721E_DEV_R5FSS0_CORE1</td>
21317 <td>intr</td>
21318 <td>277</td>
21319 </tr>
21320 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21321 <td>134</td>
21322 <td>22</td>
21323 <td>J721E_DEV_R5FSS0_CORE0</td>
21324 <td>intr</td>
21325 <td>278</td>
21326 </tr>
21327 <tr class="row-odd"><td>&#160;</td>
21328 <td>&#160;</td>
21329 <td>&#160;</td>
21330 <td>J721E_DEV_R5FSS0_CORE1</td>
21331 <td>intr</td>
21332 <td>278</td>
21333 </tr>
21334 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21335 <td>134</td>
21336 <td>23</td>
21337 <td>J721E_DEV_R5FSS0_CORE0</td>
21338 <td>intr</td>
21339 <td>279</td>
21340 </tr>
21341 <tr class="row-odd"><td>&#160;</td>
21342 <td>&#160;</td>
21343 <td>&#160;</td>
21344 <td>J721E_DEV_R5FSS0_CORE1</td>
21345 <td>intr</td>
21346 <td>279</td>
21347 </tr>
21348 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21349 <td>134</td>
21350 <td>24</td>
21351 <td>J721E_DEV_R5FSS0_CORE0</td>
21352 <td>intr</td>
21353 <td>280</td>
21354 </tr>
21355 <tr class="row-odd"><td>&#160;</td>
21356 <td>&#160;</td>
21357 <td>&#160;</td>
21358 <td>J721E_DEV_R5FSS0_CORE1</td>
21359 <td>intr</td>
21360 <td>280</td>
21361 </tr>
21362 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21363 <td>134</td>
21364 <td>25</td>
21365 <td>J721E_DEV_R5FSS0_CORE0</td>
21366 <td>intr</td>
21367 <td>281</td>
21368 </tr>
21369 <tr class="row-odd"><td>&#160;</td>
21370 <td>&#160;</td>
21371 <td>&#160;</td>
21372 <td>J721E_DEV_R5FSS0_CORE1</td>
21373 <td>intr</td>
21374 <td>281</td>
21375 </tr>
21376 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21377 <td>134</td>
21378 <td>26</td>
21379 <td>J721E_DEV_R5FSS0_CORE0</td>
21380 <td>intr</td>
21381 <td>282</td>
21382 </tr>
21383 <tr class="row-odd"><td>&#160;</td>
21384 <td>&#160;</td>
21385 <td>&#160;</td>
21386 <td>J721E_DEV_R5FSS0_CORE1</td>
21387 <td>intr</td>
21388 <td>282</td>
21389 </tr>
21390 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21391 <td>134</td>
21392 <td>27</td>
21393 <td>J721E_DEV_R5FSS0_CORE0</td>
21394 <td>intr</td>
21395 <td>283</td>
21396 </tr>
21397 <tr class="row-odd"><td>&#160;</td>
21398 <td>&#160;</td>
21399 <td>&#160;</td>
21400 <td>J721E_DEV_R5FSS0_CORE1</td>
21401 <td>intr</td>
21402 <td>283</td>
21403 </tr>
21404 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21405 <td>134</td>
21406 <td>28</td>
21407 <td>J721E_DEV_R5FSS0_CORE0</td>
21408 <td>intr</td>
21409 <td>284</td>
21410 </tr>
21411 <tr class="row-odd"><td>&#160;</td>
21412 <td>&#160;</td>
21413 <td>&#160;</td>
21414 <td>J721E_DEV_R5FSS0_CORE1</td>
21415 <td>intr</td>
21416 <td>284</td>
21417 </tr>
21418 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21419 <td>134</td>
21420 <td>29</td>
21421 <td>J721E_DEV_R5FSS0_CORE0</td>
21422 <td>intr</td>
21423 <td>285</td>
21424 </tr>
21425 <tr class="row-odd"><td>&#160;</td>
21426 <td>&#160;</td>
21427 <td>&#160;</td>
21428 <td>J721E_DEV_R5FSS0_CORE1</td>
21429 <td>intr</td>
21430 <td>285</td>
21431 </tr>
21432 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21433 <td>134</td>
21434 <td>30</td>
21435 <td>J721E_DEV_R5FSS0_CORE0</td>
21436 <td>intr</td>
21437 <td>286</td>
21438 </tr>
21439 <tr class="row-odd"><td>&#160;</td>
21440 <td>&#160;</td>
21441 <td>&#160;</td>
21442 <td>J721E_DEV_R5FSS0_CORE1</td>
21443 <td>intr</td>
21444 <td>286</td>
21445 </tr>
21446 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21447 <td>134</td>
21448 <td>31</td>
21449 <td>J721E_DEV_R5FSS0_CORE0</td>
21450 <td>intr</td>
21451 <td>287</td>
21452 </tr>
21453 <tr class="row-odd"><td>&#160;</td>
21454 <td>&#160;</td>
21455 <td>&#160;</td>
21456 <td>J721E_DEV_R5FSS0_CORE1</td>
21457 <td>intr</td>
21458 <td>287</td>
21459 </tr>
21460 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21461 <td>134</td>
21462 <td>32</td>
21463 <td>J721E_DEV_R5FSS0_CORE0</td>
21464 <td>intr</td>
21465 <td>288</td>
21466 </tr>
21467 <tr class="row-odd"><td>&#160;</td>
21468 <td>&#160;</td>
21469 <td>&#160;</td>
21470 <td>J721E_DEV_R5FSS0_CORE1</td>
21471 <td>intr</td>
21472 <td>288</td>
21473 </tr>
21474 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21475 <td>134</td>
21476 <td>33</td>
21477 <td>J721E_DEV_R5FSS0_CORE0</td>
21478 <td>intr</td>
21479 <td>289</td>
21480 </tr>
21481 <tr class="row-odd"><td>&#160;</td>
21482 <td>&#160;</td>
21483 <td>&#160;</td>
21484 <td>J721E_DEV_R5FSS0_CORE1</td>
21485 <td>intr</td>
21486 <td>289</td>
21487 </tr>
21488 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21489 <td>134</td>
21490 <td>34</td>
21491 <td>J721E_DEV_R5FSS0_CORE0</td>
21492 <td>intr</td>
21493 <td>290</td>
21494 </tr>
21495 <tr class="row-odd"><td>&#160;</td>
21496 <td>&#160;</td>
21497 <td>&#160;</td>
21498 <td>J721E_DEV_R5FSS0_CORE1</td>
21499 <td>intr</td>
21500 <td>290</td>
21501 </tr>
21502 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21503 <td>134</td>
21504 <td>35</td>
21505 <td>J721E_DEV_R5FSS0_CORE0</td>
21506 <td>intr</td>
21507 <td>291</td>
21508 </tr>
21509 <tr class="row-odd"><td>&#160;</td>
21510 <td>&#160;</td>
21511 <td>&#160;</td>
21512 <td>J721E_DEV_R5FSS0_CORE1</td>
21513 <td>intr</td>
21514 <td>291</td>
21515 </tr>
21516 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21517 <td>134</td>
21518 <td>36</td>
21519 <td>J721E_DEV_R5FSS0_CORE0</td>
21520 <td>intr</td>
21521 <td>292</td>
21522 </tr>
21523 <tr class="row-odd"><td>&#160;</td>
21524 <td>&#160;</td>
21525 <td>&#160;</td>
21526 <td>J721E_DEV_R5FSS0_CORE1</td>
21527 <td>intr</td>
21528 <td>292</td>
21529 </tr>
21530 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21531 <td>134</td>
21532 <td>37</td>
21533 <td>J721E_DEV_R5FSS0_CORE0</td>
21534 <td>intr</td>
21535 <td>293</td>
21536 </tr>
21537 <tr class="row-odd"><td>&#160;</td>
21538 <td>&#160;</td>
21539 <td>&#160;</td>
21540 <td>J721E_DEV_R5FSS0_CORE1</td>
21541 <td>intr</td>
21542 <td>293</td>
21543 </tr>
21544 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21545 <td>134</td>
21546 <td>38</td>
21547 <td>J721E_DEV_R5FSS0_CORE0</td>
21548 <td>intr</td>
21549 <td>294</td>
21550 </tr>
21551 <tr class="row-odd"><td>&#160;</td>
21552 <td>&#160;</td>
21553 <td>&#160;</td>
21554 <td>J721E_DEV_R5FSS0_CORE1</td>
21555 <td>intr</td>
21556 <td>294</td>
21557 </tr>
21558 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21559 <td>134</td>
21560 <td>39</td>
21561 <td>J721E_DEV_R5FSS0_CORE0</td>
21562 <td>intr</td>
21563 <td>295</td>
21564 </tr>
21565 <tr class="row-odd"><td>&#160;</td>
21566 <td>&#160;</td>
21567 <td>&#160;</td>
21568 <td>J721E_DEV_R5FSS0_CORE1</td>
21569 <td>intr</td>
21570 <td>295</td>
21571 </tr>
21572 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21573 <td>134</td>
21574 <td>40</td>
21575 <td>J721E_DEV_R5FSS0_CORE0</td>
21576 <td>intr</td>
21577 <td>296</td>
21578 </tr>
21579 <tr class="row-odd"><td>&#160;</td>
21580 <td>&#160;</td>
21581 <td>&#160;</td>
21582 <td>J721E_DEV_R5FSS0_CORE1</td>
21583 <td>intr</td>
21584 <td>296</td>
21585 </tr>
21586 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21587 <td>134</td>
21588 <td>41</td>
21589 <td>J721E_DEV_R5FSS0_CORE0</td>
21590 <td>intr</td>
21591 <td>297</td>
21592 </tr>
21593 <tr class="row-odd"><td>&#160;</td>
21594 <td>&#160;</td>
21595 <td>&#160;</td>
21596 <td>J721E_DEV_R5FSS0_CORE1</td>
21597 <td>intr</td>
21598 <td>297</td>
21599 </tr>
21600 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21601 <td>134</td>
21602 <td>42</td>
21603 <td>J721E_DEV_R5FSS0_CORE0</td>
21604 <td>intr</td>
21605 <td>298</td>
21606 </tr>
21607 <tr class="row-odd"><td>&#160;</td>
21608 <td>&#160;</td>
21609 <td>&#160;</td>
21610 <td>J721E_DEV_R5FSS0_CORE1</td>
21611 <td>intr</td>
21612 <td>298</td>
21613 </tr>
21614 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21615 <td>134</td>
21616 <td>43</td>
21617 <td>J721E_DEV_R5FSS0_CORE0</td>
21618 <td>intr</td>
21619 <td>299</td>
21620 </tr>
21621 <tr class="row-odd"><td>&#160;</td>
21622 <td>&#160;</td>
21623 <td>&#160;</td>
21624 <td>J721E_DEV_R5FSS0_CORE1</td>
21625 <td>intr</td>
21626 <td>299</td>
21627 </tr>
21628 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21629 <td>134</td>
21630 <td>44</td>
21631 <td>J721E_DEV_R5FSS0_CORE0</td>
21632 <td>intr</td>
21633 <td>300</td>
21634 </tr>
21635 <tr class="row-odd"><td>&#160;</td>
21636 <td>&#160;</td>
21637 <td>&#160;</td>
21638 <td>J721E_DEV_R5FSS0_CORE1</td>
21639 <td>intr</td>
21640 <td>300</td>
21641 </tr>
21642 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21643 <td>134</td>
21644 <td>45</td>
21645 <td>J721E_DEV_R5FSS0_CORE0</td>
21646 <td>intr</td>
21647 <td>301</td>
21648 </tr>
21649 <tr class="row-odd"><td>&#160;</td>
21650 <td>&#160;</td>
21651 <td>&#160;</td>
21652 <td>J721E_DEV_R5FSS0_CORE1</td>
21653 <td>intr</td>
21654 <td>301</td>
21655 </tr>
21656 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21657 <td>134</td>
21658 <td>46</td>
21659 <td>J721E_DEV_R5FSS0_CORE0</td>
21660 <td>intr</td>
21661 <td>302</td>
21662 </tr>
21663 <tr class="row-odd"><td>&#160;</td>
21664 <td>&#160;</td>
21665 <td>&#160;</td>
21666 <td>J721E_DEV_R5FSS0_CORE1</td>
21667 <td>intr</td>
21668 <td>302</td>
21669 </tr>
21670 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21671 <td>134</td>
21672 <td>47</td>
21673 <td>J721E_DEV_R5FSS0_CORE0</td>
21674 <td>intr</td>
21675 <td>303</td>
21676 </tr>
21677 <tr class="row-odd"><td>&#160;</td>
21678 <td>&#160;</td>
21679 <td>&#160;</td>
21680 <td>J721E_DEV_R5FSS0_CORE1</td>
21681 <td>intr</td>
21682 <td>303</td>
21683 </tr>
21684 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21685 <td>134</td>
21686 <td>48</td>
21687 <td>J721E_DEV_R5FSS0_CORE0</td>
21688 <td>intr</td>
21689 <td>304</td>
21690 </tr>
21691 <tr class="row-odd"><td>&#160;</td>
21692 <td>&#160;</td>
21693 <td>&#160;</td>
21694 <td>J721E_DEV_R5FSS0_CORE1</td>
21695 <td>intr</td>
21696 <td>304</td>
21697 </tr>
21698 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21699 <td>134</td>
21700 <td>49</td>
21701 <td>J721E_DEV_R5FSS0_CORE0</td>
21702 <td>intr</td>
21703 <td>305</td>
21704 </tr>
21705 <tr class="row-odd"><td>&#160;</td>
21706 <td>&#160;</td>
21707 <td>&#160;</td>
21708 <td>J721E_DEV_R5FSS0_CORE1</td>
21709 <td>intr</td>
21710 <td>305</td>
21711 </tr>
21712 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21713 <td>134</td>
21714 <td>50</td>
21715 <td>J721E_DEV_R5FSS0_CORE0</td>
21716 <td>intr</td>
21717 <td>306</td>
21718 </tr>
21719 <tr class="row-odd"><td>&#160;</td>
21720 <td>&#160;</td>
21721 <td>&#160;</td>
21722 <td>J721E_DEV_R5FSS0_CORE1</td>
21723 <td>intr</td>
21724 <td>306</td>
21725 </tr>
21726 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21727 <td>134</td>
21728 <td>51</td>
21729 <td>J721E_DEV_R5FSS0_CORE0</td>
21730 <td>intr</td>
21731 <td>307</td>
21732 </tr>
21733 <tr class="row-odd"><td>&#160;</td>
21734 <td>&#160;</td>
21735 <td>&#160;</td>
21736 <td>J721E_DEV_R5FSS0_CORE1</td>
21737 <td>intr</td>
21738 <td>307</td>
21739 </tr>
21740 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21741 <td>134</td>
21742 <td>52</td>
21743 <td>J721E_DEV_R5FSS0_CORE0</td>
21744 <td>intr</td>
21745 <td>308</td>
21746 </tr>
21747 <tr class="row-odd"><td>&#160;</td>
21748 <td>&#160;</td>
21749 <td>&#160;</td>
21750 <td>J721E_DEV_R5FSS0_CORE1</td>
21751 <td>intr</td>
21752 <td>308</td>
21753 </tr>
21754 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21755 <td>134</td>
21756 <td>53</td>
21757 <td>J721E_DEV_R5FSS0_CORE0</td>
21758 <td>intr</td>
21759 <td>309</td>
21760 </tr>
21761 <tr class="row-odd"><td>&#160;</td>
21762 <td>&#160;</td>
21763 <td>&#160;</td>
21764 <td>J721E_DEV_R5FSS0_CORE1</td>
21765 <td>intr</td>
21766 <td>309</td>
21767 </tr>
21768 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21769 <td>134</td>
21770 <td>54</td>
21771 <td>J721E_DEV_R5FSS0_CORE0</td>
21772 <td>intr</td>
21773 <td>310</td>
21774 </tr>
21775 <tr class="row-odd"><td>&#160;</td>
21776 <td>&#160;</td>
21777 <td>&#160;</td>
21778 <td>J721E_DEV_R5FSS0_CORE1</td>
21779 <td>intr</td>
21780 <td>310</td>
21781 </tr>
21782 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21783 <td>134</td>
21784 <td>55</td>
21785 <td>J721E_DEV_R5FSS0_CORE0</td>
21786 <td>intr</td>
21787 <td>311</td>
21788 </tr>
21789 <tr class="row-odd"><td>&#160;</td>
21790 <td>&#160;</td>
21791 <td>&#160;</td>
21792 <td>J721E_DEV_R5FSS0_CORE1</td>
21793 <td>intr</td>
21794 <td>311</td>
21795 </tr>
21796 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21797 <td>134</td>
21798 <td>56</td>
21799 <td>J721E_DEV_R5FSS0_CORE0</td>
21800 <td>intr</td>
21801 <td>312</td>
21802 </tr>
21803 <tr class="row-odd"><td>&#160;</td>
21804 <td>&#160;</td>
21805 <td>&#160;</td>
21806 <td>J721E_DEV_R5FSS0_CORE1</td>
21807 <td>intr</td>
21808 <td>312</td>
21809 </tr>
21810 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21811 <td>134</td>
21812 <td>57</td>
21813 <td>J721E_DEV_R5FSS0_CORE0</td>
21814 <td>intr</td>
21815 <td>313</td>
21816 </tr>
21817 <tr class="row-odd"><td>&#160;</td>
21818 <td>&#160;</td>
21819 <td>&#160;</td>
21820 <td>J721E_DEV_R5FSS0_CORE1</td>
21821 <td>intr</td>
21822 <td>313</td>
21823 </tr>
21824 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21825 <td>134</td>
21826 <td>58</td>
21827 <td>J721E_DEV_R5FSS0_CORE0</td>
21828 <td>intr</td>
21829 <td>314</td>
21830 </tr>
21831 <tr class="row-odd"><td>&#160;</td>
21832 <td>&#160;</td>
21833 <td>&#160;</td>
21834 <td>J721E_DEV_R5FSS0_CORE1</td>
21835 <td>intr</td>
21836 <td>314</td>
21837 </tr>
21838 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21839 <td>134</td>
21840 <td>59</td>
21841 <td>J721E_DEV_R5FSS0_CORE0</td>
21842 <td>intr</td>
21843 <td>315</td>
21844 </tr>
21845 <tr class="row-odd"><td>&#160;</td>
21846 <td>&#160;</td>
21847 <td>&#160;</td>
21848 <td>J721E_DEV_R5FSS0_CORE1</td>
21849 <td>intr</td>
21850 <td>315</td>
21851 </tr>
21852 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21853 <td>134</td>
21854 <td>60</td>
21855 <td>J721E_DEV_R5FSS0_CORE0</td>
21856 <td>intr</td>
21857 <td>316</td>
21858 </tr>
21859 <tr class="row-odd"><td>&#160;</td>
21860 <td>&#160;</td>
21861 <td>&#160;</td>
21862 <td>J721E_DEV_R5FSS0_CORE1</td>
21863 <td>intr</td>
21864 <td>316</td>
21865 </tr>
21866 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21867 <td>134</td>
21868 <td>61</td>
21869 <td>J721E_DEV_R5FSS0_CORE0</td>
21870 <td>intr</td>
21871 <td>317</td>
21872 </tr>
21873 <tr class="row-odd"><td>&#160;</td>
21874 <td>&#160;</td>
21875 <td>&#160;</td>
21876 <td>J721E_DEV_R5FSS0_CORE1</td>
21877 <td>intr</td>
21878 <td>317</td>
21879 </tr>
21880 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21881 <td>134</td>
21882 <td>62</td>
21883 <td>J721E_DEV_R5FSS0_CORE0</td>
21884 <td>intr</td>
21885 <td>318</td>
21886 </tr>
21887 <tr class="row-odd"><td>&#160;</td>
21888 <td>&#160;</td>
21889 <td>&#160;</td>
21890 <td>J721E_DEV_R5FSS0_CORE1</td>
21891 <td>intr</td>
21892 <td>318</td>
21893 </tr>
21894 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21895 <td>134</td>
21896 <td>63</td>
21897 <td>J721E_DEV_R5FSS0_CORE0</td>
21898 <td>intr</td>
21899 <td>319</td>
21900 </tr>
21901 <tr class="row-odd"><td>&#160;</td>
21902 <td>&#160;</td>
21903 <td>&#160;</td>
21904 <td>J721E_DEV_R5FSS0_CORE1</td>
21905 <td>intr</td>
21906 <td>319</td>
21907 </tr>
21908 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21909 <td>134</td>
21910 <td>64</td>
21911 <td>J721E_DEV_R5FSS0_CORE0</td>
21912 <td>intr</td>
21913 <td>320</td>
21914 </tr>
21915 <tr class="row-odd"><td>&#160;</td>
21916 <td>&#160;</td>
21917 <td>&#160;</td>
21918 <td>J721E_DEV_R5FSS0_CORE1</td>
21919 <td>intr</td>
21920 <td>320</td>
21921 </tr>
21922 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21923 <td>134</td>
21924 <td>65</td>
21925 <td>J721E_DEV_R5FSS0_CORE0</td>
21926 <td>intr</td>
21927 <td>321</td>
21928 </tr>
21929 <tr class="row-odd"><td>&#160;</td>
21930 <td>&#160;</td>
21931 <td>&#160;</td>
21932 <td>J721E_DEV_R5FSS0_CORE1</td>
21933 <td>intr</td>
21934 <td>321</td>
21935 </tr>
21936 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21937 <td>134</td>
21938 <td>66</td>
21939 <td>J721E_DEV_R5FSS0_CORE0</td>
21940 <td>intr</td>
21941 <td>322</td>
21942 </tr>
21943 <tr class="row-odd"><td>&#160;</td>
21944 <td>&#160;</td>
21945 <td>&#160;</td>
21946 <td>J721E_DEV_R5FSS0_CORE1</td>
21947 <td>intr</td>
21948 <td>322</td>
21949 </tr>
21950 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21951 <td>134</td>
21952 <td>67</td>
21953 <td>J721E_DEV_R5FSS0_CORE0</td>
21954 <td>intr</td>
21955 <td>323</td>
21956 </tr>
21957 <tr class="row-odd"><td>&#160;</td>
21958 <td>&#160;</td>
21959 <td>&#160;</td>
21960 <td>J721E_DEV_R5FSS0_CORE1</td>
21961 <td>intr</td>
21962 <td>323</td>
21963 </tr>
21964 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21965 <td>134</td>
21966 <td>68</td>
21967 <td>J721E_DEV_R5FSS0_CORE0</td>
21968 <td>intr</td>
21969 <td>324</td>
21970 </tr>
21971 <tr class="row-odd"><td>&#160;</td>
21972 <td>&#160;</td>
21973 <td>&#160;</td>
21974 <td>J721E_DEV_R5FSS0_CORE1</td>
21975 <td>intr</td>
21976 <td>324</td>
21977 </tr>
21978 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21979 <td>134</td>
21980 <td>69</td>
21981 <td>J721E_DEV_R5FSS0_CORE0</td>
21982 <td>intr</td>
21983 <td>325</td>
21984 </tr>
21985 <tr class="row-odd"><td>&#160;</td>
21986 <td>&#160;</td>
21987 <td>&#160;</td>
21988 <td>J721E_DEV_R5FSS0_CORE1</td>
21989 <td>intr</td>
21990 <td>325</td>
21991 </tr>
21992 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
21993 <td>134</td>
21994 <td>70</td>
21995 <td>J721E_DEV_R5FSS0_CORE0</td>
21996 <td>intr</td>
21997 <td>326</td>
21998 </tr>
21999 <tr class="row-odd"><td>&#160;</td>
22000 <td>&#160;</td>
22001 <td>&#160;</td>
22002 <td>J721E_DEV_R5FSS0_CORE1</td>
22003 <td>intr</td>
22004 <td>326</td>
22005 </tr>
22006 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22007 <td>134</td>
22008 <td>71</td>
22009 <td>J721E_DEV_R5FSS0_CORE0</td>
22010 <td>intr</td>
22011 <td>327</td>
22012 </tr>
22013 <tr class="row-odd"><td>&#160;</td>
22014 <td>&#160;</td>
22015 <td>&#160;</td>
22016 <td>J721E_DEV_R5FSS0_CORE1</td>
22017 <td>intr</td>
22018 <td>327</td>
22019 </tr>
22020 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22021 <td>134</td>
22022 <td>72</td>
22023 <td>J721E_DEV_R5FSS0_CORE0</td>
22024 <td>intr</td>
22025 <td>328</td>
22026 </tr>
22027 <tr class="row-odd"><td>&#160;</td>
22028 <td>&#160;</td>
22029 <td>&#160;</td>
22030 <td>J721E_DEV_R5FSS0_CORE1</td>
22031 <td>intr</td>
22032 <td>328</td>
22033 </tr>
22034 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22035 <td>134</td>
22036 <td>73</td>
22037 <td>J721E_DEV_R5FSS0_CORE0</td>
22038 <td>intr</td>
22039 <td>329</td>
22040 </tr>
22041 <tr class="row-odd"><td>&#160;</td>
22042 <td>&#160;</td>
22043 <td>&#160;</td>
22044 <td>J721E_DEV_R5FSS0_CORE1</td>
22045 <td>intr</td>
22046 <td>329</td>
22047 </tr>
22048 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22049 <td>134</td>
22050 <td>74</td>
22051 <td>J721E_DEV_R5FSS0_CORE0</td>
22052 <td>intr</td>
22053 <td>330</td>
22054 </tr>
22055 <tr class="row-odd"><td>&#160;</td>
22056 <td>&#160;</td>
22057 <td>&#160;</td>
22058 <td>J721E_DEV_R5FSS0_CORE1</td>
22059 <td>intr</td>
22060 <td>330</td>
22061 </tr>
22062 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22063 <td>134</td>
22064 <td>75</td>
22065 <td>J721E_DEV_R5FSS0_CORE0</td>
22066 <td>intr</td>
22067 <td>331</td>
22068 </tr>
22069 <tr class="row-odd"><td>&#160;</td>
22070 <td>&#160;</td>
22071 <td>&#160;</td>
22072 <td>J721E_DEV_R5FSS0_CORE1</td>
22073 <td>intr</td>
22074 <td>331</td>
22075 </tr>
22076 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22077 <td>134</td>
22078 <td>76</td>
22079 <td>J721E_DEV_R5FSS0_CORE0</td>
22080 <td>intr</td>
22081 <td>332</td>
22082 </tr>
22083 <tr class="row-odd"><td>&#160;</td>
22084 <td>&#160;</td>
22085 <td>&#160;</td>
22086 <td>J721E_DEV_R5FSS0_CORE1</td>
22087 <td>intr</td>
22088 <td>332</td>
22089 </tr>
22090 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22091 <td>134</td>
22092 <td>77</td>
22093 <td>J721E_DEV_R5FSS0_CORE0</td>
22094 <td>intr</td>
22095 <td>333</td>
22096 </tr>
22097 <tr class="row-odd"><td>&#160;</td>
22098 <td>&#160;</td>
22099 <td>&#160;</td>
22100 <td>J721E_DEV_R5FSS0_CORE1</td>
22101 <td>intr</td>
22102 <td>333</td>
22103 </tr>
22104 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22105 <td>134</td>
22106 <td>78</td>
22107 <td>J721E_DEV_R5FSS0_CORE0</td>
22108 <td>intr</td>
22109 <td>334</td>
22110 </tr>
22111 <tr class="row-odd"><td>&#160;</td>
22112 <td>&#160;</td>
22113 <td>&#160;</td>
22114 <td>J721E_DEV_R5FSS0_CORE1</td>
22115 <td>intr</td>
22116 <td>334</td>
22117 </tr>
22118 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22119 <td>134</td>
22120 <td>79</td>
22121 <td>J721E_DEV_R5FSS0_CORE0</td>
22122 <td>intr</td>
22123 <td>335</td>
22124 </tr>
22125 <tr class="row-odd"><td>&#160;</td>
22126 <td>&#160;</td>
22127 <td>&#160;</td>
22128 <td>J721E_DEV_R5FSS0_CORE1</td>
22129 <td>intr</td>
22130 <td>335</td>
22131 </tr>
22132 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22133 <td>134</td>
22134 <td>80</td>
22135 <td>J721E_DEV_R5FSS0_CORE0</td>
22136 <td>intr</td>
22137 <td>336</td>
22138 </tr>
22139 <tr class="row-odd"><td>&#160;</td>
22140 <td>&#160;</td>
22141 <td>&#160;</td>
22142 <td>J721E_DEV_R5FSS0_CORE1</td>
22143 <td>intr</td>
22144 <td>336</td>
22145 </tr>
22146 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22147 <td>134</td>
22148 <td>81</td>
22149 <td>J721E_DEV_R5FSS0_CORE0</td>
22150 <td>intr</td>
22151 <td>337</td>
22152 </tr>
22153 <tr class="row-odd"><td>&#160;</td>
22154 <td>&#160;</td>
22155 <td>&#160;</td>
22156 <td>J721E_DEV_R5FSS0_CORE1</td>
22157 <td>intr</td>
22158 <td>337</td>
22159 </tr>
22160 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22161 <td>134</td>
22162 <td>82</td>
22163 <td>J721E_DEV_R5FSS0_CORE0</td>
22164 <td>intr</td>
22165 <td>338</td>
22166 </tr>
22167 <tr class="row-odd"><td>&#160;</td>
22168 <td>&#160;</td>
22169 <td>&#160;</td>
22170 <td>J721E_DEV_R5FSS0_CORE1</td>
22171 <td>intr</td>
22172 <td>338</td>
22173 </tr>
22174 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22175 <td>134</td>
22176 <td>83</td>
22177 <td>J721E_DEV_R5FSS0_CORE0</td>
22178 <td>intr</td>
22179 <td>339</td>
22180 </tr>
22181 <tr class="row-odd"><td>&#160;</td>
22182 <td>&#160;</td>
22183 <td>&#160;</td>
22184 <td>J721E_DEV_R5FSS0_CORE1</td>
22185 <td>intr</td>
22186 <td>339</td>
22187 </tr>
22188 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22189 <td>134</td>
22190 <td>84</td>
22191 <td>J721E_DEV_R5FSS0_CORE0</td>
22192 <td>intr</td>
22193 <td>340</td>
22194 </tr>
22195 <tr class="row-odd"><td>&#160;</td>
22196 <td>&#160;</td>
22197 <td>&#160;</td>
22198 <td>J721E_DEV_R5FSS0_CORE1</td>
22199 <td>intr</td>
22200 <td>340</td>
22201 </tr>
22202 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22203 <td>134</td>
22204 <td>85</td>
22205 <td>J721E_DEV_R5FSS0_CORE0</td>
22206 <td>intr</td>
22207 <td>341</td>
22208 </tr>
22209 <tr class="row-odd"><td>&#160;</td>
22210 <td>&#160;</td>
22211 <td>&#160;</td>
22212 <td>J721E_DEV_R5FSS0_CORE1</td>
22213 <td>intr</td>
22214 <td>341</td>
22215 </tr>
22216 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22217 <td>134</td>
22218 <td>86</td>
22219 <td>J721E_DEV_R5FSS0_CORE0</td>
22220 <td>intr</td>
22221 <td>342</td>
22222 </tr>
22223 <tr class="row-odd"><td>&#160;</td>
22224 <td>&#160;</td>
22225 <td>&#160;</td>
22226 <td>J721E_DEV_R5FSS0_CORE1</td>
22227 <td>intr</td>
22228 <td>342</td>
22229 </tr>
22230 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22231 <td>134</td>
22232 <td>87</td>
22233 <td>J721E_DEV_R5FSS0_CORE0</td>
22234 <td>intr</td>
22235 <td>343</td>
22236 </tr>
22237 <tr class="row-odd"><td>&#160;</td>
22238 <td>&#160;</td>
22239 <td>&#160;</td>
22240 <td>J721E_DEV_R5FSS0_CORE1</td>
22241 <td>intr</td>
22242 <td>343</td>
22243 </tr>
22244 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22245 <td>134</td>
22246 <td>88</td>
22247 <td>J721E_DEV_R5FSS0_CORE0</td>
22248 <td>intr</td>
22249 <td>344</td>
22250 </tr>
22251 <tr class="row-odd"><td>&#160;</td>
22252 <td>&#160;</td>
22253 <td>&#160;</td>
22254 <td>J721E_DEV_R5FSS0_CORE1</td>
22255 <td>intr</td>
22256 <td>344</td>
22257 </tr>
22258 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22259 <td>134</td>
22260 <td>89</td>
22261 <td>J721E_DEV_R5FSS0_CORE0</td>
22262 <td>intr</td>
22263 <td>345</td>
22264 </tr>
22265 <tr class="row-odd"><td>&#160;</td>
22266 <td>&#160;</td>
22267 <td>&#160;</td>
22268 <td>J721E_DEV_R5FSS0_CORE1</td>
22269 <td>intr</td>
22270 <td>345</td>
22271 </tr>
22272 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22273 <td>134</td>
22274 <td>90</td>
22275 <td>J721E_DEV_R5FSS0_CORE0</td>
22276 <td>intr</td>
22277 <td>346</td>
22278 </tr>
22279 <tr class="row-odd"><td>&#160;</td>
22280 <td>&#160;</td>
22281 <td>&#160;</td>
22282 <td>J721E_DEV_R5FSS0_CORE1</td>
22283 <td>intr</td>
22284 <td>346</td>
22285 </tr>
22286 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22287 <td>134</td>
22288 <td>91</td>
22289 <td>J721E_DEV_R5FSS0_CORE0</td>
22290 <td>intr</td>
22291 <td>347</td>
22292 </tr>
22293 <tr class="row-odd"><td>&#160;</td>
22294 <td>&#160;</td>
22295 <td>&#160;</td>
22296 <td>J721E_DEV_R5FSS0_CORE1</td>
22297 <td>intr</td>
22298 <td>347</td>
22299 </tr>
22300 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22301 <td>134</td>
22302 <td>92</td>
22303 <td>J721E_DEV_R5FSS0_CORE0</td>
22304 <td>intr</td>
22305 <td>348</td>
22306 </tr>
22307 <tr class="row-odd"><td>&#160;</td>
22308 <td>&#160;</td>
22309 <td>&#160;</td>
22310 <td>J721E_DEV_R5FSS0_CORE1</td>
22311 <td>intr</td>
22312 <td>348</td>
22313 </tr>
22314 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22315 <td>134</td>
22316 <td>93</td>
22317 <td>J721E_DEV_R5FSS0_CORE0</td>
22318 <td>intr</td>
22319 <td>349</td>
22320 </tr>
22321 <tr class="row-odd"><td>&#160;</td>
22322 <td>&#160;</td>
22323 <td>&#160;</td>
22324 <td>J721E_DEV_R5FSS0_CORE1</td>
22325 <td>intr</td>
22326 <td>349</td>
22327 </tr>
22328 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22329 <td>134</td>
22330 <td>94</td>
22331 <td>J721E_DEV_R5FSS0_CORE0</td>
22332 <td>intr</td>
22333 <td>350</td>
22334 </tr>
22335 <tr class="row-odd"><td>&#160;</td>
22336 <td>&#160;</td>
22337 <td>&#160;</td>
22338 <td>J721E_DEV_R5FSS0_CORE1</td>
22339 <td>intr</td>
22340 <td>350</td>
22341 </tr>
22342 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22343 <td>134</td>
22344 <td>95</td>
22345 <td>J721E_DEV_R5FSS0_CORE0</td>
22346 <td>intr</td>
22347 <td>351</td>
22348 </tr>
22349 <tr class="row-odd"><td>&#160;</td>
22350 <td>&#160;</td>
22351 <td>&#160;</td>
22352 <td>J721E_DEV_R5FSS0_CORE1</td>
22353 <td>intr</td>
22354 <td>351</td>
22355 </tr>
22356 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22357 <td>134</td>
22358 <td>96</td>
22359 <td>J721E_DEV_R5FSS0_CORE0</td>
22360 <td>intr</td>
22361 <td>352</td>
22362 </tr>
22363 <tr class="row-odd"><td>&#160;</td>
22364 <td>&#160;</td>
22365 <td>&#160;</td>
22366 <td>J721E_DEV_R5FSS0_CORE1</td>
22367 <td>intr</td>
22368 <td>352</td>
22369 </tr>
22370 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22371 <td>134</td>
22372 <td>97</td>
22373 <td>J721E_DEV_R5FSS0_CORE0</td>
22374 <td>intr</td>
22375 <td>353</td>
22376 </tr>
22377 <tr class="row-odd"><td>&#160;</td>
22378 <td>&#160;</td>
22379 <td>&#160;</td>
22380 <td>J721E_DEV_R5FSS0_CORE1</td>
22381 <td>intr</td>
22382 <td>353</td>
22383 </tr>
22384 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22385 <td>134</td>
22386 <td>98</td>
22387 <td>J721E_DEV_R5FSS0_CORE0</td>
22388 <td>intr</td>
22389 <td>354</td>
22390 </tr>
22391 <tr class="row-odd"><td>&#160;</td>
22392 <td>&#160;</td>
22393 <td>&#160;</td>
22394 <td>J721E_DEV_R5FSS0_CORE1</td>
22395 <td>intr</td>
22396 <td>354</td>
22397 </tr>
22398 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22399 <td>134</td>
22400 <td>99</td>
22401 <td>J721E_DEV_R5FSS0_CORE0</td>
22402 <td>intr</td>
22403 <td>355</td>
22404 </tr>
22405 <tr class="row-odd"><td>&#160;</td>
22406 <td>&#160;</td>
22407 <td>&#160;</td>
22408 <td>J721E_DEV_R5FSS0_CORE1</td>
22409 <td>intr</td>
22410 <td>355</td>
22411 </tr>
22412 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22413 <td>134</td>
22414 <td>100</td>
22415 <td>J721E_DEV_R5FSS0_CORE0</td>
22416 <td>intr</td>
22417 <td>356</td>
22418 </tr>
22419 <tr class="row-odd"><td>&#160;</td>
22420 <td>&#160;</td>
22421 <td>&#160;</td>
22422 <td>J721E_DEV_R5FSS0_CORE1</td>
22423 <td>intr</td>
22424 <td>356</td>
22425 </tr>
22426 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22427 <td>134</td>
22428 <td>101</td>
22429 <td>J721E_DEV_R5FSS0_CORE0</td>
22430 <td>intr</td>
22431 <td>357</td>
22432 </tr>
22433 <tr class="row-odd"><td>&#160;</td>
22434 <td>&#160;</td>
22435 <td>&#160;</td>
22436 <td>J721E_DEV_R5FSS0_CORE1</td>
22437 <td>intr</td>
22438 <td>357</td>
22439 </tr>
22440 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22441 <td>134</td>
22442 <td>102</td>
22443 <td>J721E_DEV_R5FSS0_CORE0</td>
22444 <td>intr</td>
22445 <td>358</td>
22446 </tr>
22447 <tr class="row-odd"><td>&#160;</td>
22448 <td>&#160;</td>
22449 <td>&#160;</td>
22450 <td>J721E_DEV_R5FSS0_CORE1</td>
22451 <td>intr</td>
22452 <td>358</td>
22453 </tr>
22454 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22455 <td>134</td>
22456 <td>103</td>
22457 <td>J721E_DEV_R5FSS0_CORE0</td>
22458 <td>intr</td>
22459 <td>359</td>
22460 </tr>
22461 <tr class="row-odd"><td>&#160;</td>
22462 <td>&#160;</td>
22463 <td>&#160;</td>
22464 <td>J721E_DEV_R5FSS0_CORE1</td>
22465 <td>intr</td>
22466 <td>359</td>
22467 </tr>
22468 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22469 <td>134</td>
22470 <td>104</td>
22471 <td>J721E_DEV_R5FSS0_CORE0</td>
22472 <td>intr</td>
22473 <td>360</td>
22474 </tr>
22475 <tr class="row-odd"><td>&#160;</td>
22476 <td>&#160;</td>
22477 <td>&#160;</td>
22478 <td>J721E_DEV_R5FSS0_CORE1</td>
22479 <td>intr</td>
22480 <td>360</td>
22481 </tr>
22482 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22483 <td>134</td>
22484 <td>105</td>
22485 <td>J721E_DEV_R5FSS0_CORE0</td>
22486 <td>intr</td>
22487 <td>361</td>
22488 </tr>
22489 <tr class="row-odd"><td>&#160;</td>
22490 <td>&#160;</td>
22491 <td>&#160;</td>
22492 <td>J721E_DEV_R5FSS0_CORE1</td>
22493 <td>intr</td>
22494 <td>361</td>
22495 </tr>
22496 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22497 <td>134</td>
22498 <td>106</td>
22499 <td>J721E_DEV_R5FSS0_CORE0</td>
22500 <td>intr</td>
22501 <td>362</td>
22502 </tr>
22503 <tr class="row-odd"><td>&#160;</td>
22504 <td>&#160;</td>
22505 <td>&#160;</td>
22506 <td>J721E_DEV_R5FSS0_CORE1</td>
22507 <td>intr</td>
22508 <td>362</td>
22509 </tr>
22510 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22511 <td>134</td>
22512 <td>107</td>
22513 <td>J721E_DEV_R5FSS0_CORE0</td>
22514 <td>intr</td>
22515 <td>363</td>
22516 </tr>
22517 <tr class="row-odd"><td>&#160;</td>
22518 <td>&#160;</td>
22519 <td>&#160;</td>
22520 <td>J721E_DEV_R5FSS0_CORE1</td>
22521 <td>intr</td>
22522 <td>363</td>
22523 </tr>
22524 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22525 <td>134</td>
22526 <td>108</td>
22527 <td>J721E_DEV_R5FSS0_CORE0</td>
22528 <td>intr</td>
22529 <td>364</td>
22530 </tr>
22531 <tr class="row-odd"><td>&#160;</td>
22532 <td>&#160;</td>
22533 <td>&#160;</td>
22534 <td>J721E_DEV_R5FSS0_CORE1</td>
22535 <td>intr</td>
22536 <td>364</td>
22537 </tr>
22538 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22539 <td>134</td>
22540 <td>109</td>
22541 <td>J721E_DEV_R5FSS0_CORE0</td>
22542 <td>intr</td>
22543 <td>365</td>
22544 </tr>
22545 <tr class="row-odd"><td>&#160;</td>
22546 <td>&#160;</td>
22547 <td>&#160;</td>
22548 <td>J721E_DEV_R5FSS0_CORE1</td>
22549 <td>intr</td>
22550 <td>365</td>
22551 </tr>
22552 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22553 <td>134</td>
22554 <td>110</td>
22555 <td>J721E_DEV_R5FSS0_CORE0</td>
22556 <td>intr</td>
22557 <td>366</td>
22558 </tr>
22559 <tr class="row-odd"><td>&#160;</td>
22560 <td>&#160;</td>
22561 <td>&#160;</td>
22562 <td>J721E_DEV_R5FSS0_CORE1</td>
22563 <td>intr</td>
22564 <td>366</td>
22565 </tr>
22566 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22567 <td>134</td>
22568 <td>111</td>
22569 <td>J721E_DEV_R5FSS0_CORE0</td>
22570 <td>intr</td>
22571 <td>367</td>
22572 </tr>
22573 <tr class="row-odd"><td>&#160;</td>
22574 <td>&#160;</td>
22575 <td>&#160;</td>
22576 <td>J721E_DEV_R5FSS0_CORE1</td>
22577 <td>intr</td>
22578 <td>367</td>
22579 </tr>
22580 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22581 <td>134</td>
22582 <td>112</td>
22583 <td>J721E_DEV_R5FSS0_CORE0</td>
22584 <td>intr</td>
22585 <td>368</td>
22586 </tr>
22587 <tr class="row-odd"><td>&#160;</td>
22588 <td>&#160;</td>
22589 <td>&#160;</td>
22590 <td>J721E_DEV_R5FSS0_CORE1</td>
22591 <td>intr</td>
22592 <td>368</td>
22593 </tr>
22594 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22595 <td>134</td>
22596 <td>113</td>
22597 <td>J721E_DEV_R5FSS0_CORE0</td>
22598 <td>intr</td>
22599 <td>369</td>
22600 </tr>
22601 <tr class="row-odd"><td>&#160;</td>
22602 <td>&#160;</td>
22603 <td>&#160;</td>
22604 <td>J721E_DEV_R5FSS0_CORE1</td>
22605 <td>intr</td>
22606 <td>369</td>
22607 </tr>
22608 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22609 <td>134</td>
22610 <td>114</td>
22611 <td>J721E_DEV_R5FSS0_CORE0</td>
22612 <td>intr</td>
22613 <td>370</td>
22614 </tr>
22615 <tr class="row-odd"><td>&#160;</td>
22616 <td>&#160;</td>
22617 <td>&#160;</td>
22618 <td>J721E_DEV_R5FSS0_CORE1</td>
22619 <td>intr</td>
22620 <td>370</td>
22621 </tr>
22622 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22623 <td>134</td>
22624 <td>115</td>
22625 <td>J721E_DEV_R5FSS0_CORE0</td>
22626 <td>intr</td>
22627 <td>371</td>
22628 </tr>
22629 <tr class="row-odd"><td>&#160;</td>
22630 <td>&#160;</td>
22631 <td>&#160;</td>
22632 <td>J721E_DEV_R5FSS0_CORE1</td>
22633 <td>intr</td>
22634 <td>371</td>
22635 </tr>
22636 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22637 <td>134</td>
22638 <td>116</td>
22639 <td>J721E_DEV_R5FSS0_CORE0</td>
22640 <td>intr</td>
22641 <td>372</td>
22642 </tr>
22643 <tr class="row-odd"><td>&#160;</td>
22644 <td>&#160;</td>
22645 <td>&#160;</td>
22646 <td>J721E_DEV_R5FSS0_CORE1</td>
22647 <td>intr</td>
22648 <td>372</td>
22649 </tr>
22650 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22651 <td>134</td>
22652 <td>117</td>
22653 <td>J721E_DEV_R5FSS0_CORE0</td>
22654 <td>intr</td>
22655 <td>373</td>
22656 </tr>
22657 <tr class="row-odd"><td>&#160;</td>
22658 <td>&#160;</td>
22659 <td>&#160;</td>
22660 <td>J721E_DEV_R5FSS0_CORE1</td>
22661 <td>intr</td>
22662 <td>373</td>
22663 </tr>
22664 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22665 <td>134</td>
22666 <td>118</td>
22667 <td>J721E_DEV_R5FSS0_CORE0</td>
22668 <td>intr</td>
22669 <td>374</td>
22670 </tr>
22671 <tr class="row-odd"><td>&#160;</td>
22672 <td>&#160;</td>
22673 <td>&#160;</td>
22674 <td>J721E_DEV_R5FSS0_CORE1</td>
22675 <td>intr</td>
22676 <td>374</td>
22677 </tr>
22678 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22679 <td>134</td>
22680 <td>119</td>
22681 <td>J721E_DEV_R5FSS0_CORE0</td>
22682 <td>intr</td>
22683 <td>375</td>
22684 </tr>
22685 <tr class="row-odd"><td>&#160;</td>
22686 <td>&#160;</td>
22687 <td>&#160;</td>
22688 <td>J721E_DEV_R5FSS0_CORE1</td>
22689 <td>intr</td>
22690 <td>375</td>
22691 </tr>
22692 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22693 <td>134</td>
22694 <td>120</td>
22695 <td>J721E_DEV_R5FSS0_CORE0</td>
22696 <td>intr</td>
22697 <td>376</td>
22698 </tr>
22699 <tr class="row-odd"><td>&#160;</td>
22700 <td>&#160;</td>
22701 <td>&#160;</td>
22702 <td>J721E_DEV_R5FSS0_CORE1</td>
22703 <td>intr</td>
22704 <td>376</td>
22705 </tr>
22706 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22707 <td>134</td>
22708 <td>121</td>
22709 <td>J721E_DEV_R5FSS0_CORE0</td>
22710 <td>intr</td>
22711 <td>377</td>
22712 </tr>
22713 <tr class="row-odd"><td>&#160;</td>
22714 <td>&#160;</td>
22715 <td>&#160;</td>
22716 <td>J721E_DEV_R5FSS0_CORE1</td>
22717 <td>intr</td>
22718 <td>377</td>
22719 </tr>
22720 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22721 <td>134</td>
22722 <td>122</td>
22723 <td>J721E_DEV_R5FSS0_CORE0</td>
22724 <td>intr</td>
22725 <td>378</td>
22726 </tr>
22727 <tr class="row-odd"><td>&#160;</td>
22728 <td>&#160;</td>
22729 <td>&#160;</td>
22730 <td>J721E_DEV_R5FSS0_CORE1</td>
22731 <td>intr</td>
22732 <td>378</td>
22733 </tr>
22734 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22735 <td>134</td>
22736 <td>123</td>
22737 <td>J721E_DEV_R5FSS0_CORE0</td>
22738 <td>intr</td>
22739 <td>379</td>
22740 </tr>
22741 <tr class="row-odd"><td>&#160;</td>
22742 <td>&#160;</td>
22743 <td>&#160;</td>
22744 <td>J721E_DEV_R5FSS0_CORE1</td>
22745 <td>intr</td>
22746 <td>379</td>
22747 </tr>
22748 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22749 <td>134</td>
22750 <td>124</td>
22751 <td>J721E_DEV_R5FSS0_CORE0</td>
22752 <td>intr</td>
22753 <td>380</td>
22754 </tr>
22755 <tr class="row-odd"><td>&#160;</td>
22756 <td>&#160;</td>
22757 <td>&#160;</td>
22758 <td>J721E_DEV_R5FSS0_CORE1</td>
22759 <td>intr</td>
22760 <td>380</td>
22761 </tr>
22762 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22763 <td>134</td>
22764 <td>125</td>
22765 <td>J721E_DEV_R5FSS0_CORE0</td>
22766 <td>intr</td>
22767 <td>381</td>
22768 </tr>
22769 <tr class="row-odd"><td>&#160;</td>
22770 <td>&#160;</td>
22771 <td>&#160;</td>
22772 <td>J721E_DEV_R5FSS0_CORE1</td>
22773 <td>intr</td>
22774 <td>381</td>
22775 </tr>
22776 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22777 <td>134</td>
22778 <td>126</td>
22779 <td>J721E_DEV_R5FSS0_CORE0</td>
22780 <td>intr</td>
22781 <td>382</td>
22782 </tr>
22783 <tr class="row-odd"><td>&#160;</td>
22784 <td>&#160;</td>
22785 <td>&#160;</td>
22786 <td>J721E_DEV_R5FSS0_CORE1</td>
22787 <td>intr</td>
22788 <td>382</td>
22789 </tr>
22790 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22791 <td>134</td>
22792 <td>127</td>
22793 <td>J721E_DEV_R5FSS0_CORE0</td>
22794 <td>intr</td>
22795 <td>383</td>
22796 </tr>
22797 <tr class="row-odd"><td>&#160;</td>
22798 <td>&#160;</td>
22799 <td>&#160;</td>
22800 <td>J721E_DEV_R5FSS0_CORE1</td>
22801 <td>intr</td>
22802 <td>383</td>
22803 </tr>
22804 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22805 <td>134</td>
22806 <td>128</td>
22807 <td>J721E_DEV_R5FSS0_CORE0</td>
22808 <td>intr</td>
22809 <td>384</td>
22810 </tr>
22811 <tr class="row-odd"><td>&#160;</td>
22812 <td>&#160;</td>
22813 <td>&#160;</td>
22814 <td>J721E_DEV_R5FSS0_CORE1</td>
22815 <td>intr</td>
22816 <td>384</td>
22817 </tr>
22818 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22819 <td>134</td>
22820 <td>129</td>
22821 <td>J721E_DEV_R5FSS0_CORE0</td>
22822 <td>intr</td>
22823 <td>385</td>
22824 </tr>
22825 <tr class="row-odd"><td>&#160;</td>
22826 <td>&#160;</td>
22827 <td>&#160;</td>
22828 <td>J721E_DEV_R5FSS0_CORE1</td>
22829 <td>intr</td>
22830 <td>385</td>
22831 </tr>
22832 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22833 <td>134</td>
22834 <td>130</td>
22835 <td>J721E_DEV_R5FSS0_CORE0</td>
22836 <td>intr</td>
22837 <td>386</td>
22838 </tr>
22839 <tr class="row-odd"><td>&#160;</td>
22840 <td>&#160;</td>
22841 <td>&#160;</td>
22842 <td>J721E_DEV_R5FSS0_CORE1</td>
22843 <td>intr</td>
22844 <td>386</td>
22845 </tr>
22846 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22847 <td>134</td>
22848 <td>131</td>
22849 <td>J721E_DEV_R5FSS0_CORE0</td>
22850 <td>intr</td>
22851 <td>387</td>
22852 </tr>
22853 <tr class="row-odd"><td>&#160;</td>
22854 <td>&#160;</td>
22855 <td>&#160;</td>
22856 <td>J721E_DEV_R5FSS0_CORE1</td>
22857 <td>intr</td>
22858 <td>387</td>
22859 </tr>
22860 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22861 <td>134</td>
22862 <td>132</td>
22863 <td>J721E_DEV_R5FSS0_CORE0</td>
22864 <td>intr</td>
22865 <td>388</td>
22866 </tr>
22867 <tr class="row-odd"><td>&#160;</td>
22868 <td>&#160;</td>
22869 <td>&#160;</td>
22870 <td>J721E_DEV_R5FSS0_CORE1</td>
22871 <td>intr</td>
22872 <td>388</td>
22873 </tr>
22874 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22875 <td>134</td>
22876 <td>133</td>
22877 <td>J721E_DEV_R5FSS0_CORE0</td>
22878 <td>intr</td>
22879 <td>389</td>
22880 </tr>
22881 <tr class="row-odd"><td>&#160;</td>
22882 <td>&#160;</td>
22883 <td>&#160;</td>
22884 <td>J721E_DEV_R5FSS0_CORE1</td>
22885 <td>intr</td>
22886 <td>389</td>
22887 </tr>
22888 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22889 <td>134</td>
22890 <td>134</td>
22891 <td>J721E_DEV_R5FSS0_CORE0</td>
22892 <td>intr</td>
22893 <td>390</td>
22894 </tr>
22895 <tr class="row-odd"><td>&#160;</td>
22896 <td>&#160;</td>
22897 <td>&#160;</td>
22898 <td>J721E_DEV_R5FSS0_CORE1</td>
22899 <td>intr</td>
22900 <td>390</td>
22901 </tr>
22902 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22903 <td>134</td>
22904 <td>135</td>
22905 <td>J721E_DEV_R5FSS0_CORE0</td>
22906 <td>intr</td>
22907 <td>391</td>
22908 </tr>
22909 <tr class="row-odd"><td>&#160;</td>
22910 <td>&#160;</td>
22911 <td>&#160;</td>
22912 <td>J721E_DEV_R5FSS0_CORE1</td>
22913 <td>intr</td>
22914 <td>391</td>
22915 </tr>
22916 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22917 <td>134</td>
22918 <td>136</td>
22919 <td>J721E_DEV_R5FSS0_CORE0</td>
22920 <td>intr</td>
22921 <td>392</td>
22922 </tr>
22923 <tr class="row-odd"><td>&#160;</td>
22924 <td>&#160;</td>
22925 <td>&#160;</td>
22926 <td>J721E_DEV_R5FSS0_CORE1</td>
22927 <td>intr</td>
22928 <td>392</td>
22929 </tr>
22930 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22931 <td>134</td>
22932 <td>137</td>
22933 <td>J721E_DEV_R5FSS0_CORE0</td>
22934 <td>intr</td>
22935 <td>393</td>
22936 </tr>
22937 <tr class="row-odd"><td>&#160;</td>
22938 <td>&#160;</td>
22939 <td>&#160;</td>
22940 <td>J721E_DEV_R5FSS0_CORE1</td>
22941 <td>intr</td>
22942 <td>393</td>
22943 </tr>
22944 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22945 <td>134</td>
22946 <td>138</td>
22947 <td>J721E_DEV_R5FSS0_CORE0</td>
22948 <td>intr</td>
22949 <td>394</td>
22950 </tr>
22951 <tr class="row-odd"><td>&#160;</td>
22952 <td>&#160;</td>
22953 <td>&#160;</td>
22954 <td>J721E_DEV_R5FSS0_CORE1</td>
22955 <td>intr</td>
22956 <td>394</td>
22957 </tr>
22958 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22959 <td>134</td>
22960 <td>139</td>
22961 <td>J721E_DEV_R5FSS0_CORE0</td>
22962 <td>intr</td>
22963 <td>395</td>
22964 </tr>
22965 <tr class="row-odd"><td>&#160;</td>
22966 <td>&#160;</td>
22967 <td>&#160;</td>
22968 <td>J721E_DEV_R5FSS0_CORE1</td>
22969 <td>intr</td>
22970 <td>395</td>
22971 </tr>
22972 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22973 <td>134</td>
22974 <td>140</td>
22975 <td>J721E_DEV_R5FSS0_CORE0</td>
22976 <td>intr</td>
22977 <td>396</td>
22978 </tr>
22979 <tr class="row-odd"><td>&#160;</td>
22980 <td>&#160;</td>
22981 <td>&#160;</td>
22982 <td>J721E_DEV_R5FSS0_CORE1</td>
22983 <td>intr</td>
22984 <td>396</td>
22985 </tr>
22986 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
22987 <td>134</td>
22988 <td>141</td>
22989 <td>J721E_DEV_R5FSS0_CORE0</td>
22990 <td>intr</td>
22991 <td>397</td>
22992 </tr>
22993 <tr class="row-odd"><td>&#160;</td>
22994 <td>&#160;</td>
22995 <td>&#160;</td>
22996 <td>J721E_DEV_R5FSS0_CORE1</td>
22997 <td>intr</td>
22998 <td>397</td>
22999 </tr>
23000 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23001 <td>134</td>
23002 <td>142</td>
23003 <td>J721E_DEV_R5FSS0_CORE0</td>
23004 <td>intr</td>
23005 <td>398</td>
23006 </tr>
23007 <tr class="row-odd"><td>&#160;</td>
23008 <td>&#160;</td>
23009 <td>&#160;</td>
23010 <td>J721E_DEV_R5FSS0_CORE1</td>
23011 <td>intr</td>
23012 <td>398</td>
23013 </tr>
23014 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23015 <td>134</td>
23016 <td>143</td>
23017 <td>J721E_DEV_R5FSS0_CORE0</td>
23018 <td>intr</td>
23019 <td>399</td>
23020 </tr>
23021 <tr class="row-odd"><td>&#160;</td>
23022 <td>&#160;</td>
23023 <td>&#160;</td>
23024 <td>J721E_DEV_R5FSS0_CORE1</td>
23025 <td>intr</td>
23026 <td>399</td>
23027 </tr>
23028 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23029 <td>134</td>
23030 <td>144</td>
23031 <td>J721E_DEV_R5FSS0_CORE0</td>
23032 <td>intr</td>
23033 <td>400</td>
23034 </tr>
23035 <tr class="row-odd"><td>&#160;</td>
23036 <td>&#160;</td>
23037 <td>&#160;</td>
23038 <td>J721E_DEV_R5FSS0_CORE1</td>
23039 <td>intr</td>
23040 <td>400</td>
23041 </tr>
23042 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23043 <td>134</td>
23044 <td>145</td>
23045 <td>J721E_DEV_R5FSS0_CORE0</td>
23046 <td>intr</td>
23047 <td>401</td>
23048 </tr>
23049 <tr class="row-odd"><td>&#160;</td>
23050 <td>&#160;</td>
23051 <td>&#160;</td>
23052 <td>J721E_DEV_R5FSS0_CORE1</td>
23053 <td>intr</td>
23054 <td>401</td>
23055 </tr>
23056 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23057 <td>134</td>
23058 <td>146</td>
23059 <td>J721E_DEV_R5FSS0_CORE0</td>
23060 <td>intr</td>
23061 <td>402</td>
23062 </tr>
23063 <tr class="row-odd"><td>&#160;</td>
23064 <td>&#160;</td>
23065 <td>&#160;</td>
23066 <td>J721E_DEV_R5FSS0_CORE1</td>
23067 <td>intr</td>
23068 <td>402</td>
23069 </tr>
23070 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23071 <td>134</td>
23072 <td>147</td>
23073 <td>J721E_DEV_R5FSS0_CORE0</td>
23074 <td>intr</td>
23075 <td>403</td>
23076 </tr>
23077 <tr class="row-odd"><td>&#160;</td>
23078 <td>&#160;</td>
23079 <td>&#160;</td>
23080 <td>J721E_DEV_R5FSS0_CORE1</td>
23081 <td>intr</td>
23082 <td>403</td>
23083 </tr>
23084 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23085 <td>134</td>
23086 <td>148</td>
23087 <td>J721E_DEV_R5FSS0_CORE0</td>
23088 <td>intr</td>
23089 <td>404</td>
23090 </tr>
23091 <tr class="row-odd"><td>&#160;</td>
23092 <td>&#160;</td>
23093 <td>&#160;</td>
23094 <td>J721E_DEV_R5FSS0_CORE1</td>
23095 <td>intr</td>
23096 <td>404</td>
23097 </tr>
23098 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23099 <td>134</td>
23100 <td>149</td>
23101 <td>J721E_DEV_R5FSS0_CORE0</td>
23102 <td>intr</td>
23103 <td>405</td>
23104 </tr>
23105 <tr class="row-odd"><td>&#160;</td>
23106 <td>&#160;</td>
23107 <td>&#160;</td>
23108 <td>J721E_DEV_R5FSS0_CORE1</td>
23109 <td>intr</td>
23110 <td>405</td>
23111 </tr>
23112 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23113 <td>134</td>
23114 <td>150</td>
23115 <td>J721E_DEV_R5FSS0_CORE0</td>
23116 <td>intr</td>
23117 <td>406</td>
23118 </tr>
23119 <tr class="row-odd"><td>&#160;</td>
23120 <td>&#160;</td>
23121 <td>&#160;</td>
23122 <td>J721E_DEV_R5FSS0_CORE1</td>
23123 <td>intr</td>
23124 <td>406</td>
23125 </tr>
23126 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23127 <td>134</td>
23128 <td>151</td>
23129 <td>J721E_DEV_R5FSS0_CORE0</td>
23130 <td>intr</td>
23131 <td>407</td>
23132 </tr>
23133 <tr class="row-odd"><td>&#160;</td>
23134 <td>&#160;</td>
23135 <td>&#160;</td>
23136 <td>J721E_DEV_R5FSS0_CORE1</td>
23137 <td>intr</td>
23138 <td>407</td>
23139 </tr>
23140 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23141 <td>134</td>
23142 <td>152</td>
23143 <td>J721E_DEV_R5FSS0_CORE0</td>
23144 <td>intr</td>
23145 <td>408</td>
23146 </tr>
23147 <tr class="row-odd"><td>&#160;</td>
23148 <td>&#160;</td>
23149 <td>&#160;</td>
23150 <td>J721E_DEV_R5FSS0_CORE1</td>
23151 <td>intr</td>
23152 <td>408</td>
23153 </tr>
23154 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23155 <td>134</td>
23156 <td>153</td>
23157 <td>J721E_DEV_R5FSS0_CORE0</td>
23158 <td>intr</td>
23159 <td>409</td>
23160 </tr>
23161 <tr class="row-odd"><td>&#160;</td>
23162 <td>&#160;</td>
23163 <td>&#160;</td>
23164 <td>J721E_DEV_R5FSS0_CORE1</td>
23165 <td>intr</td>
23166 <td>409</td>
23167 </tr>
23168 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23169 <td>134</td>
23170 <td>154</td>
23171 <td>J721E_DEV_R5FSS0_CORE0</td>
23172 <td>intr</td>
23173 <td>410</td>
23174 </tr>
23175 <tr class="row-odd"><td>&#160;</td>
23176 <td>&#160;</td>
23177 <td>&#160;</td>
23178 <td>J721E_DEV_R5FSS0_CORE1</td>
23179 <td>intr</td>
23180 <td>410</td>
23181 </tr>
23182 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23183 <td>134</td>
23184 <td>155</td>
23185 <td>J721E_DEV_R5FSS0_CORE0</td>
23186 <td>intr</td>
23187 <td>411</td>
23188 </tr>
23189 <tr class="row-odd"><td>&#160;</td>
23190 <td>&#160;</td>
23191 <td>&#160;</td>
23192 <td>J721E_DEV_R5FSS0_CORE1</td>
23193 <td>intr</td>
23194 <td>411</td>
23195 </tr>
23196 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23197 <td>134</td>
23198 <td>156</td>
23199 <td>J721E_DEV_R5FSS0_CORE0</td>
23200 <td>intr</td>
23201 <td>412</td>
23202 </tr>
23203 <tr class="row-odd"><td>&#160;</td>
23204 <td>&#160;</td>
23205 <td>&#160;</td>
23206 <td>J721E_DEV_R5FSS0_CORE1</td>
23207 <td>intr</td>
23208 <td>412</td>
23209 </tr>
23210 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23211 <td>134</td>
23212 <td>157</td>
23213 <td>J721E_DEV_R5FSS0_CORE0</td>
23214 <td>intr</td>
23215 <td>413</td>
23216 </tr>
23217 <tr class="row-odd"><td>&#160;</td>
23218 <td>&#160;</td>
23219 <td>&#160;</td>
23220 <td>J721E_DEV_R5FSS0_CORE1</td>
23221 <td>intr</td>
23222 <td>413</td>
23223 </tr>
23224 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23225 <td>134</td>
23226 <td>158</td>
23227 <td>J721E_DEV_R5FSS0_CORE0</td>
23228 <td>intr</td>
23229 <td>414</td>
23230 </tr>
23231 <tr class="row-odd"><td>&#160;</td>
23232 <td>&#160;</td>
23233 <td>&#160;</td>
23234 <td>J721E_DEV_R5FSS0_CORE1</td>
23235 <td>intr</td>
23236 <td>414</td>
23237 </tr>
23238 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23239 <td>134</td>
23240 <td>159</td>
23241 <td>J721E_DEV_R5FSS0_CORE0</td>
23242 <td>intr</td>
23243 <td>415</td>
23244 </tr>
23245 <tr class="row-odd"><td>&#160;</td>
23246 <td>&#160;</td>
23247 <td>&#160;</td>
23248 <td>J721E_DEV_R5FSS0_CORE1</td>
23249 <td>intr</td>
23250 <td>415</td>
23251 </tr>
23252 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23253 <td>134</td>
23254 <td>160</td>
23255 <td>J721E_DEV_R5FSS0_CORE0</td>
23256 <td>intr</td>
23257 <td>416</td>
23258 </tr>
23259 <tr class="row-odd"><td>&#160;</td>
23260 <td>&#160;</td>
23261 <td>&#160;</td>
23262 <td>J721E_DEV_R5FSS0_CORE1</td>
23263 <td>intr</td>
23264 <td>416</td>
23265 </tr>
23266 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23267 <td>134</td>
23268 <td>161</td>
23269 <td>J721E_DEV_R5FSS0_CORE0</td>
23270 <td>intr</td>
23271 <td>417</td>
23272 </tr>
23273 <tr class="row-odd"><td>&#160;</td>
23274 <td>&#160;</td>
23275 <td>&#160;</td>
23276 <td>J721E_DEV_R5FSS0_CORE1</td>
23277 <td>intr</td>
23278 <td>417</td>
23279 </tr>
23280 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23281 <td>134</td>
23282 <td>162</td>
23283 <td>J721E_DEV_R5FSS0_CORE0</td>
23284 <td>intr</td>
23285 <td>418</td>
23286 </tr>
23287 <tr class="row-odd"><td>&#160;</td>
23288 <td>&#160;</td>
23289 <td>&#160;</td>
23290 <td>J721E_DEV_R5FSS0_CORE1</td>
23291 <td>intr</td>
23292 <td>418</td>
23293 </tr>
23294 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23295 <td>134</td>
23296 <td>163</td>
23297 <td>J721E_DEV_R5FSS0_CORE0</td>
23298 <td>intr</td>
23299 <td>419</td>
23300 </tr>
23301 <tr class="row-odd"><td>&#160;</td>
23302 <td>&#160;</td>
23303 <td>&#160;</td>
23304 <td>J721E_DEV_R5FSS0_CORE1</td>
23305 <td>intr</td>
23306 <td>419</td>
23307 </tr>
23308 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23309 <td>134</td>
23310 <td>164</td>
23311 <td>J721E_DEV_R5FSS0_CORE0</td>
23312 <td>intr</td>
23313 <td>420</td>
23314 </tr>
23315 <tr class="row-odd"><td>&#160;</td>
23316 <td>&#160;</td>
23317 <td>&#160;</td>
23318 <td>J721E_DEV_R5FSS0_CORE1</td>
23319 <td>intr</td>
23320 <td>420</td>
23321 </tr>
23322 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23323 <td>134</td>
23324 <td>165</td>
23325 <td>J721E_DEV_R5FSS0_CORE0</td>
23326 <td>intr</td>
23327 <td>421</td>
23328 </tr>
23329 <tr class="row-odd"><td>&#160;</td>
23330 <td>&#160;</td>
23331 <td>&#160;</td>
23332 <td>J721E_DEV_R5FSS0_CORE1</td>
23333 <td>intr</td>
23334 <td>421</td>
23335 </tr>
23336 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23337 <td>134</td>
23338 <td>166</td>
23339 <td>J721E_DEV_R5FSS0_CORE0</td>
23340 <td>intr</td>
23341 <td>422</td>
23342 </tr>
23343 <tr class="row-odd"><td>&#160;</td>
23344 <td>&#160;</td>
23345 <td>&#160;</td>
23346 <td>J721E_DEV_R5FSS0_CORE1</td>
23347 <td>intr</td>
23348 <td>422</td>
23349 </tr>
23350 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23351 <td>134</td>
23352 <td>167</td>
23353 <td>J721E_DEV_R5FSS0_CORE0</td>
23354 <td>intr</td>
23355 <td>423</td>
23356 </tr>
23357 <tr class="row-odd"><td>&#160;</td>
23358 <td>&#160;</td>
23359 <td>&#160;</td>
23360 <td>J721E_DEV_R5FSS0_CORE1</td>
23361 <td>intr</td>
23362 <td>423</td>
23363 </tr>
23364 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23365 <td>134</td>
23366 <td>168</td>
23367 <td>J721E_DEV_R5FSS0_CORE0</td>
23368 <td>intr</td>
23369 <td>424</td>
23370 </tr>
23371 <tr class="row-odd"><td>&#160;</td>
23372 <td>&#160;</td>
23373 <td>&#160;</td>
23374 <td>J721E_DEV_R5FSS0_CORE1</td>
23375 <td>intr</td>
23376 <td>424</td>
23377 </tr>
23378 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23379 <td>134</td>
23380 <td>169</td>
23381 <td>J721E_DEV_R5FSS0_CORE0</td>
23382 <td>intr</td>
23383 <td>425</td>
23384 </tr>
23385 <tr class="row-odd"><td>&#160;</td>
23386 <td>&#160;</td>
23387 <td>&#160;</td>
23388 <td>J721E_DEV_R5FSS0_CORE1</td>
23389 <td>intr</td>
23390 <td>425</td>
23391 </tr>
23392 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23393 <td>134</td>
23394 <td>170</td>
23395 <td>J721E_DEV_R5FSS0_CORE0</td>
23396 <td>intr</td>
23397 <td>426</td>
23398 </tr>
23399 <tr class="row-odd"><td>&#160;</td>
23400 <td>&#160;</td>
23401 <td>&#160;</td>
23402 <td>J721E_DEV_R5FSS0_CORE1</td>
23403 <td>intr</td>
23404 <td>426</td>
23405 </tr>
23406 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23407 <td>134</td>
23408 <td>171</td>
23409 <td>J721E_DEV_R5FSS0_CORE0</td>
23410 <td>intr</td>
23411 <td>427</td>
23412 </tr>
23413 <tr class="row-odd"><td>&#160;</td>
23414 <td>&#160;</td>
23415 <td>&#160;</td>
23416 <td>J721E_DEV_R5FSS0_CORE1</td>
23417 <td>intr</td>
23418 <td>427</td>
23419 </tr>
23420 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23421 <td>134</td>
23422 <td>172</td>
23423 <td>J721E_DEV_R5FSS0_CORE0</td>
23424 <td>intr</td>
23425 <td>428</td>
23426 </tr>
23427 <tr class="row-odd"><td>&#160;</td>
23428 <td>&#160;</td>
23429 <td>&#160;</td>
23430 <td>J721E_DEV_R5FSS0_CORE1</td>
23431 <td>intr</td>
23432 <td>428</td>
23433 </tr>
23434 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23435 <td>134</td>
23436 <td>173</td>
23437 <td>J721E_DEV_R5FSS0_CORE0</td>
23438 <td>intr</td>
23439 <td>429</td>
23440 </tr>
23441 <tr class="row-odd"><td>&#160;</td>
23442 <td>&#160;</td>
23443 <td>&#160;</td>
23444 <td>J721E_DEV_R5FSS0_CORE1</td>
23445 <td>intr</td>
23446 <td>429</td>
23447 </tr>
23448 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23449 <td>134</td>
23450 <td>174</td>
23451 <td>J721E_DEV_R5FSS0_CORE0</td>
23452 <td>intr</td>
23453 <td>430</td>
23454 </tr>
23455 <tr class="row-odd"><td>&#160;</td>
23456 <td>&#160;</td>
23457 <td>&#160;</td>
23458 <td>J721E_DEV_R5FSS0_CORE1</td>
23459 <td>intr</td>
23460 <td>430</td>
23461 </tr>
23462 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23463 <td>134</td>
23464 <td>175</td>
23465 <td>J721E_DEV_R5FSS0_CORE0</td>
23466 <td>intr</td>
23467 <td>431</td>
23468 </tr>
23469 <tr class="row-odd"><td>&#160;</td>
23470 <td>&#160;</td>
23471 <td>&#160;</td>
23472 <td>J721E_DEV_R5FSS0_CORE1</td>
23473 <td>intr</td>
23474 <td>431</td>
23475 </tr>
23476 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23477 <td>134</td>
23478 <td>176</td>
23479 <td>J721E_DEV_R5FSS0_CORE0</td>
23480 <td>intr</td>
23481 <td>432</td>
23482 </tr>
23483 <tr class="row-odd"><td>&#160;</td>
23484 <td>&#160;</td>
23485 <td>&#160;</td>
23486 <td>J721E_DEV_R5FSS0_CORE1</td>
23487 <td>intr</td>
23488 <td>432</td>
23489 </tr>
23490 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23491 <td>134</td>
23492 <td>177</td>
23493 <td>J721E_DEV_R5FSS0_CORE0</td>
23494 <td>intr</td>
23495 <td>433</td>
23496 </tr>
23497 <tr class="row-odd"><td>&#160;</td>
23498 <td>&#160;</td>
23499 <td>&#160;</td>
23500 <td>J721E_DEV_R5FSS0_CORE1</td>
23501 <td>intr</td>
23502 <td>433</td>
23503 </tr>
23504 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23505 <td>134</td>
23506 <td>178</td>
23507 <td>J721E_DEV_R5FSS0_CORE0</td>
23508 <td>intr</td>
23509 <td>434</td>
23510 </tr>
23511 <tr class="row-odd"><td>&#160;</td>
23512 <td>&#160;</td>
23513 <td>&#160;</td>
23514 <td>J721E_DEV_R5FSS0_CORE1</td>
23515 <td>intr</td>
23516 <td>434</td>
23517 </tr>
23518 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23519 <td>134</td>
23520 <td>179</td>
23521 <td>J721E_DEV_R5FSS0_CORE0</td>
23522 <td>intr</td>
23523 <td>435</td>
23524 </tr>
23525 <tr class="row-odd"><td>&#160;</td>
23526 <td>&#160;</td>
23527 <td>&#160;</td>
23528 <td>J721E_DEV_R5FSS0_CORE1</td>
23529 <td>intr</td>
23530 <td>435</td>
23531 </tr>
23532 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23533 <td>134</td>
23534 <td>180</td>
23535 <td>J721E_DEV_R5FSS0_CORE0</td>
23536 <td>intr</td>
23537 <td>436</td>
23538 </tr>
23539 <tr class="row-odd"><td>&#160;</td>
23540 <td>&#160;</td>
23541 <td>&#160;</td>
23542 <td>J721E_DEV_R5FSS0_CORE1</td>
23543 <td>intr</td>
23544 <td>436</td>
23545 </tr>
23546 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23547 <td>134</td>
23548 <td>181</td>
23549 <td>J721E_DEV_R5FSS0_CORE0</td>
23550 <td>intr</td>
23551 <td>437</td>
23552 </tr>
23553 <tr class="row-odd"><td>&#160;</td>
23554 <td>&#160;</td>
23555 <td>&#160;</td>
23556 <td>J721E_DEV_R5FSS0_CORE1</td>
23557 <td>intr</td>
23558 <td>437</td>
23559 </tr>
23560 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23561 <td>134</td>
23562 <td>182</td>
23563 <td>J721E_DEV_R5FSS0_CORE0</td>
23564 <td>intr</td>
23565 <td>438</td>
23566 </tr>
23567 <tr class="row-odd"><td>&#160;</td>
23568 <td>&#160;</td>
23569 <td>&#160;</td>
23570 <td>J721E_DEV_R5FSS0_CORE1</td>
23571 <td>intr</td>
23572 <td>438</td>
23573 </tr>
23574 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23575 <td>134</td>
23576 <td>183</td>
23577 <td>J721E_DEV_R5FSS0_CORE0</td>
23578 <td>intr</td>
23579 <td>439</td>
23580 </tr>
23581 <tr class="row-odd"><td>&#160;</td>
23582 <td>&#160;</td>
23583 <td>&#160;</td>
23584 <td>J721E_DEV_R5FSS0_CORE1</td>
23585 <td>intr</td>
23586 <td>439</td>
23587 </tr>
23588 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23589 <td>134</td>
23590 <td>184</td>
23591 <td>J721E_DEV_R5FSS0_CORE0</td>
23592 <td>intr</td>
23593 <td>440</td>
23594 </tr>
23595 <tr class="row-odd"><td>&#160;</td>
23596 <td>&#160;</td>
23597 <td>&#160;</td>
23598 <td>J721E_DEV_R5FSS0_CORE1</td>
23599 <td>intr</td>
23600 <td>440</td>
23601 </tr>
23602 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23603 <td>134</td>
23604 <td>185</td>
23605 <td>J721E_DEV_R5FSS0_CORE0</td>
23606 <td>intr</td>
23607 <td>441</td>
23608 </tr>
23609 <tr class="row-odd"><td>&#160;</td>
23610 <td>&#160;</td>
23611 <td>&#160;</td>
23612 <td>J721E_DEV_R5FSS0_CORE1</td>
23613 <td>intr</td>
23614 <td>441</td>
23615 </tr>
23616 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23617 <td>134</td>
23618 <td>186</td>
23619 <td>J721E_DEV_R5FSS0_CORE0</td>
23620 <td>intr</td>
23621 <td>442</td>
23622 </tr>
23623 <tr class="row-odd"><td>&#160;</td>
23624 <td>&#160;</td>
23625 <td>&#160;</td>
23626 <td>J721E_DEV_R5FSS0_CORE1</td>
23627 <td>intr</td>
23628 <td>442</td>
23629 </tr>
23630 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23631 <td>134</td>
23632 <td>187</td>
23633 <td>J721E_DEV_R5FSS0_CORE0</td>
23634 <td>intr</td>
23635 <td>443</td>
23636 </tr>
23637 <tr class="row-odd"><td>&#160;</td>
23638 <td>&#160;</td>
23639 <td>&#160;</td>
23640 <td>J721E_DEV_R5FSS0_CORE1</td>
23641 <td>intr</td>
23642 <td>443</td>
23643 </tr>
23644 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23645 <td>134</td>
23646 <td>188</td>
23647 <td>J721E_DEV_R5FSS0_CORE0</td>
23648 <td>intr</td>
23649 <td>444</td>
23650 </tr>
23651 <tr class="row-odd"><td>&#160;</td>
23652 <td>&#160;</td>
23653 <td>&#160;</td>
23654 <td>J721E_DEV_R5FSS0_CORE1</td>
23655 <td>intr</td>
23656 <td>444</td>
23657 </tr>
23658 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23659 <td>134</td>
23660 <td>189</td>
23661 <td>J721E_DEV_R5FSS0_CORE0</td>
23662 <td>intr</td>
23663 <td>445</td>
23664 </tr>
23665 <tr class="row-odd"><td>&#160;</td>
23666 <td>&#160;</td>
23667 <td>&#160;</td>
23668 <td>J721E_DEV_R5FSS0_CORE1</td>
23669 <td>intr</td>
23670 <td>445</td>
23671 </tr>
23672 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23673 <td>134</td>
23674 <td>190</td>
23675 <td>J721E_DEV_R5FSS0_CORE0</td>
23676 <td>intr</td>
23677 <td>446</td>
23678 </tr>
23679 <tr class="row-odd"><td>&#160;</td>
23680 <td>&#160;</td>
23681 <td>&#160;</td>
23682 <td>J721E_DEV_R5FSS0_CORE1</td>
23683 <td>intr</td>
23684 <td>446</td>
23685 </tr>
23686 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23687 <td>134</td>
23688 <td>191</td>
23689 <td>J721E_DEV_R5FSS0_CORE0</td>
23690 <td>intr</td>
23691 <td>447</td>
23692 </tr>
23693 <tr class="row-odd"><td>&#160;</td>
23694 <td>&#160;</td>
23695 <td>&#160;</td>
23696 <td>J721E_DEV_R5FSS0_CORE1</td>
23697 <td>intr</td>
23698 <td>447</td>
23699 </tr>
23700 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23701 <td>134</td>
23702 <td>192</td>
23703 <td>J721E_DEV_R5FSS0_CORE0</td>
23704 <td>intr</td>
23705 <td>448</td>
23706 </tr>
23707 <tr class="row-odd"><td>&#160;</td>
23708 <td>&#160;</td>
23709 <td>&#160;</td>
23710 <td>J721E_DEV_R5FSS0_CORE1</td>
23711 <td>intr</td>
23712 <td>448</td>
23713 </tr>
23714 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23715 <td>134</td>
23716 <td>193</td>
23717 <td>J721E_DEV_R5FSS0_CORE0</td>
23718 <td>intr</td>
23719 <td>449</td>
23720 </tr>
23721 <tr class="row-odd"><td>&#160;</td>
23722 <td>&#160;</td>
23723 <td>&#160;</td>
23724 <td>J721E_DEV_R5FSS0_CORE1</td>
23725 <td>intr</td>
23726 <td>449</td>
23727 </tr>
23728 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23729 <td>134</td>
23730 <td>194</td>
23731 <td>J721E_DEV_R5FSS0_CORE0</td>
23732 <td>intr</td>
23733 <td>450</td>
23734 </tr>
23735 <tr class="row-odd"><td>&#160;</td>
23736 <td>&#160;</td>
23737 <td>&#160;</td>
23738 <td>J721E_DEV_R5FSS0_CORE1</td>
23739 <td>intr</td>
23740 <td>450</td>
23741 </tr>
23742 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23743 <td>134</td>
23744 <td>195</td>
23745 <td>J721E_DEV_R5FSS0_CORE0</td>
23746 <td>intr</td>
23747 <td>451</td>
23748 </tr>
23749 <tr class="row-odd"><td>&#160;</td>
23750 <td>&#160;</td>
23751 <td>&#160;</td>
23752 <td>J721E_DEV_R5FSS0_CORE1</td>
23753 <td>intr</td>
23754 <td>451</td>
23755 </tr>
23756 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23757 <td>134</td>
23758 <td>196</td>
23759 <td>J721E_DEV_R5FSS0_CORE0</td>
23760 <td>intr</td>
23761 <td>452</td>
23762 </tr>
23763 <tr class="row-odd"><td>&#160;</td>
23764 <td>&#160;</td>
23765 <td>&#160;</td>
23766 <td>J721E_DEV_R5FSS0_CORE1</td>
23767 <td>intr</td>
23768 <td>452</td>
23769 </tr>
23770 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23771 <td>134</td>
23772 <td>197</td>
23773 <td>J721E_DEV_R5FSS0_CORE0</td>
23774 <td>intr</td>
23775 <td>453</td>
23776 </tr>
23777 <tr class="row-odd"><td>&#160;</td>
23778 <td>&#160;</td>
23779 <td>&#160;</td>
23780 <td>J721E_DEV_R5FSS0_CORE1</td>
23781 <td>intr</td>
23782 <td>453</td>
23783 </tr>
23784 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23785 <td>134</td>
23786 <td>198</td>
23787 <td>J721E_DEV_R5FSS0_CORE0</td>
23788 <td>intr</td>
23789 <td>454</td>
23790 </tr>
23791 <tr class="row-odd"><td>&#160;</td>
23792 <td>&#160;</td>
23793 <td>&#160;</td>
23794 <td>J721E_DEV_R5FSS0_CORE1</td>
23795 <td>intr</td>
23796 <td>454</td>
23797 </tr>
23798 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23799 <td>134</td>
23800 <td>199</td>
23801 <td>J721E_DEV_R5FSS0_CORE0</td>
23802 <td>intr</td>
23803 <td>455</td>
23804 </tr>
23805 <tr class="row-odd"><td>&#160;</td>
23806 <td>&#160;</td>
23807 <td>&#160;</td>
23808 <td>J721E_DEV_R5FSS0_CORE1</td>
23809 <td>intr</td>
23810 <td>455</td>
23811 </tr>
23812 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23813 <td>134</td>
23814 <td>200</td>
23815 <td>J721E_DEV_R5FSS0_CORE0</td>
23816 <td>intr</td>
23817 <td>456</td>
23818 </tr>
23819 <tr class="row-odd"><td>&#160;</td>
23820 <td>&#160;</td>
23821 <td>&#160;</td>
23822 <td>J721E_DEV_R5FSS0_CORE1</td>
23823 <td>intr</td>
23824 <td>456</td>
23825 </tr>
23826 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23827 <td>134</td>
23828 <td>201</td>
23829 <td>J721E_DEV_R5FSS0_CORE0</td>
23830 <td>intr</td>
23831 <td>457</td>
23832 </tr>
23833 <tr class="row-odd"><td>&#160;</td>
23834 <td>&#160;</td>
23835 <td>&#160;</td>
23836 <td>J721E_DEV_R5FSS0_CORE1</td>
23837 <td>intr</td>
23838 <td>457</td>
23839 </tr>
23840 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23841 <td>134</td>
23842 <td>202</td>
23843 <td>J721E_DEV_R5FSS0_CORE0</td>
23844 <td>intr</td>
23845 <td>458</td>
23846 </tr>
23847 <tr class="row-odd"><td>&#160;</td>
23848 <td>&#160;</td>
23849 <td>&#160;</td>
23850 <td>J721E_DEV_R5FSS0_CORE1</td>
23851 <td>intr</td>
23852 <td>458</td>
23853 </tr>
23854 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23855 <td>134</td>
23856 <td>203</td>
23857 <td>J721E_DEV_R5FSS0_CORE0</td>
23858 <td>intr</td>
23859 <td>459</td>
23860 </tr>
23861 <tr class="row-odd"><td>&#160;</td>
23862 <td>&#160;</td>
23863 <td>&#160;</td>
23864 <td>J721E_DEV_R5FSS0_CORE1</td>
23865 <td>intr</td>
23866 <td>459</td>
23867 </tr>
23868 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23869 <td>134</td>
23870 <td>204</td>
23871 <td>J721E_DEV_R5FSS0_CORE0</td>
23872 <td>intr</td>
23873 <td>460</td>
23874 </tr>
23875 <tr class="row-odd"><td>&#160;</td>
23876 <td>&#160;</td>
23877 <td>&#160;</td>
23878 <td>J721E_DEV_R5FSS0_CORE1</td>
23879 <td>intr</td>
23880 <td>460</td>
23881 </tr>
23882 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23883 <td>134</td>
23884 <td>205</td>
23885 <td>J721E_DEV_R5FSS0_CORE0</td>
23886 <td>intr</td>
23887 <td>461</td>
23888 </tr>
23889 <tr class="row-odd"><td>&#160;</td>
23890 <td>&#160;</td>
23891 <td>&#160;</td>
23892 <td>J721E_DEV_R5FSS0_CORE1</td>
23893 <td>intr</td>
23894 <td>461</td>
23895 </tr>
23896 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23897 <td>134</td>
23898 <td>206</td>
23899 <td>J721E_DEV_R5FSS0_CORE0</td>
23900 <td>intr</td>
23901 <td>462</td>
23902 </tr>
23903 <tr class="row-odd"><td>&#160;</td>
23904 <td>&#160;</td>
23905 <td>&#160;</td>
23906 <td>J721E_DEV_R5FSS0_CORE1</td>
23907 <td>intr</td>
23908 <td>462</td>
23909 </tr>
23910 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23911 <td>134</td>
23912 <td>207</td>
23913 <td>J721E_DEV_R5FSS0_CORE0</td>
23914 <td>intr</td>
23915 <td>463</td>
23916 </tr>
23917 <tr class="row-odd"><td>&#160;</td>
23918 <td>&#160;</td>
23919 <td>&#160;</td>
23920 <td>J721E_DEV_R5FSS0_CORE1</td>
23921 <td>intr</td>
23922 <td>463</td>
23923 </tr>
23924 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23925 <td>134</td>
23926 <td>208</td>
23927 <td>J721E_DEV_R5FSS0_CORE0</td>
23928 <td>intr</td>
23929 <td>464</td>
23930 </tr>
23931 <tr class="row-odd"><td>&#160;</td>
23932 <td>&#160;</td>
23933 <td>&#160;</td>
23934 <td>J721E_DEV_R5FSS0_CORE1</td>
23935 <td>intr</td>
23936 <td>464</td>
23937 </tr>
23938 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23939 <td>134</td>
23940 <td>209</td>
23941 <td>J721E_DEV_R5FSS0_CORE0</td>
23942 <td>intr</td>
23943 <td>465</td>
23944 </tr>
23945 <tr class="row-odd"><td>&#160;</td>
23946 <td>&#160;</td>
23947 <td>&#160;</td>
23948 <td>J721E_DEV_R5FSS0_CORE1</td>
23949 <td>intr</td>
23950 <td>465</td>
23951 </tr>
23952 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23953 <td>134</td>
23954 <td>210</td>
23955 <td>J721E_DEV_R5FSS0_CORE0</td>
23956 <td>intr</td>
23957 <td>466</td>
23958 </tr>
23959 <tr class="row-odd"><td>&#160;</td>
23960 <td>&#160;</td>
23961 <td>&#160;</td>
23962 <td>J721E_DEV_R5FSS0_CORE1</td>
23963 <td>intr</td>
23964 <td>466</td>
23965 </tr>
23966 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23967 <td>134</td>
23968 <td>211</td>
23969 <td>J721E_DEV_R5FSS0_CORE0</td>
23970 <td>intr</td>
23971 <td>467</td>
23972 </tr>
23973 <tr class="row-odd"><td>&#160;</td>
23974 <td>&#160;</td>
23975 <td>&#160;</td>
23976 <td>J721E_DEV_R5FSS0_CORE1</td>
23977 <td>intr</td>
23978 <td>467</td>
23979 </tr>
23980 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23981 <td>134</td>
23982 <td>212</td>
23983 <td>J721E_DEV_R5FSS0_CORE0</td>
23984 <td>intr</td>
23985 <td>468</td>
23986 </tr>
23987 <tr class="row-odd"><td>&#160;</td>
23988 <td>&#160;</td>
23989 <td>&#160;</td>
23990 <td>J721E_DEV_R5FSS0_CORE1</td>
23991 <td>intr</td>
23992 <td>468</td>
23993 </tr>
23994 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
23995 <td>134</td>
23996 <td>213</td>
23997 <td>J721E_DEV_R5FSS0_CORE0</td>
23998 <td>intr</td>
23999 <td>469</td>
24000 </tr>
24001 <tr class="row-odd"><td>&#160;</td>
24002 <td>&#160;</td>
24003 <td>&#160;</td>
24004 <td>J721E_DEV_R5FSS0_CORE1</td>
24005 <td>intr</td>
24006 <td>469</td>
24007 </tr>
24008 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24009 <td>134</td>
24010 <td>214</td>
24011 <td>J721E_DEV_R5FSS0_CORE0</td>
24012 <td>intr</td>
24013 <td>470</td>
24014 </tr>
24015 <tr class="row-odd"><td>&#160;</td>
24016 <td>&#160;</td>
24017 <td>&#160;</td>
24018 <td>J721E_DEV_R5FSS0_CORE1</td>
24019 <td>intr</td>
24020 <td>470</td>
24021 </tr>
24022 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24023 <td>134</td>
24024 <td>215</td>
24025 <td>J721E_DEV_R5FSS0_CORE0</td>
24026 <td>intr</td>
24027 <td>471</td>
24028 </tr>
24029 <tr class="row-odd"><td>&#160;</td>
24030 <td>&#160;</td>
24031 <td>&#160;</td>
24032 <td>J721E_DEV_R5FSS0_CORE1</td>
24033 <td>intr</td>
24034 <td>471</td>
24035 </tr>
24036 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24037 <td>134</td>
24038 <td>216</td>
24039 <td>J721E_DEV_R5FSS0_CORE0</td>
24040 <td>intr</td>
24041 <td>472</td>
24042 </tr>
24043 <tr class="row-odd"><td>&#160;</td>
24044 <td>&#160;</td>
24045 <td>&#160;</td>
24046 <td>J721E_DEV_R5FSS0_CORE1</td>
24047 <td>intr</td>
24048 <td>472</td>
24049 </tr>
24050 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24051 <td>134</td>
24052 <td>217</td>
24053 <td>J721E_DEV_R5FSS0_CORE0</td>
24054 <td>intr</td>
24055 <td>473</td>
24056 </tr>
24057 <tr class="row-odd"><td>&#160;</td>
24058 <td>&#160;</td>
24059 <td>&#160;</td>
24060 <td>J721E_DEV_R5FSS0_CORE1</td>
24061 <td>intr</td>
24062 <td>473</td>
24063 </tr>
24064 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24065 <td>134</td>
24066 <td>218</td>
24067 <td>J721E_DEV_R5FSS0_CORE0</td>
24068 <td>intr</td>
24069 <td>474</td>
24070 </tr>
24071 <tr class="row-odd"><td>&#160;</td>
24072 <td>&#160;</td>
24073 <td>&#160;</td>
24074 <td>J721E_DEV_R5FSS0_CORE1</td>
24075 <td>intr</td>
24076 <td>474</td>
24077 </tr>
24078 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24079 <td>134</td>
24080 <td>219</td>
24081 <td>J721E_DEV_R5FSS0_CORE0</td>
24082 <td>intr</td>
24083 <td>475</td>
24084 </tr>
24085 <tr class="row-odd"><td>&#160;</td>
24086 <td>&#160;</td>
24087 <td>&#160;</td>
24088 <td>J721E_DEV_R5FSS0_CORE1</td>
24089 <td>intr</td>
24090 <td>475</td>
24091 </tr>
24092 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24093 <td>134</td>
24094 <td>220</td>
24095 <td>J721E_DEV_R5FSS0_CORE0</td>
24096 <td>intr</td>
24097 <td>476</td>
24098 </tr>
24099 <tr class="row-odd"><td>&#160;</td>
24100 <td>&#160;</td>
24101 <td>&#160;</td>
24102 <td>J721E_DEV_R5FSS0_CORE1</td>
24103 <td>intr</td>
24104 <td>476</td>
24105 </tr>
24106 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24107 <td>134</td>
24108 <td>221</td>
24109 <td>J721E_DEV_R5FSS0_CORE0</td>
24110 <td>intr</td>
24111 <td>477</td>
24112 </tr>
24113 <tr class="row-odd"><td>&#160;</td>
24114 <td>&#160;</td>
24115 <td>&#160;</td>
24116 <td>J721E_DEV_R5FSS0_CORE1</td>
24117 <td>intr</td>
24118 <td>477</td>
24119 </tr>
24120 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24121 <td>134</td>
24122 <td>222</td>
24123 <td>J721E_DEV_R5FSS0_CORE0</td>
24124 <td>intr</td>
24125 <td>478</td>
24126 </tr>
24127 <tr class="row-odd"><td>&#160;</td>
24128 <td>&#160;</td>
24129 <td>&#160;</td>
24130 <td>J721E_DEV_R5FSS0_CORE1</td>
24131 <td>intr</td>
24132 <td>478</td>
24133 </tr>
24134 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24135 <td>134</td>
24136 <td>223</td>
24137 <td>J721E_DEV_R5FSS0_CORE0</td>
24138 <td>intr</td>
24139 <td>479</td>
24140 </tr>
24141 <tr class="row-odd"><td>&#160;</td>
24142 <td>&#160;</td>
24143 <td>&#160;</td>
24144 <td>J721E_DEV_R5FSS0_CORE1</td>
24145 <td>intr</td>
24146 <td>479</td>
24147 </tr>
24148 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24149 <td>134</td>
24150 <td>224</td>
24151 <td>J721E_DEV_R5FSS0_CORE0</td>
24152 <td>intr</td>
24153 <td>480</td>
24154 </tr>
24155 <tr class="row-odd"><td>&#160;</td>
24156 <td>&#160;</td>
24157 <td>&#160;</td>
24158 <td>J721E_DEV_R5FSS0_CORE1</td>
24159 <td>intr</td>
24160 <td>480</td>
24161 </tr>
24162 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24163 <td>134</td>
24164 <td>225</td>
24165 <td>J721E_DEV_R5FSS0_CORE0</td>
24166 <td>intr</td>
24167 <td>481</td>
24168 </tr>
24169 <tr class="row-odd"><td>&#160;</td>
24170 <td>&#160;</td>
24171 <td>&#160;</td>
24172 <td>J721E_DEV_R5FSS0_CORE1</td>
24173 <td>intr</td>
24174 <td>481</td>
24175 </tr>
24176 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24177 <td>134</td>
24178 <td>226</td>
24179 <td>J721E_DEV_R5FSS0_CORE0</td>
24180 <td>intr</td>
24181 <td>482</td>
24182 </tr>
24183 <tr class="row-odd"><td>&#160;</td>
24184 <td>&#160;</td>
24185 <td>&#160;</td>
24186 <td>J721E_DEV_R5FSS0_CORE1</td>
24187 <td>intr</td>
24188 <td>482</td>
24189 </tr>
24190 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24191 <td>134</td>
24192 <td>227</td>
24193 <td>J721E_DEV_R5FSS0_CORE0</td>
24194 <td>intr</td>
24195 <td>483</td>
24196 </tr>
24197 <tr class="row-odd"><td>&#160;</td>
24198 <td>&#160;</td>
24199 <td>&#160;</td>
24200 <td>J721E_DEV_R5FSS0_CORE1</td>
24201 <td>intr</td>
24202 <td>483</td>
24203 </tr>
24204 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24205 <td>134</td>
24206 <td>228</td>
24207 <td>J721E_DEV_R5FSS0_CORE0</td>
24208 <td>intr</td>
24209 <td>484</td>
24210 </tr>
24211 <tr class="row-odd"><td>&#160;</td>
24212 <td>&#160;</td>
24213 <td>&#160;</td>
24214 <td>J721E_DEV_R5FSS0_CORE1</td>
24215 <td>intr</td>
24216 <td>484</td>
24217 </tr>
24218 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24219 <td>134</td>
24220 <td>229</td>
24221 <td>J721E_DEV_R5FSS0_CORE0</td>
24222 <td>intr</td>
24223 <td>485</td>
24224 </tr>
24225 <tr class="row-odd"><td>&#160;</td>
24226 <td>&#160;</td>
24227 <td>&#160;</td>
24228 <td>J721E_DEV_R5FSS0_CORE1</td>
24229 <td>intr</td>
24230 <td>485</td>
24231 </tr>
24232 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24233 <td>134</td>
24234 <td>230</td>
24235 <td>J721E_DEV_R5FSS0_CORE0</td>
24236 <td>intr</td>
24237 <td>486</td>
24238 </tr>
24239 <tr class="row-odd"><td>&#160;</td>
24240 <td>&#160;</td>
24241 <td>&#160;</td>
24242 <td>J721E_DEV_R5FSS0_CORE1</td>
24243 <td>intr</td>
24244 <td>486</td>
24245 </tr>
24246 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24247 <td>134</td>
24248 <td>231</td>
24249 <td>J721E_DEV_R5FSS0_CORE0</td>
24250 <td>intr</td>
24251 <td>487</td>
24252 </tr>
24253 <tr class="row-odd"><td>&#160;</td>
24254 <td>&#160;</td>
24255 <td>&#160;</td>
24256 <td>J721E_DEV_R5FSS0_CORE1</td>
24257 <td>intr</td>
24258 <td>487</td>
24259 </tr>
24260 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24261 <td>134</td>
24262 <td>232</td>
24263 <td>J721E_DEV_R5FSS0_CORE0</td>
24264 <td>intr</td>
24265 <td>488</td>
24266 </tr>
24267 <tr class="row-odd"><td>&#160;</td>
24268 <td>&#160;</td>
24269 <td>&#160;</td>
24270 <td>J721E_DEV_R5FSS0_CORE1</td>
24271 <td>intr</td>
24272 <td>488</td>
24273 </tr>
24274 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24275 <td>134</td>
24276 <td>233</td>
24277 <td>J721E_DEV_R5FSS0_CORE0</td>
24278 <td>intr</td>
24279 <td>489</td>
24280 </tr>
24281 <tr class="row-odd"><td>&#160;</td>
24282 <td>&#160;</td>
24283 <td>&#160;</td>
24284 <td>J721E_DEV_R5FSS0_CORE1</td>
24285 <td>intr</td>
24286 <td>489</td>
24287 </tr>
24288 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24289 <td>134</td>
24290 <td>234</td>
24291 <td>J721E_DEV_R5FSS0_CORE0</td>
24292 <td>intr</td>
24293 <td>490</td>
24294 </tr>
24295 <tr class="row-odd"><td>&#160;</td>
24296 <td>&#160;</td>
24297 <td>&#160;</td>
24298 <td>J721E_DEV_R5FSS0_CORE1</td>
24299 <td>intr</td>
24300 <td>490</td>
24301 </tr>
24302 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24303 <td>134</td>
24304 <td>235</td>
24305 <td>J721E_DEV_R5FSS0_CORE0</td>
24306 <td>intr</td>
24307 <td>491</td>
24308 </tr>
24309 <tr class="row-odd"><td>&#160;</td>
24310 <td>&#160;</td>
24311 <td>&#160;</td>
24312 <td>J721E_DEV_R5FSS0_CORE1</td>
24313 <td>intr</td>
24314 <td>491</td>
24315 </tr>
24316 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24317 <td>134</td>
24318 <td>236</td>
24319 <td>J721E_DEV_R5FSS0_CORE0</td>
24320 <td>intr</td>
24321 <td>492</td>
24322 </tr>
24323 <tr class="row-odd"><td>&#160;</td>
24324 <td>&#160;</td>
24325 <td>&#160;</td>
24326 <td>J721E_DEV_R5FSS0_CORE1</td>
24327 <td>intr</td>
24328 <td>492</td>
24329 </tr>
24330 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24331 <td>134</td>
24332 <td>237</td>
24333 <td>J721E_DEV_R5FSS0_CORE0</td>
24334 <td>intr</td>
24335 <td>493</td>
24336 </tr>
24337 <tr class="row-odd"><td>&#160;</td>
24338 <td>&#160;</td>
24339 <td>&#160;</td>
24340 <td>J721E_DEV_R5FSS0_CORE1</td>
24341 <td>intr</td>
24342 <td>493</td>
24343 </tr>
24344 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24345 <td>134</td>
24346 <td>238</td>
24347 <td>J721E_DEV_R5FSS0_CORE0</td>
24348 <td>intr</td>
24349 <td>494</td>
24350 </tr>
24351 <tr class="row-odd"><td>&#160;</td>
24352 <td>&#160;</td>
24353 <td>&#160;</td>
24354 <td>J721E_DEV_R5FSS0_CORE1</td>
24355 <td>intr</td>
24356 <td>494</td>
24357 </tr>
24358 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24359 <td>134</td>
24360 <td>239</td>
24361 <td>J721E_DEV_R5FSS0_CORE0</td>
24362 <td>intr</td>
24363 <td>495</td>
24364 </tr>
24365 <tr class="row-odd"><td>&#160;</td>
24366 <td>&#160;</td>
24367 <td>&#160;</td>
24368 <td>J721E_DEV_R5FSS0_CORE1</td>
24369 <td>intr</td>
24370 <td>495</td>
24371 </tr>
24372 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24373 <td>134</td>
24374 <td>240</td>
24375 <td>J721E_DEV_R5FSS0_CORE0</td>
24376 <td>intr</td>
24377 <td>496</td>
24378 </tr>
24379 <tr class="row-odd"><td>&#160;</td>
24380 <td>&#160;</td>
24381 <td>&#160;</td>
24382 <td>J721E_DEV_R5FSS0_CORE1</td>
24383 <td>intr</td>
24384 <td>496</td>
24385 </tr>
24386 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24387 <td>134</td>
24388 <td>241</td>
24389 <td>J721E_DEV_R5FSS0_CORE0</td>
24390 <td>intr</td>
24391 <td>497</td>
24392 </tr>
24393 <tr class="row-odd"><td>&#160;</td>
24394 <td>&#160;</td>
24395 <td>&#160;</td>
24396 <td>J721E_DEV_R5FSS0_CORE1</td>
24397 <td>intr</td>
24398 <td>497</td>
24399 </tr>
24400 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24401 <td>134</td>
24402 <td>242</td>
24403 <td>J721E_DEV_R5FSS0_CORE0</td>
24404 <td>intr</td>
24405 <td>498</td>
24406 </tr>
24407 <tr class="row-odd"><td>&#160;</td>
24408 <td>&#160;</td>
24409 <td>&#160;</td>
24410 <td>J721E_DEV_R5FSS0_CORE1</td>
24411 <td>intr</td>
24412 <td>498</td>
24413 </tr>
24414 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24415 <td>134</td>
24416 <td>243</td>
24417 <td>J721E_DEV_R5FSS0_CORE0</td>
24418 <td>intr</td>
24419 <td>499</td>
24420 </tr>
24421 <tr class="row-odd"><td>&#160;</td>
24422 <td>&#160;</td>
24423 <td>&#160;</td>
24424 <td>J721E_DEV_R5FSS0_CORE1</td>
24425 <td>intr</td>
24426 <td>499</td>
24427 </tr>
24428 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24429 <td>134</td>
24430 <td>244</td>
24431 <td>J721E_DEV_R5FSS0_CORE0</td>
24432 <td>intr</td>
24433 <td>500</td>
24434 </tr>
24435 <tr class="row-odd"><td>&#160;</td>
24436 <td>&#160;</td>
24437 <td>&#160;</td>
24438 <td>J721E_DEV_R5FSS0_CORE1</td>
24439 <td>intr</td>
24440 <td>500</td>
24441 </tr>
24442 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24443 <td>134</td>
24444 <td>245</td>
24445 <td>J721E_DEV_R5FSS0_CORE0</td>
24446 <td>intr</td>
24447 <td>501</td>
24448 </tr>
24449 <tr class="row-odd"><td>&#160;</td>
24450 <td>&#160;</td>
24451 <td>&#160;</td>
24452 <td>J721E_DEV_R5FSS0_CORE1</td>
24453 <td>intr</td>
24454 <td>501</td>
24455 </tr>
24456 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24457 <td>134</td>
24458 <td>246</td>
24459 <td>J721E_DEV_R5FSS0_CORE0</td>
24460 <td>intr</td>
24461 <td>502</td>
24462 </tr>
24463 <tr class="row-odd"><td>&#160;</td>
24464 <td>&#160;</td>
24465 <td>&#160;</td>
24466 <td>J721E_DEV_R5FSS0_CORE1</td>
24467 <td>intr</td>
24468 <td>502</td>
24469 </tr>
24470 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24471 <td>134</td>
24472 <td>247</td>
24473 <td>J721E_DEV_R5FSS0_CORE0</td>
24474 <td>intr</td>
24475 <td>503</td>
24476 </tr>
24477 <tr class="row-odd"><td>&#160;</td>
24478 <td>&#160;</td>
24479 <td>&#160;</td>
24480 <td>J721E_DEV_R5FSS0_CORE1</td>
24481 <td>intr</td>
24482 <td>503</td>
24483 </tr>
24484 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24485 <td>134</td>
24486 <td>248</td>
24487 <td>J721E_DEV_R5FSS0_CORE0</td>
24488 <td>intr</td>
24489 <td>504</td>
24490 </tr>
24491 <tr class="row-odd"><td>&#160;</td>
24492 <td>&#160;</td>
24493 <td>&#160;</td>
24494 <td>J721E_DEV_R5FSS0_CORE1</td>
24495 <td>intr</td>
24496 <td>504</td>
24497 </tr>
24498 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24499 <td>134</td>
24500 <td>249</td>
24501 <td>J721E_DEV_R5FSS0_CORE0</td>
24502 <td>intr</td>
24503 <td>505</td>
24504 </tr>
24505 <tr class="row-odd"><td>&#160;</td>
24506 <td>&#160;</td>
24507 <td>&#160;</td>
24508 <td>J721E_DEV_R5FSS0_CORE1</td>
24509 <td>intr</td>
24510 <td>505</td>
24511 </tr>
24512 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24513 <td>134</td>
24514 <td>250</td>
24515 <td>J721E_DEV_R5FSS0_CORE0</td>
24516 <td>intr</td>
24517 <td>506</td>
24518 </tr>
24519 <tr class="row-odd"><td>&#160;</td>
24520 <td>&#160;</td>
24521 <td>&#160;</td>
24522 <td>J721E_DEV_R5FSS0_CORE1</td>
24523 <td>intr</td>
24524 <td>506</td>
24525 </tr>
24526 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24527 <td>134</td>
24528 <td>251</td>
24529 <td>J721E_DEV_R5FSS0_CORE0</td>
24530 <td>intr</td>
24531 <td>507</td>
24532 </tr>
24533 <tr class="row-odd"><td>&#160;</td>
24534 <td>&#160;</td>
24535 <td>&#160;</td>
24536 <td>J721E_DEV_R5FSS0_CORE1</td>
24537 <td>intr</td>
24538 <td>507</td>
24539 </tr>
24540 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24541 <td>134</td>
24542 <td>252</td>
24543 <td>J721E_DEV_R5FSS0_CORE0</td>
24544 <td>intr</td>
24545 <td>508</td>
24546 </tr>
24547 <tr class="row-odd"><td>&#160;</td>
24548 <td>&#160;</td>
24549 <td>&#160;</td>
24550 <td>J721E_DEV_R5FSS0_CORE1</td>
24551 <td>intr</td>
24552 <td>508</td>
24553 </tr>
24554 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24555 <td>134</td>
24556 <td>253</td>
24557 <td>J721E_DEV_R5FSS0_CORE0</td>
24558 <td>intr</td>
24559 <td>509</td>
24560 </tr>
24561 <tr class="row-odd"><td>&#160;</td>
24562 <td>&#160;</td>
24563 <td>&#160;</td>
24564 <td>J721E_DEV_R5FSS0_CORE1</td>
24565 <td>intr</td>
24566 <td>509</td>
24567 </tr>
24568 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24569 <td>134</td>
24570 <td>254</td>
24571 <td>J721E_DEV_R5FSS0_CORE0</td>
24572 <td>intr</td>
24573 <td>510</td>
24574 </tr>
24575 <tr class="row-odd"><td>&#160;</td>
24576 <td>&#160;</td>
24577 <td>&#160;</td>
24578 <td>J721E_DEV_R5FSS0_CORE1</td>
24579 <td>intr</td>
24580 <td>510</td>
24581 </tr>
24582 <tr class="row-even"><td>J721E_DEV_R5FSS0_INTROUTER0</td>
24583 <td>134</td>
24584 <td>255</td>
24585 <td>J721E_DEV_R5FSS0_CORE0</td>
24586 <td>intr</td>
24587 <td>511</td>
24588 </tr>
24589 <tr class="row-odd"><td>&#160;</td>
24590 <td>&#160;</td>
24591 <td>&#160;</td>
24592 <td>J721E_DEV_R5FSS0_CORE1</td>
24593 <td>intr</td>
24594 <td>511</td>
24595 </tr>
24596 </tbody>
24597 </table>
24598 </div>
24599 <div class="section" id="r5fss1-introuter0-interrupt-router-input-sources">
24600 <span id="pub-soc-j721e-r5fss1-introuter0-input-src-list"></span><h2>R5FSS1_INTROUTER0 Interrupt Router Input Sources<a class="headerlink" href="#r5fss1-introuter0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
24601 <div class="admonition warning">
24602 <p class="first admonition-title">Warning</p>
24603 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
24604 host within the RM Board Configuration resource assignment array.  The RM
24605 Board Configuration is rejected if an overlap with a reserved resource is
24606 detected.</p>
24607 </div>
24608 <table border="1" class="docutils">
24609 <colgroup>
24610 <col width="19%" />
24611 <col width="10%" />
24612 <col width="12%" />
24613 <col width="22%" />
24614 <col width="26%" />
24615 <col width="10%" />
24616 </colgroup>
24617 <thead valign="bottom">
24618 <tr class="row-odd"><th class="head">IR Name</th>
24619 <th class="head">IR Device ID</th>
24620 <th class="head">IR Input Index</th>
24621 <th class="head">Source Name</th>
24622 <th class="head">Source Interface</th>
24623 <th class="head">Source Index</th>
24624 </tr>
24625 </thead>
24626 <tbody valign="top">
24627 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24628 <td>135</td>
24629 <td>0</td>
24630 <td>Not Connected</td>
24631 <td>&#160;</td>
24632 <td>&#160;</td>
24633 </tr>
24634 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24635 <td>135</td>
24636 <td>1</td>
24637 <td>J721E_DEV_USB1</td>
24638 <td>otgirq</td>
24639 <td>0</td>
24640 </tr>
24641 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24642 <td>135</td>
24643 <td>2</td>
24644 <td>J721E_DEV_USB1</td>
24645 <td>irq</td>
24646 <td>0</td>
24647 </tr>
24648 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24649 <td>135</td>
24650 <td>3</td>
24651 <td>J721E_DEV_USB1</td>
24652 <td>irq</td>
24653 <td>1</td>
24654 </tr>
24655 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24656 <td>135</td>
24657 <td>4</td>
24658 <td>J721E_DEV_USB1</td>
24659 <td>irq</td>
24660 <td>2</td>
24661 </tr>
24662 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24663 <td>135</td>
24664 <td>5</td>
24665 <td>J721E_DEV_USB1</td>
24666 <td>irq</td>
24667 <td>3</td>
24668 </tr>
24669 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24670 <td>135</td>
24671 <td>6</td>
24672 <td>J721E_DEV_USB1</td>
24673 <td>irq</td>
24674 <td>4</td>
24675 </tr>
24676 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24677 <td>135</td>
24678 <td>7</td>
24679 <td>J721E_DEV_USB1</td>
24680 <td>irq</td>
24681 <td>5</td>
24682 </tr>
24683 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24684 <td>135</td>
24685 <td>8</td>
24686 <td>J721E_DEV_USB1</td>
24687 <td>irq</td>
24688 <td>6</td>
24689 </tr>
24690 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24691 <td>135</td>
24692 <td>9</td>
24693 <td>J721E_DEV_USB1</td>
24694 <td>irq</td>
24695 <td>7</td>
24696 </tr>
24697 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24698 <td>135</td>
24699 <td>10</td>
24700 <td>Not Connected</td>
24701 <td>&#160;</td>
24702 <td>&#160;</td>
24703 </tr>
24704 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24705 <td>135</td>
24706 <td>11</td>
24707 <td>Not Connected</td>
24708 <td>&#160;</td>
24709 <td>&#160;</td>
24710 </tr>
24711 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24712 <td>135</td>
24713 <td>12</td>
24714 <td>Not Connected</td>
24715 <td>&#160;</td>
24716 <td>&#160;</td>
24717 </tr>
24718 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24719 <td>135</td>
24720 <td>13</td>
24721 <td>Not Connected</td>
24722 <td>&#160;</td>
24723 <td>&#160;</td>
24724 </tr>
24725 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24726 <td>135</td>
24727 <td>14</td>
24728 <td>Not Connected</td>
24729 <td>&#160;</td>
24730 <td>&#160;</td>
24731 </tr>
24732 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24733 <td>135</td>
24734 <td>15</td>
24735 <td>Not Connected</td>
24736 <td>&#160;</td>
24737 <td>&#160;</td>
24738 </tr>
24739 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24740 <td>135</td>
24741 <td>16</td>
24742 <td>Not Connected</td>
24743 <td>&#160;</td>
24744 <td>&#160;</td>
24745 </tr>
24746 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24747 <td>135</td>
24748 <td>17</td>
24749 <td>Not Connected</td>
24750 <td>&#160;</td>
24751 <td>&#160;</td>
24752 </tr>
24753 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24754 <td>135</td>
24755 <td>18</td>
24756 <td>Not Connected</td>
24757 <td>&#160;</td>
24758 <td>&#160;</td>
24759 </tr>
24760 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24761 <td>135</td>
24762 <td>19</td>
24763 <td>J721E_DEV_PCIE2</td>
24764 <td>pcie_legacy_pulse</td>
24765 <td>0</td>
24766 </tr>
24767 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24768 <td>135</td>
24769 <td>20</td>
24770 <td>J721E_DEV_PCIE2</td>
24771 <td>pcie_downstream_pulse</td>
24772 <td>0</td>
24773 </tr>
24774 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24775 <td>135</td>
24776 <td>21</td>
24777 <td>J721E_DEV_PCIE2</td>
24778 <td>pcie_flr_pulse</td>
24779 <td>0</td>
24780 </tr>
24781 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24782 <td>135</td>
24783 <td>22</td>
24784 <td>J721E_DEV_PCIE2</td>
24785 <td>pcie_phy_level</td>
24786 <td>0</td>
24787 </tr>
24788 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24789 <td>135</td>
24790 <td>23</td>
24791 <td>J721E_DEV_PCIE2</td>
24792 <td>pcie_local_level</td>
24793 <td>0</td>
24794 </tr>
24795 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24796 <td>135</td>
24797 <td>24</td>
24798 <td>J721E_DEV_PCIE2</td>
24799 <td>pcie_error_pulse</td>
24800 <td>0</td>
24801 </tr>
24802 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24803 <td>135</td>
24804 <td>25</td>
24805 <td>J721E_DEV_PCIE2</td>
24806 <td>pcie_link_state_pulse</td>
24807 <td>0</td>
24808 </tr>
24809 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24810 <td>135</td>
24811 <td>26</td>
24812 <td>J721E_DEV_PCIE2</td>
24813 <td>pcie_pwr_state_pulse</td>
24814 <td>0</td>
24815 </tr>
24816 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24817 <td>135</td>
24818 <td>27</td>
24819 <td>J721E_DEV_PCIE2</td>
24820 <td>pcie_ptm_valid_pulse</td>
24821 <td>0</td>
24822 </tr>
24823 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24824 <td>135</td>
24825 <td>28</td>
24826 <td>J721E_DEV_PCIE2</td>
24827 <td>pcie_hot_reset_pulse</td>
24828 <td>0</td>
24829 </tr>
24830 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24831 <td>135</td>
24832 <td>29</td>
24833 <td>J721E_DEV_PCIE2</td>
24834 <td>pcie_cpts_pend</td>
24835 <td>0</td>
24836 </tr>
24837 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24838 <td>135</td>
24839 <td>30</td>
24840 <td>J721E_DEV_PRU_ICSSG0</td>
24841 <td>pr1_host_intr_pend</td>
24842 <td>0</td>
24843 </tr>
24844 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24845 <td>135</td>
24846 <td>31</td>
24847 <td>J721E_DEV_PRU_ICSSG0</td>
24848 <td>pr1_host_intr_pend</td>
24849 <td>1</td>
24850 </tr>
24851 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24852 <td>135</td>
24853 <td>32</td>
24854 <td>J721E_DEV_PRU_ICSSG0</td>
24855 <td>pr1_host_intr_pend</td>
24856 <td>2</td>
24857 </tr>
24858 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24859 <td>135</td>
24860 <td>33</td>
24861 <td>J721E_DEV_PRU_ICSSG0</td>
24862 <td>pr1_host_intr_pend</td>
24863 <td>3</td>
24864 </tr>
24865 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24866 <td>135</td>
24867 <td>34</td>
24868 <td>J721E_DEV_PRU_ICSSG0</td>
24869 <td>pr1_host_intr_pend</td>
24870 <td>4</td>
24871 </tr>
24872 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24873 <td>135</td>
24874 <td>35</td>
24875 <td>J721E_DEV_PRU_ICSSG0</td>
24876 <td>pr1_host_intr_pend</td>
24877 <td>5</td>
24878 </tr>
24879 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24880 <td>135</td>
24881 <td>36</td>
24882 <td>J721E_DEV_PRU_ICSSG0</td>
24883 <td>pr1_host_intr_pend</td>
24884 <td>6</td>
24885 </tr>
24886 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24887 <td>135</td>
24888 <td>37</td>
24889 <td>J721E_DEV_PRU_ICSSG0</td>
24890 <td>pr1_host_intr_pend</td>
24891 <td>7</td>
24892 </tr>
24893 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24894 <td>135</td>
24895 <td>38</td>
24896 <td>J721E_DEV_PRU_ICSSG1</td>
24897 <td>pr1_host_intr_pend</td>
24898 <td>0</td>
24899 </tr>
24900 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24901 <td>135</td>
24902 <td>39</td>
24903 <td>J721E_DEV_PRU_ICSSG1</td>
24904 <td>pr1_host_intr_pend</td>
24905 <td>1</td>
24906 </tr>
24907 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24908 <td>135</td>
24909 <td>40</td>
24910 <td>J721E_DEV_PRU_ICSSG1</td>
24911 <td>pr1_host_intr_pend</td>
24912 <td>2</td>
24913 </tr>
24914 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24915 <td>135</td>
24916 <td>41</td>
24917 <td>J721E_DEV_PRU_ICSSG1</td>
24918 <td>pr1_host_intr_pend</td>
24919 <td>3</td>
24920 </tr>
24921 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24922 <td>135</td>
24923 <td>42</td>
24924 <td>J721E_DEV_PRU_ICSSG1</td>
24925 <td>pr1_host_intr_pend</td>
24926 <td>4</td>
24927 </tr>
24928 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24929 <td>135</td>
24930 <td>43</td>
24931 <td>J721E_DEV_PRU_ICSSG1</td>
24932 <td>pr1_host_intr_pend</td>
24933 <td>5</td>
24934 </tr>
24935 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24936 <td>135</td>
24937 <td>44</td>
24938 <td>J721E_DEV_PRU_ICSSG1</td>
24939 <td>pr1_host_intr_pend</td>
24940 <td>6</td>
24941 </tr>
24942 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24943 <td>135</td>
24944 <td>45</td>
24945 <td>J721E_DEV_PRU_ICSSG1</td>
24946 <td>pr1_host_intr_pend</td>
24947 <td>7</td>
24948 </tr>
24949 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24950 <td>135</td>
24951 <td>46</td>
24952 <td>J721E_DEV_PRU_ICSSG0</td>
24953 <td>pr1_tx_sof_intr_req</td>
24954 <td>0</td>
24955 </tr>
24956 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24957 <td>135</td>
24958 <td>47</td>
24959 <td>J721E_DEV_PRU_ICSSG0</td>
24960 <td>pr1_tx_sof_intr_req</td>
24961 <td>1</td>
24962 </tr>
24963 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24964 <td>135</td>
24965 <td>48</td>
24966 <td>J721E_DEV_PRU_ICSSG0</td>
24967 <td>pr1_rx_sof_intr_req</td>
24968 <td>0</td>
24969 </tr>
24970 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24971 <td>135</td>
24972 <td>49</td>
24973 <td>J721E_DEV_PRU_ICSSG0</td>
24974 <td>pr1_rx_sof_intr_req</td>
24975 <td>1</td>
24976 </tr>
24977 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24978 <td>135</td>
24979 <td>50</td>
24980 <td>J721E_DEV_PRU_ICSSG1</td>
24981 <td>pr1_tx_sof_intr_req</td>
24982 <td>0</td>
24983 </tr>
24984 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24985 <td>135</td>
24986 <td>51</td>
24987 <td>J721E_DEV_PRU_ICSSG1</td>
24988 <td>pr1_tx_sof_intr_req</td>
24989 <td>1</td>
24990 </tr>
24991 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24992 <td>135</td>
24993 <td>52</td>
24994 <td>J721E_DEV_PRU_ICSSG1</td>
24995 <td>pr1_rx_sof_intr_req</td>
24996 <td>0</td>
24997 </tr>
24998 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
24999 <td>135</td>
25000 <td>53</td>
25001 <td>J721E_DEV_PRU_ICSSG1</td>
25002 <td>pr1_rx_sof_intr_req</td>
25003 <td>1</td>
25004 </tr>
25005 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25006 <td>135</td>
25007 <td>54</td>
25008 <td>J721E_DEV_PCIE3</td>
25009 <td>pcie_legacy_pulse</td>
25010 <td>0</td>
25011 </tr>
25012 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25013 <td>135</td>
25014 <td>55</td>
25015 <td>J721E_DEV_PCIE3</td>
25016 <td>pcie_downstream_pulse</td>
25017 <td>0</td>
25018 </tr>
25019 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25020 <td>135</td>
25021 <td>56</td>
25022 <td>J721E_DEV_PCIE3</td>
25023 <td>pcie_flr_pulse</td>
25024 <td>0</td>
25025 </tr>
25026 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25027 <td>135</td>
25028 <td>57</td>
25029 <td>J721E_DEV_PCIE3</td>
25030 <td>pcie_phy_level</td>
25031 <td>0</td>
25032 </tr>
25033 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25034 <td>135</td>
25035 <td>58</td>
25036 <td>J721E_DEV_PCIE3</td>
25037 <td>pcie_local_level</td>
25038 <td>0</td>
25039 </tr>
25040 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25041 <td>135</td>
25042 <td>59</td>
25043 <td>J721E_DEV_PCIE3</td>
25044 <td>pcie_error_pulse</td>
25045 <td>0</td>
25046 </tr>
25047 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25048 <td>135</td>
25049 <td>60</td>
25050 <td>J721E_DEV_PCIE3</td>
25051 <td>pcie_link_state_pulse</td>
25052 <td>0</td>
25053 </tr>
25054 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25055 <td>135</td>
25056 <td>61</td>
25057 <td>J721E_DEV_PCIE3</td>
25058 <td>pcie_pwr_state_pulse</td>
25059 <td>0</td>
25060 </tr>
25061 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25062 <td>135</td>
25063 <td>62</td>
25064 <td>J721E_DEV_PCIE3</td>
25065 <td>pcie_ptm_valid_pulse</td>
25066 <td>0</td>
25067 </tr>
25068 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25069 <td>135</td>
25070 <td>63</td>
25071 <td>J721E_DEV_PCIE3</td>
25072 <td>pcie_hot_reset_pulse</td>
25073 <td>0</td>
25074 </tr>
25075 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25076 <td>135</td>
25077 <td>64</td>
25078 <td>J721E_DEV_PCIE3</td>
25079 <td>pcie_cpts_pend</td>
25080 <td>0</td>
25081 </tr>
25082 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25083 <td>135</td>
25084 <td>65</td>
25085 <td>J721E_DEV_USB1</td>
25086 <td>host_system_error</td>
25087 <td>0</td>
25088 </tr>
25089 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25090 <td>135</td>
25091 <td>66</td>
25092 <td>Not Connected</td>
25093 <td>&#160;</td>
25094 <td>&#160;</td>
25095 </tr>
25096 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25097 <td>135</td>
25098 <td>67</td>
25099 <td>Not Connected</td>
25100 <td>&#160;</td>
25101 <td>&#160;</td>
25102 </tr>
25103 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25104 <td>135</td>
25105 <td>68</td>
25106 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25107 <td>outp</td>
25108 <td>0</td>
25109 </tr>
25110 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25111 <td>135</td>
25112 <td>69</td>
25113 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25114 <td>outp</td>
25115 <td>1</td>
25116 </tr>
25117 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25118 <td>135</td>
25119 <td>70</td>
25120 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25121 <td>outp</td>
25122 <td>2</td>
25123 </tr>
25124 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25125 <td>135</td>
25126 <td>71</td>
25127 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25128 <td>outp</td>
25129 <td>3</td>
25130 </tr>
25131 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25132 <td>135</td>
25133 <td>72</td>
25134 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25135 <td>outp</td>
25136 <td>4</td>
25137 </tr>
25138 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25139 <td>135</td>
25140 <td>73</td>
25141 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25142 <td>outp</td>
25143 <td>5</td>
25144 </tr>
25145 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25146 <td>135</td>
25147 <td>74</td>
25148 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25149 <td>outp</td>
25150 <td>6</td>
25151 </tr>
25152 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25153 <td>135</td>
25154 <td>75</td>
25155 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25156 <td>outp</td>
25157 <td>7</td>
25158 </tr>
25159 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25160 <td>135</td>
25161 <td>76</td>
25162 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25163 <td>outp</td>
25164 <td>8</td>
25165 </tr>
25166 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25167 <td>135</td>
25168 <td>77</td>
25169 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25170 <td>outp</td>
25171 <td>9</td>
25172 </tr>
25173 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25174 <td>135</td>
25175 <td>78</td>
25176 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25177 <td>outp</td>
25178 <td>10</td>
25179 </tr>
25180 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25181 <td>135</td>
25182 <td>79</td>
25183 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25184 <td>outp</td>
25185 <td>11</td>
25186 </tr>
25187 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25188 <td>135</td>
25189 <td>80</td>
25190 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25191 <td>outp</td>
25192 <td>12</td>
25193 </tr>
25194 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25195 <td>135</td>
25196 <td>81</td>
25197 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25198 <td>outp</td>
25199 <td>13</td>
25200 </tr>
25201 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25202 <td>135</td>
25203 <td>82</td>
25204 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25205 <td>outp</td>
25206 <td>14</td>
25207 </tr>
25208 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25209 <td>135</td>
25210 <td>83</td>
25211 <td>J721E_DEV_GPIOMUX_INTRTR0</td>
25212 <td>outp</td>
25213 <td>15</td>
25214 </tr>
25215 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25216 <td>135</td>
25217 <td>84</td>
25218 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25219 <td>soc_events_out_level</td>
25220 <td>0</td>
25221 </tr>
25222 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25223 <td>135</td>
25224 <td>85</td>
25225 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25226 <td>soc_events_out_level</td>
25227 <td>1</td>
25228 </tr>
25229 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25230 <td>135</td>
25231 <td>86</td>
25232 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25233 <td>soc_events_out_level</td>
25234 <td>2</td>
25235 </tr>
25236 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25237 <td>135</td>
25238 <td>87</td>
25239 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25240 <td>soc_events_out_level</td>
25241 <td>3</td>
25242 </tr>
25243 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25244 <td>135</td>
25245 <td>88</td>
25246 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25247 <td>soc_events_out_level</td>
25248 <td>4</td>
25249 </tr>
25250 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25251 <td>135</td>
25252 <td>89</td>
25253 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25254 <td>soc_events_out_level</td>
25255 <td>5</td>
25256 </tr>
25257 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25258 <td>135</td>
25259 <td>90</td>
25260 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25261 <td>soc_events_out_level</td>
25262 <td>6</td>
25263 </tr>
25264 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25265 <td>135</td>
25266 <td>91</td>
25267 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25268 <td>soc_events_out_level</td>
25269 <td>7</td>
25270 </tr>
25271 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25272 <td>135</td>
25273 <td>92</td>
25274 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25275 <td>soc_events_out_level</td>
25276 <td>8</td>
25277 </tr>
25278 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25279 <td>135</td>
25280 <td>93</td>
25281 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25282 <td>soc_events_out_level</td>
25283 <td>9</td>
25284 </tr>
25285 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25286 <td>135</td>
25287 <td>94</td>
25288 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25289 <td>soc_events_out_level</td>
25290 <td>10</td>
25291 </tr>
25292 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25293 <td>135</td>
25294 <td>95</td>
25295 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25296 <td>soc_events_out_level</td>
25297 <td>11</td>
25298 </tr>
25299 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25300 <td>135</td>
25301 <td>96</td>
25302 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25303 <td>soc_events_out_level</td>
25304 <td>12</td>
25305 </tr>
25306 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25307 <td>135</td>
25308 <td>97</td>
25309 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25310 <td>soc_events_out_level</td>
25311 <td>13</td>
25312 </tr>
25313 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25314 <td>135</td>
25315 <td>98</td>
25316 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25317 <td>soc_events_out_level</td>
25318 <td>14</td>
25319 </tr>
25320 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25321 <td>135</td>
25322 <td>99</td>
25323 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
25324 <td>soc_events_out_level</td>
25325 <td>15</td>
25326 </tr>
25327 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25328 <td>135</td>
25329 <td>100</td>
25330 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25331 <td>outp</td>
25332 <td>16</td>
25333 </tr>
25334 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25335 <td>135</td>
25336 <td>101</td>
25337 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25338 <td>outp</td>
25339 <td>17</td>
25340 </tr>
25341 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25342 <td>135</td>
25343 <td>102</td>
25344 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25345 <td>outp</td>
25346 <td>18</td>
25347 </tr>
25348 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25349 <td>135</td>
25350 <td>103</td>
25351 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25352 <td>outp</td>
25353 <td>19</td>
25354 </tr>
25355 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25356 <td>135</td>
25357 <td>104</td>
25358 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25359 <td>outp</td>
25360 <td>20</td>
25361 </tr>
25362 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25363 <td>135</td>
25364 <td>105</td>
25365 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25366 <td>outp</td>
25367 <td>21</td>
25368 </tr>
25369 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25370 <td>135</td>
25371 <td>106</td>
25372 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25373 <td>outp</td>
25374 <td>22</td>
25375 </tr>
25376 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25377 <td>135</td>
25378 <td>107</td>
25379 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25380 <td>outp</td>
25381 <td>23</td>
25382 </tr>
25383 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25384 <td>135</td>
25385 <td>108</td>
25386 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25387 <td>outp</td>
25388 <td>24</td>
25389 </tr>
25390 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25391 <td>135</td>
25392 <td>109</td>
25393 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25394 <td>outp</td>
25395 <td>25</td>
25396 </tr>
25397 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25398 <td>135</td>
25399 <td>110</td>
25400 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25401 <td>outp</td>
25402 <td>26</td>
25403 </tr>
25404 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25405 <td>135</td>
25406 <td>111</td>
25407 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25408 <td>outp</td>
25409 <td>27</td>
25410 </tr>
25411 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25412 <td>135</td>
25413 <td>112</td>
25414 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25415 <td>outp</td>
25416 <td>28</td>
25417 </tr>
25418 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25419 <td>135</td>
25420 <td>113</td>
25421 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25422 <td>outp</td>
25423 <td>29</td>
25424 </tr>
25425 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25426 <td>135</td>
25427 <td>114</td>
25428 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25429 <td>outp</td>
25430 <td>30</td>
25431 </tr>
25432 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25433 <td>135</td>
25434 <td>115</td>
25435 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
25436 <td>outp</td>
25437 <td>31</td>
25438 </tr>
25439 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25440 <td>135</td>
25441 <td>116</td>
25442 <td>J721E_DEV_MCU_ADC12_16FFC0</td>
25443 <td>gen_level</td>
25444 <td>0</td>
25445 </tr>
25446 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25447 <td>135</td>
25448 <td>117</td>
25449 <td>J721E_DEV_MCU_ADC12_16FFC1</td>
25450 <td>gen_level</td>
25451 <td>0</td>
25452 </tr>
25453 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25454 <td>135</td>
25455 <td>118</td>
25456 <td>J721E_DEV_MCU_CPSW0</td>
25457 <td>stat_pend</td>
25458 <td>0</td>
25459 </tr>
25460 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25461 <td>135</td>
25462 <td>119</td>
25463 <td>J721E_DEV_MCU_CPSW0</td>
25464 <td>mdio_pend</td>
25465 <td>0</td>
25466 </tr>
25467 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25468 <td>135</td>
25469 <td>120</td>
25470 <td>J721E_DEV_MCU_CPSW0</td>
25471 <td>evnt_pend</td>
25472 <td>0</td>
25473 </tr>
25474 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25475 <td>135</td>
25476 <td>121</td>
25477 <td>J721E_DEV_MCU_DCC0</td>
25478 <td>intr_done_level</td>
25479 <td>0</td>
25480 </tr>
25481 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25482 <td>135</td>
25483 <td>122</td>
25484 <td>J721E_DEV_MCU_DCC1</td>
25485 <td>intr_done_level</td>
25486 <td>0</td>
25487 </tr>
25488 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25489 <td>135</td>
25490 <td>123</td>
25491 <td>J721E_DEV_MCU_DCC2</td>
25492 <td>intr_done_level</td>
25493 <td>0</td>
25494 </tr>
25495 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25496 <td>135</td>
25497 <td>124</td>
25498 <td>J721E_DEV_MCU_TIMER0</td>
25499 <td>intr_pend</td>
25500 <td>0</td>
25501 </tr>
25502 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25503 <td>135</td>
25504 <td>125</td>
25505 <td>J721E_DEV_MCU_TIMER1</td>
25506 <td>intr_pend</td>
25507 <td>0</td>
25508 </tr>
25509 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25510 <td>135</td>
25511 <td>126</td>
25512 <td>J721E_DEV_MCU_TIMER2</td>
25513 <td>intr_pend</td>
25514 <td>0</td>
25515 </tr>
25516 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25517 <td>135</td>
25518 <td>127</td>
25519 <td>J721E_DEV_MCU_TIMER3</td>
25520 <td>intr_pend</td>
25521 <td>0</td>
25522 </tr>
25523 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25524 <td>135</td>
25525 <td>128</td>
25526 <td>J721E_DEV_MCU_TIMER4</td>
25527 <td>intr_pend</td>
25528 <td>0</td>
25529 </tr>
25530 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25531 <td>135</td>
25532 <td>129</td>
25533 <td>J721E_DEV_MCU_TIMER5</td>
25534 <td>intr_pend</td>
25535 <td>0</td>
25536 </tr>
25537 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25538 <td>135</td>
25539 <td>130</td>
25540 <td>J721E_DEV_MCU_TIMER6</td>
25541 <td>intr_pend</td>
25542 <td>0</td>
25543 </tr>
25544 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25545 <td>135</td>
25546 <td>131</td>
25547 <td>J721E_DEV_MCU_TIMER7</td>
25548 <td>intr_pend</td>
25549 <td>0</td>
25550 </tr>
25551 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25552 <td>135</td>
25553 <td>132</td>
25554 <td>J721E_DEV_MCU_TIMER8</td>
25555 <td>intr_pend</td>
25556 <td>0</td>
25557 </tr>
25558 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25559 <td>135</td>
25560 <td>133</td>
25561 <td>J721E_DEV_MCU_TIMER9</td>
25562 <td>intr_pend</td>
25563 <td>0</td>
25564 </tr>
25565 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25566 <td>135</td>
25567 <td>134</td>
25568 <td>J721E_DEV_MCU_I2C0</td>
25569 <td>pointrpend</td>
25570 <td>0</td>
25571 </tr>
25572 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25573 <td>135</td>
25574 <td>135</td>
25575 <td>J721E_DEV_MCU_I2C1</td>
25576 <td>pointrpend</td>
25577 <td>0</td>
25578 </tr>
25579 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25580 <td>135</td>
25581 <td>136</td>
25582 <td>J721E_DEV_MCU_MCSPI0</td>
25583 <td>intr_spi</td>
25584 <td>0</td>
25585 </tr>
25586 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25587 <td>135</td>
25588 <td>137</td>
25589 <td>J721E_DEV_MCU_MCSPI1</td>
25590 <td>intr_spi</td>
25591 <td>0</td>
25592 </tr>
25593 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25594 <td>135</td>
25595 <td>138</td>
25596 <td>J721E_DEV_MCU_MCSPI2</td>
25597 <td>intr_spi</td>
25598 <td>0</td>
25599 </tr>
25600 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25601 <td>135</td>
25602 <td>139</td>
25603 <td>J721E_DEV_MCU_UART0</td>
25604 <td>usart_irq</td>
25605 <td>0</td>
25606 </tr>
25607 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25608 <td>135</td>
25609 <td>140</td>
25610 <td>J721E_DEV_MCU_I3C0</td>
25611 <td>i3c__int</td>
25612 <td>0</td>
25613 </tr>
25614 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25615 <td>135</td>
25616 <td>141</td>
25617 <td>J721E_DEV_MCU_I3C1</td>
25618 <td>i3c__int</td>
25619 <td>0</td>
25620 </tr>
25621 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25622 <td>135</td>
25623 <td>142</td>
25624 <td>J721E_DEV_MCU_FSS0_OSPI_0</td>
25625 <td>ospi_lvl_intr</td>
25626 <td>0</td>
25627 </tr>
25628 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25629 <td>135</td>
25630 <td>143</td>
25631 <td>J721E_DEV_MCU_FSS0_OSPI_1</td>
25632 <td>ospi_lvl_intr</td>
25633 <td>0</td>
25634 </tr>
25635 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25636 <td>135</td>
25637 <td>144</td>
25638 <td>J721E_DEV_MCU_FSS0_HYPERBUS1P0_0</td>
25639 <td>hpb_intr</td>
25640 <td>0</td>
25641 </tr>
25642 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25643 <td>135</td>
25644 <td>145</td>
25645 <td>J721E_DEV_MCU_FSS0_FSAS_0</td>
25646 <td>otfa_intr_err_pend</td>
25647 <td>0</td>
25648 </tr>
25649 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25650 <td>135</td>
25651 <td>146</td>
25652 <td>J721E_DEV_MCU_FSS0_FSAS_0</td>
25653 <td>ecc_intr_err_pend</td>
25654 <td>0</td>
25655 </tr>
25656 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25657 <td>135</td>
25658 <td>147</td>
25659 <td>J721E_DEV_MCU_SA2_UL0</td>
25660 <td>sa_ul_pka</td>
25661 <td>0</td>
25662 </tr>
25663 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25664 <td>135</td>
25665 <td>148</td>
25666 <td>J721E_DEV_MCU_SA2_UL0</td>
25667 <td>sa_ul_trng</td>
25668 <td>0</td>
25669 </tr>
25670 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25671 <td>135</td>
25672 <td>149</td>
25673 <td>J721E_DEV_MCU_ESM0</td>
25674 <td>esm_int_low_lvl</td>
25675 <td>0</td>
25676 </tr>
25677 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25678 <td>135</td>
25679 <td>150</td>
25680 <td>J721E_DEV_MCU_ESM0</td>
25681 <td>esm_int_hi_lvl</td>
25682 <td>0</td>
25683 </tr>
25684 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25685 <td>135</td>
25686 <td>151</td>
25687 <td>J721E_DEV_MCU_ESM0</td>
25688 <td>esm_int_cfg_lvl</td>
25689 <td>0</td>
25690 </tr>
25691 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25692 <td>135</td>
25693 <td>152</td>
25694 <td>Not Connected</td>
25695 <td>&#160;</td>
25696 <td>&#160;</td>
25697 </tr>
25698 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25699 <td>135</td>
25700 <td>153</td>
25701 <td>Not Connected</td>
25702 <td>&#160;</td>
25703 <td>&#160;</td>
25704 </tr>
25705 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25706 <td>135</td>
25707 <td>154</td>
25708 <td>Not Connected</td>
25709 <td>&#160;</td>
25710 <td>&#160;</td>
25711 </tr>
25712 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25713 <td>135</td>
25714 <td>155</td>
25715 <td>Not Connected</td>
25716 <td>&#160;</td>
25717 <td>&#160;</td>
25718 </tr>
25719 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25720 <td>135</td>
25721 <td>156</td>
25722 <td>Not Connected</td>
25723 <td>&#160;</td>
25724 <td>&#160;</td>
25725 </tr>
25726 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25727 <td>135</td>
25728 <td>157</td>
25729 <td>Not Connected</td>
25730 <td>&#160;</td>
25731 <td>&#160;</td>
25732 </tr>
25733 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25734 <td>135</td>
25735 <td>158</td>
25736 <td>J721E_DEV_WKUP_I2C0</td>
25737 <td>pointrpend</td>
25738 <td>0</td>
25739 </tr>
25740 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25741 <td>135</td>
25742 <td>159</td>
25743 <td>J721E_DEV_WKUP_UART0</td>
25744 <td>usart_irq</td>
25745 <td>0</td>
25746 </tr>
25747 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25748 <td>135</td>
25749 <td>160</td>
25750 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25751 <td>outp</td>
25752 <td>16</td>
25753 </tr>
25754 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25755 <td>135</td>
25756 <td>161</td>
25757 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25758 <td>outp</td>
25759 <td>17</td>
25760 </tr>
25761 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25762 <td>135</td>
25763 <td>162</td>
25764 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25765 <td>outp</td>
25766 <td>18</td>
25767 </tr>
25768 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25769 <td>135</td>
25770 <td>163</td>
25771 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25772 <td>outp</td>
25773 <td>19</td>
25774 </tr>
25775 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25776 <td>135</td>
25777 <td>164</td>
25778 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25779 <td>outp</td>
25780 <td>20</td>
25781 </tr>
25782 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25783 <td>135</td>
25784 <td>165</td>
25785 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25786 <td>outp</td>
25787 <td>21</td>
25788 </tr>
25789 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25790 <td>135</td>
25791 <td>166</td>
25792 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25793 <td>outp</td>
25794 <td>22</td>
25795 </tr>
25796 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25797 <td>135</td>
25798 <td>167</td>
25799 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25800 <td>outp</td>
25801 <td>23</td>
25802 </tr>
25803 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25804 <td>135</td>
25805 <td>168</td>
25806 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25807 <td>outp</td>
25808 <td>24</td>
25809 </tr>
25810 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25811 <td>135</td>
25812 <td>169</td>
25813 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25814 <td>outp</td>
25815 <td>25</td>
25816 </tr>
25817 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25818 <td>135</td>
25819 <td>170</td>
25820 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25821 <td>outp</td>
25822 <td>26</td>
25823 </tr>
25824 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25825 <td>135</td>
25826 <td>171</td>
25827 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25828 <td>outp</td>
25829 <td>27</td>
25830 </tr>
25831 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25832 <td>135</td>
25833 <td>172</td>
25834 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25835 <td>outp</td>
25836 <td>28</td>
25837 </tr>
25838 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25839 <td>135</td>
25840 <td>173</td>
25841 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25842 <td>outp</td>
25843 <td>29</td>
25844 </tr>
25845 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25846 <td>135</td>
25847 <td>174</td>
25848 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25849 <td>outp</td>
25850 <td>30</td>
25851 </tr>
25852 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25853 <td>135</td>
25854 <td>175</td>
25855 <td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
25856 <td>outp</td>
25857 <td>31</td>
25858 </tr>
25859 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25860 <td>135</td>
25861 <td>176</td>
25862 <td>Not Connected</td>
25863 <td>&#160;</td>
25864 <td>&#160;</td>
25865 </tr>
25866 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25867 <td>135</td>
25868 <td>177</td>
25869 <td>Not Connected</td>
25870 <td>&#160;</td>
25871 <td>&#160;</td>
25872 </tr>
25873 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25874 <td>135</td>
25875 <td>178</td>
25876 <td>Not Connected</td>
25877 <td>&#160;</td>
25878 <td>&#160;</td>
25879 </tr>
25880 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25881 <td>135</td>
25882 <td>179</td>
25883 <td>Not Connected</td>
25884 <td>&#160;</td>
25885 <td>&#160;</td>
25886 </tr>
25887 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25888 <td>135</td>
25889 <td>180</td>
25890 <td>Not Connected</td>
25891 <td>&#160;</td>
25892 <td>&#160;</td>
25893 </tr>
25894 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25895 <td>135</td>
25896 <td>181</td>
25897 <td>Not Connected</td>
25898 <td>&#160;</td>
25899 <td>&#160;</td>
25900 </tr>
25901 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25902 <td>135</td>
25903 <td>182</td>
25904 <td>Not Connected</td>
25905 <td>&#160;</td>
25906 <td>&#160;</td>
25907 </tr>
25908 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25909 <td>135</td>
25910 <td>183</td>
25911 <td>J721E_DEV_I2C2</td>
25912 <td>pointrpend</td>
25913 <td>0</td>
25914 </tr>
25915 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25916 <td>135</td>
25917 <td>184</td>
25918 <td>J721E_DEV_I2C3</td>
25919 <td>pointrpend</td>
25920 <td>0</td>
25921 </tr>
25922 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25923 <td>135</td>
25924 <td>185</td>
25925 <td>J721E_DEV_I2C4</td>
25926 <td>pointrpend</td>
25927 <td>0</td>
25928 </tr>
25929 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25930 <td>135</td>
25931 <td>186</td>
25932 <td>J721E_DEV_I2C5</td>
25933 <td>pointrpend</td>
25934 <td>0</td>
25935 </tr>
25936 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25937 <td>135</td>
25938 <td>187</td>
25939 <td>J721E_DEV_I2C6</td>
25940 <td>pointrpend</td>
25941 <td>0</td>
25942 </tr>
25943 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25944 <td>135</td>
25945 <td>188</td>
25946 <td>J721E_DEV_UART3</td>
25947 <td>usart_irq</td>
25948 <td>0</td>
25949 </tr>
25950 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25951 <td>135</td>
25952 <td>189</td>
25953 <td>J721E_DEV_UART4</td>
25954 <td>usart_irq</td>
25955 <td>0</td>
25956 </tr>
25957 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25958 <td>135</td>
25959 <td>190</td>
25960 <td>J721E_DEV_UART5</td>
25961 <td>usart_irq</td>
25962 <td>0</td>
25963 </tr>
25964 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25965 <td>135</td>
25966 <td>191</td>
25967 <td>J721E_DEV_UART6</td>
25968 <td>usart_irq</td>
25969 <td>0</td>
25970 </tr>
25971 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25972 <td>135</td>
25973 <td>192</td>
25974 <td>J721E_DEV_UART7</td>
25975 <td>usart_irq</td>
25976 <td>0</td>
25977 </tr>
25978 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25979 <td>135</td>
25980 <td>193</td>
25981 <td>J721E_DEV_UART8</td>
25982 <td>usart_irq</td>
25983 <td>0</td>
25984 </tr>
25985 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25986 <td>135</td>
25987 <td>194</td>
25988 <td>J721E_DEV_UART9</td>
25989 <td>usart_irq</td>
25990 <td>0</td>
25991 </tr>
25992 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
25993 <td>135</td>
25994 <td>195</td>
25995 <td>J721E_DEV_MCSPI2</td>
25996 <td>intr_spi</td>
25997 <td>0</td>
25998 </tr>
25999 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26000 <td>135</td>
26001 <td>196</td>
26002 <td>J721E_DEV_MCSPI3</td>
26003 <td>intr_spi</td>
26004 <td>0</td>
26005 </tr>
26006 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26007 <td>135</td>
26008 <td>197</td>
26009 <td>J721E_DEV_MCSPI4</td>
26010 <td>intr_spi</td>
26011 <td>0</td>
26012 </tr>
26013 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26014 <td>135</td>
26015 <td>198</td>
26016 <td>J721E_DEV_MCSPI5</td>
26017 <td>intr_spi</td>
26018 <td>0</td>
26019 </tr>
26020 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26021 <td>135</td>
26022 <td>199</td>
26023 <td>J721E_DEV_MCSPI6</td>
26024 <td>intr_spi</td>
26025 <td>0</td>
26026 </tr>
26027 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26028 <td>135</td>
26029 <td>200</td>
26030 <td>J721E_DEV_MCSPI7</td>
26031 <td>intr_spi</td>
26032 <td>0</td>
26033 </tr>
26034 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26035 <td>135</td>
26036 <td>201</td>
26037 <td>J721E_DEV_I3C0</td>
26038 <td>i3c__int</td>
26039 <td>0</td>
26040 </tr>
26041 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26042 <td>135</td>
26043 <td>202</td>
26044 <td>Not Connected</td>
26045 <td>&#160;</td>
26046 <td>&#160;</td>
26047 </tr>
26048 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26049 <td>135</td>
26050 <td>203</td>
26051 <td>J721E_DEV_AASRC0</td>
26052 <td>err_level</td>
26053 <td>0</td>
26054 </tr>
26055 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26056 <td>135</td>
26057 <td>204</td>
26058 <td>J721E_DEV_AASRC0</td>
26059 <td>infifo_level</td>
26060 <td>0</td>
26061 </tr>
26062 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26063 <td>135</td>
26064 <td>205</td>
26065 <td>J721E_DEV_AASRC0</td>
26066 <td>ingroup_level</td>
26067 <td>0</td>
26068 </tr>
26069 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26070 <td>135</td>
26071 <td>206</td>
26072 <td>J721E_DEV_AASRC0</td>
26073 <td>outfifo_level</td>
26074 <td>0</td>
26075 </tr>
26076 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26077 <td>135</td>
26078 <td>207</td>
26079 <td>J721E_DEV_AASRC0</td>
26080 <td>outgroup_level</td>
26081 <td>0</td>
26082 </tr>
26083 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26084 <td>135</td>
26085 <td>208</td>
26086 <td>J721E_DEV_MCASP2</td>
26087 <td>xmit_intr_pend</td>
26088 <td>0</td>
26089 </tr>
26090 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26091 <td>135</td>
26092 <td>209</td>
26093 <td>J721E_DEV_MCASP2</td>
26094 <td>rec_intr_pend</td>
26095 <td>0</td>
26096 </tr>
26097 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26098 <td>135</td>
26099 <td>210</td>
26100 <td>J721E_DEV_MCASP3</td>
26101 <td>xmit_intr_pend</td>
26102 <td>0</td>
26103 </tr>
26104 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26105 <td>135</td>
26106 <td>211</td>
26107 <td>J721E_DEV_MCASP3</td>
26108 <td>rec_intr_pend</td>
26109 <td>0</td>
26110 </tr>
26111 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26112 <td>135</td>
26113 <td>212</td>
26114 <td>J721E_DEV_MCASP4</td>
26115 <td>xmit_intr_pend</td>
26116 <td>0</td>
26117 </tr>
26118 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26119 <td>135</td>
26120 <td>213</td>
26121 <td>J721E_DEV_MCASP4</td>
26122 <td>rec_intr_pend</td>
26123 <td>0</td>
26124 </tr>
26125 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26126 <td>135</td>
26127 <td>214</td>
26128 <td>J721E_DEV_MCASP5</td>
26129 <td>xmit_intr_pend</td>
26130 <td>0</td>
26131 </tr>
26132 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26133 <td>135</td>
26134 <td>215</td>
26135 <td>J721E_DEV_MCASP5</td>
26136 <td>rec_intr_pend</td>
26137 <td>0</td>
26138 </tr>
26139 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26140 <td>135</td>
26141 <td>216</td>
26142 <td>J721E_DEV_MCASP6</td>
26143 <td>xmit_intr_pend</td>
26144 <td>0</td>
26145 </tr>
26146 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26147 <td>135</td>
26148 <td>217</td>
26149 <td>J721E_DEV_MCASP6</td>
26150 <td>rec_intr_pend</td>
26151 <td>0</td>
26152 </tr>
26153 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26154 <td>135</td>
26155 <td>218</td>
26156 <td>J721E_DEV_MCASP7</td>
26157 <td>xmit_intr_pend</td>
26158 <td>0</td>
26159 </tr>
26160 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26161 <td>135</td>
26162 <td>219</td>
26163 <td>J721E_DEV_MCASP7</td>
26164 <td>rec_intr_pend</td>
26165 <td>0</td>
26166 </tr>
26167 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26168 <td>135</td>
26169 <td>220</td>
26170 <td>J721E_DEV_MCASP8</td>
26171 <td>xmit_intr_pend</td>
26172 <td>0</td>
26173 </tr>
26174 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26175 <td>135</td>
26176 <td>221</td>
26177 <td>J721E_DEV_MCASP8</td>
26178 <td>rec_intr_pend</td>
26179 <td>0</td>
26180 </tr>
26181 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26182 <td>135</td>
26183 <td>222</td>
26184 <td>J721E_DEV_MCASP9</td>
26185 <td>xmit_intr_pend</td>
26186 <td>0</td>
26187 </tr>
26188 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26189 <td>135</td>
26190 <td>223</td>
26191 <td>J721E_DEV_MCASP9</td>
26192 <td>rec_intr_pend</td>
26193 <td>0</td>
26194 </tr>
26195 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26196 <td>135</td>
26197 <td>224</td>
26198 <td>J721E_DEV_MCASP10</td>
26199 <td>xmit_intr_pend</td>
26200 <td>0</td>
26201 </tr>
26202 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26203 <td>135</td>
26204 <td>225</td>
26205 <td>J721E_DEV_MCASP10</td>
26206 <td>rec_intr_pend</td>
26207 <td>0</td>
26208 </tr>
26209 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26210 <td>135</td>
26211 <td>226</td>
26212 <td>J721E_DEV_MCASP11</td>
26213 <td>xmit_intr_pend</td>
26214 <td>0</td>
26215 </tr>
26216 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26217 <td>135</td>
26218 <td>227</td>
26219 <td>J721E_DEV_MCASP11</td>
26220 <td>rec_intr_pend</td>
26221 <td>0</td>
26222 </tr>
26223 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26224 <td>135</td>
26225 <td>228</td>
26226 <td>Not Connected</td>
26227 <td>&#160;</td>
26228 <td>&#160;</td>
26229 </tr>
26230 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26231 <td>135</td>
26232 <td>229</td>
26233 <td>J721E_DEV_GPMC0</td>
26234 <td>gpmc_sinterrupt</td>
26235 <td>0</td>
26236 </tr>
26237 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26238 <td>135</td>
26239 <td>230</td>
26240 <td>J721E_DEV_ELM0</td>
26241 <td>elm_porocpsinterrupt_lvl</td>
26242 <td>0</td>
26243 </tr>
26244 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26245 <td>135</td>
26246 <td>231</td>
26247 <td>J721E_DEV_USB0</td>
26248 <td>otgirq</td>
26249 <td>0</td>
26250 </tr>
26251 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26252 <td>135</td>
26253 <td>232</td>
26254 <td>J721E_DEV_USB0</td>
26255 <td>irq</td>
26256 <td>0</td>
26257 </tr>
26258 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26259 <td>135</td>
26260 <td>233</td>
26261 <td>J721E_DEV_USB0</td>
26262 <td>irq</td>
26263 <td>1</td>
26264 </tr>
26265 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26266 <td>135</td>
26267 <td>234</td>
26268 <td>J721E_DEV_USB0</td>
26269 <td>irq</td>
26270 <td>2</td>
26271 </tr>
26272 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26273 <td>135</td>
26274 <td>235</td>
26275 <td>J721E_DEV_USB0</td>
26276 <td>irq</td>
26277 <td>3</td>
26278 </tr>
26279 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26280 <td>135</td>
26281 <td>236</td>
26282 <td>J721E_DEV_USB0</td>
26283 <td>irq</td>
26284 <td>4</td>
26285 </tr>
26286 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26287 <td>135</td>
26288 <td>237</td>
26289 <td>J721E_DEV_USB0</td>
26290 <td>irq</td>
26291 <td>5</td>
26292 </tr>
26293 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26294 <td>135</td>
26295 <td>238</td>
26296 <td>J721E_DEV_USB0</td>
26297 <td>irq</td>
26298 <td>6</td>
26299 </tr>
26300 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26301 <td>135</td>
26302 <td>239</td>
26303 <td>J721E_DEV_USB0</td>
26304 <td>irq</td>
26305 <td>7</td>
26306 </tr>
26307 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26308 <td>135</td>
26309 <td>240</td>
26310 <td>J721E_DEV_TIMER0</td>
26311 <td>intr_pend</td>
26312 <td>0</td>
26313 </tr>
26314 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26315 <td>135</td>
26316 <td>241</td>
26317 <td>J721E_DEV_TIMER1</td>
26318 <td>intr_pend</td>
26319 <td>0</td>
26320 </tr>
26321 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26322 <td>135</td>
26323 <td>242</td>
26324 <td>J721E_DEV_TIMER2</td>
26325 <td>intr_pend</td>
26326 <td>0</td>
26327 </tr>
26328 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26329 <td>135</td>
26330 <td>243</td>
26331 <td>J721E_DEV_TIMER3</td>
26332 <td>intr_pend</td>
26333 <td>0</td>
26334 </tr>
26335 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26336 <td>135</td>
26337 <td>244</td>
26338 <td>J721E_DEV_TIMER4</td>
26339 <td>intr_pend</td>
26340 <td>0</td>
26341 </tr>
26342 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26343 <td>135</td>
26344 <td>245</td>
26345 <td>J721E_DEV_TIMER5</td>
26346 <td>intr_pend</td>
26347 <td>0</td>
26348 </tr>
26349 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26350 <td>135</td>
26351 <td>246</td>
26352 <td>J721E_DEV_TIMER6</td>
26353 <td>intr_pend</td>
26354 <td>0</td>
26355 </tr>
26356 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26357 <td>135</td>
26358 <td>247</td>
26359 <td>J721E_DEV_TIMER7</td>
26360 <td>intr_pend</td>
26361 <td>0</td>
26362 </tr>
26363 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26364 <td>135</td>
26365 <td>248</td>
26366 <td>J721E_DEV_TIMER8</td>
26367 <td>intr_pend</td>
26368 <td>0</td>
26369 </tr>
26370 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26371 <td>135</td>
26372 <td>249</td>
26373 <td>J721E_DEV_TIMER9</td>
26374 <td>intr_pend</td>
26375 <td>0</td>
26376 </tr>
26377 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26378 <td>135</td>
26379 <td>250</td>
26380 <td>J721E_DEV_TIMER10</td>
26381 <td>intr_pend</td>
26382 <td>0</td>
26383 </tr>
26384 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26385 <td>135</td>
26386 <td>251</td>
26387 <td>J721E_DEV_TIMER11</td>
26388 <td>intr_pend</td>
26389 <td>0</td>
26390 </tr>
26391 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26392 <td>135</td>
26393 <td>252</td>
26394 <td>J721E_DEV_PCIE1</td>
26395 <td>pcie_legacy_pulse</td>
26396 <td>0</td>
26397 </tr>
26398 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26399 <td>135</td>
26400 <td>253</td>
26401 <td>J721E_DEV_PCIE1</td>
26402 <td>pcie_downstream_pulse</td>
26403 <td>0</td>
26404 </tr>
26405 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26406 <td>135</td>
26407 <td>254</td>
26408 <td>J721E_DEV_PCIE1</td>
26409 <td>pcie_flr_pulse</td>
26410 <td>0</td>
26411 </tr>
26412 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26413 <td>135</td>
26414 <td>255</td>
26415 <td>J721E_DEV_PCIE1</td>
26416 <td>pcie_phy_level</td>
26417 <td>0</td>
26418 </tr>
26419 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26420 <td>135</td>
26421 <td>256</td>
26422 <td>J721E_DEV_PCIE1</td>
26423 <td>pcie_local_level</td>
26424 <td>0</td>
26425 </tr>
26426 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26427 <td>135</td>
26428 <td>257</td>
26429 <td>J721E_DEV_PCIE1</td>
26430 <td>pcie_error_pulse</td>
26431 <td>0</td>
26432 </tr>
26433 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26434 <td>135</td>
26435 <td>258</td>
26436 <td>J721E_DEV_PCIE1</td>
26437 <td>pcie_link_state_pulse</td>
26438 <td>0</td>
26439 </tr>
26440 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26441 <td>135</td>
26442 <td>259</td>
26443 <td>J721E_DEV_PCIE1</td>
26444 <td>pcie_pwr_state_pulse</td>
26445 <td>0</td>
26446 </tr>
26447 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26448 <td>135</td>
26449 <td>260</td>
26450 <td>J721E_DEV_PCIE1</td>
26451 <td>pcie_ptm_valid_pulse</td>
26452 <td>0</td>
26453 </tr>
26454 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26455 <td>135</td>
26456 <td>261</td>
26457 <td>J721E_DEV_PCIE1</td>
26458 <td>pcie_hot_reset_pulse</td>
26459 <td>0</td>
26460 </tr>
26461 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26462 <td>135</td>
26463 <td>262</td>
26464 <td>J721E_DEV_PCIE1</td>
26465 <td>pcie_cpts_pend</td>
26466 <td>0</td>
26467 </tr>
26468 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26469 <td>135</td>
26470 <td>263</td>
26471 <td>Not Connected</td>
26472 <td>&#160;</td>
26473 <td>&#160;</td>
26474 </tr>
26475 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26476 <td>135</td>
26477 <td>264</td>
26478 <td>J721E_DEV_DDR0</td>
26479 <td>ddrss_controller</td>
26480 <td>0</td>
26481 </tr>
26482 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26483 <td>135</td>
26484 <td>265</td>
26485 <td>J721E_DEV_DDR0</td>
26486 <td>ddrss_v2a_other_err_lvl</td>
26487 <td>0</td>
26488 </tr>
26489 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26490 <td>135</td>
26491 <td>266</td>
26492 <td>J721E_DEV_DDR0</td>
26493 <td>ddrss_hs_phy_global_error</td>
26494 <td>0</td>
26495 </tr>
26496 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26497 <td>135</td>
26498 <td>267</td>
26499 <td>J721E_DEV_DDR0</td>
26500 <td>ddrss_pll_freq_change_req</td>
26501 <td>0</td>
26502 </tr>
26503 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26504 <td>135</td>
26505 <td>268</td>
26506 <td>J721E_DEV_CSI_TX_IF0</td>
26507 <td>csi_interrupt</td>
26508 <td>0</td>
26509 </tr>
26510 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26511 <td>135</td>
26512 <td>269</td>
26513 <td>J721E_DEV_CSI_TX_IF0</td>
26514 <td>csi_level</td>
26515 <td>0</td>
26516 </tr>
26517 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26518 <td>135</td>
26519 <td>270</td>
26520 <td>Not Connected</td>
26521 <td>&#160;</td>
26522 <td>&#160;</td>
26523 </tr>
26524 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26525 <td>135</td>
26526 <td>271</td>
26527 <td>Not Connected</td>
26528 <td>&#160;</td>
26529 <td>&#160;</td>
26530 </tr>
26531 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26532 <td>135</td>
26533 <td>272</td>
26534 <td>Not Connected</td>
26535 <td>&#160;</td>
26536 <td>&#160;</td>
26537 </tr>
26538 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26539 <td>135</td>
26540 <td>273</td>
26541 <td>Not Connected</td>
26542 <td>&#160;</td>
26543 <td>&#160;</td>
26544 </tr>
26545 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26546 <td>135</td>
26547 <td>274</td>
26548 <td>Not Connected</td>
26549 <td>&#160;</td>
26550 <td>&#160;</td>
26551 </tr>
26552 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26553 <td>135</td>
26554 <td>275</td>
26555 <td>Not Connected</td>
26556 <td>&#160;</td>
26557 <td>&#160;</td>
26558 </tr>
26559 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26560 <td>135</td>
26561 <td>276</td>
26562 <td>J721E_DEV_VPFE0</td>
26563 <td>ccdc_intr_pend</td>
26564 <td>0</td>
26565 </tr>
26566 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26567 <td>135</td>
26568 <td>277</td>
26569 <td>J721E_DEV_VPFE0</td>
26570 <td>rat_exp_intr</td>
26571 <td>0</td>
26572 </tr>
26573 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26574 <td>135</td>
26575 <td>278</td>
26576 <td>Not Connected</td>
26577 <td>&#160;</td>
26578 <td>&#160;</td>
26579 </tr>
26580 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26581 <td>135</td>
26582 <td>279</td>
26583 <td>Not Connected</td>
26584 <td>&#160;</td>
26585 <td>&#160;</td>
26586 </tr>
26587 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26588 <td>135</td>
26589 <td>280</td>
26590 <td>J721E_DEV_DCC0</td>
26591 <td>intr_done_level</td>
26592 <td>0</td>
26593 </tr>
26594 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26595 <td>135</td>
26596 <td>281</td>
26597 <td>J721E_DEV_DCC1</td>
26598 <td>intr_done_level</td>
26599 <td>0</td>
26600 </tr>
26601 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26602 <td>135</td>
26603 <td>282</td>
26604 <td>J721E_DEV_DCC2</td>
26605 <td>intr_done_level</td>
26606 <td>0</td>
26607 </tr>
26608 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26609 <td>135</td>
26610 <td>283</td>
26611 <td>J721E_DEV_DCC3</td>
26612 <td>intr_done_level</td>
26613 <td>0</td>
26614 </tr>
26615 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26616 <td>135</td>
26617 <td>284</td>
26618 <td>J721E_DEV_DCC4</td>
26619 <td>intr_done_level</td>
26620 <td>0</td>
26621 </tr>
26622 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26623 <td>135</td>
26624 <td>285</td>
26625 <td>J721E_DEV_DCC5</td>
26626 <td>intr_done_level</td>
26627 <td>0</td>
26628 </tr>
26629 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26630 <td>135</td>
26631 <td>286</td>
26632 <td>J721E_DEV_DCC6</td>
26633 <td>intr_done_level</td>
26634 <td>0</td>
26635 </tr>
26636 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26637 <td>135</td>
26638 <td>287</td>
26639 <td>J721E_DEV_DCC7</td>
26640 <td>intr_done_level</td>
26641 <td>0</td>
26642 </tr>
26643 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26644 <td>135</td>
26645 <td>288</td>
26646 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26647 <td>outp</td>
26648 <td>0</td>
26649 </tr>
26650 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26651 <td>135</td>
26652 <td>289</td>
26653 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26654 <td>outp</td>
26655 <td>1</td>
26656 </tr>
26657 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26658 <td>135</td>
26659 <td>290</td>
26660 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26661 <td>outp</td>
26662 <td>2</td>
26663 </tr>
26664 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26665 <td>135</td>
26666 <td>291</td>
26667 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26668 <td>outp</td>
26669 <td>3</td>
26670 </tr>
26671 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26672 <td>135</td>
26673 <td>292</td>
26674 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26675 <td>outp</td>
26676 <td>4</td>
26677 </tr>
26678 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26679 <td>135</td>
26680 <td>293</td>
26681 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26682 <td>outp</td>
26683 <td>5</td>
26684 </tr>
26685 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26686 <td>135</td>
26687 <td>294</td>
26688 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26689 <td>outp</td>
26690 <td>6</td>
26691 </tr>
26692 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26693 <td>135</td>
26694 <td>295</td>
26695 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26696 <td>outp</td>
26697 <td>7</td>
26698 </tr>
26699 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26700 <td>135</td>
26701 <td>296</td>
26702 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26703 <td>outp</td>
26704 <td>8</td>
26705 </tr>
26706 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26707 <td>135</td>
26708 <td>297</td>
26709 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26710 <td>outp</td>
26711 <td>9</td>
26712 </tr>
26713 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26714 <td>135</td>
26715 <td>298</td>
26716 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26717 <td>outp</td>
26718 <td>10</td>
26719 </tr>
26720 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26721 <td>135</td>
26722 <td>299</td>
26723 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26724 <td>outp</td>
26725 <td>11</td>
26726 </tr>
26727 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26728 <td>135</td>
26729 <td>300</td>
26730 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26731 <td>outp</td>
26732 <td>12</td>
26733 </tr>
26734 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26735 <td>135</td>
26736 <td>301</td>
26737 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26738 <td>outp</td>
26739 <td>13</td>
26740 </tr>
26741 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26742 <td>135</td>
26743 <td>302</td>
26744 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26745 <td>outp</td>
26746 <td>14</td>
26747 </tr>
26748 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26749 <td>135</td>
26750 <td>303</td>
26751 <td>J721E_DEV_CMPEVENT_INTRTR0</td>
26752 <td>outp</td>
26753 <td>15</td>
26754 </tr>
26755 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26756 <td>135</td>
26757 <td>304</td>
26758 <td>J721E_DEV_DCC8</td>
26759 <td>intr_done_level</td>
26760 <td>0</td>
26761 </tr>
26762 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26763 <td>135</td>
26764 <td>305</td>
26765 <td>J721E_DEV_DCC9</td>
26766 <td>intr_done_level</td>
26767 <td>0</td>
26768 </tr>
26769 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26770 <td>135</td>
26771 <td>306</td>
26772 <td>J721E_DEV_DCC10</td>
26773 <td>intr_done_level</td>
26774 <td>0</td>
26775 </tr>
26776 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26777 <td>135</td>
26778 <td>307</td>
26779 <td>J721E_DEV_DCC11</td>
26780 <td>intr_done_level</td>
26781 <td>0</td>
26782 </tr>
26783 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26784 <td>135</td>
26785 <td>308</td>
26786 <td>J721E_DEV_DCC12</td>
26787 <td>intr_done_level</td>
26788 <td>0</td>
26789 </tr>
26790 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26791 <td>135</td>
26792 <td>309</td>
26793 <td>Not Connected</td>
26794 <td>&#160;</td>
26795 <td>&#160;</td>
26796 </tr>
26797 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26798 <td>135</td>
26799 <td>310</td>
26800 <td>J721E_DEV_MMCSD1</td>
26801 <td>emmcsdss_intr</td>
26802 <td>0</td>
26803 </tr>
26804 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26805 <td>135</td>
26806 <td>311</td>
26807 <td>J721E_DEV_MMCSD2</td>
26808 <td>emmcsdss_intr</td>
26809 <td>0</td>
26810 </tr>
26811 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26812 <td>135</td>
26813 <td>312</td>
26814 <td>J721E_DEV_UFS0</td>
26815 <td>ufs_intr</td>
26816 <td>0</td>
26817 </tr>
26818 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26819 <td>135</td>
26820 <td>313</td>
26821 <td>Not Connected</td>
26822 <td>&#160;</td>
26823 <td>&#160;</td>
26824 </tr>
26825 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26826 <td>135</td>
26827 <td>314</td>
26828 <td>J721E_DEV_SA2_UL0</td>
26829 <td>sa_ul_pka</td>
26830 <td>0</td>
26831 </tr>
26832 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26833 <td>135</td>
26834 <td>315</td>
26835 <td>J721E_DEV_SA2_UL0</td>
26836 <td>sa_ul_trng</td>
26837 <td>0</td>
26838 </tr>
26839 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26840 <td>135</td>
26841 <td>316</td>
26842 <td>J721E_DEV_ECAP0</td>
26843 <td>ecap_int</td>
26844 <td>0</td>
26845 </tr>
26846 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26847 <td>135</td>
26848 <td>317</td>
26849 <td>J721E_DEV_ECAP1</td>
26850 <td>ecap_int</td>
26851 <td>0</td>
26852 </tr>
26853 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26854 <td>135</td>
26855 <td>318</td>
26856 <td>J721E_DEV_ECAP2</td>
26857 <td>ecap_int</td>
26858 <td>0</td>
26859 </tr>
26860 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26861 <td>135</td>
26862 <td>319</td>
26863 <td>Not Connected</td>
26864 <td>&#160;</td>
26865 <td>&#160;</td>
26866 </tr>
26867 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26868 <td>135</td>
26869 <td>320</td>
26870 <td>Not Connected</td>
26871 <td>&#160;</td>
26872 <td>&#160;</td>
26873 </tr>
26874 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26875 <td>135</td>
26876 <td>321</td>
26877 <td>Not Connected</td>
26878 <td>&#160;</td>
26879 <td>&#160;</td>
26880 </tr>
26881 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26882 <td>135</td>
26883 <td>322</td>
26884 <td>Not Connected</td>
26885 <td>&#160;</td>
26886 <td>&#160;</td>
26887 </tr>
26888 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26889 <td>135</td>
26890 <td>323</td>
26891 <td>J721E_DEV_USB0</td>
26892 <td>host_system_error</td>
26893 <td>0</td>
26894 </tr>
26895 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26896 <td>135</td>
26897 <td>324</td>
26898 <td>Not Connected</td>
26899 <td>&#160;</td>
26900 <td>&#160;</td>
26901 </tr>
26902 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26903 <td>135</td>
26904 <td>325</td>
26905 <td>Not Connected</td>
26906 <td>&#160;</td>
26907 <td>&#160;</td>
26908 </tr>
26909 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26910 <td>135</td>
26911 <td>326</td>
26912 <td>Not Connected</td>
26913 <td>&#160;</td>
26914 <td>&#160;</td>
26915 </tr>
26916 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26917 <td>135</td>
26918 <td>327</td>
26919 <td>Not Connected</td>
26920 <td>&#160;</td>
26921 <td>&#160;</td>
26922 </tr>
26923 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26924 <td>135</td>
26925 <td>328</td>
26926 <td>J721E_DEV_WKUP_VTM0</td>
26927 <td>therm_lvl_gt_th1_intr</td>
26928 <td>0</td>
26929 </tr>
26930 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26931 <td>135</td>
26932 <td>329</td>
26933 <td>J721E_DEV_WKUP_VTM0</td>
26934 <td>therm_lvl_gt_th2_intr</td>
26935 <td>0</td>
26936 </tr>
26937 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26938 <td>135</td>
26939 <td>330</td>
26940 <td>J721E_DEV_WKUP_VTM0</td>
26941 <td>therm_lvl_lt_th0_intr</td>
26942 <td>0</td>
26943 </tr>
26944 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26945 <td>135</td>
26946 <td>331</td>
26947 <td>Not Connected</td>
26948 <td>&#160;</td>
26949 <td>&#160;</td>
26950 </tr>
26951 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26952 <td>135</td>
26953 <td>332</td>
26954 <td>J721E_DEV_COMPUTE_CLUSTER0</td>
26955 <td>gic_output_waker_gic_pwr0_wake_request</td>
26956 <td>0</td>
26957 </tr>
26958 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26959 <td>135</td>
26960 <td>333</td>
26961 <td>J721E_DEV_COMPUTE_CLUSTER0</td>
26962 <td>gic_output_waker_gic_pwr0_wake_request</td>
26963 <td>1</td>
26964 </tr>
26965 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26966 <td>135</td>
26967 <td>334</td>
26968 <td>Not Connected</td>
26969 <td>&#160;</td>
26970 <td>&#160;</td>
26971 </tr>
26972 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26973 <td>135</td>
26974 <td>335</td>
26975 <td>Not Connected</td>
26976 <td>&#160;</td>
26977 <td>&#160;</td>
26978 </tr>
26979 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26980 <td>135</td>
26981 <td>336</td>
26982 <td>J721E_DEV_MCU_MCAN0</td>
26983 <td>mcanss_mcan_lvl_int</td>
26984 <td>0</td>
26985 </tr>
26986 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26987 <td>135</td>
26988 <td>337</td>
26989 <td>J721E_DEV_MCU_MCAN0</td>
26990 <td>mcanss_mcan_lvl_int</td>
26991 <td>1</td>
26992 </tr>
26993 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
26994 <td>135</td>
26995 <td>338</td>
26996 <td>J721E_DEV_MCU_MCAN0</td>
26997 <td>mcanss_ext_ts_rollover_lvl_int</td>
26998 <td>0</td>
26999 </tr>
27000 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27001 <td>135</td>
27002 <td>339</td>
27003 <td>J721E_DEV_MCU_MCAN1</td>
27004 <td>mcanss_mcan_lvl_int</td>
27005 <td>0</td>
27006 </tr>
27007 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27008 <td>135</td>
27009 <td>340</td>
27010 <td>J721E_DEV_MCU_MCAN1</td>
27011 <td>mcanss_mcan_lvl_int</td>
27012 <td>1</td>
27013 </tr>
27014 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27015 <td>135</td>
27016 <td>341</td>
27017 <td>J721E_DEV_MCU_MCAN1</td>
27018 <td>mcanss_ext_ts_rollover_lvl_int</td>
27019 <td>0</td>
27020 </tr>
27021 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27022 <td>135</td>
27023 <td>342</td>
27024 <td>Not Connected</td>
27025 <td>&#160;</td>
27026 <td>&#160;</td>
27027 </tr>
27028 <tr class="row-odd"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27029 <td>135</td>
27030 <td>343</td>
27031 <td>Not Connected</td>
27032 <td>&#160;</td>
27033 <td>&#160;</td>
27034 </tr>
27035 </tbody>
27036 </table>
27037 </div>
27038 <div class="section" id="r5fss1-introuter0-interrupt-router-output-destinations">
27039 <span id="pub-soc-j721e-r5fss1-introuter0-output-src-list"></span><h2>R5FSS1_INTROUTER0 Interrupt Router Output Destinations<a class="headerlink" href="#r5fss1-introuter0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
27040 <div class="admonition warning">
27041 <p class="first admonition-title">Warning</p>
27042 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
27043 host within the RM Board Configuration resource assignment array.  The RM
27044 Board Configuration is rejected if an overlap with a reserved resource is
27045 detected.</p>
27046 </div>
27047 <table border="1" class="docutils">
27048 <colgroup>
27049 <col width="22%" />
27050 <col width="12%" />
27051 <col width="14%" />
27052 <col width="18%" />
27053 <col width="19%" />
27054 <col width="16%" />
27055 </colgroup>
27056 <thead valign="bottom">
27057 <tr class="row-odd"><th class="head">IR Name</th>
27058 <th class="head">IR Device ID</th>
27059 <th class="head">IR Output Index</th>
27060 <th class="head">Destination Name</th>
27061 <th class="head">Destination Interface</th>
27062 <th class="head">Destination Index</th>
27063 </tr>
27064 </thead>
27065 <tbody valign="top">
27066 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27067 <td>135</td>
27068 <td>0</td>
27069 <td>J721E_DEV_R5FSS1_CORE0</td>
27070 <td>intr</td>
27071 <td>256</td>
27072 </tr>
27073 <tr class="row-odd"><td>&#160;</td>
27074 <td>&#160;</td>
27075 <td>&#160;</td>
27076 <td>J721E_DEV_R5FSS1_CORE1</td>
27077 <td>intr</td>
27078 <td>256</td>
27079 </tr>
27080 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27081 <td>135</td>
27082 <td>1</td>
27083 <td>J721E_DEV_R5FSS1_CORE0</td>
27084 <td>intr</td>
27085 <td>257</td>
27086 </tr>
27087 <tr class="row-odd"><td>&#160;</td>
27088 <td>&#160;</td>
27089 <td>&#160;</td>
27090 <td>J721E_DEV_R5FSS1_CORE1</td>
27091 <td>intr</td>
27092 <td>257</td>
27093 </tr>
27094 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27095 <td>135</td>
27096 <td>2</td>
27097 <td>J721E_DEV_R5FSS1_CORE0</td>
27098 <td>intr</td>
27099 <td>258</td>
27100 </tr>
27101 <tr class="row-odd"><td>&#160;</td>
27102 <td>&#160;</td>
27103 <td>&#160;</td>
27104 <td>J721E_DEV_R5FSS1_CORE1</td>
27105 <td>intr</td>
27106 <td>258</td>
27107 </tr>
27108 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27109 <td>135</td>
27110 <td>3</td>
27111 <td>J721E_DEV_R5FSS1_CORE0</td>
27112 <td>intr</td>
27113 <td>259</td>
27114 </tr>
27115 <tr class="row-odd"><td>&#160;</td>
27116 <td>&#160;</td>
27117 <td>&#160;</td>
27118 <td>J721E_DEV_R5FSS1_CORE1</td>
27119 <td>intr</td>
27120 <td>259</td>
27121 </tr>
27122 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27123 <td>135</td>
27124 <td>4</td>
27125 <td>J721E_DEV_R5FSS1_CORE0</td>
27126 <td>intr</td>
27127 <td>260</td>
27128 </tr>
27129 <tr class="row-odd"><td>&#160;</td>
27130 <td>&#160;</td>
27131 <td>&#160;</td>
27132 <td>J721E_DEV_R5FSS1_CORE1</td>
27133 <td>intr</td>
27134 <td>260</td>
27135 </tr>
27136 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27137 <td>135</td>
27138 <td>5</td>
27139 <td>J721E_DEV_R5FSS1_CORE0</td>
27140 <td>intr</td>
27141 <td>261</td>
27142 </tr>
27143 <tr class="row-odd"><td>&#160;</td>
27144 <td>&#160;</td>
27145 <td>&#160;</td>
27146 <td>J721E_DEV_R5FSS1_CORE1</td>
27147 <td>intr</td>
27148 <td>261</td>
27149 </tr>
27150 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27151 <td>135</td>
27152 <td>6</td>
27153 <td>J721E_DEV_R5FSS1_CORE0</td>
27154 <td>intr</td>
27155 <td>262</td>
27156 </tr>
27157 <tr class="row-odd"><td>&#160;</td>
27158 <td>&#160;</td>
27159 <td>&#160;</td>
27160 <td>J721E_DEV_R5FSS1_CORE1</td>
27161 <td>intr</td>
27162 <td>262</td>
27163 </tr>
27164 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27165 <td>135</td>
27166 <td>7</td>
27167 <td>J721E_DEV_R5FSS1_CORE0</td>
27168 <td>intr</td>
27169 <td>263</td>
27170 </tr>
27171 <tr class="row-odd"><td>&#160;</td>
27172 <td>&#160;</td>
27173 <td>&#160;</td>
27174 <td>J721E_DEV_R5FSS1_CORE1</td>
27175 <td>intr</td>
27176 <td>263</td>
27177 </tr>
27178 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27179 <td>135</td>
27180 <td>8</td>
27181 <td>J721E_DEV_R5FSS1_CORE0</td>
27182 <td>intr</td>
27183 <td>264</td>
27184 </tr>
27185 <tr class="row-odd"><td>&#160;</td>
27186 <td>&#160;</td>
27187 <td>&#160;</td>
27188 <td>J721E_DEV_R5FSS1_CORE1</td>
27189 <td>intr</td>
27190 <td>264</td>
27191 </tr>
27192 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27193 <td>135</td>
27194 <td>9</td>
27195 <td>J721E_DEV_R5FSS1_CORE0</td>
27196 <td>intr</td>
27197 <td>265</td>
27198 </tr>
27199 <tr class="row-odd"><td>&#160;</td>
27200 <td>&#160;</td>
27201 <td>&#160;</td>
27202 <td>J721E_DEV_R5FSS1_CORE1</td>
27203 <td>intr</td>
27204 <td>265</td>
27205 </tr>
27206 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27207 <td>135</td>
27208 <td>10</td>
27209 <td>J721E_DEV_R5FSS1_CORE0</td>
27210 <td>intr</td>
27211 <td>266</td>
27212 </tr>
27213 <tr class="row-odd"><td>&#160;</td>
27214 <td>&#160;</td>
27215 <td>&#160;</td>
27216 <td>J721E_DEV_R5FSS1_CORE1</td>
27217 <td>intr</td>
27218 <td>266</td>
27219 </tr>
27220 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27221 <td>135</td>
27222 <td>11</td>
27223 <td>J721E_DEV_R5FSS1_CORE0</td>
27224 <td>intr</td>
27225 <td>267</td>
27226 </tr>
27227 <tr class="row-odd"><td>&#160;</td>
27228 <td>&#160;</td>
27229 <td>&#160;</td>
27230 <td>J721E_DEV_R5FSS1_CORE1</td>
27231 <td>intr</td>
27232 <td>267</td>
27233 </tr>
27234 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27235 <td>135</td>
27236 <td>12</td>
27237 <td>J721E_DEV_R5FSS1_CORE0</td>
27238 <td>intr</td>
27239 <td>268</td>
27240 </tr>
27241 <tr class="row-odd"><td>&#160;</td>
27242 <td>&#160;</td>
27243 <td>&#160;</td>
27244 <td>J721E_DEV_R5FSS1_CORE1</td>
27245 <td>intr</td>
27246 <td>268</td>
27247 </tr>
27248 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27249 <td>135</td>
27250 <td>13</td>
27251 <td>J721E_DEV_R5FSS1_CORE0</td>
27252 <td>intr</td>
27253 <td>269</td>
27254 </tr>
27255 <tr class="row-odd"><td>&#160;</td>
27256 <td>&#160;</td>
27257 <td>&#160;</td>
27258 <td>J721E_DEV_R5FSS1_CORE1</td>
27259 <td>intr</td>
27260 <td>269</td>
27261 </tr>
27262 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27263 <td>135</td>
27264 <td>14</td>
27265 <td>J721E_DEV_R5FSS1_CORE0</td>
27266 <td>intr</td>
27267 <td>270</td>
27268 </tr>
27269 <tr class="row-odd"><td>&#160;</td>
27270 <td>&#160;</td>
27271 <td>&#160;</td>
27272 <td>J721E_DEV_R5FSS1_CORE1</td>
27273 <td>intr</td>
27274 <td>270</td>
27275 </tr>
27276 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27277 <td>135</td>
27278 <td>15</td>
27279 <td>J721E_DEV_R5FSS1_CORE0</td>
27280 <td>intr</td>
27281 <td>271</td>
27282 </tr>
27283 <tr class="row-odd"><td>&#160;</td>
27284 <td>&#160;</td>
27285 <td>&#160;</td>
27286 <td>J721E_DEV_R5FSS1_CORE1</td>
27287 <td>intr</td>
27288 <td>271</td>
27289 </tr>
27290 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27291 <td>135</td>
27292 <td>16</td>
27293 <td>J721E_DEV_R5FSS1_CORE0</td>
27294 <td>intr</td>
27295 <td>272</td>
27296 </tr>
27297 <tr class="row-odd"><td>&#160;</td>
27298 <td>&#160;</td>
27299 <td>&#160;</td>
27300 <td>J721E_DEV_R5FSS1_CORE1</td>
27301 <td>intr</td>
27302 <td>272</td>
27303 </tr>
27304 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27305 <td>135</td>
27306 <td>17</td>
27307 <td>J721E_DEV_R5FSS1_CORE0</td>
27308 <td>intr</td>
27309 <td>273</td>
27310 </tr>
27311 <tr class="row-odd"><td>&#160;</td>
27312 <td>&#160;</td>
27313 <td>&#160;</td>
27314 <td>J721E_DEV_R5FSS1_CORE1</td>
27315 <td>intr</td>
27316 <td>273</td>
27317 </tr>
27318 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27319 <td>135</td>
27320 <td>18</td>
27321 <td>J721E_DEV_R5FSS1_CORE0</td>
27322 <td>intr</td>
27323 <td>274</td>
27324 </tr>
27325 <tr class="row-odd"><td>&#160;</td>
27326 <td>&#160;</td>
27327 <td>&#160;</td>
27328 <td>J721E_DEV_R5FSS1_CORE1</td>
27329 <td>intr</td>
27330 <td>274</td>
27331 </tr>
27332 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27333 <td>135</td>
27334 <td>19</td>
27335 <td>J721E_DEV_R5FSS1_CORE0</td>
27336 <td>intr</td>
27337 <td>275</td>
27338 </tr>
27339 <tr class="row-odd"><td>&#160;</td>
27340 <td>&#160;</td>
27341 <td>&#160;</td>
27342 <td>J721E_DEV_R5FSS1_CORE1</td>
27343 <td>intr</td>
27344 <td>275</td>
27345 </tr>
27346 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27347 <td>135</td>
27348 <td>20</td>
27349 <td>J721E_DEV_R5FSS1_CORE0</td>
27350 <td>intr</td>
27351 <td>276</td>
27352 </tr>
27353 <tr class="row-odd"><td>&#160;</td>
27354 <td>&#160;</td>
27355 <td>&#160;</td>
27356 <td>J721E_DEV_R5FSS1_CORE1</td>
27357 <td>intr</td>
27358 <td>276</td>
27359 </tr>
27360 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27361 <td>135</td>
27362 <td>21</td>
27363 <td>J721E_DEV_R5FSS1_CORE0</td>
27364 <td>intr</td>
27365 <td>277</td>
27366 </tr>
27367 <tr class="row-odd"><td>&#160;</td>
27368 <td>&#160;</td>
27369 <td>&#160;</td>
27370 <td>J721E_DEV_R5FSS1_CORE1</td>
27371 <td>intr</td>
27372 <td>277</td>
27373 </tr>
27374 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27375 <td>135</td>
27376 <td>22</td>
27377 <td>J721E_DEV_R5FSS1_CORE0</td>
27378 <td>intr</td>
27379 <td>278</td>
27380 </tr>
27381 <tr class="row-odd"><td>&#160;</td>
27382 <td>&#160;</td>
27383 <td>&#160;</td>
27384 <td>J721E_DEV_R5FSS1_CORE1</td>
27385 <td>intr</td>
27386 <td>278</td>
27387 </tr>
27388 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27389 <td>135</td>
27390 <td>23</td>
27391 <td>J721E_DEV_R5FSS1_CORE0</td>
27392 <td>intr</td>
27393 <td>279</td>
27394 </tr>
27395 <tr class="row-odd"><td>&#160;</td>
27396 <td>&#160;</td>
27397 <td>&#160;</td>
27398 <td>J721E_DEV_R5FSS1_CORE1</td>
27399 <td>intr</td>
27400 <td>279</td>
27401 </tr>
27402 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27403 <td>135</td>
27404 <td>24</td>
27405 <td>J721E_DEV_R5FSS1_CORE0</td>
27406 <td>intr</td>
27407 <td>280</td>
27408 </tr>
27409 <tr class="row-odd"><td>&#160;</td>
27410 <td>&#160;</td>
27411 <td>&#160;</td>
27412 <td>J721E_DEV_R5FSS1_CORE1</td>
27413 <td>intr</td>
27414 <td>280</td>
27415 </tr>
27416 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27417 <td>135</td>
27418 <td>25</td>
27419 <td>J721E_DEV_R5FSS1_CORE0</td>
27420 <td>intr</td>
27421 <td>281</td>
27422 </tr>
27423 <tr class="row-odd"><td>&#160;</td>
27424 <td>&#160;</td>
27425 <td>&#160;</td>
27426 <td>J721E_DEV_R5FSS1_CORE1</td>
27427 <td>intr</td>
27428 <td>281</td>
27429 </tr>
27430 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27431 <td>135</td>
27432 <td>26</td>
27433 <td>J721E_DEV_R5FSS1_CORE0</td>
27434 <td>intr</td>
27435 <td>282</td>
27436 </tr>
27437 <tr class="row-odd"><td>&#160;</td>
27438 <td>&#160;</td>
27439 <td>&#160;</td>
27440 <td>J721E_DEV_R5FSS1_CORE1</td>
27441 <td>intr</td>
27442 <td>282</td>
27443 </tr>
27444 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27445 <td>135</td>
27446 <td>27</td>
27447 <td>J721E_DEV_R5FSS1_CORE0</td>
27448 <td>intr</td>
27449 <td>283</td>
27450 </tr>
27451 <tr class="row-odd"><td>&#160;</td>
27452 <td>&#160;</td>
27453 <td>&#160;</td>
27454 <td>J721E_DEV_R5FSS1_CORE1</td>
27455 <td>intr</td>
27456 <td>283</td>
27457 </tr>
27458 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27459 <td>135</td>
27460 <td>28</td>
27461 <td>J721E_DEV_R5FSS1_CORE0</td>
27462 <td>intr</td>
27463 <td>284</td>
27464 </tr>
27465 <tr class="row-odd"><td>&#160;</td>
27466 <td>&#160;</td>
27467 <td>&#160;</td>
27468 <td>J721E_DEV_R5FSS1_CORE1</td>
27469 <td>intr</td>
27470 <td>284</td>
27471 </tr>
27472 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27473 <td>135</td>
27474 <td>29</td>
27475 <td>J721E_DEV_R5FSS1_CORE0</td>
27476 <td>intr</td>
27477 <td>285</td>
27478 </tr>
27479 <tr class="row-odd"><td>&#160;</td>
27480 <td>&#160;</td>
27481 <td>&#160;</td>
27482 <td>J721E_DEV_R5FSS1_CORE1</td>
27483 <td>intr</td>
27484 <td>285</td>
27485 </tr>
27486 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27487 <td>135</td>
27488 <td>30</td>
27489 <td>J721E_DEV_R5FSS1_CORE0</td>
27490 <td>intr</td>
27491 <td>286</td>
27492 </tr>
27493 <tr class="row-odd"><td>&#160;</td>
27494 <td>&#160;</td>
27495 <td>&#160;</td>
27496 <td>J721E_DEV_R5FSS1_CORE1</td>
27497 <td>intr</td>
27498 <td>286</td>
27499 </tr>
27500 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27501 <td>135</td>
27502 <td>31</td>
27503 <td>J721E_DEV_R5FSS1_CORE0</td>
27504 <td>intr</td>
27505 <td>287</td>
27506 </tr>
27507 <tr class="row-odd"><td>&#160;</td>
27508 <td>&#160;</td>
27509 <td>&#160;</td>
27510 <td>J721E_DEV_R5FSS1_CORE1</td>
27511 <td>intr</td>
27512 <td>287</td>
27513 </tr>
27514 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27515 <td>135</td>
27516 <td>32</td>
27517 <td>J721E_DEV_R5FSS1_CORE0</td>
27518 <td>intr</td>
27519 <td>288</td>
27520 </tr>
27521 <tr class="row-odd"><td>&#160;</td>
27522 <td>&#160;</td>
27523 <td>&#160;</td>
27524 <td>J721E_DEV_R5FSS1_CORE1</td>
27525 <td>intr</td>
27526 <td>288</td>
27527 </tr>
27528 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27529 <td>135</td>
27530 <td>33</td>
27531 <td>J721E_DEV_R5FSS1_CORE0</td>
27532 <td>intr</td>
27533 <td>289</td>
27534 </tr>
27535 <tr class="row-odd"><td>&#160;</td>
27536 <td>&#160;</td>
27537 <td>&#160;</td>
27538 <td>J721E_DEV_R5FSS1_CORE1</td>
27539 <td>intr</td>
27540 <td>289</td>
27541 </tr>
27542 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27543 <td>135</td>
27544 <td>34</td>
27545 <td>J721E_DEV_R5FSS1_CORE0</td>
27546 <td>intr</td>
27547 <td>290</td>
27548 </tr>
27549 <tr class="row-odd"><td>&#160;</td>
27550 <td>&#160;</td>
27551 <td>&#160;</td>
27552 <td>J721E_DEV_R5FSS1_CORE1</td>
27553 <td>intr</td>
27554 <td>290</td>
27555 </tr>
27556 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27557 <td>135</td>
27558 <td>35</td>
27559 <td>J721E_DEV_R5FSS1_CORE0</td>
27560 <td>intr</td>
27561 <td>291</td>
27562 </tr>
27563 <tr class="row-odd"><td>&#160;</td>
27564 <td>&#160;</td>
27565 <td>&#160;</td>
27566 <td>J721E_DEV_R5FSS1_CORE1</td>
27567 <td>intr</td>
27568 <td>291</td>
27569 </tr>
27570 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27571 <td>135</td>
27572 <td>36</td>
27573 <td>J721E_DEV_R5FSS1_CORE0</td>
27574 <td>intr</td>
27575 <td>292</td>
27576 </tr>
27577 <tr class="row-odd"><td>&#160;</td>
27578 <td>&#160;</td>
27579 <td>&#160;</td>
27580 <td>J721E_DEV_R5FSS1_CORE1</td>
27581 <td>intr</td>
27582 <td>292</td>
27583 </tr>
27584 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27585 <td>135</td>
27586 <td>37</td>
27587 <td>J721E_DEV_R5FSS1_CORE0</td>
27588 <td>intr</td>
27589 <td>293</td>
27590 </tr>
27591 <tr class="row-odd"><td>&#160;</td>
27592 <td>&#160;</td>
27593 <td>&#160;</td>
27594 <td>J721E_DEV_R5FSS1_CORE1</td>
27595 <td>intr</td>
27596 <td>293</td>
27597 </tr>
27598 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27599 <td>135</td>
27600 <td>38</td>
27601 <td>J721E_DEV_R5FSS1_CORE0</td>
27602 <td>intr</td>
27603 <td>294</td>
27604 </tr>
27605 <tr class="row-odd"><td>&#160;</td>
27606 <td>&#160;</td>
27607 <td>&#160;</td>
27608 <td>J721E_DEV_R5FSS1_CORE1</td>
27609 <td>intr</td>
27610 <td>294</td>
27611 </tr>
27612 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27613 <td>135</td>
27614 <td>39</td>
27615 <td>J721E_DEV_R5FSS1_CORE0</td>
27616 <td>intr</td>
27617 <td>295</td>
27618 </tr>
27619 <tr class="row-odd"><td>&#160;</td>
27620 <td>&#160;</td>
27621 <td>&#160;</td>
27622 <td>J721E_DEV_R5FSS1_CORE1</td>
27623 <td>intr</td>
27624 <td>295</td>
27625 </tr>
27626 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27627 <td>135</td>
27628 <td>40</td>
27629 <td>J721E_DEV_R5FSS1_CORE0</td>
27630 <td>intr</td>
27631 <td>296</td>
27632 </tr>
27633 <tr class="row-odd"><td>&#160;</td>
27634 <td>&#160;</td>
27635 <td>&#160;</td>
27636 <td>J721E_DEV_R5FSS1_CORE1</td>
27637 <td>intr</td>
27638 <td>296</td>
27639 </tr>
27640 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27641 <td>135</td>
27642 <td>41</td>
27643 <td>J721E_DEV_R5FSS1_CORE0</td>
27644 <td>intr</td>
27645 <td>297</td>
27646 </tr>
27647 <tr class="row-odd"><td>&#160;</td>
27648 <td>&#160;</td>
27649 <td>&#160;</td>
27650 <td>J721E_DEV_R5FSS1_CORE1</td>
27651 <td>intr</td>
27652 <td>297</td>
27653 </tr>
27654 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27655 <td>135</td>
27656 <td>42</td>
27657 <td>J721E_DEV_R5FSS1_CORE0</td>
27658 <td>intr</td>
27659 <td>298</td>
27660 </tr>
27661 <tr class="row-odd"><td>&#160;</td>
27662 <td>&#160;</td>
27663 <td>&#160;</td>
27664 <td>J721E_DEV_R5FSS1_CORE1</td>
27665 <td>intr</td>
27666 <td>298</td>
27667 </tr>
27668 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27669 <td>135</td>
27670 <td>43</td>
27671 <td>J721E_DEV_R5FSS1_CORE0</td>
27672 <td>intr</td>
27673 <td>299</td>
27674 </tr>
27675 <tr class="row-odd"><td>&#160;</td>
27676 <td>&#160;</td>
27677 <td>&#160;</td>
27678 <td>J721E_DEV_R5FSS1_CORE1</td>
27679 <td>intr</td>
27680 <td>299</td>
27681 </tr>
27682 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27683 <td>135</td>
27684 <td>44</td>
27685 <td>J721E_DEV_R5FSS1_CORE0</td>
27686 <td>intr</td>
27687 <td>300</td>
27688 </tr>
27689 <tr class="row-odd"><td>&#160;</td>
27690 <td>&#160;</td>
27691 <td>&#160;</td>
27692 <td>J721E_DEV_R5FSS1_CORE1</td>
27693 <td>intr</td>
27694 <td>300</td>
27695 </tr>
27696 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27697 <td>135</td>
27698 <td>45</td>
27699 <td>J721E_DEV_R5FSS1_CORE0</td>
27700 <td>intr</td>
27701 <td>301</td>
27702 </tr>
27703 <tr class="row-odd"><td>&#160;</td>
27704 <td>&#160;</td>
27705 <td>&#160;</td>
27706 <td>J721E_DEV_R5FSS1_CORE1</td>
27707 <td>intr</td>
27708 <td>301</td>
27709 </tr>
27710 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27711 <td>135</td>
27712 <td>46</td>
27713 <td>J721E_DEV_R5FSS1_CORE0</td>
27714 <td>intr</td>
27715 <td>302</td>
27716 </tr>
27717 <tr class="row-odd"><td>&#160;</td>
27718 <td>&#160;</td>
27719 <td>&#160;</td>
27720 <td>J721E_DEV_R5FSS1_CORE1</td>
27721 <td>intr</td>
27722 <td>302</td>
27723 </tr>
27724 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27725 <td>135</td>
27726 <td>47</td>
27727 <td>J721E_DEV_R5FSS1_CORE0</td>
27728 <td>intr</td>
27729 <td>303</td>
27730 </tr>
27731 <tr class="row-odd"><td>&#160;</td>
27732 <td>&#160;</td>
27733 <td>&#160;</td>
27734 <td>J721E_DEV_R5FSS1_CORE1</td>
27735 <td>intr</td>
27736 <td>303</td>
27737 </tr>
27738 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27739 <td>135</td>
27740 <td>48</td>
27741 <td>J721E_DEV_R5FSS1_CORE0</td>
27742 <td>intr</td>
27743 <td>304</td>
27744 </tr>
27745 <tr class="row-odd"><td>&#160;</td>
27746 <td>&#160;</td>
27747 <td>&#160;</td>
27748 <td>J721E_DEV_R5FSS1_CORE1</td>
27749 <td>intr</td>
27750 <td>304</td>
27751 </tr>
27752 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27753 <td>135</td>
27754 <td>49</td>
27755 <td>J721E_DEV_R5FSS1_CORE0</td>
27756 <td>intr</td>
27757 <td>305</td>
27758 </tr>
27759 <tr class="row-odd"><td>&#160;</td>
27760 <td>&#160;</td>
27761 <td>&#160;</td>
27762 <td>J721E_DEV_R5FSS1_CORE1</td>
27763 <td>intr</td>
27764 <td>305</td>
27765 </tr>
27766 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27767 <td>135</td>
27768 <td>50</td>
27769 <td>J721E_DEV_R5FSS1_CORE0</td>
27770 <td>intr</td>
27771 <td>306</td>
27772 </tr>
27773 <tr class="row-odd"><td>&#160;</td>
27774 <td>&#160;</td>
27775 <td>&#160;</td>
27776 <td>J721E_DEV_R5FSS1_CORE1</td>
27777 <td>intr</td>
27778 <td>306</td>
27779 </tr>
27780 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27781 <td>135</td>
27782 <td>51</td>
27783 <td>J721E_DEV_R5FSS1_CORE0</td>
27784 <td>intr</td>
27785 <td>307</td>
27786 </tr>
27787 <tr class="row-odd"><td>&#160;</td>
27788 <td>&#160;</td>
27789 <td>&#160;</td>
27790 <td>J721E_DEV_R5FSS1_CORE1</td>
27791 <td>intr</td>
27792 <td>307</td>
27793 </tr>
27794 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27795 <td>135</td>
27796 <td>52</td>
27797 <td>J721E_DEV_R5FSS1_CORE0</td>
27798 <td>intr</td>
27799 <td>308</td>
27800 </tr>
27801 <tr class="row-odd"><td>&#160;</td>
27802 <td>&#160;</td>
27803 <td>&#160;</td>
27804 <td>J721E_DEV_R5FSS1_CORE1</td>
27805 <td>intr</td>
27806 <td>308</td>
27807 </tr>
27808 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27809 <td>135</td>
27810 <td>53</td>
27811 <td>J721E_DEV_R5FSS1_CORE0</td>
27812 <td>intr</td>
27813 <td>309</td>
27814 </tr>
27815 <tr class="row-odd"><td>&#160;</td>
27816 <td>&#160;</td>
27817 <td>&#160;</td>
27818 <td>J721E_DEV_R5FSS1_CORE1</td>
27819 <td>intr</td>
27820 <td>309</td>
27821 </tr>
27822 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27823 <td>135</td>
27824 <td>54</td>
27825 <td>J721E_DEV_R5FSS1_CORE0</td>
27826 <td>intr</td>
27827 <td>310</td>
27828 </tr>
27829 <tr class="row-odd"><td>&#160;</td>
27830 <td>&#160;</td>
27831 <td>&#160;</td>
27832 <td>J721E_DEV_R5FSS1_CORE1</td>
27833 <td>intr</td>
27834 <td>310</td>
27835 </tr>
27836 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27837 <td>135</td>
27838 <td>55</td>
27839 <td>J721E_DEV_R5FSS1_CORE0</td>
27840 <td>intr</td>
27841 <td>311</td>
27842 </tr>
27843 <tr class="row-odd"><td>&#160;</td>
27844 <td>&#160;</td>
27845 <td>&#160;</td>
27846 <td>J721E_DEV_R5FSS1_CORE1</td>
27847 <td>intr</td>
27848 <td>311</td>
27849 </tr>
27850 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27851 <td>135</td>
27852 <td>56</td>
27853 <td>J721E_DEV_R5FSS1_CORE0</td>
27854 <td>intr</td>
27855 <td>312</td>
27856 </tr>
27857 <tr class="row-odd"><td>&#160;</td>
27858 <td>&#160;</td>
27859 <td>&#160;</td>
27860 <td>J721E_DEV_R5FSS1_CORE1</td>
27861 <td>intr</td>
27862 <td>312</td>
27863 </tr>
27864 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27865 <td>135</td>
27866 <td>57</td>
27867 <td>J721E_DEV_R5FSS1_CORE0</td>
27868 <td>intr</td>
27869 <td>313</td>
27870 </tr>
27871 <tr class="row-odd"><td>&#160;</td>
27872 <td>&#160;</td>
27873 <td>&#160;</td>
27874 <td>J721E_DEV_R5FSS1_CORE1</td>
27875 <td>intr</td>
27876 <td>313</td>
27877 </tr>
27878 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27879 <td>135</td>
27880 <td>58</td>
27881 <td>J721E_DEV_R5FSS1_CORE0</td>
27882 <td>intr</td>
27883 <td>314</td>
27884 </tr>
27885 <tr class="row-odd"><td>&#160;</td>
27886 <td>&#160;</td>
27887 <td>&#160;</td>
27888 <td>J721E_DEV_R5FSS1_CORE1</td>
27889 <td>intr</td>
27890 <td>314</td>
27891 </tr>
27892 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27893 <td>135</td>
27894 <td>59</td>
27895 <td>J721E_DEV_R5FSS1_CORE0</td>
27896 <td>intr</td>
27897 <td>315</td>
27898 </tr>
27899 <tr class="row-odd"><td>&#160;</td>
27900 <td>&#160;</td>
27901 <td>&#160;</td>
27902 <td>J721E_DEV_R5FSS1_CORE1</td>
27903 <td>intr</td>
27904 <td>315</td>
27905 </tr>
27906 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27907 <td>135</td>
27908 <td>60</td>
27909 <td>J721E_DEV_R5FSS1_CORE0</td>
27910 <td>intr</td>
27911 <td>316</td>
27912 </tr>
27913 <tr class="row-odd"><td>&#160;</td>
27914 <td>&#160;</td>
27915 <td>&#160;</td>
27916 <td>J721E_DEV_R5FSS1_CORE1</td>
27917 <td>intr</td>
27918 <td>316</td>
27919 </tr>
27920 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27921 <td>135</td>
27922 <td>61</td>
27923 <td>J721E_DEV_R5FSS1_CORE0</td>
27924 <td>intr</td>
27925 <td>317</td>
27926 </tr>
27927 <tr class="row-odd"><td>&#160;</td>
27928 <td>&#160;</td>
27929 <td>&#160;</td>
27930 <td>J721E_DEV_R5FSS1_CORE1</td>
27931 <td>intr</td>
27932 <td>317</td>
27933 </tr>
27934 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27935 <td>135</td>
27936 <td>62</td>
27937 <td>J721E_DEV_R5FSS1_CORE0</td>
27938 <td>intr</td>
27939 <td>318</td>
27940 </tr>
27941 <tr class="row-odd"><td>&#160;</td>
27942 <td>&#160;</td>
27943 <td>&#160;</td>
27944 <td>J721E_DEV_R5FSS1_CORE1</td>
27945 <td>intr</td>
27946 <td>318</td>
27947 </tr>
27948 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27949 <td>135</td>
27950 <td>63</td>
27951 <td>J721E_DEV_R5FSS1_CORE0</td>
27952 <td>intr</td>
27953 <td>319</td>
27954 </tr>
27955 <tr class="row-odd"><td>&#160;</td>
27956 <td>&#160;</td>
27957 <td>&#160;</td>
27958 <td>J721E_DEV_R5FSS1_CORE1</td>
27959 <td>intr</td>
27960 <td>319</td>
27961 </tr>
27962 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27963 <td>135</td>
27964 <td>64</td>
27965 <td>J721E_DEV_R5FSS1_CORE0</td>
27966 <td>intr</td>
27967 <td>320</td>
27968 </tr>
27969 <tr class="row-odd"><td>&#160;</td>
27970 <td>&#160;</td>
27971 <td>&#160;</td>
27972 <td>J721E_DEV_R5FSS1_CORE1</td>
27973 <td>intr</td>
27974 <td>320</td>
27975 </tr>
27976 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27977 <td>135</td>
27978 <td>65</td>
27979 <td>J721E_DEV_R5FSS1_CORE0</td>
27980 <td>intr</td>
27981 <td>321</td>
27982 </tr>
27983 <tr class="row-odd"><td>&#160;</td>
27984 <td>&#160;</td>
27985 <td>&#160;</td>
27986 <td>J721E_DEV_R5FSS1_CORE1</td>
27987 <td>intr</td>
27988 <td>321</td>
27989 </tr>
27990 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
27991 <td>135</td>
27992 <td>66</td>
27993 <td>J721E_DEV_R5FSS1_CORE0</td>
27994 <td>intr</td>
27995 <td>322</td>
27996 </tr>
27997 <tr class="row-odd"><td>&#160;</td>
27998 <td>&#160;</td>
27999 <td>&#160;</td>
28000 <td>J721E_DEV_R5FSS1_CORE1</td>
28001 <td>intr</td>
28002 <td>322</td>
28003 </tr>
28004 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28005 <td>135</td>
28006 <td>67</td>
28007 <td>J721E_DEV_R5FSS1_CORE0</td>
28008 <td>intr</td>
28009 <td>323</td>
28010 </tr>
28011 <tr class="row-odd"><td>&#160;</td>
28012 <td>&#160;</td>
28013 <td>&#160;</td>
28014 <td>J721E_DEV_R5FSS1_CORE1</td>
28015 <td>intr</td>
28016 <td>323</td>
28017 </tr>
28018 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28019 <td>135</td>
28020 <td>68</td>
28021 <td>J721E_DEV_R5FSS1_CORE0</td>
28022 <td>intr</td>
28023 <td>324</td>
28024 </tr>
28025 <tr class="row-odd"><td>&#160;</td>
28026 <td>&#160;</td>
28027 <td>&#160;</td>
28028 <td>J721E_DEV_R5FSS1_CORE1</td>
28029 <td>intr</td>
28030 <td>324</td>
28031 </tr>
28032 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28033 <td>135</td>
28034 <td>69</td>
28035 <td>J721E_DEV_R5FSS1_CORE0</td>
28036 <td>intr</td>
28037 <td>325</td>
28038 </tr>
28039 <tr class="row-odd"><td>&#160;</td>
28040 <td>&#160;</td>
28041 <td>&#160;</td>
28042 <td>J721E_DEV_R5FSS1_CORE1</td>
28043 <td>intr</td>
28044 <td>325</td>
28045 </tr>
28046 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28047 <td>135</td>
28048 <td>70</td>
28049 <td>J721E_DEV_R5FSS1_CORE0</td>
28050 <td>intr</td>
28051 <td>326</td>
28052 </tr>
28053 <tr class="row-odd"><td>&#160;</td>
28054 <td>&#160;</td>
28055 <td>&#160;</td>
28056 <td>J721E_DEV_R5FSS1_CORE1</td>
28057 <td>intr</td>
28058 <td>326</td>
28059 </tr>
28060 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28061 <td>135</td>
28062 <td>71</td>
28063 <td>J721E_DEV_R5FSS1_CORE0</td>
28064 <td>intr</td>
28065 <td>327</td>
28066 </tr>
28067 <tr class="row-odd"><td>&#160;</td>
28068 <td>&#160;</td>
28069 <td>&#160;</td>
28070 <td>J721E_DEV_R5FSS1_CORE1</td>
28071 <td>intr</td>
28072 <td>327</td>
28073 </tr>
28074 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28075 <td>135</td>
28076 <td>72</td>
28077 <td>J721E_DEV_R5FSS1_CORE0</td>
28078 <td>intr</td>
28079 <td>328</td>
28080 </tr>
28081 <tr class="row-odd"><td>&#160;</td>
28082 <td>&#160;</td>
28083 <td>&#160;</td>
28084 <td>J721E_DEV_R5FSS1_CORE1</td>
28085 <td>intr</td>
28086 <td>328</td>
28087 </tr>
28088 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28089 <td>135</td>
28090 <td>73</td>
28091 <td>J721E_DEV_R5FSS1_CORE0</td>
28092 <td>intr</td>
28093 <td>329</td>
28094 </tr>
28095 <tr class="row-odd"><td>&#160;</td>
28096 <td>&#160;</td>
28097 <td>&#160;</td>
28098 <td>J721E_DEV_R5FSS1_CORE1</td>
28099 <td>intr</td>
28100 <td>329</td>
28101 </tr>
28102 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28103 <td>135</td>
28104 <td>74</td>
28105 <td>J721E_DEV_R5FSS1_CORE0</td>
28106 <td>intr</td>
28107 <td>330</td>
28108 </tr>
28109 <tr class="row-odd"><td>&#160;</td>
28110 <td>&#160;</td>
28111 <td>&#160;</td>
28112 <td>J721E_DEV_R5FSS1_CORE1</td>
28113 <td>intr</td>
28114 <td>330</td>
28115 </tr>
28116 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28117 <td>135</td>
28118 <td>75</td>
28119 <td>J721E_DEV_R5FSS1_CORE0</td>
28120 <td>intr</td>
28121 <td>331</td>
28122 </tr>
28123 <tr class="row-odd"><td>&#160;</td>
28124 <td>&#160;</td>
28125 <td>&#160;</td>
28126 <td>J721E_DEV_R5FSS1_CORE1</td>
28127 <td>intr</td>
28128 <td>331</td>
28129 </tr>
28130 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28131 <td>135</td>
28132 <td>76</td>
28133 <td>J721E_DEV_R5FSS1_CORE0</td>
28134 <td>intr</td>
28135 <td>332</td>
28136 </tr>
28137 <tr class="row-odd"><td>&#160;</td>
28138 <td>&#160;</td>
28139 <td>&#160;</td>
28140 <td>J721E_DEV_R5FSS1_CORE1</td>
28141 <td>intr</td>
28142 <td>332</td>
28143 </tr>
28144 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28145 <td>135</td>
28146 <td>77</td>
28147 <td>J721E_DEV_R5FSS1_CORE0</td>
28148 <td>intr</td>
28149 <td>333</td>
28150 </tr>
28151 <tr class="row-odd"><td>&#160;</td>
28152 <td>&#160;</td>
28153 <td>&#160;</td>
28154 <td>J721E_DEV_R5FSS1_CORE1</td>
28155 <td>intr</td>
28156 <td>333</td>
28157 </tr>
28158 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28159 <td>135</td>
28160 <td>78</td>
28161 <td>J721E_DEV_R5FSS1_CORE0</td>
28162 <td>intr</td>
28163 <td>334</td>
28164 </tr>
28165 <tr class="row-odd"><td>&#160;</td>
28166 <td>&#160;</td>
28167 <td>&#160;</td>
28168 <td>J721E_DEV_R5FSS1_CORE1</td>
28169 <td>intr</td>
28170 <td>334</td>
28171 </tr>
28172 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28173 <td>135</td>
28174 <td>79</td>
28175 <td>J721E_DEV_R5FSS1_CORE0</td>
28176 <td>intr</td>
28177 <td>335</td>
28178 </tr>
28179 <tr class="row-odd"><td>&#160;</td>
28180 <td>&#160;</td>
28181 <td>&#160;</td>
28182 <td>J721E_DEV_R5FSS1_CORE1</td>
28183 <td>intr</td>
28184 <td>335</td>
28185 </tr>
28186 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28187 <td>135</td>
28188 <td>80</td>
28189 <td>J721E_DEV_R5FSS1_CORE0</td>
28190 <td>intr</td>
28191 <td>336</td>
28192 </tr>
28193 <tr class="row-odd"><td>&#160;</td>
28194 <td>&#160;</td>
28195 <td>&#160;</td>
28196 <td>J721E_DEV_R5FSS1_CORE1</td>
28197 <td>intr</td>
28198 <td>336</td>
28199 </tr>
28200 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28201 <td>135</td>
28202 <td>81</td>
28203 <td>J721E_DEV_R5FSS1_CORE0</td>
28204 <td>intr</td>
28205 <td>337</td>
28206 </tr>
28207 <tr class="row-odd"><td>&#160;</td>
28208 <td>&#160;</td>
28209 <td>&#160;</td>
28210 <td>J721E_DEV_R5FSS1_CORE1</td>
28211 <td>intr</td>
28212 <td>337</td>
28213 </tr>
28214 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28215 <td>135</td>
28216 <td>82</td>
28217 <td>J721E_DEV_R5FSS1_CORE0</td>
28218 <td>intr</td>
28219 <td>338</td>
28220 </tr>
28221 <tr class="row-odd"><td>&#160;</td>
28222 <td>&#160;</td>
28223 <td>&#160;</td>
28224 <td>J721E_DEV_R5FSS1_CORE1</td>
28225 <td>intr</td>
28226 <td>338</td>
28227 </tr>
28228 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28229 <td>135</td>
28230 <td>83</td>
28231 <td>J721E_DEV_R5FSS1_CORE0</td>
28232 <td>intr</td>
28233 <td>339</td>
28234 </tr>
28235 <tr class="row-odd"><td>&#160;</td>
28236 <td>&#160;</td>
28237 <td>&#160;</td>
28238 <td>J721E_DEV_R5FSS1_CORE1</td>
28239 <td>intr</td>
28240 <td>339</td>
28241 </tr>
28242 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28243 <td>135</td>
28244 <td>84</td>
28245 <td>J721E_DEV_R5FSS1_CORE0</td>
28246 <td>intr</td>
28247 <td>340</td>
28248 </tr>
28249 <tr class="row-odd"><td>&#160;</td>
28250 <td>&#160;</td>
28251 <td>&#160;</td>
28252 <td>J721E_DEV_R5FSS1_CORE1</td>
28253 <td>intr</td>
28254 <td>340</td>
28255 </tr>
28256 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28257 <td>135</td>
28258 <td>85</td>
28259 <td>J721E_DEV_R5FSS1_CORE0</td>
28260 <td>intr</td>
28261 <td>341</td>
28262 </tr>
28263 <tr class="row-odd"><td>&#160;</td>
28264 <td>&#160;</td>
28265 <td>&#160;</td>
28266 <td>J721E_DEV_R5FSS1_CORE1</td>
28267 <td>intr</td>
28268 <td>341</td>
28269 </tr>
28270 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28271 <td>135</td>
28272 <td>86</td>
28273 <td>J721E_DEV_R5FSS1_CORE0</td>
28274 <td>intr</td>
28275 <td>342</td>
28276 </tr>
28277 <tr class="row-odd"><td>&#160;</td>
28278 <td>&#160;</td>
28279 <td>&#160;</td>
28280 <td>J721E_DEV_R5FSS1_CORE1</td>
28281 <td>intr</td>
28282 <td>342</td>
28283 </tr>
28284 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28285 <td>135</td>
28286 <td>87</td>
28287 <td>J721E_DEV_R5FSS1_CORE0</td>
28288 <td>intr</td>
28289 <td>343</td>
28290 </tr>
28291 <tr class="row-odd"><td>&#160;</td>
28292 <td>&#160;</td>
28293 <td>&#160;</td>
28294 <td>J721E_DEV_R5FSS1_CORE1</td>
28295 <td>intr</td>
28296 <td>343</td>
28297 </tr>
28298 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28299 <td>135</td>
28300 <td>88</td>
28301 <td>J721E_DEV_R5FSS1_CORE0</td>
28302 <td>intr</td>
28303 <td>344</td>
28304 </tr>
28305 <tr class="row-odd"><td>&#160;</td>
28306 <td>&#160;</td>
28307 <td>&#160;</td>
28308 <td>J721E_DEV_R5FSS1_CORE1</td>
28309 <td>intr</td>
28310 <td>344</td>
28311 </tr>
28312 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28313 <td>135</td>
28314 <td>89</td>
28315 <td>J721E_DEV_R5FSS1_CORE0</td>
28316 <td>intr</td>
28317 <td>345</td>
28318 </tr>
28319 <tr class="row-odd"><td>&#160;</td>
28320 <td>&#160;</td>
28321 <td>&#160;</td>
28322 <td>J721E_DEV_R5FSS1_CORE1</td>
28323 <td>intr</td>
28324 <td>345</td>
28325 </tr>
28326 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28327 <td>135</td>
28328 <td>90</td>
28329 <td>J721E_DEV_R5FSS1_CORE0</td>
28330 <td>intr</td>
28331 <td>346</td>
28332 </tr>
28333 <tr class="row-odd"><td>&#160;</td>
28334 <td>&#160;</td>
28335 <td>&#160;</td>
28336 <td>J721E_DEV_R5FSS1_CORE1</td>
28337 <td>intr</td>
28338 <td>346</td>
28339 </tr>
28340 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28341 <td>135</td>
28342 <td>91</td>
28343 <td>J721E_DEV_R5FSS1_CORE0</td>
28344 <td>intr</td>
28345 <td>347</td>
28346 </tr>
28347 <tr class="row-odd"><td>&#160;</td>
28348 <td>&#160;</td>
28349 <td>&#160;</td>
28350 <td>J721E_DEV_R5FSS1_CORE1</td>
28351 <td>intr</td>
28352 <td>347</td>
28353 </tr>
28354 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28355 <td>135</td>
28356 <td>92</td>
28357 <td>J721E_DEV_R5FSS1_CORE0</td>
28358 <td>intr</td>
28359 <td>348</td>
28360 </tr>
28361 <tr class="row-odd"><td>&#160;</td>
28362 <td>&#160;</td>
28363 <td>&#160;</td>
28364 <td>J721E_DEV_R5FSS1_CORE1</td>
28365 <td>intr</td>
28366 <td>348</td>
28367 </tr>
28368 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28369 <td>135</td>
28370 <td>93</td>
28371 <td>J721E_DEV_R5FSS1_CORE0</td>
28372 <td>intr</td>
28373 <td>349</td>
28374 </tr>
28375 <tr class="row-odd"><td>&#160;</td>
28376 <td>&#160;</td>
28377 <td>&#160;</td>
28378 <td>J721E_DEV_R5FSS1_CORE1</td>
28379 <td>intr</td>
28380 <td>349</td>
28381 </tr>
28382 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28383 <td>135</td>
28384 <td>94</td>
28385 <td>J721E_DEV_R5FSS1_CORE0</td>
28386 <td>intr</td>
28387 <td>350</td>
28388 </tr>
28389 <tr class="row-odd"><td>&#160;</td>
28390 <td>&#160;</td>
28391 <td>&#160;</td>
28392 <td>J721E_DEV_R5FSS1_CORE1</td>
28393 <td>intr</td>
28394 <td>350</td>
28395 </tr>
28396 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28397 <td>135</td>
28398 <td>95</td>
28399 <td>J721E_DEV_R5FSS1_CORE0</td>
28400 <td>intr</td>
28401 <td>351</td>
28402 </tr>
28403 <tr class="row-odd"><td>&#160;</td>
28404 <td>&#160;</td>
28405 <td>&#160;</td>
28406 <td>J721E_DEV_R5FSS1_CORE1</td>
28407 <td>intr</td>
28408 <td>351</td>
28409 </tr>
28410 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28411 <td>135</td>
28412 <td>96</td>
28413 <td>J721E_DEV_R5FSS1_CORE0</td>
28414 <td>intr</td>
28415 <td>352</td>
28416 </tr>
28417 <tr class="row-odd"><td>&#160;</td>
28418 <td>&#160;</td>
28419 <td>&#160;</td>
28420 <td>J721E_DEV_R5FSS1_CORE1</td>
28421 <td>intr</td>
28422 <td>352</td>
28423 </tr>
28424 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28425 <td>135</td>
28426 <td>97</td>
28427 <td>J721E_DEV_R5FSS1_CORE0</td>
28428 <td>intr</td>
28429 <td>353</td>
28430 </tr>
28431 <tr class="row-odd"><td>&#160;</td>
28432 <td>&#160;</td>
28433 <td>&#160;</td>
28434 <td>J721E_DEV_R5FSS1_CORE1</td>
28435 <td>intr</td>
28436 <td>353</td>
28437 </tr>
28438 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28439 <td>135</td>
28440 <td>98</td>
28441 <td>J721E_DEV_R5FSS1_CORE0</td>
28442 <td>intr</td>
28443 <td>354</td>
28444 </tr>
28445 <tr class="row-odd"><td>&#160;</td>
28446 <td>&#160;</td>
28447 <td>&#160;</td>
28448 <td>J721E_DEV_R5FSS1_CORE1</td>
28449 <td>intr</td>
28450 <td>354</td>
28451 </tr>
28452 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28453 <td>135</td>
28454 <td>99</td>
28455 <td>J721E_DEV_R5FSS1_CORE0</td>
28456 <td>intr</td>
28457 <td>355</td>
28458 </tr>
28459 <tr class="row-odd"><td>&#160;</td>
28460 <td>&#160;</td>
28461 <td>&#160;</td>
28462 <td>J721E_DEV_R5FSS1_CORE1</td>
28463 <td>intr</td>
28464 <td>355</td>
28465 </tr>
28466 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28467 <td>135</td>
28468 <td>100</td>
28469 <td>J721E_DEV_R5FSS1_CORE0</td>
28470 <td>intr</td>
28471 <td>356</td>
28472 </tr>
28473 <tr class="row-odd"><td>&#160;</td>
28474 <td>&#160;</td>
28475 <td>&#160;</td>
28476 <td>J721E_DEV_R5FSS1_CORE1</td>
28477 <td>intr</td>
28478 <td>356</td>
28479 </tr>
28480 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28481 <td>135</td>
28482 <td>101</td>
28483 <td>J721E_DEV_R5FSS1_CORE0</td>
28484 <td>intr</td>
28485 <td>357</td>
28486 </tr>
28487 <tr class="row-odd"><td>&#160;</td>
28488 <td>&#160;</td>
28489 <td>&#160;</td>
28490 <td>J721E_DEV_R5FSS1_CORE1</td>
28491 <td>intr</td>
28492 <td>357</td>
28493 </tr>
28494 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28495 <td>135</td>
28496 <td>102</td>
28497 <td>J721E_DEV_R5FSS1_CORE0</td>
28498 <td>intr</td>
28499 <td>358</td>
28500 </tr>
28501 <tr class="row-odd"><td>&#160;</td>
28502 <td>&#160;</td>
28503 <td>&#160;</td>
28504 <td>J721E_DEV_R5FSS1_CORE1</td>
28505 <td>intr</td>
28506 <td>358</td>
28507 </tr>
28508 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28509 <td>135</td>
28510 <td>103</td>
28511 <td>J721E_DEV_R5FSS1_CORE0</td>
28512 <td>intr</td>
28513 <td>359</td>
28514 </tr>
28515 <tr class="row-odd"><td>&#160;</td>
28516 <td>&#160;</td>
28517 <td>&#160;</td>
28518 <td>J721E_DEV_R5FSS1_CORE1</td>
28519 <td>intr</td>
28520 <td>359</td>
28521 </tr>
28522 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28523 <td>135</td>
28524 <td>104</td>
28525 <td>J721E_DEV_R5FSS1_CORE0</td>
28526 <td>intr</td>
28527 <td>360</td>
28528 </tr>
28529 <tr class="row-odd"><td>&#160;</td>
28530 <td>&#160;</td>
28531 <td>&#160;</td>
28532 <td>J721E_DEV_R5FSS1_CORE1</td>
28533 <td>intr</td>
28534 <td>360</td>
28535 </tr>
28536 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28537 <td>135</td>
28538 <td>105</td>
28539 <td>J721E_DEV_R5FSS1_CORE0</td>
28540 <td>intr</td>
28541 <td>361</td>
28542 </tr>
28543 <tr class="row-odd"><td>&#160;</td>
28544 <td>&#160;</td>
28545 <td>&#160;</td>
28546 <td>J721E_DEV_R5FSS1_CORE1</td>
28547 <td>intr</td>
28548 <td>361</td>
28549 </tr>
28550 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28551 <td>135</td>
28552 <td>106</td>
28553 <td>J721E_DEV_R5FSS1_CORE0</td>
28554 <td>intr</td>
28555 <td>362</td>
28556 </tr>
28557 <tr class="row-odd"><td>&#160;</td>
28558 <td>&#160;</td>
28559 <td>&#160;</td>
28560 <td>J721E_DEV_R5FSS1_CORE1</td>
28561 <td>intr</td>
28562 <td>362</td>
28563 </tr>
28564 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28565 <td>135</td>
28566 <td>107</td>
28567 <td>J721E_DEV_R5FSS1_CORE0</td>
28568 <td>intr</td>
28569 <td>363</td>
28570 </tr>
28571 <tr class="row-odd"><td>&#160;</td>
28572 <td>&#160;</td>
28573 <td>&#160;</td>
28574 <td>J721E_DEV_R5FSS1_CORE1</td>
28575 <td>intr</td>
28576 <td>363</td>
28577 </tr>
28578 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28579 <td>135</td>
28580 <td>108</td>
28581 <td>J721E_DEV_R5FSS1_CORE0</td>
28582 <td>intr</td>
28583 <td>364</td>
28584 </tr>
28585 <tr class="row-odd"><td>&#160;</td>
28586 <td>&#160;</td>
28587 <td>&#160;</td>
28588 <td>J721E_DEV_R5FSS1_CORE1</td>
28589 <td>intr</td>
28590 <td>364</td>
28591 </tr>
28592 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28593 <td>135</td>
28594 <td>109</td>
28595 <td>J721E_DEV_R5FSS1_CORE0</td>
28596 <td>intr</td>
28597 <td>365</td>
28598 </tr>
28599 <tr class="row-odd"><td>&#160;</td>
28600 <td>&#160;</td>
28601 <td>&#160;</td>
28602 <td>J721E_DEV_R5FSS1_CORE1</td>
28603 <td>intr</td>
28604 <td>365</td>
28605 </tr>
28606 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28607 <td>135</td>
28608 <td>110</td>
28609 <td>J721E_DEV_R5FSS1_CORE0</td>
28610 <td>intr</td>
28611 <td>366</td>
28612 </tr>
28613 <tr class="row-odd"><td>&#160;</td>
28614 <td>&#160;</td>
28615 <td>&#160;</td>
28616 <td>J721E_DEV_R5FSS1_CORE1</td>
28617 <td>intr</td>
28618 <td>366</td>
28619 </tr>
28620 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28621 <td>135</td>
28622 <td>111</td>
28623 <td>J721E_DEV_R5FSS1_CORE0</td>
28624 <td>intr</td>
28625 <td>367</td>
28626 </tr>
28627 <tr class="row-odd"><td>&#160;</td>
28628 <td>&#160;</td>
28629 <td>&#160;</td>
28630 <td>J721E_DEV_R5FSS1_CORE1</td>
28631 <td>intr</td>
28632 <td>367</td>
28633 </tr>
28634 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28635 <td>135</td>
28636 <td>112</td>
28637 <td>J721E_DEV_R5FSS1_CORE0</td>
28638 <td>intr</td>
28639 <td>368</td>
28640 </tr>
28641 <tr class="row-odd"><td>&#160;</td>
28642 <td>&#160;</td>
28643 <td>&#160;</td>
28644 <td>J721E_DEV_R5FSS1_CORE1</td>
28645 <td>intr</td>
28646 <td>368</td>
28647 </tr>
28648 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28649 <td>135</td>
28650 <td>113</td>
28651 <td>J721E_DEV_R5FSS1_CORE0</td>
28652 <td>intr</td>
28653 <td>369</td>
28654 </tr>
28655 <tr class="row-odd"><td>&#160;</td>
28656 <td>&#160;</td>
28657 <td>&#160;</td>
28658 <td>J721E_DEV_R5FSS1_CORE1</td>
28659 <td>intr</td>
28660 <td>369</td>
28661 </tr>
28662 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28663 <td>135</td>
28664 <td>114</td>
28665 <td>J721E_DEV_R5FSS1_CORE0</td>
28666 <td>intr</td>
28667 <td>370</td>
28668 </tr>
28669 <tr class="row-odd"><td>&#160;</td>
28670 <td>&#160;</td>
28671 <td>&#160;</td>
28672 <td>J721E_DEV_R5FSS1_CORE1</td>
28673 <td>intr</td>
28674 <td>370</td>
28675 </tr>
28676 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28677 <td>135</td>
28678 <td>115</td>
28679 <td>J721E_DEV_R5FSS1_CORE0</td>
28680 <td>intr</td>
28681 <td>371</td>
28682 </tr>
28683 <tr class="row-odd"><td>&#160;</td>
28684 <td>&#160;</td>
28685 <td>&#160;</td>
28686 <td>J721E_DEV_R5FSS1_CORE1</td>
28687 <td>intr</td>
28688 <td>371</td>
28689 </tr>
28690 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28691 <td>135</td>
28692 <td>116</td>
28693 <td>J721E_DEV_R5FSS1_CORE0</td>
28694 <td>intr</td>
28695 <td>372</td>
28696 </tr>
28697 <tr class="row-odd"><td>&#160;</td>
28698 <td>&#160;</td>
28699 <td>&#160;</td>
28700 <td>J721E_DEV_R5FSS1_CORE1</td>
28701 <td>intr</td>
28702 <td>372</td>
28703 </tr>
28704 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28705 <td>135</td>
28706 <td>117</td>
28707 <td>J721E_DEV_R5FSS1_CORE0</td>
28708 <td>intr</td>
28709 <td>373</td>
28710 </tr>
28711 <tr class="row-odd"><td>&#160;</td>
28712 <td>&#160;</td>
28713 <td>&#160;</td>
28714 <td>J721E_DEV_R5FSS1_CORE1</td>
28715 <td>intr</td>
28716 <td>373</td>
28717 </tr>
28718 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28719 <td>135</td>
28720 <td>118</td>
28721 <td>J721E_DEV_R5FSS1_CORE0</td>
28722 <td>intr</td>
28723 <td>374</td>
28724 </tr>
28725 <tr class="row-odd"><td>&#160;</td>
28726 <td>&#160;</td>
28727 <td>&#160;</td>
28728 <td>J721E_DEV_R5FSS1_CORE1</td>
28729 <td>intr</td>
28730 <td>374</td>
28731 </tr>
28732 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28733 <td>135</td>
28734 <td>119</td>
28735 <td>J721E_DEV_R5FSS1_CORE0</td>
28736 <td>intr</td>
28737 <td>375</td>
28738 </tr>
28739 <tr class="row-odd"><td>&#160;</td>
28740 <td>&#160;</td>
28741 <td>&#160;</td>
28742 <td>J721E_DEV_R5FSS1_CORE1</td>
28743 <td>intr</td>
28744 <td>375</td>
28745 </tr>
28746 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28747 <td>135</td>
28748 <td>120</td>
28749 <td>J721E_DEV_R5FSS1_CORE0</td>
28750 <td>intr</td>
28751 <td>376</td>
28752 </tr>
28753 <tr class="row-odd"><td>&#160;</td>
28754 <td>&#160;</td>
28755 <td>&#160;</td>
28756 <td>J721E_DEV_R5FSS1_CORE1</td>
28757 <td>intr</td>
28758 <td>376</td>
28759 </tr>
28760 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28761 <td>135</td>
28762 <td>121</td>
28763 <td>J721E_DEV_R5FSS1_CORE0</td>
28764 <td>intr</td>
28765 <td>377</td>
28766 </tr>
28767 <tr class="row-odd"><td>&#160;</td>
28768 <td>&#160;</td>
28769 <td>&#160;</td>
28770 <td>J721E_DEV_R5FSS1_CORE1</td>
28771 <td>intr</td>
28772 <td>377</td>
28773 </tr>
28774 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28775 <td>135</td>
28776 <td>122</td>
28777 <td>J721E_DEV_R5FSS1_CORE0</td>
28778 <td>intr</td>
28779 <td>378</td>
28780 </tr>
28781 <tr class="row-odd"><td>&#160;</td>
28782 <td>&#160;</td>
28783 <td>&#160;</td>
28784 <td>J721E_DEV_R5FSS1_CORE1</td>
28785 <td>intr</td>
28786 <td>378</td>
28787 </tr>
28788 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28789 <td>135</td>
28790 <td>123</td>
28791 <td>J721E_DEV_R5FSS1_CORE0</td>
28792 <td>intr</td>
28793 <td>379</td>
28794 </tr>
28795 <tr class="row-odd"><td>&#160;</td>
28796 <td>&#160;</td>
28797 <td>&#160;</td>
28798 <td>J721E_DEV_R5FSS1_CORE1</td>
28799 <td>intr</td>
28800 <td>379</td>
28801 </tr>
28802 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28803 <td>135</td>
28804 <td>124</td>
28805 <td>J721E_DEV_R5FSS1_CORE0</td>
28806 <td>intr</td>
28807 <td>380</td>
28808 </tr>
28809 <tr class="row-odd"><td>&#160;</td>
28810 <td>&#160;</td>
28811 <td>&#160;</td>
28812 <td>J721E_DEV_R5FSS1_CORE1</td>
28813 <td>intr</td>
28814 <td>380</td>
28815 </tr>
28816 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28817 <td>135</td>
28818 <td>125</td>
28819 <td>J721E_DEV_R5FSS1_CORE0</td>
28820 <td>intr</td>
28821 <td>381</td>
28822 </tr>
28823 <tr class="row-odd"><td>&#160;</td>
28824 <td>&#160;</td>
28825 <td>&#160;</td>
28826 <td>J721E_DEV_R5FSS1_CORE1</td>
28827 <td>intr</td>
28828 <td>381</td>
28829 </tr>
28830 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28831 <td>135</td>
28832 <td>126</td>
28833 <td>J721E_DEV_R5FSS1_CORE0</td>
28834 <td>intr</td>
28835 <td>382</td>
28836 </tr>
28837 <tr class="row-odd"><td>&#160;</td>
28838 <td>&#160;</td>
28839 <td>&#160;</td>
28840 <td>J721E_DEV_R5FSS1_CORE1</td>
28841 <td>intr</td>
28842 <td>382</td>
28843 </tr>
28844 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28845 <td>135</td>
28846 <td>127</td>
28847 <td>J721E_DEV_R5FSS1_CORE0</td>
28848 <td>intr</td>
28849 <td>383</td>
28850 </tr>
28851 <tr class="row-odd"><td>&#160;</td>
28852 <td>&#160;</td>
28853 <td>&#160;</td>
28854 <td>J721E_DEV_R5FSS1_CORE1</td>
28855 <td>intr</td>
28856 <td>383</td>
28857 </tr>
28858 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28859 <td>135</td>
28860 <td>128</td>
28861 <td>J721E_DEV_R5FSS1_CORE0</td>
28862 <td>intr</td>
28863 <td>384</td>
28864 </tr>
28865 <tr class="row-odd"><td>&#160;</td>
28866 <td>&#160;</td>
28867 <td>&#160;</td>
28868 <td>J721E_DEV_R5FSS1_CORE1</td>
28869 <td>intr</td>
28870 <td>384</td>
28871 </tr>
28872 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28873 <td>135</td>
28874 <td>129</td>
28875 <td>J721E_DEV_R5FSS1_CORE0</td>
28876 <td>intr</td>
28877 <td>385</td>
28878 </tr>
28879 <tr class="row-odd"><td>&#160;</td>
28880 <td>&#160;</td>
28881 <td>&#160;</td>
28882 <td>J721E_DEV_R5FSS1_CORE1</td>
28883 <td>intr</td>
28884 <td>385</td>
28885 </tr>
28886 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28887 <td>135</td>
28888 <td>130</td>
28889 <td>J721E_DEV_R5FSS1_CORE0</td>
28890 <td>intr</td>
28891 <td>386</td>
28892 </tr>
28893 <tr class="row-odd"><td>&#160;</td>
28894 <td>&#160;</td>
28895 <td>&#160;</td>
28896 <td>J721E_DEV_R5FSS1_CORE1</td>
28897 <td>intr</td>
28898 <td>386</td>
28899 </tr>
28900 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28901 <td>135</td>
28902 <td>131</td>
28903 <td>J721E_DEV_R5FSS1_CORE0</td>
28904 <td>intr</td>
28905 <td>387</td>
28906 </tr>
28907 <tr class="row-odd"><td>&#160;</td>
28908 <td>&#160;</td>
28909 <td>&#160;</td>
28910 <td>J721E_DEV_R5FSS1_CORE1</td>
28911 <td>intr</td>
28912 <td>387</td>
28913 </tr>
28914 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28915 <td>135</td>
28916 <td>132</td>
28917 <td>J721E_DEV_R5FSS1_CORE0</td>
28918 <td>intr</td>
28919 <td>388</td>
28920 </tr>
28921 <tr class="row-odd"><td>&#160;</td>
28922 <td>&#160;</td>
28923 <td>&#160;</td>
28924 <td>J721E_DEV_R5FSS1_CORE1</td>
28925 <td>intr</td>
28926 <td>388</td>
28927 </tr>
28928 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28929 <td>135</td>
28930 <td>133</td>
28931 <td>J721E_DEV_R5FSS1_CORE0</td>
28932 <td>intr</td>
28933 <td>389</td>
28934 </tr>
28935 <tr class="row-odd"><td>&#160;</td>
28936 <td>&#160;</td>
28937 <td>&#160;</td>
28938 <td>J721E_DEV_R5FSS1_CORE1</td>
28939 <td>intr</td>
28940 <td>389</td>
28941 </tr>
28942 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28943 <td>135</td>
28944 <td>134</td>
28945 <td>J721E_DEV_R5FSS1_CORE0</td>
28946 <td>intr</td>
28947 <td>390</td>
28948 </tr>
28949 <tr class="row-odd"><td>&#160;</td>
28950 <td>&#160;</td>
28951 <td>&#160;</td>
28952 <td>J721E_DEV_R5FSS1_CORE1</td>
28953 <td>intr</td>
28954 <td>390</td>
28955 </tr>
28956 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28957 <td>135</td>
28958 <td>135</td>
28959 <td>J721E_DEV_R5FSS1_CORE0</td>
28960 <td>intr</td>
28961 <td>391</td>
28962 </tr>
28963 <tr class="row-odd"><td>&#160;</td>
28964 <td>&#160;</td>
28965 <td>&#160;</td>
28966 <td>J721E_DEV_R5FSS1_CORE1</td>
28967 <td>intr</td>
28968 <td>391</td>
28969 </tr>
28970 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28971 <td>135</td>
28972 <td>136</td>
28973 <td>J721E_DEV_R5FSS1_CORE0</td>
28974 <td>intr</td>
28975 <td>392</td>
28976 </tr>
28977 <tr class="row-odd"><td>&#160;</td>
28978 <td>&#160;</td>
28979 <td>&#160;</td>
28980 <td>J721E_DEV_R5FSS1_CORE1</td>
28981 <td>intr</td>
28982 <td>392</td>
28983 </tr>
28984 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28985 <td>135</td>
28986 <td>137</td>
28987 <td>J721E_DEV_R5FSS1_CORE0</td>
28988 <td>intr</td>
28989 <td>393</td>
28990 </tr>
28991 <tr class="row-odd"><td>&#160;</td>
28992 <td>&#160;</td>
28993 <td>&#160;</td>
28994 <td>J721E_DEV_R5FSS1_CORE1</td>
28995 <td>intr</td>
28996 <td>393</td>
28997 </tr>
28998 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
28999 <td>135</td>
29000 <td>138</td>
29001 <td>J721E_DEV_R5FSS1_CORE0</td>
29002 <td>intr</td>
29003 <td>394</td>
29004 </tr>
29005 <tr class="row-odd"><td>&#160;</td>
29006 <td>&#160;</td>
29007 <td>&#160;</td>
29008 <td>J721E_DEV_R5FSS1_CORE1</td>
29009 <td>intr</td>
29010 <td>394</td>
29011 </tr>
29012 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29013 <td>135</td>
29014 <td>139</td>
29015 <td>J721E_DEV_R5FSS1_CORE0</td>
29016 <td>intr</td>
29017 <td>395</td>
29018 </tr>
29019 <tr class="row-odd"><td>&#160;</td>
29020 <td>&#160;</td>
29021 <td>&#160;</td>
29022 <td>J721E_DEV_R5FSS1_CORE1</td>
29023 <td>intr</td>
29024 <td>395</td>
29025 </tr>
29026 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29027 <td>135</td>
29028 <td>140</td>
29029 <td>J721E_DEV_R5FSS1_CORE0</td>
29030 <td>intr</td>
29031 <td>396</td>
29032 </tr>
29033 <tr class="row-odd"><td>&#160;</td>
29034 <td>&#160;</td>
29035 <td>&#160;</td>
29036 <td>J721E_DEV_R5FSS1_CORE1</td>
29037 <td>intr</td>
29038 <td>396</td>
29039 </tr>
29040 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29041 <td>135</td>
29042 <td>141</td>
29043 <td>J721E_DEV_R5FSS1_CORE0</td>
29044 <td>intr</td>
29045 <td>397</td>
29046 </tr>
29047 <tr class="row-odd"><td>&#160;</td>
29048 <td>&#160;</td>
29049 <td>&#160;</td>
29050 <td>J721E_DEV_R5FSS1_CORE1</td>
29051 <td>intr</td>
29052 <td>397</td>
29053 </tr>
29054 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29055 <td>135</td>
29056 <td>142</td>
29057 <td>J721E_DEV_R5FSS1_CORE0</td>
29058 <td>intr</td>
29059 <td>398</td>
29060 </tr>
29061 <tr class="row-odd"><td>&#160;</td>
29062 <td>&#160;</td>
29063 <td>&#160;</td>
29064 <td>J721E_DEV_R5FSS1_CORE1</td>
29065 <td>intr</td>
29066 <td>398</td>
29067 </tr>
29068 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29069 <td>135</td>
29070 <td>143</td>
29071 <td>J721E_DEV_R5FSS1_CORE0</td>
29072 <td>intr</td>
29073 <td>399</td>
29074 </tr>
29075 <tr class="row-odd"><td>&#160;</td>
29076 <td>&#160;</td>
29077 <td>&#160;</td>
29078 <td>J721E_DEV_R5FSS1_CORE1</td>
29079 <td>intr</td>
29080 <td>399</td>
29081 </tr>
29082 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29083 <td>135</td>
29084 <td>144</td>
29085 <td>J721E_DEV_R5FSS1_CORE0</td>
29086 <td>intr</td>
29087 <td>400</td>
29088 </tr>
29089 <tr class="row-odd"><td>&#160;</td>
29090 <td>&#160;</td>
29091 <td>&#160;</td>
29092 <td>J721E_DEV_R5FSS1_CORE1</td>
29093 <td>intr</td>
29094 <td>400</td>
29095 </tr>
29096 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29097 <td>135</td>
29098 <td>145</td>
29099 <td>J721E_DEV_R5FSS1_CORE0</td>
29100 <td>intr</td>
29101 <td>401</td>
29102 </tr>
29103 <tr class="row-odd"><td>&#160;</td>
29104 <td>&#160;</td>
29105 <td>&#160;</td>
29106 <td>J721E_DEV_R5FSS1_CORE1</td>
29107 <td>intr</td>
29108 <td>401</td>
29109 </tr>
29110 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29111 <td>135</td>
29112 <td>146</td>
29113 <td>J721E_DEV_R5FSS1_CORE0</td>
29114 <td>intr</td>
29115 <td>402</td>
29116 </tr>
29117 <tr class="row-odd"><td>&#160;</td>
29118 <td>&#160;</td>
29119 <td>&#160;</td>
29120 <td>J721E_DEV_R5FSS1_CORE1</td>
29121 <td>intr</td>
29122 <td>402</td>
29123 </tr>
29124 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29125 <td>135</td>
29126 <td>147</td>
29127 <td>J721E_DEV_R5FSS1_CORE0</td>
29128 <td>intr</td>
29129 <td>403</td>
29130 </tr>
29131 <tr class="row-odd"><td>&#160;</td>
29132 <td>&#160;</td>
29133 <td>&#160;</td>
29134 <td>J721E_DEV_R5FSS1_CORE1</td>
29135 <td>intr</td>
29136 <td>403</td>
29137 </tr>
29138 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29139 <td>135</td>
29140 <td>148</td>
29141 <td>J721E_DEV_R5FSS1_CORE0</td>
29142 <td>intr</td>
29143 <td>404</td>
29144 </tr>
29145 <tr class="row-odd"><td>&#160;</td>
29146 <td>&#160;</td>
29147 <td>&#160;</td>
29148 <td>J721E_DEV_R5FSS1_CORE1</td>
29149 <td>intr</td>
29150 <td>404</td>
29151 </tr>
29152 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29153 <td>135</td>
29154 <td>149</td>
29155 <td>J721E_DEV_R5FSS1_CORE0</td>
29156 <td>intr</td>
29157 <td>405</td>
29158 </tr>
29159 <tr class="row-odd"><td>&#160;</td>
29160 <td>&#160;</td>
29161 <td>&#160;</td>
29162 <td>J721E_DEV_R5FSS1_CORE1</td>
29163 <td>intr</td>
29164 <td>405</td>
29165 </tr>
29166 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29167 <td>135</td>
29168 <td>150</td>
29169 <td>J721E_DEV_R5FSS1_CORE0</td>
29170 <td>intr</td>
29171 <td>406</td>
29172 </tr>
29173 <tr class="row-odd"><td>&#160;</td>
29174 <td>&#160;</td>
29175 <td>&#160;</td>
29176 <td>J721E_DEV_R5FSS1_CORE1</td>
29177 <td>intr</td>
29178 <td>406</td>
29179 </tr>
29180 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29181 <td>135</td>
29182 <td>151</td>
29183 <td>J721E_DEV_R5FSS1_CORE0</td>
29184 <td>intr</td>
29185 <td>407</td>
29186 </tr>
29187 <tr class="row-odd"><td>&#160;</td>
29188 <td>&#160;</td>
29189 <td>&#160;</td>
29190 <td>J721E_DEV_R5FSS1_CORE1</td>
29191 <td>intr</td>
29192 <td>407</td>
29193 </tr>
29194 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29195 <td>135</td>
29196 <td>152</td>
29197 <td>J721E_DEV_R5FSS1_CORE0</td>
29198 <td>intr</td>
29199 <td>408</td>
29200 </tr>
29201 <tr class="row-odd"><td>&#160;</td>
29202 <td>&#160;</td>
29203 <td>&#160;</td>
29204 <td>J721E_DEV_R5FSS1_CORE1</td>
29205 <td>intr</td>
29206 <td>408</td>
29207 </tr>
29208 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29209 <td>135</td>
29210 <td>153</td>
29211 <td>J721E_DEV_R5FSS1_CORE0</td>
29212 <td>intr</td>
29213 <td>409</td>
29214 </tr>
29215 <tr class="row-odd"><td>&#160;</td>
29216 <td>&#160;</td>
29217 <td>&#160;</td>
29218 <td>J721E_DEV_R5FSS1_CORE1</td>
29219 <td>intr</td>
29220 <td>409</td>
29221 </tr>
29222 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29223 <td>135</td>
29224 <td>154</td>
29225 <td>J721E_DEV_R5FSS1_CORE0</td>
29226 <td>intr</td>
29227 <td>410</td>
29228 </tr>
29229 <tr class="row-odd"><td>&#160;</td>
29230 <td>&#160;</td>
29231 <td>&#160;</td>
29232 <td>J721E_DEV_R5FSS1_CORE1</td>
29233 <td>intr</td>
29234 <td>410</td>
29235 </tr>
29236 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29237 <td>135</td>
29238 <td>155</td>
29239 <td>J721E_DEV_R5FSS1_CORE0</td>
29240 <td>intr</td>
29241 <td>411</td>
29242 </tr>
29243 <tr class="row-odd"><td>&#160;</td>
29244 <td>&#160;</td>
29245 <td>&#160;</td>
29246 <td>J721E_DEV_R5FSS1_CORE1</td>
29247 <td>intr</td>
29248 <td>411</td>
29249 </tr>
29250 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29251 <td>135</td>
29252 <td>156</td>
29253 <td>J721E_DEV_R5FSS1_CORE0</td>
29254 <td>intr</td>
29255 <td>412</td>
29256 </tr>
29257 <tr class="row-odd"><td>&#160;</td>
29258 <td>&#160;</td>
29259 <td>&#160;</td>
29260 <td>J721E_DEV_R5FSS1_CORE1</td>
29261 <td>intr</td>
29262 <td>412</td>
29263 </tr>
29264 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29265 <td>135</td>
29266 <td>157</td>
29267 <td>J721E_DEV_R5FSS1_CORE0</td>
29268 <td>intr</td>
29269 <td>413</td>
29270 </tr>
29271 <tr class="row-odd"><td>&#160;</td>
29272 <td>&#160;</td>
29273 <td>&#160;</td>
29274 <td>J721E_DEV_R5FSS1_CORE1</td>
29275 <td>intr</td>
29276 <td>413</td>
29277 </tr>
29278 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29279 <td>135</td>
29280 <td>158</td>
29281 <td>J721E_DEV_R5FSS1_CORE0</td>
29282 <td>intr</td>
29283 <td>414</td>
29284 </tr>
29285 <tr class="row-odd"><td>&#160;</td>
29286 <td>&#160;</td>
29287 <td>&#160;</td>
29288 <td>J721E_DEV_R5FSS1_CORE1</td>
29289 <td>intr</td>
29290 <td>414</td>
29291 </tr>
29292 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29293 <td>135</td>
29294 <td>159</td>
29295 <td>J721E_DEV_R5FSS1_CORE0</td>
29296 <td>intr</td>
29297 <td>415</td>
29298 </tr>
29299 <tr class="row-odd"><td>&#160;</td>
29300 <td>&#160;</td>
29301 <td>&#160;</td>
29302 <td>J721E_DEV_R5FSS1_CORE1</td>
29303 <td>intr</td>
29304 <td>415</td>
29305 </tr>
29306 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29307 <td>135</td>
29308 <td>160</td>
29309 <td>J721E_DEV_R5FSS1_CORE0</td>
29310 <td>intr</td>
29311 <td>416</td>
29312 </tr>
29313 <tr class="row-odd"><td>&#160;</td>
29314 <td>&#160;</td>
29315 <td>&#160;</td>
29316 <td>J721E_DEV_R5FSS1_CORE1</td>
29317 <td>intr</td>
29318 <td>416</td>
29319 </tr>
29320 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29321 <td>135</td>
29322 <td>161</td>
29323 <td>J721E_DEV_R5FSS1_CORE0</td>
29324 <td>intr</td>
29325 <td>417</td>
29326 </tr>
29327 <tr class="row-odd"><td>&#160;</td>
29328 <td>&#160;</td>
29329 <td>&#160;</td>
29330 <td>J721E_DEV_R5FSS1_CORE1</td>
29331 <td>intr</td>
29332 <td>417</td>
29333 </tr>
29334 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29335 <td>135</td>
29336 <td>162</td>
29337 <td>J721E_DEV_R5FSS1_CORE0</td>
29338 <td>intr</td>
29339 <td>418</td>
29340 </tr>
29341 <tr class="row-odd"><td>&#160;</td>
29342 <td>&#160;</td>
29343 <td>&#160;</td>
29344 <td>J721E_DEV_R5FSS1_CORE1</td>
29345 <td>intr</td>
29346 <td>418</td>
29347 </tr>
29348 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29349 <td>135</td>
29350 <td>163</td>
29351 <td>J721E_DEV_R5FSS1_CORE0</td>
29352 <td>intr</td>
29353 <td>419</td>
29354 </tr>
29355 <tr class="row-odd"><td>&#160;</td>
29356 <td>&#160;</td>
29357 <td>&#160;</td>
29358 <td>J721E_DEV_R5FSS1_CORE1</td>
29359 <td>intr</td>
29360 <td>419</td>
29361 </tr>
29362 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29363 <td>135</td>
29364 <td>164</td>
29365 <td>J721E_DEV_R5FSS1_CORE0</td>
29366 <td>intr</td>
29367 <td>420</td>
29368 </tr>
29369 <tr class="row-odd"><td>&#160;</td>
29370 <td>&#160;</td>
29371 <td>&#160;</td>
29372 <td>J721E_DEV_R5FSS1_CORE1</td>
29373 <td>intr</td>
29374 <td>420</td>
29375 </tr>
29376 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29377 <td>135</td>
29378 <td>165</td>
29379 <td>J721E_DEV_R5FSS1_CORE0</td>
29380 <td>intr</td>
29381 <td>421</td>
29382 </tr>
29383 <tr class="row-odd"><td>&#160;</td>
29384 <td>&#160;</td>
29385 <td>&#160;</td>
29386 <td>J721E_DEV_R5FSS1_CORE1</td>
29387 <td>intr</td>
29388 <td>421</td>
29389 </tr>
29390 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29391 <td>135</td>
29392 <td>166</td>
29393 <td>J721E_DEV_R5FSS1_CORE0</td>
29394 <td>intr</td>
29395 <td>422</td>
29396 </tr>
29397 <tr class="row-odd"><td>&#160;</td>
29398 <td>&#160;</td>
29399 <td>&#160;</td>
29400 <td>J721E_DEV_R5FSS1_CORE1</td>
29401 <td>intr</td>
29402 <td>422</td>
29403 </tr>
29404 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29405 <td>135</td>
29406 <td>167</td>
29407 <td>J721E_DEV_R5FSS1_CORE0</td>
29408 <td>intr</td>
29409 <td>423</td>
29410 </tr>
29411 <tr class="row-odd"><td>&#160;</td>
29412 <td>&#160;</td>
29413 <td>&#160;</td>
29414 <td>J721E_DEV_R5FSS1_CORE1</td>
29415 <td>intr</td>
29416 <td>423</td>
29417 </tr>
29418 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29419 <td>135</td>
29420 <td>168</td>
29421 <td>J721E_DEV_R5FSS1_CORE0</td>
29422 <td>intr</td>
29423 <td>424</td>
29424 </tr>
29425 <tr class="row-odd"><td>&#160;</td>
29426 <td>&#160;</td>
29427 <td>&#160;</td>
29428 <td>J721E_DEV_R5FSS1_CORE1</td>
29429 <td>intr</td>
29430 <td>424</td>
29431 </tr>
29432 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29433 <td>135</td>
29434 <td>169</td>
29435 <td>J721E_DEV_R5FSS1_CORE0</td>
29436 <td>intr</td>
29437 <td>425</td>
29438 </tr>
29439 <tr class="row-odd"><td>&#160;</td>
29440 <td>&#160;</td>
29441 <td>&#160;</td>
29442 <td>J721E_DEV_R5FSS1_CORE1</td>
29443 <td>intr</td>
29444 <td>425</td>
29445 </tr>
29446 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29447 <td>135</td>
29448 <td>170</td>
29449 <td>J721E_DEV_R5FSS1_CORE0</td>
29450 <td>intr</td>
29451 <td>426</td>
29452 </tr>
29453 <tr class="row-odd"><td>&#160;</td>
29454 <td>&#160;</td>
29455 <td>&#160;</td>
29456 <td>J721E_DEV_R5FSS1_CORE1</td>
29457 <td>intr</td>
29458 <td>426</td>
29459 </tr>
29460 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29461 <td>135</td>
29462 <td>171</td>
29463 <td>J721E_DEV_R5FSS1_CORE0</td>
29464 <td>intr</td>
29465 <td>427</td>
29466 </tr>
29467 <tr class="row-odd"><td>&#160;</td>
29468 <td>&#160;</td>
29469 <td>&#160;</td>
29470 <td>J721E_DEV_R5FSS1_CORE1</td>
29471 <td>intr</td>
29472 <td>427</td>
29473 </tr>
29474 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29475 <td>135</td>
29476 <td>172</td>
29477 <td>J721E_DEV_R5FSS1_CORE0</td>
29478 <td>intr</td>
29479 <td>428</td>
29480 </tr>
29481 <tr class="row-odd"><td>&#160;</td>
29482 <td>&#160;</td>
29483 <td>&#160;</td>
29484 <td>J721E_DEV_R5FSS1_CORE1</td>
29485 <td>intr</td>
29486 <td>428</td>
29487 </tr>
29488 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29489 <td>135</td>
29490 <td>173</td>
29491 <td>J721E_DEV_R5FSS1_CORE0</td>
29492 <td>intr</td>
29493 <td>429</td>
29494 </tr>
29495 <tr class="row-odd"><td>&#160;</td>
29496 <td>&#160;</td>
29497 <td>&#160;</td>
29498 <td>J721E_DEV_R5FSS1_CORE1</td>
29499 <td>intr</td>
29500 <td>429</td>
29501 </tr>
29502 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29503 <td>135</td>
29504 <td>174</td>
29505 <td>J721E_DEV_R5FSS1_CORE0</td>
29506 <td>intr</td>
29507 <td>430</td>
29508 </tr>
29509 <tr class="row-odd"><td>&#160;</td>
29510 <td>&#160;</td>
29511 <td>&#160;</td>
29512 <td>J721E_DEV_R5FSS1_CORE1</td>
29513 <td>intr</td>
29514 <td>430</td>
29515 </tr>
29516 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29517 <td>135</td>
29518 <td>175</td>
29519 <td>J721E_DEV_R5FSS1_CORE0</td>
29520 <td>intr</td>
29521 <td>431</td>
29522 </tr>
29523 <tr class="row-odd"><td>&#160;</td>
29524 <td>&#160;</td>
29525 <td>&#160;</td>
29526 <td>J721E_DEV_R5FSS1_CORE1</td>
29527 <td>intr</td>
29528 <td>431</td>
29529 </tr>
29530 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29531 <td>135</td>
29532 <td>176</td>
29533 <td>J721E_DEV_R5FSS1_CORE0</td>
29534 <td>intr</td>
29535 <td>432</td>
29536 </tr>
29537 <tr class="row-odd"><td>&#160;</td>
29538 <td>&#160;</td>
29539 <td>&#160;</td>
29540 <td>J721E_DEV_R5FSS1_CORE1</td>
29541 <td>intr</td>
29542 <td>432</td>
29543 </tr>
29544 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29545 <td>135</td>
29546 <td>177</td>
29547 <td>J721E_DEV_R5FSS1_CORE0</td>
29548 <td>intr</td>
29549 <td>433</td>
29550 </tr>
29551 <tr class="row-odd"><td>&#160;</td>
29552 <td>&#160;</td>
29553 <td>&#160;</td>
29554 <td>J721E_DEV_R5FSS1_CORE1</td>
29555 <td>intr</td>
29556 <td>433</td>
29557 </tr>
29558 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29559 <td>135</td>
29560 <td>178</td>
29561 <td>J721E_DEV_R5FSS1_CORE0</td>
29562 <td>intr</td>
29563 <td>434</td>
29564 </tr>
29565 <tr class="row-odd"><td>&#160;</td>
29566 <td>&#160;</td>
29567 <td>&#160;</td>
29568 <td>J721E_DEV_R5FSS1_CORE1</td>
29569 <td>intr</td>
29570 <td>434</td>
29571 </tr>
29572 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29573 <td>135</td>
29574 <td>179</td>
29575 <td>J721E_DEV_R5FSS1_CORE0</td>
29576 <td>intr</td>
29577 <td>435</td>
29578 </tr>
29579 <tr class="row-odd"><td>&#160;</td>
29580 <td>&#160;</td>
29581 <td>&#160;</td>
29582 <td>J721E_DEV_R5FSS1_CORE1</td>
29583 <td>intr</td>
29584 <td>435</td>
29585 </tr>
29586 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29587 <td>135</td>
29588 <td>180</td>
29589 <td>J721E_DEV_R5FSS1_CORE0</td>
29590 <td>intr</td>
29591 <td>436</td>
29592 </tr>
29593 <tr class="row-odd"><td>&#160;</td>
29594 <td>&#160;</td>
29595 <td>&#160;</td>
29596 <td>J721E_DEV_R5FSS1_CORE1</td>
29597 <td>intr</td>
29598 <td>436</td>
29599 </tr>
29600 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29601 <td>135</td>
29602 <td>181</td>
29603 <td>J721E_DEV_R5FSS1_CORE0</td>
29604 <td>intr</td>
29605 <td>437</td>
29606 </tr>
29607 <tr class="row-odd"><td>&#160;</td>
29608 <td>&#160;</td>
29609 <td>&#160;</td>
29610 <td>J721E_DEV_R5FSS1_CORE1</td>
29611 <td>intr</td>
29612 <td>437</td>
29613 </tr>
29614 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29615 <td>135</td>
29616 <td>182</td>
29617 <td>J721E_DEV_R5FSS1_CORE0</td>
29618 <td>intr</td>
29619 <td>438</td>
29620 </tr>
29621 <tr class="row-odd"><td>&#160;</td>
29622 <td>&#160;</td>
29623 <td>&#160;</td>
29624 <td>J721E_DEV_R5FSS1_CORE1</td>
29625 <td>intr</td>
29626 <td>438</td>
29627 </tr>
29628 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29629 <td>135</td>
29630 <td>183</td>
29631 <td>J721E_DEV_R5FSS1_CORE0</td>
29632 <td>intr</td>
29633 <td>439</td>
29634 </tr>
29635 <tr class="row-odd"><td>&#160;</td>
29636 <td>&#160;</td>
29637 <td>&#160;</td>
29638 <td>J721E_DEV_R5FSS1_CORE1</td>
29639 <td>intr</td>
29640 <td>439</td>
29641 </tr>
29642 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29643 <td>135</td>
29644 <td>184</td>
29645 <td>J721E_DEV_R5FSS1_CORE0</td>
29646 <td>intr</td>
29647 <td>440</td>
29648 </tr>
29649 <tr class="row-odd"><td>&#160;</td>
29650 <td>&#160;</td>
29651 <td>&#160;</td>
29652 <td>J721E_DEV_R5FSS1_CORE1</td>
29653 <td>intr</td>
29654 <td>440</td>
29655 </tr>
29656 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29657 <td>135</td>
29658 <td>185</td>
29659 <td>J721E_DEV_R5FSS1_CORE0</td>
29660 <td>intr</td>
29661 <td>441</td>
29662 </tr>
29663 <tr class="row-odd"><td>&#160;</td>
29664 <td>&#160;</td>
29665 <td>&#160;</td>
29666 <td>J721E_DEV_R5FSS1_CORE1</td>
29667 <td>intr</td>
29668 <td>441</td>
29669 </tr>
29670 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29671 <td>135</td>
29672 <td>186</td>
29673 <td>J721E_DEV_R5FSS1_CORE0</td>
29674 <td>intr</td>
29675 <td>442</td>
29676 </tr>
29677 <tr class="row-odd"><td>&#160;</td>
29678 <td>&#160;</td>
29679 <td>&#160;</td>
29680 <td>J721E_DEV_R5FSS1_CORE1</td>
29681 <td>intr</td>
29682 <td>442</td>
29683 </tr>
29684 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29685 <td>135</td>
29686 <td>187</td>
29687 <td>J721E_DEV_R5FSS1_CORE0</td>
29688 <td>intr</td>
29689 <td>443</td>
29690 </tr>
29691 <tr class="row-odd"><td>&#160;</td>
29692 <td>&#160;</td>
29693 <td>&#160;</td>
29694 <td>J721E_DEV_R5FSS1_CORE1</td>
29695 <td>intr</td>
29696 <td>443</td>
29697 </tr>
29698 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29699 <td>135</td>
29700 <td>188</td>
29701 <td>J721E_DEV_R5FSS1_CORE0</td>
29702 <td>intr</td>
29703 <td>444</td>
29704 </tr>
29705 <tr class="row-odd"><td>&#160;</td>
29706 <td>&#160;</td>
29707 <td>&#160;</td>
29708 <td>J721E_DEV_R5FSS1_CORE1</td>
29709 <td>intr</td>
29710 <td>444</td>
29711 </tr>
29712 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29713 <td>135</td>
29714 <td>189</td>
29715 <td>J721E_DEV_R5FSS1_CORE0</td>
29716 <td>intr</td>
29717 <td>445</td>
29718 </tr>
29719 <tr class="row-odd"><td>&#160;</td>
29720 <td>&#160;</td>
29721 <td>&#160;</td>
29722 <td>J721E_DEV_R5FSS1_CORE1</td>
29723 <td>intr</td>
29724 <td>445</td>
29725 </tr>
29726 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29727 <td>135</td>
29728 <td>190</td>
29729 <td>J721E_DEV_R5FSS1_CORE0</td>
29730 <td>intr</td>
29731 <td>446</td>
29732 </tr>
29733 <tr class="row-odd"><td>&#160;</td>
29734 <td>&#160;</td>
29735 <td>&#160;</td>
29736 <td>J721E_DEV_R5FSS1_CORE1</td>
29737 <td>intr</td>
29738 <td>446</td>
29739 </tr>
29740 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29741 <td>135</td>
29742 <td>191</td>
29743 <td>J721E_DEV_R5FSS1_CORE0</td>
29744 <td>intr</td>
29745 <td>447</td>
29746 </tr>
29747 <tr class="row-odd"><td>&#160;</td>
29748 <td>&#160;</td>
29749 <td>&#160;</td>
29750 <td>J721E_DEV_R5FSS1_CORE1</td>
29751 <td>intr</td>
29752 <td>447</td>
29753 </tr>
29754 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29755 <td>135</td>
29756 <td>192</td>
29757 <td>J721E_DEV_R5FSS1_CORE0</td>
29758 <td>intr</td>
29759 <td>448</td>
29760 </tr>
29761 <tr class="row-odd"><td>&#160;</td>
29762 <td>&#160;</td>
29763 <td>&#160;</td>
29764 <td>J721E_DEV_R5FSS1_CORE1</td>
29765 <td>intr</td>
29766 <td>448</td>
29767 </tr>
29768 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29769 <td>135</td>
29770 <td>193</td>
29771 <td>J721E_DEV_R5FSS1_CORE0</td>
29772 <td>intr</td>
29773 <td>449</td>
29774 </tr>
29775 <tr class="row-odd"><td>&#160;</td>
29776 <td>&#160;</td>
29777 <td>&#160;</td>
29778 <td>J721E_DEV_R5FSS1_CORE1</td>
29779 <td>intr</td>
29780 <td>449</td>
29781 </tr>
29782 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29783 <td>135</td>
29784 <td>194</td>
29785 <td>J721E_DEV_R5FSS1_CORE0</td>
29786 <td>intr</td>
29787 <td>450</td>
29788 </tr>
29789 <tr class="row-odd"><td>&#160;</td>
29790 <td>&#160;</td>
29791 <td>&#160;</td>
29792 <td>J721E_DEV_R5FSS1_CORE1</td>
29793 <td>intr</td>
29794 <td>450</td>
29795 </tr>
29796 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29797 <td>135</td>
29798 <td>195</td>
29799 <td>J721E_DEV_R5FSS1_CORE0</td>
29800 <td>intr</td>
29801 <td>451</td>
29802 </tr>
29803 <tr class="row-odd"><td>&#160;</td>
29804 <td>&#160;</td>
29805 <td>&#160;</td>
29806 <td>J721E_DEV_R5FSS1_CORE1</td>
29807 <td>intr</td>
29808 <td>451</td>
29809 </tr>
29810 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29811 <td>135</td>
29812 <td>196</td>
29813 <td>J721E_DEV_R5FSS1_CORE0</td>
29814 <td>intr</td>
29815 <td>452</td>
29816 </tr>
29817 <tr class="row-odd"><td>&#160;</td>
29818 <td>&#160;</td>
29819 <td>&#160;</td>
29820 <td>J721E_DEV_R5FSS1_CORE1</td>
29821 <td>intr</td>
29822 <td>452</td>
29823 </tr>
29824 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29825 <td>135</td>
29826 <td>197</td>
29827 <td>J721E_DEV_R5FSS1_CORE0</td>
29828 <td>intr</td>
29829 <td>453</td>
29830 </tr>
29831 <tr class="row-odd"><td>&#160;</td>
29832 <td>&#160;</td>
29833 <td>&#160;</td>
29834 <td>J721E_DEV_R5FSS1_CORE1</td>
29835 <td>intr</td>
29836 <td>453</td>
29837 </tr>
29838 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29839 <td>135</td>
29840 <td>198</td>
29841 <td>J721E_DEV_R5FSS1_CORE0</td>
29842 <td>intr</td>
29843 <td>454</td>
29844 </tr>
29845 <tr class="row-odd"><td>&#160;</td>
29846 <td>&#160;</td>
29847 <td>&#160;</td>
29848 <td>J721E_DEV_R5FSS1_CORE1</td>
29849 <td>intr</td>
29850 <td>454</td>
29851 </tr>
29852 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29853 <td>135</td>
29854 <td>199</td>
29855 <td>J721E_DEV_R5FSS1_CORE0</td>
29856 <td>intr</td>
29857 <td>455</td>
29858 </tr>
29859 <tr class="row-odd"><td>&#160;</td>
29860 <td>&#160;</td>
29861 <td>&#160;</td>
29862 <td>J721E_DEV_R5FSS1_CORE1</td>
29863 <td>intr</td>
29864 <td>455</td>
29865 </tr>
29866 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29867 <td>135</td>
29868 <td>200</td>
29869 <td>J721E_DEV_R5FSS1_CORE0</td>
29870 <td>intr</td>
29871 <td>456</td>
29872 </tr>
29873 <tr class="row-odd"><td>&#160;</td>
29874 <td>&#160;</td>
29875 <td>&#160;</td>
29876 <td>J721E_DEV_R5FSS1_CORE1</td>
29877 <td>intr</td>
29878 <td>456</td>
29879 </tr>
29880 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29881 <td>135</td>
29882 <td>201</td>
29883 <td>J721E_DEV_R5FSS1_CORE0</td>
29884 <td>intr</td>
29885 <td>457</td>
29886 </tr>
29887 <tr class="row-odd"><td>&#160;</td>
29888 <td>&#160;</td>
29889 <td>&#160;</td>
29890 <td>J721E_DEV_R5FSS1_CORE1</td>
29891 <td>intr</td>
29892 <td>457</td>
29893 </tr>
29894 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29895 <td>135</td>
29896 <td>202</td>
29897 <td>J721E_DEV_R5FSS1_CORE0</td>
29898 <td>intr</td>
29899 <td>458</td>
29900 </tr>
29901 <tr class="row-odd"><td>&#160;</td>
29902 <td>&#160;</td>
29903 <td>&#160;</td>
29904 <td>J721E_DEV_R5FSS1_CORE1</td>
29905 <td>intr</td>
29906 <td>458</td>
29907 </tr>
29908 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29909 <td>135</td>
29910 <td>203</td>
29911 <td>J721E_DEV_R5FSS1_CORE0</td>
29912 <td>intr</td>
29913 <td>459</td>
29914 </tr>
29915 <tr class="row-odd"><td>&#160;</td>
29916 <td>&#160;</td>
29917 <td>&#160;</td>
29918 <td>J721E_DEV_R5FSS1_CORE1</td>
29919 <td>intr</td>
29920 <td>459</td>
29921 </tr>
29922 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29923 <td>135</td>
29924 <td>204</td>
29925 <td>J721E_DEV_R5FSS1_CORE0</td>
29926 <td>intr</td>
29927 <td>460</td>
29928 </tr>
29929 <tr class="row-odd"><td>&#160;</td>
29930 <td>&#160;</td>
29931 <td>&#160;</td>
29932 <td>J721E_DEV_R5FSS1_CORE1</td>
29933 <td>intr</td>
29934 <td>460</td>
29935 </tr>
29936 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29937 <td>135</td>
29938 <td>205</td>
29939 <td>J721E_DEV_R5FSS1_CORE0</td>
29940 <td>intr</td>
29941 <td>461</td>
29942 </tr>
29943 <tr class="row-odd"><td>&#160;</td>
29944 <td>&#160;</td>
29945 <td>&#160;</td>
29946 <td>J721E_DEV_R5FSS1_CORE1</td>
29947 <td>intr</td>
29948 <td>461</td>
29949 </tr>
29950 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29951 <td>135</td>
29952 <td>206</td>
29953 <td>J721E_DEV_R5FSS1_CORE0</td>
29954 <td>intr</td>
29955 <td>462</td>
29956 </tr>
29957 <tr class="row-odd"><td>&#160;</td>
29958 <td>&#160;</td>
29959 <td>&#160;</td>
29960 <td>J721E_DEV_R5FSS1_CORE1</td>
29961 <td>intr</td>
29962 <td>462</td>
29963 </tr>
29964 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29965 <td>135</td>
29966 <td>207</td>
29967 <td>J721E_DEV_R5FSS1_CORE0</td>
29968 <td>intr</td>
29969 <td>463</td>
29970 </tr>
29971 <tr class="row-odd"><td>&#160;</td>
29972 <td>&#160;</td>
29973 <td>&#160;</td>
29974 <td>J721E_DEV_R5FSS1_CORE1</td>
29975 <td>intr</td>
29976 <td>463</td>
29977 </tr>
29978 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29979 <td>135</td>
29980 <td>208</td>
29981 <td>J721E_DEV_R5FSS1_CORE0</td>
29982 <td>intr</td>
29983 <td>464</td>
29984 </tr>
29985 <tr class="row-odd"><td>&#160;</td>
29986 <td>&#160;</td>
29987 <td>&#160;</td>
29988 <td>J721E_DEV_R5FSS1_CORE1</td>
29989 <td>intr</td>
29990 <td>464</td>
29991 </tr>
29992 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
29993 <td>135</td>
29994 <td>209</td>
29995 <td>J721E_DEV_R5FSS1_CORE0</td>
29996 <td>intr</td>
29997 <td>465</td>
29998 </tr>
29999 <tr class="row-odd"><td>&#160;</td>
30000 <td>&#160;</td>
30001 <td>&#160;</td>
30002 <td>J721E_DEV_R5FSS1_CORE1</td>
30003 <td>intr</td>
30004 <td>465</td>
30005 </tr>
30006 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30007 <td>135</td>
30008 <td>210</td>
30009 <td>J721E_DEV_R5FSS1_CORE0</td>
30010 <td>intr</td>
30011 <td>466</td>
30012 </tr>
30013 <tr class="row-odd"><td>&#160;</td>
30014 <td>&#160;</td>
30015 <td>&#160;</td>
30016 <td>J721E_DEV_R5FSS1_CORE1</td>
30017 <td>intr</td>
30018 <td>466</td>
30019 </tr>
30020 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30021 <td>135</td>
30022 <td>211</td>
30023 <td>J721E_DEV_R5FSS1_CORE0</td>
30024 <td>intr</td>
30025 <td>467</td>
30026 </tr>
30027 <tr class="row-odd"><td>&#160;</td>
30028 <td>&#160;</td>
30029 <td>&#160;</td>
30030 <td>J721E_DEV_R5FSS1_CORE1</td>
30031 <td>intr</td>
30032 <td>467</td>
30033 </tr>
30034 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30035 <td>135</td>
30036 <td>212</td>
30037 <td>J721E_DEV_R5FSS1_CORE0</td>
30038 <td>intr</td>
30039 <td>468</td>
30040 </tr>
30041 <tr class="row-odd"><td>&#160;</td>
30042 <td>&#160;</td>
30043 <td>&#160;</td>
30044 <td>J721E_DEV_R5FSS1_CORE1</td>
30045 <td>intr</td>
30046 <td>468</td>
30047 </tr>
30048 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30049 <td>135</td>
30050 <td>213</td>
30051 <td>J721E_DEV_R5FSS1_CORE0</td>
30052 <td>intr</td>
30053 <td>469</td>
30054 </tr>
30055 <tr class="row-odd"><td>&#160;</td>
30056 <td>&#160;</td>
30057 <td>&#160;</td>
30058 <td>J721E_DEV_R5FSS1_CORE1</td>
30059 <td>intr</td>
30060 <td>469</td>
30061 </tr>
30062 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30063 <td>135</td>
30064 <td>214</td>
30065 <td>J721E_DEV_R5FSS1_CORE0</td>
30066 <td>intr</td>
30067 <td>470</td>
30068 </tr>
30069 <tr class="row-odd"><td>&#160;</td>
30070 <td>&#160;</td>
30071 <td>&#160;</td>
30072 <td>J721E_DEV_R5FSS1_CORE1</td>
30073 <td>intr</td>
30074 <td>470</td>
30075 </tr>
30076 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30077 <td>135</td>
30078 <td>215</td>
30079 <td>J721E_DEV_R5FSS1_CORE0</td>
30080 <td>intr</td>
30081 <td>471</td>
30082 </tr>
30083 <tr class="row-odd"><td>&#160;</td>
30084 <td>&#160;</td>
30085 <td>&#160;</td>
30086 <td>J721E_DEV_R5FSS1_CORE1</td>
30087 <td>intr</td>
30088 <td>471</td>
30089 </tr>
30090 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30091 <td>135</td>
30092 <td>216</td>
30093 <td>J721E_DEV_R5FSS1_CORE0</td>
30094 <td>intr</td>
30095 <td>472</td>
30096 </tr>
30097 <tr class="row-odd"><td>&#160;</td>
30098 <td>&#160;</td>
30099 <td>&#160;</td>
30100 <td>J721E_DEV_R5FSS1_CORE1</td>
30101 <td>intr</td>
30102 <td>472</td>
30103 </tr>
30104 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30105 <td>135</td>
30106 <td>217</td>
30107 <td>J721E_DEV_R5FSS1_CORE0</td>
30108 <td>intr</td>
30109 <td>473</td>
30110 </tr>
30111 <tr class="row-odd"><td>&#160;</td>
30112 <td>&#160;</td>
30113 <td>&#160;</td>
30114 <td>J721E_DEV_R5FSS1_CORE1</td>
30115 <td>intr</td>
30116 <td>473</td>
30117 </tr>
30118 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30119 <td>135</td>
30120 <td>218</td>
30121 <td>J721E_DEV_R5FSS1_CORE0</td>
30122 <td>intr</td>
30123 <td>474</td>
30124 </tr>
30125 <tr class="row-odd"><td>&#160;</td>
30126 <td>&#160;</td>
30127 <td>&#160;</td>
30128 <td>J721E_DEV_R5FSS1_CORE1</td>
30129 <td>intr</td>
30130 <td>474</td>
30131 </tr>
30132 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30133 <td>135</td>
30134 <td>219</td>
30135 <td>J721E_DEV_R5FSS1_CORE0</td>
30136 <td>intr</td>
30137 <td>475</td>
30138 </tr>
30139 <tr class="row-odd"><td>&#160;</td>
30140 <td>&#160;</td>
30141 <td>&#160;</td>
30142 <td>J721E_DEV_R5FSS1_CORE1</td>
30143 <td>intr</td>
30144 <td>475</td>
30145 </tr>
30146 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30147 <td>135</td>
30148 <td>220</td>
30149 <td>J721E_DEV_R5FSS1_CORE0</td>
30150 <td>intr</td>
30151 <td>476</td>
30152 </tr>
30153 <tr class="row-odd"><td>&#160;</td>
30154 <td>&#160;</td>
30155 <td>&#160;</td>
30156 <td>J721E_DEV_R5FSS1_CORE1</td>
30157 <td>intr</td>
30158 <td>476</td>
30159 </tr>
30160 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30161 <td>135</td>
30162 <td>221</td>
30163 <td>J721E_DEV_R5FSS1_CORE0</td>
30164 <td>intr</td>
30165 <td>477</td>
30166 </tr>
30167 <tr class="row-odd"><td>&#160;</td>
30168 <td>&#160;</td>
30169 <td>&#160;</td>
30170 <td>J721E_DEV_R5FSS1_CORE1</td>
30171 <td>intr</td>
30172 <td>477</td>
30173 </tr>
30174 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30175 <td>135</td>
30176 <td>222</td>
30177 <td>J721E_DEV_R5FSS1_CORE0</td>
30178 <td>intr</td>
30179 <td>478</td>
30180 </tr>
30181 <tr class="row-odd"><td>&#160;</td>
30182 <td>&#160;</td>
30183 <td>&#160;</td>
30184 <td>J721E_DEV_R5FSS1_CORE1</td>
30185 <td>intr</td>
30186 <td>478</td>
30187 </tr>
30188 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30189 <td>135</td>
30190 <td>223</td>
30191 <td>J721E_DEV_R5FSS1_CORE0</td>
30192 <td>intr</td>
30193 <td>479</td>
30194 </tr>
30195 <tr class="row-odd"><td>&#160;</td>
30196 <td>&#160;</td>
30197 <td>&#160;</td>
30198 <td>J721E_DEV_R5FSS1_CORE1</td>
30199 <td>intr</td>
30200 <td>479</td>
30201 </tr>
30202 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30203 <td>135</td>
30204 <td>224</td>
30205 <td>J721E_DEV_R5FSS1_CORE0</td>
30206 <td>intr</td>
30207 <td>480</td>
30208 </tr>
30209 <tr class="row-odd"><td>&#160;</td>
30210 <td>&#160;</td>
30211 <td>&#160;</td>
30212 <td>J721E_DEV_R5FSS1_CORE1</td>
30213 <td>intr</td>
30214 <td>480</td>
30215 </tr>
30216 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30217 <td>135</td>
30218 <td>225</td>
30219 <td>J721E_DEV_R5FSS1_CORE0</td>
30220 <td>intr</td>
30221 <td>481</td>
30222 </tr>
30223 <tr class="row-odd"><td>&#160;</td>
30224 <td>&#160;</td>
30225 <td>&#160;</td>
30226 <td>J721E_DEV_R5FSS1_CORE1</td>
30227 <td>intr</td>
30228 <td>481</td>
30229 </tr>
30230 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30231 <td>135</td>
30232 <td>226</td>
30233 <td>J721E_DEV_R5FSS1_CORE0</td>
30234 <td>intr</td>
30235 <td>482</td>
30236 </tr>
30237 <tr class="row-odd"><td>&#160;</td>
30238 <td>&#160;</td>
30239 <td>&#160;</td>
30240 <td>J721E_DEV_R5FSS1_CORE1</td>
30241 <td>intr</td>
30242 <td>482</td>
30243 </tr>
30244 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30245 <td>135</td>
30246 <td>227</td>
30247 <td>J721E_DEV_R5FSS1_CORE0</td>
30248 <td>intr</td>
30249 <td>483</td>
30250 </tr>
30251 <tr class="row-odd"><td>&#160;</td>
30252 <td>&#160;</td>
30253 <td>&#160;</td>
30254 <td>J721E_DEV_R5FSS1_CORE1</td>
30255 <td>intr</td>
30256 <td>483</td>
30257 </tr>
30258 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30259 <td>135</td>
30260 <td>228</td>
30261 <td>J721E_DEV_R5FSS1_CORE0</td>
30262 <td>intr</td>
30263 <td>484</td>
30264 </tr>
30265 <tr class="row-odd"><td>&#160;</td>
30266 <td>&#160;</td>
30267 <td>&#160;</td>
30268 <td>J721E_DEV_R5FSS1_CORE1</td>
30269 <td>intr</td>
30270 <td>484</td>
30271 </tr>
30272 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30273 <td>135</td>
30274 <td>229</td>
30275 <td>J721E_DEV_R5FSS1_CORE0</td>
30276 <td>intr</td>
30277 <td>485</td>
30278 </tr>
30279 <tr class="row-odd"><td>&#160;</td>
30280 <td>&#160;</td>
30281 <td>&#160;</td>
30282 <td>J721E_DEV_R5FSS1_CORE1</td>
30283 <td>intr</td>
30284 <td>485</td>
30285 </tr>
30286 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30287 <td>135</td>
30288 <td>230</td>
30289 <td>J721E_DEV_R5FSS1_CORE0</td>
30290 <td>intr</td>
30291 <td>486</td>
30292 </tr>
30293 <tr class="row-odd"><td>&#160;</td>
30294 <td>&#160;</td>
30295 <td>&#160;</td>
30296 <td>J721E_DEV_R5FSS1_CORE1</td>
30297 <td>intr</td>
30298 <td>486</td>
30299 </tr>
30300 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30301 <td>135</td>
30302 <td>231</td>
30303 <td>J721E_DEV_R5FSS1_CORE0</td>
30304 <td>intr</td>
30305 <td>487</td>
30306 </tr>
30307 <tr class="row-odd"><td>&#160;</td>
30308 <td>&#160;</td>
30309 <td>&#160;</td>
30310 <td>J721E_DEV_R5FSS1_CORE1</td>
30311 <td>intr</td>
30312 <td>487</td>
30313 </tr>
30314 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30315 <td>135</td>
30316 <td>232</td>
30317 <td>J721E_DEV_R5FSS1_CORE0</td>
30318 <td>intr</td>
30319 <td>488</td>
30320 </tr>
30321 <tr class="row-odd"><td>&#160;</td>
30322 <td>&#160;</td>
30323 <td>&#160;</td>
30324 <td>J721E_DEV_R5FSS1_CORE1</td>
30325 <td>intr</td>
30326 <td>488</td>
30327 </tr>
30328 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30329 <td>135</td>
30330 <td>233</td>
30331 <td>J721E_DEV_R5FSS1_CORE0</td>
30332 <td>intr</td>
30333 <td>489</td>
30334 </tr>
30335 <tr class="row-odd"><td>&#160;</td>
30336 <td>&#160;</td>
30337 <td>&#160;</td>
30338 <td>J721E_DEV_R5FSS1_CORE1</td>
30339 <td>intr</td>
30340 <td>489</td>
30341 </tr>
30342 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30343 <td>135</td>
30344 <td>234</td>
30345 <td>J721E_DEV_R5FSS1_CORE0</td>
30346 <td>intr</td>
30347 <td>490</td>
30348 </tr>
30349 <tr class="row-odd"><td>&#160;</td>
30350 <td>&#160;</td>
30351 <td>&#160;</td>
30352 <td>J721E_DEV_R5FSS1_CORE1</td>
30353 <td>intr</td>
30354 <td>490</td>
30355 </tr>
30356 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30357 <td>135</td>
30358 <td>235</td>
30359 <td>J721E_DEV_R5FSS1_CORE0</td>
30360 <td>intr</td>
30361 <td>491</td>
30362 </tr>
30363 <tr class="row-odd"><td>&#160;</td>
30364 <td>&#160;</td>
30365 <td>&#160;</td>
30366 <td>J721E_DEV_R5FSS1_CORE1</td>
30367 <td>intr</td>
30368 <td>491</td>
30369 </tr>
30370 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30371 <td>135</td>
30372 <td>236</td>
30373 <td>J721E_DEV_R5FSS1_CORE0</td>
30374 <td>intr</td>
30375 <td>492</td>
30376 </tr>
30377 <tr class="row-odd"><td>&#160;</td>
30378 <td>&#160;</td>
30379 <td>&#160;</td>
30380 <td>J721E_DEV_R5FSS1_CORE1</td>
30381 <td>intr</td>
30382 <td>492</td>
30383 </tr>
30384 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30385 <td>135</td>
30386 <td>237</td>
30387 <td>J721E_DEV_R5FSS1_CORE0</td>
30388 <td>intr</td>
30389 <td>493</td>
30390 </tr>
30391 <tr class="row-odd"><td>&#160;</td>
30392 <td>&#160;</td>
30393 <td>&#160;</td>
30394 <td>J721E_DEV_R5FSS1_CORE1</td>
30395 <td>intr</td>
30396 <td>493</td>
30397 </tr>
30398 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30399 <td>135</td>
30400 <td>238</td>
30401 <td>J721E_DEV_R5FSS1_CORE0</td>
30402 <td>intr</td>
30403 <td>494</td>
30404 </tr>
30405 <tr class="row-odd"><td>&#160;</td>
30406 <td>&#160;</td>
30407 <td>&#160;</td>
30408 <td>J721E_DEV_R5FSS1_CORE1</td>
30409 <td>intr</td>
30410 <td>494</td>
30411 </tr>
30412 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30413 <td>135</td>
30414 <td>239</td>
30415 <td>J721E_DEV_R5FSS1_CORE0</td>
30416 <td>intr</td>
30417 <td>495</td>
30418 </tr>
30419 <tr class="row-odd"><td>&#160;</td>
30420 <td>&#160;</td>
30421 <td>&#160;</td>
30422 <td>J721E_DEV_R5FSS1_CORE1</td>
30423 <td>intr</td>
30424 <td>495</td>
30425 </tr>
30426 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30427 <td>135</td>
30428 <td>240</td>
30429 <td>J721E_DEV_R5FSS1_CORE0</td>
30430 <td>intr</td>
30431 <td>496</td>
30432 </tr>
30433 <tr class="row-odd"><td>&#160;</td>
30434 <td>&#160;</td>
30435 <td>&#160;</td>
30436 <td>J721E_DEV_R5FSS1_CORE1</td>
30437 <td>intr</td>
30438 <td>496</td>
30439 </tr>
30440 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30441 <td>135</td>
30442 <td>241</td>
30443 <td>J721E_DEV_R5FSS1_CORE0</td>
30444 <td>intr</td>
30445 <td>497</td>
30446 </tr>
30447 <tr class="row-odd"><td>&#160;</td>
30448 <td>&#160;</td>
30449 <td>&#160;</td>
30450 <td>J721E_DEV_R5FSS1_CORE1</td>
30451 <td>intr</td>
30452 <td>497</td>
30453 </tr>
30454 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30455 <td>135</td>
30456 <td>242</td>
30457 <td>J721E_DEV_R5FSS1_CORE0</td>
30458 <td>intr</td>
30459 <td>498</td>
30460 </tr>
30461 <tr class="row-odd"><td>&#160;</td>
30462 <td>&#160;</td>
30463 <td>&#160;</td>
30464 <td>J721E_DEV_R5FSS1_CORE1</td>
30465 <td>intr</td>
30466 <td>498</td>
30467 </tr>
30468 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30469 <td>135</td>
30470 <td>243</td>
30471 <td>J721E_DEV_R5FSS1_CORE0</td>
30472 <td>intr</td>
30473 <td>499</td>
30474 </tr>
30475 <tr class="row-odd"><td>&#160;</td>
30476 <td>&#160;</td>
30477 <td>&#160;</td>
30478 <td>J721E_DEV_R5FSS1_CORE1</td>
30479 <td>intr</td>
30480 <td>499</td>
30481 </tr>
30482 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30483 <td>135</td>
30484 <td>244</td>
30485 <td>J721E_DEV_R5FSS1_CORE0</td>
30486 <td>intr</td>
30487 <td>500</td>
30488 </tr>
30489 <tr class="row-odd"><td>&#160;</td>
30490 <td>&#160;</td>
30491 <td>&#160;</td>
30492 <td>J721E_DEV_R5FSS1_CORE1</td>
30493 <td>intr</td>
30494 <td>500</td>
30495 </tr>
30496 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30497 <td>135</td>
30498 <td>245</td>
30499 <td>J721E_DEV_R5FSS1_CORE0</td>
30500 <td>intr</td>
30501 <td>501</td>
30502 </tr>
30503 <tr class="row-odd"><td>&#160;</td>
30504 <td>&#160;</td>
30505 <td>&#160;</td>
30506 <td>J721E_DEV_R5FSS1_CORE1</td>
30507 <td>intr</td>
30508 <td>501</td>
30509 </tr>
30510 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30511 <td>135</td>
30512 <td>246</td>
30513 <td>J721E_DEV_R5FSS1_CORE0</td>
30514 <td>intr</td>
30515 <td>502</td>
30516 </tr>
30517 <tr class="row-odd"><td>&#160;</td>
30518 <td>&#160;</td>
30519 <td>&#160;</td>
30520 <td>J721E_DEV_R5FSS1_CORE1</td>
30521 <td>intr</td>
30522 <td>502</td>
30523 </tr>
30524 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30525 <td>135</td>
30526 <td>247</td>
30527 <td>J721E_DEV_R5FSS1_CORE0</td>
30528 <td>intr</td>
30529 <td>503</td>
30530 </tr>
30531 <tr class="row-odd"><td>&#160;</td>
30532 <td>&#160;</td>
30533 <td>&#160;</td>
30534 <td>J721E_DEV_R5FSS1_CORE1</td>
30535 <td>intr</td>
30536 <td>503</td>
30537 </tr>
30538 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30539 <td>135</td>
30540 <td>248</td>
30541 <td>J721E_DEV_R5FSS1_CORE0</td>
30542 <td>intr</td>
30543 <td>504</td>
30544 </tr>
30545 <tr class="row-odd"><td>&#160;</td>
30546 <td>&#160;</td>
30547 <td>&#160;</td>
30548 <td>J721E_DEV_R5FSS1_CORE1</td>
30549 <td>intr</td>
30550 <td>504</td>
30551 </tr>
30552 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30553 <td>135</td>
30554 <td>249</td>
30555 <td>J721E_DEV_R5FSS1_CORE0</td>
30556 <td>intr</td>
30557 <td>505</td>
30558 </tr>
30559 <tr class="row-odd"><td>&#160;</td>
30560 <td>&#160;</td>
30561 <td>&#160;</td>
30562 <td>J721E_DEV_R5FSS1_CORE1</td>
30563 <td>intr</td>
30564 <td>505</td>
30565 </tr>
30566 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30567 <td>135</td>
30568 <td>250</td>
30569 <td>J721E_DEV_R5FSS1_CORE0</td>
30570 <td>intr</td>
30571 <td>506</td>
30572 </tr>
30573 <tr class="row-odd"><td>&#160;</td>
30574 <td>&#160;</td>
30575 <td>&#160;</td>
30576 <td>J721E_DEV_R5FSS1_CORE1</td>
30577 <td>intr</td>
30578 <td>506</td>
30579 </tr>
30580 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30581 <td>135</td>
30582 <td>251</td>
30583 <td>J721E_DEV_R5FSS1_CORE0</td>
30584 <td>intr</td>
30585 <td>507</td>
30586 </tr>
30587 <tr class="row-odd"><td>&#160;</td>
30588 <td>&#160;</td>
30589 <td>&#160;</td>
30590 <td>J721E_DEV_R5FSS1_CORE1</td>
30591 <td>intr</td>
30592 <td>507</td>
30593 </tr>
30594 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30595 <td>135</td>
30596 <td>252</td>
30597 <td>J721E_DEV_R5FSS1_CORE0</td>
30598 <td>intr</td>
30599 <td>508</td>
30600 </tr>
30601 <tr class="row-odd"><td>&#160;</td>
30602 <td>&#160;</td>
30603 <td>&#160;</td>
30604 <td>J721E_DEV_R5FSS1_CORE1</td>
30605 <td>intr</td>
30606 <td>508</td>
30607 </tr>
30608 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30609 <td>135</td>
30610 <td>253</td>
30611 <td>J721E_DEV_R5FSS1_CORE0</td>
30612 <td>intr</td>
30613 <td>509</td>
30614 </tr>
30615 <tr class="row-odd"><td>&#160;</td>
30616 <td>&#160;</td>
30617 <td>&#160;</td>
30618 <td>J721E_DEV_R5FSS1_CORE1</td>
30619 <td>intr</td>
30620 <td>509</td>
30621 </tr>
30622 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30623 <td>135</td>
30624 <td>254</td>
30625 <td>J721E_DEV_R5FSS1_CORE0</td>
30626 <td>intr</td>
30627 <td>510</td>
30628 </tr>
30629 <tr class="row-odd"><td>&#160;</td>
30630 <td>&#160;</td>
30631 <td>&#160;</td>
30632 <td>J721E_DEV_R5FSS1_CORE1</td>
30633 <td>intr</td>
30634 <td>510</td>
30635 </tr>
30636 <tr class="row-even"><td>J721E_DEV_R5FSS1_INTROUTER0</td>
30637 <td>135</td>
30638 <td>255</td>
30639 <td>J721E_DEV_R5FSS1_CORE0</td>
30640 <td>intr</td>
30641 <td>511</td>
30642 </tr>
30643 <tr class="row-odd"><td>&#160;</td>
30644 <td>&#160;</td>
30645 <td>&#160;</td>
30646 <td>J721E_DEV_R5FSS1_CORE1</td>
30647 <td>intr</td>
30648 <td>511</td>
30649 </tr>
30650 </tbody>
30651 </table>
30652 </div>
30653 <div class="section" id="timesync-intrtr0-interrupt-router-input-sources">
30654 <span id="pub-soc-j721e-timesync-intrtr0-input-src-list"></span><h2>TIMESYNC_INTRTR0 Interrupt Router Input Sources<a class="headerlink" href="#timesync-intrtr0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
30655 <div class="admonition warning">
30656 <p class="first admonition-title">Warning</p>
30657 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
30658 host within the RM Board Configuration resource assignment array.  The RM
30659 Board Configuration is rejected if an overlap with a reserved resource is
30660 detected.</p>
30661 </div>
30662 <table border="1" class="docutils">
30663 <colgroup>
30664 <col width="23%" />
30665 <col width="13%" />
30666 <col width="15%" />
30667 <col width="18%" />
30668 <col width="17%" />
30669 <col width="13%" />
30670 </colgroup>
30671 <thead valign="bottom">
30672 <tr class="row-odd"><th class="head">IR Name</th>
30673 <th class="head">IR Device ID</th>
30674 <th class="head">IR Input Index</th>
30675 <th class="head">Source Name</th>
30676 <th class="head">Source Interface</th>
30677 <th class="head">Source Index</th>
30678 </tr>
30679 </thead>
30680 <tbody valign="top">
30681 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30682 <td>136</td>
30683 <td>0</td>
30684 <td>Not Connected</td>
30685 <td>&#160;</td>
30686 <td>&#160;</td>
30687 </tr>
30688 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30689 <td>136</td>
30690 <td>1</td>
30691 <td>J721E_DEV_GTC0</td>
30692 <td>gtc_push_event</td>
30693 <td>0</td>
30694 </tr>
30695 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30696 <td>136</td>
30697 <td>2</td>
30698 <td>J721E_DEV_TIMER14</td>
30699 <td>timer_pwm</td>
30700 <td>0</td>
30701 </tr>
30702 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30703 <td>136</td>
30704 <td>3</td>
30705 <td>J721E_DEV_TIMER15</td>
30706 <td>timer_pwm</td>
30707 <td>0</td>
30708 </tr>
30709 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30710 <td>136</td>
30711 <td>4</td>
30712 <td>J721E_DEV_NAVSS0</td>
30713 <td>cpts0_genf0</td>
30714 <td>0</td>
30715 </tr>
30716 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30717 <td>136</td>
30718 <td>5</td>
30719 <td>J721E_DEV_NAVSS0</td>
30720 <td>cpts0_genf1</td>
30721 <td>0</td>
30722 </tr>
30723 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30724 <td>136</td>
30725 <td>6</td>
30726 <td>J721E_DEV_NAVSS0</td>
30727 <td>cpts0_genf2</td>
30728 <td>0</td>
30729 </tr>
30730 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30731 <td>136</td>
30732 <td>7</td>
30733 <td>J721E_DEV_NAVSS0</td>
30734 <td>cpts0_genf3</td>
30735 <td>0</td>
30736 </tr>
30737 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30738 <td>136</td>
30739 <td>8</td>
30740 <td>J721E_DEV_NAVSS0</td>
30741 <td>cpts0_genf4</td>
30742 <td>0</td>
30743 </tr>
30744 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30745 <td>136</td>
30746 <td>9</td>
30747 <td>J721E_DEV_NAVSS0</td>
30748 <td>cpts0_genf5</td>
30749 <td>0</td>
30750 </tr>
30751 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30752 <td>136</td>
30753 <td>10</td>
30754 <td>J721E_DEV_PCIE0</td>
30755 <td>pcie_cpts_genf0</td>
30756 <td>0</td>
30757 </tr>
30758 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30759 <td>136</td>
30760 <td>11</td>
30761 <td>J721E_DEV_PCIE1</td>
30762 <td>pcie_cpts_genf0</td>
30763 <td>0</td>
30764 </tr>
30765 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30766 <td>136</td>
30767 <td>12</td>
30768 <td>J721E_DEV_PCIE2</td>
30769 <td>pcie_cpts_genf0</td>
30770 <td>0</td>
30771 </tr>
30772 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30773 <td>136</td>
30774 <td>13</td>
30775 <td>J721E_DEV_PCIE3</td>
30776 <td>pcie_cpts_genf0</td>
30777 <td>0</td>
30778 </tr>
30779 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30780 <td>136</td>
30781 <td>14</td>
30782 <td>J721E_DEV_CPSW0</td>
30783 <td>cpts_genf0</td>
30784 <td>0</td>
30785 </tr>
30786 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30787 <td>136</td>
30788 <td>15</td>
30789 <td>J721E_DEV_CPSW0</td>
30790 <td>cpts_genf1</td>
30791 <td>0</td>
30792 </tr>
30793 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30794 <td>136</td>
30795 <td>16</td>
30796 <td>J721E_DEV_MCU_CPSW0</td>
30797 <td>cpts_genf0</td>
30798 <td>0</td>
30799 </tr>
30800 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30801 <td>136</td>
30802 <td>17</td>
30803 <td>J721E_DEV_MCU_CPSW0</td>
30804 <td>cpts_genf1</td>
30805 <td>0</td>
30806 </tr>
30807 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30808 <td>136</td>
30809 <td>18</td>
30810 <td>Not Connected</td>
30811 <td>&#160;</td>
30812 <td>&#160;</td>
30813 </tr>
30814 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30815 <td>136</td>
30816 <td>19</td>
30817 <td>Not Connected</td>
30818 <td>&#160;</td>
30819 <td>&#160;</td>
30820 </tr>
30821 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30822 <td>136</td>
30823 <td>20</td>
30824 <td>J721E_DEV_PCIE0</td>
30825 <td>pcie_cpts_hw1_push</td>
30826 <td>0</td>
30827 </tr>
30828 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30829 <td>136</td>
30830 <td>21</td>
30831 <td>J721E_DEV_PCIE1</td>
30832 <td>pcie_cpts_hw1_push</td>
30833 <td>0</td>
30834 </tr>
30835 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30836 <td>136</td>
30837 <td>22</td>
30838 <td>J721E_DEV_PCIE2</td>
30839 <td>pcie_cpts_hw1_push</td>
30840 <td>0</td>
30841 </tr>
30842 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30843 <td>136</td>
30844 <td>23</td>
30845 <td>J721E_DEV_PCIE3</td>
30846 <td>pcie_cpts_hw1_push</td>
30847 <td>0</td>
30848 </tr>
30849 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30850 <td>136</td>
30851 <td>24</td>
30852 <td>J721E_DEV_PRU_ICSSG0</td>
30853 <td>pr1_edc0_sync0_out</td>
30854 <td>0</td>
30855 </tr>
30856 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30857 <td>136</td>
30858 <td>25</td>
30859 <td>J721E_DEV_PRU_ICSSG0</td>
30860 <td>pr1_edc0_sync1_out</td>
30861 <td>0</td>
30862 </tr>
30863 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30864 <td>136</td>
30865 <td>26</td>
30866 <td>J721E_DEV_PRU_ICSSG0</td>
30867 <td>pr1_edc1_sync0_out</td>
30868 <td>0</td>
30869 </tr>
30870 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30871 <td>136</td>
30872 <td>27</td>
30873 <td>J721E_DEV_PRU_ICSSG0</td>
30874 <td>pr1_edc1_sync1_out</td>
30875 <td>0</td>
30876 </tr>
30877 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30878 <td>136</td>
30879 <td>28</td>
30880 <td>J721E_DEV_PRU_ICSSG1</td>
30881 <td>pr1_edc0_sync0_out</td>
30882 <td>0</td>
30883 </tr>
30884 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30885 <td>136</td>
30886 <td>29</td>
30887 <td>J721E_DEV_PRU_ICSSG1</td>
30888 <td>pr1_edc0_sync1_out</td>
30889 <td>0</td>
30890 </tr>
30891 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30892 <td>136</td>
30893 <td>30</td>
30894 <td>J721E_DEV_PRU_ICSSG1</td>
30895 <td>pr1_edc1_sync0_out</td>
30896 <td>0</td>
30897 </tr>
30898 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30899 <td>136</td>
30900 <td>31</td>
30901 <td>J721E_DEV_PRU_ICSSG1</td>
30902 <td>pr1_edc1_sync1_out</td>
30903 <td>0</td>
30904 </tr>
30905 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30906 <td>136</td>
30907 <td>32</td>
30908 <td>J721E_DEV_PCIE0</td>
30909 <td>pcie_cpts_sync</td>
30910 <td>0</td>
30911 </tr>
30912 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30913 <td>136</td>
30914 <td>33</td>
30915 <td>J721E_DEV_PCIE1</td>
30916 <td>pcie_cpts_sync</td>
30917 <td>0</td>
30918 </tr>
30919 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30920 <td>136</td>
30921 <td>34</td>
30922 <td>J721E_DEV_PCIE2</td>
30923 <td>pcie_cpts_sync</td>
30924 <td>0</td>
30925 </tr>
30926 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30927 <td>136</td>
30928 <td>35</td>
30929 <td>J721E_DEV_PCIE3</td>
30930 <td>pcie_cpts_sync</td>
30931 <td>0</td>
30932 </tr>
30933 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30934 <td>136</td>
30935 <td>36</td>
30936 <td>J721E_DEV_NAVSS0</td>
30937 <td>cpts0_sync</td>
30938 <td>0</td>
30939 </tr>
30940 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30941 <td>136</td>
30942 <td>37</td>
30943 <td>J721E_DEV_CPSW0</td>
30944 <td>cpts_sync</td>
30945 <td>0</td>
30946 </tr>
30947 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30948 <td>136</td>
30949 <td>38</td>
30950 <td>J721E_DEV_MCU_CPSW0</td>
30951 <td>cpts_sync</td>
30952 <td>0</td>
30953 </tr>
30954 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30955 <td>136</td>
30956 <td>39</td>
30957 <td>Not Connected</td>
30958 <td>&#160;</td>
30959 <td>&#160;</td>
30960 </tr>
30961 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30962 <td>136</td>
30963 <td>40</td>
30964 <td>J721E_DEV_TIMER16</td>
30965 <td>timer_pwm</td>
30966 <td>0</td>
30967 </tr>
30968 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30969 <td>136</td>
30970 <td>41</td>
30971 <td>J721E_DEV_TIMER17</td>
30972 <td>timer_pwm</td>
30973 <td>0</td>
30974 </tr>
30975 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30976 <td>136</td>
30977 <td>42</td>
30978 <td>J721E_DEV_TIMER18</td>
30979 <td>timer_pwm</td>
30980 <td>0</td>
30981 </tr>
30982 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30983 <td>136</td>
30984 <td>43</td>
30985 <td>J721E_DEV_TIMER19</td>
30986 <td>timer_pwm</td>
30987 <td>0</td>
30988 </tr>
30989 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30990 <td>136</td>
30991 <td>44</td>
30992 <td>Not Connected</td>
30993 <td>&#160;</td>
30994 <td>&#160;</td>
30995 </tr>
30996 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
30997 <td>136</td>
30998 <td>45</td>
30999 <td>Not Connected</td>
31000 <td>&#160;</td>
31001 <td>&#160;</td>
31002 </tr>
31003 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31004 <td>136</td>
31005 <td>46</td>
31006 <td>Not Connected</td>
31007 <td>&#160;</td>
31008 <td>&#160;</td>
31009 </tr>
31010 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31011 <td>136</td>
31012 <td>47</td>
31013 <td>Not Connected</td>
31014 <td>&#160;</td>
31015 <td>&#160;</td>
31016 </tr>
31017 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31018 <td>136</td>
31019 <td>48</td>
31020 <td>Not Connected</td>
31021 <td>&#160;</td>
31022 <td>&#160;</td>
31023 </tr>
31024 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31025 <td>136</td>
31026 <td>49</td>
31027 <td>Not Connected</td>
31028 <td>&#160;</td>
31029 <td>&#160;</td>
31030 </tr>
31031 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31032 <td>136</td>
31033 <td>50</td>
31034 <td>Not Connected</td>
31035 <td>&#160;</td>
31036 <td>&#160;</td>
31037 </tr>
31038 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31039 <td>136</td>
31040 <td>51</td>
31041 <td>Not Connected</td>
31042 <td>&#160;</td>
31043 <td>&#160;</td>
31044 </tr>
31045 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31046 <td>136</td>
31047 <td>52</td>
31048 <td>Not Connected</td>
31049 <td>&#160;</td>
31050 <td>&#160;</td>
31051 </tr>
31052 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31053 <td>136</td>
31054 <td>53</td>
31055 <td>Not Connected</td>
31056 <td>&#160;</td>
31057 <td>&#160;</td>
31058 </tr>
31059 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31060 <td>136</td>
31061 <td>54</td>
31062 <td>Not Connected</td>
31063 <td>&#160;</td>
31064 <td>&#160;</td>
31065 </tr>
31066 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31067 <td>136</td>
31068 <td>55</td>
31069 <td>Not Connected</td>
31070 <td>&#160;</td>
31071 <td>&#160;</td>
31072 </tr>
31073 </tbody>
31074 </table>
31075 </div>
31076 <div class="section" id="timesync-intrtr0-interrupt-router-output-destinations">
31077 <span id="pub-soc-j721e-timesync-intrtr0-output-src-list"></span><h2>TIMESYNC_INTRTR0 Interrupt Router Output Destinations<a class="headerlink" href="#timesync-intrtr0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
31078 <div class="admonition warning">
31079 <p class="first admonition-title">Warning</p>
31080 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
31081 host within the RM Board Configuration resource assignment array.  The RM
31082 Board Configuration is rejected if an overlap with a reserved resource is
31083 detected.</p>
31084 </div>
31085 <table border="1" class="docutils">
31086 <colgroup>
31087 <col width="19%" />
31088 <col width="11%" />
31089 <col width="13%" />
31090 <col width="24%" />
31091 <col width="17%" />
31092 <col width="15%" />
31093 </colgroup>
31094 <thead valign="bottom">
31095 <tr class="row-odd"><th class="head">IR Name</th>
31096 <th class="head">IR Device ID</th>
31097 <th class="head">IR Output Index</th>
31098 <th class="head">Destination Name</th>
31099 <th class="head">Destination Interface</th>
31100 <th class="head">Destination Index</th>
31101 </tr>
31102 </thead>
31103 <tbody valign="top">
31104 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31105 <td>136</td>
31106 <td>0</td>
31107 <td>J721E_DEV_NAVSS0</td>
31108 <td>cpts0_hw1_push</td>
31109 <td>0</td>
31110 </tr>
31111 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31112 <td>136</td>
31113 <td>1</td>
31114 <td>J721E_DEV_NAVSS0</td>
31115 <td>cpts0_hw2_push</td>
31116 <td>0</td>
31117 </tr>
31118 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31119 <td>136</td>
31120 <td>2</td>
31121 <td>J721E_DEV_NAVSS0</td>
31122 <td>cpts0_hw3_push</td>
31123 <td>0</td>
31124 </tr>
31125 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31126 <td>136</td>
31127 <td>3</td>
31128 <td>J721E_DEV_NAVSS0</td>
31129 <td>cpts0_hw4_push</td>
31130 <td>0</td>
31131 </tr>
31132 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31133 <td>136</td>
31134 <td>4</td>
31135 <td>J721E_DEV_NAVSS0</td>
31136 <td>cpts0_hw5_push</td>
31137 <td>0</td>
31138 </tr>
31139 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31140 <td>136</td>
31141 <td>5</td>
31142 <td>J721E_DEV_NAVSS0</td>
31143 <td>cpts0_hw6_push</td>
31144 <td>0</td>
31145 </tr>
31146 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31147 <td>136</td>
31148 <td>6</td>
31149 <td>J721E_DEV_NAVSS0</td>
31150 <td>cpts0_hw7_push</td>
31151 <td>0</td>
31152 </tr>
31153 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31154 <td>136</td>
31155 <td>7</td>
31156 <td>J721E_DEV_NAVSS0</td>
31157 <td>cpts0_hw8_push</td>
31158 <td>0</td>
31159 </tr>
31160 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31161 <td>136</td>
31162 <td>8</td>
31163 <td>J721E_DEV_PRU_ICSSG0</td>
31164 <td>pr1_edc0_latch0_in</td>
31165 <td>0</td>
31166 </tr>
31167 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31168 <td>136</td>
31169 <td>9</td>
31170 <td>J721E_DEV_PRU_ICSSG0</td>
31171 <td>pr1_edc0_latch1_in</td>
31172 <td>0</td>
31173 </tr>
31174 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31175 <td>136</td>
31176 <td>10</td>
31177 <td>J721E_DEV_PRU_ICSSG0</td>
31178 <td>pr1_edc1_latch0_in</td>
31179 <td>0</td>
31180 </tr>
31181 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31182 <td>136</td>
31183 <td>11</td>
31184 <td>J721E_DEV_PRU_ICSSG0</td>
31185 <td>pr1_edc1_latch1_in</td>
31186 <td>0</td>
31187 </tr>
31188 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31189 <td>136</td>
31190 <td>12</td>
31191 <td>J721E_DEV_PRU_ICSSG1</td>
31192 <td>pr1_edc0_latch0_in</td>
31193 <td>0</td>
31194 </tr>
31195 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31196 <td>136</td>
31197 <td>13</td>
31198 <td>J721E_DEV_PRU_ICSSG1</td>
31199 <td>pr1_edc0_latch1_in</td>
31200 <td>0</td>
31201 </tr>
31202 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31203 <td>136</td>
31204 <td>14</td>
31205 <td>J721E_DEV_PRU_ICSSG1</td>
31206 <td>pr1_edc1_latch0_in</td>
31207 <td>0</td>
31208 </tr>
31209 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31210 <td>136</td>
31211 <td>15</td>
31212 <td>J721E_DEV_PRU_ICSSG1</td>
31213 <td>pr1_edc1_latch1_in</td>
31214 <td>0</td>
31215 </tr>
31216 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31217 <td>136</td>
31218 <td>16</td>
31219 <td>Not Connected</td>
31220 <td>&#160;</td>
31221 <td>&#160;</td>
31222 </tr>
31223 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31224 <td>136</td>
31225 <td>17</td>
31226 <td>Not Connected</td>
31227 <td>&#160;</td>
31228 <td>&#160;</td>
31229 </tr>
31230 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31231 <td>136</td>
31232 <td>18</td>
31233 <td>Not Connected</td>
31234 <td>&#160;</td>
31235 <td>&#160;</td>
31236 </tr>
31237 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31238 <td>136</td>
31239 <td>19</td>
31240 <td>Not Connected</td>
31241 <td>&#160;</td>
31242 <td>&#160;</td>
31243 </tr>
31244 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31245 <td>136</td>
31246 <td>20</td>
31247 <td>J721E_DEV_PCIE0</td>
31248 <td>pcie_cpts_hw2_push</td>
31249 <td>0</td>
31250 </tr>
31251 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31252 <td>136</td>
31253 <td>21</td>
31254 <td>J721E_DEV_PCIE1</td>
31255 <td>pcie_cpts_hw2_push</td>
31256 <td>0</td>
31257 </tr>
31258 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31259 <td>136</td>
31260 <td>22</td>
31261 <td>J721E_DEV_PCIE2</td>
31262 <td>pcie_cpts_hw2_push</td>
31263 <td>0</td>
31264 </tr>
31265 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31266 <td>136</td>
31267 <td>23</td>
31268 <td>J721E_DEV_PCIE3</td>
31269 <td>pcie_cpts_hw2_push</td>
31270 <td>0</td>
31271 </tr>
31272 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31273 <td>136</td>
31274 <td>24</td>
31275 <td>J721E_DEV_MCU_CPSW0</td>
31276 <td>cpts_hw3_push</td>
31277 <td>0</td>
31278 </tr>
31279 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31280 <td>136</td>
31281 <td>25</td>
31282 <td>J721E_DEV_MCU_CPSW0</td>
31283 <td>cpts_hw4_push</td>
31284 <td>0</td>
31285 </tr>
31286 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31287 <td>136</td>
31288 <td>26</td>
31289 <td>J721E_DEV_CPSW0</td>
31290 <td>cpts_hw1_push</td>
31291 <td>0</td>
31292 </tr>
31293 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31294 <td>136</td>
31295 <td>27</td>
31296 <td>J721E_DEV_CPSW0</td>
31297 <td>cpts_hw2_push</td>
31298 <td>0</td>
31299 </tr>
31300 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31301 <td>136</td>
31302 <td>28</td>
31303 <td>J721E_DEV_CPSW0</td>
31304 <td>cpts_hw3_push</td>
31305 <td>0</td>
31306 </tr>
31307 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31308 <td>136</td>
31309 <td>29</td>
31310 <td>J721E_DEV_CPSW0</td>
31311 <td>cpts_hw4_push</td>
31312 <td>0</td>
31313 </tr>
31314 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31315 <td>136</td>
31316 <td>30</td>
31317 <td>J721E_DEV_CPSW0</td>
31318 <td>cpts_hw5_push</td>
31319 <td>0</td>
31320 </tr>
31321 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31322 <td>136</td>
31323 <td>31</td>
31324 <td>J721E_DEV_CPSW0</td>
31325 <td>cpts_hw6_push</td>
31326 <td>0</td>
31327 </tr>
31328 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31329 <td>136</td>
31330 <td>32</td>
31331 <td>J721E_DEV_CPSW0</td>
31332 <td>cpts_hw7_push</td>
31333 <td>0</td>
31334 </tr>
31335 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31336 <td>136</td>
31337 <td>33</td>
31338 <td>J721E_DEV_CPSW0</td>
31339 <td>cpts_hw8_push</td>
31340 <td>0</td>
31341 </tr>
31342 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31343 <td>136</td>
31344 <td>34</td>
31345 <td>Not Connected</td>
31346 <td>&#160;</td>
31347 <td>&#160;</td>
31348 </tr>
31349 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31350 <td>136</td>
31351 <td>35</td>
31352 <td>Not Connected</td>
31353 <td>&#160;</td>
31354 <td>&#160;</td>
31355 </tr>
31356 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31357 <td>136</td>
31358 <td>36</td>
31359 <td>Not Connected</td>
31360 <td>&#160;</td>
31361 <td>&#160;</td>
31362 </tr>
31363 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31364 <td>136</td>
31365 <td>37</td>
31366 <td>Not Connected</td>
31367 <td>&#160;</td>
31368 <td>&#160;</td>
31369 </tr>
31370 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31371 <td>136</td>
31372 <td>38</td>
31373 <td>Not Connected</td>
31374 <td>&#160;</td>
31375 <td>&#160;</td>
31376 </tr>
31377 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31378 <td>136</td>
31379 <td>39</td>
31380 <td>Not Connected</td>
31381 <td>&#160;</td>
31382 <td>&#160;</td>
31383 </tr>
31384 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31385 <td>136</td>
31386 <td>40</td>
31387 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
31388 <td>intaggr_levi_pend</td>
31389 <td>52</td>
31390 </tr>
31391 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31392 <td>136</td>
31393 <td>41</td>
31394 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
31395 <td>intaggr_levi_pend</td>
31396 <td>53</td>
31397 </tr>
31398 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31399 <td>136</td>
31400 <td>42</td>
31401 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
31402 <td>intaggr_levi_pend</td>
31403 <td>54</td>
31404 </tr>
31405 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31406 <td>136</td>
31407 <td>43</td>
31408 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
31409 <td>intaggr_levi_pend</td>
31410 <td>55</td>
31411 </tr>
31412 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31413 <td>136</td>
31414 <td>44</td>
31415 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
31416 <td>intaggr_levi_pend</td>
31417 <td>56</td>
31418 </tr>
31419 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31420 <td>136</td>
31421 <td>45</td>
31422 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
31423 <td>intaggr_levi_pend</td>
31424 <td>57</td>
31425 </tr>
31426 <tr class="row-even"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31427 <td>136</td>
31428 <td>46</td>
31429 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
31430 <td>intaggr_levi_pend</td>
31431 <td>58</td>
31432 </tr>
31433 <tr class="row-odd"><td>J721E_DEV_TIMESYNC_INTRTR0</td>
31434 <td>136</td>
31435 <td>47</td>
31436 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
31437 <td>intaggr_levi_pend</td>
31438 <td>59</td>
31439 </tr>
31440 </tbody>
31441 </table>
31442 </div>
31443 <div class="section" id="wkup-gpiomux-intrtr0-interrupt-router-input-sources">
31444 <span id="pub-soc-j721e-wkup-gpiomux-intrtr0-input-src-list"></span><h2>WKUP_GPIOMUX_INTRTR0 Interrupt Router Input Sources<a class="headerlink" href="#wkup-gpiomux-intrtr0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
31445 <div class="admonition warning">
31446 <p class="first admonition-title">Warning</p>
31447 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
31448 host within the RM Board Configuration resource assignment array.  The RM
31449 Board Configuration is rejected if an overlap with a reserved resource is
31450 detected.</p>
31451 </div>
31452 <table border="1" class="docutils">
31453 <colgroup>
31454 <col width="26%" />
31455 <col width="13%" />
31456 <col width="15%" />
31457 <col width="18%" />
31458 <col width="16%" />
31459 <col width="13%" />
31460 </colgroup>
31461 <thead valign="bottom">
31462 <tr class="row-odd"><th class="head">IR Name</th>
31463 <th class="head">IR Device ID</th>
31464 <th class="head">IR Input Index</th>
31465 <th class="head">Source Name</th>
31466 <th class="head">Source Interface</th>
31467 <th class="head">Source Index</th>
31468 </tr>
31469 </thead>
31470 <tbody valign="top">
31471 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31472 <td>137</td>
31473 <td>0</td>
31474 <td>Not Connected</td>
31475 <td>&#160;</td>
31476 <td>&#160;</td>
31477 </tr>
31478 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31479 <td>137</td>
31480 <td>1</td>
31481 <td>Not Connected</td>
31482 <td>&#160;</td>
31483 <td>&#160;</td>
31484 </tr>
31485 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31486 <td>137</td>
31487 <td>2</td>
31488 <td>Not Connected</td>
31489 <td>&#160;</td>
31490 <td>&#160;</td>
31491 </tr>
31492 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31493 <td>137</td>
31494 <td>3</td>
31495 <td>Not Connected</td>
31496 <td>&#160;</td>
31497 <td>&#160;</td>
31498 </tr>
31499 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31500 <td>137</td>
31501 <td>4</td>
31502 <td>Not Connected</td>
31503 <td>&#160;</td>
31504 <td>&#160;</td>
31505 </tr>
31506 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31507 <td>137</td>
31508 <td>5</td>
31509 <td>Not Connected</td>
31510 <td>&#160;</td>
31511 <td>&#160;</td>
31512 </tr>
31513 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31514 <td>137</td>
31515 <td>6</td>
31516 <td>Not Connected</td>
31517 <td>&#160;</td>
31518 <td>&#160;</td>
31519 </tr>
31520 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31521 <td>137</td>
31522 <td>7</td>
31523 <td>Not Connected</td>
31524 <td>&#160;</td>
31525 <td>&#160;</td>
31526 </tr>
31527 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31528 <td>137</td>
31529 <td>8</td>
31530 <td>Not Connected</td>
31531 <td>&#160;</td>
31532 <td>&#160;</td>
31533 </tr>
31534 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31535 <td>137</td>
31536 <td>9</td>
31537 <td>Not Connected</td>
31538 <td>&#160;</td>
31539 <td>&#160;</td>
31540 </tr>
31541 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31542 <td>137</td>
31543 <td>10</td>
31544 <td>Not Connected</td>
31545 <td>&#160;</td>
31546 <td>&#160;</td>
31547 </tr>
31548 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31549 <td>137</td>
31550 <td>11</td>
31551 <td>Not Connected</td>
31552 <td>&#160;</td>
31553 <td>&#160;</td>
31554 </tr>
31555 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31556 <td>137</td>
31557 <td>12</td>
31558 <td>Not Connected</td>
31559 <td>&#160;</td>
31560 <td>&#160;</td>
31561 </tr>
31562 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31563 <td>137</td>
31564 <td>13</td>
31565 <td>Not Connected</td>
31566 <td>&#160;</td>
31567 <td>&#160;</td>
31568 </tr>
31569 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31570 <td>137</td>
31571 <td>14</td>
31572 <td>Not Connected</td>
31573 <td>&#160;</td>
31574 <td>&#160;</td>
31575 </tr>
31576 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31577 <td>137</td>
31578 <td>15</td>
31579 <td>Not Connected</td>
31580 <td>&#160;</td>
31581 <td>&#160;</td>
31582 </tr>
31583 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31584 <td>137</td>
31585 <td>16</td>
31586 <td>Not Connected</td>
31587 <td>&#160;</td>
31588 <td>&#160;</td>
31589 </tr>
31590 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31591 <td>137</td>
31592 <td>17</td>
31593 <td>Not Connected</td>
31594 <td>&#160;</td>
31595 <td>&#160;</td>
31596 </tr>
31597 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31598 <td>137</td>
31599 <td>18</td>
31600 <td>Not Connected</td>
31601 <td>&#160;</td>
31602 <td>&#160;</td>
31603 </tr>
31604 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31605 <td>137</td>
31606 <td>19</td>
31607 <td>Not Connected</td>
31608 <td>&#160;</td>
31609 <td>&#160;</td>
31610 </tr>
31611 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31612 <td>137</td>
31613 <td>20</td>
31614 <td>Not Connected</td>
31615 <td>&#160;</td>
31616 <td>&#160;</td>
31617 </tr>
31618 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31619 <td>137</td>
31620 <td>21</td>
31621 <td>Not Connected</td>
31622 <td>&#160;</td>
31623 <td>&#160;</td>
31624 </tr>
31625 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31626 <td>137</td>
31627 <td>22</td>
31628 <td>Not Connected</td>
31629 <td>&#160;</td>
31630 <td>&#160;</td>
31631 </tr>
31632 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31633 <td>137</td>
31634 <td>23</td>
31635 <td>Not Connected</td>
31636 <td>&#160;</td>
31637 <td>&#160;</td>
31638 </tr>
31639 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31640 <td>137</td>
31641 <td>24</td>
31642 <td>Not Connected</td>
31643 <td>&#160;</td>
31644 <td>&#160;</td>
31645 </tr>
31646 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31647 <td>137</td>
31648 <td>25</td>
31649 <td>Not Connected</td>
31650 <td>&#160;</td>
31651 <td>&#160;</td>
31652 </tr>
31653 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31654 <td>137</td>
31655 <td>26</td>
31656 <td>Not Connected</td>
31657 <td>&#160;</td>
31658 <td>&#160;</td>
31659 </tr>
31660 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31661 <td>137</td>
31662 <td>27</td>
31663 <td>Not Connected</td>
31664 <td>&#160;</td>
31665 <td>&#160;</td>
31666 </tr>
31667 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31668 <td>137</td>
31669 <td>28</td>
31670 <td>Not Connected</td>
31671 <td>&#160;</td>
31672 <td>&#160;</td>
31673 </tr>
31674 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31675 <td>137</td>
31676 <td>29</td>
31677 <td>Not Connected</td>
31678 <td>&#160;</td>
31679 <td>&#160;</td>
31680 </tr>
31681 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31682 <td>137</td>
31683 <td>30</td>
31684 <td>Not Connected</td>
31685 <td>&#160;</td>
31686 <td>&#160;</td>
31687 </tr>
31688 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31689 <td>137</td>
31690 <td>31</td>
31691 <td>Not Connected</td>
31692 <td>&#160;</td>
31693 <td>&#160;</td>
31694 </tr>
31695 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31696 <td>137</td>
31697 <td>32</td>
31698 <td>Not Connected</td>
31699 <td>&#160;</td>
31700 <td>&#160;</td>
31701 </tr>
31702 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31703 <td>137</td>
31704 <td>33</td>
31705 <td>Not Connected</td>
31706 <td>&#160;</td>
31707 <td>&#160;</td>
31708 </tr>
31709 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31710 <td>137</td>
31711 <td>34</td>
31712 <td>Not Connected</td>
31713 <td>&#160;</td>
31714 <td>&#160;</td>
31715 </tr>
31716 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31717 <td>137</td>
31718 <td>35</td>
31719 <td>Not Connected</td>
31720 <td>&#160;</td>
31721 <td>&#160;</td>
31722 </tr>
31723 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31724 <td>137</td>
31725 <td>36</td>
31726 <td>Not Connected</td>
31727 <td>&#160;</td>
31728 <td>&#160;</td>
31729 </tr>
31730 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31731 <td>137</td>
31732 <td>37</td>
31733 <td>Not Connected</td>
31734 <td>&#160;</td>
31735 <td>&#160;</td>
31736 </tr>
31737 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31738 <td>137</td>
31739 <td>38</td>
31740 <td>Not Connected</td>
31741 <td>&#160;</td>
31742 <td>&#160;</td>
31743 </tr>
31744 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31745 <td>137</td>
31746 <td>39</td>
31747 <td>Not Connected</td>
31748 <td>&#160;</td>
31749 <td>&#160;</td>
31750 </tr>
31751 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31752 <td>137</td>
31753 <td>40</td>
31754 <td>Not Connected</td>
31755 <td>&#160;</td>
31756 <td>&#160;</td>
31757 </tr>
31758 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31759 <td>137</td>
31760 <td>41</td>
31761 <td>Not Connected</td>
31762 <td>&#160;</td>
31763 <td>&#160;</td>
31764 </tr>
31765 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31766 <td>137</td>
31767 <td>42</td>
31768 <td>Not Connected</td>
31769 <td>&#160;</td>
31770 <td>&#160;</td>
31771 </tr>
31772 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31773 <td>137</td>
31774 <td>43</td>
31775 <td>Not Connected</td>
31776 <td>&#160;</td>
31777 <td>&#160;</td>
31778 </tr>
31779 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31780 <td>137</td>
31781 <td>44</td>
31782 <td>Not Connected</td>
31783 <td>&#160;</td>
31784 <td>&#160;</td>
31785 </tr>
31786 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31787 <td>137</td>
31788 <td>45</td>
31789 <td>Not Connected</td>
31790 <td>&#160;</td>
31791 <td>&#160;</td>
31792 </tr>
31793 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31794 <td>137</td>
31795 <td>46</td>
31796 <td>Not Connected</td>
31797 <td>&#160;</td>
31798 <td>&#160;</td>
31799 </tr>
31800 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31801 <td>137</td>
31802 <td>47</td>
31803 <td>Not Connected</td>
31804 <td>&#160;</td>
31805 <td>&#160;</td>
31806 </tr>
31807 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31808 <td>137</td>
31809 <td>48</td>
31810 <td>Not Connected</td>
31811 <td>&#160;</td>
31812 <td>&#160;</td>
31813 </tr>
31814 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31815 <td>137</td>
31816 <td>49</td>
31817 <td>Not Connected</td>
31818 <td>&#160;</td>
31819 <td>&#160;</td>
31820 </tr>
31821 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31822 <td>137</td>
31823 <td>50</td>
31824 <td>Not Connected</td>
31825 <td>&#160;</td>
31826 <td>&#160;</td>
31827 </tr>
31828 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31829 <td>137</td>
31830 <td>51</td>
31831 <td>Not Connected</td>
31832 <td>&#160;</td>
31833 <td>&#160;</td>
31834 </tr>
31835 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31836 <td>137</td>
31837 <td>52</td>
31838 <td>Not Connected</td>
31839 <td>&#160;</td>
31840 <td>&#160;</td>
31841 </tr>
31842 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31843 <td>137</td>
31844 <td>53</td>
31845 <td>Not Connected</td>
31846 <td>&#160;</td>
31847 <td>&#160;</td>
31848 </tr>
31849 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31850 <td>137</td>
31851 <td>54</td>
31852 <td>Not Connected</td>
31853 <td>&#160;</td>
31854 <td>&#160;</td>
31855 </tr>
31856 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31857 <td>137</td>
31858 <td>55</td>
31859 <td>Not Connected</td>
31860 <td>&#160;</td>
31861 <td>&#160;</td>
31862 </tr>
31863 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31864 <td>137</td>
31865 <td>56</td>
31866 <td>Not Connected</td>
31867 <td>&#160;</td>
31868 <td>&#160;</td>
31869 </tr>
31870 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31871 <td>137</td>
31872 <td>57</td>
31873 <td>Not Connected</td>
31874 <td>&#160;</td>
31875 <td>&#160;</td>
31876 </tr>
31877 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31878 <td>137</td>
31879 <td>58</td>
31880 <td>Not Connected</td>
31881 <td>&#160;</td>
31882 <td>&#160;</td>
31883 </tr>
31884 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31885 <td>137</td>
31886 <td>59</td>
31887 <td>Not Connected</td>
31888 <td>&#160;</td>
31889 <td>&#160;</td>
31890 </tr>
31891 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31892 <td>137</td>
31893 <td>60</td>
31894 <td>Not Connected</td>
31895 <td>&#160;</td>
31896 <td>&#160;</td>
31897 </tr>
31898 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31899 <td>137</td>
31900 <td>61</td>
31901 <td>Not Connected</td>
31902 <td>&#160;</td>
31903 <td>&#160;</td>
31904 </tr>
31905 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31906 <td>137</td>
31907 <td>62</td>
31908 <td>Not Connected</td>
31909 <td>&#160;</td>
31910 <td>&#160;</td>
31911 </tr>
31912 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31913 <td>137</td>
31914 <td>63</td>
31915 <td>Not Connected</td>
31916 <td>&#160;</td>
31917 <td>&#160;</td>
31918 </tr>
31919 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31920 <td>137</td>
31921 <td>64</td>
31922 <td>Not Connected</td>
31923 <td>&#160;</td>
31924 <td>&#160;</td>
31925 </tr>
31926 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31927 <td>137</td>
31928 <td>65</td>
31929 <td>Not Connected</td>
31930 <td>&#160;</td>
31931 <td>&#160;</td>
31932 </tr>
31933 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31934 <td>137</td>
31935 <td>66</td>
31936 <td>Not Connected</td>
31937 <td>&#160;</td>
31938 <td>&#160;</td>
31939 </tr>
31940 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31941 <td>137</td>
31942 <td>67</td>
31943 <td>Not Connected</td>
31944 <td>&#160;</td>
31945 <td>&#160;</td>
31946 </tr>
31947 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31948 <td>137</td>
31949 <td>68</td>
31950 <td>Not Connected</td>
31951 <td>&#160;</td>
31952 <td>&#160;</td>
31953 </tr>
31954 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31955 <td>137</td>
31956 <td>69</td>
31957 <td>Not Connected</td>
31958 <td>&#160;</td>
31959 <td>&#160;</td>
31960 </tr>
31961 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31962 <td>137</td>
31963 <td>70</td>
31964 <td>Not Connected</td>
31965 <td>&#160;</td>
31966 <td>&#160;</td>
31967 </tr>
31968 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31969 <td>137</td>
31970 <td>71</td>
31971 <td>Not Connected</td>
31972 <td>&#160;</td>
31973 <td>&#160;</td>
31974 </tr>
31975 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31976 <td>137</td>
31977 <td>72</td>
31978 <td>Not Connected</td>
31979 <td>&#160;</td>
31980 <td>&#160;</td>
31981 </tr>
31982 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31983 <td>137</td>
31984 <td>73</td>
31985 <td>Not Connected</td>
31986 <td>&#160;</td>
31987 <td>&#160;</td>
31988 </tr>
31989 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31990 <td>137</td>
31991 <td>74</td>
31992 <td>Not Connected</td>
31993 <td>&#160;</td>
31994 <td>&#160;</td>
31995 </tr>
31996 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
31997 <td>137</td>
31998 <td>75</td>
31999 <td>Not Connected</td>
32000 <td>&#160;</td>
32001 <td>&#160;</td>
32002 </tr>
32003 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32004 <td>137</td>
32005 <td>76</td>
32006 <td>Not Connected</td>
32007 <td>&#160;</td>
32008 <td>&#160;</td>
32009 </tr>
32010 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32011 <td>137</td>
32012 <td>77</td>
32013 <td>Not Connected</td>
32014 <td>&#160;</td>
32015 <td>&#160;</td>
32016 </tr>
32017 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32018 <td>137</td>
32019 <td>78</td>
32020 <td>Not Connected</td>
32021 <td>&#160;</td>
32022 <td>&#160;</td>
32023 </tr>
32024 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32025 <td>137</td>
32026 <td>79</td>
32027 <td>Not Connected</td>
32028 <td>&#160;</td>
32029 <td>&#160;</td>
32030 </tr>
32031 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32032 <td>137</td>
32033 <td>80</td>
32034 <td>Not Connected</td>
32035 <td>&#160;</td>
32036 <td>&#160;</td>
32037 </tr>
32038 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32039 <td>137</td>
32040 <td>81</td>
32041 <td>Not Connected</td>
32042 <td>&#160;</td>
32043 <td>&#160;</td>
32044 </tr>
32045 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32046 <td>137</td>
32047 <td>82</td>
32048 <td>Not Connected</td>
32049 <td>&#160;</td>
32050 <td>&#160;</td>
32051 </tr>
32052 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32053 <td>137</td>
32054 <td>83</td>
32055 <td>Not Connected</td>
32056 <td>&#160;</td>
32057 <td>&#160;</td>
32058 </tr>
32059 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32060 <td>137</td>
32061 <td>84</td>
32062 <td>Not Connected</td>
32063 <td>&#160;</td>
32064 <td>&#160;</td>
32065 </tr>
32066 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32067 <td>137</td>
32068 <td>85</td>
32069 <td>Not Connected</td>
32070 <td>&#160;</td>
32071 <td>&#160;</td>
32072 </tr>
32073 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32074 <td>137</td>
32075 <td>86</td>
32076 <td>Not Connected</td>
32077 <td>&#160;</td>
32078 <td>&#160;</td>
32079 </tr>
32080 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32081 <td>137</td>
32082 <td>87</td>
32083 <td>Not Connected</td>
32084 <td>&#160;</td>
32085 <td>&#160;</td>
32086 </tr>
32087 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32088 <td>137</td>
32089 <td>88</td>
32090 <td>Not Connected</td>
32091 <td>&#160;</td>
32092 <td>&#160;</td>
32093 </tr>
32094 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32095 <td>137</td>
32096 <td>89</td>
32097 <td>Not Connected</td>
32098 <td>&#160;</td>
32099 <td>&#160;</td>
32100 </tr>
32101 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32102 <td>137</td>
32103 <td>90</td>
32104 <td>Not Connected</td>
32105 <td>&#160;</td>
32106 <td>&#160;</td>
32107 </tr>
32108 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32109 <td>137</td>
32110 <td>91</td>
32111 <td>Not Connected</td>
32112 <td>&#160;</td>
32113 <td>&#160;</td>
32114 </tr>
32115 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32116 <td>137</td>
32117 <td>92</td>
32118 <td>Not Connected</td>
32119 <td>&#160;</td>
32120 <td>&#160;</td>
32121 </tr>
32122 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32123 <td>137</td>
32124 <td>93</td>
32125 <td>Not Connected</td>
32126 <td>&#160;</td>
32127 <td>&#160;</td>
32128 </tr>
32129 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32130 <td>137</td>
32131 <td>94</td>
32132 <td>Not Connected</td>
32133 <td>&#160;</td>
32134 <td>&#160;</td>
32135 </tr>
32136 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32137 <td>137</td>
32138 <td>95</td>
32139 <td>Not Connected</td>
32140 <td>&#160;</td>
32141 <td>&#160;</td>
32142 </tr>
32143 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32144 <td>137</td>
32145 <td>96</td>
32146 <td>Not Connected</td>
32147 <td>&#160;</td>
32148 <td>&#160;</td>
32149 </tr>
32150 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32151 <td>137</td>
32152 <td>97</td>
32153 <td>Not Connected</td>
32154 <td>&#160;</td>
32155 <td>&#160;</td>
32156 </tr>
32157 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32158 <td>137</td>
32159 <td>98</td>
32160 <td>Not Connected</td>
32161 <td>&#160;</td>
32162 <td>&#160;</td>
32163 </tr>
32164 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32165 <td>137</td>
32166 <td>99</td>
32167 <td>Not Connected</td>
32168 <td>&#160;</td>
32169 <td>&#160;</td>
32170 </tr>
32171 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32172 <td>137</td>
32173 <td>100</td>
32174 <td>Not Connected</td>
32175 <td>&#160;</td>
32176 <td>&#160;</td>
32177 </tr>
32178 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32179 <td>137</td>
32180 <td>101</td>
32181 <td>Not Connected</td>
32182 <td>&#160;</td>
32183 <td>&#160;</td>
32184 </tr>
32185 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32186 <td>137</td>
32187 <td>102</td>
32188 <td>Not Connected</td>
32189 <td>&#160;</td>
32190 <td>&#160;</td>
32191 </tr>
32192 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32193 <td>137</td>
32194 <td>103</td>
32195 <td>J721E_DEV_WKUP_GPIO0</td>
32196 <td>gpio_bank</td>
32197 <td>0</td>
32198 </tr>
32199 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32200 <td>137</td>
32201 <td>104</td>
32202 <td>J721E_DEV_WKUP_GPIO0</td>
32203 <td>gpio_bank</td>
32204 <td>1</td>
32205 </tr>
32206 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32207 <td>137</td>
32208 <td>105</td>
32209 <td>J721E_DEV_WKUP_GPIO0</td>
32210 <td>gpio_bank</td>
32211 <td>2</td>
32212 </tr>
32213 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32214 <td>137</td>
32215 <td>106</td>
32216 <td>J721E_DEV_WKUP_GPIO0</td>
32217 <td>gpio_bank</td>
32218 <td>3</td>
32219 </tr>
32220 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32221 <td>137</td>
32222 <td>107</td>
32223 <td>J721E_DEV_WKUP_GPIO0</td>
32224 <td>gpio_bank</td>
32225 <td>4</td>
32226 </tr>
32227 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32228 <td>137</td>
32229 <td>108</td>
32230 <td>J721E_DEV_WKUP_GPIO0</td>
32231 <td>gpio_bank</td>
32232 <td>5</td>
32233 </tr>
32234 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32235 <td>137</td>
32236 <td>109</td>
32237 <td>Not Connected</td>
32238 <td>&#160;</td>
32239 <td>&#160;</td>
32240 </tr>
32241 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32242 <td>137</td>
32243 <td>110</td>
32244 <td>Not Connected</td>
32245 <td>&#160;</td>
32246 <td>&#160;</td>
32247 </tr>
32248 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32249 <td>137</td>
32250 <td>111</td>
32251 <td>Not Connected</td>
32252 <td>&#160;</td>
32253 <td>&#160;</td>
32254 </tr>
32255 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32256 <td>137</td>
32257 <td>112</td>
32258 <td>J721E_DEV_WKUP_GPIO1</td>
32259 <td>gpio_bank</td>
32260 <td>0</td>
32261 </tr>
32262 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32263 <td>137</td>
32264 <td>113</td>
32265 <td>J721E_DEV_WKUP_GPIO1</td>
32266 <td>gpio_bank</td>
32267 <td>1</td>
32268 </tr>
32269 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32270 <td>137</td>
32271 <td>114</td>
32272 <td>J721E_DEV_WKUP_GPIO1</td>
32273 <td>gpio_bank</td>
32274 <td>2</td>
32275 </tr>
32276 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32277 <td>137</td>
32278 <td>115</td>
32279 <td>J721E_DEV_WKUP_GPIO1</td>
32280 <td>gpio_bank</td>
32281 <td>3</td>
32282 </tr>
32283 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32284 <td>137</td>
32285 <td>116</td>
32286 <td>J721E_DEV_WKUP_GPIO1</td>
32287 <td>gpio_bank</td>
32288 <td>4</td>
32289 </tr>
32290 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32291 <td>137</td>
32292 <td>117</td>
32293 <td>J721E_DEV_WKUP_GPIO1</td>
32294 <td>gpio_bank</td>
32295 <td>5</td>
32296 </tr>
32297 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32298 <td>137</td>
32299 <td>118</td>
32300 <td>Not Connected</td>
32301 <td>&#160;</td>
32302 <td>&#160;</td>
32303 </tr>
32304 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32305 <td>137</td>
32306 <td>119</td>
32307 <td>Not Connected</td>
32308 <td>&#160;</td>
32309 <td>&#160;</td>
32310 </tr>
32311 </tbody>
32312 </table>
32313 </div>
32314 <div class="section" id="wkup-gpiomux-intrtr0-interrupt-router-output-destinations">
32315 <span id="pub-soc-j721e-wkup-gpiomux-intrtr0-output-src-list"></span><h2>WKUP_GPIOMUX_INTRTR0 Interrupt Router Output Destinations<a class="headerlink" href="#wkup-gpiomux-intrtr0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
32316 <div class="admonition warning">
32317 <p class="first admonition-title">Warning</p>
32318 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
32319 host within the RM Board Configuration resource assignment array.  The RM
32320 Board Configuration is rejected if an overlap with a reserved resource is
32321 detected.</p>
32322 </div>
32323 <table border="1" class="docutils">
32324 <colgroup>
32325 <col width="21%" />
32326 <col width="11%" />
32327 <col width="13%" />
32328 <col width="25%" />
32329 <col width="17%" />
32330 <col width="14%" />
32331 </colgroup>
32332 <thead valign="bottom">
32333 <tr class="row-odd"><th class="head">IR Name</th>
32334 <th class="head">IR Device ID</th>
32335 <th class="head">IR Output Index</th>
32336 <th class="head">Destination Name</th>
32337 <th class="head">Destination Interface</th>
32338 <th class="head">Destination Index</th>
32339 </tr>
32340 </thead>
32341 <tbody valign="top">
32342 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32343 <td>137</td>
32344 <td>0</td>
32345 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32346 <td>intr</td>
32347 <td>124</td>
32348 </tr>
32349 <tr class="row-odd"><td>&#160;</td>
32350 <td>&#160;</td>
32351 <td>&#160;</td>
32352 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32353 <td>intr</td>
32354 <td>124</td>
32355 </tr>
32356 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32357 <td>137</td>
32358 <td>1</td>
32359 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32360 <td>intr</td>
32361 <td>125</td>
32362 </tr>
32363 <tr class="row-odd"><td>&#160;</td>
32364 <td>&#160;</td>
32365 <td>&#160;</td>
32366 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32367 <td>intr</td>
32368 <td>125</td>
32369 </tr>
32370 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32371 <td>137</td>
32372 <td>2</td>
32373 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32374 <td>intr</td>
32375 <td>126</td>
32376 </tr>
32377 <tr class="row-odd"><td>&#160;</td>
32378 <td>&#160;</td>
32379 <td>&#160;</td>
32380 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32381 <td>intr</td>
32382 <td>126</td>
32383 </tr>
32384 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32385 <td>137</td>
32386 <td>3</td>
32387 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32388 <td>intr</td>
32389 <td>127</td>
32390 </tr>
32391 <tr class="row-odd"><td>&#160;</td>
32392 <td>&#160;</td>
32393 <td>&#160;</td>
32394 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32395 <td>intr</td>
32396 <td>127</td>
32397 </tr>
32398 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32399 <td>137</td>
32400 <td>4</td>
32401 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32402 <td>intr</td>
32403 <td>128</td>
32404 </tr>
32405 <tr class="row-odd"><td>&#160;</td>
32406 <td>&#160;</td>
32407 <td>&#160;</td>
32408 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32409 <td>intr</td>
32410 <td>128</td>
32411 </tr>
32412 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32413 <td>137</td>
32414 <td>5</td>
32415 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32416 <td>intr</td>
32417 <td>129</td>
32418 </tr>
32419 <tr class="row-odd"><td>&#160;</td>
32420 <td>&#160;</td>
32421 <td>&#160;</td>
32422 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32423 <td>intr</td>
32424 <td>129</td>
32425 </tr>
32426 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32427 <td>137</td>
32428 <td>6</td>
32429 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32430 <td>intr</td>
32431 <td>130</td>
32432 </tr>
32433 <tr class="row-odd"><td>&#160;</td>
32434 <td>&#160;</td>
32435 <td>&#160;</td>
32436 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32437 <td>intr</td>
32438 <td>130</td>
32439 </tr>
32440 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32441 <td>137</td>
32442 <td>7</td>
32443 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32444 <td>intr</td>
32445 <td>131</td>
32446 </tr>
32447 <tr class="row-odd"><td>&#160;</td>
32448 <td>&#160;</td>
32449 <td>&#160;</td>
32450 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32451 <td>intr</td>
32452 <td>131</td>
32453 </tr>
32454 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32455 <td>137</td>
32456 <td>8</td>
32457 <td>J721E_DEV_WKUP_ESM0</td>
32458 <td>esm_pls_event0</td>
32459 <td>88</td>
32460 </tr>
32461 <tr class="row-odd"><td>&#160;</td>
32462 <td>&#160;</td>
32463 <td>&#160;</td>
32464 <td>J721E_DEV_WKUP_ESM0</td>
32465 <td>esm_pls_event1</td>
32466 <td>88</td>
32467 </tr>
32468 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32469 <td>137</td>
32470 <td>8</td>
32471 <td>J721E_DEV_WKUP_ESM0</td>
32472 <td>esm_pls_event2</td>
32473 <td>88</td>
32474 </tr>
32475 <tr class="row-odd"><td>&#160;</td>
32476 <td>&#160;</td>
32477 <td>&#160;</td>
32478 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32479 <td>intr</td>
32480 <td>132</td>
32481 </tr>
32482 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32483 <td>137</td>
32484 <td>8</td>
32485 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32486 <td>intr</td>
32487 <td>132</td>
32488 </tr>
32489 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32490 <td>137</td>
32491 <td>9</td>
32492 <td>J721E_DEV_WKUP_ESM0</td>
32493 <td>esm_pls_event0</td>
32494 <td>89</td>
32495 </tr>
32496 <tr class="row-even"><td>&#160;</td>
32497 <td>&#160;</td>
32498 <td>&#160;</td>
32499 <td>J721E_DEV_WKUP_ESM0</td>
32500 <td>esm_pls_event1</td>
32501 <td>89</td>
32502 </tr>
32503 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32504 <td>137</td>
32505 <td>9</td>
32506 <td>J721E_DEV_WKUP_ESM0</td>
32507 <td>esm_pls_event2</td>
32508 <td>89</td>
32509 </tr>
32510 <tr class="row-even"><td>&#160;</td>
32511 <td>&#160;</td>
32512 <td>&#160;</td>
32513 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32514 <td>intr</td>
32515 <td>133</td>
32516 </tr>
32517 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32518 <td>137</td>
32519 <td>9</td>
32520 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32521 <td>intr</td>
32522 <td>133</td>
32523 </tr>
32524 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32525 <td>137</td>
32526 <td>10</td>
32527 <td>J721E_DEV_WKUP_ESM0</td>
32528 <td>esm_pls_event0</td>
32529 <td>90</td>
32530 </tr>
32531 <tr class="row-odd"><td>&#160;</td>
32532 <td>&#160;</td>
32533 <td>&#160;</td>
32534 <td>J721E_DEV_WKUP_ESM0</td>
32535 <td>esm_pls_event1</td>
32536 <td>90</td>
32537 </tr>
32538 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32539 <td>137</td>
32540 <td>10</td>
32541 <td>J721E_DEV_WKUP_ESM0</td>
32542 <td>esm_pls_event2</td>
32543 <td>90</td>
32544 </tr>
32545 <tr class="row-odd"><td>&#160;</td>
32546 <td>&#160;</td>
32547 <td>&#160;</td>
32548 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32549 <td>intr</td>
32550 <td>134</td>
32551 </tr>
32552 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32553 <td>137</td>
32554 <td>10</td>
32555 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32556 <td>intr</td>
32557 <td>134</td>
32558 </tr>
32559 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32560 <td>137</td>
32561 <td>11</td>
32562 <td>J721E_DEV_WKUP_ESM0</td>
32563 <td>esm_pls_event0</td>
32564 <td>91</td>
32565 </tr>
32566 <tr class="row-even"><td>&#160;</td>
32567 <td>&#160;</td>
32568 <td>&#160;</td>
32569 <td>J721E_DEV_WKUP_ESM0</td>
32570 <td>esm_pls_event1</td>
32571 <td>91</td>
32572 </tr>
32573 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32574 <td>137</td>
32575 <td>11</td>
32576 <td>J721E_DEV_WKUP_ESM0</td>
32577 <td>esm_pls_event2</td>
32578 <td>91</td>
32579 </tr>
32580 <tr class="row-even"><td>&#160;</td>
32581 <td>&#160;</td>
32582 <td>&#160;</td>
32583 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32584 <td>intr</td>
32585 <td>135</td>
32586 </tr>
32587 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32588 <td>137</td>
32589 <td>11</td>
32590 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32591 <td>intr</td>
32592 <td>135</td>
32593 </tr>
32594 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32595 <td>137</td>
32596 <td>12</td>
32597 <td>J721E_DEV_WKUP_ESM0</td>
32598 <td>esm_pls_event0</td>
32599 <td>92</td>
32600 </tr>
32601 <tr class="row-odd"><td>&#160;</td>
32602 <td>&#160;</td>
32603 <td>&#160;</td>
32604 <td>J721E_DEV_WKUP_ESM0</td>
32605 <td>esm_pls_event1</td>
32606 <td>92</td>
32607 </tr>
32608 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32609 <td>137</td>
32610 <td>12</td>
32611 <td>J721E_DEV_WKUP_ESM0</td>
32612 <td>esm_pls_event2</td>
32613 <td>92</td>
32614 </tr>
32615 <tr class="row-odd"><td>&#160;</td>
32616 <td>&#160;</td>
32617 <td>&#160;</td>
32618 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
32619 <td>intaggr_levi_pend</td>
32620 <td>4</td>
32621 </tr>
32622 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32623 <td>137</td>
32624 <td>12</td>
32625 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32626 <td>intr</td>
32627 <td>136</td>
32628 </tr>
32629 <tr class="row-odd"><td>&#160;</td>
32630 <td>&#160;</td>
32631 <td>&#160;</td>
32632 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32633 <td>intr</td>
32634 <td>136</td>
32635 </tr>
32636 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32637 <td>137</td>
32638 <td>13</td>
32639 <td>J721E_DEV_WKUP_ESM0</td>
32640 <td>esm_pls_event0</td>
32641 <td>93</td>
32642 </tr>
32643 <tr class="row-odd"><td>&#160;</td>
32644 <td>&#160;</td>
32645 <td>&#160;</td>
32646 <td>J721E_DEV_WKUP_ESM0</td>
32647 <td>esm_pls_event1</td>
32648 <td>93</td>
32649 </tr>
32650 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32651 <td>137</td>
32652 <td>13</td>
32653 <td>J721E_DEV_WKUP_ESM0</td>
32654 <td>esm_pls_event2</td>
32655 <td>93</td>
32656 </tr>
32657 <tr class="row-odd"><td>&#160;</td>
32658 <td>&#160;</td>
32659 <td>&#160;</td>
32660 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
32661 <td>intaggr_levi_pend</td>
32662 <td>5</td>
32663 </tr>
32664 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32665 <td>137</td>
32666 <td>13</td>
32667 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32668 <td>intr</td>
32669 <td>137</td>
32670 </tr>
32671 <tr class="row-odd"><td>&#160;</td>
32672 <td>&#160;</td>
32673 <td>&#160;</td>
32674 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32675 <td>intr</td>
32676 <td>137</td>
32677 </tr>
32678 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32679 <td>137</td>
32680 <td>14</td>
32681 <td>J721E_DEV_WKUP_ESM0</td>
32682 <td>esm_pls_event0</td>
32683 <td>94</td>
32684 </tr>
32685 <tr class="row-odd"><td>&#160;</td>
32686 <td>&#160;</td>
32687 <td>&#160;</td>
32688 <td>J721E_DEV_WKUP_ESM0</td>
32689 <td>esm_pls_event1</td>
32690 <td>94</td>
32691 </tr>
32692 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32693 <td>137</td>
32694 <td>14</td>
32695 <td>J721E_DEV_WKUP_ESM0</td>
32696 <td>esm_pls_event2</td>
32697 <td>94</td>
32698 </tr>
32699 <tr class="row-odd"><td>&#160;</td>
32700 <td>&#160;</td>
32701 <td>&#160;</td>
32702 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
32703 <td>intaggr_levi_pend</td>
32704 <td>6</td>
32705 </tr>
32706 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32707 <td>137</td>
32708 <td>14</td>
32709 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32710 <td>intr</td>
32711 <td>138</td>
32712 </tr>
32713 <tr class="row-odd"><td>&#160;</td>
32714 <td>&#160;</td>
32715 <td>&#160;</td>
32716 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32717 <td>intr</td>
32718 <td>138</td>
32719 </tr>
32720 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32721 <td>137</td>
32722 <td>15</td>
32723 <td>J721E_DEV_WKUP_ESM0</td>
32724 <td>esm_pls_event0</td>
32725 <td>95</td>
32726 </tr>
32727 <tr class="row-odd"><td>&#160;</td>
32728 <td>&#160;</td>
32729 <td>&#160;</td>
32730 <td>J721E_DEV_WKUP_ESM0</td>
32731 <td>esm_pls_event1</td>
32732 <td>95</td>
32733 </tr>
32734 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32735 <td>137</td>
32736 <td>15</td>
32737 <td>J721E_DEV_WKUP_ESM0</td>
32738 <td>esm_pls_event2</td>
32739 <td>95</td>
32740 </tr>
32741 <tr class="row-odd"><td>&#160;</td>
32742 <td>&#160;</td>
32743 <td>&#160;</td>
32744 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
32745 <td>intaggr_levi_pend</td>
32746 <td>7</td>
32747 </tr>
32748 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32749 <td>137</td>
32750 <td>15</td>
32751 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
32752 <td>intr</td>
32753 <td>139</td>
32754 </tr>
32755 <tr class="row-odd"><td>&#160;</td>
32756 <td>&#160;</td>
32757 <td>&#160;</td>
32758 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
32759 <td>intr</td>
32760 <td>139</td>
32761 </tr>
32762 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32763 <td>137</td>
32764 <td>16</td>
32765 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
32766 <td>soc_events_in</td>
32767 <td>960</td>
32768 </tr>
32769 <tr class="row-odd"><td>&#160;</td>
32770 <td>&#160;</td>
32771 <td>&#160;</td>
32772 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
32773 <td>spi</td>
32774 <td>960</td>
32775 </tr>
32776 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32777 <td>137</td>
32778 <td>16</td>
32779 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
32780 <td>in</td>
32781 <td>160</td>
32782 </tr>
32783 <tr class="row-odd"><td>&#160;</td>
32784 <td>&#160;</td>
32785 <td>&#160;</td>
32786 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
32787 <td>in</td>
32788 <td>160</td>
32789 </tr>
32790 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32791 <td>137</td>
32792 <td>16</td>
32793 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
32794 <td>intaggr_levi_pend</td>
32795 <td>8</td>
32796 </tr>
32797 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32798 <td>137</td>
32799 <td>17</td>
32800 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
32801 <td>soc_events_in</td>
32802 <td>961</td>
32803 </tr>
32804 <tr class="row-even"><td>&#160;</td>
32805 <td>&#160;</td>
32806 <td>&#160;</td>
32807 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
32808 <td>spi</td>
32809 <td>961</td>
32810 </tr>
32811 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32812 <td>137</td>
32813 <td>17</td>
32814 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
32815 <td>in</td>
32816 <td>161</td>
32817 </tr>
32818 <tr class="row-even"><td>&#160;</td>
32819 <td>&#160;</td>
32820 <td>&#160;</td>
32821 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
32822 <td>in</td>
32823 <td>161</td>
32824 </tr>
32825 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32826 <td>137</td>
32827 <td>17</td>
32828 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
32829 <td>intaggr_levi_pend</td>
32830 <td>9</td>
32831 </tr>
32832 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32833 <td>137</td>
32834 <td>18</td>
32835 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
32836 <td>soc_events_in</td>
32837 <td>962</td>
32838 </tr>
32839 <tr class="row-odd"><td>&#160;</td>
32840 <td>&#160;</td>
32841 <td>&#160;</td>
32842 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
32843 <td>spi</td>
32844 <td>962</td>
32845 </tr>
32846 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32847 <td>137</td>
32848 <td>18</td>
32849 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
32850 <td>in</td>
32851 <td>162</td>
32852 </tr>
32853 <tr class="row-odd"><td>&#160;</td>
32854 <td>&#160;</td>
32855 <td>&#160;</td>
32856 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
32857 <td>in</td>
32858 <td>162</td>
32859 </tr>
32860 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32861 <td>137</td>
32862 <td>18</td>
32863 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
32864 <td>intaggr_levi_pend</td>
32865 <td>10</td>
32866 </tr>
32867 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32868 <td>137</td>
32869 <td>19</td>
32870 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
32871 <td>soc_events_in</td>
32872 <td>963</td>
32873 </tr>
32874 <tr class="row-even"><td>&#160;</td>
32875 <td>&#160;</td>
32876 <td>&#160;</td>
32877 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
32878 <td>spi</td>
32879 <td>963</td>
32880 </tr>
32881 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32882 <td>137</td>
32883 <td>19</td>
32884 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
32885 <td>in</td>
32886 <td>163</td>
32887 </tr>
32888 <tr class="row-even"><td>&#160;</td>
32889 <td>&#160;</td>
32890 <td>&#160;</td>
32891 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
32892 <td>in</td>
32893 <td>163</td>
32894 </tr>
32895 <tr class="row-odd"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32896 <td>137</td>
32897 <td>19</td>
32898 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
32899 <td>intaggr_levi_pend</td>
32900 <td>11</td>
32901 </tr>
32902 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32903 <td>137</td>
32904 <td>20</td>
32905 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
32906 <td>soc_events_in</td>
32907 <td>964</td>
32908 </tr>
32909 <tr class="row-odd"><td>&#160;</td>
32910 <td>&#160;</td>
32911 <td>&#160;</td>
32912 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
32913 <td>spi</td>
32914 <td>964</td>
32915 </tr>
32916 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32917 <td>137</td>
32918 <td>20</td>
32919 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
32920 <td>in</td>
32921 <td>164</td>
32922 </tr>
32923 <tr class="row-odd"><td>&#160;</td>
32924 <td>&#160;</td>
32925 <td>&#160;</td>
32926 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
32927 <td>in</td>
32928 <td>164</td>
32929 </tr>
32930 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32931 <td>137</td>
32932 <td>21</td>
32933 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
32934 <td>soc_events_in</td>
32935 <td>965</td>
32936 </tr>
32937 <tr class="row-odd"><td>&#160;</td>
32938 <td>&#160;</td>
32939 <td>&#160;</td>
32940 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
32941 <td>spi</td>
32942 <td>965</td>
32943 </tr>
32944 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32945 <td>137</td>
32946 <td>21</td>
32947 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
32948 <td>in</td>
32949 <td>165</td>
32950 </tr>
32951 <tr class="row-odd"><td>&#160;</td>
32952 <td>&#160;</td>
32953 <td>&#160;</td>
32954 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
32955 <td>in</td>
32956 <td>165</td>
32957 </tr>
32958 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32959 <td>137</td>
32960 <td>22</td>
32961 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
32962 <td>soc_events_in</td>
32963 <td>966</td>
32964 </tr>
32965 <tr class="row-odd"><td>&#160;</td>
32966 <td>&#160;</td>
32967 <td>&#160;</td>
32968 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
32969 <td>spi</td>
32970 <td>966</td>
32971 </tr>
32972 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32973 <td>137</td>
32974 <td>22</td>
32975 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
32976 <td>in</td>
32977 <td>166</td>
32978 </tr>
32979 <tr class="row-odd"><td>&#160;</td>
32980 <td>&#160;</td>
32981 <td>&#160;</td>
32982 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
32983 <td>in</td>
32984 <td>166</td>
32985 </tr>
32986 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
32987 <td>137</td>
32988 <td>23</td>
32989 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
32990 <td>soc_events_in</td>
32991 <td>967</td>
32992 </tr>
32993 <tr class="row-odd"><td>&#160;</td>
32994 <td>&#160;</td>
32995 <td>&#160;</td>
32996 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
32997 <td>spi</td>
32998 <td>967</td>
32999 </tr>
33000 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33001 <td>137</td>
33002 <td>23</td>
33003 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33004 <td>in</td>
33005 <td>167</td>
33006 </tr>
33007 <tr class="row-odd"><td>&#160;</td>
33008 <td>&#160;</td>
33009 <td>&#160;</td>
33010 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33011 <td>in</td>
33012 <td>167</td>
33013 </tr>
33014 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33015 <td>137</td>
33016 <td>24</td>
33017 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
33018 <td>soc_events_in</td>
33019 <td>968</td>
33020 </tr>
33021 <tr class="row-odd"><td>&#160;</td>
33022 <td>&#160;</td>
33023 <td>&#160;</td>
33024 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
33025 <td>spi</td>
33026 <td>968</td>
33027 </tr>
33028 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33029 <td>137</td>
33030 <td>24</td>
33031 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33032 <td>in</td>
33033 <td>168</td>
33034 </tr>
33035 <tr class="row-odd"><td>&#160;</td>
33036 <td>&#160;</td>
33037 <td>&#160;</td>
33038 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33039 <td>in</td>
33040 <td>168</td>
33041 </tr>
33042 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33043 <td>137</td>
33044 <td>25</td>
33045 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
33046 <td>soc_events_in</td>
33047 <td>969</td>
33048 </tr>
33049 <tr class="row-odd"><td>&#160;</td>
33050 <td>&#160;</td>
33051 <td>&#160;</td>
33052 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
33053 <td>spi</td>
33054 <td>969</td>
33055 </tr>
33056 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33057 <td>137</td>
33058 <td>25</td>
33059 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33060 <td>in</td>
33061 <td>169</td>
33062 </tr>
33063 <tr class="row-odd"><td>&#160;</td>
33064 <td>&#160;</td>
33065 <td>&#160;</td>
33066 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33067 <td>in</td>
33068 <td>169</td>
33069 </tr>
33070 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33071 <td>137</td>
33072 <td>26</td>
33073 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
33074 <td>soc_events_in</td>
33075 <td>970</td>
33076 </tr>
33077 <tr class="row-odd"><td>&#160;</td>
33078 <td>&#160;</td>
33079 <td>&#160;</td>
33080 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
33081 <td>spi</td>
33082 <td>970</td>
33083 </tr>
33084 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33085 <td>137</td>
33086 <td>26</td>
33087 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33088 <td>in</td>
33089 <td>170</td>
33090 </tr>
33091 <tr class="row-odd"><td>&#160;</td>
33092 <td>&#160;</td>
33093 <td>&#160;</td>
33094 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33095 <td>in</td>
33096 <td>170</td>
33097 </tr>
33098 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33099 <td>137</td>
33100 <td>27</td>
33101 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
33102 <td>soc_events_in</td>
33103 <td>971</td>
33104 </tr>
33105 <tr class="row-odd"><td>&#160;</td>
33106 <td>&#160;</td>
33107 <td>&#160;</td>
33108 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
33109 <td>spi</td>
33110 <td>971</td>
33111 </tr>
33112 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33113 <td>137</td>
33114 <td>27</td>
33115 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33116 <td>in</td>
33117 <td>171</td>
33118 </tr>
33119 <tr class="row-odd"><td>&#160;</td>
33120 <td>&#160;</td>
33121 <td>&#160;</td>
33122 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33123 <td>in</td>
33124 <td>171</td>
33125 </tr>
33126 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33127 <td>137</td>
33128 <td>28</td>
33129 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
33130 <td>soc_events_in</td>
33131 <td>972</td>
33132 </tr>
33133 <tr class="row-odd"><td>&#160;</td>
33134 <td>&#160;</td>
33135 <td>&#160;</td>
33136 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
33137 <td>spi</td>
33138 <td>972</td>
33139 </tr>
33140 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33141 <td>137</td>
33142 <td>28</td>
33143 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33144 <td>in</td>
33145 <td>172</td>
33146 </tr>
33147 <tr class="row-odd"><td>&#160;</td>
33148 <td>&#160;</td>
33149 <td>&#160;</td>
33150 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33151 <td>in</td>
33152 <td>172</td>
33153 </tr>
33154 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33155 <td>137</td>
33156 <td>29</td>
33157 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
33158 <td>soc_events_in</td>
33159 <td>973</td>
33160 </tr>
33161 <tr class="row-odd"><td>&#160;</td>
33162 <td>&#160;</td>
33163 <td>&#160;</td>
33164 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
33165 <td>spi</td>
33166 <td>973</td>
33167 </tr>
33168 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33169 <td>137</td>
33170 <td>29</td>
33171 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33172 <td>in</td>
33173 <td>173</td>
33174 </tr>
33175 <tr class="row-odd"><td>&#160;</td>
33176 <td>&#160;</td>
33177 <td>&#160;</td>
33178 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33179 <td>in</td>
33180 <td>173</td>
33181 </tr>
33182 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33183 <td>137</td>
33184 <td>30</td>
33185 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
33186 <td>soc_events_in</td>
33187 <td>974</td>
33188 </tr>
33189 <tr class="row-odd"><td>&#160;</td>
33190 <td>&#160;</td>
33191 <td>&#160;</td>
33192 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
33193 <td>spi</td>
33194 <td>974</td>
33195 </tr>
33196 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33197 <td>137</td>
33198 <td>30</td>
33199 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33200 <td>in</td>
33201 <td>174</td>
33202 </tr>
33203 <tr class="row-odd"><td>&#160;</td>
33204 <td>&#160;</td>
33205 <td>&#160;</td>
33206 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33207 <td>in</td>
33208 <td>174</td>
33209 </tr>
33210 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33211 <td>137</td>
33212 <td>31</td>
33213 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
33214 <td>soc_events_in</td>
33215 <td>975</td>
33216 </tr>
33217 <tr class="row-odd"><td>&#160;</td>
33218 <td>&#160;</td>
33219 <td>&#160;</td>
33220 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
33221 <td>spi</td>
33222 <td>975</td>
33223 </tr>
33224 <tr class="row-even"><td>J721E_DEV_WKUP_GPIOMUX_INTRTR0</td>
33225 <td>137</td>
33226 <td>31</td>
33227 <td>J721E_DEV_R5FSS0_INTROUTER0</td>
33228 <td>in</td>
33229 <td>175</td>
33230 </tr>
33231 <tr class="row-odd"><td>&#160;</td>
33232 <td>&#160;</td>
33233 <td>&#160;</td>
33234 <td>J721E_DEV_R5FSS1_INTROUTER0</td>
33235 <td>in</td>
33236 <td>175</td>
33237 </tr>
33238 </tbody>
33239 </table>
33240 </div>
33241 <div class="section" id="navss0-intr-router-0-interrupt-router-input-sources">
33242 <span id="pub-soc-j721e-navss0-intr-router-0-input-src-list"></span><h2>NAVSS0_INTR_ROUTER_0 Interrupt Router Input Sources<a class="headerlink" href="#navss0-intr-router-0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
33243 <div class="admonition warning">
33244 <p class="first admonition-title">Warning</p>
33245 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
33246 host within the RM Board Configuration resource assignment array.  The RM
33247 Board Configuration is rejected if an overlap with a reserved resource is
33248 detected.</p>
33249 </div>
33250 <table border="1" class="docutils">
33251 <colgroup>
33252 <col width="25%" />
33253 <col width="11%" />
33254 <col width="13%" />
33255 <col width="25%" />
33256 <col width="15%" />
33257 <col width="11%" />
33258 </colgroup>
33259 <thead valign="bottom">
33260 <tr class="row-odd"><th class="head">IR Name</th>
33261 <th class="head">IR Device ID</th>
33262 <th class="head">IR Input Index</th>
33263 <th class="head">Source Name</th>
33264 <th class="head">Source Interface</th>
33265 <th class="head">Source Index</th>
33266 </tr>
33267 </thead>
33268 <tbody valign="top">
33269 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33270 (<strong>Reserved by System Firmware</strong>)</td>
33271 <td>213</td>
33272 <td>0</td>
33273 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33274 <td>intaggr_vintr_pend</td>
33275 <td>0</td>
33276 </tr>
33277 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33278 (<strong>Reserved by System Firmware</strong>)</td>
33279 <td>213</td>
33280 <td>1</td>
33281 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33282 <td>intaggr_vintr_pend</td>
33283 <td>1</td>
33284 </tr>
33285 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33286 (<strong>Reserved by System Firmware</strong>)</td>
33287 <td>213</td>
33288 <td>2</td>
33289 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33290 <td>intaggr_vintr_pend</td>
33291 <td>2</td>
33292 </tr>
33293 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33294 (<strong>Reserved by System Firmware</strong>)</td>
33295 <td>213</td>
33296 <td>3</td>
33297 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33298 <td>intaggr_vintr_pend</td>
33299 <td>3</td>
33300 </tr>
33301 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33302 (<strong>Reserved by System Firmware</strong>)</td>
33303 <td>213</td>
33304 <td>4</td>
33305 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33306 <td>intaggr_vintr_pend</td>
33307 <td>4</td>
33308 </tr>
33309 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33310 (<strong>Reserved by System Firmware</strong>)</td>
33311 <td>213</td>
33312 <td>5</td>
33313 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33314 <td>intaggr_vintr_pend</td>
33315 <td>5</td>
33316 </tr>
33317 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33318 (<strong>Reserved by System Firmware</strong>)</td>
33319 <td>213</td>
33320 <td>6</td>
33321 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33322 <td>intaggr_vintr_pend</td>
33323 <td>6</td>
33324 </tr>
33325 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33326 (<strong>Reserved by System Firmware</strong>)</td>
33327 <td>213</td>
33328 <td>7</td>
33329 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33330 <td>intaggr_vintr_pend</td>
33331 <td>7</td>
33332 </tr>
33333 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33334 (<strong>Reserved by System Firmware</strong>)</td>
33335 <td>213</td>
33336 <td>8</td>
33337 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33338 <td>intaggr_vintr_pend</td>
33339 <td>8</td>
33340 </tr>
33341 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33342 (<strong>Reserved by System Firmware</strong>)</td>
33343 <td>213</td>
33344 <td>9</td>
33345 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33346 <td>intaggr_vintr_pend</td>
33347 <td>9</td>
33348 </tr>
33349 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33350 (<strong>Reserved by System Firmware</strong>)</td>
33351 <td>213</td>
33352 <td>10</td>
33353 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33354 <td>intaggr_vintr_pend</td>
33355 <td>10</td>
33356 </tr>
33357 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33358 (<strong>Reserved by System Firmware</strong>)</td>
33359 <td>213</td>
33360 <td>11</td>
33361 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33362 <td>intaggr_vintr_pend</td>
33363 <td>11</td>
33364 </tr>
33365 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33366 (<strong>Reserved by System Firmware</strong>)</td>
33367 <td>213</td>
33368 <td>12</td>
33369 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33370 <td>intaggr_vintr_pend</td>
33371 <td>12</td>
33372 </tr>
33373 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33374 (<strong>Reserved by System Firmware</strong>)</td>
33375 <td>213</td>
33376 <td>13</td>
33377 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33378 <td>intaggr_vintr_pend</td>
33379 <td>13</td>
33380 </tr>
33381 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33382 (<strong>Reserved by System Firmware</strong>)</td>
33383 <td>213</td>
33384 <td>14</td>
33385 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33386 <td>intaggr_vintr_pend</td>
33387 <td>14</td>
33388 </tr>
33389 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33390 (<strong>Reserved by System Firmware</strong>)</td>
33391 <td>213</td>
33392 <td>15</td>
33393 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33394 <td>intaggr_vintr_pend</td>
33395 <td>15</td>
33396 </tr>
33397 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33398 (<strong>Reserved by System Firmware</strong>)</td>
33399 <td>213</td>
33400 <td>16</td>
33401 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33402 <td>intaggr_vintr_pend</td>
33403 <td>16</td>
33404 </tr>
33405 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33406 (<strong>Reserved by System Firmware</strong>)</td>
33407 <td>213</td>
33408 <td>17</td>
33409 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33410 <td>intaggr_vintr_pend</td>
33411 <td>17</td>
33412 </tr>
33413 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33414 (<strong>Reserved by System Firmware</strong>)</td>
33415 <td>213</td>
33416 <td>18</td>
33417 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33418 <td>intaggr_vintr_pend</td>
33419 <td>18</td>
33420 </tr>
33421 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33422 (<strong>Reserved by System Firmware</strong>)</td>
33423 <td>213</td>
33424 <td>19</td>
33425 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33426 <td>intaggr_vintr_pend</td>
33427 <td>19</td>
33428 </tr>
33429 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33430 (<strong>Reserved by System Firmware</strong>)</td>
33431 <td>213</td>
33432 <td>20</td>
33433 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33434 <td>intaggr_vintr_pend</td>
33435 <td>20</td>
33436 </tr>
33437 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33438 (<strong>Reserved by System Firmware</strong>)</td>
33439 <td>213</td>
33440 <td>21</td>
33441 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33442 <td>intaggr_vintr_pend</td>
33443 <td>21</td>
33444 </tr>
33445 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33446 (<strong>Reserved by System Firmware</strong>)</td>
33447 <td>213</td>
33448 <td>22</td>
33449 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33450 <td>intaggr_vintr_pend</td>
33451 <td>22</td>
33452 </tr>
33453 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33454 (<strong>Reserved by System Firmware</strong>)</td>
33455 <td>213</td>
33456 <td>23</td>
33457 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33458 <td>intaggr_vintr_pend</td>
33459 <td>23</td>
33460 </tr>
33461 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33462 (<strong>Reserved by System Firmware</strong>)</td>
33463 <td>213</td>
33464 <td>24</td>
33465 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33466 <td>intaggr_vintr_pend</td>
33467 <td>24</td>
33468 </tr>
33469 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33470 (<strong>Reserved by System Firmware</strong>)</td>
33471 <td>213</td>
33472 <td>25</td>
33473 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33474 <td>intaggr_vintr_pend</td>
33475 <td>25</td>
33476 </tr>
33477 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33478 (<strong>Reserved by System Firmware</strong>)</td>
33479 <td>213</td>
33480 <td>26</td>
33481 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33482 <td>intaggr_vintr_pend</td>
33483 <td>26</td>
33484 </tr>
33485 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33486 (<strong>Reserved by System Firmware</strong>)</td>
33487 <td>213</td>
33488 <td>27</td>
33489 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33490 <td>intaggr_vintr_pend</td>
33491 <td>27</td>
33492 </tr>
33493 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33494 (<strong>Reserved by System Firmware</strong>)</td>
33495 <td>213</td>
33496 <td>28</td>
33497 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33498 <td>intaggr_vintr_pend</td>
33499 <td>28</td>
33500 </tr>
33501 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33502 (<strong>Reserved by System Firmware</strong>)</td>
33503 <td>213</td>
33504 <td>29</td>
33505 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33506 <td>intaggr_vintr_pend</td>
33507 <td>29</td>
33508 </tr>
33509 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33510 (<strong>Reserved by System Firmware</strong>)</td>
33511 <td>213</td>
33512 <td>30</td>
33513 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33514 <td>intaggr_vintr_pend</td>
33515 <td>30</td>
33516 </tr>
33517 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33518 (<strong>Reserved by System Firmware</strong>)</td>
33519 <td>213</td>
33520 <td>31</td>
33521 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33522 <td>intaggr_vintr_pend</td>
33523 <td>31</td>
33524 </tr>
33525 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33526 (<strong>Reserved by System Firmware</strong>)</td>
33527 <td>213</td>
33528 <td>32</td>
33529 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33530 <td>intaggr_vintr_pend</td>
33531 <td>32</td>
33532 </tr>
33533 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33534 (<strong>Reserved by System Firmware</strong>)</td>
33535 <td>213</td>
33536 <td>33</td>
33537 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33538 <td>intaggr_vintr_pend</td>
33539 <td>33</td>
33540 </tr>
33541 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33542 (<strong>Reserved by System Firmware</strong>)</td>
33543 <td>213</td>
33544 <td>34</td>
33545 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33546 <td>intaggr_vintr_pend</td>
33547 <td>34</td>
33548 </tr>
33549 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33550 (<strong>Reserved by System Firmware</strong>)</td>
33551 <td>213</td>
33552 <td>35</td>
33553 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33554 <td>intaggr_vintr_pend</td>
33555 <td>35</td>
33556 </tr>
33557 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33558 (<strong>Reserved by System Firmware</strong>)</td>
33559 <td>213</td>
33560 <td>36</td>
33561 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33562 <td>intaggr_vintr_pend</td>
33563 <td>36</td>
33564 </tr>
33565 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
33566 (<strong>Reserved by System Firmware</strong>)</td>
33567 <td>213</td>
33568 <td>37</td>
33569 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33570 <td>intaggr_vintr_pend</td>
33571 <td>37</td>
33572 </tr>
33573 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33574 <td>213</td>
33575 <td>38</td>
33576 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33577 <td>intaggr_vintr_pend</td>
33578 <td>38</td>
33579 </tr>
33580 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33581 <td>213</td>
33582 <td>39</td>
33583 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33584 <td>intaggr_vintr_pend</td>
33585 <td>39</td>
33586 </tr>
33587 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33588 <td>213</td>
33589 <td>40</td>
33590 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33591 <td>intaggr_vintr_pend</td>
33592 <td>40</td>
33593 </tr>
33594 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33595 <td>213</td>
33596 <td>41</td>
33597 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33598 <td>intaggr_vintr_pend</td>
33599 <td>41</td>
33600 </tr>
33601 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33602 <td>213</td>
33603 <td>42</td>
33604 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33605 <td>intaggr_vintr_pend</td>
33606 <td>42</td>
33607 </tr>
33608 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33609 <td>213</td>
33610 <td>43</td>
33611 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33612 <td>intaggr_vintr_pend</td>
33613 <td>43</td>
33614 </tr>
33615 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33616 <td>213</td>
33617 <td>44</td>
33618 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33619 <td>intaggr_vintr_pend</td>
33620 <td>44</td>
33621 </tr>
33622 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33623 <td>213</td>
33624 <td>45</td>
33625 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33626 <td>intaggr_vintr_pend</td>
33627 <td>45</td>
33628 </tr>
33629 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33630 <td>213</td>
33631 <td>46</td>
33632 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33633 <td>intaggr_vintr_pend</td>
33634 <td>46</td>
33635 </tr>
33636 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33637 <td>213</td>
33638 <td>47</td>
33639 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33640 <td>intaggr_vintr_pend</td>
33641 <td>47</td>
33642 </tr>
33643 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33644 <td>213</td>
33645 <td>48</td>
33646 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33647 <td>intaggr_vintr_pend</td>
33648 <td>48</td>
33649 </tr>
33650 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33651 <td>213</td>
33652 <td>49</td>
33653 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33654 <td>intaggr_vintr_pend</td>
33655 <td>49</td>
33656 </tr>
33657 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33658 <td>213</td>
33659 <td>50</td>
33660 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33661 <td>intaggr_vintr_pend</td>
33662 <td>50</td>
33663 </tr>
33664 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33665 <td>213</td>
33666 <td>51</td>
33667 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33668 <td>intaggr_vintr_pend</td>
33669 <td>51</td>
33670 </tr>
33671 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33672 <td>213</td>
33673 <td>52</td>
33674 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33675 <td>intaggr_vintr_pend</td>
33676 <td>52</td>
33677 </tr>
33678 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33679 <td>213</td>
33680 <td>53</td>
33681 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33682 <td>intaggr_vintr_pend</td>
33683 <td>53</td>
33684 </tr>
33685 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33686 <td>213</td>
33687 <td>54</td>
33688 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33689 <td>intaggr_vintr_pend</td>
33690 <td>54</td>
33691 </tr>
33692 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33693 <td>213</td>
33694 <td>55</td>
33695 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33696 <td>intaggr_vintr_pend</td>
33697 <td>55</td>
33698 </tr>
33699 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33700 <td>213</td>
33701 <td>56</td>
33702 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33703 <td>intaggr_vintr_pend</td>
33704 <td>56</td>
33705 </tr>
33706 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33707 <td>213</td>
33708 <td>57</td>
33709 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33710 <td>intaggr_vintr_pend</td>
33711 <td>57</td>
33712 </tr>
33713 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33714 <td>213</td>
33715 <td>58</td>
33716 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33717 <td>intaggr_vintr_pend</td>
33718 <td>58</td>
33719 </tr>
33720 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33721 <td>213</td>
33722 <td>59</td>
33723 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33724 <td>intaggr_vintr_pend</td>
33725 <td>59</td>
33726 </tr>
33727 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33728 <td>213</td>
33729 <td>60</td>
33730 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33731 <td>intaggr_vintr_pend</td>
33732 <td>60</td>
33733 </tr>
33734 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33735 <td>213</td>
33736 <td>61</td>
33737 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33738 <td>intaggr_vintr_pend</td>
33739 <td>61</td>
33740 </tr>
33741 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33742 <td>213</td>
33743 <td>62</td>
33744 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33745 <td>intaggr_vintr_pend</td>
33746 <td>62</td>
33747 </tr>
33748 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33749 <td>213</td>
33750 <td>63</td>
33751 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33752 <td>intaggr_vintr_pend</td>
33753 <td>63</td>
33754 </tr>
33755 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33756 <td>213</td>
33757 <td>64</td>
33758 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33759 <td>intaggr_vintr_pend</td>
33760 <td>64</td>
33761 </tr>
33762 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33763 <td>213</td>
33764 <td>65</td>
33765 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33766 <td>intaggr_vintr_pend</td>
33767 <td>65</td>
33768 </tr>
33769 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33770 <td>213</td>
33771 <td>66</td>
33772 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33773 <td>intaggr_vintr_pend</td>
33774 <td>66</td>
33775 </tr>
33776 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33777 <td>213</td>
33778 <td>67</td>
33779 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33780 <td>intaggr_vintr_pend</td>
33781 <td>67</td>
33782 </tr>
33783 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33784 <td>213</td>
33785 <td>68</td>
33786 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33787 <td>intaggr_vintr_pend</td>
33788 <td>68</td>
33789 </tr>
33790 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33791 <td>213</td>
33792 <td>69</td>
33793 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33794 <td>intaggr_vintr_pend</td>
33795 <td>69</td>
33796 </tr>
33797 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33798 <td>213</td>
33799 <td>70</td>
33800 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33801 <td>intaggr_vintr_pend</td>
33802 <td>70</td>
33803 </tr>
33804 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33805 <td>213</td>
33806 <td>71</td>
33807 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33808 <td>intaggr_vintr_pend</td>
33809 <td>71</td>
33810 </tr>
33811 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33812 <td>213</td>
33813 <td>72</td>
33814 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33815 <td>intaggr_vintr_pend</td>
33816 <td>72</td>
33817 </tr>
33818 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33819 <td>213</td>
33820 <td>73</td>
33821 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33822 <td>intaggr_vintr_pend</td>
33823 <td>73</td>
33824 </tr>
33825 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33826 <td>213</td>
33827 <td>74</td>
33828 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33829 <td>intaggr_vintr_pend</td>
33830 <td>74</td>
33831 </tr>
33832 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33833 <td>213</td>
33834 <td>75</td>
33835 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33836 <td>intaggr_vintr_pend</td>
33837 <td>75</td>
33838 </tr>
33839 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33840 <td>213</td>
33841 <td>76</td>
33842 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33843 <td>intaggr_vintr_pend</td>
33844 <td>76</td>
33845 </tr>
33846 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33847 <td>213</td>
33848 <td>77</td>
33849 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33850 <td>intaggr_vintr_pend</td>
33851 <td>77</td>
33852 </tr>
33853 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33854 <td>213</td>
33855 <td>78</td>
33856 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33857 <td>intaggr_vintr_pend</td>
33858 <td>78</td>
33859 </tr>
33860 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33861 <td>213</td>
33862 <td>79</td>
33863 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33864 <td>intaggr_vintr_pend</td>
33865 <td>79</td>
33866 </tr>
33867 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33868 <td>213</td>
33869 <td>80</td>
33870 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33871 <td>intaggr_vintr_pend</td>
33872 <td>80</td>
33873 </tr>
33874 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33875 <td>213</td>
33876 <td>81</td>
33877 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33878 <td>intaggr_vintr_pend</td>
33879 <td>81</td>
33880 </tr>
33881 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33882 <td>213</td>
33883 <td>82</td>
33884 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33885 <td>intaggr_vintr_pend</td>
33886 <td>82</td>
33887 </tr>
33888 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33889 <td>213</td>
33890 <td>83</td>
33891 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33892 <td>intaggr_vintr_pend</td>
33893 <td>83</td>
33894 </tr>
33895 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33896 <td>213</td>
33897 <td>84</td>
33898 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33899 <td>intaggr_vintr_pend</td>
33900 <td>84</td>
33901 </tr>
33902 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33903 <td>213</td>
33904 <td>85</td>
33905 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33906 <td>intaggr_vintr_pend</td>
33907 <td>85</td>
33908 </tr>
33909 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33910 <td>213</td>
33911 <td>86</td>
33912 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33913 <td>intaggr_vintr_pend</td>
33914 <td>86</td>
33915 </tr>
33916 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33917 <td>213</td>
33918 <td>87</td>
33919 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33920 <td>intaggr_vintr_pend</td>
33921 <td>87</td>
33922 </tr>
33923 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33924 <td>213</td>
33925 <td>88</td>
33926 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33927 <td>intaggr_vintr_pend</td>
33928 <td>88</td>
33929 </tr>
33930 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33931 <td>213</td>
33932 <td>89</td>
33933 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33934 <td>intaggr_vintr_pend</td>
33935 <td>89</td>
33936 </tr>
33937 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33938 <td>213</td>
33939 <td>90</td>
33940 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33941 <td>intaggr_vintr_pend</td>
33942 <td>90</td>
33943 </tr>
33944 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33945 <td>213</td>
33946 <td>91</td>
33947 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33948 <td>intaggr_vintr_pend</td>
33949 <td>91</td>
33950 </tr>
33951 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33952 <td>213</td>
33953 <td>92</td>
33954 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33955 <td>intaggr_vintr_pend</td>
33956 <td>92</td>
33957 </tr>
33958 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33959 <td>213</td>
33960 <td>93</td>
33961 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33962 <td>intaggr_vintr_pend</td>
33963 <td>93</td>
33964 </tr>
33965 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33966 <td>213</td>
33967 <td>94</td>
33968 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33969 <td>intaggr_vintr_pend</td>
33970 <td>94</td>
33971 </tr>
33972 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33973 <td>213</td>
33974 <td>95</td>
33975 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33976 <td>intaggr_vintr_pend</td>
33977 <td>95</td>
33978 </tr>
33979 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33980 <td>213</td>
33981 <td>96</td>
33982 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33983 <td>intaggr_vintr_pend</td>
33984 <td>96</td>
33985 </tr>
33986 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33987 <td>213</td>
33988 <td>97</td>
33989 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33990 <td>intaggr_vintr_pend</td>
33991 <td>97</td>
33992 </tr>
33993 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
33994 <td>213</td>
33995 <td>98</td>
33996 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
33997 <td>intaggr_vintr_pend</td>
33998 <td>98</td>
33999 </tr>
34000 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34001 <td>213</td>
34002 <td>99</td>
34003 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34004 <td>intaggr_vintr_pend</td>
34005 <td>99</td>
34006 </tr>
34007 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34008 <td>213</td>
34009 <td>100</td>
34010 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34011 <td>intaggr_vintr_pend</td>
34012 <td>100</td>
34013 </tr>
34014 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34015 <td>213</td>
34016 <td>101</td>
34017 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34018 <td>intaggr_vintr_pend</td>
34019 <td>101</td>
34020 </tr>
34021 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34022 <td>213</td>
34023 <td>102</td>
34024 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34025 <td>intaggr_vintr_pend</td>
34026 <td>102</td>
34027 </tr>
34028 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34029 <td>213</td>
34030 <td>103</td>
34031 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34032 <td>intaggr_vintr_pend</td>
34033 <td>103</td>
34034 </tr>
34035 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34036 <td>213</td>
34037 <td>104</td>
34038 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34039 <td>intaggr_vintr_pend</td>
34040 <td>104</td>
34041 </tr>
34042 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34043 <td>213</td>
34044 <td>105</td>
34045 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34046 <td>intaggr_vintr_pend</td>
34047 <td>105</td>
34048 </tr>
34049 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34050 <td>213</td>
34051 <td>106</td>
34052 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34053 <td>intaggr_vintr_pend</td>
34054 <td>106</td>
34055 </tr>
34056 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34057 <td>213</td>
34058 <td>107</td>
34059 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34060 <td>intaggr_vintr_pend</td>
34061 <td>107</td>
34062 </tr>
34063 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34064 <td>213</td>
34065 <td>108</td>
34066 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34067 <td>intaggr_vintr_pend</td>
34068 <td>108</td>
34069 </tr>
34070 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34071 <td>213</td>
34072 <td>109</td>
34073 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34074 <td>intaggr_vintr_pend</td>
34075 <td>109</td>
34076 </tr>
34077 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34078 <td>213</td>
34079 <td>110</td>
34080 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34081 <td>intaggr_vintr_pend</td>
34082 <td>110</td>
34083 </tr>
34084 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34085 <td>213</td>
34086 <td>111</td>
34087 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34088 <td>intaggr_vintr_pend</td>
34089 <td>111</td>
34090 </tr>
34091 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34092 <td>213</td>
34093 <td>112</td>
34094 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34095 <td>intaggr_vintr_pend</td>
34096 <td>112</td>
34097 </tr>
34098 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34099 <td>213</td>
34100 <td>113</td>
34101 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34102 <td>intaggr_vintr_pend</td>
34103 <td>113</td>
34104 </tr>
34105 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34106 <td>213</td>
34107 <td>114</td>
34108 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34109 <td>intaggr_vintr_pend</td>
34110 <td>114</td>
34111 </tr>
34112 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34113 <td>213</td>
34114 <td>115</td>
34115 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34116 <td>intaggr_vintr_pend</td>
34117 <td>115</td>
34118 </tr>
34119 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34120 <td>213</td>
34121 <td>116</td>
34122 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34123 <td>intaggr_vintr_pend</td>
34124 <td>116</td>
34125 </tr>
34126 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34127 <td>213</td>
34128 <td>117</td>
34129 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34130 <td>intaggr_vintr_pend</td>
34131 <td>117</td>
34132 </tr>
34133 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34134 <td>213</td>
34135 <td>118</td>
34136 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34137 <td>intaggr_vintr_pend</td>
34138 <td>118</td>
34139 </tr>
34140 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34141 <td>213</td>
34142 <td>119</td>
34143 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34144 <td>intaggr_vintr_pend</td>
34145 <td>119</td>
34146 </tr>
34147 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34148 <td>213</td>
34149 <td>120</td>
34150 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34151 <td>intaggr_vintr_pend</td>
34152 <td>120</td>
34153 </tr>
34154 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34155 <td>213</td>
34156 <td>121</td>
34157 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34158 <td>intaggr_vintr_pend</td>
34159 <td>121</td>
34160 </tr>
34161 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34162 <td>213</td>
34163 <td>122</td>
34164 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34165 <td>intaggr_vintr_pend</td>
34166 <td>122</td>
34167 </tr>
34168 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34169 <td>213</td>
34170 <td>123</td>
34171 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34172 <td>intaggr_vintr_pend</td>
34173 <td>123</td>
34174 </tr>
34175 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34176 <td>213</td>
34177 <td>124</td>
34178 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34179 <td>intaggr_vintr_pend</td>
34180 <td>124</td>
34181 </tr>
34182 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34183 <td>213</td>
34184 <td>125</td>
34185 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34186 <td>intaggr_vintr_pend</td>
34187 <td>125</td>
34188 </tr>
34189 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34190 <td>213</td>
34191 <td>126</td>
34192 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34193 <td>intaggr_vintr_pend</td>
34194 <td>126</td>
34195 </tr>
34196 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34197 <td>213</td>
34198 <td>127</td>
34199 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34200 <td>intaggr_vintr_pend</td>
34201 <td>127</td>
34202 </tr>
34203 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34204 <td>213</td>
34205 <td>128</td>
34206 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34207 <td>intaggr_vintr_pend</td>
34208 <td>128</td>
34209 </tr>
34210 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34211 <td>213</td>
34212 <td>129</td>
34213 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34214 <td>intaggr_vintr_pend</td>
34215 <td>129</td>
34216 </tr>
34217 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34218 <td>213</td>
34219 <td>130</td>
34220 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34221 <td>intaggr_vintr_pend</td>
34222 <td>130</td>
34223 </tr>
34224 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34225 <td>213</td>
34226 <td>131</td>
34227 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34228 <td>intaggr_vintr_pend</td>
34229 <td>131</td>
34230 </tr>
34231 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34232 <td>213</td>
34233 <td>132</td>
34234 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34235 <td>intaggr_vintr_pend</td>
34236 <td>132</td>
34237 </tr>
34238 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34239 <td>213</td>
34240 <td>133</td>
34241 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34242 <td>intaggr_vintr_pend</td>
34243 <td>133</td>
34244 </tr>
34245 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34246 <td>213</td>
34247 <td>134</td>
34248 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34249 <td>intaggr_vintr_pend</td>
34250 <td>134</td>
34251 </tr>
34252 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34253 <td>213</td>
34254 <td>135</td>
34255 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34256 <td>intaggr_vintr_pend</td>
34257 <td>135</td>
34258 </tr>
34259 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34260 <td>213</td>
34261 <td>136</td>
34262 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34263 <td>intaggr_vintr_pend</td>
34264 <td>136</td>
34265 </tr>
34266 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34267 <td>213</td>
34268 <td>137</td>
34269 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34270 <td>intaggr_vintr_pend</td>
34271 <td>137</td>
34272 </tr>
34273 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34274 <td>213</td>
34275 <td>138</td>
34276 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34277 <td>intaggr_vintr_pend</td>
34278 <td>138</td>
34279 </tr>
34280 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34281 <td>213</td>
34282 <td>139</td>
34283 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34284 <td>intaggr_vintr_pend</td>
34285 <td>139</td>
34286 </tr>
34287 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34288 <td>213</td>
34289 <td>140</td>
34290 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34291 <td>intaggr_vintr_pend</td>
34292 <td>140</td>
34293 </tr>
34294 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34295 <td>213</td>
34296 <td>141</td>
34297 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34298 <td>intaggr_vintr_pend</td>
34299 <td>141</td>
34300 </tr>
34301 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34302 <td>213</td>
34303 <td>142</td>
34304 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34305 <td>intaggr_vintr_pend</td>
34306 <td>142</td>
34307 </tr>
34308 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34309 <td>213</td>
34310 <td>143</td>
34311 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34312 <td>intaggr_vintr_pend</td>
34313 <td>143</td>
34314 </tr>
34315 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34316 <td>213</td>
34317 <td>144</td>
34318 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34319 <td>intaggr_vintr_pend</td>
34320 <td>144</td>
34321 </tr>
34322 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34323 <td>213</td>
34324 <td>145</td>
34325 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34326 <td>intaggr_vintr_pend</td>
34327 <td>145</td>
34328 </tr>
34329 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34330 <td>213</td>
34331 <td>146</td>
34332 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34333 <td>intaggr_vintr_pend</td>
34334 <td>146</td>
34335 </tr>
34336 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34337 <td>213</td>
34338 <td>147</td>
34339 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34340 <td>intaggr_vintr_pend</td>
34341 <td>147</td>
34342 </tr>
34343 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34344 <td>213</td>
34345 <td>148</td>
34346 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34347 <td>intaggr_vintr_pend</td>
34348 <td>148</td>
34349 </tr>
34350 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34351 <td>213</td>
34352 <td>149</td>
34353 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34354 <td>intaggr_vintr_pend</td>
34355 <td>149</td>
34356 </tr>
34357 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34358 <td>213</td>
34359 <td>150</td>
34360 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34361 <td>intaggr_vintr_pend</td>
34362 <td>150</td>
34363 </tr>
34364 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34365 <td>213</td>
34366 <td>151</td>
34367 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34368 <td>intaggr_vintr_pend</td>
34369 <td>151</td>
34370 </tr>
34371 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34372 <td>213</td>
34373 <td>152</td>
34374 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34375 <td>intaggr_vintr_pend</td>
34376 <td>152</td>
34377 </tr>
34378 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34379 <td>213</td>
34380 <td>153</td>
34381 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34382 <td>intaggr_vintr_pend</td>
34383 <td>153</td>
34384 </tr>
34385 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34386 <td>213</td>
34387 <td>154</td>
34388 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34389 <td>intaggr_vintr_pend</td>
34390 <td>154</td>
34391 </tr>
34392 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34393 <td>213</td>
34394 <td>155</td>
34395 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34396 <td>intaggr_vintr_pend</td>
34397 <td>155</td>
34398 </tr>
34399 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34400 <td>213</td>
34401 <td>156</td>
34402 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34403 <td>intaggr_vintr_pend</td>
34404 <td>156</td>
34405 </tr>
34406 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34407 <td>213</td>
34408 <td>157</td>
34409 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34410 <td>intaggr_vintr_pend</td>
34411 <td>157</td>
34412 </tr>
34413 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34414 <td>213</td>
34415 <td>158</td>
34416 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34417 <td>intaggr_vintr_pend</td>
34418 <td>158</td>
34419 </tr>
34420 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34421 <td>213</td>
34422 <td>159</td>
34423 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34424 <td>intaggr_vintr_pend</td>
34425 <td>159</td>
34426 </tr>
34427 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34428 <td>213</td>
34429 <td>160</td>
34430 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34431 <td>intaggr_vintr_pend</td>
34432 <td>160</td>
34433 </tr>
34434 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34435 <td>213</td>
34436 <td>161</td>
34437 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34438 <td>intaggr_vintr_pend</td>
34439 <td>161</td>
34440 </tr>
34441 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34442 <td>213</td>
34443 <td>162</td>
34444 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34445 <td>intaggr_vintr_pend</td>
34446 <td>162</td>
34447 </tr>
34448 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34449 <td>213</td>
34450 <td>163</td>
34451 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34452 <td>intaggr_vintr_pend</td>
34453 <td>163</td>
34454 </tr>
34455 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34456 <td>213</td>
34457 <td>164</td>
34458 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34459 <td>intaggr_vintr_pend</td>
34460 <td>164</td>
34461 </tr>
34462 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34463 <td>213</td>
34464 <td>165</td>
34465 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34466 <td>intaggr_vintr_pend</td>
34467 <td>165</td>
34468 </tr>
34469 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34470 <td>213</td>
34471 <td>166</td>
34472 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34473 <td>intaggr_vintr_pend</td>
34474 <td>166</td>
34475 </tr>
34476 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34477 <td>213</td>
34478 <td>167</td>
34479 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34480 <td>intaggr_vintr_pend</td>
34481 <td>167</td>
34482 </tr>
34483 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34484 <td>213</td>
34485 <td>168</td>
34486 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34487 <td>intaggr_vintr_pend</td>
34488 <td>168</td>
34489 </tr>
34490 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34491 <td>213</td>
34492 <td>169</td>
34493 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34494 <td>intaggr_vintr_pend</td>
34495 <td>169</td>
34496 </tr>
34497 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34498 <td>213</td>
34499 <td>170</td>
34500 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34501 <td>intaggr_vintr_pend</td>
34502 <td>170</td>
34503 </tr>
34504 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34505 <td>213</td>
34506 <td>171</td>
34507 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34508 <td>intaggr_vintr_pend</td>
34509 <td>171</td>
34510 </tr>
34511 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34512 <td>213</td>
34513 <td>172</td>
34514 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34515 <td>intaggr_vintr_pend</td>
34516 <td>172</td>
34517 </tr>
34518 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34519 <td>213</td>
34520 <td>173</td>
34521 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34522 <td>intaggr_vintr_pend</td>
34523 <td>173</td>
34524 </tr>
34525 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34526 <td>213</td>
34527 <td>174</td>
34528 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34529 <td>intaggr_vintr_pend</td>
34530 <td>174</td>
34531 </tr>
34532 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34533 <td>213</td>
34534 <td>175</td>
34535 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34536 <td>intaggr_vintr_pend</td>
34537 <td>175</td>
34538 </tr>
34539 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34540 <td>213</td>
34541 <td>176</td>
34542 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34543 <td>intaggr_vintr_pend</td>
34544 <td>176</td>
34545 </tr>
34546 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34547 <td>213</td>
34548 <td>177</td>
34549 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34550 <td>intaggr_vintr_pend</td>
34551 <td>177</td>
34552 </tr>
34553 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34554 <td>213</td>
34555 <td>178</td>
34556 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34557 <td>intaggr_vintr_pend</td>
34558 <td>178</td>
34559 </tr>
34560 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34561 <td>213</td>
34562 <td>179</td>
34563 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34564 <td>intaggr_vintr_pend</td>
34565 <td>179</td>
34566 </tr>
34567 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34568 <td>213</td>
34569 <td>180</td>
34570 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34571 <td>intaggr_vintr_pend</td>
34572 <td>180</td>
34573 </tr>
34574 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34575 <td>213</td>
34576 <td>181</td>
34577 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34578 <td>intaggr_vintr_pend</td>
34579 <td>181</td>
34580 </tr>
34581 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34582 <td>213</td>
34583 <td>182</td>
34584 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34585 <td>intaggr_vintr_pend</td>
34586 <td>182</td>
34587 </tr>
34588 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34589 <td>213</td>
34590 <td>183</td>
34591 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34592 <td>intaggr_vintr_pend</td>
34593 <td>183</td>
34594 </tr>
34595 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34596 <td>213</td>
34597 <td>184</td>
34598 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34599 <td>intaggr_vintr_pend</td>
34600 <td>184</td>
34601 </tr>
34602 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34603 <td>213</td>
34604 <td>185</td>
34605 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34606 <td>intaggr_vintr_pend</td>
34607 <td>185</td>
34608 </tr>
34609 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34610 <td>213</td>
34611 <td>186</td>
34612 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34613 <td>intaggr_vintr_pend</td>
34614 <td>186</td>
34615 </tr>
34616 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34617 <td>213</td>
34618 <td>187</td>
34619 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34620 <td>intaggr_vintr_pend</td>
34621 <td>187</td>
34622 </tr>
34623 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34624 <td>213</td>
34625 <td>188</td>
34626 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34627 <td>intaggr_vintr_pend</td>
34628 <td>188</td>
34629 </tr>
34630 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34631 <td>213</td>
34632 <td>189</td>
34633 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34634 <td>intaggr_vintr_pend</td>
34635 <td>189</td>
34636 </tr>
34637 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34638 <td>213</td>
34639 <td>190</td>
34640 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34641 <td>intaggr_vintr_pend</td>
34642 <td>190</td>
34643 </tr>
34644 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34645 <td>213</td>
34646 <td>191</td>
34647 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34648 <td>intaggr_vintr_pend</td>
34649 <td>191</td>
34650 </tr>
34651 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34652 <td>213</td>
34653 <td>192</td>
34654 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34655 <td>intaggr_vintr_pend</td>
34656 <td>192</td>
34657 </tr>
34658 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34659 <td>213</td>
34660 <td>193</td>
34661 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34662 <td>intaggr_vintr_pend</td>
34663 <td>193</td>
34664 </tr>
34665 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34666 <td>213</td>
34667 <td>194</td>
34668 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34669 <td>intaggr_vintr_pend</td>
34670 <td>194</td>
34671 </tr>
34672 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34673 <td>213</td>
34674 <td>195</td>
34675 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34676 <td>intaggr_vintr_pend</td>
34677 <td>195</td>
34678 </tr>
34679 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34680 <td>213</td>
34681 <td>196</td>
34682 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34683 <td>intaggr_vintr_pend</td>
34684 <td>196</td>
34685 </tr>
34686 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34687 <td>213</td>
34688 <td>197</td>
34689 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34690 <td>intaggr_vintr_pend</td>
34691 <td>197</td>
34692 </tr>
34693 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34694 <td>213</td>
34695 <td>198</td>
34696 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34697 <td>intaggr_vintr_pend</td>
34698 <td>198</td>
34699 </tr>
34700 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34701 <td>213</td>
34702 <td>199</td>
34703 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34704 <td>intaggr_vintr_pend</td>
34705 <td>199</td>
34706 </tr>
34707 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34708 <td>213</td>
34709 <td>200</td>
34710 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34711 <td>intaggr_vintr_pend</td>
34712 <td>200</td>
34713 </tr>
34714 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34715 <td>213</td>
34716 <td>201</td>
34717 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34718 <td>intaggr_vintr_pend</td>
34719 <td>201</td>
34720 </tr>
34721 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34722 <td>213</td>
34723 <td>202</td>
34724 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34725 <td>intaggr_vintr_pend</td>
34726 <td>202</td>
34727 </tr>
34728 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34729 <td>213</td>
34730 <td>203</td>
34731 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34732 <td>intaggr_vintr_pend</td>
34733 <td>203</td>
34734 </tr>
34735 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34736 <td>213</td>
34737 <td>204</td>
34738 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34739 <td>intaggr_vintr_pend</td>
34740 <td>204</td>
34741 </tr>
34742 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34743 <td>213</td>
34744 <td>205</td>
34745 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34746 <td>intaggr_vintr_pend</td>
34747 <td>205</td>
34748 </tr>
34749 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34750 <td>213</td>
34751 <td>206</td>
34752 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34753 <td>intaggr_vintr_pend</td>
34754 <td>206</td>
34755 </tr>
34756 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34757 <td>213</td>
34758 <td>207</td>
34759 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34760 <td>intaggr_vintr_pend</td>
34761 <td>207</td>
34762 </tr>
34763 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34764 <td>213</td>
34765 <td>208</td>
34766 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34767 <td>intaggr_vintr_pend</td>
34768 <td>208</td>
34769 </tr>
34770 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34771 <td>213</td>
34772 <td>209</td>
34773 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34774 <td>intaggr_vintr_pend</td>
34775 <td>209</td>
34776 </tr>
34777 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34778 <td>213</td>
34779 <td>210</td>
34780 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34781 <td>intaggr_vintr_pend</td>
34782 <td>210</td>
34783 </tr>
34784 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34785 <td>213</td>
34786 <td>211</td>
34787 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34788 <td>intaggr_vintr_pend</td>
34789 <td>211</td>
34790 </tr>
34791 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34792 <td>213</td>
34793 <td>212</td>
34794 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34795 <td>intaggr_vintr_pend</td>
34796 <td>212</td>
34797 </tr>
34798 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34799 <td>213</td>
34800 <td>213</td>
34801 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34802 <td>intaggr_vintr_pend</td>
34803 <td>213</td>
34804 </tr>
34805 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34806 <td>213</td>
34807 <td>214</td>
34808 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34809 <td>intaggr_vintr_pend</td>
34810 <td>214</td>
34811 </tr>
34812 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34813 <td>213</td>
34814 <td>215</td>
34815 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34816 <td>intaggr_vintr_pend</td>
34817 <td>215</td>
34818 </tr>
34819 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34820 <td>213</td>
34821 <td>216</td>
34822 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34823 <td>intaggr_vintr_pend</td>
34824 <td>216</td>
34825 </tr>
34826 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34827 <td>213</td>
34828 <td>217</td>
34829 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34830 <td>intaggr_vintr_pend</td>
34831 <td>217</td>
34832 </tr>
34833 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34834 <td>213</td>
34835 <td>218</td>
34836 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34837 <td>intaggr_vintr_pend</td>
34838 <td>218</td>
34839 </tr>
34840 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34841 <td>213</td>
34842 <td>219</td>
34843 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34844 <td>intaggr_vintr_pend</td>
34845 <td>219</td>
34846 </tr>
34847 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34848 <td>213</td>
34849 <td>220</td>
34850 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34851 <td>intaggr_vintr_pend</td>
34852 <td>220</td>
34853 </tr>
34854 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34855 <td>213</td>
34856 <td>221</td>
34857 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34858 <td>intaggr_vintr_pend</td>
34859 <td>221</td>
34860 </tr>
34861 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34862 <td>213</td>
34863 <td>222</td>
34864 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34865 <td>intaggr_vintr_pend</td>
34866 <td>222</td>
34867 </tr>
34868 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34869 <td>213</td>
34870 <td>223</td>
34871 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34872 <td>intaggr_vintr_pend</td>
34873 <td>223</td>
34874 </tr>
34875 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34876 <td>213</td>
34877 <td>224</td>
34878 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34879 <td>intaggr_vintr_pend</td>
34880 <td>224</td>
34881 </tr>
34882 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34883 <td>213</td>
34884 <td>225</td>
34885 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34886 <td>intaggr_vintr_pend</td>
34887 <td>225</td>
34888 </tr>
34889 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34890 <td>213</td>
34891 <td>226</td>
34892 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34893 <td>intaggr_vintr_pend</td>
34894 <td>226</td>
34895 </tr>
34896 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34897 <td>213</td>
34898 <td>227</td>
34899 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34900 <td>intaggr_vintr_pend</td>
34901 <td>227</td>
34902 </tr>
34903 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34904 <td>213</td>
34905 <td>228</td>
34906 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34907 <td>intaggr_vintr_pend</td>
34908 <td>228</td>
34909 </tr>
34910 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34911 <td>213</td>
34912 <td>229</td>
34913 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34914 <td>intaggr_vintr_pend</td>
34915 <td>229</td>
34916 </tr>
34917 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34918 <td>213</td>
34919 <td>230</td>
34920 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34921 <td>intaggr_vintr_pend</td>
34922 <td>230</td>
34923 </tr>
34924 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34925 <td>213</td>
34926 <td>231</td>
34927 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34928 <td>intaggr_vintr_pend</td>
34929 <td>231</td>
34930 </tr>
34931 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34932 <td>213</td>
34933 <td>232</td>
34934 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34935 <td>intaggr_vintr_pend</td>
34936 <td>232</td>
34937 </tr>
34938 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34939 <td>213</td>
34940 <td>233</td>
34941 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34942 <td>intaggr_vintr_pend</td>
34943 <td>233</td>
34944 </tr>
34945 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34946 <td>213</td>
34947 <td>234</td>
34948 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34949 <td>intaggr_vintr_pend</td>
34950 <td>234</td>
34951 </tr>
34952 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34953 <td>213</td>
34954 <td>235</td>
34955 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34956 <td>intaggr_vintr_pend</td>
34957 <td>235</td>
34958 </tr>
34959 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34960 <td>213</td>
34961 <td>236</td>
34962 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34963 <td>intaggr_vintr_pend</td>
34964 <td>236</td>
34965 </tr>
34966 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34967 <td>213</td>
34968 <td>237</td>
34969 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34970 <td>intaggr_vintr_pend</td>
34971 <td>237</td>
34972 </tr>
34973 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34974 <td>213</td>
34975 <td>238</td>
34976 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34977 <td>intaggr_vintr_pend</td>
34978 <td>238</td>
34979 </tr>
34980 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34981 <td>213</td>
34982 <td>239</td>
34983 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34984 <td>intaggr_vintr_pend</td>
34985 <td>239</td>
34986 </tr>
34987 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34988 <td>213</td>
34989 <td>240</td>
34990 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34991 <td>intaggr_vintr_pend</td>
34992 <td>240</td>
34993 </tr>
34994 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
34995 <td>213</td>
34996 <td>241</td>
34997 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
34998 <td>intaggr_vintr_pend</td>
34999 <td>241</td>
35000 </tr>
35001 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35002 <td>213</td>
35003 <td>242</td>
35004 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35005 <td>intaggr_vintr_pend</td>
35006 <td>242</td>
35007 </tr>
35008 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35009 <td>213</td>
35010 <td>243</td>
35011 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35012 <td>intaggr_vintr_pend</td>
35013 <td>243</td>
35014 </tr>
35015 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35016 <td>213</td>
35017 <td>244</td>
35018 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35019 <td>intaggr_vintr_pend</td>
35020 <td>244</td>
35021 </tr>
35022 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35023 <td>213</td>
35024 <td>245</td>
35025 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35026 <td>intaggr_vintr_pend</td>
35027 <td>245</td>
35028 </tr>
35029 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35030 <td>213</td>
35031 <td>246</td>
35032 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35033 <td>intaggr_vintr_pend</td>
35034 <td>246</td>
35035 </tr>
35036 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35037 <td>213</td>
35038 <td>247</td>
35039 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35040 <td>intaggr_vintr_pend</td>
35041 <td>247</td>
35042 </tr>
35043 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35044 <td>213</td>
35045 <td>248</td>
35046 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35047 <td>intaggr_vintr_pend</td>
35048 <td>248</td>
35049 </tr>
35050 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35051 <td>213</td>
35052 <td>249</td>
35053 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35054 <td>intaggr_vintr_pend</td>
35055 <td>249</td>
35056 </tr>
35057 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35058 <td>213</td>
35059 <td>250</td>
35060 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35061 <td>intaggr_vintr_pend</td>
35062 <td>250</td>
35063 </tr>
35064 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35065 <td>213</td>
35066 <td>251</td>
35067 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35068 <td>intaggr_vintr_pend</td>
35069 <td>251</td>
35070 </tr>
35071 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35072 <td>213</td>
35073 <td>252</td>
35074 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35075 <td>intaggr_vintr_pend</td>
35076 <td>252</td>
35077 </tr>
35078 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35079 <td>213</td>
35080 <td>253</td>
35081 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35082 <td>intaggr_vintr_pend</td>
35083 <td>253</td>
35084 </tr>
35085 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35086 <td>213</td>
35087 <td>254</td>
35088 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35089 <td>intaggr_vintr_pend</td>
35090 <td>254</td>
35091 </tr>
35092 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35093 <td>213</td>
35094 <td>255</td>
35095 <td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
35096 <td>intaggr_vintr_pend</td>
35097 <td>255</td>
35098 </tr>
35099 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35100 <td>213</td>
35101 <td>256</td>
35102 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35103 <td>intaggr_vintr_pend</td>
35104 <td>0</td>
35105 </tr>
35106 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35107 <td>213</td>
35108 <td>257</td>
35109 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35110 <td>intaggr_vintr_pend</td>
35111 <td>1</td>
35112 </tr>
35113 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35114 <td>213</td>
35115 <td>258</td>
35116 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35117 <td>intaggr_vintr_pend</td>
35118 <td>2</td>
35119 </tr>
35120 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35121 <td>213</td>
35122 <td>259</td>
35123 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35124 <td>intaggr_vintr_pend</td>
35125 <td>3</td>
35126 </tr>
35127 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35128 <td>213</td>
35129 <td>260</td>
35130 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35131 <td>intaggr_vintr_pend</td>
35132 <td>4</td>
35133 </tr>
35134 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35135 <td>213</td>
35136 <td>261</td>
35137 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35138 <td>intaggr_vintr_pend</td>
35139 <td>5</td>
35140 </tr>
35141 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35142 <td>213</td>
35143 <td>262</td>
35144 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35145 <td>intaggr_vintr_pend</td>
35146 <td>6</td>
35147 </tr>
35148 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35149 <td>213</td>
35150 <td>263</td>
35151 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35152 <td>intaggr_vintr_pend</td>
35153 <td>7</td>
35154 </tr>
35155 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35156 <td>213</td>
35157 <td>264</td>
35158 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35159 <td>intaggr_vintr_pend</td>
35160 <td>8</td>
35161 </tr>
35162 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35163 <td>213</td>
35164 <td>265</td>
35165 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35166 <td>intaggr_vintr_pend</td>
35167 <td>9</td>
35168 </tr>
35169 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35170 <td>213</td>
35171 <td>266</td>
35172 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35173 <td>intaggr_vintr_pend</td>
35174 <td>10</td>
35175 </tr>
35176 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35177 <td>213</td>
35178 <td>267</td>
35179 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35180 <td>intaggr_vintr_pend</td>
35181 <td>11</td>
35182 </tr>
35183 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35184 <td>213</td>
35185 <td>268</td>
35186 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35187 <td>intaggr_vintr_pend</td>
35188 <td>12</td>
35189 </tr>
35190 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35191 <td>213</td>
35192 <td>269</td>
35193 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35194 <td>intaggr_vintr_pend</td>
35195 <td>13</td>
35196 </tr>
35197 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35198 <td>213</td>
35199 <td>270</td>
35200 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35201 <td>intaggr_vintr_pend</td>
35202 <td>14</td>
35203 </tr>
35204 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35205 <td>213</td>
35206 <td>271</td>
35207 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35208 <td>intaggr_vintr_pend</td>
35209 <td>15</td>
35210 </tr>
35211 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35212 <td>213</td>
35213 <td>272</td>
35214 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35215 <td>intaggr_vintr_pend</td>
35216 <td>16</td>
35217 </tr>
35218 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35219 <td>213</td>
35220 <td>273</td>
35221 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35222 <td>intaggr_vintr_pend</td>
35223 <td>17</td>
35224 </tr>
35225 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35226 <td>213</td>
35227 <td>274</td>
35228 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35229 <td>intaggr_vintr_pend</td>
35230 <td>18</td>
35231 </tr>
35232 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35233 <td>213</td>
35234 <td>275</td>
35235 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35236 <td>intaggr_vintr_pend</td>
35237 <td>19</td>
35238 </tr>
35239 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35240 <td>213</td>
35241 <td>276</td>
35242 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35243 <td>intaggr_vintr_pend</td>
35244 <td>20</td>
35245 </tr>
35246 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35247 <td>213</td>
35248 <td>277</td>
35249 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35250 <td>intaggr_vintr_pend</td>
35251 <td>21</td>
35252 </tr>
35253 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35254 <td>213</td>
35255 <td>278</td>
35256 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35257 <td>intaggr_vintr_pend</td>
35258 <td>22</td>
35259 </tr>
35260 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35261 <td>213</td>
35262 <td>279</td>
35263 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35264 <td>intaggr_vintr_pend</td>
35265 <td>23</td>
35266 </tr>
35267 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35268 <td>213</td>
35269 <td>280</td>
35270 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35271 <td>intaggr_vintr_pend</td>
35272 <td>24</td>
35273 </tr>
35274 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35275 <td>213</td>
35276 <td>281</td>
35277 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35278 <td>intaggr_vintr_pend</td>
35279 <td>25</td>
35280 </tr>
35281 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35282 <td>213</td>
35283 <td>282</td>
35284 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35285 <td>intaggr_vintr_pend</td>
35286 <td>26</td>
35287 </tr>
35288 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35289 <td>213</td>
35290 <td>283</td>
35291 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35292 <td>intaggr_vintr_pend</td>
35293 <td>27</td>
35294 </tr>
35295 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35296 <td>213</td>
35297 <td>284</td>
35298 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35299 <td>intaggr_vintr_pend</td>
35300 <td>28</td>
35301 </tr>
35302 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35303 <td>213</td>
35304 <td>285</td>
35305 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35306 <td>intaggr_vintr_pend</td>
35307 <td>29</td>
35308 </tr>
35309 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35310 <td>213</td>
35311 <td>286</td>
35312 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35313 <td>intaggr_vintr_pend</td>
35314 <td>30</td>
35315 </tr>
35316 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35317 <td>213</td>
35318 <td>287</td>
35319 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35320 <td>intaggr_vintr_pend</td>
35321 <td>31</td>
35322 </tr>
35323 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35324 <td>213</td>
35325 <td>288</td>
35326 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35327 <td>intaggr_vintr_pend</td>
35328 <td>32</td>
35329 </tr>
35330 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35331 <td>213</td>
35332 <td>289</td>
35333 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35334 <td>intaggr_vintr_pend</td>
35335 <td>33</td>
35336 </tr>
35337 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35338 <td>213</td>
35339 <td>290</td>
35340 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35341 <td>intaggr_vintr_pend</td>
35342 <td>34</td>
35343 </tr>
35344 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35345 <td>213</td>
35346 <td>291</td>
35347 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35348 <td>intaggr_vintr_pend</td>
35349 <td>35</td>
35350 </tr>
35351 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35352 <td>213</td>
35353 <td>292</td>
35354 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35355 <td>intaggr_vintr_pend</td>
35356 <td>36</td>
35357 </tr>
35358 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35359 <td>213</td>
35360 <td>293</td>
35361 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35362 <td>intaggr_vintr_pend</td>
35363 <td>37</td>
35364 </tr>
35365 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35366 <td>213</td>
35367 <td>294</td>
35368 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35369 <td>intaggr_vintr_pend</td>
35370 <td>38</td>
35371 </tr>
35372 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35373 <td>213</td>
35374 <td>295</td>
35375 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35376 <td>intaggr_vintr_pend</td>
35377 <td>39</td>
35378 </tr>
35379 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35380 <td>213</td>
35381 <td>296</td>
35382 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35383 <td>intaggr_vintr_pend</td>
35384 <td>40</td>
35385 </tr>
35386 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35387 <td>213</td>
35388 <td>297</td>
35389 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35390 <td>intaggr_vintr_pend</td>
35391 <td>41</td>
35392 </tr>
35393 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35394 <td>213</td>
35395 <td>298</td>
35396 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35397 <td>intaggr_vintr_pend</td>
35398 <td>42</td>
35399 </tr>
35400 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35401 <td>213</td>
35402 <td>299</td>
35403 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35404 <td>intaggr_vintr_pend</td>
35405 <td>43</td>
35406 </tr>
35407 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35408 <td>213</td>
35409 <td>300</td>
35410 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35411 <td>intaggr_vintr_pend</td>
35412 <td>44</td>
35413 </tr>
35414 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35415 <td>213</td>
35416 <td>301</td>
35417 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35418 <td>intaggr_vintr_pend</td>
35419 <td>45</td>
35420 </tr>
35421 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35422 <td>213</td>
35423 <td>302</td>
35424 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35425 <td>intaggr_vintr_pend</td>
35426 <td>46</td>
35427 </tr>
35428 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35429 <td>213</td>
35430 <td>303</td>
35431 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35432 <td>intaggr_vintr_pend</td>
35433 <td>47</td>
35434 </tr>
35435 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35436 <td>213</td>
35437 <td>304</td>
35438 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35439 <td>intaggr_vintr_pend</td>
35440 <td>48</td>
35441 </tr>
35442 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35443 <td>213</td>
35444 <td>305</td>
35445 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35446 <td>intaggr_vintr_pend</td>
35447 <td>49</td>
35448 </tr>
35449 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35450 <td>213</td>
35451 <td>306</td>
35452 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35453 <td>intaggr_vintr_pend</td>
35454 <td>50</td>
35455 </tr>
35456 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35457 <td>213</td>
35458 <td>307</td>
35459 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35460 <td>intaggr_vintr_pend</td>
35461 <td>51</td>
35462 </tr>
35463 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35464 <td>213</td>
35465 <td>308</td>
35466 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35467 <td>intaggr_vintr_pend</td>
35468 <td>52</td>
35469 </tr>
35470 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35471 <td>213</td>
35472 <td>309</td>
35473 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35474 <td>intaggr_vintr_pend</td>
35475 <td>53</td>
35476 </tr>
35477 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35478 <td>213</td>
35479 <td>310</td>
35480 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35481 <td>intaggr_vintr_pend</td>
35482 <td>54</td>
35483 </tr>
35484 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35485 <td>213</td>
35486 <td>311</td>
35487 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35488 <td>intaggr_vintr_pend</td>
35489 <td>55</td>
35490 </tr>
35491 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35492 <td>213</td>
35493 <td>312</td>
35494 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35495 <td>intaggr_vintr_pend</td>
35496 <td>56</td>
35497 </tr>
35498 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35499 <td>213</td>
35500 <td>313</td>
35501 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35502 <td>intaggr_vintr_pend</td>
35503 <td>57</td>
35504 </tr>
35505 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35506 <td>213</td>
35507 <td>314</td>
35508 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35509 <td>intaggr_vintr_pend</td>
35510 <td>58</td>
35511 </tr>
35512 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35513 <td>213</td>
35514 <td>315</td>
35515 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35516 <td>intaggr_vintr_pend</td>
35517 <td>59</td>
35518 </tr>
35519 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35520 <td>213</td>
35521 <td>316</td>
35522 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35523 <td>intaggr_vintr_pend</td>
35524 <td>60</td>
35525 </tr>
35526 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35527 <td>213</td>
35528 <td>317</td>
35529 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35530 <td>intaggr_vintr_pend</td>
35531 <td>61</td>
35532 </tr>
35533 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35534 <td>213</td>
35535 <td>318</td>
35536 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35537 <td>intaggr_vintr_pend</td>
35538 <td>62</td>
35539 </tr>
35540 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35541 <td>213</td>
35542 <td>319</td>
35543 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
35544 <td>intaggr_vintr_pend</td>
35545 <td>63</td>
35546 </tr>
35547 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35548 <td>213</td>
35549 <td>320</td>
35550 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35551 <td>intaggr_vintr_pend</td>
35552 <td>0</td>
35553 </tr>
35554 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35555 <td>213</td>
35556 <td>321</td>
35557 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35558 <td>intaggr_vintr_pend</td>
35559 <td>1</td>
35560 </tr>
35561 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35562 <td>213</td>
35563 <td>322</td>
35564 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35565 <td>intaggr_vintr_pend</td>
35566 <td>2</td>
35567 </tr>
35568 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35569 <td>213</td>
35570 <td>323</td>
35571 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35572 <td>intaggr_vintr_pend</td>
35573 <td>3</td>
35574 </tr>
35575 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35576 <td>213</td>
35577 <td>324</td>
35578 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35579 <td>intaggr_vintr_pend</td>
35580 <td>4</td>
35581 </tr>
35582 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35583 <td>213</td>
35584 <td>325</td>
35585 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35586 <td>intaggr_vintr_pend</td>
35587 <td>5</td>
35588 </tr>
35589 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35590 <td>213</td>
35591 <td>326</td>
35592 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35593 <td>intaggr_vintr_pend</td>
35594 <td>6</td>
35595 </tr>
35596 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35597 <td>213</td>
35598 <td>327</td>
35599 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35600 <td>intaggr_vintr_pend</td>
35601 <td>7</td>
35602 </tr>
35603 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35604 <td>213</td>
35605 <td>328</td>
35606 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35607 <td>intaggr_vintr_pend</td>
35608 <td>8</td>
35609 </tr>
35610 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35611 <td>213</td>
35612 <td>329</td>
35613 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35614 <td>intaggr_vintr_pend</td>
35615 <td>9</td>
35616 </tr>
35617 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35618 <td>213</td>
35619 <td>330</td>
35620 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35621 <td>intaggr_vintr_pend</td>
35622 <td>10</td>
35623 </tr>
35624 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35625 <td>213</td>
35626 <td>331</td>
35627 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35628 <td>intaggr_vintr_pend</td>
35629 <td>11</td>
35630 </tr>
35631 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35632 <td>213</td>
35633 <td>332</td>
35634 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35635 <td>intaggr_vintr_pend</td>
35636 <td>12</td>
35637 </tr>
35638 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35639 <td>213</td>
35640 <td>333</td>
35641 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35642 <td>intaggr_vintr_pend</td>
35643 <td>13</td>
35644 </tr>
35645 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35646 <td>213</td>
35647 <td>334</td>
35648 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35649 <td>intaggr_vintr_pend</td>
35650 <td>14</td>
35651 </tr>
35652 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35653 <td>213</td>
35654 <td>335</td>
35655 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35656 <td>intaggr_vintr_pend</td>
35657 <td>15</td>
35658 </tr>
35659 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35660 <td>213</td>
35661 <td>336</td>
35662 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35663 <td>intaggr_vintr_pend</td>
35664 <td>16</td>
35665 </tr>
35666 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35667 <td>213</td>
35668 <td>337</td>
35669 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35670 <td>intaggr_vintr_pend</td>
35671 <td>17</td>
35672 </tr>
35673 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35674 <td>213</td>
35675 <td>338</td>
35676 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35677 <td>intaggr_vintr_pend</td>
35678 <td>18</td>
35679 </tr>
35680 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35681 <td>213</td>
35682 <td>339</td>
35683 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35684 <td>intaggr_vintr_pend</td>
35685 <td>19</td>
35686 </tr>
35687 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35688 <td>213</td>
35689 <td>340</td>
35690 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35691 <td>intaggr_vintr_pend</td>
35692 <td>20</td>
35693 </tr>
35694 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35695 <td>213</td>
35696 <td>341</td>
35697 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35698 <td>intaggr_vintr_pend</td>
35699 <td>21</td>
35700 </tr>
35701 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35702 <td>213</td>
35703 <td>342</td>
35704 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35705 <td>intaggr_vintr_pend</td>
35706 <td>22</td>
35707 </tr>
35708 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35709 <td>213</td>
35710 <td>343</td>
35711 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35712 <td>intaggr_vintr_pend</td>
35713 <td>23</td>
35714 </tr>
35715 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35716 <td>213</td>
35717 <td>344</td>
35718 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35719 <td>intaggr_vintr_pend</td>
35720 <td>24</td>
35721 </tr>
35722 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35723 <td>213</td>
35724 <td>345</td>
35725 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35726 <td>intaggr_vintr_pend</td>
35727 <td>25</td>
35728 </tr>
35729 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35730 <td>213</td>
35731 <td>346</td>
35732 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35733 <td>intaggr_vintr_pend</td>
35734 <td>26</td>
35735 </tr>
35736 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35737 <td>213</td>
35738 <td>347</td>
35739 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35740 <td>intaggr_vintr_pend</td>
35741 <td>27</td>
35742 </tr>
35743 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35744 <td>213</td>
35745 <td>348</td>
35746 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35747 <td>intaggr_vintr_pend</td>
35748 <td>28</td>
35749 </tr>
35750 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35751 <td>213</td>
35752 <td>349</td>
35753 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35754 <td>intaggr_vintr_pend</td>
35755 <td>29</td>
35756 </tr>
35757 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35758 <td>213</td>
35759 <td>350</td>
35760 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35761 <td>intaggr_vintr_pend</td>
35762 <td>30</td>
35763 </tr>
35764 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35765 <td>213</td>
35766 <td>351</td>
35767 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35768 <td>intaggr_vintr_pend</td>
35769 <td>31</td>
35770 </tr>
35771 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35772 <td>213</td>
35773 <td>352</td>
35774 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35775 <td>intaggr_vintr_pend</td>
35776 <td>32</td>
35777 </tr>
35778 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35779 <td>213</td>
35780 <td>353</td>
35781 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35782 <td>intaggr_vintr_pend</td>
35783 <td>33</td>
35784 </tr>
35785 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35786 <td>213</td>
35787 <td>354</td>
35788 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35789 <td>intaggr_vintr_pend</td>
35790 <td>34</td>
35791 </tr>
35792 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35793 <td>213</td>
35794 <td>355</td>
35795 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35796 <td>intaggr_vintr_pend</td>
35797 <td>35</td>
35798 </tr>
35799 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35800 <td>213</td>
35801 <td>356</td>
35802 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35803 <td>intaggr_vintr_pend</td>
35804 <td>36</td>
35805 </tr>
35806 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35807 <td>213</td>
35808 <td>357</td>
35809 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35810 <td>intaggr_vintr_pend</td>
35811 <td>37</td>
35812 </tr>
35813 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35814 <td>213</td>
35815 <td>358</td>
35816 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35817 <td>intaggr_vintr_pend</td>
35818 <td>38</td>
35819 </tr>
35820 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35821 <td>213</td>
35822 <td>359</td>
35823 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35824 <td>intaggr_vintr_pend</td>
35825 <td>39</td>
35826 </tr>
35827 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35828 <td>213</td>
35829 <td>360</td>
35830 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35831 <td>intaggr_vintr_pend</td>
35832 <td>40</td>
35833 </tr>
35834 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35835 <td>213</td>
35836 <td>361</td>
35837 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35838 <td>intaggr_vintr_pend</td>
35839 <td>41</td>
35840 </tr>
35841 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35842 <td>213</td>
35843 <td>362</td>
35844 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35845 <td>intaggr_vintr_pend</td>
35846 <td>42</td>
35847 </tr>
35848 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35849 <td>213</td>
35850 <td>363</td>
35851 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35852 <td>intaggr_vintr_pend</td>
35853 <td>43</td>
35854 </tr>
35855 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35856 <td>213</td>
35857 <td>364</td>
35858 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35859 <td>intaggr_vintr_pend</td>
35860 <td>44</td>
35861 </tr>
35862 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35863 <td>213</td>
35864 <td>365</td>
35865 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35866 <td>intaggr_vintr_pend</td>
35867 <td>45</td>
35868 </tr>
35869 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35870 <td>213</td>
35871 <td>366</td>
35872 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35873 <td>intaggr_vintr_pend</td>
35874 <td>46</td>
35875 </tr>
35876 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35877 <td>213</td>
35878 <td>367</td>
35879 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35880 <td>intaggr_vintr_pend</td>
35881 <td>47</td>
35882 </tr>
35883 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35884 <td>213</td>
35885 <td>368</td>
35886 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35887 <td>intaggr_vintr_pend</td>
35888 <td>48</td>
35889 </tr>
35890 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35891 <td>213</td>
35892 <td>369</td>
35893 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35894 <td>intaggr_vintr_pend</td>
35895 <td>49</td>
35896 </tr>
35897 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35898 <td>213</td>
35899 <td>370</td>
35900 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35901 <td>intaggr_vintr_pend</td>
35902 <td>50</td>
35903 </tr>
35904 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35905 <td>213</td>
35906 <td>371</td>
35907 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35908 <td>intaggr_vintr_pend</td>
35909 <td>51</td>
35910 </tr>
35911 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35912 <td>213</td>
35913 <td>372</td>
35914 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35915 <td>intaggr_vintr_pend</td>
35916 <td>52</td>
35917 </tr>
35918 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35919 <td>213</td>
35920 <td>373</td>
35921 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35922 <td>intaggr_vintr_pend</td>
35923 <td>53</td>
35924 </tr>
35925 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35926 <td>213</td>
35927 <td>374</td>
35928 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35929 <td>intaggr_vintr_pend</td>
35930 <td>54</td>
35931 </tr>
35932 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35933 <td>213</td>
35934 <td>375</td>
35935 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35936 <td>intaggr_vintr_pend</td>
35937 <td>55</td>
35938 </tr>
35939 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35940 <td>213</td>
35941 <td>376</td>
35942 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35943 <td>intaggr_vintr_pend</td>
35944 <td>56</td>
35945 </tr>
35946 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35947 <td>213</td>
35948 <td>377</td>
35949 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35950 <td>intaggr_vintr_pend</td>
35951 <td>57</td>
35952 </tr>
35953 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35954 <td>213</td>
35955 <td>378</td>
35956 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35957 <td>intaggr_vintr_pend</td>
35958 <td>58</td>
35959 </tr>
35960 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35961 <td>213</td>
35962 <td>379</td>
35963 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35964 <td>intaggr_vintr_pend</td>
35965 <td>59</td>
35966 </tr>
35967 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35968 <td>213</td>
35969 <td>380</td>
35970 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35971 <td>intaggr_vintr_pend</td>
35972 <td>60</td>
35973 </tr>
35974 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35975 <td>213</td>
35976 <td>381</td>
35977 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35978 <td>intaggr_vintr_pend</td>
35979 <td>61</td>
35980 </tr>
35981 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35982 <td>213</td>
35983 <td>382</td>
35984 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35985 <td>intaggr_vintr_pend</td>
35986 <td>62</td>
35987 </tr>
35988 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35989 <td>213</td>
35990 <td>383</td>
35991 <td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
35992 <td>intaggr_vintr_pend</td>
35993 <td>63</td>
35994 </tr>
35995 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
35996 <td>213</td>
35997 <td>384</td>
35998 <td>J721E_DEV_NAVSS0_MCRC_0</td>
35999 <td>dma_event_intr</td>
36000 <td>0</td>
36001 </tr>
36002 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36003 <td>213</td>
36004 <td>385</td>
36005 <td>J721E_DEV_NAVSS0_MCRC_0</td>
36006 <td>dma_event_intr</td>
36007 <td>1</td>
36008 </tr>
36009 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36010 <td>213</td>
36011 <td>386</td>
36012 <td>J721E_DEV_NAVSS0_MCRC_0</td>
36013 <td>dma_event_intr</td>
36014 <td>2</td>
36015 </tr>
36016 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36017 <td>213</td>
36018 <td>387</td>
36019 <td>J721E_DEV_NAVSS0_MCRC_0</td>
36020 <td>dma_event_intr</td>
36021 <td>3</td>
36022 </tr>
36023 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36024 <td>213</td>
36025 <td>388</td>
36026 <td>J721E_DEV_NAVSS0_MCRC_0</td>
36027 <td>intaggr_vintr_pend</td>
36028 <td>0</td>
36029 </tr>
36030 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36031 <td>213</td>
36032 <td>389</td>
36033 <td>Not Connected</td>
36034 <td>&#160;</td>
36035 <td>&#160;</td>
36036 </tr>
36037 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36038 <td>213</td>
36039 <td>390</td>
36040 <td>Not Connected</td>
36041 <td>&#160;</td>
36042 <td>&#160;</td>
36043 </tr>
36044 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36045 <td>213</td>
36046 <td>391</td>
36047 <td>J721E_DEV_NAVSS0_CPTS_0</td>
36048 <td>event_pend_intr</td>
36049 <td>0</td>
36050 </tr>
36051 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36052 <td>213</td>
36053 <td>392</td>
36054 <td>J721E_DEV_NAVSS0_MAILBOX_11</td>
36055 <td>pend_intr</td>
36056 <td>0</td>
36057 </tr>
36058 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36059 <td>213</td>
36060 <td>393</td>
36061 <td>J721E_DEV_NAVSS0_MAILBOX_11</td>
36062 <td>pend_intr</td>
36063 <td>1</td>
36064 </tr>
36065 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36066 <td>213</td>
36067 <td>394</td>
36068 <td>J721E_DEV_NAVSS0_MAILBOX_11</td>
36069 <td>pend_intr</td>
36070 <td>2</td>
36071 </tr>
36072 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36073 <td>213</td>
36074 <td>395</td>
36075 <td>J721E_DEV_NAVSS0_MAILBOX_11</td>
36076 <td>pend_intr</td>
36077 <td>3</td>
36078 </tr>
36079 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36080 <td>213</td>
36081 <td>396</td>
36082 <td>J721E_DEV_NAVSS0_MAILBOX_10</td>
36083 <td>pend_intr</td>
36084 <td>0</td>
36085 </tr>
36086 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36087 <td>213</td>
36088 <td>397</td>
36089 <td>J721E_DEV_NAVSS0_MAILBOX_10</td>
36090 <td>pend_intr</td>
36091 <td>1</td>
36092 </tr>
36093 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36094 <td>213</td>
36095 <td>398</td>
36096 <td>J721E_DEV_NAVSS0_MAILBOX_10</td>
36097 <td>pend_intr</td>
36098 <td>2</td>
36099 </tr>
36100 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36101 <td>213</td>
36102 <td>399</td>
36103 <td>J721E_DEV_NAVSS0_MAILBOX_10</td>
36104 <td>pend_intr</td>
36105 <td>3</td>
36106 </tr>
36107 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36108 <td>213</td>
36109 <td>400</td>
36110 <td>J721E_DEV_NAVSS0_MAILBOX_9</td>
36111 <td>pend_intr</td>
36112 <td>0</td>
36113 </tr>
36114 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36115 <td>213</td>
36116 <td>401</td>
36117 <td>J721E_DEV_NAVSS0_MAILBOX_9</td>
36118 <td>pend_intr</td>
36119 <td>1</td>
36120 </tr>
36121 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36122 <td>213</td>
36123 <td>402</td>
36124 <td>J721E_DEV_NAVSS0_MAILBOX_9</td>
36125 <td>pend_intr</td>
36126 <td>2</td>
36127 </tr>
36128 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36129 <td>213</td>
36130 <td>403</td>
36131 <td>J721E_DEV_NAVSS0_MAILBOX_9</td>
36132 <td>pend_intr</td>
36133 <td>3</td>
36134 </tr>
36135 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36136 <td>213</td>
36137 <td>404</td>
36138 <td>J721E_DEV_NAVSS0_MAILBOX_8</td>
36139 <td>pend_intr</td>
36140 <td>0</td>
36141 </tr>
36142 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36143 <td>213</td>
36144 <td>405</td>
36145 <td>J721E_DEV_NAVSS0_MAILBOX_8</td>
36146 <td>pend_intr</td>
36147 <td>1</td>
36148 </tr>
36149 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36150 <td>213</td>
36151 <td>406</td>
36152 <td>J721E_DEV_NAVSS0_MAILBOX_8</td>
36153 <td>pend_intr</td>
36154 <td>2</td>
36155 </tr>
36156 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36157 <td>213</td>
36158 <td>407</td>
36159 <td>J721E_DEV_NAVSS0_MAILBOX_8</td>
36160 <td>pend_intr</td>
36161 <td>3</td>
36162 </tr>
36163 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36164 <td>213</td>
36165 <td>408</td>
36166 <td>J721E_DEV_NAVSS0_MAILBOX_7</td>
36167 <td>pend_intr</td>
36168 <td>0</td>
36169 </tr>
36170 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36171 <td>213</td>
36172 <td>409</td>
36173 <td>J721E_DEV_NAVSS0_MAILBOX_7</td>
36174 <td>pend_intr</td>
36175 <td>1</td>
36176 </tr>
36177 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36178 <td>213</td>
36179 <td>410</td>
36180 <td>J721E_DEV_NAVSS0_MAILBOX_7</td>
36181 <td>pend_intr</td>
36182 <td>2</td>
36183 </tr>
36184 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36185 <td>213</td>
36186 <td>411</td>
36187 <td>J721E_DEV_NAVSS0_MAILBOX_7</td>
36188 <td>pend_intr</td>
36189 <td>3</td>
36190 </tr>
36191 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36192 <td>213</td>
36193 <td>412</td>
36194 <td>J721E_DEV_NAVSS0_MAILBOX_6</td>
36195 <td>pend_intr</td>
36196 <td>0</td>
36197 </tr>
36198 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36199 <td>213</td>
36200 <td>413</td>
36201 <td>J721E_DEV_NAVSS0_MAILBOX_6</td>
36202 <td>pend_intr</td>
36203 <td>1</td>
36204 </tr>
36205 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36206 <td>213</td>
36207 <td>414</td>
36208 <td>J721E_DEV_NAVSS0_MAILBOX_6</td>
36209 <td>pend_intr</td>
36210 <td>2</td>
36211 </tr>
36212 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36213 <td>213</td>
36214 <td>415</td>
36215 <td>J721E_DEV_NAVSS0_MAILBOX_6</td>
36216 <td>pend_intr</td>
36217 <td>3</td>
36218 </tr>
36219 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36220 <td>213</td>
36221 <td>416</td>
36222 <td>J721E_DEV_NAVSS0_MAILBOX_5</td>
36223 <td>pend_intr</td>
36224 <td>0</td>
36225 </tr>
36226 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36227 <td>213</td>
36228 <td>417</td>
36229 <td>J721E_DEV_NAVSS0_MAILBOX_5</td>
36230 <td>pend_intr</td>
36231 <td>1</td>
36232 </tr>
36233 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36234 <td>213</td>
36235 <td>418</td>
36236 <td>J721E_DEV_NAVSS0_MAILBOX_5</td>
36237 <td>pend_intr</td>
36238 <td>2</td>
36239 </tr>
36240 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36241 <td>213</td>
36242 <td>419</td>
36243 <td>J721E_DEV_NAVSS0_MAILBOX_5</td>
36244 <td>pend_intr</td>
36245 <td>3</td>
36246 </tr>
36247 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36248 <td>213</td>
36249 <td>420</td>
36250 <td>J721E_DEV_NAVSS0_MAILBOX_4</td>
36251 <td>pend_intr</td>
36252 <td>0</td>
36253 </tr>
36254 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36255 <td>213</td>
36256 <td>421</td>
36257 <td>J721E_DEV_NAVSS0_MAILBOX_4</td>
36258 <td>pend_intr</td>
36259 <td>1</td>
36260 </tr>
36261 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36262 <td>213</td>
36263 <td>422</td>
36264 <td>J721E_DEV_NAVSS0_MAILBOX_4</td>
36265 <td>pend_intr</td>
36266 <td>2</td>
36267 </tr>
36268 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36269 <td>213</td>
36270 <td>423</td>
36271 <td>J721E_DEV_NAVSS0_MAILBOX_4</td>
36272 <td>pend_intr</td>
36273 <td>3</td>
36274 </tr>
36275 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36276 <td>213</td>
36277 <td>424</td>
36278 <td>J721E_DEV_NAVSS0_MAILBOX_3</td>
36279 <td>pend_intr</td>
36280 <td>0</td>
36281 </tr>
36282 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36283 <td>213</td>
36284 <td>425</td>
36285 <td>J721E_DEV_NAVSS0_MAILBOX_3</td>
36286 <td>pend_intr</td>
36287 <td>1</td>
36288 </tr>
36289 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36290 <td>213</td>
36291 <td>426</td>
36292 <td>J721E_DEV_NAVSS0_MAILBOX_3</td>
36293 <td>pend_intr</td>
36294 <td>2</td>
36295 </tr>
36296 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36297 <td>213</td>
36298 <td>427</td>
36299 <td>J721E_DEV_NAVSS0_MAILBOX_3</td>
36300 <td>pend_intr</td>
36301 <td>3</td>
36302 </tr>
36303 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36304 <td>213</td>
36305 <td>428</td>
36306 <td>J721E_DEV_NAVSS0_MAILBOX_2</td>
36307 <td>pend_intr</td>
36308 <td>0</td>
36309 </tr>
36310 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36311 <td>213</td>
36312 <td>429</td>
36313 <td>J721E_DEV_NAVSS0_MAILBOX_2</td>
36314 <td>pend_intr</td>
36315 <td>1</td>
36316 </tr>
36317 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36318 <td>213</td>
36319 <td>430</td>
36320 <td>J721E_DEV_NAVSS0_MAILBOX_2</td>
36321 <td>pend_intr</td>
36322 <td>2</td>
36323 </tr>
36324 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36325 <td>213</td>
36326 <td>431</td>
36327 <td>J721E_DEV_NAVSS0_MAILBOX_2</td>
36328 <td>pend_intr</td>
36329 <td>3</td>
36330 </tr>
36331 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36332 <td>213</td>
36333 <td>432</td>
36334 <td>J721E_DEV_NAVSS0_MAILBOX_1</td>
36335 <td>pend_intr</td>
36336 <td>0</td>
36337 </tr>
36338 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36339 <td>213</td>
36340 <td>433</td>
36341 <td>J721E_DEV_NAVSS0_MAILBOX_1</td>
36342 <td>pend_intr</td>
36343 <td>1</td>
36344 </tr>
36345 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36346 <td>213</td>
36347 <td>434</td>
36348 <td>J721E_DEV_NAVSS0_MAILBOX_1</td>
36349 <td>pend_intr</td>
36350 <td>2</td>
36351 </tr>
36352 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36353 <td>213</td>
36354 <td>435</td>
36355 <td>J721E_DEV_NAVSS0_MAILBOX_1</td>
36356 <td>pend_intr</td>
36357 <td>3</td>
36358 </tr>
36359 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36360 <td>213</td>
36361 <td>436</td>
36362 <td>J721E_DEV_NAVSS0_MAILBOX_0</td>
36363 <td>pend_intr</td>
36364 <td>0</td>
36365 </tr>
36366 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36367 <td>213</td>
36368 <td>437</td>
36369 <td>J721E_DEV_NAVSS0_MAILBOX_0</td>
36370 <td>pend_intr</td>
36371 <td>1</td>
36372 </tr>
36373 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36374 <td>213</td>
36375 <td>438</td>
36376 <td>J721E_DEV_NAVSS0_MAILBOX_0</td>
36377 <td>pend_intr</td>
36378 <td>2</td>
36379 </tr>
36380 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36381 <td>213</td>
36382 <td>439</td>
36383 <td>J721E_DEV_NAVSS0_MAILBOX_0</td>
36384 <td>pend_intr</td>
36385 <td>3</td>
36386 </tr>
36387 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36388 <td>213</td>
36389 <td>440</td>
36390 <td>J721E_DEV_NAVSS0_TCU_0</td>
36391 <td>tcu_ras_intr</td>
36392 <td>0</td>
36393 </tr>
36394 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36395 <td>213</td>
36396 <td>441</td>
36397 <td>J721E_DEV_NAVSS0_TCU_0</td>
36398 <td>tcu_global_ns_intr</td>
36399 <td>0</td>
36400 </tr>
36401 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36402 <td>213</td>
36403 <td>442</td>
36404 <td>J721E_DEV_NAVSS0_TCU_0</td>
36405 <td>tcu_global_s_intr</td>
36406 <td>0</td>
36407 </tr>
36408 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36409 <td>213</td>
36410 <td>443</td>
36411 <td>J721E_DEV_NAVSS0_TCU_0</td>
36412 <td>tcu_cmd_sync_ns_intr</td>
36413 <td>0</td>
36414 </tr>
36415 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36416 <td>213</td>
36417 <td>444</td>
36418 <td>J721E_DEV_NAVSS0_TCU_0</td>
36419 <td>tcu_cmd_sync_s_intr</td>
36420 <td>0</td>
36421 </tr>
36422 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36423 <td>213</td>
36424 <td>445</td>
36425 <td>J721E_DEV_NAVSS0_TCU_0</td>
36426 <td>tcu_event_q_ns_intr</td>
36427 <td>0</td>
36428 </tr>
36429 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36430 <td>213</td>
36431 <td>446</td>
36432 <td>J721E_DEV_NAVSS0_TCU_0</td>
36433 <td>tcu_event_q_s_intr</td>
36434 <td>0</td>
36435 </tr>
36436 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36437 <td>213</td>
36438 <td>447</td>
36439 <td>J721E_DEV_NAVSS0_TBU_0</td>
36440 <td>io_tbu0_ras_intr</td>
36441 <td>0</td>
36442 </tr>
36443 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36444 <td>213</td>
36445 <td>448</td>
36446 <td>Not Connected</td>
36447 <td>&#160;</td>
36448 <td>&#160;</td>
36449 </tr>
36450 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36451 <td>213</td>
36452 <td>449</td>
36453 <td>Not Connected</td>
36454 <td>&#160;</td>
36455 <td>&#160;</td>
36456 </tr>
36457 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36458 <td>213</td>
36459 <td>450</td>
36460 <td>Not Connected</td>
36461 <td>&#160;</td>
36462 <td>&#160;</td>
36463 </tr>
36464 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36465 <td>213</td>
36466 <td>451</td>
36467 <td>Not Connected</td>
36468 <td>&#160;</td>
36469 <td>&#160;</td>
36470 </tr>
36471 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36472 <td>213</td>
36473 <td>452</td>
36474 <td>Not Connected</td>
36475 <td>&#160;</td>
36476 <td>&#160;</td>
36477 </tr>
36478 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36479 <td>213</td>
36480 <td>453</td>
36481 <td>Not Connected</td>
36482 <td>&#160;</td>
36483 <td>&#160;</td>
36484 </tr>
36485 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36486 <td>213</td>
36487 <td>454</td>
36488 <td>Not Connected</td>
36489 <td>&#160;</td>
36490 <td>&#160;</td>
36491 </tr>
36492 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36493 <td>213</td>
36494 <td>455</td>
36495 <td>Not Connected</td>
36496 <td>&#160;</td>
36497 <td>&#160;</td>
36498 </tr>
36499 </tbody>
36500 </table>
36501 </div>
36502 <div class="section" id="navss0-intr-router-0-interrupt-router-output-destinations">
36503 <span id="pub-soc-j721e-navss0-intr-router-0-output-src-list"></span><h2>NAVSS0_INTR_ROUTER_0 Interrupt Router Output Destinations<a class="headerlink" href="#navss0-intr-router-0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
36504 <div class="admonition warning">
36505 <p class="first admonition-title">Warning</p>
36506 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
36507 host within the RM Board Configuration resource assignment array.  The RM
36508 Board Configuration is rejected if an overlap with a reserved resource is
36509 detected.</p>
36510 </div>
36511 <table border="1" class="docutils">
36512 <colgroup>
36513 <col width="23%" />
36514 <col width="10%" />
36515 <col width="12%" />
36516 <col width="24%" />
36517 <col width="16%" />
36518 <col width="14%" />
36519 </colgroup>
36520 <thead valign="bottom">
36521 <tr class="row-odd"><th class="head">IR Name</th>
36522 <th class="head">IR Device ID</th>
36523 <th class="head">IR Output Index</th>
36524 <th class="head">Destination Name</th>
36525 <th class="head">Destination Interface</th>
36526 <th class="head">Destination Index</th>
36527 </tr>
36528 </thead>
36529 <tbody valign="top">
36530 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36531 (<strong>Reserved by System Firmware</strong>)</td>
36532 <td>213</td>
36533 <td>0</td>
36534 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36535 <td>soc_events_in</td>
36536 <td>64</td>
36537 </tr>
36538 <tr class="row-odd"><td>&#160;</td>
36539 <td>&#160;</td>
36540 <td>&#160;</td>
36541 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36542 <td>spi</td>
36543 <td>64</td>
36544 </tr>
36545 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36546 (<strong>Reserved by System Firmware</strong>)</td>
36547 <td>213</td>
36548 <td>1</td>
36549 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36550 <td>soc_events_in</td>
36551 <td>65</td>
36552 </tr>
36553 <tr class="row-odd"><td>&#160;</td>
36554 <td>&#160;</td>
36555 <td>&#160;</td>
36556 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36557 <td>spi</td>
36558 <td>65</td>
36559 </tr>
36560 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36561 (<strong>Reserved by System Firmware</strong>)</td>
36562 <td>213</td>
36563 <td>2</td>
36564 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36565 <td>soc_events_in</td>
36566 <td>66</td>
36567 </tr>
36568 <tr class="row-odd"><td>&#160;</td>
36569 <td>&#160;</td>
36570 <td>&#160;</td>
36571 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36572 <td>spi</td>
36573 <td>66</td>
36574 </tr>
36575 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36576 (<strong>Reserved by System Firmware</strong>)</td>
36577 <td>213</td>
36578 <td>3</td>
36579 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36580 <td>soc_events_in</td>
36581 <td>67</td>
36582 </tr>
36583 <tr class="row-odd"><td>&#160;</td>
36584 <td>&#160;</td>
36585 <td>&#160;</td>
36586 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36587 <td>spi</td>
36588 <td>67</td>
36589 </tr>
36590 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36591 (<strong>Reserved by System Firmware</strong>)</td>
36592 <td>213</td>
36593 <td>4</td>
36594 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36595 <td>soc_events_in</td>
36596 <td>68</td>
36597 </tr>
36598 <tr class="row-odd"><td>&#160;</td>
36599 <td>&#160;</td>
36600 <td>&#160;</td>
36601 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36602 <td>spi</td>
36603 <td>68</td>
36604 </tr>
36605 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36606 (<strong>Reserved by System Firmware</strong>)</td>
36607 <td>213</td>
36608 <td>5</td>
36609 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36610 <td>soc_events_in</td>
36611 <td>69</td>
36612 </tr>
36613 <tr class="row-odd"><td>&#160;</td>
36614 <td>&#160;</td>
36615 <td>&#160;</td>
36616 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36617 <td>spi</td>
36618 <td>69</td>
36619 </tr>
36620 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36621 (<strong>Reserved by System Firmware</strong>)</td>
36622 <td>213</td>
36623 <td>6</td>
36624 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36625 <td>soc_events_in</td>
36626 <td>70</td>
36627 </tr>
36628 <tr class="row-odd"><td>&#160;</td>
36629 <td>&#160;</td>
36630 <td>&#160;</td>
36631 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36632 <td>spi</td>
36633 <td>70</td>
36634 </tr>
36635 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36636 (<strong>Reserved by System Firmware</strong>)</td>
36637 <td>213</td>
36638 <td>7</td>
36639 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36640 <td>soc_events_in</td>
36641 <td>71</td>
36642 </tr>
36643 <tr class="row-odd"><td>&#160;</td>
36644 <td>&#160;</td>
36645 <td>&#160;</td>
36646 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36647 <td>spi</td>
36648 <td>71</td>
36649 </tr>
36650 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36651 (<strong>Reserved by System Firmware</strong>)</td>
36652 <td>213</td>
36653 <td>8</td>
36654 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36655 <td>soc_events_in</td>
36656 <td>72</td>
36657 </tr>
36658 <tr class="row-odd"><td>&#160;</td>
36659 <td>&#160;</td>
36660 <td>&#160;</td>
36661 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36662 <td>spi</td>
36663 <td>72</td>
36664 </tr>
36665 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
36666 (<strong>Reserved by System Firmware</strong>)</td>
36667 <td>213</td>
36668 <td>9</td>
36669 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36670 <td>soc_events_in</td>
36671 <td>73</td>
36672 </tr>
36673 <tr class="row-odd"><td>&#160;</td>
36674 <td>&#160;</td>
36675 <td>&#160;</td>
36676 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36677 <td>spi</td>
36678 <td>73</td>
36679 </tr>
36680 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36681 <td>213</td>
36682 <td>10</td>
36683 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36684 <td>soc_events_in</td>
36685 <td>74</td>
36686 </tr>
36687 <tr class="row-odd"><td>&#160;</td>
36688 <td>&#160;</td>
36689 <td>&#160;</td>
36690 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36691 <td>spi</td>
36692 <td>74</td>
36693 </tr>
36694 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36695 <td>213</td>
36696 <td>11</td>
36697 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36698 <td>soc_events_in</td>
36699 <td>75</td>
36700 </tr>
36701 <tr class="row-odd"><td>&#160;</td>
36702 <td>&#160;</td>
36703 <td>&#160;</td>
36704 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36705 <td>spi</td>
36706 <td>75</td>
36707 </tr>
36708 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36709 <td>213</td>
36710 <td>12</td>
36711 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36712 <td>soc_events_in</td>
36713 <td>76</td>
36714 </tr>
36715 <tr class="row-odd"><td>&#160;</td>
36716 <td>&#160;</td>
36717 <td>&#160;</td>
36718 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36719 <td>spi</td>
36720 <td>76</td>
36721 </tr>
36722 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36723 <td>213</td>
36724 <td>13</td>
36725 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36726 <td>soc_events_in</td>
36727 <td>77</td>
36728 </tr>
36729 <tr class="row-odd"><td>&#160;</td>
36730 <td>&#160;</td>
36731 <td>&#160;</td>
36732 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36733 <td>spi</td>
36734 <td>77</td>
36735 </tr>
36736 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36737 <td>213</td>
36738 <td>14</td>
36739 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36740 <td>soc_events_in</td>
36741 <td>78</td>
36742 </tr>
36743 <tr class="row-odd"><td>&#160;</td>
36744 <td>&#160;</td>
36745 <td>&#160;</td>
36746 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36747 <td>spi</td>
36748 <td>78</td>
36749 </tr>
36750 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36751 <td>213</td>
36752 <td>15</td>
36753 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36754 <td>soc_events_in</td>
36755 <td>79</td>
36756 </tr>
36757 <tr class="row-odd"><td>&#160;</td>
36758 <td>&#160;</td>
36759 <td>&#160;</td>
36760 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36761 <td>spi</td>
36762 <td>79</td>
36763 </tr>
36764 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36765 <td>213</td>
36766 <td>16</td>
36767 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36768 <td>soc_events_in</td>
36769 <td>80</td>
36770 </tr>
36771 <tr class="row-odd"><td>&#160;</td>
36772 <td>&#160;</td>
36773 <td>&#160;</td>
36774 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36775 <td>spi</td>
36776 <td>80</td>
36777 </tr>
36778 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36779 <td>213</td>
36780 <td>17</td>
36781 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36782 <td>soc_events_in</td>
36783 <td>81</td>
36784 </tr>
36785 <tr class="row-odd"><td>&#160;</td>
36786 <td>&#160;</td>
36787 <td>&#160;</td>
36788 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36789 <td>spi</td>
36790 <td>81</td>
36791 </tr>
36792 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36793 <td>213</td>
36794 <td>18</td>
36795 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36796 <td>soc_events_in</td>
36797 <td>82</td>
36798 </tr>
36799 <tr class="row-odd"><td>&#160;</td>
36800 <td>&#160;</td>
36801 <td>&#160;</td>
36802 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36803 <td>spi</td>
36804 <td>82</td>
36805 </tr>
36806 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36807 <td>213</td>
36808 <td>19</td>
36809 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36810 <td>soc_events_in</td>
36811 <td>83</td>
36812 </tr>
36813 <tr class="row-odd"><td>&#160;</td>
36814 <td>&#160;</td>
36815 <td>&#160;</td>
36816 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36817 <td>spi</td>
36818 <td>83</td>
36819 </tr>
36820 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36821 <td>213</td>
36822 <td>20</td>
36823 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36824 <td>soc_events_in</td>
36825 <td>84</td>
36826 </tr>
36827 <tr class="row-odd"><td>&#160;</td>
36828 <td>&#160;</td>
36829 <td>&#160;</td>
36830 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36831 <td>spi</td>
36832 <td>84</td>
36833 </tr>
36834 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36835 <td>213</td>
36836 <td>21</td>
36837 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36838 <td>soc_events_in</td>
36839 <td>85</td>
36840 </tr>
36841 <tr class="row-odd"><td>&#160;</td>
36842 <td>&#160;</td>
36843 <td>&#160;</td>
36844 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36845 <td>spi</td>
36846 <td>85</td>
36847 </tr>
36848 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36849 <td>213</td>
36850 <td>22</td>
36851 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36852 <td>soc_events_in</td>
36853 <td>86</td>
36854 </tr>
36855 <tr class="row-odd"><td>&#160;</td>
36856 <td>&#160;</td>
36857 <td>&#160;</td>
36858 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36859 <td>spi</td>
36860 <td>86</td>
36861 </tr>
36862 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36863 <td>213</td>
36864 <td>23</td>
36865 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36866 <td>soc_events_in</td>
36867 <td>87</td>
36868 </tr>
36869 <tr class="row-odd"><td>&#160;</td>
36870 <td>&#160;</td>
36871 <td>&#160;</td>
36872 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36873 <td>spi</td>
36874 <td>87</td>
36875 </tr>
36876 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36877 <td>213</td>
36878 <td>24</td>
36879 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36880 <td>soc_events_in</td>
36881 <td>88</td>
36882 </tr>
36883 <tr class="row-odd"><td>&#160;</td>
36884 <td>&#160;</td>
36885 <td>&#160;</td>
36886 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36887 <td>spi</td>
36888 <td>88</td>
36889 </tr>
36890 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36891 <td>213</td>
36892 <td>25</td>
36893 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36894 <td>soc_events_in</td>
36895 <td>89</td>
36896 </tr>
36897 <tr class="row-odd"><td>&#160;</td>
36898 <td>&#160;</td>
36899 <td>&#160;</td>
36900 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36901 <td>spi</td>
36902 <td>89</td>
36903 </tr>
36904 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36905 <td>213</td>
36906 <td>26</td>
36907 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36908 <td>soc_events_in</td>
36909 <td>90</td>
36910 </tr>
36911 <tr class="row-odd"><td>&#160;</td>
36912 <td>&#160;</td>
36913 <td>&#160;</td>
36914 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36915 <td>spi</td>
36916 <td>90</td>
36917 </tr>
36918 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36919 <td>213</td>
36920 <td>27</td>
36921 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36922 <td>soc_events_in</td>
36923 <td>91</td>
36924 </tr>
36925 <tr class="row-odd"><td>&#160;</td>
36926 <td>&#160;</td>
36927 <td>&#160;</td>
36928 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36929 <td>spi</td>
36930 <td>91</td>
36931 </tr>
36932 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36933 <td>213</td>
36934 <td>28</td>
36935 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36936 <td>soc_events_in</td>
36937 <td>92</td>
36938 </tr>
36939 <tr class="row-odd"><td>&#160;</td>
36940 <td>&#160;</td>
36941 <td>&#160;</td>
36942 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36943 <td>spi</td>
36944 <td>92</td>
36945 </tr>
36946 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36947 <td>213</td>
36948 <td>29</td>
36949 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36950 <td>soc_events_in</td>
36951 <td>93</td>
36952 </tr>
36953 <tr class="row-odd"><td>&#160;</td>
36954 <td>&#160;</td>
36955 <td>&#160;</td>
36956 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36957 <td>spi</td>
36958 <td>93</td>
36959 </tr>
36960 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36961 <td>213</td>
36962 <td>30</td>
36963 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36964 <td>soc_events_in</td>
36965 <td>94</td>
36966 </tr>
36967 <tr class="row-odd"><td>&#160;</td>
36968 <td>&#160;</td>
36969 <td>&#160;</td>
36970 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36971 <td>spi</td>
36972 <td>94</td>
36973 </tr>
36974 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36975 <td>213</td>
36976 <td>31</td>
36977 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36978 <td>soc_events_in</td>
36979 <td>95</td>
36980 </tr>
36981 <tr class="row-odd"><td>&#160;</td>
36982 <td>&#160;</td>
36983 <td>&#160;</td>
36984 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36985 <td>spi</td>
36986 <td>95</td>
36987 </tr>
36988 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
36989 <td>213</td>
36990 <td>32</td>
36991 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
36992 <td>soc_events_in</td>
36993 <td>96</td>
36994 </tr>
36995 <tr class="row-odd"><td>&#160;</td>
36996 <td>&#160;</td>
36997 <td>&#160;</td>
36998 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
36999 <td>spi</td>
37000 <td>96</td>
37001 </tr>
37002 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37003 <td>213</td>
37004 <td>33</td>
37005 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37006 <td>soc_events_in</td>
37007 <td>97</td>
37008 </tr>
37009 <tr class="row-odd"><td>&#160;</td>
37010 <td>&#160;</td>
37011 <td>&#160;</td>
37012 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37013 <td>spi</td>
37014 <td>97</td>
37015 </tr>
37016 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37017 <td>213</td>
37018 <td>34</td>
37019 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37020 <td>soc_events_in</td>
37021 <td>98</td>
37022 </tr>
37023 <tr class="row-odd"><td>&#160;</td>
37024 <td>&#160;</td>
37025 <td>&#160;</td>
37026 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37027 <td>spi</td>
37028 <td>98</td>
37029 </tr>
37030 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37031 <td>213</td>
37032 <td>35</td>
37033 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37034 <td>soc_events_in</td>
37035 <td>99</td>
37036 </tr>
37037 <tr class="row-odd"><td>&#160;</td>
37038 <td>&#160;</td>
37039 <td>&#160;</td>
37040 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37041 <td>spi</td>
37042 <td>99</td>
37043 </tr>
37044 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37045 <td>213</td>
37046 <td>36</td>
37047 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37048 <td>soc_events_in</td>
37049 <td>100</td>
37050 </tr>
37051 <tr class="row-odd"><td>&#160;</td>
37052 <td>&#160;</td>
37053 <td>&#160;</td>
37054 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37055 <td>spi</td>
37056 <td>100</td>
37057 </tr>
37058 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37059 <td>213</td>
37060 <td>37</td>
37061 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37062 <td>soc_events_in</td>
37063 <td>101</td>
37064 </tr>
37065 <tr class="row-odd"><td>&#160;</td>
37066 <td>&#160;</td>
37067 <td>&#160;</td>
37068 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37069 <td>spi</td>
37070 <td>101</td>
37071 </tr>
37072 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37073 <td>213</td>
37074 <td>38</td>
37075 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37076 <td>soc_events_in</td>
37077 <td>102</td>
37078 </tr>
37079 <tr class="row-odd"><td>&#160;</td>
37080 <td>&#160;</td>
37081 <td>&#160;</td>
37082 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37083 <td>spi</td>
37084 <td>102</td>
37085 </tr>
37086 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37087 <td>213</td>
37088 <td>39</td>
37089 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37090 <td>soc_events_in</td>
37091 <td>103</td>
37092 </tr>
37093 <tr class="row-odd"><td>&#160;</td>
37094 <td>&#160;</td>
37095 <td>&#160;</td>
37096 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37097 <td>spi</td>
37098 <td>103</td>
37099 </tr>
37100 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37101 <td>213</td>
37102 <td>40</td>
37103 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37104 <td>soc_events_in</td>
37105 <td>104</td>
37106 </tr>
37107 <tr class="row-odd"><td>&#160;</td>
37108 <td>&#160;</td>
37109 <td>&#160;</td>
37110 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37111 <td>spi</td>
37112 <td>104</td>
37113 </tr>
37114 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37115 <td>213</td>
37116 <td>41</td>
37117 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37118 <td>soc_events_in</td>
37119 <td>105</td>
37120 </tr>
37121 <tr class="row-odd"><td>&#160;</td>
37122 <td>&#160;</td>
37123 <td>&#160;</td>
37124 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37125 <td>spi</td>
37126 <td>105</td>
37127 </tr>
37128 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37129 <td>213</td>
37130 <td>42</td>
37131 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37132 <td>soc_events_in</td>
37133 <td>106</td>
37134 </tr>
37135 <tr class="row-odd"><td>&#160;</td>
37136 <td>&#160;</td>
37137 <td>&#160;</td>
37138 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37139 <td>spi</td>
37140 <td>106</td>
37141 </tr>
37142 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37143 <td>213</td>
37144 <td>43</td>
37145 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37146 <td>soc_events_in</td>
37147 <td>107</td>
37148 </tr>
37149 <tr class="row-odd"><td>&#160;</td>
37150 <td>&#160;</td>
37151 <td>&#160;</td>
37152 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37153 <td>spi</td>
37154 <td>107</td>
37155 </tr>
37156 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37157 <td>213</td>
37158 <td>44</td>
37159 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37160 <td>soc_events_in</td>
37161 <td>108</td>
37162 </tr>
37163 <tr class="row-odd"><td>&#160;</td>
37164 <td>&#160;</td>
37165 <td>&#160;</td>
37166 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37167 <td>spi</td>
37168 <td>108</td>
37169 </tr>
37170 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37171 <td>213</td>
37172 <td>45</td>
37173 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37174 <td>soc_events_in</td>
37175 <td>109</td>
37176 </tr>
37177 <tr class="row-odd"><td>&#160;</td>
37178 <td>&#160;</td>
37179 <td>&#160;</td>
37180 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37181 <td>spi</td>
37182 <td>109</td>
37183 </tr>
37184 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37185 <td>213</td>
37186 <td>46</td>
37187 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37188 <td>soc_events_in</td>
37189 <td>110</td>
37190 </tr>
37191 <tr class="row-odd"><td>&#160;</td>
37192 <td>&#160;</td>
37193 <td>&#160;</td>
37194 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37195 <td>spi</td>
37196 <td>110</td>
37197 </tr>
37198 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37199 <td>213</td>
37200 <td>47</td>
37201 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37202 <td>soc_events_in</td>
37203 <td>111</td>
37204 </tr>
37205 <tr class="row-odd"><td>&#160;</td>
37206 <td>&#160;</td>
37207 <td>&#160;</td>
37208 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37209 <td>spi</td>
37210 <td>111</td>
37211 </tr>
37212 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37213 <td>213</td>
37214 <td>48</td>
37215 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37216 <td>soc_events_in</td>
37217 <td>112</td>
37218 </tr>
37219 <tr class="row-odd"><td>&#160;</td>
37220 <td>&#160;</td>
37221 <td>&#160;</td>
37222 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37223 <td>spi</td>
37224 <td>112</td>
37225 </tr>
37226 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37227 <td>213</td>
37228 <td>49</td>
37229 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37230 <td>soc_events_in</td>
37231 <td>113</td>
37232 </tr>
37233 <tr class="row-odd"><td>&#160;</td>
37234 <td>&#160;</td>
37235 <td>&#160;</td>
37236 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37237 <td>spi</td>
37238 <td>113</td>
37239 </tr>
37240 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37241 <td>213</td>
37242 <td>50</td>
37243 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37244 <td>soc_events_in</td>
37245 <td>114</td>
37246 </tr>
37247 <tr class="row-odd"><td>&#160;</td>
37248 <td>&#160;</td>
37249 <td>&#160;</td>
37250 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37251 <td>spi</td>
37252 <td>114</td>
37253 </tr>
37254 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37255 <td>213</td>
37256 <td>51</td>
37257 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37258 <td>soc_events_in</td>
37259 <td>115</td>
37260 </tr>
37261 <tr class="row-odd"><td>&#160;</td>
37262 <td>&#160;</td>
37263 <td>&#160;</td>
37264 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37265 <td>spi</td>
37266 <td>115</td>
37267 </tr>
37268 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37269 <td>213</td>
37270 <td>52</td>
37271 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37272 <td>soc_events_in</td>
37273 <td>116</td>
37274 </tr>
37275 <tr class="row-odd"><td>&#160;</td>
37276 <td>&#160;</td>
37277 <td>&#160;</td>
37278 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37279 <td>spi</td>
37280 <td>116</td>
37281 </tr>
37282 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37283 <td>213</td>
37284 <td>53</td>
37285 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37286 <td>soc_events_in</td>
37287 <td>117</td>
37288 </tr>
37289 <tr class="row-odd"><td>&#160;</td>
37290 <td>&#160;</td>
37291 <td>&#160;</td>
37292 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37293 <td>spi</td>
37294 <td>117</td>
37295 </tr>
37296 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37297 <td>213</td>
37298 <td>54</td>
37299 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37300 <td>soc_events_in</td>
37301 <td>118</td>
37302 </tr>
37303 <tr class="row-odd"><td>&#160;</td>
37304 <td>&#160;</td>
37305 <td>&#160;</td>
37306 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37307 <td>spi</td>
37308 <td>118</td>
37309 </tr>
37310 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37311 <td>213</td>
37312 <td>55</td>
37313 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37314 <td>soc_events_in</td>
37315 <td>119</td>
37316 </tr>
37317 <tr class="row-odd"><td>&#160;</td>
37318 <td>&#160;</td>
37319 <td>&#160;</td>
37320 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37321 <td>spi</td>
37322 <td>119</td>
37323 </tr>
37324 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37325 <td>213</td>
37326 <td>56</td>
37327 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37328 <td>soc_events_in</td>
37329 <td>120</td>
37330 </tr>
37331 <tr class="row-odd"><td>&#160;</td>
37332 <td>&#160;</td>
37333 <td>&#160;</td>
37334 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37335 <td>spi</td>
37336 <td>120</td>
37337 </tr>
37338 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37339 <td>213</td>
37340 <td>57</td>
37341 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37342 <td>soc_events_in</td>
37343 <td>121</td>
37344 </tr>
37345 <tr class="row-odd"><td>&#160;</td>
37346 <td>&#160;</td>
37347 <td>&#160;</td>
37348 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37349 <td>spi</td>
37350 <td>121</td>
37351 </tr>
37352 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37353 <td>213</td>
37354 <td>58</td>
37355 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37356 <td>soc_events_in</td>
37357 <td>122</td>
37358 </tr>
37359 <tr class="row-odd"><td>&#160;</td>
37360 <td>&#160;</td>
37361 <td>&#160;</td>
37362 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37363 <td>spi</td>
37364 <td>122</td>
37365 </tr>
37366 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37367 <td>213</td>
37368 <td>59</td>
37369 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37370 <td>soc_events_in</td>
37371 <td>123</td>
37372 </tr>
37373 <tr class="row-odd"><td>&#160;</td>
37374 <td>&#160;</td>
37375 <td>&#160;</td>
37376 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37377 <td>spi</td>
37378 <td>123</td>
37379 </tr>
37380 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37381 <td>213</td>
37382 <td>60</td>
37383 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37384 <td>soc_events_in</td>
37385 <td>124</td>
37386 </tr>
37387 <tr class="row-odd"><td>&#160;</td>
37388 <td>&#160;</td>
37389 <td>&#160;</td>
37390 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37391 <td>spi</td>
37392 <td>124</td>
37393 </tr>
37394 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37395 <td>213</td>
37396 <td>61</td>
37397 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37398 <td>soc_events_in</td>
37399 <td>125</td>
37400 </tr>
37401 <tr class="row-odd"><td>&#160;</td>
37402 <td>&#160;</td>
37403 <td>&#160;</td>
37404 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37405 <td>spi</td>
37406 <td>125</td>
37407 </tr>
37408 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37409 <td>213</td>
37410 <td>62</td>
37411 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37412 <td>soc_events_in</td>
37413 <td>126</td>
37414 </tr>
37415 <tr class="row-odd"><td>&#160;</td>
37416 <td>&#160;</td>
37417 <td>&#160;</td>
37418 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37419 <td>spi</td>
37420 <td>126</td>
37421 </tr>
37422 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37423 <td>213</td>
37424 <td>63</td>
37425 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37426 <td>soc_events_in</td>
37427 <td>127</td>
37428 </tr>
37429 <tr class="row-odd"><td>&#160;</td>
37430 <td>&#160;</td>
37431 <td>&#160;</td>
37432 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37433 <td>spi</td>
37434 <td>127</td>
37435 </tr>
37436 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37437 <td>213</td>
37438 <td>64</td>
37439 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37440 <td>soc_events_in</td>
37441 <td>448</td>
37442 </tr>
37443 <tr class="row-odd"><td>&#160;</td>
37444 <td>&#160;</td>
37445 <td>&#160;</td>
37446 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37447 <td>spi</td>
37448 <td>448</td>
37449 </tr>
37450 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37451 <td>213</td>
37452 <td>65</td>
37453 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37454 <td>soc_events_in</td>
37455 <td>449</td>
37456 </tr>
37457 <tr class="row-odd"><td>&#160;</td>
37458 <td>&#160;</td>
37459 <td>&#160;</td>
37460 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37461 <td>spi</td>
37462 <td>449</td>
37463 </tr>
37464 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37465 <td>213</td>
37466 <td>66</td>
37467 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37468 <td>soc_events_in</td>
37469 <td>450</td>
37470 </tr>
37471 <tr class="row-odd"><td>&#160;</td>
37472 <td>&#160;</td>
37473 <td>&#160;</td>
37474 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37475 <td>spi</td>
37476 <td>450</td>
37477 </tr>
37478 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37479 <td>213</td>
37480 <td>67</td>
37481 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37482 <td>soc_events_in</td>
37483 <td>451</td>
37484 </tr>
37485 <tr class="row-odd"><td>&#160;</td>
37486 <td>&#160;</td>
37487 <td>&#160;</td>
37488 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37489 <td>spi</td>
37490 <td>451</td>
37491 </tr>
37492 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37493 <td>213</td>
37494 <td>68</td>
37495 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37496 <td>soc_events_in</td>
37497 <td>452</td>
37498 </tr>
37499 <tr class="row-odd"><td>&#160;</td>
37500 <td>&#160;</td>
37501 <td>&#160;</td>
37502 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37503 <td>spi</td>
37504 <td>452</td>
37505 </tr>
37506 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37507 <td>213</td>
37508 <td>69</td>
37509 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37510 <td>soc_events_in</td>
37511 <td>453</td>
37512 </tr>
37513 <tr class="row-odd"><td>&#160;</td>
37514 <td>&#160;</td>
37515 <td>&#160;</td>
37516 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37517 <td>spi</td>
37518 <td>453</td>
37519 </tr>
37520 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37521 <td>213</td>
37522 <td>70</td>
37523 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37524 <td>soc_events_in</td>
37525 <td>454</td>
37526 </tr>
37527 <tr class="row-odd"><td>&#160;</td>
37528 <td>&#160;</td>
37529 <td>&#160;</td>
37530 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37531 <td>spi</td>
37532 <td>454</td>
37533 </tr>
37534 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37535 <td>213</td>
37536 <td>71</td>
37537 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37538 <td>soc_events_in</td>
37539 <td>455</td>
37540 </tr>
37541 <tr class="row-odd"><td>&#160;</td>
37542 <td>&#160;</td>
37543 <td>&#160;</td>
37544 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37545 <td>spi</td>
37546 <td>455</td>
37547 </tr>
37548 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37549 <td>213</td>
37550 <td>72</td>
37551 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37552 <td>soc_events_in</td>
37553 <td>456</td>
37554 </tr>
37555 <tr class="row-odd"><td>&#160;</td>
37556 <td>&#160;</td>
37557 <td>&#160;</td>
37558 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37559 <td>spi</td>
37560 <td>456</td>
37561 </tr>
37562 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37563 <td>213</td>
37564 <td>73</td>
37565 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37566 <td>soc_events_in</td>
37567 <td>457</td>
37568 </tr>
37569 <tr class="row-odd"><td>&#160;</td>
37570 <td>&#160;</td>
37571 <td>&#160;</td>
37572 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37573 <td>spi</td>
37574 <td>457</td>
37575 </tr>
37576 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37577 <td>213</td>
37578 <td>74</td>
37579 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37580 <td>soc_events_in</td>
37581 <td>458</td>
37582 </tr>
37583 <tr class="row-odd"><td>&#160;</td>
37584 <td>&#160;</td>
37585 <td>&#160;</td>
37586 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37587 <td>spi</td>
37588 <td>458</td>
37589 </tr>
37590 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37591 <td>213</td>
37592 <td>75</td>
37593 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37594 <td>soc_events_in</td>
37595 <td>459</td>
37596 </tr>
37597 <tr class="row-odd"><td>&#160;</td>
37598 <td>&#160;</td>
37599 <td>&#160;</td>
37600 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37601 <td>spi</td>
37602 <td>459</td>
37603 </tr>
37604 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37605 <td>213</td>
37606 <td>76</td>
37607 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37608 <td>soc_events_in</td>
37609 <td>460</td>
37610 </tr>
37611 <tr class="row-odd"><td>&#160;</td>
37612 <td>&#160;</td>
37613 <td>&#160;</td>
37614 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37615 <td>spi</td>
37616 <td>460</td>
37617 </tr>
37618 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37619 <td>213</td>
37620 <td>77</td>
37621 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37622 <td>soc_events_in</td>
37623 <td>461</td>
37624 </tr>
37625 <tr class="row-odd"><td>&#160;</td>
37626 <td>&#160;</td>
37627 <td>&#160;</td>
37628 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37629 <td>spi</td>
37630 <td>461</td>
37631 </tr>
37632 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37633 <td>213</td>
37634 <td>78</td>
37635 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37636 <td>soc_events_in</td>
37637 <td>462</td>
37638 </tr>
37639 <tr class="row-odd"><td>&#160;</td>
37640 <td>&#160;</td>
37641 <td>&#160;</td>
37642 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37643 <td>spi</td>
37644 <td>462</td>
37645 </tr>
37646 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37647 <td>213</td>
37648 <td>79</td>
37649 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37650 <td>soc_events_in</td>
37651 <td>463</td>
37652 </tr>
37653 <tr class="row-odd"><td>&#160;</td>
37654 <td>&#160;</td>
37655 <td>&#160;</td>
37656 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37657 <td>spi</td>
37658 <td>463</td>
37659 </tr>
37660 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37661 <td>213</td>
37662 <td>80</td>
37663 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37664 <td>soc_events_in</td>
37665 <td>464</td>
37666 </tr>
37667 <tr class="row-odd"><td>&#160;</td>
37668 <td>&#160;</td>
37669 <td>&#160;</td>
37670 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37671 <td>spi</td>
37672 <td>464</td>
37673 </tr>
37674 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37675 <td>213</td>
37676 <td>81</td>
37677 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37678 <td>soc_events_in</td>
37679 <td>465</td>
37680 </tr>
37681 <tr class="row-odd"><td>&#160;</td>
37682 <td>&#160;</td>
37683 <td>&#160;</td>
37684 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37685 <td>spi</td>
37686 <td>465</td>
37687 </tr>
37688 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37689 <td>213</td>
37690 <td>82</td>
37691 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37692 <td>soc_events_in</td>
37693 <td>466</td>
37694 </tr>
37695 <tr class="row-odd"><td>&#160;</td>
37696 <td>&#160;</td>
37697 <td>&#160;</td>
37698 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37699 <td>spi</td>
37700 <td>466</td>
37701 </tr>
37702 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37703 <td>213</td>
37704 <td>83</td>
37705 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37706 <td>soc_events_in</td>
37707 <td>467</td>
37708 </tr>
37709 <tr class="row-odd"><td>&#160;</td>
37710 <td>&#160;</td>
37711 <td>&#160;</td>
37712 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37713 <td>spi</td>
37714 <td>467</td>
37715 </tr>
37716 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37717 <td>213</td>
37718 <td>84</td>
37719 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37720 <td>soc_events_in</td>
37721 <td>468</td>
37722 </tr>
37723 <tr class="row-odd"><td>&#160;</td>
37724 <td>&#160;</td>
37725 <td>&#160;</td>
37726 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37727 <td>spi</td>
37728 <td>468</td>
37729 </tr>
37730 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37731 <td>213</td>
37732 <td>85</td>
37733 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37734 <td>soc_events_in</td>
37735 <td>469</td>
37736 </tr>
37737 <tr class="row-odd"><td>&#160;</td>
37738 <td>&#160;</td>
37739 <td>&#160;</td>
37740 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37741 <td>spi</td>
37742 <td>469</td>
37743 </tr>
37744 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37745 <td>213</td>
37746 <td>86</td>
37747 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37748 <td>soc_events_in</td>
37749 <td>470</td>
37750 </tr>
37751 <tr class="row-odd"><td>&#160;</td>
37752 <td>&#160;</td>
37753 <td>&#160;</td>
37754 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37755 <td>spi</td>
37756 <td>470</td>
37757 </tr>
37758 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37759 <td>213</td>
37760 <td>87</td>
37761 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37762 <td>soc_events_in</td>
37763 <td>471</td>
37764 </tr>
37765 <tr class="row-odd"><td>&#160;</td>
37766 <td>&#160;</td>
37767 <td>&#160;</td>
37768 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37769 <td>spi</td>
37770 <td>471</td>
37771 </tr>
37772 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37773 <td>213</td>
37774 <td>88</td>
37775 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37776 <td>soc_events_in</td>
37777 <td>472</td>
37778 </tr>
37779 <tr class="row-odd"><td>&#160;</td>
37780 <td>&#160;</td>
37781 <td>&#160;</td>
37782 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37783 <td>spi</td>
37784 <td>472</td>
37785 </tr>
37786 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37787 <td>213</td>
37788 <td>89</td>
37789 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37790 <td>soc_events_in</td>
37791 <td>473</td>
37792 </tr>
37793 <tr class="row-odd"><td>&#160;</td>
37794 <td>&#160;</td>
37795 <td>&#160;</td>
37796 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37797 <td>spi</td>
37798 <td>473</td>
37799 </tr>
37800 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37801 <td>213</td>
37802 <td>90</td>
37803 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37804 <td>soc_events_in</td>
37805 <td>474</td>
37806 </tr>
37807 <tr class="row-odd"><td>&#160;</td>
37808 <td>&#160;</td>
37809 <td>&#160;</td>
37810 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37811 <td>spi</td>
37812 <td>474</td>
37813 </tr>
37814 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37815 <td>213</td>
37816 <td>91</td>
37817 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37818 <td>soc_events_in</td>
37819 <td>475</td>
37820 </tr>
37821 <tr class="row-odd"><td>&#160;</td>
37822 <td>&#160;</td>
37823 <td>&#160;</td>
37824 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37825 <td>spi</td>
37826 <td>475</td>
37827 </tr>
37828 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37829 <td>213</td>
37830 <td>92</td>
37831 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37832 <td>soc_events_in</td>
37833 <td>476</td>
37834 </tr>
37835 <tr class="row-odd"><td>&#160;</td>
37836 <td>&#160;</td>
37837 <td>&#160;</td>
37838 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37839 <td>spi</td>
37840 <td>476</td>
37841 </tr>
37842 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37843 <td>213</td>
37844 <td>93</td>
37845 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37846 <td>soc_events_in</td>
37847 <td>477</td>
37848 </tr>
37849 <tr class="row-odd"><td>&#160;</td>
37850 <td>&#160;</td>
37851 <td>&#160;</td>
37852 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37853 <td>spi</td>
37854 <td>477</td>
37855 </tr>
37856 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37857 <td>213</td>
37858 <td>94</td>
37859 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37860 <td>soc_events_in</td>
37861 <td>478</td>
37862 </tr>
37863 <tr class="row-odd"><td>&#160;</td>
37864 <td>&#160;</td>
37865 <td>&#160;</td>
37866 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37867 <td>spi</td>
37868 <td>478</td>
37869 </tr>
37870 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37871 <td>213</td>
37872 <td>95</td>
37873 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37874 <td>soc_events_in</td>
37875 <td>479</td>
37876 </tr>
37877 <tr class="row-odd"><td>&#160;</td>
37878 <td>&#160;</td>
37879 <td>&#160;</td>
37880 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37881 <td>spi</td>
37882 <td>479</td>
37883 </tr>
37884 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37885 <td>213</td>
37886 <td>96</td>
37887 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37888 <td>soc_events_in</td>
37889 <td>480</td>
37890 </tr>
37891 <tr class="row-odd"><td>&#160;</td>
37892 <td>&#160;</td>
37893 <td>&#160;</td>
37894 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37895 <td>spi</td>
37896 <td>480</td>
37897 </tr>
37898 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37899 <td>213</td>
37900 <td>97</td>
37901 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37902 <td>soc_events_in</td>
37903 <td>481</td>
37904 </tr>
37905 <tr class="row-odd"><td>&#160;</td>
37906 <td>&#160;</td>
37907 <td>&#160;</td>
37908 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37909 <td>spi</td>
37910 <td>481</td>
37911 </tr>
37912 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37913 <td>213</td>
37914 <td>98</td>
37915 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37916 <td>soc_events_in</td>
37917 <td>482</td>
37918 </tr>
37919 <tr class="row-odd"><td>&#160;</td>
37920 <td>&#160;</td>
37921 <td>&#160;</td>
37922 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37923 <td>spi</td>
37924 <td>482</td>
37925 </tr>
37926 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37927 <td>213</td>
37928 <td>99</td>
37929 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37930 <td>soc_events_in</td>
37931 <td>483</td>
37932 </tr>
37933 <tr class="row-odd"><td>&#160;</td>
37934 <td>&#160;</td>
37935 <td>&#160;</td>
37936 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37937 <td>spi</td>
37938 <td>483</td>
37939 </tr>
37940 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37941 <td>213</td>
37942 <td>100</td>
37943 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37944 <td>soc_events_in</td>
37945 <td>484</td>
37946 </tr>
37947 <tr class="row-odd"><td>&#160;</td>
37948 <td>&#160;</td>
37949 <td>&#160;</td>
37950 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37951 <td>spi</td>
37952 <td>484</td>
37953 </tr>
37954 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37955 <td>213</td>
37956 <td>101</td>
37957 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37958 <td>soc_events_in</td>
37959 <td>485</td>
37960 </tr>
37961 <tr class="row-odd"><td>&#160;</td>
37962 <td>&#160;</td>
37963 <td>&#160;</td>
37964 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37965 <td>spi</td>
37966 <td>485</td>
37967 </tr>
37968 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37969 <td>213</td>
37970 <td>102</td>
37971 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37972 <td>soc_events_in</td>
37973 <td>486</td>
37974 </tr>
37975 <tr class="row-odd"><td>&#160;</td>
37976 <td>&#160;</td>
37977 <td>&#160;</td>
37978 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37979 <td>spi</td>
37980 <td>486</td>
37981 </tr>
37982 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37983 <td>213</td>
37984 <td>103</td>
37985 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
37986 <td>soc_events_in</td>
37987 <td>487</td>
37988 </tr>
37989 <tr class="row-odd"><td>&#160;</td>
37990 <td>&#160;</td>
37991 <td>&#160;</td>
37992 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
37993 <td>spi</td>
37994 <td>487</td>
37995 </tr>
37996 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
37997 <td>213</td>
37998 <td>104</td>
37999 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38000 <td>soc_events_in</td>
38001 <td>488</td>
38002 </tr>
38003 <tr class="row-odd"><td>&#160;</td>
38004 <td>&#160;</td>
38005 <td>&#160;</td>
38006 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38007 <td>spi</td>
38008 <td>488</td>
38009 </tr>
38010 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38011 <td>213</td>
38012 <td>105</td>
38013 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38014 <td>soc_events_in</td>
38015 <td>489</td>
38016 </tr>
38017 <tr class="row-odd"><td>&#160;</td>
38018 <td>&#160;</td>
38019 <td>&#160;</td>
38020 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38021 <td>spi</td>
38022 <td>489</td>
38023 </tr>
38024 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38025 <td>213</td>
38026 <td>106</td>
38027 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38028 <td>soc_events_in</td>
38029 <td>490</td>
38030 </tr>
38031 <tr class="row-odd"><td>&#160;</td>
38032 <td>&#160;</td>
38033 <td>&#160;</td>
38034 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38035 <td>spi</td>
38036 <td>490</td>
38037 </tr>
38038 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38039 <td>213</td>
38040 <td>107</td>
38041 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38042 <td>soc_events_in</td>
38043 <td>491</td>
38044 </tr>
38045 <tr class="row-odd"><td>&#160;</td>
38046 <td>&#160;</td>
38047 <td>&#160;</td>
38048 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38049 <td>spi</td>
38050 <td>491</td>
38051 </tr>
38052 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38053 <td>213</td>
38054 <td>108</td>
38055 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38056 <td>soc_events_in</td>
38057 <td>492</td>
38058 </tr>
38059 <tr class="row-odd"><td>&#160;</td>
38060 <td>&#160;</td>
38061 <td>&#160;</td>
38062 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38063 <td>spi</td>
38064 <td>492</td>
38065 </tr>
38066 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38067 <td>213</td>
38068 <td>109</td>
38069 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38070 <td>soc_events_in</td>
38071 <td>493</td>
38072 </tr>
38073 <tr class="row-odd"><td>&#160;</td>
38074 <td>&#160;</td>
38075 <td>&#160;</td>
38076 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38077 <td>spi</td>
38078 <td>493</td>
38079 </tr>
38080 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38081 <td>213</td>
38082 <td>110</td>
38083 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38084 <td>soc_events_in</td>
38085 <td>494</td>
38086 </tr>
38087 <tr class="row-odd"><td>&#160;</td>
38088 <td>&#160;</td>
38089 <td>&#160;</td>
38090 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38091 <td>spi</td>
38092 <td>494</td>
38093 </tr>
38094 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38095 <td>213</td>
38096 <td>111</td>
38097 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38098 <td>soc_events_in</td>
38099 <td>495</td>
38100 </tr>
38101 <tr class="row-odd"><td>&#160;</td>
38102 <td>&#160;</td>
38103 <td>&#160;</td>
38104 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38105 <td>spi</td>
38106 <td>495</td>
38107 </tr>
38108 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38109 <td>213</td>
38110 <td>112</td>
38111 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38112 <td>soc_events_in</td>
38113 <td>496</td>
38114 </tr>
38115 <tr class="row-odd"><td>&#160;</td>
38116 <td>&#160;</td>
38117 <td>&#160;</td>
38118 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38119 <td>spi</td>
38120 <td>496</td>
38121 </tr>
38122 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38123 <td>213</td>
38124 <td>113</td>
38125 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38126 <td>soc_events_in</td>
38127 <td>497</td>
38128 </tr>
38129 <tr class="row-odd"><td>&#160;</td>
38130 <td>&#160;</td>
38131 <td>&#160;</td>
38132 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38133 <td>spi</td>
38134 <td>497</td>
38135 </tr>
38136 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38137 <td>213</td>
38138 <td>114</td>
38139 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38140 <td>soc_events_in</td>
38141 <td>498</td>
38142 </tr>
38143 <tr class="row-odd"><td>&#160;</td>
38144 <td>&#160;</td>
38145 <td>&#160;</td>
38146 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38147 <td>spi</td>
38148 <td>498</td>
38149 </tr>
38150 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38151 <td>213</td>
38152 <td>115</td>
38153 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38154 <td>soc_events_in</td>
38155 <td>499</td>
38156 </tr>
38157 <tr class="row-odd"><td>&#160;</td>
38158 <td>&#160;</td>
38159 <td>&#160;</td>
38160 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38161 <td>spi</td>
38162 <td>499</td>
38163 </tr>
38164 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38165 <td>213</td>
38166 <td>116</td>
38167 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38168 <td>soc_events_in</td>
38169 <td>500</td>
38170 </tr>
38171 <tr class="row-odd"><td>&#160;</td>
38172 <td>&#160;</td>
38173 <td>&#160;</td>
38174 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38175 <td>spi</td>
38176 <td>500</td>
38177 </tr>
38178 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38179 <td>213</td>
38180 <td>117</td>
38181 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38182 <td>soc_events_in</td>
38183 <td>501</td>
38184 </tr>
38185 <tr class="row-odd"><td>&#160;</td>
38186 <td>&#160;</td>
38187 <td>&#160;</td>
38188 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38189 <td>spi</td>
38190 <td>501</td>
38191 </tr>
38192 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38193 <td>213</td>
38194 <td>118</td>
38195 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38196 <td>soc_events_in</td>
38197 <td>502</td>
38198 </tr>
38199 <tr class="row-odd"><td>&#160;</td>
38200 <td>&#160;</td>
38201 <td>&#160;</td>
38202 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38203 <td>spi</td>
38204 <td>502</td>
38205 </tr>
38206 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38207 <td>213</td>
38208 <td>119</td>
38209 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38210 <td>soc_events_in</td>
38211 <td>503</td>
38212 </tr>
38213 <tr class="row-odd"><td>&#160;</td>
38214 <td>&#160;</td>
38215 <td>&#160;</td>
38216 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38217 <td>spi</td>
38218 <td>503</td>
38219 </tr>
38220 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38221 <td>213</td>
38222 <td>120</td>
38223 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38224 <td>soc_events_in</td>
38225 <td>504</td>
38226 </tr>
38227 <tr class="row-odd"><td>&#160;</td>
38228 <td>&#160;</td>
38229 <td>&#160;</td>
38230 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38231 <td>spi</td>
38232 <td>504</td>
38233 </tr>
38234 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38235 <td>213</td>
38236 <td>121</td>
38237 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38238 <td>soc_events_in</td>
38239 <td>505</td>
38240 </tr>
38241 <tr class="row-odd"><td>&#160;</td>
38242 <td>&#160;</td>
38243 <td>&#160;</td>
38244 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38245 <td>spi</td>
38246 <td>505</td>
38247 </tr>
38248 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38249 <td>213</td>
38250 <td>122</td>
38251 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38252 <td>soc_events_in</td>
38253 <td>506</td>
38254 </tr>
38255 <tr class="row-odd"><td>&#160;</td>
38256 <td>&#160;</td>
38257 <td>&#160;</td>
38258 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38259 <td>spi</td>
38260 <td>506</td>
38261 </tr>
38262 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38263 <td>213</td>
38264 <td>123</td>
38265 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38266 <td>soc_events_in</td>
38267 <td>507</td>
38268 </tr>
38269 <tr class="row-odd"><td>&#160;</td>
38270 <td>&#160;</td>
38271 <td>&#160;</td>
38272 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38273 <td>spi</td>
38274 <td>507</td>
38275 </tr>
38276 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38277 <td>213</td>
38278 <td>124</td>
38279 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38280 <td>soc_events_in</td>
38281 <td>508</td>
38282 </tr>
38283 <tr class="row-odd"><td>&#160;</td>
38284 <td>&#160;</td>
38285 <td>&#160;</td>
38286 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38287 <td>spi</td>
38288 <td>508</td>
38289 </tr>
38290 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38291 <td>213</td>
38292 <td>125</td>
38293 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38294 <td>soc_events_in</td>
38295 <td>509</td>
38296 </tr>
38297 <tr class="row-odd"><td>&#160;</td>
38298 <td>&#160;</td>
38299 <td>&#160;</td>
38300 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38301 <td>spi</td>
38302 <td>509</td>
38303 </tr>
38304 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38305 <td>213</td>
38306 <td>126</td>
38307 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38308 <td>soc_events_in</td>
38309 <td>510</td>
38310 </tr>
38311 <tr class="row-odd"><td>&#160;</td>
38312 <td>&#160;</td>
38313 <td>&#160;</td>
38314 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38315 <td>spi</td>
38316 <td>510</td>
38317 </tr>
38318 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38319 <td>213</td>
38320 <td>127</td>
38321 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38322 <td>soc_events_in</td>
38323 <td>511</td>
38324 </tr>
38325 <tr class="row-odd"><td>&#160;</td>
38326 <td>&#160;</td>
38327 <td>&#160;</td>
38328 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38329 <td>spi</td>
38330 <td>511</td>
38331 </tr>
38332 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38333 <td>213</td>
38334 <td>128</td>
38335 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38336 <td>soc_events_in</td>
38337 <td>672</td>
38338 </tr>
38339 <tr class="row-odd"><td>&#160;</td>
38340 <td>&#160;</td>
38341 <td>&#160;</td>
38342 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38343 <td>spi</td>
38344 <td>672</td>
38345 </tr>
38346 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38347 <td>213</td>
38348 <td>129</td>
38349 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38350 <td>soc_events_in</td>
38351 <td>673</td>
38352 </tr>
38353 <tr class="row-odd"><td>&#160;</td>
38354 <td>&#160;</td>
38355 <td>&#160;</td>
38356 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38357 <td>spi</td>
38358 <td>673</td>
38359 </tr>
38360 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38361 <td>213</td>
38362 <td>130</td>
38363 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38364 <td>soc_events_in</td>
38365 <td>674</td>
38366 </tr>
38367 <tr class="row-odd"><td>&#160;</td>
38368 <td>&#160;</td>
38369 <td>&#160;</td>
38370 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38371 <td>spi</td>
38372 <td>674</td>
38373 </tr>
38374 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38375 <td>213</td>
38376 <td>131</td>
38377 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38378 <td>soc_events_in</td>
38379 <td>675</td>
38380 </tr>
38381 <tr class="row-odd"><td>&#160;</td>
38382 <td>&#160;</td>
38383 <td>&#160;</td>
38384 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38385 <td>spi</td>
38386 <td>675</td>
38387 </tr>
38388 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38389 <td>213</td>
38390 <td>132</td>
38391 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38392 <td>soc_events_in</td>
38393 <td>676</td>
38394 </tr>
38395 <tr class="row-odd"><td>&#160;</td>
38396 <td>&#160;</td>
38397 <td>&#160;</td>
38398 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38399 <td>spi</td>
38400 <td>676</td>
38401 </tr>
38402 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38403 <td>213</td>
38404 <td>133</td>
38405 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38406 <td>soc_events_in</td>
38407 <td>677</td>
38408 </tr>
38409 <tr class="row-odd"><td>&#160;</td>
38410 <td>&#160;</td>
38411 <td>&#160;</td>
38412 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38413 <td>spi</td>
38414 <td>677</td>
38415 </tr>
38416 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38417 <td>213</td>
38418 <td>134</td>
38419 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38420 <td>soc_events_in</td>
38421 <td>678</td>
38422 </tr>
38423 <tr class="row-odd"><td>&#160;</td>
38424 <td>&#160;</td>
38425 <td>&#160;</td>
38426 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38427 <td>spi</td>
38428 <td>678</td>
38429 </tr>
38430 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38431 <td>213</td>
38432 <td>135</td>
38433 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38434 <td>soc_events_in</td>
38435 <td>679</td>
38436 </tr>
38437 <tr class="row-odd"><td>&#160;</td>
38438 <td>&#160;</td>
38439 <td>&#160;</td>
38440 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38441 <td>spi</td>
38442 <td>679</td>
38443 </tr>
38444 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38445 <td>213</td>
38446 <td>136</td>
38447 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38448 <td>soc_events_in</td>
38449 <td>680</td>
38450 </tr>
38451 <tr class="row-odd"><td>&#160;</td>
38452 <td>&#160;</td>
38453 <td>&#160;</td>
38454 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38455 <td>spi</td>
38456 <td>680</td>
38457 </tr>
38458 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38459 <td>213</td>
38460 <td>137</td>
38461 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38462 <td>soc_events_in</td>
38463 <td>681</td>
38464 </tr>
38465 <tr class="row-odd"><td>&#160;</td>
38466 <td>&#160;</td>
38467 <td>&#160;</td>
38468 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38469 <td>spi</td>
38470 <td>681</td>
38471 </tr>
38472 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38473 <td>213</td>
38474 <td>138</td>
38475 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38476 <td>soc_events_in</td>
38477 <td>682</td>
38478 </tr>
38479 <tr class="row-odd"><td>&#160;</td>
38480 <td>&#160;</td>
38481 <td>&#160;</td>
38482 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38483 <td>spi</td>
38484 <td>682</td>
38485 </tr>
38486 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38487 <td>213</td>
38488 <td>139</td>
38489 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38490 <td>soc_events_in</td>
38491 <td>683</td>
38492 </tr>
38493 <tr class="row-odd"><td>&#160;</td>
38494 <td>&#160;</td>
38495 <td>&#160;</td>
38496 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38497 <td>spi</td>
38498 <td>683</td>
38499 </tr>
38500 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38501 <td>213</td>
38502 <td>140</td>
38503 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38504 <td>soc_events_in</td>
38505 <td>684</td>
38506 </tr>
38507 <tr class="row-odd"><td>&#160;</td>
38508 <td>&#160;</td>
38509 <td>&#160;</td>
38510 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38511 <td>spi</td>
38512 <td>684</td>
38513 </tr>
38514 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38515 <td>213</td>
38516 <td>141</td>
38517 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38518 <td>soc_events_in</td>
38519 <td>685</td>
38520 </tr>
38521 <tr class="row-odd"><td>&#160;</td>
38522 <td>&#160;</td>
38523 <td>&#160;</td>
38524 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38525 <td>spi</td>
38526 <td>685</td>
38527 </tr>
38528 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38529 <td>213</td>
38530 <td>142</td>
38531 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38532 <td>soc_events_in</td>
38533 <td>686</td>
38534 </tr>
38535 <tr class="row-odd"><td>&#160;</td>
38536 <td>&#160;</td>
38537 <td>&#160;</td>
38538 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38539 <td>spi</td>
38540 <td>686</td>
38541 </tr>
38542 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38543 <td>213</td>
38544 <td>143</td>
38545 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38546 <td>soc_events_in</td>
38547 <td>687</td>
38548 </tr>
38549 <tr class="row-odd"><td>&#160;</td>
38550 <td>&#160;</td>
38551 <td>&#160;</td>
38552 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38553 <td>spi</td>
38554 <td>687</td>
38555 </tr>
38556 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38557 <td>213</td>
38558 <td>144</td>
38559 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38560 <td>soc_events_in</td>
38561 <td>688</td>
38562 </tr>
38563 <tr class="row-odd"><td>&#160;</td>
38564 <td>&#160;</td>
38565 <td>&#160;</td>
38566 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38567 <td>spi</td>
38568 <td>688</td>
38569 </tr>
38570 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38571 <td>213</td>
38572 <td>145</td>
38573 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38574 <td>soc_events_in</td>
38575 <td>689</td>
38576 </tr>
38577 <tr class="row-odd"><td>&#160;</td>
38578 <td>&#160;</td>
38579 <td>&#160;</td>
38580 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38581 <td>spi</td>
38582 <td>689</td>
38583 </tr>
38584 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38585 <td>213</td>
38586 <td>146</td>
38587 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38588 <td>soc_events_in</td>
38589 <td>690</td>
38590 </tr>
38591 <tr class="row-odd"><td>&#160;</td>
38592 <td>&#160;</td>
38593 <td>&#160;</td>
38594 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38595 <td>spi</td>
38596 <td>690</td>
38597 </tr>
38598 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38599 <td>213</td>
38600 <td>147</td>
38601 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38602 <td>soc_events_in</td>
38603 <td>691</td>
38604 </tr>
38605 <tr class="row-odd"><td>&#160;</td>
38606 <td>&#160;</td>
38607 <td>&#160;</td>
38608 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38609 <td>spi</td>
38610 <td>691</td>
38611 </tr>
38612 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38613 <td>213</td>
38614 <td>148</td>
38615 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38616 <td>soc_events_in</td>
38617 <td>692</td>
38618 </tr>
38619 <tr class="row-odd"><td>&#160;</td>
38620 <td>&#160;</td>
38621 <td>&#160;</td>
38622 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38623 <td>spi</td>
38624 <td>692</td>
38625 </tr>
38626 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38627 <td>213</td>
38628 <td>149</td>
38629 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38630 <td>soc_events_in</td>
38631 <td>693</td>
38632 </tr>
38633 <tr class="row-odd"><td>&#160;</td>
38634 <td>&#160;</td>
38635 <td>&#160;</td>
38636 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38637 <td>spi</td>
38638 <td>693</td>
38639 </tr>
38640 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38641 <td>213</td>
38642 <td>150</td>
38643 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38644 <td>soc_events_in</td>
38645 <td>694</td>
38646 </tr>
38647 <tr class="row-odd"><td>&#160;</td>
38648 <td>&#160;</td>
38649 <td>&#160;</td>
38650 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38651 <td>spi</td>
38652 <td>694</td>
38653 </tr>
38654 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38655 <td>213</td>
38656 <td>151</td>
38657 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38658 <td>soc_events_in</td>
38659 <td>695</td>
38660 </tr>
38661 <tr class="row-odd"><td>&#160;</td>
38662 <td>&#160;</td>
38663 <td>&#160;</td>
38664 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38665 <td>spi</td>
38666 <td>695</td>
38667 </tr>
38668 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38669 <td>213</td>
38670 <td>152</td>
38671 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38672 <td>soc_events_in</td>
38673 <td>696</td>
38674 </tr>
38675 <tr class="row-odd"><td>&#160;</td>
38676 <td>&#160;</td>
38677 <td>&#160;</td>
38678 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38679 <td>spi</td>
38680 <td>696</td>
38681 </tr>
38682 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38683 <td>213</td>
38684 <td>153</td>
38685 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38686 <td>soc_events_in</td>
38687 <td>697</td>
38688 </tr>
38689 <tr class="row-odd"><td>&#160;</td>
38690 <td>&#160;</td>
38691 <td>&#160;</td>
38692 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38693 <td>spi</td>
38694 <td>697</td>
38695 </tr>
38696 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38697 <td>213</td>
38698 <td>154</td>
38699 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38700 <td>soc_events_in</td>
38701 <td>698</td>
38702 </tr>
38703 <tr class="row-odd"><td>&#160;</td>
38704 <td>&#160;</td>
38705 <td>&#160;</td>
38706 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38707 <td>spi</td>
38708 <td>698</td>
38709 </tr>
38710 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38711 <td>213</td>
38712 <td>155</td>
38713 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38714 <td>soc_events_in</td>
38715 <td>699</td>
38716 </tr>
38717 <tr class="row-odd"><td>&#160;</td>
38718 <td>&#160;</td>
38719 <td>&#160;</td>
38720 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38721 <td>spi</td>
38722 <td>699</td>
38723 </tr>
38724 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38725 <td>213</td>
38726 <td>156</td>
38727 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38728 <td>soc_events_in</td>
38729 <td>700</td>
38730 </tr>
38731 <tr class="row-odd"><td>&#160;</td>
38732 <td>&#160;</td>
38733 <td>&#160;</td>
38734 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38735 <td>spi</td>
38736 <td>700</td>
38737 </tr>
38738 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38739 <td>213</td>
38740 <td>157</td>
38741 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38742 <td>soc_events_in</td>
38743 <td>701</td>
38744 </tr>
38745 <tr class="row-odd"><td>&#160;</td>
38746 <td>&#160;</td>
38747 <td>&#160;</td>
38748 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38749 <td>spi</td>
38750 <td>701</td>
38751 </tr>
38752 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38753 <td>213</td>
38754 <td>158</td>
38755 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38756 <td>soc_events_in</td>
38757 <td>702</td>
38758 </tr>
38759 <tr class="row-odd"><td>&#160;</td>
38760 <td>&#160;</td>
38761 <td>&#160;</td>
38762 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38763 <td>spi</td>
38764 <td>702</td>
38765 </tr>
38766 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38767 <td>213</td>
38768 <td>159</td>
38769 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38770 <td>soc_events_in</td>
38771 <td>703</td>
38772 </tr>
38773 <tr class="row-odd"><td>&#160;</td>
38774 <td>&#160;</td>
38775 <td>&#160;</td>
38776 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38777 <td>spi</td>
38778 <td>703</td>
38779 </tr>
38780 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38781 <td>213</td>
38782 <td>160</td>
38783 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38784 <td>soc_events_in</td>
38785 <td>704</td>
38786 </tr>
38787 <tr class="row-odd"><td>&#160;</td>
38788 <td>&#160;</td>
38789 <td>&#160;</td>
38790 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38791 <td>spi</td>
38792 <td>704</td>
38793 </tr>
38794 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38795 <td>213</td>
38796 <td>161</td>
38797 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38798 <td>soc_events_in</td>
38799 <td>705</td>
38800 </tr>
38801 <tr class="row-odd"><td>&#160;</td>
38802 <td>&#160;</td>
38803 <td>&#160;</td>
38804 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38805 <td>spi</td>
38806 <td>705</td>
38807 </tr>
38808 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38809 <td>213</td>
38810 <td>162</td>
38811 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38812 <td>soc_events_in</td>
38813 <td>706</td>
38814 </tr>
38815 <tr class="row-odd"><td>&#160;</td>
38816 <td>&#160;</td>
38817 <td>&#160;</td>
38818 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38819 <td>spi</td>
38820 <td>706</td>
38821 </tr>
38822 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38823 <td>213</td>
38824 <td>163</td>
38825 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38826 <td>soc_events_in</td>
38827 <td>707</td>
38828 </tr>
38829 <tr class="row-odd"><td>&#160;</td>
38830 <td>&#160;</td>
38831 <td>&#160;</td>
38832 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38833 <td>spi</td>
38834 <td>707</td>
38835 </tr>
38836 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38837 <td>213</td>
38838 <td>164</td>
38839 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38840 <td>soc_events_in</td>
38841 <td>708</td>
38842 </tr>
38843 <tr class="row-odd"><td>&#160;</td>
38844 <td>&#160;</td>
38845 <td>&#160;</td>
38846 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38847 <td>spi</td>
38848 <td>708</td>
38849 </tr>
38850 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38851 <td>213</td>
38852 <td>165</td>
38853 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38854 <td>soc_events_in</td>
38855 <td>709</td>
38856 </tr>
38857 <tr class="row-odd"><td>&#160;</td>
38858 <td>&#160;</td>
38859 <td>&#160;</td>
38860 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38861 <td>spi</td>
38862 <td>709</td>
38863 </tr>
38864 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38865 <td>213</td>
38866 <td>166</td>
38867 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38868 <td>soc_events_in</td>
38869 <td>710</td>
38870 </tr>
38871 <tr class="row-odd"><td>&#160;</td>
38872 <td>&#160;</td>
38873 <td>&#160;</td>
38874 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38875 <td>spi</td>
38876 <td>710</td>
38877 </tr>
38878 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38879 <td>213</td>
38880 <td>167</td>
38881 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38882 <td>soc_events_in</td>
38883 <td>711</td>
38884 </tr>
38885 <tr class="row-odd"><td>&#160;</td>
38886 <td>&#160;</td>
38887 <td>&#160;</td>
38888 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38889 <td>spi</td>
38890 <td>711</td>
38891 </tr>
38892 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38893 <td>213</td>
38894 <td>168</td>
38895 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38896 <td>soc_events_in</td>
38897 <td>712</td>
38898 </tr>
38899 <tr class="row-odd"><td>&#160;</td>
38900 <td>&#160;</td>
38901 <td>&#160;</td>
38902 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38903 <td>spi</td>
38904 <td>712</td>
38905 </tr>
38906 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38907 <td>213</td>
38908 <td>169</td>
38909 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38910 <td>soc_events_in</td>
38911 <td>713</td>
38912 </tr>
38913 <tr class="row-odd"><td>&#160;</td>
38914 <td>&#160;</td>
38915 <td>&#160;</td>
38916 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38917 <td>spi</td>
38918 <td>713</td>
38919 </tr>
38920 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38921 <td>213</td>
38922 <td>170</td>
38923 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38924 <td>soc_events_in</td>
38925 <td>714</td>
38926 </tr>
38927 <tr class="row-odd"><td>&#160;</td>
38928 <td>&#160;</td>
38929 <td>&#160;</td>
38930 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38931 <td>spi</td>
38932 <td>714</td>
38933 </tr>
38934 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38935 <td>213</td>
38936 <td>171</td>
38937 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38938 <td>soc_events_in</td>
38939 <td>715</td>
38940 </tr>
38941 <tr class="row-odd"><td>&#160;</td>
38942 <td>&#160;</td>
38943 <td>&#160;</td>
38944 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38945 <td>spi</td>
38946 <td>715</td>
38947 </tr>
38948 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38949 <td>213</td>
38950 <td>172</td>
38951 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38952 <td>soc_events_in</td>
38953 <td>716</td>
38954 </tr>
38955 <tr class="row-odd"><td>&#160;</td>
38956 <td>&#160;</td>
38957 <td>&#160;</td>
38958 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38959 <td>spi</td>
38960 <td>716</td>
38961 </tr>
38962 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38963 <td>213</td>
38964 <td>173</td>
38965 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38966 <td>soc_events_in</td>
38967 <td>717</td>
38968 </tr>
38969 <tr class="row-odd"><td>&#160;</td>
38970 <td>&#160;</td>
38971 <td>&#160;</td>
38972 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38973 <td>spi</td>
38974 <td>717</td>
38975 </tr>
38976 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38977 <td>213</td>
38978 <td>174</td>
38979 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38980 <td>soc_events_in</td>
38981 <td>718</td>
38982 </tr>
38983 <tr class="row-odd"><td>&#160;</td>
38984 <td>&#160;</td>
38985 <td>&#160;</td>
38986 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
38987 <td>spi</td>
38988 <td>718</td>
38989 </tr>
38990 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
38991 <td>213</td>
38992 <td>175</td>
38993 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
38994 <td>soc_events_in</td>
38995 <td>719</td>
38996 </tr>
38997 <tr class="row-odd"><td>&#160;</td>
38998 <td>&#160;</td>
38999 <td>&#160;</td>
39000 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39001 <td>spi</td>
39002 <td>719</td>
39003 </tr>
39004 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39005 <td>213</td>
39006 <td>176</td>
39007 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39008 <td>soc_events_in</td>
39009 <td>720</td>
39010 </tr>
39011 <tr class="row-odd"><td>&#160;</td>
39012 <td>&#160;</td>
39013 <td>&#160;</td>
39014 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39015 <td>spi</td>
39016 <td>720</td>
39017 </tr>
39018 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39019 <td>213</td>
39020 <td>177</td>
39021 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39022 <td>soc_events_in</td>
39023 <td>721</td>
39024 </tr>
39025 <tr class="row-odd"><td>&#160;</td>
39026 <td>&#160;</td>
39027 <td>&#160;</td>
39028 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39029 <td>spi</td>
39030 <td>721</td>
39031 </tr>
39032 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39033 <td>213</td>
39034 <td>178</td>
39035 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39036 <td>soc_events_in</td>
39037 <td>722</td>
39038 </tr>
39039 <tr class="row-odd"><td>&#160;</td>
39040 <td>&#160;</td>
39041 <td>&#160;</td>
39042 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39043 <td>spi</td>
39044 <td>722</td>
39045 </tr>
39046 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39047 <td>213</td>
39048 <td>179</td>
39049 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39050 <td>soc_events_in</td>
39051 <td>723</td>
39052 </tr>
39053 <tr class="row-odd"><td>&#160;</td>
39054 <td>&#160;</td>
39055 <td>&#160;</td>
39056 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39057 <td>spi</td>
39058 <td>723</td>
39059 </tr>
39060 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39061 <td>213</td>
39062 <td>180</td>
39063 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39064 <td>soc_events_in</td>
39065 <td>724</td>
39066 </tr>
39067 <tr class="row-odd"><td>&#160;</td>
39068 <td>&#160;</td>
39069 <td>&#160;</td>
39070 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39071 <td>spi</td>
39072 <td>724</td>
39073 </tr>
39074 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39075 <td>213</td>
39076 <td>181</td>
39077 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39078 <td>soc_events_in</td>
39079 <td>725</td>
39080 </tr>
39081 <tr class="row-odd"><td>&#160;</td>
39082 <td>&#160;</td>
39083 <td>&#160;</td>
39084 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39085 <td>spi</td>
39086 <td>725</td>
39087 </tr>
39088 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39089 <td>213</td>
39090 <td>182</td>
39091 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39092 <td>soc_events_in</td>
39093 <td>726</td>
39094 </tr>
39095 <tr class="row-odd"><td>&#160;</td>
39096 <td>&#160;</td>
39097 <td>&#160;</td>
39098 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39099 <td>spi</td>
39100 <td>726</td>
39101 </tr>
39102 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39103 <td>213</td>
39104 <td>183</td>
39105 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39106 <td>soc_events_in</td>
39107 <td>727</td>
39108 </tr>
39109 <tr class="row-odd"><td>&#160;</td>
39110 <td>&#160;</td>
39111 <td>&#160;</td>
39112 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39113 <td>spi</td>
39114 <td>727</td>
39115 </tr>
39116 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39117 <td>213</td>
39118 <td>184</td>
39119 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39120 <td>soc_events_in</td>
39121 <td>728</td>
39122 </tr>
39123 <tr class="row-odd"><td>&#160;</td>
39124 <td>&#160;</td>
39125 <td>&#160;</td>
39126 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39127 <td>spi</td>
39128 <td>728</td>
39129 </tr>
39130 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39131 <td>213</td>
39132 <td>185</td>
39133 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39134 <td>soc_events_in</td>
39135 <td>729</td>
39136 </tr>
39137 <tr class="row-odd"><td>&#160;</td>
39138 <td>&#160;</td>
39139 <td>&#160;</td>
39140 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39141 <td>spi</td>
39142 <td>729</td>
39143 </tr>
39144 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39145 <td>213</td>
39146 <td>186</td>
39147 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39148 <td>soc_events_in</td>
39149 <td>730</td>
39150 </tr>
39151 <tr class="row-odd"><td>&#160;</td>
39152 <td>&#160;</td>
39153 <td>&#160;</td>
39154 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39155 <td>spi</td>
39156 <td>730</td>
39157 </tr>
39158 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39159 <td>213</td>
39160 <td>187</td>
39161 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39162 <td>soc_events_in</td>
39163 <td>731</td>
39164 </tr>
39165 <tr class="row-odd"><td>&#160;</td>
39166 <td>&#160;</td>
39167 <td>&#160;</td>
39168 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39169 <td>spi</td>
39170 <td>731</td>
39171 </tr>
39172 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39173 (<strong>Reserved by System Firmware</strong>)</td>
39174 <td>213</td>
39175 <td>188</td>
39176 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39177 <td>soc_events_in</td>
39178 <td>732</td>
39179 </tr>
39180 <tr class="row-odd"><td>&#160;</td>
39181 <td>&#160;</td>
39182 <td>&#160;</td>
39183 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39184 <td>spi</td>
39185 <td>732</td>
39186 </tr>
39187 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39188 (<strong>Reserved by System Firmware</strong>)</td>
39189 <td>213</td>
39190 <td>189</td>
39191 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39192 <td>soc_events_in</td>
39193 <td>733</td>
39194 </tr>
39195 <tr class="row-odd"><td>&#160;</td>
39196 <td>&#160;</td>
39197 <td>&#160;</td>
39198 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39199 <td>spi</td>
39200 <td>733</td>
39201 </tr>
39202 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39203 (<strong>Reserved by System Firmware</strong>)</td>
39204 <td>213</td>
39205 <td>190</td>
39206 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39207 <td>soc_events_in</td>
39208 <td>734</td>
39209 </tr>
39210 <tr class="row-odd"><td>&#160;</td>
39211 <td>&#160;</td>
39212 <td>&#160;</td>
39213 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39214 <td>spi</td>
39215 <td>734</td>
39216 </tr>
39217 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39218 (<strong>Reserved by System Firmware</strong>)</td>
39219 <td>213</td>
39220 <td>191</td>
39221 <td>J721E_DEV_COMPUTE_CLUSTER0_CLEC</td>
39222 <td>soc_events_in</td>
39223 <td>735</td>
39224 </tr>
39225 <tr class="row-odd"><td>&#160;</td>
39226 <td>&#160;</td>
39227 <td>&#160;</td>
39228 <td>J721E_DEV_COMPUTE_CLUSTER0_GIC500SS</td>
39229 <td>spi</td>
39230 <td>735</td>
39231 </tr>
39232 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39233 (<strong>Reserved by System Firmware</strong>)</td>
39234 <td>213</td>
39235 <td>192</td>
39236 <td>J721E_DEV_R5FSS0_CORE0</td>
39237 <td>intr</td>
39238 <td>224</td>
39239 </tr>
39240 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39241 (<strong>Reserved by System Firmware</strong>)</td>
39242 <td>213</td>
39243 <td>193</td>
39244 <td>J721E_DEV_R5FSS0_CORE0</td>
39245 <td>intr</td>
39246 <td>225</td>
39247 </tr>
39248 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39249 (<strong>Reserved by System Firmware</strong>)</td>
39250 <td>213</td>
39251 <td>194</td>
39252 <td>J721E_DEV_R5FSS0_CORE0</td>
39253 <td>intr</td>
39254 <td>226</td>
39255 </tr>
39256 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39257 (<strong>Reserved by System Firmware</strong>)</td>
39258 <td>213</td>
39259 <td>195</td>
39260 <td>J721E_DEV_R5FSS0_CORE0</td>
39261 <td>intr</td>
39262 <td>227</td>
39263 </tr>
39264 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39265 <td>213</td>
39266 <td>196</td>
39267 <td>J721E_DEV_R5FSS0_CORE0</td>
39268 <td>intr</td>
39269 <td>228</td>
39270 </tr>
39271 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39272 <td>213</td>
39273 <td>197</td>
39274 <td>J721E_DEV_R5FSS0_CORE0</td>
39275 <td>intr</td>
39276 <td>229</td>
39277 </tr>
39278 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39279 <td>213</td>
39280 <td>198</td>
39281 <td>J721E_DEV_R5FSS0_CORE0</td>
39282 <td>intr</td>
39283 <td>230</td>
39284 </tr>
39285 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39286 <td>213</td>
39287 <td>199</td>
39288 <td>J721E_DEV_R5FSS0_CORE0</td>
39289 <td>intr</td>
39290 <td>231</td>
39291 </tr>
39292 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39293 <td>213</td>
39294 <td>200</td>
39295 <td>J721E_DEV_R5FSS0_CORE0</td>
39296 <td>intr</td>
39297 <td>232</td>
39298 </tr>
39299 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39300 <td>213</td>
39301 <td>201</td>
39302 <td>J721E_DEV_R5FSS0_CORE0</td>
39303 <td>intr</td>
39304 <td>233</td>
39305 </tr>
39306 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39307 <td>213</td>
39308 <td>202</td>
39309 <td>J721E_DEV_R5FSS0_CORE0</td>
39310 <td>intr</td>
39311 <td>234</td>
39312 </tr>
39313 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39314 <td>213</td>
39315 <td>203</td>
39316 <td>J721E_DEV_R5FSS0_CORE0</td>
39317 <td>intr</td>
39318 <td>235</td>
39319 </tr>
39320 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39321 <td>213</td>
39322 <td>204</td>
39323 <td>J721E_DEV_R5FSS0_CORE0</td>
39324 <td>intr</td>
39325 <td>236</td>
39326 </tr>
39327 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39328 <td>213</td>
39329 <td>205</td>
39330 <td>J721E_DEV_R5FSS0_CORE0</td>
39331 <td>intr</td>
39332 <td>237</td>
39333 </tr>
39334 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39335 <td>213</td>
39336 <td>206</td>
39337 <td>J721E_DEV_R5FSS0_CORE0</td>
39338 <td>intr</td>
39339 <td>238</td>
39340 </tr>
39341 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39342 <td>213</td>
39343 <td>207</td>
39344 <td>J721E_DEV_R5FSS0_CORE0</td>
39345 <td>intr</td>
39346 <td>239</td>
39347 </tr>
39348 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39349 <td>213</td>
39350 <td>208</td>
39351 <td>J721E_DEV_R5FSS0_CORE0</td>
39352 <td>intr</td>
39353 <td>240</td>
39354 </tr>
39355 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39356 <td>213</td>
39357 <td>209</td>
39358 <td>J721E_DEV_R5FSS0_CORE0</td>
39359 <td>intr</td>
39360 <td>241</td>
39361 </tr>
39362 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39363 <td>213</td>
39364 <td>210</td>
39365 <td>J721E_DEV_R5FSS0_CORE0</td>
39366 <td>intr</td>
39367 <td>242</td>
39368 </tr>
39369 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39370 <td>213</td>
39371 <td>211</td>
39372 <td>J721E_DEV_R5FSS0_CORE0</td>
39373 <td>intr</td>
39374 <td>243</td>
39375 </tr>
39376 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39377 <td>213</td>
39378 <td>212</td>
39379 <td>J721E_DEV_R5FSS0_CORE0</td>
39380 <td>intr</td>
39381 <td>244</td>
39382 </tr>
39383 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39384 <td>213</td>
39385 <td>213</td>
39386 <td>J721E_DEV_R5FSS0_CORE0</td>
39387 <td>intr</td>
39388 <td>245</td>
39389 </tr>
39390 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39391 <td>213</td>
39392 <td>214</td>
39393 <td>J721E_DEV_R5FSS0_CORE0</td>
39394 <td>intr</td>
39395 <td>246</td>
39396 </tr>
39397 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39398 <td>213</td>
39399 <td>215</td>
39400 <td>J721E_DEV_R5FSS0_CORE0</td>
39401 <td>intr</td>
39402 <td>247</td>
39403 </tr>
39404 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39405 <td>213</td>
39406 <td>216</td>
39407 <td>J721E_DEV_R5FSS0_CORE0</td>
39408 <td>intr</td>
39409 <td>248</td>
39410 </tr>
39411 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39412 <td>213</td>
39413 <td>217</td>
39414 <td>J721E_DEV_R5FSS0_CORE0</td>
39415 <td>intr</td>
39416 <td>249</td>
39417 </tr>
39418 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39419 <td>213</td>
39420 <td>218</td>
39421 <td>J721E_DEV_R5FSS0_CORE0</td>
39422 <td>intr</td>
39423 <td>250</td>
39424 </tr>
39425 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39426 <td>213</td>
39427 <td>219</td>
39428 <td>J721E_DEV_R5FSS0_CORE0</td>
39429 <td>intr</td>
39430 <td>251</td>
39431 </tr>
39432 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39433 <td>213</td>
39434 <td>220</td>
39435 <td>J721E_DEV_R5FSS0_CORE0</td>
39436 <td>intr</td>
39437 <td>252</td>
39438 </tr>
39439 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39440 <td>213</td>
39441 <td>221</td>
39442 <td>J721E_DEV_R5FSS0_CORE0</td>
39443 <td>intr</td>
39444 <td>253</td>
39445 </tr>
39446 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39447 <td>213</td>
39448 <td>222</td>
39449 <td>J721E_DEV_R5FSS0_CORE0</td>
39450 <td>intr</td>
39451 <td>254</td>
39452 </tr>
39453 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39454 <td>213</td>
39455 <td>223</td>
39456 <td>J721E_DEV_R5FSS0_CORE0</td>
39457 <td>intr</td>
39458 <td>255</td>
39459 </tr>
39460 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39461 (<strong>Reserved by System Firmware</strong>)</td>
39462 <td>213</td>
39463 <td>224</td>
39464 <td>J721E_DEV_R5FSS0_CORE1</td>
39465 <td>intr</td>
39466 <td>224</td>
39467 </tr>
39468 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39469 (<strong>Reserved by System Firmware</strong>)</td>
39470 <td>213</td>
39471 <td>225</td>
39472 <td>J721E_DEV_R5FSS0_CORE1</td>
39473 <td>intr</td>
39474 <td>225</td>
39475 </tr>
39476 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39477 (<strong>Reserved by System Firmware</strong>)</td>
39478 <td>213</td>
39479 <td>226</td>
39480 <td>J721E_DEV_R5FSS0_CORE1</td>
39481 <td>intr</td>
39482 <td>226</td>
39483 </tr>
39484 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39485 (<strong>Reserved by System Firmware</strong>)</td>
39486 <td>213</td>
39487 <td>227</td>
39488 <td>J721E_DEV_R5FSS0_CORE1</td>
39489 <td>intr</td>
39490 <td>227</td>
39491 </tr>
39492 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39493 <td>213</td>
39494 <td>228</td>
39495 <td>J721E_DEV_R5FSS0_CORE1</td>
39496 <td>intr</td>
39497 <td>228</td>
39498 </tr>
39499 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39500 <td>213</td>
39501 <td>229</td>
39502 <td>J721E_DEV_R5FSS0_CORE1</td>
39503 <td>intr</td>
39504 <td>229</td>
39505 </tr>
39506 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39507 <td>213</td>
39508 <td>230</td>
39509 <td>J721E_DEV_R5FSS0_CORE1</td>
39510 <td>intr</td>
39511 <td>230</td>
39512 </tr>
39513 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39514 <td>213</td>
39515 <td>231</td>
39516 <td>J721E_DEV_R5FSS0_CORE1</td>
39517 <td>intr</td>
39518 <td>231</td>
39519 </tr>
39520 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39521 <td>213</td>
39522 <td>232</td>
39523 <td>J721E_DEV_R5FSS0_CORE1</td>
39524 <td>intr</td>
39525 <td>232</td>
39526 </tr>
39527 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39528 <td>213</td>
39529 <td>233</td>
39530 <td>J721E_DEV_R5FSS0_CORE1</td>
39531 <td>intr</td>
39532 <td>233</td>
39533 </tr>
39534 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39535 <td>213</td>
39536 <td>234</td>
39537 <td>J721E_DEV_R5FSS0_CORE1</td>
39538 <td>intr</td>
39539 <td>234</td>
39540 </tr>
39541 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39542 <td>213</td>
39543 <td>235</td>
39544 <td>J721E_DEV_R5FSS0_CORE1</td>
39545 <td>intr</td>
39546 <td>235</td>
39547 </tr>
39548 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39549 <td>213</td>
39550 <td>236</td>
39551 <td>J721E_DEV_R5FSS0_CORE1</td>
39552 <td>intr</td>
39553 <td>236</td>
39554 </tr>
39555 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39556 <td>213</td>
39557 <td>237</td>
39558 <td>J721E_DEV_R5FSS0_CORE1</td>
39559 <td>intr</td>
39560 <td>237</td>
39561 </tr>
39562 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39563 <td>213</td>
39564 <td>238</td>
39565 <td>J721E_DEV_R5FSS0_CORE1</td>
39566 <td>intr</td>
39567 <td>238</td>
39568 </tr>
39569 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39570 <td>213</td>
39571 <td>239</td>
39572 <td>J721E_DEV_R5FSS0_CORE1</td>
39573 <td>intr</td>
39574 <td>239</td>
39575 </tr>
39576 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39577 <td>213</td>
39578 <td>240</td>
39579 <td>J721E_DEV_R5FSS0_CORE1</td>
39580 <td>intr</td>
39581 <td>240</td>
39582 </tr>
39583 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39584 <td>213</td>
39585 <td>241</td>
39586 <td>J721E_DEV_R5FSS0_CORE1</td>
39587 <td>intr</td>
39588 <td>241</td>
39589 </tr>
39590 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39591 <td>213</td>
39592 <td>242</td>
39593 <td>J721E_DEV_R5FSS0_CORE1</td>
39594 <td>intr</td>
39595 <td>242</td>
39596 </tr>
39597 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39598 <td>213</td>
39599 <td>243</td>
39600 <td>J721E_DEV_R5FSS0_CORE1</td>
39601 <td>intr</td>
39602 <td>243</td>
39603 </tr>
39604 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39605 <td>213</td>
39606 <td>244</td>
39607 <td>J721E_DEV_R5FSS0_CORE1</td>
39608 <td>intr</td>
39609 <td>244</td>
39610 </tr>
39611 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39612 <td>213</td>
39613 <td>245</td>
39614 <td>J721E_DEV_R5FSS0_CORE1</td>
39615 <td>intr</td>
39616 <td>245</td>
39617 </tr>
39618 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39619 <td>213</td>
39620 <td>246</td>
39621 <td>J721E_DEV_R5FSS0_CORE1</td>
39622 <td>intr</td>
39623 <td>246</td>
39624 </tr>
39625 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39626 <td>213</td>
39627 <td>247</td>
39628 <td>J721E_DEV_R5FSS0_CORE1</td>
39629 <td>intr</td>
39630 <td>247</td>
39631 </tr>
39632 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39633 <td>213</td>
39634 <td>248</td>
39635 <td>J721E_DEV_R5FSS0_CORE1</td>
39636 <td>intr</td>
39637 <td>248</td>
39638 </tr>
39639 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39640 <td>213</td>
39641 <td>249</td>
39642 <td>J721E_DEV_R5FSS0_CORE1</td>
39643 <td>intr</td>
39644 <td>249</td>
39645 </tr>
39646 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39647 <td>213</td>
39648 <td>250</td>
39649 <td>J721E_DEV_R5FSS0_CORE1</td>
39650 <td>intr</td>
39651 <td>250</td>
39652 </tr>
39653 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39654 <td>213</td>
39655 <td>251</td>
39656 <td>J721E_DEV_R5FSS0_CORE1</td>
39657 <td>intr</td>
39658 <td>251</td>
39659 </tr>
39660 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39661 <td>213</td>
39662 <td>252</td>
39663 <td>J721E_DEV_R5FSS0_CORE1</td>
39664 <td>intr</td>
39665 <td>252</td>
39666 </tr>
39667 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39668 <td>213</td>
39669 <td>253</td>
39670 <td>J721E_DEV_R5FSS0_CORE1</td>
39671 <td>intr</td>
39672 <td>253</td>
39673 </tr>
39674 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39675 <td>213</td>
39676 <td>254</td>
39677 <td>J721E_DEV_R5FSS0_CORE1</td>
39678 <td>intr</td>
39679 <td>254</td>
39680 </tr>
39681 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39682 <td>213</td>
39683 <td>255</td>
39684 <td>J721E_DEV_R5FSS0_CORE1</td>
39685 <td>intr</td>
39686 <td>255</td>
39687 </tr>
39688 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39689 (<strong>Reserved by System Firmware</strong>)</td>
39690 <td>213</td>
39691 <td>256</td>
39692 <td>J721E_DEV_R5FSS1_CORE0</td>
39693 <td>intr</td>
39694 <td>224</td>
39695 </tr>
39696 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39697 (<strong>Reserved by System Firmware</strong>)</td>
39698 <td>213</td>
39699 <td>257</td>
39700 <td>J721E_DEV_R5FSS1_CORE0</td>
39701 <td>intr</td>
39702 <td>225</td>
39703 </tr>
39704 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39705 (<strong>Reserved by System Firmware</strong>)</td>
39706 <td>213</td>
39707 <td>258</td>
39708 <td>J721E_DEV_R5FSS1_CORE0</td>
39709 <td>intr</td>
39710 <td>226</td>
39711 </tr>
39712 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39713 (<strong>Reserved by System Firmware</strong>)</td>
39714 <td>213</td>
39715 <td>259</td>
39716 <td>J721E_DEV_R5FSS1_CORE0</td>
39717 <td>intr</td>
39718 <td>227</td>
39719 </tr>
39720 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39721 <td>213</td>
39722 <td>260</td>
39723 <td>J721E_DEV_R5FSS1_CORE0</td>
39724 <td>intr</td>
39725 <td>228</td>
39726 </tr>
39727 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39728 <td>213</td>
39729 <td>261</td>
39730 <td>J721E_DEV_R5FSS1_CORE0</td>
39731 <td>intr</td>
39732 <td>229</td>
39733 </tr>
39734 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39735 <td>213</td>
39736 <td>262</td>
39737 <td>J721E_DEV_R5FSS1_CORE0</td>
39738 <td>intr</td>
39739 <td>230</td>
39740 </tr>
39741 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39742 <td>213</td>
39743 <td>263</td>
39744 <td>J721E_DEV_R5FSS1_CORE0</td>
39745 <td>intr</td>
39746 <td>231</td>
39747 </tr>
39748 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39749 <td>213</td>
39750 <td>264</td>
39751 <td>J721E_DEV_R5FSS1_CORE0</td>
39752 <td>intr</td>
39753 <td>232</td>
39754 </tr>
39755 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39756 <td>213</td>
39757 <td>265</td>
39758 <td>J721E_DEV_R5FSS1_CORE0</td>
39759 <td>intr</td>
39760 <td>233</td>
39761 </tr>
39762 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39763 <td>213</td>
39764 <td>266</td>
39765 <td>J721E_DEV_R5FSS1_CORE0</td>
39766 <td>intr</td>
39767 <td>234</td>
39768 </tr>
39769 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39770 <td>213</td>
39771 <td>267</td>
39772 <td>J721E_DEV_R5FSS1_CORE0</td>
39773 <td>intr</td>
39774 <td>235</td>
39775 </tr>
39776 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39777 <td>213</td>
39778 <td>268</td>
39779 <td>J721E_DEV_R5FSS1_CORE0</td>
39780 <td>intr</td>
39781 <td>236</td>
39782 </tr>
39783 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39784 <td>213</td>
39785 <td>269</td>
39786 <td>J721E_DEV_R5FSS1_CORE0</td>
39787 <td>intr</td>
39788 <td>237</td>
39789 </tr>
39790 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39791 <td>213</td>
39792 <td>270</td>
39793 <td>J721E_DEV_R5FSS1_CORE0</td>
39794 <td>intr</td>
39795 <td>238</td>
39796 </tr>
39797 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39798 <td>213</td>
39799 <td>271</td>
39800 <td>J721E_DEV_R5FSS1_CORE0</td>
39801 <td>intr</td>
39802 <td>239</td>
39803 </tr>
39804 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39805 <td>213</td>
39806 <td>272</td>
39807 <td>J721E_DEV_R5FSS1_CORE0</td>
39808 <td>intr</td>
39809 <td>240</td>
39810 </tr>
39811 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39812 <td>213</td>
39813 <td>273</td>
39814 <td>J721E_DEV_R5FSS1_CORE0</td>
39815 <td>intr</td>
39816 <td>241</td>
39817 </tr>
39818 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39819 <td>213</td>
39820 <td>274</td>
39821 <td>J721E_DEV_R5FSS1_CORE0</td>
39822 <td>intr</td>
39823 <td>242</td>
39824 </tr>
39825 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39826 <td>213</td>
39827 <td>275</td>
39828 <td>J721E_DEV_R5FSS1_CORE0</td>
39829 <td>intr</td>
39830 <td>243</td>
39831 </tr>
39832 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39833 <td>213</td>
39834 <td>276</td>
39835 <td>J721E_DEV_R5FSS1_CORE0</td>
39836 <td>intr</td>
39837 <td>244</td>
39838 </tr>
39839 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39840 <td>213</td>
39841 <td>277</td>
39842 <td>J721E_DEV_R5FSS1_CORE0</td>
39843 <td>intr</td>
39844 <td>245</td>
39845 </tr>
39846 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39847 <td>213</td>
39848 <td>278</td>
39849 <td>J721E_DEV_R5FSS1_CORE0</td>
39850 <td>intr</td>
39851 <td>246</td>
39852 </tr>
39853 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39854 <td>213</td>
39855 <td>279</td>
39856 <td>J721E_DEV_R5FSS1_CORE0</td>
39857 <td>intr</td>
39858 <td>247</td>
39859 </tr>
39860 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39861 <td>213</td>
39862 <td>280</td>
39863 <td>J721E_DEV_R5FSS1_CORE0</td>
39864 <td>intr</td>
39865 <td>248</td>
39866 </tr>
39867 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39868 <td>213</td>
39869 <td>281</td>
39870 <td>J721E_DEV_R5FSS1_CORE0</td>
39871 <td>intr</td>
39872 <td>249</td>
39873 </tr>
39874 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39875 <td>213</td>
39876 <td>282</td>
39877 <td>J721E_DEV_R5FSS1_CORE0</td>
39878 <td>intr</td>
39879 <td>250</td>
39880 </tr>
39881 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39882 <td>213</td>
39883 <td>283</td>
39884 <td>J721E_DEV_R5FSS1_CORE0</td>
39885 <td>intr</td>
39886 <td>251</td>
39887 </tr>
39888 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39889 <td>213</td>
39890 <td>284</td>
39891 <td>J721E_DEV_R5FSS1_CORE0</td>
39892 <td>intr</td>
39893 <td>252</td>
39894 </tr>
39895 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39896 <td>213</td>
39897 <td>285</td>
39898 <td>J721E_DEV_R5FSS1_CORE0</td>
39899 <td>intr</td>
39900 <td>253</td>
39901 </tr>
39902 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39903 <td>213</td>
39904 <td>286</td>
39905 <td>J721E_DEV_R5FSS1_CORE0</td>
39906 <td>intr</td>
39907 <td>254</td>
39908 </tr>
39909 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39910 <td>213</td>
39911 <td>287</td>
39912 <td>J721E_DEV_R5FSS1_CORE0</td>
39913 <td>intr</td>
39914 <td>255</td>
39915 </tr>
39916 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39917 (<strong>Reserved by System Firmware</strong>)</td>
39918 <td>213</td>
39919 <td>288</td>
39920 <td>J721E_DEV_R5FSS1_CORE1</td>
39921 <td>intr</td>
39922 <td>224</td>
39923 </tr>
39924 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39925 (<strong>Reserved by System Firmware</strong>)</td>
39926 <td>213</td>
39927 <td>289</td>
39928 <td>J721E_DEV_R5FSS1_CORE1</td>
39929 <td>intr</td>
39930 <td>225</td>
39931 </tr>
39932 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39933 (<strong>Reserved by System Firmware</strong>)</td>
39934 <td>213</td>
39935 <td>290</td>
39936 <td>J721E_DEV_R5FSS1_CORE1</td>
39937 <td>intr</td>
39938 <td>226</td>
39939 </tr>
39940 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
39941 (<strong>Reserved by System Firmware</strong>)</td>
39942 <td>213</td>
39943 <td>291</td>
39944 <td>J721E_DEV_R5FSS1_CORE1</td>
39945 <td>intr</td>
39946 <td>227</td>
39947 </tr>
39948 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39949 <td>213</td>
39950 <td>292</td>
39951 <td>J721E_DEV_R5FSS1_CORE1</td>
39952 <td>intr</td>
39953 <td>228</td>
39954 </tr>
39955 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39956 <td>213</td>
39957 <td>293</td>
39958 <td>J721E_DEV_R5FSS1_CORE1</td>
39959 <td>intr</td>
39960 <td>229</td>
39961 </tr>
39962 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39963 <td>213</td>
39964 <td>294</td>
39965 <td>J721E_DEV_R5FSS1_CORE1</td>
39966 <td>intr</td>
39967 <td>230</td>
39968 </tr>
39969 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39970 <td>213</td>
39971 <td>295</td>
39972 <td>J721E_DEV_R5FSS1_CORE1</td>
39973 <td>intr</td>
39974 <td>231</td>
39975 </tr>
39976 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39977 <td>213</td>
39978 <td>296</td>
39979 <td>J721E_DEV_R5FSS1_CORE1</td>
39980 <td>intr</td>
39981 <td>232</td>
39982 </tr>
39983 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39984 <td>213</td>
39985 <td>297</td>
39986 <td>J721E_DEV_R5FSS1_CORE1</td>
39987 <td>intr</td>
39988 <td>233</td>
39989 </tr>
39990 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39991 <td>213</td>
39992 <td>298</td>
39993 <td>J721E_DEV_R5FSS1_CORE1</td>
39994 <td>intr</td>
39995 <td>234</td>
39996 </tr>
39997 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
39998 <td>213</td>
39999 <td>299</td>
40000 <td>J721E_DEV_R5FSS1_CORE1</td>
40001 <td>intr</td>
40002 <td>235</td>
40003 </tr>
40004 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40005 <td>213</td>
40006 <td>300</td>
40007 <td>J721E_DEV_R5FSS1_CORE1</td>
40008 <td>intr</td>
40009 <td>236</td>
40010 </tr>
40011 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40012 <td>213</td>
40013 <td>301</td>
40014 <td>J721E_DEV_R5FSS1_CORE1</td>
40015 <td>intr</td>
40016 <td>237</td>
40017 </tr>
40018 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40019 <td>213</td>
40020 <td>302</td>
40021 <td>J721E_DEV_R5FSS1_CORE1</td>
40022 <td>intr</td>
40023 <td>238</td>
40024 </tr>
40025 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40026 <td>213</td>
40027 <td>303</td>
40028 <td>J721E_DEV_R5FSS1_CORE1</td>
40029 <td>intr</td>
40030 <td>239</td>
40031 </tr>
40032 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40033 <td>213</td>
40034 <td>304</td>
40035 <td>J721E_DEV_R5FSS1_CORE1</td>
40036 <td>intr</td>
40037 <td>240</td>
40038 </tr>
40039 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40040 <td>213</td>
40041 <td>305</td>
40042 <td>J721E_DEV_R5FSS1_CORE1</td>
40043 <td>intr</td>
40044 <td>241</td>
40045 </tr>
40046 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40047 <td>213</td>
40048 <td>306</td>
40049 <td>J721E_DEV_R5FSS1_CORE1</td>
40050 <td>intr</td>
40051 <td>242</td>
40052 </tr>
40053 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40054 <td>213</td>
40055 <td>307</td>
40056 <td>J721E_DEV_R5FSS1_CORE1</td>
40057 <td>intr</td>
40058 <td>243</td>
40059 </tr>
40060 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40061 <td>213</td>
40062 <td>308</td>
40063 <td>J721E_DEV_R5FSS1_CORE1</td>
40064 <td>intr</td>
40065 <td>244</td>
40066 </tr>
40067 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40068 <td>213</td>
40069 <td>309</td>
40070 <td>J721E_DEV_R5FSS1_CORE1</td>
40071 <td>intr</td>
40072 <td>245</td>
40073 </tr>
40074 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40075 <td>213</td>
40076 <td>310</td>
40077 <td>J721E_DEV_R5FSS1_CORE1</td>
40078 <td>intr</td>
40079 <td>246</td>
40080 </tr>
40081 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40082 <td>213</td>
40083 <td>311</td>
40084 <td>J721E_DEV_R5FSS1_CORE1</td>
40085 <td>intr</td>
40086 <td>247</td>
40087 </tr>
40088 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40089 <td>213</td>
40090 <td>312</td>
40091 <td>J721E_DEV_R5FSS1_CORE1</td>
40092 <td>intr</td>
40093 <td>248</td>
40094 </tr>
40095 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40096 <td>213</td>
40097 <td>313</td>
40098 <td>J721E_DEV_R5FSS1_CORE1</td>
40099 <td>intr</td>
40100 <td>249</td>
40101 </tr>
40102 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40103 <td>213</td>
40104 <td>314</td>
40105 <td>J721E_DEV_R5FSS1_CORE1</td>
40106 <td>intr</td>
40107 <td>250</td>
40108 </tr>
40109 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40110 <td>213</td>
40111 <td>315</td>
40112 <td>J721E_DEV_R5FSS1_CORE1</td>
40113 <td>intr</td>
40114 <td>251</td>
40115 </tr>
40116 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40117 <td>213</td>
40118 <td>316</td>
40119 <td>J721E_DEV_R5FSS1_CORE1</td>
40120 <td>intr</td>
40121 <td>252</td>
40122 </tr>
40123 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40124 <td>213</td>
40125 <td>317</td>
40126 <td>J721E_DEV_R5FSS1_CORE1</td>
40127 <td>intr</td>
40128 <td>253</td>
40129 </tr>
40130 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40131 <td>213</td>
40132 <td>318</td>
40133 <td>J721E_DEV_R5FSS1_CORE1</td>
40134 <td>intr</td>
40135 <td>254</td>
40136 </tr>
40137 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40138 <td>213</td>
40139 <td>319</td>
40140 <td>J721E_DEV_R5FSS1_CORE1</td>
40141 <td>intr</td>
40142 <td>255</td>
40143 </tr>
40144 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40145 <td>213</td>
40146 <td>320</td>
40147 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40148 <td>in</td>
40149 <td>358</td>
40150 </tr>
40151 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40152 <td>213</td>
40153 <td>321</td>
40154 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40155 <td>in</td>
40156 <td>359</td>
40157 </tr>
40158 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40159 <td>213</td>
40160 <td>322</td>
40161 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40162 <td>in</td>
40163 <td>360</td>
40164 </tr>
40165 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40166 <td>213</td>
40167 <td>323</td>
40168 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40169 <td>in</td>
40170 <td>361</td>
40171 </tr>
40172 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40173 <td>213</td>
40174 <td>324</td>
40175 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40176 <td>in</td>
40177 <td>362</td>
40178 </tr>
40179 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40180 <td>213</td>
40181 <td>325</td>
40182 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40183 <td>in</td>
40184 <td>363</td>
40185 </tr>
40186 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40187 <td>213</td>
40188 <td>326</td>
40189 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40190 <td>in</td>
40191 <td>364</td>
40192 </tr>
40193 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40194 <td>213</td>
40195 <td>327</td>
40196 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40197 <td>in</td>
40198 <td>365</td>
40199 </tr>
40200 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40201 <td>213</td>
40202 <td>328</td>
40203 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40204 <td>in</td>
40205 <td>366</td>
40206 </tr>
40207 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40208 <td>213</td>
40209 <td>329</td>
40210 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40211 <td>in</td>
40212 <td>367</td>
40213 </tr>
40214 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40215 <td>213</td>
40216 <td>330</td>
40217 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40218 <td>in</td>
40219 <td>368</td>
40220 </tr>
40221 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40222 <td>213</td>
40223 <td>331</td>
40224 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40225 <td>in</td>
40226 <td>369</td>
40227 </tr>
40228 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40229 <td>213</td>
40230 <td>332</td>
40231 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40232 <td>in</td>
40233 <td>370</td>
40234 </tr>
40235 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40236 <td>213</td>
40237 <td>333</td>
40238 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40239 <td>in</td>
40240 <td>371</td>
40241 </tr>
40242 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40243 <td>213</td>
40244 <td>334</td>
40245 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40246 <td>in</td>
40247 <td>372</td>
40248 </tr>
40249 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40250 <td>213</td>
40251 <td>335</td>
40252 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40253 <td>in</td>
40254 <td>373</td>
40255 </tr>
40256 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40257 <td>213</td>
40258 <td>336</td>
40259 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40260 <td>in</td>
40261 <td>374</td>
40262 </tr>
40263 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40264 <td>213</td>
40265 <td>337</td>
40266 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40267 <td>in</td>
40268 <td>375</td>
40269 </tr>
40270 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40271 <td>213</td>
40272 <td>338</td>
40273 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40274 <td>in</td>
40275 <td>376</td>
40276 </tr>
40277 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40278 <td>213</td>
40279 <td>339</td>
40280 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40281 <td>in</td>
40282 <td>377</td>
40283 </tr>
40284 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40285 <td>213</td>
40286 <td>340</td>
40287 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40288 <td>in</td>
40289 <td>378</td>
40290 </tr>
40291 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40292 <td>213</td>
40293 <td>341</td>
40294 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40295 <td>in</td>
40296 <td>379</td>
40297 </tr>
40298 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40299 <td>213</td>
40300 <td>342</td>
40301 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40302 <td>in</td>
40303 <td>380</td>
40304 </tr>
40305 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40306 <td>213</td>
40307 <td>343</td>
40308 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40309 <td>in</td>
40310 <td>381</td>
40311 </tr>
40312 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
40313 (<strong>Reserved by System Firmware</strong>)</td>
40314 <td>213</td>
40315 <td>344</td>
40316 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40317 <td>in</td>
40318 <td>97</td>
40319 </tr>
40320 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
40321 (<strong>Reserved by System Firmware</strong>)</td>
40322 <td>213</td>
40323 <td>345</td>
40324 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40325 <td>in</td>
40326 <td>98</td>
40327 </tr>
40328 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
40329 (<strong>Reserved by System Firmware</strong>)</td>
40330 <td>213</td>
40331 <td>346</td>
40332 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40333 <td>in</td>
40334 <td>99</td>
40335 </tr>
40336 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
40337 (<strong>Reserved by System Firmware</strong>)</td>
40338 <td>213</td>
40339 <td>347</td>
40340 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40341 <td>in</td>
40342 <td>100</td>
40343 </tr>
40344 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40345 <td>213</td>
40346 <td>348</td>
40347 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40348 <td>in</td>
40349 <td>101</td>
40350 </tr>
40351 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40352 <td>213</td>
40353 <td>349</td>
40354 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40355 <td>in</td>
40356 <td>102</td>
40357 </tr>
40358 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40359 <td>213</td>
40360 <td>350</td>
40361 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40362 <td>in</td>
40363 <td>103</td>
40364 </tr>
40365 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40366 <td>213</td>
40367 <td>351</td>
40368 <td>J721E_DEV_C66SS0_INTROUTER0</td>
40369 <td>in</td>
40370 <td>104</td>
40371 </tr>
40372 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40373 <td>213</td>
40374 <td>352</td>
40375 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40376 <td>in</td>
40377 <td>358</td>
40378 </tr>
40379 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40380 <td>213</td>
40381 <td>353</td>
40382 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40383 <td>in</td>
40384 <td>359</td>
40385 </tr>
40386 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40387 <td>213</td>
40388 <td>354</td>
40389 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40390 <td>in</td>
40391 <td>360</td>
40392 </tr>
40393 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40394 <td>213</td>
40395 <td>355</td>
40396 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40397 <td>in</td>
40398 <td>361</td>
40399 </tr>
40400 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40401 <td>213</td>
40402 <td>356</td>
40403 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40404 <td>in</td>
40405 <td>362</td>
40406 </tr>
40407 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40408 <td>213</td>
40409 <td>357</td>
40410 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40411 <td>in</td>
40412 <td>363</td>
40413 </tr>
40414 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40415 <td>213</td>
40416 <td>358</td>
40417 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40418 <td>in</td>
40419 <td>364</td>
40420 </tr>
40421 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40422 <td>213</td>
40423 <td>359</td>
40424 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40425 <td>in</td>
40426 <td>365</td>
40427 </tr>
40428 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40429 <td>213</td>
40430 <td>360</td>
40431 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40432 <td>in</td>
40433 <td>366</td>
40434 </tr>
40435 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40436 <td>213</td>
40437 <td>361</td>
40438 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40439 <td>in</td>
40440 <td>367</td>
40441 </tr>
40442 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40443 <td>213</td>
40444 <td>362</td>
40445 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40446 <td>in</td>
40447 <td>368</td>
40448 </tr>
40449 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40450 <td>213</td>
40451 <td>363</td>
40452 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40453 <td>in</td>
40454 <td>369</td>
40455 </tr>
40456 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40457 <td>213</td>
40458 <td>364</td>
40459 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40460 <td>in</td>
40461 <td>370</td>
40462 </tr>
40463 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40464 <td>213</td>
40465 <td>365</td>
40466 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40467 <td>in</td>
40468 <td>371</td>
40469 </tr>
40470 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40471 <td>213</td>
40472 <td>366</td>
40473 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40474 <td>in</td>
40475 <td>372</td>
40476 </tr>
40477 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40478 <td>213</td>
40479 <td>367</td>
40480 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40481 <td>in</td>
40482 <td>373</td>
40483 </tr>
40484 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40485 <td>213</td>
40486 <td>368</td>
40487 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40488 <td>in</td>
40489 <td>374</td>
40490 </tr>
40491 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40492 <td>213</td>
40493 <td>369</td>
40494 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40495 <td>in</td>
40496 <td>375</td>
40497 </tr>
40498 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40499 <td>213</td>
40500 <td>370</td>
40501 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40502 <td>in</td>
40503 <td>376</td>
40504 </tr>
40505 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40506 <td>213</td>
40507 <td>371</td>
40508 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40509 <td>in</td>
40510 <td>377</td>
40511 </tr>
40512 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40513 <td>213</td>
40514 <td>372</td>
40515 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40516 <td>in</td>
40517 <td>378</td>
40518 </tr>
40519 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40520 <td>213</td>
40521 <td>373</td>
40522 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40523 <td>in</td>
40524 <td>379</td>
40525 </tr>
40526 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40527 <td>213</td>
40528 <td>374</td>
40529 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40530 <td>in</td>
40531 <td>380</td>
40532 </tr>
40533 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40534 <td>213</td>
40535 <td>375</td>
40536 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40537 <td>in</td>
40538 <td>381</td>
40539 </tr>
40540 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
40541 (<strong>Reserved by System Firmware</strong>)</td>
40542 <td>213</td>
40543 <td>376</td>
40544 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40545 <td>in</td>
40546 <td>97</td>
40547 </tr>
40548 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
40549 (<strong>Reserved by System Firmware</strong>)</td>
40550 <td>213</td>
40551 <td>377</td>
40552 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40553 <td>in</td>
40554 <td>98</td>
40555 </tr>
40556 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
40557 (<strong>Reserved by System Firmware</strong>)</td>
40558 <td>213</td>
40559 <td>378</td>
40560 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40561 <td>in</td>
40562 <td>99</td>
40563 </tr>
40564 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0
40565 (<strong>Reserved by System Firmware</strong>)</td>
40566 <td>213</td>
40567 <td>379</td>
40568 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40569 <td>in</td>
40570 <td>100</td>
40571 </tr>
40572 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40573 <td>213</td>
40574 <td>380</td>
40575 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40576 <td>in</td>
40577 <td>101</td>
40578 </tr>
40579 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40580 <td>213</td>
40581 <td>381</td>
40582 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40583 <td>in</td>
40584 <td>102</td>
40585 </tr>
40586 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40587 <td>213</td>
40588 <td>382</td>
40589 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40590 <td>in</td>
40591 <td>103</td>
40592 </tr>
40593 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40594 <td>213</td>
40595 <td>383</td>
40596 <td>J721E_DEV_C66SS1_INTROUTER0</td>
40597 <td>in</td>
40598 <td>104</td>
40599 </tr>
40600 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40601 <td>213</td>
40602 <td>384</td>
40603 <td>J721E_DEV_PRU_ICSSG0</td>
40604 <td>pr1_slv_intr</td>
40605 <td>46</td>
40606 </tr>
40607 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40608 <td>213</td>
40609 <td>385</td>
40610 <td>J721E_DEV_PRU_ICSSG0</td>
40611 <td>pr1_slv_intr</td>
40612 <td>47</td>
40613 </tr>
40614 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40615 <td>213</td>
40616 <td>386</td>
40617 <td>J721E_DEV_PRU_ICSSG0</td>
40618 <td>pr1_slv_intr</td>
40619 <td>48</td>
40620 </tr>
40621 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40622 <td>213</td>
40623 <td>387</td>
40624 <td>J721E_DEV_PRU_ICSSG0</td>
40625 <td>pr1_slv_intr</td>
40626 <td>49</td>
40627 </tr>
40628 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40629 <td>213</td>
40630 <td>388</td>
40631 <td>J721E_DEV_PRU_ICSSG0</td>
40632 <td>pr1_slv_intr</td>
40633 <td>50</td>
40634 </tr>
40635 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40636 <td>213</td>
40637 <td>389</td>
40638 <td>J721E_DEV_PRU_ICSSG0</td>
40639 <td>pr1_slv_intr</td>
40640 <td>51</td>
40641 </tr>
40642 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40643 <td>213</td>
40644 <td>390</td>
40645 <td>J721E_DEV_PRU_ICSSG0</td>
40646 <td>pr1_slv_intr</td>
40647 <td>52</td>
40648 </tr>
40649 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40650 <td>213</td>
40651 <td>391</td>
40652 <td>J721E_DEV_PRU_ICSSG0</td>
40653 <td>pr1_slv_intr</td>
40654 <td>53</td>
40655 </tr>
40656 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40657 <td>213</td>
40658 <td>392</td>
40659 <td>J721E_DEV_PRU_ICSSG1</td>
40660 <td>pr1_slv_intr</td>
40661 <td>46</td>
40662 </tr>
40663 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40664 <td>213</td>
40665 <td>393</td>
40666 <td>J721E_DEV_PRU_ICSSG1</td>
40667 <td>pr1_slv_intr</td>
40668 <td>47</td>
40669 </tr>
40670 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40671 <td>213</td>
40672 <td>394</td>
40673 <td>J721E_DEV_PRU_ICSSG1</td>
40674 <td>pr1_slv_intr</td>
40675 <td>48</td>
40676 </tr>
40677 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40678 <td>213</td>
40679 <td>395</td>
40680 <td>J721E_DEV_PRU_ICSSG1</td>
40681 <td>pr1_slv_intr</td>
40682 <td>49</td>
40683 </tr>
40684 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40685 <td>213</td>
40686 <td>396</td>
40687 <td>J721E_DEV_PRU_ICSSG1</td>
40688 <td>pr1_slv_intr</td>
40689 <td>50</td>
40690 </tr>
40691 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40692 <td>213</td>
40693 <td>397</td>
40694 <td>J721E_DEV_PRU_ICSSG1</td>
40695 <td>pr1_slv_intr</td>
40696 <td>51</td>
40697 </tr>
40698 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40699 <td>213</td>
40700 <td>398</td>
40701 <td>J721E_DEV_PRU_ICSSG1</td>
40702 <td>pr1_slv_intr</td>
40703 <td>52</td>
40704 </tr>
40705 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40706 <td>213</td>
40707 <td>399</td>
40708 <td>J721E_DEV_PRU_ICSSG1</td>
40709 <td>pr1_slv_intr</td>
40710 <td>53</td>
40711 </tr>
40712 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40713 <td>213</td>
40714 <td>400</td>
40715 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
40716 <td>intr</td>
40717 <td>376</td>
40718 </tr>
40719 <tr class="row-odd"><td>&#160;</td>
40720 <td>&#160;</td>
40721 <td>&#160;</td>
40722 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
40723 <td>intr</td>
40724 <td>376</td>
40725 </tr>
40726 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40727 <td>213</td>
40728 <td>401</td>
40729 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
40730 <td>intr</td>
40731 <td>377</td>
40732 </tr>
40733 <tr class="row-odd"><td>&#160;</td>
40734 <td>&#160;</td>
40735 <td>&#160;</td>
40736 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
40737 <td>intr</td>
40738 <td>377</td>
40739 </tr>
40740 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40741 <td>213</td>
40742 <td>402</td>
40743 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
40744 <td>intr</td>
40745 <td>378</td>
40746 </tr>
40747 <tr class="row-odd"><td>&#160;</td>
40748 <td>&#160;</td>
40749 <td>&#160;</td>
40750 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
40751 <td>intr</td>
40752 <td>378</td>
40753 </tr>
40754 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40755 <td>213</td>
40756 <td>403</td>
40757 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
40758 <td>intr</td>
40759 <td>379</td>
40760 </tr>
40761 <tr class="row-odd"><td>&#160;</td>
40762 <td>&#160;</td>
40763 <td>&#160;</td>
40764 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
40765 <td>intr</td>
40766 <td>379</td>
40767 </tr>
40768 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40769 <td>213</td>
40770 <td>404</td>
40771 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
40772 <td>intr</td>
40773 <td>380</td>
40774 </tr>
40775 <tr class="row-odd"><td>&#160;</td>
40776 <td>&#160;</td>
40777 <td>&#160;</td>
40778 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
40779 <td>intr</td>
40780 <td>380</td>
40781 </tr>
40782 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40783 <td>213</td>
40784 <td>405</td>
40785 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
40786 <td>intr</td>
40787 <td>381</td>
40788 </tr>
40789 <tr class="row-odd"><td>&#160;</td>
40790 <td>&#160;</td>
40791 <td>&#160;</td>
40792 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
40793 <td>intr</td>
40794 <td>381</td>
40795 </tr>
40796 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40797 <td>213</td>
40798 <td>406</td>
40799 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
40800 <td>intr</td>
40801 <td>382</td>
40802 </tr>
40803 <tr class="row-odd"><td>&#160;</td>
40804 <td>&#160;</td>
40805 <td>&#160;</td>
40806 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
40807 <td>intr</td>
40808 <td>382</td>
40809 </tr>
40810 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40811 <td>213</td>
40812 <td>407</td>
40813 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
40814 <td>intr</td>
40815 <td>383</td>
40816 </tr>
40817 <tr class="row-odd"><td>&#160;</td>
40818 <td>&#160;</td>
40819 <td>&#160;</td>
40820 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
40821 <td>intr</td>
40822 <td>383</td>
40823 </tr>
40824 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40825 <td>213</td>
40826 <td>408</td>
40827 <td>Not Connected</td>
40828 <td>&#160;</td>
40829 <td>&#160;</td>
40830 </tr>
40831 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40832 <td>213</td>
40833 <td>409</td>
40834 <td>Not Connected</td>
40835 <td>&#160;</td>
40836 <td>&#160;</td>
40837 </tr>
40838 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40839 <td>213</td>
40840 <td>410</td>
40841 <td>Not Connected</td>
40842 <td>&#160;</td>
40843 <td>&#160;</td>
40844 </tr>
40845 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40846 <td>213</td>
40847 <td>411</td>
40848 <td>Not Connected</td>
40849 <td>&#160;</td>
40850 <td>&#160;</td>
40851 </tr>
40852 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40853 <td>213</td>
40854 <td>412</td>
40855 <td>Not Connected</td>
40856 <td>&#160;</td>
40857 <td>&#160;</td>
40858 </tr>
40859 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40860 <td>213</td>
40861 <td>413</td>
40862 <td>Not Connected</td>
40863 <td>&#160;</td>
40864 <td>&#160;</td>
40865 </tr>
40866 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40867 <td>213</td>
40868 <td>414</td>
40869 <td>Not Connected</td>
40870 <td>&#160;</td>
40871 <td>&#160;</td>
40872 </tr>
40873 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40874 <td>213</td>
40875 <td>415</td>
40876 <td>Not Connected</td>
40877 <td>&#160;</td>
40878 <td>&#160;</td>
40879 </tr>
40880 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40881 <td>213</td>
40882 <td>416</td>
40883 <td>Not Connected</td>
40884 <td>&#160;</td>
40885 <td>&#160;</td>
40886 </tr>
40887 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40888 <td>213</td>
40889 <td>417</td>
40890 <td>Not Connected</td>
40891 <td>&#160;</td>
40892 <td>&#160;</td>
40893 </tr>
40894 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40895 <td>213</td>
40896 <td>418</td>
40897 <td>Not Connected</td>
40898 <td>&#160;</td>
40899 <td>&#160;</td>
40900 </tr>
40901 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40902 <td>213</td>
40903 <td>419</td>
40904 <td>Not Connected</td>
40905 <td>&#160;</td>
40906 <td>&#160;</td>
40907 </tr>
40908 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40909 <td>213</td>
40910 <td>420</td>
40911 <td>Not Connected</td>
40912 <td>&#160;</td>
40913 <td>&#160;</td>
40914 </tr>
40915 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40916 <td>213</td>
40917 <td>421</td>
40918 <td>Not Connected</td>
40919 <td>&#160;</td>
40920 <td>&#160;</td>
40921 </tr>
40922 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40923 <td>213</td>
40924 <td>422</td>
40925 <td>Not Connected</td>
40926 <td>&#160;</td>
40927 <td>&#160;</td>
40928 </tr>
40929 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40930 <td>213</td>
40931 <td>423</td>
40932 <td>Not Connected</td>
40933 <td>&#160;</td>
40934 <td>&#160;</td>
40935 </tr>
40936 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40937 <td>213</td>
40938 <td>424</td>
40939 <td>Not Connected</td>
40940 <td>&#160;</td>
40941 <td>&#160;</td>
40942 </tr>
40943 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40944 <td>213</td>
40945 <td>425</td>
40946 <td>Not Connected</td>
40947 <td>&#160;</td>
40948 <td>&#160;</td>
40949 </tr>
40950 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40951 <td>213</td>
40952 <td>426</td>
40953 <td>Not Connected</td>
40954 <td>&#160;</td>
40955 <td>&#160;</td>
40956 </tr>
40957 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40958 <td>213</td>
40959 <td>427</td>
40960 <td>Not Connected</td>
40961 <td>&#160;</td>
40962 <td>&#160;</td>
40963 </tr>
40964 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40965 <td>213</td>
40966 <td>428</td>
40967 <td>Not Connected</td>
40968 <td>&#160;</td>
40969 <td>&#160;</td>
40970 </tr>
40971 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40972 <td>213</td>
40973 <td>429</td>
40974 <td>Not Connected</td>
40975 <td>&#160;</td>
40976 <td>&#160;</td>
40977 </tr>
40978 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40979 <td>213</td>
40980 <td>430</td>
40981 <td>Not Connected</td>
40982 <td>&#160;</td>
40983 <td>&#160;</td>
40984 </tr>
40985 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40986 <td>213</td>
40987 <td>431</td>
40988 <td>Not Connected</td>
40989 <td>&#160;</td>
40990 <td>&#160;</td>
40991 </tr>
40992 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
40993 <td>213</td>
40994 <td>432</td>
40995 <td>Not Connected</td>
40996 <td>&#160;</td>
40997 <td>&#160;</td>
40998 </tr>
40999 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41000 <td>213</td>
41001 <td>433</td>
41002 <td>Not Connected</td>
41003 <td>&#160;</td>
41004 <td>&#160;</td>
41005 </tr>
41006 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41007 <td>213</td>
41008 <td>434</td>
41009 <td>Not Connected</td>
41010 <td>&#160;</td>
41011 <td>&#160;</td>
41012 </tr>
41013 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41014 <td>213</td>
41015 <td>435</td>
41016 <td>Not Connected</td>
41017 <td>&#160;</td>
41018 <td>&#160;</td>
41019 </tr>
41020 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41021 <td>213</td>
41022 <td>436</td>
41023 <td>Not Connected</td>
41024 <td>&#160;</td>
41025 <td>&#160;</td>
41026 </tr>
41027 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41028 <td>213</td>
41029 <td>437</td>
41030 <td>Not Connected</td>
41031 <td>&#160;</td>
41032 <td>&#160;</td>
41033 </tr>
41034 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41035 <td>213</td>
41036 <td>438</td>
41037 <td>Not Connected</td>
41038 <td>&#160;</td>
41039 <td>&#160;</td>
41040 </tr>
41041 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41042 <td>213</td>
41043 <td>439</td>
41044 <td>Not Connected</td>
41045 <td>&#160;</td>
41046 <td>&#160;</td>
41047 </tr>
41048 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41049 <td>213</td>
41050 <td>440</td>
41051 <td>Not Connected</td>
41052 <td>&#160;</td>
41053 <td>&#160;</td>
41054 </tr>
41055 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41056 <td>213</td>
41057 <td>441</td>
41058 <td>Not Connected</td>
41059 <td>&#160;</td>
41060 <td>&#160;</td>
41061 </tr>
41062 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41063 <td>213</td>
41064 <td>442</td>
41065 <td>Not Connected</td>
41066 <td>&#160;</td>
41067 <td>&#160;</td>
41068 </tr>
41069 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41070 <td>213</td>
41071 <td>443</td>
41072 <td>Not Connected</td>
41073 <td>&#160;</td>
41074 <td>&#160;</td>
41075 </tr>
41076 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41077 <td>213</td>
41078 <td>444</td>
41079 <td>Not Connected</td>
41080 <td>&#160;</td>
41081 <td>&#160;</td>
41082 </tr>
41083 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41084 <td>213</td>
41085 <td>445</td>
41086 <td>Not Connected</td>
41087 <td>&#160;</td>
41088 <td>&#160;</td>
41089 </tr>
41090 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41091 <td>213</td>
41092 <td>446</td>
41093 <td>Not Connected</td>
41094 <td>&#160;</td>
41095 <td>&#160;</td>
41096 </tr>
41097 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41098 <td>213</td>
41099 <td>447</td>
41100 <td>Not Connected</td>
41101 <td>&#160;</td>
41102 <td>&#160;</td>
41103 </tr>
41104 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41105 <td>213</td>
41106 <td>448</td>
41107 <td>Not Connected</td>
41108 <td>&#160;</td>
41109 <td>&#160;</td>
41110 </tr>
41111 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41112 <td>213</td>
41113 <td>449</td>
41114 <td>Not Connected</td>
41115 <td>&#160;</td>
41116 <td>&#160;</td>
41117 </tr>
41118 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41119 <td>213</td>
41120 <td>450</td>
41121 <td>Not Connected</td>
41122 <td>&#160;</td>
41123 <td>&#160;</td>
41124 </tr>
41125 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41126 <td>213</td>
41127 <td>451</td>
41128 <td>Not Connected</td>
41129 <td>&#160;</td>
41130 <td>&#160;</td>
41131 </tr>
41132 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41133 <td>213</td>
41134 <td>452</td>
41135 <td>Not Connected</td>
41136 <td>&#160;</td>
41137 <td>&#160;</td>
41138 </tr>
41139 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41140 <td>213</td>
41141 <td>453</td>
41142 <td>Not Connected</td>
41143 <td>&#160;</td>
41144 <td>&#160;</td>
41145 </tr>
41146 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41147 <td>213</td>
41148 <td>454</td>
41149 <td>Not Connected</td>
41150 <td>&#160;</td>
41151 <td>&#160;</td>
41152 </tr>
41153 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41154 <td>213</td>
41155 <td>455</td>
41156 <td>Not Connected</td>
41157 <td>&#160;</td>
41158 <td>&#160;</td>
41159 </tr>
41160 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41161 <td>213</td>
41162 <td>456</td>
41163 <td>Not Connected</td>
41164 <td>&#160;</td>
41165 <td>&#160;</td>
41166 </tr>
41167 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41168 <td>213</td>
41169 <td>457</td>
41170 <td>Not Connected</td>
41171 <td>&#160;</td>
41172 <td>&#160;</td>
41173 </tr>
41174 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41175 <td>213</td>
41176 <td>458</td>
41177 <td>Not Connected</td>
41178 <td>&#160;</td>
41179 <td>&#160;</td>
41180 </tr>
41181 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41182 <td>213</td>
41183 <td>459</td>
41184 <td>Not Connected</td>
41185 <td>&#160;</td>
41186 <td>&#160;</td>
41187 </tr>
41188 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41189 <td>213</td>
41190 <td>460</td>
41191 <td>Not Connected</td>
41192 <td>&#160;</td>
41193 <td>&#160;</td>
41194 </tr>
41195 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41196 <td>213</td>
41197 <td>461</td>
41198 <td>Not Connected</td>
41199 <td>&#160;</td>
41200 <td>&#160;</td>
41201 </tr>
41202 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41203 <td>213</td>
41204 <td>462</td>
41205 <td>Not Connected</td>
41206 <td>&#160;</td>
41207 <td>&#160;</td>
41208 </tr>
41209 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41210 <td>213</td>
41211 <td>463</td>
41212 <td>Not Connected</td>
41213 <td>&#160;</td>
41214 <td>&#160;</td>
41215 </tr>
41216 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41217 <td>213</td>
41218 <td>464</td>
41219 <td>Not Connected</td>
41220 <td>&#160;</td>
41221 <td>&#160;</td>
41222 </tr>
41223 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41224 <td>213</td>
41225 <td>465</td>
41226 <td>Not Connected</td>
41227 <td>&#160;</td>
41228 <td>&#160;</td>
41229 </tr>
41230 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41231 <td>213</td>
41232 <td>466</td>
41233 <td>Not Connected</td>
41234 <td>&#160;</td>
41235 <td>&#160;</td>
41236 </tr>
41237 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41238 <td>213</td>
41239 <td>467</td>
41240 <td>Not Connected</td>
41241 <td>&#160;</td>
41242 <td>&#160;</td>
41243 </tr>
41244 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41245 <td>213</td>
41246 <td>468</td>
41247 <td>Not Connected</td>
41248 <td>&#160;</td>
41249 <td>&#160;</td>
41250 </tr>
41251 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41252 <td>213</td>
41253 <td>469</td>
41254 <td>Not Connected</td>
41255 <td>&#160;</td>
41256 <td>&#160;</td>
41257 </tr>
41258 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41259 <td>213</td>
41260 <td>470</td>
41261 <td>Not Connected</td>
41262 <td>&#160;</td>
41263 <td>&#160;</td>
41264 </tr>
41265 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41266 <td>213</td>
41267 <td>471</td>
41268 <td>Not Connected</td>
41269 <td>&#160;</td>
41270 <td>&#160;</td>
41271 </tr>
41272 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41273 <td>213</td>
41274 <td>472</td>
41275 <td>Not Connected</td>
41276 <td>&#160;</td>
41277 <td>&#160;</td>
41278 </tr>
41279 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41280 <td>213</td>
41281 <td>473</td>
41282 <td>Not Connected</td>
41283 <td>&#160;</td>
41284 <td>&#160;</td>
41285 </tr>
41286 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41287 <td>213</td>
41288 <td>474</td>
41289 <td>Not Connected</td>
41290 <td>&#160;</td>
41291 <td>&#160;</td>
41292 </tr>
41293 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41294 <td>213</td>
41295 <td>475</td>
41296 <td>Not Connected</td>
41297 <td>&#160;</td>
41298 <td>&#160;</td>
41299 </tr>
41300 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41301 <td>213</td>
41302 <td>476</td>
41303 <td>Not Connected</td>
41304 <td>&#160;</td>
41305 <td>&#160;</td>
41306 </tr>
41307 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41308 <td>213</td>
41309 <td>477</td>
41310 <td>Not Connected</td>
41311 <td>&#160;</td>
41312 <td>&#160;</td>
41313 </tr>
41314 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41315 <td>213</td>
41316 <td>478</td>
41317 <td>Not Connected</td>
41318 <td>&#160;</td>
41319 <td>&#160;</td>
41320 </tr>
41321 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41322 <td>213</td>
41323 <td>479</td>
41324 <td>Not Connected</td>
41325 <td>&#160;</td>
41326 <td>&#160;</td>
41327 </tr>
41328 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41329 <td>213</td>
41330 <td>480</td>
41331 <td>Not Connected</td>
41332 <td>&#160;</td>
41333 <td>&#160;</td>
41334 </tr>
41335 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41336 <td>213</td>
41337 <td>481</td>
41338 <td>Not Connected</td>
41339 <td>&#160;</td>
41340 <td>&#160;</td>
41341 </tr>
41342 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41343 <td>213</td>
41344 <td>482</td>
41345 <td>Not Connected</td>
41346 <td>&#160;</td>
41347 <td>&#160;</td>
41348 </tr>
41349 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41350 <td>213</td>
41351 <td>483</td>
41352 <td>Not Connected</td>
41353 <td>&#160;</td>
41354 <td>&#160;</td>
41355 </tr>
41356 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41357 <td>213</td>
41358 <td>484</td>
41359 <td>Not Connected</td>
41360 <td>&#160;</td>
41361 <td>&#160;</td>
41362 </tr>
41363 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41364 <td>213</td>
41365 <td>485</td>
41366 <td>Not Connected</td>
41367 <td>&#160;</td>
41368 <td>&#160;</td>
41369 </tr>
41370 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41371 <td>213</td>
41372 <td>486</td>
41373 <td>Not Connected</td>
41374 <td>&#160;</td>
41375 <td>&#160;</td>
41376 </tr>
41377 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41378 <td>213</td>
41379 <td>487</td>
41380 <td>Not Connected</td>
41381 <td>&#160;</td>
41382 <td>&#160;</td>
41383 </tr>
41384 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41385 <td>213</td>
41386 <td>488</td>
41387 <td>Not Connected</td>
41388 <td>&#160;</td>
41389 <td>&#160;</td>
41390 </tr>
41391 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41392 <td>213</td>
41393 <td>489</td>
41394 <td>Not Connected</td>
41395 <td>&#160;</td>
41396 <td>&#160;</td>
41397 </tr>
41398 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41399 <td>213</td>
41400 <td>490</td>
41401 <td>Not Connected</td>
41402 <td>&#160;</td>
41403 <td>&#160;</td>
41404 </tr>
41405 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41406 <td>213</td>
41407 <td>491</td>
41408 <td>Not Connected</td>
41409 <td>&#160;</td>
41410 <td>&#160;</td>
41411 </tr>
41412 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41413 <td>213</td>
41414 <td>492</td>
41415 <td>Not Connected</td>
41416 <td>&#160;</td>
41417 <td>&#160;</td>
41418 </tr>
41419 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41420 <td>213</td>
41421 <td>493</td>
41422 <td>Not Connected</td>
41423 <td>&#160;</td>
41424 <td>&#160;</td>
41425 </tr>
41426 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41427 <td>213</td>
41428 <td>494</td>
41429 <td>Not Connected</td>
41430 <td>&#160;</td>
41431 <td>&#160;</td>
41432 </tr>
41433 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41434 <td>213</td>
41435 <td>495</td>
41436 <td>Not Connected</td>
41437 <td>&#160;</td>
41438 <td>&#160;</td>
41439 </tr>
41440 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41441 <td>213</td>
41442 <td>496</td>
41443 <td>Not Connected</td>
41444 <td>&#160;</td>
41445 <td>&#160;</td>
41446 </tr>
41447 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41448 <td>213</td>
41449 <td>497</td>
41450 <td>Not Connected</td>
41451 <td>&#160;</td>
41452 <td>&#160;</td>
41453 </tr>
41454 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41455 <td>213</td>
41456 <td>498</td>
41457 <td>Not Connected</td>
41458 <td>&#160;</td>
41459 <td>&#160;</td>
41460 </tr>
41461 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41462 <td>213</td>
41463 <td>499</td>
41464 <td>Not Connected</td>
41465 <td>&#160;</td>
41466 <td>&#160;</td>
41467 </tr>
41468 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41469 <td>213</td>
41470 <td>500</td>
41471 <td>Not Connected</td>
41472 <td>&#160;</td>
41473 <td>&#160;</td>
41474 </tr>
41475 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41476 <td>213</td>
41477 <td>501</td>
41478 <td>Not Connected</td>
41479 <td>&#160;</td>
41480 <td>&#160;</td>
41481 </tr>
41482 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41483 <td>213</td>
41484 <td>502</td>
41485 <td>Not Connected</td>
41486 <td>&#160;</td>
41487 <td>&#160;</td>
41488 </tr>
41489 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41490 <td>213</td>
41491 <td>503</td>
41492 <td>Not Connected</td>
41493 <td>&#160;</td>
41494 <td>&#160;</td>
41495 </tr>
41496 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41497 <td>213</td>
41498 <td>504</td>
41499 <td>Not Connected</td>
41500 <td>&#160;</td>
41501 <td>&#160;</td>
41502 </tr>
41503 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41504 <td>213</td>
41505 <td>505</td>
41506 <td>Not Connected</td>
41507 <td>&#160;</td>
41508 <td>&#160;</td>
41509 </tr>
41510 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41511 <td>213</td>
41512 <td>506</td>
41513 <td>Not Connected</td>
41514 <td>&#160;</td>
41515 <td>&#160;</td>
41516 </tr>
41517 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41518 <td>213</td>
41519 <td>507</td>
41520 <td>Not Connected</td>
41521 <td>&#160;</td>
41522 <td>&#160;</td>
41523 </tr>
41524 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41525 <td>213</td>
41526 <td>508</td>
41527 <td>Not Connected</td>
41528 <td>&#160;</td>
41529 <td>&#160;</td>
41530 </tr>
41531 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41532 <td>213</td>
41533 <td>509</td>
41534 <td>Not Connected</td>
41535 <td>&#160;</td>
41536 <td>&#160;</td>
41537 </tr>
41538 <tr class="row-even"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41539 <td>213</td>
41540 <td>510</td>
41541 <td>Not Connected</td>
41542 <td>&#160;</td>
41543 <td>&#160;</td>
41544 </tr>
41545 <tr class="row-odd"><td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
41546 <td>213</td>
41547 <td>511</td>
41548 <td>Not Connected</td>
41549 <td>&#160;</td>
41550 <td>&#160;</td>
41551 </tr>
41552 </tbody>
41553 </table>
41554 </div>
41555 <div class="section" id="mcu-navss0-intr-0-interrupt-router-input-sources">
41556 <span id="pub-soc-j721e-mcu-navss0-intr-0-input-src-list"></span><h2>MCU_NAVSS0_INTR_0 Interrupt Router Input Sources<a class="headerlink" href="#mcu-navss0-intr-0-interrupt-router-input-sources" title="Permalink to this headline">¶</a></h2>
41557 <div class="admonition warning">
41558 <p class="first admonition-title">Warning</p>
41559 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
41560 host within the RM Board Configuration resource assignment array.  The RM
41561 Board Configuration is rejected if an overlap with a reserved resource is
41562 detected.</p>
41563 </div>
41564 <table border="1" class="docutils">
41565 <colgroup>
41566 <col width="25%" />
41567 <col width="11%" />
41568 <col width="13%" />
41569 <col width="26%" />
41570 <col width="14%" />
41571 <col width="11%" />
41572 </colgroup>
41573 <thead valign="bottom">
41574 <tr class="row-odd"><th class="head">IR Name</th>
41575 <th class="head">IR Device ID</th>
41576 <th class="head">IR Input Index</th>
41577 <th class="head">Source Name</th>
41578 <th class="head">Source Interface</th>
41579 <th class="head">Source Index</th>
41580 </tr>
41581 </thead>
41582 <tbody valign="top">
41583 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41584 (<strong>Reserved by System Firmware</strong>)</td>
41585 <td>237</td>
41586 <td>0</td>
41587 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41588 <td>intaggr_vintr_pend</td>
41589 <td>0</td>
41590 </tr>
41591 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41592 (<strong>Reserved by System Firmware</strong>)</td>
41593 <td>237</td>
41594 <td>1</td>
41595 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41596 <td>intaggr_vintr_pend</td>
41597 <td>1</td>
41598 </tr>
41599 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41600 (<strong>Reserved by System Firmware</strong>)</td>
41601 <td>237</td>
41602 <td>2</td>
41603 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41604 <td>intaggr_vintr_pend</td>
41605 <td>2</td>
41606 </tr>
41607 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41608 (<strong>Reserved by System Firmware</strong>)</td>
41609 <td>237</td>
41610 <td>3</td>
41611 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41612 <td>intaggr_vintr_pend</td>
41613 <td>3</td>
41614 </tr>
41615 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41616 (<strong>Reserved by System Firmware</strong>)</td>
41617 <td>237</td>
41618 <td>4</td>
41619 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41620 <td>intaggr_vintr_pend</td>
41621 <td>4</td>
41622 </tr>
41623 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41624 (<strong>Reserved by System Firmware</strong>)</td>
41625 <td>237</td>
41626 <td>5</td>
41627 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41628 <td>intaggr_vintr_pend</td>
41629 <td>5</td>
41630 </tr>
41631 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41632 (<strong>Reserved by System Firmware</strong>)</td>
41633 <td>237</td>
41634 <td>6</td>
41635 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41636 <td>intaggr_vintr_pend</td>
41637 <td>6</td>
41638 </tr>
41639 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41640 (<strong>Reserved by System Firmware</strong>)</td>
41641 <td>237</td>
41642 <td>7</td>
41643 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41644 <td>intaggr_vintr_pend</td>
41645 <td>7</td>
41646 </tr>
41647 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41648 (<strong>Reserved by System Firmware</strong>)</td>
41649 <td>237</td>
41650 <td>8</td>
41651 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41652 <td>intaggr_vintr_pend</td>
41653 <td>8</td>
41654 </tr>
41655 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41656 (<strong>Reserved by System Firmware</strong>)</td>
41657 <td>237</td>
41658 <td>9</td>
41659 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41660 <td>intaggr_vintr_pend</td>
41661 <td>9</td>
41662 </tr>
41663 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41664 (<strong>Reserved by System Firmware</strong>)</td>
41665 <td>237</td>
41666 <td>10</td>
41667 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41668 <td>intaggr_vintr_pend</td>
41669 <td>10</td>
41670 </tr>
41671 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41672 (<strong>Reserved by System Firmware</strong>)</td>
41673 <td>237</td>
41674 <td>11</td>
41675 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41676 <td>intaggr_vintr_pend</td>
41677 <td>11</td>
41678 </tr>
41679 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41680 (<strong>Reserved by System Firmware</strong>)</td>
41681 <td>237</td>
41682 <td>12</td>
41683 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41684 <td>intaggr_vintr_pend</td>
41685 <td>12</td>
41686 </tr>
41687 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41688 (<strong>Reserved by System Firmware</strong>)</td>
41689 <td>237</td>
41690 <td>13</td>
41691 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41692 <td>intaggr_vintr_pend</td>
41693 <td>13</td>
41694 </tr>
41695 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41696 (<strong>Reserved by System Firmware</strong>)</td>
41697 <td>237</td>
41698 <td>14</td>
41699 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41700 <td>intaggr_vintr_pend</td>
41701 <td>14</td>
41702 </tr>
41703 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
41704 (<strong>Reserved by System Firmware</strong>)</td>
41705 <td>237</td>
41706 <td>15</td>
41707 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41708 <td>intaggr_vintr_pend</td>
41709 <td>15</td>
41710 </tr>
41711 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41712 <td>237</td>
41713 <td>16</td>
41714 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41715 <td>intaggr_vintr_pend</td>
41716 <td>16</td>
41717 </tr>
41718 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41719 <td>237</td>
41720 <td>17</td>
41721 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41722 <td>intaggr_vintr_pend</td>
41723 <td>17</td>
41724 </tr>
41725 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41726 <td>237</td>
41727 <td>18</td>
41728 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41729 <td>intaggr_vintr_pend</td>
41730 <td>18</td>
41731 </tr>
41732 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41733 <td>237</td>
41734 <td>19</td>
41735 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41736 <td>intaggr_vintr_pend</td>
41737 <td>19</td>
41738 </tr>
41739 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41740 <td>237</td>
41741 <td>20</td>
41742 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41743 <td>intaggr_vintr_pend</td>
41744 <td>20</td>
41745 </tr>
41746 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41747 <td>237</td>
41748 <td>21</td>
41749 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41750 <td>intaggr_vintr_pend</td>
41751 <td>21</td>
41752 </tr>
41753 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41754 <td>237</td>
41755 <td>22</td>
41756 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41757 <td>intaggr_vintr_pend</td>
41758 <td>22</td>
41759 </tr>
41760 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41761 <td>237</td>
41762 <td>23</td>
41763 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41764 <td>intaggr_vintr_pend</td>
41765 <td>23</td>
41766 </tr>
41767 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41768 <td>237</td>
41769 <td>24</td>
41770 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41771 <td>intaggr_vintr_pend</td>
41772 <td>24</td>
41773 </tr>
41774 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41775 <td>237</td>
41776 <td>25</td>
41777 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41778 <td>intaggr_vintr_pend</td>
41779 <td>25</td>
41780 </tr>
41781 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41782 <td>237</td>
41783 <td>26</td>
41784 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41785 <td>intaggr_vintr_pend</td>
41786 <td>26</td>
41787 </tr>
41788 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41789 <td>237</td>
41790 <td>27</td>
41791 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41792 <td>intaggr_vintr_pend</td>
41793 <td>27</td>
41794 </tr>
41795 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41796 <td>237</td>
41797 <td>28</td>
41798 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41799 <td>intaggr_vintr_pend</td>
41800 <td>28</td>
41801 </tr>
41802 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41803 <td>237</td>
41804 <td>29</td>
41805 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41806 <td>intaggr_vintr_pend</td>
41807 <td>29</td>
41808 </tr>
41809 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41810 <td>237</td>
41811 <td>30</td>
41812 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41813 <td>intaggr_vintr_pend</td>
41814 <td>30</td>
41815 </tr>
41816 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41817 <td>237</td>
41818 <td>31</td>
41819 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41820 <td>intaggr_vintr_pend</td>
41821 <td>31</td>
41822 </tr>
41823 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41824 <td>237</td>
41825 <td>32</td>
41826 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41827 <td>intaggr_vintr_pend</td>
41828 <td>32</td>
41829 </tr>
41830 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41831 <td>237</td>
41832 <td>33</td>
41833 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41834 <td>intaggr_vintr_pend</td>
41835 <td>33</td>
41836 </tr>
41837 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41838 <td>237</td>
41839 <td>34</td>
41840 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41841 <td>intaggr_vintr_pend</td>
41842 <td>34</td>
41843 </tr>
41844 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41845 <td>237</td>
41846 <td>35</td>
41847 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41848 <td>intaggr_vintr_pend</td>
41849 <td>35</td>
41850 </tr>
41851 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41852 <td>237</td>
41853 <td>36</td>
41854 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41855 <td>intaggr_vintr_pend</td>
41856 <td>36</td>
41857 </tr>
41858 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41859 <td>237</td>
41860 <td>37</td>
41861 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41862 <td>intaggr_vintr_pend</td>
41863 <td>37</td>
41864 </tr>
41865 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41866 <td>237</td>
41867 <td>38</td>
41868 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41869 <td>intaggr_vintr_pend</td>
41870 <td>38</td>
41871 </tr>
41872 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41873 <td>237</td>
41874 <td>39</td>
41875 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41876 <td>intaggr_vintr_pend</td>
41877 <td>39</td>
41878 </tr>
41879 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41880 <td>237</td>
41881 <td>40</td>
41882 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41883 <td>intaggr_vintr_pend</td>
41884 <td>40</td>
41885 </tr>
41886 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41887 <td>237</td>
41888 <td>41</td>
41889 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41890 <td>intaggr_vintr_pend</td>
41891 <td>41</td>
41892 </tr>
41893 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41894 <td>237</td>
41895 <td>42</td>
41896 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41897 <td>intaggr_vintr_pend</td>
41898 <td>42</td>
41899 </tr>
41900 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41901 <td>237</td>
41902 <td>43</td>
41903 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41904 <td>intaggr_vintr_pend</td>
41905 <td>43</td>
41906 </tr>
41907 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41908 <td>237</td>
41909 <td>44</td>
41910 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41911 <td>intaggr_vintr_pend</td>
41912 <td>44</td>
41913 </tr>
41914 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41915 <td>237</td>
41916 <td>45</td>
41917 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41918 <td>intaggr_vintr_pend</td>
41919 <td>45</td>
41920 </tr>
41921 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41922 <td>237</td>
41923 <td>46</td>
41924 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41925 <td>intaggr_vintr_pend</td>
41926 <td>46</td>
41927 </tr>
41928 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41929 <td>237</td>
41930 <td>47</td>
41931 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41932 <td>intaggr_vintr_pend</td>
41933 <td>47</td>
41934 </tr>
41935 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41936 <td>237</td>
41937 <td>48</td>
41938 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41939 <td>intaggr_vintr_pend</td>
41940 <td>48</td>
41941 </tr>
41942 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41943 <td>237</td>
41944 <td>49</td>
41945 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41946 <td>intaggr_vintr_pend</td>
41947 <td>49</td>
41948 </tr>
41949 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41950 <td>237</td>
41951 <td>50</td>
41952 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41953 <td>intaggr_vintr_pend</td>
41954 <td>50</td>
41955 </tr>
41956 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41957 <td>237</td>
41958 <td>51</td>
41959 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41960 <td>intaggr_vintr_pend</td>
41961 <td>51</td>
41962 </tr>
41963 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41964 <td>237</td>
41965 <td>52</td>
41966 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41967 <td>intaggr_vintr_pend</td>
41968 <td>52</td>
41969 </tr>
41970 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41971 <td>237</td>
41972 <td>53</td>
41973 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41974 <td>intaggr_vintr_pend</td>
41975 <td>53</td>
41976 </tr>
41977 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41978 <td>237</td>
41979 <td>54</td>
41980 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41981 <td>intaggr_vintr_pend</td>
41982 <td>54</td>
41983 </tr>
41984 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41985 <td>237</td>
41986 <td>55</td>
41987 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41988 <td>intaggr_vintr_pend</td>
41989 <td>55</td>
41990 </tr>
41991 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41992 <td>237</td>
41993 <td>56</td>
41994 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
41995 <td>intaggr_vintr_pend</td>
41996 <td>56</td>
41997 </tr>
41998 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
41999 <td>237</td>
42000 <td>57</td>
42001 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42002 <td>intaggr_vintr_pend</td>
42003 <td>57</td>
42004 </tr>
42005 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42006 <td>237</td>
42007 <td>58</td>
42008 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42009 <td>intaggr_vintr_pend</td>
42010 <td>58</td>
42011 </tr>
42012 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42013 <td>237</td>
42014 <td>59</td>
42015 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42016 <td>intaggr_vintr_pend</td>
42017 <td>59</td>
42018 </tr>
42019 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42020 <td>237</td>
42021 <td>60</td>
42022 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42023 <td>intaggr_vintr_pend</td>
42024 <td>60</td>
42025 </tr>
42026 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42027 <td>237</td>
42028 <td>61</td>
42029 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42030 <td>intaggr_vintr_pend</td>
42031 <td>61</td>
42032 </tr>
42033 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42034 <td>237</td>
42035 <td>62</td>
42036 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42037 <td>intaggr_vintr_pend</td>
42038 <td>62</td>
42039 </tr>
42040 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42041 <td>237</td>
42042 <td>63</td>
42043 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42044 <td>intaggr_vintr_pend</td>
42045 <td>63</td>
42046 </tr>
42047 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42048 <td>237</td>
42049 <td>64</td>
42050 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42051 <td>intaggr_vintr_pend</td>
42052 <td>64</td>
42053 </tr>
42054 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42055 <td>237</td>
42056 <td>65</td>
42057 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42058 <td>intaggr_vintr_pend</td>
42059 <td>65</td>
42060 </tr>
42061 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42062 <td>237</td>
42063 <td>66</td>
42064 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42065 <td>intaggr_vintr_pend</td>
42066 <td>66</td>
42067 </tr>
42068 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42069 <td>237</td>
42070 <td>67</td>
42071 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42072 <td>intaggr_vintr_pend</td>
42073 <td>67</td>
42074 </tr>
42075 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42076 <td>237</td>
42077 <td>68</td>
42078 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42079 <td>intaggr_vintr_pend</td>
42080 <td>68</td>
42081 </tr>
42082 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42083 <td>237</td>
42084 <td>69</td>
42085 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42086 <td>intaggr_vintr_pend</td>
42087 <td>69</td>
42088 </tr>
42089 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42090 <td>237</td>
42091 <td>70</td>
42092 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42093 <td>intaggr_vintr_pend</td>
42094 <td>70</td>
42095 </tr>
42096 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42097 <td>237</td>
42098 <td>71</td>
42099 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42100 <td>intaggr_vintr_pend</td>
42101 <td>71</td>
42102 </tr>
42103 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42104 <td>237</td>
42105 <td>72</td>
42106 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42107 <td>intaggr_vintr_pend</td>
42108 <td>72</td>
42109 </tr>
42110 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42111 <td>237</td>
42112 <td>73</td>
42113 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42114 <td>intaggr_vintr_pend</td>
42115 <td>73</td>
42116 </tr>
42117 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42118 <td>237</td>
42119 <td>74</td>
42120 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42121 <td>intaggr_vintr_pend</td>
42122 <td>74</td>
42123 </tr>
42124 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42125 <td>237</td>
42126 <td>75</td>
42127 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42128 <td>intaggr_vintr_pend</td>
42129 <td>75</td>
42130 </tr>
42131 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42132 <td>237</td>
42133 <td>76</td>
42134 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42135 <td>intaggr_vintr_pend</td>
42136 <td>76</td>
42137 </tr>
42138 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42139 <td>237</td>
42140 <td>77</td>
42141 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42142 <td>intaggr_vintr_pend</td>
42143 <td>77</td>
42144 </tr>
42145 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42146 <td>237</td>
42147 <td>78</td>
42148 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42149 <td>intaggr_vintr_pend</td>
42150 <td>78</td>
42151 </tr>
42152 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42153 <td>237</td>
42154 <td>79</td>
42155 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42156 <td>intaggr_vintr_pend</td>
42157 <td>79</td>
42158 </tr>
42159 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42160 <td>237</td>
42161 <td>80</td>
42162 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42163 <td>intaggr_vintr_pend</td>
42164 <td>80</td>
42165 </tr>
42166 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42167 <td>237</td>
42168 <td>81</td>
42169 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42170 <td>intaggr_vintr_pend</td>
42171 <td>81</td>
42172 </tr>
42173 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42174 <td>237</td>
42175 <td>82</td>
42176 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42177 <td>intaggr_vintr_pend</td>
42178 <td>82</td>
42179 </tr>
42180 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42181 <td>237</td>
42182 <td>83</td>
42183 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42184 <td>intaggr_vintr_pend</td>
42185 <td>83</td>
42186 </tr>
42187 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42188 <td>237</td>
42189 <td>84</td>
42190 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42191 <td>intaggr_vintr_pend</td>
42192 <td>84</td>
42193 </tr>
42194 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42195 <td>237</td>
42196 <td>85</td>
42197 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42198 <td>intaggr_vintr_pend</td>
42199 <td>85</td>
42200 </tr>
42201 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42202 <td>237</td>
42203 <td>86</td>
42204 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42205 <td>intaggr_vintr_pend</td>
42206 <td>86</td>
42207 </tr>
42208 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42209 <td>237</td>
42210 <td>87</td>
42211 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42212 <td>intaggr_vintr_pend</td>
42213 <td>87</td>
42214 </tr>
42215 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42216 <td>237</td>
42217 <td>88</td>
42218 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42219 <td>intaggr_vintr_pend</td>
42220 <td>88</td>
42221 </tr>
42222 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42223 <td>237</td>
42224 <td>89</td>
42225 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42226 <td>intaggr_vintr_pend</td>
42227 <td>89</td>
42228 </tr>
42229 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42230 <td>237</td>
42231 <td>90</td>
42232 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42233 <td>intaggr_vintr_pend</td>
42234 <td>90</td>
42235 </tr>
42236 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42237 <td>237</td>
42238 <td>91</td>
42239 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42240 <td>intaggr_vintr_pend</td>
42241 <td>91</td>
42242 </tr>
42243 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42244 <td>237</td>
42245 <td>92</td>
42246 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42247 <td>intaggr_vintr_pend</td>
42248 <td>92</td>
42249 </tr>
42250 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42251 <td>237</td>
42252 <td>93</td>
42253 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42254 <td>intaggr_vintr_pend</td>
42255 <td>93</td>
42256 </tr>
42257 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42258 <td>237</td>
42259 <td>94</td>
42260 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42261 <td>intaggr_vintr_pend</td>
42262 <td>94</td>
42263 </tr>
42264 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42265 <td>237</td>
42266 <td>95</td>
42267 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42268 <td>intaggr_vintr_pend</td>
42269 <td>95</td>
42270 </tr>
42271 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42272 <td>237</td>
42273 <td>96</td>
42274 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42275 <td>intaggr_vintr_pend</td>
42276 <td>96</td>
42277 </tr>
42278 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42279 <td>237</td>
42280 <td>97</td>
42281 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42282 <td>intaggr_vintr_pend</td>
42283 <td>97</td>
42284 </tr>
42285 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42286 <td>237</td>
42287 <td>98</td>
42288 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42289 <td>intaggr_vintr_pend</td>
42290 <td>98</td>
42291 </tr>
42292 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42293 <td>237</td>
42294 <td>99</td>
42295 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42296 <td>intaggr_vintr_pend</td>
42297 <td>99</td>
42298 </tr>
42299 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42300 <td>237</td>
42301 <td>100</td>
42302 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42303 <td>intaggr_vintr_pend</td>
42304 <td>100</td>
42305 </tr>
42306 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42307 <td>237</td>
42308 <td>101</td>
42309 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42310 <td>intaggr_vintr_pend</td>
42311 <td>101</td>
42312 </tr>
42313 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42314 <td>237</td>
42315 <td>102</td>
42316 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42317 <td>intaggr_vintr_pend</td>
42318 <td>102</td>
42319 </tr>
42320 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42321 <td>237</td>
42322 <td>103</td>
42323 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42324 <td>intaggr_vintr_pend</td>
42325 <td>103</td>
42326 </tr>
42327 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42328 <td>237</td>
42329 <td>104</td>
42330 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42331 <td>intaggr_vintr_pend</td>
42332 <td>104</td>
42333 </tr>
42334 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42335 <td>237</td>
42336 <td>105</td>
42337 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42338 <td>intaggr_vintr_pend</td>
42339 <td>105</td>
42340 </tr>
42341 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42342 <td>237</td>
42343 <td>106</td>
42344 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42345 <td>intaggr_vintr_pend</td>
42346 <td>106</td>
42347 </tr>
42348 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42349 <td>237</td>
42350 <td>107</td>
42351 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42352 <td>intaggr_vintr_pend</td>
42353 <td>107</td>
42354 </tr>
42355 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42356 <td>237</td>
42357 <td>108</td>
42358 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42359 <td>intaggr_vintr_pend</td>
42360 <td>108</td>
42361 </tr>
42362 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42363 <td>237</td>
42364 <td>109</td>
42365 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42366 <td>intaggr_vintr_pend</td>
42367 <td>109</td>
42368 </tr>
42369 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42370 <td>237</td>
42371 <td>110</td>
42372 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42373 <td>intaggr_vintr_pend</td>
42374 <td>110</td>
42375 </tr>
42376 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42377 <td>237</td>
42378 <td>111</td>
42379 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42380 <td>intaggr_vintr_pend</td>
42381 <td>111</td>
42382 </tr>
42383 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42384 <td>237</td>
42385 <td>112</td>
42386 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42387 <td>intaggr_vintr_pend</td>
42388 <td>112</td>
42389 </tr>
42390 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42391 <td>237</td>
42392 <td>113</td>
42393 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42394 <td>intaggr_vintr_pend</td>
42395 <td>113</td>
42396 </tr>
42397 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42398 <td>237</td>
42399 <td>114</td>
42400 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42401 <td>intaggr_vintr_pend</td>
42402 <td>114</td>
42403 </tr>
42404 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42405 <td>237</td>
42406 <td>115</td>
42407 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42408 <td>intaggr_vintr_pend</td>
42409 <td>115</td>
42410 </tr>
42411 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42412 <td>237</td>
42413 <td>116</td>
42414 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42415 <td>intaggr_vintr_pend</td>
42416 <td>116</td>
42417 </tr>
42418 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42419 <td>237</td>
42420 <td>117</td>
42421 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42422 <td>intaggr_vintr_pend</td>
42423 <td>117</td>
42424 </tr>
42425 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42426 <td>237</td>
42427 <td>118</td>
42428 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42429 <td>intaggr_vintr_pend</td>
42430 <td>118</td>
42431 </tr>
42432 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42433 <td>237</td>
42434 <td>119</td>
42435 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42436 <td>intaggr_vintr_pend</td>
42437 <td>119</td>
42438 </tr>
42439 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42440 <td>237</td>
42441 <td>120</td>
42442 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42443 <td>intaggr_vintr_pend</td>
42444 <td>120</td>
42445 </tr>
42446 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42447 <td>237</td>
42448 <td>121</td>
42449 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42450 <td>intaggr_vintr_pend</td>
42451 <td>121</td>
42452 </tr>
42453 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42454 <td>237</td>
42455 <td>122</td>
42456 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42457 <td>intaggr_vintr_pend</td>
42458 <td>122</td>
42459 </tr>
42460 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42461 <td>237</td>
42462 <td>123</td>
42463 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42464 <td>intaggr_vintr_pend</td>
42465 <td>123</td>
42466 </tr>
42467 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42468 <td>237</td>
42469 <td>124</td>
42470 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42471 <td>intaggr_vintr_pend</td>
42472 <td>124</td>
42473 </tr>
42474 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42475 <td>237</td>
42476 <td>125</td>
42477 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42478 <td>intaggr_vintr_pend</td>
42479 <td>125</td>
42480 </tr>
42481 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42482 <td>237</td>
42483 <td>126</td>
42484 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42485 <td>intaggr_vintr_pend</td>
42486 <td>126</td>
42487 </tr>
42488 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42489 <td>237</td>
42490 <td>127</td>
42491 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42492 <td>intaggr_vintr_pend</td>
42493 <td>127</td>
42494 </tr>
42495 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42496 <td>237</td>
42497 <td>128</td>
42498 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42499 <td>intaggr_vintr_pend</td>
42500 <td>128</td>
42501 </tr>
42502 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42503 <td>237</td>
42504 <td>129</td>
42505 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42506 <td>intaggr_vintr_pend</td>
42507 <td>129</td>
42508 </tr>
42509 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42510 <td>237</td>
42511 <td>130</td>
42512 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42513 <td>intaggr_vintr_pend</td>
42514 <td>130</td>
42515 </tr>
42516 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42517 <td>237</td>
42518 <td>131</td>
42519 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42520 <td>intaggr_vintr_pend</td>
42521 <td>131</td>
42522 </tr>
42523 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42524 <td>237</td>
42525 <td>132</td>
42526 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42527 <td>intaggr_vintr_pend</td>
42528 <td>132</td>
42529 </tr>
42530 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42531 <td>237</td>
42532 <td>133</td>
42533 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42534 <td>intaggr_vintr_pend</td>
42535 <td>133</td>
42536 </tr>
42537 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42538 <td>237</td>
42539 <td>134</td>
42540 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42541 <td>intaggr_vintr_pend</td>
42542 <td>134</td>
42543 </tr>
42544 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42545 <td>237</td>
42546 <td>135</td>
42547 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42548 <td>intaggr_vintr_pend</td>
42549 <td>135</td>
42550 </tr>
42551 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42552 <td>237</td>
42553 <td>136</td>
42554 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42555 <td>intaggr_vintr_pend</td>
42556 <td>136</td>
42557 </tr>
42558 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42559 <td>237</td>
42560 <td>137</td>
42561 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42562 <td>intaggr_vintr_pend</td>
42563 <td>137</td>
42564 </tr>
42565 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42566 <td>237</td>
42567 <td>138</td>
42568 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42569 <td>intaggr_vintr_pend</td>
42570 <td>138</td>
42571 </tr>
42572 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42573 <td>237</td>
42574 <td>139</td>
42575 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42576 <td>intaggr_vintr_pend</td>
42577 <td>139</td>
42578 </tr>
42579 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42580 <td>237</td>
42581 <td>140</td>
42582 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42583 <td>intaggr_vintr_pend</td>
42584 <td>140</td>
42585 </tr>
42586 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42587 <td>237</td>
42588 <td>141</td>
42589 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42590 <td>intaggr_vintr_pend</td>
42591 <td>141</td>
42592 </tr>
42593 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42594 <td>237</td>
42595 <td>142</td>
42596 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42597 <td>intaggr_vintr_pend</td>
42598 <td>142</td>
42599 </tr>
42600 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42601 <td>237</td>
42602 <td>143</td>
42603 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42604 <td>intaggr_vintr_pend</td>
42605 <td>143</td>
42606 </tr>
42607 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42608 <td>237</td>
42609 <td>144</td>
42610 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42611 <td>intaggr_vintr_pend</td>
42612 <td>144</td>
42613 </tr>
42614 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42615 <td>237</td>
42616 <td>145</td>
42617 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42618 <td>intaggr_vintr_pend</td>
42619 <td>145</td>
42620 </tr>
42621 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42622 <td>237</td>
42623 <td>146</td>
42624 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42625 <td>intaggr_vintr_pend</td>
42626 <td>146</td>
42627 </tr>
42628 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42629 <td>237</td>
42630 <td>147</td>
42631 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42632 <td>intaggr_vintr_pend</td>
42633 <td>147</td>
42634 </tr>
42635 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42636 <td>237</td>
42637 <td>148</td>
42638 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42639 <td>intaggr_vintr_pend</td>
42640 <td>148</td>
42641 </tr>
42642 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42643 <td>237</td>
42644 <td>149</td>
42645 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42646 <td>intaggr_vintr_pend</td>
42647 <td>149</td>
42648 </tr>
42649 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42650 <td>237</td>
42651 <td>150</td>
42652 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42653 <td>intaggr_vintr_pend</td>
42654 <td>150</td>
42655 </tr>
42656 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42657 <td>237</td>
42658 <td>151</td>
42659 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42660 <td>intaggr_vintr_pend</td>
42661 <td>151</td>
42662 </tr>
42663 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42664 <td>237</td>
42665 <td>152</td>
42666 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42667 <td>intaggr_vintr_pend</td>
42668 <td>152</td>
42669 </tr>
42670 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42671 <td>237</td>
42672 <td>153</td>
42673 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42674 <td>intaggr_vintr_pend</td>
42675 <td>153</td>
42676 </tr>
42677 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42678 <td>237</td>
42679 <td>154</td>
42680 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42681 <td>intaggr_vintr_pend</td>
42682 <td>154</td>
42683 </tr>
42684 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42685 <td>237</td>
42686 <td>155</td>
42687 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42688 <td>intaggr_vintr_pend</td>
42689 <td>155</td>
42690 </tr>
42691 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42692 <td>237</td>
42693 <td>156</td>
42694 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42695 <td>intaggr_vintr_pend</td>
42696 <td>156</td>
42697 </tr>
42698 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42699 <td>237</td>
42700 <td>157</td>
42701 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42702 <td>intaggr_vintr_pend</td>
42703 <td>157</td>
42704 </tr>
42705 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42706 <td>237</td>
42707 <td>158</td>
42708 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42709 <td>intaggr_vintr_pend</td>
42710 <td>158</td>
42711 </tr>
42712 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42713 <td>237</td>
42714 <td>159</td>
42715 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42716 <td>intaggr_vintr_pend</td>
42717 <td>159</td>
42718 </tr>
42719 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42720 <td>237</td>
42721 <td>160</td>
42722 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42723 <td>intaggr_vintr_pend</td>
42724 <td>160</td>
42725 </tr>
42726 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42727 <td>237</td>
42728 <td>161</td>
42729 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42730 <td>intaggr_vintr_pend</td>
42731 <td>161</td>
42732 </tr>
42733 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42734 <td>237</td>
42735 <td>162</td>
42736 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42737 <td>intaggr_vintr_pend</td>
42738 <td>162</td>
42739 </tr>
42740 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42741 <td>237</td>
42742 <td>163</td>
42743 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42744 <td>intaggr_vintr_pend</td>
42745 <td>163</td>
42746 </tr>
42747 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42748 <td>237</td>
42749 <td>164</td>
42750 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42751 <td>intaggr_vintr_pend</td>
42752 <td>164</td>
42753 </tr>
42754 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42755 <td>237</td>
42756 <td>165</td>
42757 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42758 <td>intaggr_vintr_pend</td>
42759 <td>165</td>
42760 </tr>
42761 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42762 <td>237</td>
42763 <td>166</td>
42764 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42765 <td>intaggr_vintr_pend</td>
42766 <td>166</td>
42767 </tr>
42768 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42769 <td>237</td>
42770 <td>167</td>
42771 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42772 <td>intaggr_vintr_pend</td>
42773 <td>167</td>
42774 </tr>
42775 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42776 <td>237</td>
42777 <td>168</td>
42778 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42779 <td>intaggr_vintr_pend</td>
42780 <td>168</td>
42781 </tr>
42782 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42783 <td>237</td>
42784 <td>169</td>
42785 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42786 <td>intaggr_vintr_pend</td>
42787 <td>169</td>
42788 </tr>
42789 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42790 <td>237</td>
42791 <td>170</td>
42792 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42793 <td>intaggr_vintr_pend</td>
42794 <td>170</td>
42795 </tr>
42796 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42797 <td>237</td>
42798 <td>171</td>
42799 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42800 <td>intaggr_vintr_pend</td>
42801 <td>171</td>
42802 </tr>
42803 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42804 <td>237</td>
42805 <td>172</td>
42806 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42807 <td>intaggr_vintr_pend</td>
42808 <td>172</td>
42809 </tr>
42810 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42811 <td>237</td>
42812 <td>173</td>
42813 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42814 <td>intaggr_vintr_pend</td>
42815 <td>173</td>
42816 </tr>
42817 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42818 <td>237</td>
42819 <td>174</td>
42820 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42821 <td>intaggr_vintr_pend</td>
42822 <td>174</td>
42823 </tr>
42824 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42825 <td>237</td>
42826 <td>175</td>
42827 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42828 <td>intaggr_vintr_pend</td>
42829 <td>175</td>
42830 </tr>
42831 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42832 <td>237</td>
42833 <td>176</td>
42834 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42835 <td>intaggr_vintr_pend</td>
42836 <td>176</td>
42837 </tr>
42838 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42839 <td>237</td>
42840 <td>177</td>
42841 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42842 <td>intaggr_vintr_pend</td>
42843 <td>177</td>
42844 </tr>
42845 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42846 <td>237</td>
42847 <td>178</td>
42848 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42849 <td>intaggr_vintr_pend</td>
42850 <td>178</td>
42851 </tr>
42852 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42853 <td>237</td>
42854 <td>179</td>
42855 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42856 <td>intaggr_vintr_pend</td>
42857 <td>179</td>
42858 </tr>
42859 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42860 <td>237</td>
42861 <td>180</td>
42862 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42863 <td>intaggr_vintr_pend</td>
42864 <td>180</td>
42865 </tr>
42866 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42867 <td>237</td>
42868 <td>181</td>
42869 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42870 <td>intaggr_vintr_pend</td>
42871 <td>181</td>
42872 </tr>
42873 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42874 <td>237</td>
42875 <td>182</td>
42876 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42877 <td>intaggr_vintr_pend</td>
42878 <td>182</td>
42879 </tr>
42880 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42881 <td>237</td>
42882 <td>183</td>
42883 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42884 <td>intaggr_vintr_pend</td>
42885 <td>183</td>
42886 </tr>
42887 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42888 <td>237</td>
42889 <td>184</td>
42890 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42891 <td>intaggr_vintr_pend</td>
42892 <td>184</td>
42893 </tr>
42894 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42895 <td>237</td>
42896 <td>185</td>
42897 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42898 <td>intaggr_vintr_pend</td>
42899 <td>185</td>
42900 </tr>
42901 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42902 <td>237</td>
42903 <td>186</td>
42904 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42905 <td>intaggr_vintr_pend</td>
42906 <td>186</td>
42907 </tr>
42908 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42909 <td>237</td>
42910 <td>187</td>
42911 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42912 <td>intaggr_vintr_pend</td>
42913 <td>187</td>
42914 </tr>
42915 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42916 <td>237</td>
42917 <td>188</td>
42918 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42919 <td>intaggr_vintr_pend</td>
42920 <td>188</td>
42921 </tr>
42922 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42923 <td>237</td>
42924 <td>189</td>
42925 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42926 <td>intaggr_vintr_pend</td>
42927 <td>189</td>
42928 </tr>
42929 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42930 <td>237</td>
42931 <td>190</td>
42932 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42933 <td>intaggr_vintr_pend</td>
42934 <td>190</td>
42935 </tr>
42936 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42937 <td>237</td>
42938 <td>191</td>
42939 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42940 <td>intaggr_vintr_pend</td>
42941 <td>191</td>
42942 </tr>
42943 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42944 <td>237</td>
42945 <td>192</td>
42946 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42947 <td>intaggr_vintr_pend</td>
42948 <td>192</td>
42949 </tr>
42950 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42951 <td>237</td>
42952 <td>193</td>
42953 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42954 <td>intaggr_vintr_pend</td>
42955 <td>193</td>
42956 </tr>
42957 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42958 <td>237</td>
42959 <td>194</td>
42960 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42961 <td>intaggr_vintr_pend</td>
42962 <td>194</td>
42963 </tr>
42964 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42965 <td>237</td>
42966 <td>195</td>
42967 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42968 <td>intaggr_vintr_pend</td>
42969 <td>195</td>
42970 </tr>
42971 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42972 <td>237</td>
42973 <td>196</td>
42974 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42975 <td>intaggr_vintr_pend</td>
42976 <td>196</td>
42977 </tr>
42978 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42979 <td>237</td>
42980 <td>197</td>
42981 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42982 <td>intaggr_vintr_pend</td>
42983 <td>197</td>
42984 </tr>
42985 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42986 <td>237</td>
42987 <td>198</td>
42988 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42989 <td>intaggr_vintr_pend</td>
42990 <td>198</td>
42991 </tr>
42992 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
42993 <td>237</td>
42994 <td>199</td>
42995 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
42996 <td>intaggr_vintr_pend</td>
42997 <td>199</td>
42998 </tr>
42999 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43000 <td>237</td>
43001 <td>200</td>
43002 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43003 <td>intaggr_vintr_pend</td>
43004 <td>200</td>
43005 </tr>
43006 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43007 <td>237</td>
43008 <td>201</td>
43009 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43010 <td>intaggr_vintr_pend</td>
43011 <td>201</td>
43012 </tr>
43013 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43014 <td>237</td>
43015 <td>202</td>
43016 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43017 <td>intaggr_vintr_pend</td>
43018 <td>202</td>
43019 </tr>
43020 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43021 <td>237</td>
43022 <td>203</td>
43023 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43024 <td>intaggr_vintr_pend</td>
43025 <td>203</td>
43026 </tr>
43027 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43028 <td>237</td>
43029 <td>204</td>
43030 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43031 <td>intaggr_vintr_pend</td>
43032 <td>204</td>
43033 </tr>
43034 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43035 <td>237</td>
43036 <td>205</td>
43037 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43038 <td>intaggr_vintr_pend</td>
43039 <td>205</td>
43040 </tr>
43041 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43042 <td>237</td>
43043 <td>206</td>
43044 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43045 <td>intaggr_vintr_pend</td>
43046 <td>206</td>
43047 </tr>
43048 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43049 <td>237</td>
43050 <td>207</td>
43051 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43052 <td>intaggr_vintr_pend</td>
43053 <td>207</td>
43054 </tr>
43055 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43056 <td>237</td>
43057 <td>208</td>
43058 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43059 <td>intaggr_vintr_pend</td>
43060 <td>208</td>
43061 </tr>
43062 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43063 <td>237</td>
43064 <td>209</td>
43065 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43066 <td>intaggr_vintr_pend</td>
43067 <td>209</td>
43068 </tr>
43069 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43070 <td>237</td>
43071 <td>210</td>
43072 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43073 <td>intaggr_vintr_pend</td>
43074 <td>210</td>
43075 </tr>
43076 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43077 <td>237</td>
43078 <td>211</td>
43079 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43080 <td>intaggr_vintr_pend</td>
43081 <td>211</td>
43082 </tr>
43083 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43084 <td>237</td>
43085 <td>212</td>
43086 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43087 <td>intaggr_vintr_pend</td>
43088 <td>212</td>
43089 </tr>
43090 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43091 <td>237</td>
43092 <td>213</td>
43093 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43094 <td>intaggr_vintr_pend</td>
43095 <td>213</td>
43096 </tr>
43097 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43098 <td>237</td>
43099 <td>214</td>
43100 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43101 <td>intaggr_vintr_pend</td>
43102 <td>214</td>
43103 </tr>
43104 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43105 <td>237</td>
43106 <td>215</td>
43107 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43108 <td>intaggr_vintr_pend</td>
43109 <td>215</td>
43110 </tr>
43111 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43112 <td>237</td>
43113 <td>216</td>
43114 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43115 <td>intaggr_vintr_pend</td>
43116 <td>216</td>
43117 </tr>
43118 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43119 <td>237</td>
43120 <td>217</td>
43121 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43122 <td>intaggr_vintr_pend</td>
43123 <td>217</td>
43124 </tr>
43125 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43126 <td>237</td>
43127 <td>218</td>
43128 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43129 <td>intaggr_vintr_pend</td>
43130 <td>218</td>
43131 </tr>
43132 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43133 <td>237</td>
43134 <td>219</td>
43135 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43136 <td>intaggr_vintr_pend</td>
43137 <td>219</td>
43138 </tr>
43139 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43140 <td>237</td>
43141 <td>220</td>
43142 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43143 <td>intaggr_vintr_pend</td>
43144 <td>220</td>
43145 </tr>
43146 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43147 <td>237</td>
43148 <td>221</td>
43149 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43150 <td>intaggr_vintr_pend</td>
43151 <td>221</td>
43152 </tr>
43153 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43154 <td>237</td>
43155 <td>222</td>
43156 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43157 <td>intaggr_vintr_pend</td>
43158 <td>222</td>
43159 </tr>
43160 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43161 <td>237</td>
43162 <td>223</td>
43163 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43164 <td>intaggr_vintr_pend</td>
43165 <td>223</td>
43166 </tr>
43167 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43168 <td>237</td>
43169 <td>224</td>
43170 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43171 <td>intaggr_vintr_pend</td>
43172 <td>224</td>
43173 </tr>
43174 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43175 <td>237</td>
43176 <td>225</td>
43177 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43178 <td>intaggr_vintr_pend</td>
43179 <td>225</td>
43180 </tr>
43181 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43182 <td>237</td>
43183 <td>226</td>
43184 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43185 <td>intaggr_vintr_pend</td>
43186 <td>226</td>
43187 </tr>
43188 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43189 <td>237</td>
43190 <td>227</td>
43191 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43192 <td>intaggr_vintr_pend</td>
43193 <td>227</td>
43194 </tr>
43195 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43196 <td>237</td>
43197 <td>228</td>
43198 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43199 <td>intaggr_vintr_pend</td>
43200 <td>228</td>
43201 </tr>
43202 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43203 <td>237</td>
43204 <td>229</td>
43205 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43206 <td>intaggr_vintr_pend</td>
43207 <td>229</td>
43208 </tr>
43209 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43210 <td>237</td>
43211 <td>230</td>
43212 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43213 <td>intaggr_vintr_pend</td>
43214 <td>230</td>
43215 </tr>
43216 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43217 <td>237</td>
43218 <td>231</td>
43219 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43220 <td>intaggr_vintr_pend</td>
43221 <td>231</td>
43222 </tr>
43223 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43224 <td>237</td>
43225 <td>232</td>
43226 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43227 <td>intaggr_vintr_pend</td>
43228 <td>232</td>
43229 </tr>
43230 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43231 <td>237</td>
43232 <td>233</td>
43233 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43234 <td>intaggr_vintr_pend</td>
43235 <td>233</td>
43236 </tr>
43237 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43238 <td>237</td>
43239 <td>234</td>
43240 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43241 <td>intaggr_vintr_pend</td>
43242 <td>234</td>
43243 </tr>
43244 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43245 <td>237</td>
43246 <td>235</td>
43247 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43248 <td>intaggr_vintr_pend</td>
43249 <td>235</td>
43250 </tr>
43251 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43252 <td>237</td>
43253 <td>236</td>
43254 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43255 <td>intaggr_vintr_pend</td>
43256 <td>236</td>
43257 </tr>
43258 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43259 <td>237</td>
43260 <td>237</td>
43261 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43262 <td>intaggr_vintr_pend</td>
43263 <td>237</td>
43264 </tr>
43265 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43266 <td>237</td>
43267 <td>238</td>
43268 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43269 <td>intaggr_vintr_pend</td>
43270 <td>238</td>
43271 </tr>
43272 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43273 <td>237</td>
43274 <td>239</td>
43275 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43276 <td>intaggr_vintr_pend</td>
43277 <td>239</td>
43278 </tr>
43279 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43280 <td>237</td>
43281 <td>240</td>
43282 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43283 <td>intaggr_vintr_pend</td>
43284 <td>240</td>
43285 </tr>
43286 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43287 <td>237</td>
43288 <td>241</td>
43289 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43290 <td>intaggr_vintr_pend</td>
43291 <td>241</td>
43292 </tr>
43293 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43294 <td>237</td>
43295 <td>242</td>
43296 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43297 <td>intaggr_vintr_pend</td>
43298 <td>242</td>
43299 </tr>
43300 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43301 <td>237</td>
43302 <td>243</td>
43303 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43304 <td>intaggr_vintr_pend</td>
43305 <td>243</td>
43306 </tr>
43307 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43308 <td>237</td>
43309 <td>244</td>
43310 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43311 <td>intaggr_vintr_pend</td>
43312 <td>244</td>
43313 </tr>
43314 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43315 <td>237</td>
43316 <td>245</td>
43317 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43318 <td>intaggr_vintr_pend</td>
43319 <td>245</td>
43320 </tr>
43321 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43322 <td>237</td>
43323 <td>246</td>
43324 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43325 <td>intaggr_vintr_pend</td>
43326 <td>246</td>
43327 </tr>
43328 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43329 <td>237</td>
43330 <td>247</td>
43331 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43332 <td>intaggr_vintr_pend</td>
43333 <td>247</td>
43334 </tr>
43335 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43336 <td>237</td>
43337 <td>248</td>
43338 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43339 <td>intaggr_vintr_pend</td>
43340 <td>248</td>
43341 </tr>
43342 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43343 <td>237</td>
43344 <td>249</td>
43345 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43346 <td>intaggr_vintr_pend</td>
43347 <td>249</td>
43348 </tr>
43349 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43350 <td>237</td>
43351 <td>250</td>
43352 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43353 <td>intaggr_vintr_pend</td>
43354 <td>250</td>
43355 </tr>
43356 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43357 <td>237</td>
43358 <td>251</td>
43359 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43360 <td>intaggr_vintr_pend</td>
43361 <td>251</td>
43362 </tr>
43363 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43364 <td>237</td>
43365 <td>252</td>
43366 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43367 <td>intaggr_vintr_pend</td>
43368 <td>252</td>
43369 </tr>
43370 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43371 <td>237</td>
43372 <td>253</td>
43373 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43374 <td>intaggr_vintr_pend</td>
43375 <td>253</td>
43376 </tr>
43377 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43378 <td>237</td>
43379 <td>254</td>
43380 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43381 <td>intaggr_vintr_pend</td>
43382 <td>254</td>
43383 </tr>
43384 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43385 <td>237</td>
43386 <td>255</td>
43387 <td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43388 <td>intaggr_vintr_pend</td>
43389 <td>255</td>
43390 </tr>
43391 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43392 <td>237</td>
43393 <td>256</td>
43394 <td>J721E_DEV_MCU_NAVSS0_MCRC_0</td>
43395 <td>dma_event_intr</td>
43396 <td>0</td>
43397 </tr>
43398 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43399 <td>237</td>
43400 <td>257</td>
43401 <td>J721E_DEV_MCU_NAVSS0_MCRC_0</td>
43402 <td>dma_event_intr</td>
43403 <td>1</td>
43404 </tr>
43405 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43406 <td>237</td>
43407 <td>258</td>
43408 <td>J721E_DEV_MCU_NAVSS0_MCRC_0</td>
43409 <td>dma_event_intr</td>
43410 <td>2</td>
43411 </tr>
43412 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43413 <td>237</td>
43414 <td>259</td>
43415 <td>J721E_DEV_MCU_NAVSS0_MCRC_0</td>
43416 <td>dma_event_intr</td>
43417 <td>3</td>
43418 </tr>
43419 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43420 <td>237</td>
43421 <td>260</td>
43422 <td>J721E_DEV_MCU_NAVSS0_MCRC_0</td>
43423 <td>intaggr_vintr_pend</td>
43424 <td>0</td>
43425 </tr>
43426 </tbody>
43427 </table>
43428 </div>
43429 <div class="section" id="mcu-navss0-intr-0-interrupt-router-output-destinations">
43430 <span id="pub-soc-j721e-mcu-navss0-intr-0-output-src-list"></span><h2>MCU_NAVSS0_INTR_0 Interrupt Router Output Destinations<a class="headerlink" href="#mcu-navss0-intr-0-interrupt-router-output-destinations" title="Permalink to this headline">¶</a></h2>
43431 <div class="admonition warning">
43432 <p class="first admonition-title">Warning</p>
43433 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
43434 host within the RM Board Configuration resource assignment array.  The RM
43435 Board Configuration is rejected if an overlap with a reserved resource is
43436 detected.</p>
43437 </div>
43438 <table border="1" class="docutils">
43439 <colgroup>
43440 <col width="24%" />
43441 <col width="11%" />
43442 <col width="13%" />
43443 <col width="19%" />
43444 <col width="17%" />
43445 <col width="15%" />
43446 </colgroup>
43447 <thead valign="bottom">
43448 <tr class="row-odd"><th class="head">IR Name</th>
43449 <th class="head">IR Device ID</th>
43450 <th class="head">IR Output Index</th>
43451 <th class="head">Destination Name</th>
43452 <th class="head">Destination Interface</th>
43453 <th class="head">Destination Index</th>
43454 </tr>
43455 </thead>
43456 <tbody valign="top">
43457 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43458 (<strong>Reserved by System Firmware</strong>)</td>
43459 <td>237</td>
43460 <td>0</td>
43461 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43462 <td>intr</td>
43463 <td>64</td>
43464 </tr>
43465 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43466 (<strong>Reserved by System Firmware</strong>)</td>
43467 <td>237</td>
43468 <td>1</td>
43469 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43470 <td>intr</td>
43471 <td>65</td>
43472 </tr>
43473 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43474 (<strong>Reserved by System Firmware</strong>)</td>
43475 <td>237</td>
43476 <td>2</td>
43477 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43478 <td>intr</td>
43479 <td>66</td>
43480 </tr>
43481 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43482 (<strong>Reserved by System Firmware</strong>)</td>
43483 <td>237</td>
43484 <td>3</td>
43485 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43486 <td>intr</td>
43487 <td>67</td>
43488 </tr>
43489 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43490 (<strong>Reserved by System Firmware</strong>)</td>
43491 <td>237</td>
43492 <td>4</td>
43493 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43494 <td>intr</td>
43495 <td>68</td>
43496 </tr>
43497 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43498 (<strong>Reserved by System Firmware</strong>)</td>
43499 <td>237</td>
43500 <td>5</td>
43501 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43502 <td>intr</td>
43503 <td>69</td>
43504 </tr>
43505 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43506 (<strong>Reserved by System Firmware</strong>)</td>
43507 <td>237</td>
43508 <td>6</td>
43509 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43510 <td>intr</td>
43511 <td>70</td>
43512 </tr>
43513 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43514 (<strong>Reserved by System Firmware</strong>)</td>
43515 <td>237</td>
43516 <td>7</td>
43517 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43518 <td>intr</td>
43519 <td>71</td>
43520 </tr>
43521 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43522 (<strong>Reserved by System Firmware</strong>)</td>
43523 <td>237</td>
43524 <td>8</td>
43525 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43526 <td>intr</td>
43527 <td>72</td>
43528 </tr>
43529 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43530 (<strong>Reserved by System Firmware</strong>)</td>
43531 <td>237</td>
43532 <td>9</td>
43533 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43534 <td>intr</td>
43535 <td>73</td>
43536 </tr>
43537 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43538 (<strong>Reserved by System Firmware</strong>)</td>
43539 <td>237</td>
43540 <td>10</td>
43541 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43542 <td>intr</td>
43543 <td>74</td>
43544 </tr>
43545 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43546 (<strong>Reserved by System Firmware</strong>)</td>
43547 <td>237</td>
43548 <td>11</td>
43549 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43550 <td>intr</td>
43551 <td>75</td>
43552 </tr>
43553 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43554 <td>237</td>
43555 <td>12</td>
43556 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43557 <td>intr</td>
43558 <td>76</td>
43559 </tr>
43560 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43561 <td>237</td>
43562 <td>13</td>
43563 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43564 <td>intr</td>
43565 <td>77</td>
43566 </tr>
43567 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43568 <td>237</td>
43569 <td>14</td>
43570 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43571 <td>intr</td>
43572 <td>78</td>
43573 </tr>
43574 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43575 <td>237</td>
43576 <td>15</td>
43577 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43578 <td>intr</td>
43579 <td>79</td>
43580 </tr>
43581 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43582 <td>237</td>
43583 <td>16</td>
43584 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43585 <td>intr</td>
43586 <td>80</td>
43587 </tr>
43588 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43589 <td>237</td>
43590 <td>17</td>
43591 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43592 <td>intr</td>
43593 <td>81</td>
43594 </tr>
43595 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43596 <td>237</td>
43597 <td>18</td>
43598 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43599 <td>intr</td>
43600 <td>82</td>
43601 </tr>
43602 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43603 <td>237</td>
43604 <td>19</td>
43605 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43606 <td>intr</td>
43607 <td>83</td>
43608 </tr>
43609 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43610 <td>237</td>
43611 <td>20</td>
43612 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43613 <td>intr</td>
43614 <td>84</td>
43615 </tr>
43616 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43617 <td>237</td>
43618 <td>21</td>
43619 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43620 <td>intr</td>
43621 <td>85</td>
43622 </tr>
43623 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43624 <td>237</td>
43625 <td>22</td>
43626 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43627 <td>intr</td>
43628 <td>86</td>
43629 </tr>
43630 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43631 <td>237</td>
43632 <td>23</td>
43633 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43634 <td>intr</td>
43635 <td>87</td>
43636 </tr>
43637 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43638 <td>237</td>
43639 <td>24</td>
43640 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43641 <td>intr</td>
43642 <td>88</td>
43643 </tr>
43644 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43645 <td>237</td>
43646 <td>25</td>
43647 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43648 <td>intr</td>
43649 <td>89</td>
43650 </tr>
43651 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43652 <td>237</td>
43653 <td>26</td>
43654 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43655 <td>intr</td>
43656 <td>90</td>
43657 </tr>
43658 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43659 <td>237</td>
43660 <td>27</td>
43661 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43662 <td>intr</td>
43663 <td>91</td>
43664 </tr>
43665 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43666 <td>237</td>
43667 <td>28</td>
43668 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43669 <td>intr</td>
43670 <td>92</td>
43671 </tr>
43672 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43673 <td>237</td>
43674 <td>29</td>
43675 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43676 <td>intr</td>
43677 <td>93</td>
43678 </tr>
43679 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43680 <td>237</td>
43681 <td>30</td>
43682 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43683 <td>intr</td>
43684 <td>94</td>
43685 </tr>
43686 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43687 <td>237</td>
43688 <td>31</td>
43689 <td>J721E_DEV_MCU_R5FSS0_CORE0</td>
43690 <td>intr</td>
43691 <td>95</td>
43692 </tr>
43693 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43694 (<strong>Reserved by System Firmware</strong>)</td>
43695 <td>237</td>
43696 <td>32</td>
43697 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43698 <td>intr</td>
43699 <td>64</td>
43700 </tr>
43701 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43702 (<strong>Reserved by System Firmware</strong>)</td>
43703 <td>237</td>
43704 <td>33</td>
43705 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43706 <td>intr</td>
43707 <td>65</td>
43708 </tr>
43709 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43710 (<strong>Reserved by System Firmware</strong>)</td>
43711 <td>237</td>
43712 <td>34</td>
43713 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43714 <td>intr</td>
43715 <td>66</td>
43716 </tr>
43717 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0
43718 (<strong>Reserved by System Firmware</strong>)</td>
43719 <td>237</td>
43720 <td>35</td>
43721 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43722 <td>intr</td>
43723 <td>67</td>
43724 </tr>
43725 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43726 <td>237</td>
43727 <td>36</td>
43728 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43729 <td>intr</td>
43730 <td>68</td>
43731 </tr>
43732 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43733 <td>237</td>
43734 <td>37</td>
43735 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43736 <td>intr</td>
43737 <td>69</td>
43738 </tr>
43739 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43740 <td>237</td>
43741 <td>38</td>
43742 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43743 <td>intr</td>
43744 <td>70</td>
43745 </tr>
43746 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43747 <td>237</td>
43748 <td>39</td>
43749 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43750 <td>intr</td>
43751 <td>71</td>
43752 </tr>
43753 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43754 <td>237</td>
43755 <td>40</td>
43756 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43757 <td>intr</td>
43758 <td>72</td>
43759 </tr>
43760 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43761 <td>237</td>
43762 <td>41</td>
43763 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43764 <td>intr</td>
43765 <td>73</td>
43766 </tr>
43767 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43768 <td>237</td>
43769 <td>42</td>
43770 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43771 <td>intr</td>
43772 <td>74</td>
43773 </tr>
43774 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43775 <td>237</td>
43776 <td>43</td>
43777 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43778 <td>intr</td>
43779 <td>75</td>
43780 </tr>
43781 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43782 <td>237</td>
43783 <td>44</td>
43784 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43785 <td>intr</td>
43786 <td>76</td>
43787 </tr>
43788 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43789 <td>237</td>
43790 <td>45</td>
43791 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43792 <td>intr</td>
43793 <td>77</td>
43794 </tr>
43795 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43796 <td>237</td>
43797 <td>46</td>
43798 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43799 <td>intr</td>
43800 <td>78</td>
43801 </tr>
43802 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43803 <td>237</td>
43804 <td>47</td>
43805 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43806 <td>intr</td>
43807 <td>79</td>
43808 </tr>
43809 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43810 <td>237</td>
43811 <td>48</td>
43812 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43813 <td>intr</td>
43814 <td>80</td>
43815 </tr>
43816 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43817 <td>237</td>
43818 <td>49</td>
43819 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43820 <td>intr</td>
43821 <td>81</td>
43822 </tr>
43823 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43824 <td>237</td>
43825 <td>50</td>
43826 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43827 <td>intr</td>
43828 <td>82</td>
43829 </tr>
43830 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43831 <td>237</td>
43832 <td>51</td>
43833 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43834 <td>intr</td>
43835 <td>83</td>
43836 </tr>
43837 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43838 <td>237</td>
43839 <td>52</td>
43840 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43841 <td>intr</td>
43842 <td>84</td>
43843 </tr>
43844 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43845 <td>237</td>
43846 <td>53</td>
43847 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43848 <td>intr</td>
43849 <td>85</td>
43850 </tr>
43851 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43852 <td>237</td>
43853 <td>54</td>
43854 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43855 <td>intr</td>
43856 <td>86</td>
43857 </tr>
43858 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43859 <td>237</td>
43860 <td>55</td>
43861 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43862 <td>intr</td>
43863 <td>87</td>
43864 </tr>
43865 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43866 <td>237</td>
43867 <td>56</td>
43868 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43869 <td>intr</td>
43870 <td>88</td>
43871 </tr>
43872 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43873 <td>237</td>
43874 <td>57</td>
43875 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43876 <td>intr</td>
43877 <td>89</td>
43878 </tr>
43879 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43880 <td>237</td>
43881 <td>58</td>
43882 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43883 <td>intr</td>
43884 <td>90</td>
43885 </tr>
43886 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43887 <td>237</td>
43888 <td>59</td>
43889 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43890 <td>intr</td>
43891 <td>91</td>
43892 </tr>
43893 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43894 <td>237</td>
43895 <td>60</td>
43896 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43897 <td>intr</td>
43898 <td>92</td>
43899 </tr>
43900 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43901 <td>237</td>
43902 <td>61</td>
43903 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43904 <td>intr</td>
43905 <td>93</td>
43906 </tr>
43907 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43908 <td>237</td>
43909 <td>62</td>
43910 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43911 <td>intr</td>
43912 <td>94</td>
43913 </tr>
43914 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
43915 <td>237</td>
43916 <td>63</td>
43917 <td>J721E_DEV_MCU_R5FSS0_CORE1</td>
43918 <td>intr</td>
43919 <td>95</td>
43920 </tr>
43921 </tbody>
43922 </table>
43923 </div>
43924 <div class="section" id="interrupt-aggregator-device-ids">
43925 <span id="pub-soc-j721e-ia-device-ids"></span><h2>Interrupt Aggregator Device IDs<a class="headerlink" href="#interrupt-aggregator-device-ids" title="Permalink to this headline">¶</a></h2>
43926 <p>Some System Firmware TISCI message APIs require the Interrupt Aggregator device
43927 ID be provided as part of the request. Based on <a class="reference internal" href="devices.html"><span class="doc">J721E Device IDs</span></a> these are the valid Interrupt Aggregator device IDs.</p>
43928 <table border="1" class="docutils">
43929 <colgroup>
43930 <col width="51%" />
43931 <col width="49%" />
43932 </colgroup>
43933 <thead valign="bottom">
43934 <tr class="row-odd"><th class="head">Interrupt Aggregator Device Name</th>
43935 <th class="head">Interrupt Aggregator Device ID</th>
43936 </tr>
43937 </thead>
43938 <tbody valign="top">
43939 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
43940 <td>207</td>
43941 </tr>
43942 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
43943 <td>208</td>
43944 </tr>
43945 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
43946 <td>209</td>
43947 </tr>
43948 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43949 <td>233</td>
43950 </tr>
43951 </tbody>
43952 </table>
43953 </div>
43954 <div class="section" id="interrupt-aggregator-virtual-interrupts">
43955 <span id="pub-soc-j721e-ia-vints"></span><h2>Interrupt Aggregator Virtual Interrupts<a class="headerlink" href="#interrupt-aggregator-virtual-interrupts" title="Permalink to this headline">¶</a></h2>
43956 <p>This section describes Interrupt Aggregator virtual interrupts.  The virtual
43957 interrupts are used in interrupt management based TISCI messages.</p>
43958 <div class="admonition warning">
43959 <p class="first admonition-title">Warning</p>
43960 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
43961 host within the RM Board Configuration resource assignment array.  The RM
43962 Board Configuration is rejected if an overlap with a reserved resource is
43963 detected.</p>
43964 </div>
43965 <table border="1" class="docutils">
43966 <colgroup>
43967 <col width="57%" />
43968 <col width="43%" />
43969 </colgroup>
43970 <thead valign="bottom">
43971 <tr class="row-odd"><th class="head">Interrupt Aggregator Name</th>
43972 <th class="head">Virtual Interrupt Range</th>
43973 </tr>
43974 </thead>
43975 <tbody valign="top">
43976 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
43977 <td>0 to 63</td>
43978 </tr>
43979 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
43980 <td>0 to 63</td>
43981 </tr>
43982 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
43983 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
43984 <td>0 to 37</td>
43985 </tr>
43986 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
43987 <td>38 to 255</td>
43988 </tr>
43989 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
43990 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
43991 <td>0 to 15</td>
43992 </tr>
43993 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
43994 <td>16 to 255</td>
43995 </tr>
43996 </tbody>
43997 </table>
43998 </div>
43999 <div class="section" id="navss0-modss-intaggr-0-interrupt-aggregator-virtual-interrupt-destinations">
44000 <span id="pub-soc-j721e-navss0-modss-intaggr-0-vint-output-dst-list"></span><h2>NAVSS0_MODSS_INTAGGR_0 Interrupt Aggregator Virtual Interrupt Destinations<a class="headerlink" href="#navss0-modss-intaggr-0-interrupt-aggregator-virtual-interrupt-destinations" title="Permalink to this headline">¶</a></h2>
44001 <div class="admonition warning">
44002 <p class="first admonition-title">Warning</p>
44003 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
44004 host within the RM Board Configuration resource assignment array.  The RM
44005 Board Configuration is rejected if an overlap with a reserved resource is
44006 detected.</p>
44007 </div>
44008 <table border="1" class="docutils">
44009 <colgroup>
44010 <col width="23%" />
44011 <col width="11%" />
44012 <col width="12%" />
44013 <col width="22%" />
44014 <col width="17%" />
44015 <col width="14%" />
44016 </colgroup>
44017 <thead valign="bottom">
44018 <tr class="row-odd"><th class="head">IA Name</th>
44019 <th class="head">IA Device ID</th>
44020 <th class="head">IA VINT Index</th>
44021 <th class="head">Destination Name</th>
44022 <th class="head">Destination Interface</th>
44023 <th class="head">Destination Index</th>
44024 </tr>
44025 </thead>
44026 <tbody valign="top">
44027 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44028 <td>207</td>
44029 <td>0</td>
44030 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44031 <td>in_intr</td>
44032 <td>320</td>
44033 </tr>
44034 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44035 <td>207</td>
44036 <td>1</td>
44037 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44038 <td>in_intr</td>
44039 <td>321</td>
44040 </tr>
44041 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44042 <td>207</td>
44043 <td>2</td>
44044 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44045 <td>in_intr</td>
44046 <td>322</td>
44047 </tr>
44048 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44049 <td>207</td>
44050 <td>3</td>
44051 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44052 <td>in_intr</td>
44053 <td>323</td>
44054 </tr>
44055 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44056 <td>207</td>
44057 <td>4</td>
44058 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44059 <td>in_intr</td>
44060 <td>324</td>
44061 </tr>
44062 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44063 <td>207</td>
44064 <td>5</td>
44065 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44066 <td>in_intr</td>
44067 <td>325</td>
44068 </tr>
44069 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44070 <td>207</td>
44071 <td>6</td>
44072 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44073 <td>in_intr</td>
44074 <td>326</td>
44075 </tr>
44076 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44077 <td>207</td>
44078 <td>7</td>
44079 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44080 <td>in_intr</td>
44081 <td>327</td>
44082 </tr>
44083 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44084 <td>207</td>
44085 <td>8</td>
44086 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44087 <td>in_intr</td>
44088 <td>328</td>
44089 </tr>
44090 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44091 <td>207</td>
44092 <td>9</td>
44093 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44094 <td>in_intr</td>
44095 <td>329</td>
44096 </tr>
44097 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44098 <td>207</td>
44099 <td>10</td>
44100 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44101 <td>in_intr</td>
44102 <td>330</td>
44103 </tr>
44104 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44105 <td>207</td>
44106 <td>11</td>
44107 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44108 <td>in_intr</td>
44109 <td>331</td>
44110 </tr>
44111 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44112 <td>207</td>
44113 <td>12</td>
44114 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44115 <td>in_intr</td>
44116 <td>332</td>
44117 </tr>
44118 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44119 <td>207</td>
44120 <td>13</td>
44121 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44122 <td>in_intr</td>
44123 <td>333</td>
44124 </tr>
44125 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44126 <td>207</td>
44127 <td>14</td>
44128 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44129 <td>in_intr</td>
44130 <td>334</td>
44131 </tr>
44132 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44133 <td>207</td>
44134 <td>15</td>
44135 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44136 <td>in_intr</td>
44137 <td>335</td>
44138 </tr>
44139 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44140 <td>207</td>
44141 <td>16</td>
44142 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44143 <td>in_intr</td>
44144 <td>336</td>
44145 </tr>
44146 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44147 <td>207</td>
44148 <td>17</td>
44149 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44150 <td>in_intr</td>
44151 <td>337</td>
44152 </tr>
44153 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44154 <td>207</td>
44155 <td>18</td>
44156 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44157 <td>in_intr</td>
44158 <td>338</td>
44159 </tr>
44160 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44161 <td>207</td>
44162 <td>19</td>
44163 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44164 <td>in_intr</td>
44165 <td>339</td>
44166 </tr>
44167 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44168 <td>207</td>
44169 <td>20</td>
44170 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44171 <td>in_intr</td>
44172 <td>340</td>
44173 </tr>
44174 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44175 <td>207</td>
44176 <td>21</td>
44177 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44178 <td>in_intr</td>
44179 <td>341</td>
44180 </tr>
44181 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44182 <td>207</td>
44183 <td>22</td>
44184 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44185 <td>in_intr</td>
44186 <td>342</td>
44187 </tr>
44188 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44189 <td>207</td>
44190 <td>23</td>
44191 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44192 <td>in_intr</td>
44193 <td>343</td>
44194 </tr>
44195 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44196 <td>207</td>
44197 <td>24</td>
44198 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44199 <td>in_intr</td>
44200 <td>344</td>
44201 </tr>
44202 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44203 <td>207</td>
44204 <td>25</td>
44205 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44206 <td>in_intr</td>
44207 <td>345</td>
44208 </tr>
44209 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44210 <td>207</td>
44211 <td>26</td>
44212 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44213 <td>in_intr</td>
44214 <td>346</td>
44215 </tr>
44216 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44217 <td>207</td>
44218 <td>27</td>
44219 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44220 <td>in_intr</td>
44221 <td>347</td>
44222 </tr>
44223 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44224 <td>207</td>
44225 <td>28</td>
44226 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44227 <td>in_intr</td>
44228 <td>348</td>
44229 </tr>
44230 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44231 <td>207</td>
44232 <td>29</td>
44233 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44234 <td>in_intr</td>
44235 <td>349</td>
44236 </tr>
44237 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44238 <td>207</td>
44239 <td>30</td>
44240 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44241 <td>in_intr</td>
44242 <td>350</td>
44243 </tr>
44244 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44245 <td>207</td>
44246 <td>31</td>
44247 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44248 <td>in_intr</td>
44249 <td>351</td>
44250 </tr>
44251 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44252 <td>207</td>
44253 <td>32</td>
44254 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44255 <td>in_intr</td>
44256 <td>352</td>
44257 </tr>
44258 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44259 <td>207</td>
44260 <td>33</td>
44261 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44262 <td>in_intr</td>
44263 <td>353</td>
44264 </tr>
44265 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44266 <td>207</td>
44267 <td>34</td>
44268 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44269 <td>in_intr</td>
44270 <td>354</td>
44271 </tr>
44272 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44273 <td>207</td>
44274 <td>35</td>
44275 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44276 <td>in_intr</td>
44277 <td>355</td>
44278 </tr>
44279 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44280 <td>207</td>
44281 <td>36</td>
44282 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44283 <td>in_intr</td>
44284 <td>356</td>
44285 </tr>
44286 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44287 <td>207</td>
44288 <td>37</td>
44289 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44290 <td>in_intr</td>
44291 <td>357</td>
44292 </tr>
44293 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44294 <td>207</td>
44295 <td>38</td>
44296 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44297 <td>in_intr</td>
44298 <td>358</td>
44299 </tr>
44300 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44301 <td>207</td>
44302 <td>39</td>
44303 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44304 <td>in_intr</td>
44305 <td>359</td>
44306 </tr>
44307 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44308 <td>207</td>
44309 <td>40</td>
44310 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44311 <td>in_intr</td>
44312 <td>360</td>
44313 </tr>
44314 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44315 <td>207</td>
44316 <td>41</td>
44317 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44318 <td>in_intr</td>
44319 <td>361</td>
44320 </tr>
44321 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44322 <td>207</td>
44323 <td>42</td>
44324 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44325 <td>in_intr</td>
44326 <td>362</td>
44327 </tr>
44328 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44329 <td>207</td>
44330 <td>43</td>
44331 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44332 <td>in_intr</td>
44333 <td>363</td>
44334 </tr>
44335 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44336 <td>207</td>
44337 <td>44</td>
44338 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44339 <td>in_intr</td>
44340 <td>364</td>
44341 </tr>
44342 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44343 <td>207</td>
44344 <td>45</td>
44345 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44346 <td>in_intr</td>
44347 <td>365</td>
44348 </tr>
44349 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44350 <td>207</td>
44351 <td>46</td>
44352 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44353 <td>in_intr</td>
44354 <td>366</td>
44355 </tr>
44356 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44357 <td>207</td>
44358 <td>47</td>
44359 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44360 <td>in_intr</td>
44361 <td>367</td>
44362 </tr>
44363 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44364 <td>207</td>
44365 <td>48</td>
44366 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44367 <td>in_intr</td>
44368 <td>368</td>
44369 </tr>
44370 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44371 <td>207</td>
44372 <td>49</td>
44373 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44374 <td>in_intr</td>
44375 <td>369</td>
44376 </tr>
44377 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44378 <td>207</td>
44379 <td>50</td>
44380 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44381 <td>in_intr</td>
44382 <td>370</td>
44383 </tr>
44384 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44385 <td>207</td>
44386 <td>51</td>
44387 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44388 <td>in_intr</td>
44389 <td>371</td>
44390 </tr>
44391 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44392 <td>207</td>
44393 <td>52</td>
44394 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44395 <td>in_intr</td>
44396 <td>372</td>
44397 </tr>
44398 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44399 <td>207</td>
44400 <td>53</td>
44401 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44402 <td>in_intr</td>
44403 <td>373</td>
44404 </tr>
44405 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44406 <td>207</td>
44407 <td>54</td>
44408 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44409 <td>in_intr</td>
44410 <td>374</td>
44411 </tr>
44412 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44413 <td>207</td>
44414 <td>55</td>
44415 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44416 <td>in_intr</td>
44417 <td>375</td>
44418 </tr>
44419 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44420 <td>207</td>
44421 <td>56</td>
44422 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44423 <td>in_intr</td>
44424 <td>376</td>
44425 </tr>
44426 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44427 <td>207</td>
44428 <td>57</td>
44429 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44430 <td>in_intr</td>
44431 <td>377</td>
44432 </tr>
44433 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44434 <td>207</td>
44435 <td>58</td>
44436 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44437 <td>in_intr</td>
44438 <td>378</td>
44439 </tr>
44440 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44441 <td>207</td>
44442 <td>59</td>
44443 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44444 <td>in_intr</td>
44445 <td>379</td>
44446 </tr>
44447 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44448 <td>207</td>
44449 <td>60</td>
44450 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44451 <td>in_intr</td>
44452 <td>380</td>
44453 </tr>
44454 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44455 <td>207</td>
44456 <td>61</td>
44457 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44458 <td>in_intr</td>
44459 <td>381</td>
44460 </tr>
44461 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44462 <td>207</td>
44463 <td>62</td>
44464 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44465 <td>in_intr</td>
44466 <td>382</td>
44467 </tr>
44468 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_0</td>
44469 <td>207</td>
44470 <td>63</td>
44471 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44472 <td>in_intr</td>
44473 <td>383</td>
44474 </tr>
44475 </tbody>
44476 </table>
44477 </div>
44478 <div class="section" id="navss0-modss-intaggr-1-interrupt-aggregator-virtual-interrupt-destinations">
44479 <span id="pub-soc-j721e-navss0-modss-intaggr-1-vint-output-dst-list"></span><h2>NAVSS0_MODSS_INTAGGR_1 Interrupt Aggregator Virtual Interrupt Destinations<a class="headerlink" href="#navss0-modss-intaggr-1-interrupt-aggregator-virtual-interrupt-destinations" title="Permalink to this headline">¶</a></h2>
44480 <div class="admonition warning">
44481 <p class="first admonition-title">Warning</p>
44482 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
44483 host within the RM Board Configuration resource assignment array.  The RM
44484 Board Configuration is rejected if an overlap with a reserved resource is
44485 detected.</p>
44486 </div>
44487 <table border="1" class="docutils">
44488 <colgroup>
44489 <col width="23%" />
44490 <col width="11%" />
44491 <col width="12%" />
44492 <col width="22%" />
44493 <col width="17%" />
44494 <col width="14%" />
44495 </colgroup>
44496 <thead valign="bottom">
44497 <tr class="row-odd"><th class="head">IA Name</th>
44498 <th class="head">IA Device ID</th>
44499 <th class="head">IA VINT Index</th>
44500 <th class="head">Destination Name</th>
44501 <th class="head">Destination Interface</th>
44502 <th class="head">Destination Index</th>
44503 </tr>
44504 </thead>
44505 <tbody valign="top">
44506 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44507 <td>208</td>
44508 <td>0</td>
44509 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44510 <td>in_intr</td>
44511 <td>256</td>
44512 </tr>
44513 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44514 <td>208</td>
44515 <td>1</td>
44516 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44517 <td>in_intr</td>
44518 <td>257</td>
44519 </tr>
44520 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44521 <td>208</td>
44522 <td>2</td>
44523 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44524 <td>in_intr</td>
44525 <td>258</td>
44526 </tr>
44527 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44528 <td>208</td>
44529 <td>3</td>
44530 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44531 <td>in_intr</td>
44532 <td>259</td>
44533 </tr>
44534 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44535 <td>208</td>
44536 <td>4</td>
44537 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44538 <td>in_intr</td>
44539 <td>260</td>
44540 </tr>
44541 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44542 <td>208</td>
44543 <td>5</td>
44544 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44545 <td>in_intr</td>
44546 <td>261</td>
44547 </tr>
44548 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44549 <td>208</td>
44550 <td>6</td>
44551 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44552 <td>in_intr</td>
44553 <td>262</td>
44554 </tr>
44555 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44556 <td>208</td>
44557 <td>7</td>
44558 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44559 <td>in_intr</td>
44560 <td>263</td>
44561 </tr>
44562 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44563 <td>208</td>
44564 <td>8</td>
44565 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44566 <td>in_intr</td>
44567 <td>264</td>
44568 </tr>
44569 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44570 <td>208</td>
44571 <td>9</td>
44572 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44573 <td>in_intr</td>
44574 <td>265</td>
44575 </tr>
44576 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44577 <td>208</td>
44578 <td>10</td>
44579 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44580 <td>in_intr</td>
44581 <td>266</td>
44582 </tr>
44583 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44584 <td>208</td>
44585 <td>11</td>
44586 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44587 <td>in_intr</td>
44588 <td>267</td>
44589 </tr>
44590 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44591 <td>208</td>
44592 <td>12</td>
44593 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44594 <td>in_intr</td>
44595 <td>268</td>
44596 </tr>
44597 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44598 <td>208</td>
44599 <td>13</td>
44600 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44601 <td>in_intr</td>
44602 <td>269</td>
44603 </tr>
44604 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44605 <td>208</td>
44606 <td>14</td>
44607 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44608 <td>in_intr</td>
44609 <td>270</td>
44610 </tr>
44611 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44612 <td>208</td>
44613 <td>15</td>
44614 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44615 <td>in_intr</td>
44616 <td>271</td>
44617 </tr>
44618 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44619 <td>208</td>
44620 <td>16</td>
44621 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44622 <td>in_intr</td>
44623 <td>272</td>
44624 </tr>
44625 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44626 <td>208</td>
44627 <td>17</td>
44628 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44629 <td>in_intr</td>
44630 <td>273</td>
44631 </tr>
44632 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44633 <td>208</td>
44634 <td>18</td>
44635 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44636 <td>in_intr</td>
44637 <td>274</td>
44638 </tr>
44639 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44640 <td>208</td>
44641 <td>19</td>
44642 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44643 <td>in_intr</td>
44644 <td>275</td>
44645 </tr>
44646 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44647 <td>208</td>
44648 <td>20</td>
44649 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44650 <td>in_intr</td>
44651 <td>276</td>
44652 </tr>
44653 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44654 <td>208</td>
44655 <td>21</td>
44656 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44657 <td>in_intr</td>
44658 <td>277</td>
44659 </tr>
44660 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44661 <td>208</td>
44662 <td>22</td>
44663 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44664 <td>in_intr</td>
44665 <td>278</td>
44666 </tr>
44667 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44668 <td>208</td>
44669 <td>23</td>
44670 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44671 <td>in_intr</td>
44672 <td>279</td>
44673 </tr>
44674 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44675 <td>208</td>
44676 <td>24</td>
44677 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44678 <td>in_intr</td>
44679 <td>280</td>
44680 </tr>
44681 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44682 <td>208</td>
44683 <td>25</td>
44684 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44685 <td>in_intr</td>
44686 <td>281</td>
44687 </tr>
44688 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44689 <td>208</td>
44690 <td>26</td>
44691 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44692 <td>in_intr</td>
44693 <td>282</td>
44694 </tr>
44695 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44696 <td>208</td>
44697 <td>27</td>
44698 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44699 <td>in_intr</td>
44700 <td>283</td>
44701 </tr>
44702 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44703 <td>208</td>
44704 <td>28</td>
44705 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44706 <td>in_intr</td>
44707 <td>284</td>
44708 </tr>
44709 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44710 <td>208</td>
44711 <td>29</td>
44712 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44713 <td>in_intr</td>
44714 <td>285</td>
44715 </tr>
44716 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44717 <td>208</td>
44718 <td>30</td>
44719 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44720 <td>in_intr</td>
44721 <td>286</td>
44722 </tr>
44723 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44724 <td>208</td>
44725 <td>31</td>
44726 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44727 <td>in_intr</td>
44728 <td>287</td>
44729 </tr>
44730 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44731 <td>208</td>
44732 <td>32</td>
44733 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44734 <td>in_intr</td>
44735 <td>288</td>
44736 </tr>
44737 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44738 <td>208</td>
44739 <td>33</td>
44740 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44741 <td>in_intr</td>
44742 <td>289</td>
44743 </tr>
44744 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44745 <td>208</td>
44746 <td>34</td>
44747 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44748 <td>in_intr</td>
44749 <td>290</td>
44750 </tr>
44751 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44752 <td>208</td>
44753 <td>35</td>
44754 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44755 <td>in_intr</td>
44756 <td>291</td>
44757 </tr>
44758 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44759 <td>208</td>
44760 <td>36</td>
44761 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44762 <td>in_intr</td>
44763 <td>292</td>
44764 </tr>
44765 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44766 <td>208</td>
44767 <td>37</td>
44768 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44769 <td>in_intr</td>
44770 <td>293</td>
44771 </tr>
44772 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44773 <td>208</td>
44774 <td>38</td>
44775 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44776 <td>in_intr</td>
44777 <td>294</td>
44778 </tr>
44779 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44780 <td>208</td>
44781 <td>39</td>
44782 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44783 <td>in_intr</td>
44784 <td>295</td>
44785 </tr>
44786 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44787 <td>208</td>
44788 <td>40</td>
44789 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44790 <td>in_intr</td>
44791 <td>296</td>
44792 </tr>
44793 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44794 <td>208</td>
44795 <td>41</td>
44796 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44797 <td>in_intr</td>
44798 <td>297</td>
44799 </tr>
44800 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44801 <td>208</td>
44802 <td>42</td>
44803 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44804 <td>in_intr</td>
44805 <td>298</td>
44806 </tr>
44807 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44808 <td>208</td>
44809 <td>43</td>
44810 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44811 <td>in_intr</td>
44812 <td>299</td>
44813 </tr>
44814 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44815 <td>208</td>
44816 <td>44</td>
44817 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44818 <td>in_intr</td>
44819 <td>300</td>
44820 </tr>
44821 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44822 <td>208</td>
44823 <td>45</td>
44824 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44825 <td>in_intr</td>
44826 <td>301</td>
44827 </tr>
44828 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44829 <td>208</td>
44830 <td>46</td>
44831 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44832 <td>in_intr</td>
44833 <td>302</td>
44834 </tr>
44835 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44836 <td>208</td>
44837 <td>47</td>
44838 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44839 <td>in_intr</td>
44840 <td>303</td>
44841 </tr>
44842 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44843 <td>208</td>
44844 <td>48</td>
44845 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44846 <td>in_intr</td>
44847 <td>304</td>
44848 </tr>
44849 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44850 <td>208</td>
44851 <td>49</td>
44852 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44853 <td>in_intr</td>
44854 <td>305</td>
44855 </tr>
44856 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44857 <td>208</td>
44858 <td>50</td>
44859 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44860 <td>in_intr</td>
44861 <td>306</td>
44862 </tr>
44863 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44864 <td>208</td>
44865 <td>51</td>
44866 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44867 <td>in_intr</td>
44868 <td>307</td>
44869 </tr>
44870 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44871 <td>208</td>
44872 <td>52</td>
44873 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44874 <td>in_intr</td>
44875 <td>308</td>
44876 </tr>
44877 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44878 <td>208</td>
44879 <td>53</td>
44880 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44881 <td>in_intr</td>
44882 <td>309</td>
44883 </tr>
44884 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44885 <td>208</td>
44886 <td>54</td>
44887 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44888 <td>in_intr</td>
44889 <td>310</td>
44890 </tr>
44891 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44892 <td>208</td>
44893 <td>55</td>
44894 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44895 <td>in_intr</td>
44896 <td>311</td>
44897 </tr>
44898 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44899 <td>208</td>
44900 <td>56</td>
44901 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44902 <td>in_intr</td>
44903 <td>312</td>
44904 </tr>
44905 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44906 <td>208</td>
44907 <td>57</td>
44908 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44909 <td>in_intr</td>
44910 <td>313</td>
44911 </tr>
44912 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44913 <td>208</td>
44914 <td>58</td>
44915 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44916 <td>in_intr</td>
44917 <td>314</td>
44918 </tr>
44919 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44920 <td>208</td>
44921 <td>59</td>
44922 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44923 <td>in_intr</td>
44924 <td>315</td>
44925 </tr>
44926 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44927 <td>208</td>
44928 <td>60</td>
44929 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44930 <td>in_intr</td>
44931 <td>316</td>
44932 </tr>
44933 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44934 <td>208</td>
44935 <td>61</td>
44936 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44937 <td>in_intr</td>
44938 <td>317</td>
44939 </tr>
44940 <tr class="row-even"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44941 <td>208</td>
44942 <td>62</td>
44943 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44944 <td>in_intr</td>
44945 <td>318</td>
44946 </tr>
44947 <tr class="row-odd"><td>J721E_DEV_NAVSS0_MODSS_INTAGGR_1</td>
44948 <td>208</td>
44949 <td>63</td>
44950 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44951 <td>in_intr</td>
44952 <td>319</td>
44953 </tr>
44954 </tbody>
44955 </table>
44956 </div>
44957 <div class="section" id="navss0-udmass-intaggr-0-interrupt-aggregator-virtual-interrupt-destinations">
44958 <span id="pub-soc-j721e-navss0-udmass-intaggr-0-vint-output-dst-list"></span><h2>NAVSS0_UDMASS_INTAGGR_0 Interrupt Aggregator Virtual Interrupt Destinations<a class="headerlink" href="#navss0-udmass-intaggr-0-interrupt-aggregator-virtual-interrupt-destinations" title="Permalink to this headline">¶</a></h2>
44959 <div class="admonition warning">
44960 <p class="first admonition-title">Warning</p>
44961 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
44962 host within the RM Board Configuration resource assignment array.  The RM
44963 Board Configuration is rejected if an overlap with a reserved resource is
44964 detected.</p>
44965 </div>
44966 <table border="1" class="docutils">
44967 <colgroup>
44968 <col width="24%" />
44969 <col width="11%" />
44970 <col width="12%" />
44971 <col width="22%" />
44972 <col width="17%" />
44973 <col width="14%" />
44974 </colgroup>
44975 <thead valign="bottom">
44976 <tr class="row-odd"><th class="head">IA Name</th>
44977 <th class="head">IA Device ID</th>
44978 <th class="head">IA VINT Index</th>
44979 <th class="head">Destination Name</th>
44980 <th class="head">Destination Interface</th>
44981 <th class="head">Destination Index</th>
44982 </tr>
44983 </thead>
44984 <tbody valign="top">
44985 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
44986 (<strong>Reserved by System Firmware</strong>)</td>
44987 <td>209</td>
44988 <td>0</td>
44989 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44990 <td>in_intr</td>
44991 <td>0</td>
44992 </tr>
44993 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
44994 (<strong>Reserved by System Firmware</strong>)</td>
44995 <td>209</td>
44996 <td>1</td>
44997 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
44998 <td>in_intr</td>
44999 <td>1</td>
45000 </tr>
45001 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45002 (<strong>Reserved by System Firmware</strong>)</td>
45003 <td>209</td>
45004 <td>2</td>
45005 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45006 <td>in_intr</td>
45007 <td>2</td>
45008 </tr>
45009 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45010 (<strong>Reserved by System Firmware</strong>)</td>
45011 <td>209</td>
45012 <td>3</td>
45013 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45014 <td>in_intr</td>
45015 <td>3</td>
45016 </tr>
45017 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45018 (<strong>Reserved by System Firmware</strong>)</td>
45019 <td>209</td>
45020 <td>4</td>
45021 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45022 <td>in_intr</td>
45023 <td>4</td>
45024 </tr>
45025 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45026 (<strong>Reserved by System Firmware</strong>)</td>
45027 <td>209</td>
45028 <td>5</td>
45029 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45030 <td>in_intr</td>
45031 <td>5</td>
45032 </tr>
45033 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45034 (<strong>Reserved by System Firmware</strong>)</td>
45035 <td>209</td>
45036 <td>6</td>
45037 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45038 <td>in_intr</td>
45039 <td>6</td>
45040 </tr>
45041 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45042 (<strong>Reserved by System Firmware</strong>)</td>
45043 <td>209</td>
45044 <td>7</td>
45045 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45046 <td>in_intr</td>
45047 <td>7</td>
45048 </tr>
45049 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45050 (<strong>Reserved by System Firmware</strong>)</td>
45051 <td>209</td>
45052 <td>8</td>
45053 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45054 <td>in_intr</td>
45055 <td>8</td>
45056 </tr>
45057 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45058 (<strong>Reserved by System Firmware</strong>)</td>
45059 <td>209</td>
45060 <td>9</td>
45061 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45062 <td>in_intr</td>
45063 <td>9</td>
45064 </tr>
45065 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45066 (<strong>Reserved by System Firmware</strong>)</td>
45067 <td>209</td>
45068 <td>10</td>
45069 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45070 <td>in_intr</td>
45071 <td>10</td>
45072 </tr>
45073 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45074 (<strong>Reserved by System Firmware</strong>)</td>
45075 <td>209</td>
45076 <td>11</td>
45077 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45078 <td>in_intr</td>
45079 <td>11</td>
45080 </tr>
45081 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45082 (<strong>Reserved by System Firmware</strong>)</td>
45083 <td>209</td>
45084 <td>12</td>
45085 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45086 <td>in_intr</td>
45087 <td>12</td>
45088 </tr>
45089 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45090 (<strong>Reserved by System Firmware</strong>)</td>
45091 <td>209</td>
45092 <td>13</td>
45093 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45094 <td>in_intr</td>
45095 <td>13</td>
45096 </tr>
45097 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45098 (<strong>Reserved by System Firmware</strong>)</td>
45099 <td>209</td>
45100 <td>14</td>
45101 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45102 <td>in_intr</td>
45103 <td>14</td>
45104 </tr>
45105 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45106 (<strong>Reserved by System Firmware</strong>)</td>
45107 <td>209</td>
45108 <td>15</td>
45109 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45110 <td>in_intr</td>
45111 <td>15</td>
45112 </tr>
45113 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45114 (<strong>Reserved by System Firmware</strong>)</td>
45115 <td>209</td>
45116 <td>16</td>
45117 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45118 <td>in_intr</td>
45119 <td>16</td>
45120 </tr>
45121 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45122 (<strong>Reserved by System Firmware</strong>)</td>
45123 <td>209</td>
45124 <td>17</td>
45125 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45126 <td>in_intr</td>
45127 <td>17</td>
45128 </tr>
45129 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45130 (<strong>Reserved by System Firmware</strong>)</td>
45131 <td>209</td>
45132 <td>18</td>
45133 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45134 <td>in_intr</td>
45135 <td>18</td>
45136 </tr>
45137 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45138 (<strong>Reserved by System Firmware</strong>)</td>
45139 <td>209</td>
45140 <td>19</td>
45141 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45142 <td>in_intr</td>
45143 <td>19</td>
45144 </tr>
45145 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45146 (<strong>Reserved by System Firmware</strong>)</td>
45147 <td>209</td>
45148 <td>20</td>
45149 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45150 <td>in_intr</td>
45151 <td>20</td>
45152 </tr>
45153 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45154 (<strong>Reserved by System Firmware</strong>)</td>
45155 <td>209</td>
45156 <td>21</td>
45157 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45158 <td>in_intr</td>
45159 <td>21</td>
45160 </tr>
45161 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45162 (<strong>Reserved by System Firmware</strong>)</td>
45163 <td>209</td>
45164 <td>22</td>
45165 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45166 <td>in_intr</td>
45167 <td>22</td>
45168 </tr>
45169 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45170 (<strong>Reserved by System Firmware</strong>)</td>
45171 <td>209</td>
45172 <td>23</td>
45173 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45174 <td>in_intr</td>
45175 <td>23</td>
45176 </tr>
45177 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45178 (<strong>Reserved by System Firmware</strong>)</td>
45179 <td>209</td>
45180 <td>24</td>
45181 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45182 <td>in_intr</td>
45183 <td>24</td>
45184 </tr>
45185 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45186 (<strong>Reserved by System Firmware</strong>)</td>
45187 <td>209</td>
45188 <td>25</td>
45189 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45190 <td>in_intr</td>
45191 <td>25</td>
45192 </tr>
45193 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45194 (<strong>Reserved by System Firmware</strong>)</td>
45195 <td>209</td>
45196 <td>26</td>
45197 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45198 <td>in_intr</td>
45199 <td>26</td>
45200 </tr>
45201 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45202 (<strong>Reserved by System Firmware</strong>)</td>
45203 <td>209</td>
45204 <td>27</td>
45205 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45206 <td>in_intr</td>
45207 <td>27</td>
45208 </tr>
45209 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45210 (<strong>Reserved by System Firmware</strong>)</td>
45211 <td>209</td>
45212 <td>28</td>
45213 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45214 <td>in_intr</td>
45215 <td>28</td>
45216 </tr>
45217 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45218 (<strong>Reserved by System Firmware</strong>)</td>
45219 <td>209</td>
45220 <td>29</td>
45221 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45222 <td>in_intr</td>
45223 <td>29</td>
45224 </tr>
45225 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45226 (<strong>Reserved by System Firmware</strong>)</td>
45227 <td>209</td>
45228 <td>30</td>
45229 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45230 <td>in_intr</td>
45231 <td>30</td>
45232 </tr>
45233 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45234 (<strong>Reserved by System Firmware</strong>)</td>
45235 <td>209</td>
45236 <td>31</td>
45237 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45238 <td>in_intr</td>
45239 <td>31</td>
45240 </tr>
45241 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45242 (<strong>Reserved by System Firmware</strong>)</td>
45243 <td>209</td>
45244 <td>32</td>
45245 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45246 <td>in_intr</td>
45247 <td>32</td>
45248 </tr>
45249 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45250 (<strong>Reserved by System Firmware</strong>)</td>
45251 <td>209</td>
45252 <td>33</td>
45253 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45254 <td>in_intr</td>
45255 <td>33</td>
45256 </tr>
45257 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45258 (<strong>Reserved by System Firmware</strong>)</td>
45259 <td>209</td>
45260 <td>34</td>
45261 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45262 <td>in_intr</td>
45263 <td>34</td>
45264 </tr>
45265 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45266 (<strong>Reserved by System Firmware</strong>)</td>
45267 <td>209</td>
45268 <td>35</td>
45269 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45270 <td>in_intr</td>
45271 <td>35</td>
45272 </tr>
45273 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45274 (<strong>Reserved by System Firmware</strong>)</td>
45275 <td>209</td>
45276 <td>36</td>
45277 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45278 <td>in_intr</td>
45279 <td>36</td>
45280 </tr>
45281 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0
45282 (<strong>Reserved by System Firmware</strong>)</td>
45283 <td>209</td>
45284 <td>37</td>
45285 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45286 <td>in_intr</td>
45287 <td>37</td>
45288 </tr>
45289 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45290 <td>209</td>
45291 <td>38</td>
45292 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45293 <td>in_intr</td>
45294 <td>38</td>
45295 </tr>
45296 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45297 <td>209</td>
45298 <td>39</td>
45299 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45300 <td>in_intr</td>
45301 <td>39</td>
45302 </tr>
45303 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45304 <td>209</td>
45305 <td>40</td>
45306 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45307 <td>in_intr</td>
45308 <td>40</td>
45309 </tr>
45310 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45311 <td>209</td>
45312 <td>41</td>
45313 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45314 <td>in_intr</td>
45315 <td>41</td>
45316 </tr>
45317 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45318 <td>209</td>
45319 <td>42</td>
45320 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45321 <td>in_intr</td>
45322 <td>42</td>
45323 </tr>
45324 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45325 <td>209</td>
45326 <td>43</td>
45327 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45328 <td>in_intr</td>
45329 <td>43</td>
45330 </tr>
45331 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45332 <td>209</td>
45333 <td>44</td>
45334 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45335 <td>in_intr</td>
45336 <td>44</td>
45337 </tr>
45338 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45339 <td>209</td>
45340 <td>45</td>
45341 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45342 <td>in_intr</td>
45343 <td>45</td>
45344 </tr>
45345 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45346 <td>209</td>
45347 <td>46</td>
45348 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45349 <td>in_intr</td>
45350 <td>46</td>
45351 </tr>
45352 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45353 <td>209</td>
45354 <td>47</td>
45355 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45356 <td>in_intr</td>
45357 <td>47</td>
45358 </tr>
45359 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45360 <td>209</td>
45361 <td>48</td>
45362 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45363 <td>in_intr</td>
45364 <td>48</td>
45365 </tr>
45366 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45367 <td>209</td>
45368 <td>49</td>
45369 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45370 <td>in_intr</td>
45371 <td>49</td>
45372 </tr>
45373 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45374 <td>209</td>
45375 <td>50</td>
45376 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45377 <td>in_intr</td>
45378 <td>50</td>
45379 </tr>
45380 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45381 <td>209</td>
45382 <td>51</td>
45383 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45384 <td>in_intr</td>
45385 <td>51</td>
45386 </tr>
45387 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45388 <td>209</td>
45389 <td>52</td>
45390 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45391 <td>in_intr</td>
45392 <td>52</td>
45393 </tr>
45394 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45395 <td>209</td>
45396 <td>53</td>
45397 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45398 <td>in_intr</td>
45399 <td>53</td>
45400 </tr>
45401 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45402 <td>209</td>
45403 <td>54</td>
45404 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45405 <td>in_intr</td>
45406 <td>54</td>
45407 </tr>
45408 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45409 <td>209</td>
45410 <td>55</td>
45411 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45412 <td>in_intr</td>
45413 <td>55</td>
45414 </tr>
45415 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45416 <td>209</td>
45417 <td>56</td>
45418 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45419 <td>in_intr</td>
45420 <td>56</td>
45421 </tr>
45422 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45423 <td>209</td>
45424 <td>57</td>
45425 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45426 <td>in_intr</td>
45427 <td>57</td>
45428 </tr>
45429 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45430 <td>209</td>
45431 <td>58</td>
45432 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45433 <td>in_intr</td>
45434 <td>58</td>
45435 </tr>
45436 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45437 <td>209</td>
45438 <td>59</td>
45439 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45440 <td>in_intr</td>
45441 <td>59</td>
45442 </tr>
45443 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45444 <td>209</td>
45445 <td>60</td>
45446 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45447 <td>in_intr</td>
45448 <td>60</td>
45449 </tr>
45450 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45451 <td>209</td>
45452 <td>61</td>
45453 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45454 <td>in_intr</td>
45455 <td>61</td>
45456 </tr>
45457 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45458 <td>209</td>
45459 <td>62</td>
45460 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45461 <td>in_intr</td>
45462 <td>62</td>
45463 </tr>
45464 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45465 <td>209</td>
45466 <td>63</td>
45467 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45468 <td>in_intr</td>
45469 <td>63</td>
45470 </tr>
45471 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45472 <td>209</td>
45473 <td>64</td>
45474 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45475 <td>in_intr</td>
45476 <td>64</td>
45477 </tr>
45478 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45479 <td>209</td>
45480 <td>65</td>
45481 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45482 <td>in_intr</td>
45483 <td>65</td>
45484 </tr>
45485 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45486 <td>209</td>
45487 <td>66</td>
45488 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45489 <td>in_intr</td>
45490 <td>66</td>
45491 </tr>
45492 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45493 <td>209</td>
45494 <td>67</td>
45495 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45496 <td>in_intr</td>
45497 <td>67</td>
45498 </tr>
45499 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45500 <td>209</td>
45501 <td>68</td>
45502 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45503 <td>in_intr</td>
45504 <td>68</td>
45505 </tr>
45506 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45507 <td>209</td>
45508 <td>69</td>
45509 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45510 <td>in_intr</td>
45511 <td>69</td>
45512 </tr>
45513 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45514 <td>209</td>
45515 <td>70</td>
45516 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45517 <td>in_intr</td>
45518 <td>70</td>
45519 </tr>
45520 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45521 <td>209</td>
45522 <td>71</td>
45523 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45524 <td>in_intr</td>
45525 <td>71</td>
45526 </tr>
45527 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45528 <td>209</td>
45529 <td>72</td>
45530 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45531 <td>in_intr</td>
45532 <td>72</td>
45533 </tr>
45534 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45535 <td>209</td>
45536 <td>73</td>
45537 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45538 <td>in_intr</td>
45539 <td>73</td>
45540 </tr>
45541 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45542 <td>209</td>
45543 <td>74</td>
45544 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45545 <td>in_intr</td>
45546 <td>74</td>
45547 </tr>
45548 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45549 <td>209</td>
45550 <td>75</td>
45551 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45552 <td>in_intr</td>
45553 <td>75</td>
45554 </tr>
45555 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45556 <td>209</td>
45557 <td>76</td>
45558 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45559 <td>in_intr</td>
45560 <td>76</td>
45561 </tr>
45562 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45563 <td>209</td>
45564 <td>77</td>
45565 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45566 <td>in_intr</td>
45567 <td>77</td>
45568 </tr>
45569 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45570 <td>209</td>
45571 <td>78</td>
45572 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45573 <td>in_intr</td>
45574 <td>78</td>
45575 </tr>
45576 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45577 <td>209</td>
45578 <td>79</td>
45579 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45580 <td>in_intr</td>
45581 <td>79</td>
45582 </tr>
45583 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45584 <td>209</td>
45585 <td>80</td>
45586 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45587 <td>in_intr</td>
45588 <td>80</td>
45589 </tr>
45590 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45591 <td>209</td>
45592 <td>81</td>
45593 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45594 <td>in_intr</td>
45595 <td>81</td>
45596 </tr>
45597 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45598 <td>209</td>
45599 <td>82</td>
45600 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45601 <td>in_intr</td>
45602 <td>82</td>
45603 </tr>
45604 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45605 <td>209</td>
45606 <td>83</td>
45607 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45608 <td>in_intr</td>
45609 <td>83</td>
45610 </tr>
45611 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45612 <td>209</td>
45613 <td>84</td>
45614 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45615 <td>in_intr</td>
45616 <td>84</td>
45617 </tr>
45618 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45619 <td>209</td>
45620 <td>85</td>
45621 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45622 <td>in_intr</td>
45623 <td>85</td>
45624 </tr>
45625 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45626 <td>209</td>
45627 <td>86</td>
45628 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45629 <td>in_intr</td>
45630 <td>86</td>
45631 </tr>
45632 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45633 <td>209</td>
45634 <td>87</td>
45635 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45636 <td>in_intr</td>
45637 <td>87</td>
45638 </tr>
45639 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45640 <td>209</td>
45641 <td>88</td>
45642 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45643 <td>in_intr</td>
45644 <td>88</td>
45645 </tr>
45646 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45647 <td>209</td>
45648 <td>89</td>
45649 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45650 <td>in_intr</td>
45651 <td>89</td>
45652 </tr>
45653 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45654 <td>209</td>
45655 <td>90</td>
45656 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45657 <td>in_intr</td>
45658 <td>90</td>
45659 </tr>
45660 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45661 <td>209</td>
45662 <td>91</td>
45663 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45664 <td>in_intr</td>
45665 <td>91</td>
45666 </tr>
45667 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45668 <td>209</td>
45669 <td>92</td>
45670 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45671 <td>in_intr</td>
45672 <td>92</td>
45673 </tr>
45674 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45675 <td>209</td>
45676 <td>93</td>
45677 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45678 <td>in_intr</td>
45679 <td>93</td>
45680 </tr>
45681 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45682 <td>209</td>
45683 <td>94</td>
45684 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45685 <td>in_intr</td>
45686 <td>94</td>
45687 </tr>
45688 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45689 <td>209</td>
45690 <td>95</td>
45691 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45692 <td>in_intr</td>
45693 <td>95</td>
45694 </tr>
45695 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45696 <td>209</td>
45697 <td>96</td>
45698 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45699 <td>in_intr</td>
45700 <td>96</td>
45701 </tr>
45702 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45703 <td>209</td>
45704 <td>97</td>
45705 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45706 <td>in_intr</td>
45707 <td>97</td>
45708 </tr>
45709 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45710 <td>209</td>
45711 <td>98</td>
45712 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45713 <td>in_intr</td>
45714 <td>98</td>
45715 </tr>
45716 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45717 <td>209</td>
45718 <td>99</td>
45719 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45720 <td>in_intr</td>
45721 <td>99</td>
45722 </tr>
45723 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45724 <td>209</td>
45725 <td>100</td>
45726 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45727 <td>in_intr</td>
45728 <td>100</td>
45729 </tr>
45730 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45731 <td>209</td>
45732 <td>101</td>
45733 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45734 <td>in_intr</td>
45735 <td>101</td>
45736 </tr>
45737 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45738 <td>209</td>
45739 <td>102</td>
45740 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45741 <td>in_intr</td>
45742 <td>102</td>
45743 </tr>
45744 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45745 <td>209</td>
45746 <td>103</td>
45747 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45748 <td>in_intr</td>
45749 <td>103</td>
45750 </tr>
45751 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45752 <td>209</td>
45753 <td>104</td>
45754 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45755 <td>in_intr</td>
45756 <td>104</td>
45757 </tr>
45758 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45759 <td>209</td>
45760 <td>105</td>
45761 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45762 <td>in_intr</td>
45763 <td>105</td>
45764 </tr>
45765 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45766 <td>209</td>
45767 <td>106</td>
45768 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45769 <td>in_intr</td>
45770 <td>106</td>
45771 </tr>
45772 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45773 <td>209</td>
45774 <td>107</td>
45775 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45776 <td>in_intr</td>
45777 <td>107</td>
45778 </tr>
45779 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45780 <td>209</td>
45781 <td>108</td>
45782 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45783 <td>in_intr</td>
45784 <td>108</td>
45785 </tr>
45786 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45787 <td>209</td>
45788 <td>109</td>
45789 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45790 <td>in_intr</td>
45791 <td>109</td>
45792 </tr>
45793 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45794 <td>209</td>
45795 <td>110</td>
45796 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45797 <td>in_intr</td>
45798 <td>110</td>
45799 </tr>
45800 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45801 <td>209</td>
45802 <td>111</td>
45803 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45804 <td>in_intr</td>
45805 <td>111</td>
45806 </tr>
45807 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45808 <td>209</td>
45809 <td>112</td>
45810 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45811 <td>in_intr</td>
45812 <td>112</td>
45813 </tr>
45814 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45815 <td>209</td>
45816 <td>113</td>
45817 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45818 <td>in_intr</td>
45819 <td>113</td>
45820 </tr>
45821 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45822 <td>209</td>
45823 <td>114</td>
45824 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45825 <td>in_intr</td>
45826 <td>114</td>
45827 </tr>
45828 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45829 <td>209</td>
45830 <td>115</td>
45831 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45832 <td>in_intr</td>
45833 <td>115</td>
45834 </tr>
45835 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45836 <td>209</td>
45837 <td>116</td>
45838 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45839 <td>in_intr</td>
45840 <td>116</td>
45841 </tr>
45842 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45843 <td>209</td>
45844 <td>117</td>
45845 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45846 <td>in_intr</td>
45847 <td>117</td>
45848 </tr>
45849 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45850 <td>209</td>
45851 <td>118</td>
45852 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45853 <td>in_intr</td>
45854 <td>118</td>
45855 </tr>
45856 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45857 <td>209</td>
45858 <td>119</td>
45859 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45860 <td>in_intr</td>
45861 <td>119</td>
45862 </tr>
45863 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45864 <td>209</td>
45865 <td>120</td>
45866 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45867 <td>in_intr</td>
45868 <td>120</td>
45869 </tr>
45870 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45871 <td>209</td>
45872 <td>121</td>
45873 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45874 <td>in_intr</td>
45875 <td>121</td>
45876 </tr>
45877 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45878 <td>209</td>
45879 <td>122</td>
45880 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45881 <td>in_intr</td>
45882 <td>122</td>
45883 </tr>
45884 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45885 <td>209</td>
45886 <td>123</td>
45887 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45888 <td>in_intr</td>
45889 <td>123</td>
45890 </tr>
45891 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45892 <td>209</td>
45893 <td>124</td>
45894 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45895 <td>in_intr</td>
45896 <td>124</td>
45897 </tr>
45898 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45899 <td>209</td>
45900 <td>125</td>
45901 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45902 <td>in_intr</td>
45903 <td>125</td>
45904 </tr>
45905 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45906 <td>209</td>
45907 <td>126</td>
45908 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45909 <td>in_intr</td>
45910 <td>126</td>
45911 </tr>
45912 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45913 <td>209</td>
45914 <td>127</td>
45915 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45916 <td>in_intr</td>
45917 <td>127</td>
45918 </tr>
45919 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45920 <td>209</td>
45921 <td>128</td>
45922 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45923 <td>in_intr</td>
45924 <td>128</td>
45925 </tr>
45926 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45927 <td>209</td>
45928 <td>129</td>
45929 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45930 <td>in_intr</td>
45931 <td>129</td>
45932 </tr>
45933 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45934 <td>209</td>
45935 <td>130</td>
45936 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45937 <td>in_intr</td>
45938 <td>130</td>
45939 </tr>
45940 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45941 <td>209</td>
45942 <td>131</td>
45943 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45944 <td>in_intr</td>
45945 <td>131</td>
45946 </tr>
45947 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45948 <td>209</td>
45949 <td>132</td>
45950 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45951 <td>in_intr</td>
45952 <td>132</td>
45953 </tr>
45954 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45955 <td>209</td>
45956 <td>133</td>
45957 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45958 <td>in_intr</td>
45959 <td>133</td>
45960 </tr>
45961 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45962 <td>209</td>
45963 <td>134</td>
45964 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45965 <td>in_intr</td>
45966 <td>134</td>
45967 </tr>
45968 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45969 <td>209</td>
45970 <td>135</td>
45971 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45972 <td>in_intr</td>
45973 <td>135</td>
45974 </tr>
45975 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45976 <td>209</td>
45977 <td>136</td>
45978 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45979 <td>in_intr</td>
45980 <td>136</td>
45981 </tr>
45982 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45983 <td>209</td>
45984 <td>137</td>
45985 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45986 <td>in_intr</td>
45987 <td>137</td>
45988 </tr>
45989 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45990 <td>209</td>
45991 <td>138</td>
45992 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
45993 <td>in_intr</td>
45994 <td>138</td>
45995 </tr>
45996 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
45997 <td>209</td>
45998 <td>139</td>
45999 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46000 <td>in_intr</td>
46001 <td>139</td>
46002 </tr>
46003 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46004 <td>209</td>
46005 <td>140</td>
46006 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46007 <td>in_intr</td>
46008 <td>140</td>
46009 </tr>
46010 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46011 <td>209</td>
46012 <td>141</td>
46013 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46014 <td>in_intr</td>
46015 <td>141</td>
46016 </tr>
46017 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46018 <td>209</td>
46019 <td>142</td>
46020 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46021 <td>in_intr</td>
46022 <td>142</td>
46023 </tr>
46024 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46025 <td>209</td>
46026 <td>143</td>
46027 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46028 <td>in_intr</td>
46029 <td>143</td>
46030 </tr>
46031 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46032 <td>209</td>
46033 <td>144</td>
46034 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46035 <td>in_intr</td>
46036 <td>144</td>
46037 </tr>
46038 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46039 <td>209</td>
46040 <td>145</td>
46041 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46042 <td>in_intr</td>
46043 <td>145</td>
46044 </tr>
46045 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46046 <td>209</td>
46047 <td>146</td>
46048 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46049 <td>in_intr</td>
46050 <td>146</td>
46051 </tr>
46052 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46053 <td>209</td>
46054 <td>147</td>
46055 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46056 <td>in_intr</td>
46057 <td>147</td>
46058 </tr>
46059 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46060 <td>209</td>
46061 <td>148</td>
46062 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46063 <td>in_intr</td>
46064 <td>148</td>
46065 </tr>
46066 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46067 <td>209</td>
46068 <td>149</td>
46069 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46070 <td>in_intr</td>
46071 <td>149</td>
46072 </tr>
46073 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46074 <td>209</td>
46075 <td>150</td>
46076 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46077 <td>in_intr</td>
46078 <td>150</td>
46079 </tr>
46080 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46081 <td>209</td>
46082 <td>151</td>
46083 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46084 <td>in_intr</td>
46085 <td>151</td>
46086 </tr>
46087 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46088 <td>209</td>
46089 <td>152</td>
46090 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46091 <td>in_intr</td>
46092 <td>152</td>
46093 </tr>
46094 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46095 <td>209</td>
46096 <td>153</td>
46097 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46098 <td>in_intr</td>
46099 <td>153</td>
46100 </tr>
46101 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46102 <td>209</td>
46103 <td>154</td>
46104 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46105 <td>in_intr</td>
46106 <td>154</td>
46107 </tr>
46108 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46109 <td>209</td>
46110 <td>155</td>
46111 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46112 <td>in_intr</td>
46113 <td>155</td>
46114 </tr>
46115 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46116 <td>209</td>
46117 <td>156</td>
46118 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46119 <td>in_intr</td>
46120 <td>156</td>
46121 </tr>
46122 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46123 <td>209</td>
46124 <td>157</td>
46125 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46126 <td>in_intr</td>
46127 <td>157</td>
46128 </tr>
46129 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46130 <td>209</td>
46131 <td>158</td>
46132 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46133 <td>in_intr</td>
46134 <td>158</td>
46135 </tr>
46136 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46137 <td>209</td>
46138 <td>159</td>
46139 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46140 <td>in_intr</td>
46141 <td>159</td>
46142 </tr>
46143 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46144 <td>209</td>
46145 <td>160</td>
46146 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46147 <td>in_intr</td>
46148 <td>160</td>
46149 </tr>
46150 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46151 <td>209</td>
46152 <td>161</td>
46153 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46154 <td>in_intr</td>
46155 <td>161</td>
46156 </tr>
46157 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46158 <td>209</td>
46159 <td>162</td>
46160 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46161 <td>in_intr</td>
46162 <td>162</td>
46163 </tr>
46164 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46165 <td>209</td>
46166 <td>163</td>
46167 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46168 <td>in_intr</td>
46169 <td>163</td>
46170 </tr>
46171 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46172 <td>209</td>
46173 <td>164</td>
46174 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46175 <td>in_intr</td>
46176 <td>164</td>
46177 </tr>
46178 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46179 <td>209</td>
46180 <td>165</td>
46181 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46182 <td>in_intr</td>
46183 <td>165</td>
46184 </tr>
46185 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46186 <td>209</td>
46187 <td>166</td>
46188 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46189 <td>in_intr</td>
46190 <td>166</td>
46191 </tr>
46192 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46193 <td>209</td>
46194 <td>167</td>
46195 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46196 <td>in_intr</td>
46197 <td>167</td>
46198 </tr>
46199 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46200 <td>209</td>
46201 <td>168</td>
46202 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46203 <td>in_intr</td>
46204 <td>168</td>
46205 </tr>
46206 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46207 <td>209</td>
46208 <td>169</td>
46209 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46210 <td>in_intr</td>
46211 <td>169</td>
46212 </tr>
46213 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46214 <td>209</td>
46215 <td>170</td>
46216 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46217 <td>in_intr</td>
46218 <td>170</td>
46219 </tr>
46220 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46221 <td>209</td>
46222 <td>171</td>
46223 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46224 <td>in_intr</td>
46225 <td>171</td>
46226 </tr>
46227 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46228 <td>209</td>
46229 <td>172</td>
46230 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46231 <td>in_intr</td>
46232 <td>172</td>
46233 </tr>
46234 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46235 <td>209</td>
46236 <td>173</td>
46237 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46238 <td>in_intr</td>
46239 <td>173</td>
46240 </tr>
46241 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46242 <td>209</td>
46243 <td>174</td>
46244 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46245 <td>in_intr</td>
46246 <td>174</td>
46247 </tr>
46248 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46249 <td>209</td>
46250 <td>175</td>
46251 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46252 <td>in_intr</td>
46253 <td>175</td>
46254 </tr>
46255 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46256 <td>209</td>
46257 <td>176</td>
46258 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46259 <td>in_intr</td>
46260 <td>176</td>
46261 </tr>
46262 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46263 <td>209</td>
46264 <td>177</td>
46265 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46266 <td>in_intr</td>
46267 <td>177</td>
46268 </tr>
46269 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46270 <td>209</td>
46271 <td>178</td>
46272 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46273 <td>in_intr</td>
46274 <td>178</td>
46275 </tr>
46276 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46277 <td>209</td>
46278 <td>179</td>
46279 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46280 <td>in_intr</td>
46281 <td>179</td>
46282 </tr>
46283 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46284 <td>209</td>
46285 <td>180</td>
46286 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46287 <td>in_intr</td>
46288 <td>180</td>
46289 </tr>
46290 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46291 <td>209</td>
46292 <td>181</td>
46293 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46294 <td>in_intr</td>
46295 <td>181</td>
46296 </tr>
46297 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46298 <td>209</td>
46299 <td>182</td>
46300 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46301 <td>in_intr</td>
46302 <td>182</td>
46303 </tr>
46304 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46305 <td>209</td>
46306 <td>183</td>
46307 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46308 <td>in_intr</td>
46309 <td>183</td>
46310 </tr>
46311 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46312 <td>209</td>
46313 <td>184</td>
46314 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46315 <td>in_intr</td>
46316 <td>184</td>
46317 </tr>
46318 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46319 <td>209</td>
46320 <td>185</td>
46321 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46322 <td>in_intr</td>
46323 <td>185</td>
46324 </tr>
46325 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46326 <td>209</td>
46327 <td>186</td>
46328 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46329 <td>in_intr</td>
46330 <td>186</td>
46331 </tr>
46332 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46333 <td>209</td>
46334 <td>187</td>
46335 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46336 <td>in_intr</td>
46337 <td>187</td>
46338 </tr>
46339 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46340 <td>209</td>
46341 <td>188</td>
46342 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46343 <td>in_intr</td>
46344 <td>188</td>
46345 </tr>
46346 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46347 <td>209</td>
46348 <td>189</td>
46349 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46350 <td>in_intr</td>
46351 <td>189</td>
46352 </tr>
46353 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46354 <td>209</td>
46355 <td>190</td>
46356 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46357 <td>in_intr</td>
46358 <td>190</td>
46359 </tr>
46360 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46361 <td>209</td>
46362 <td>191</td>
46363 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46364 <td>in_intr</td>
46365 <td>191</td>
46366 </tr>
46367 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46368 <td>209</td>
46369 <td>192</td>
46370 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46371 <td>in_intr</td>
46372 <td>192</td>
46373 </tr>
46374 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46375 <td>209</td>
46376 <td>193</td>
46377 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46378 <td>in_intr</td>
46379 <td>193</td>
46380 </tr>
46381 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46382 <td>209</td>
46383 <td>194</td>
46384 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46385 <td>in_intr</td>
46386 <td>194</td>
46387 </tr>
46388 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46389 <td>209</td>
46390 <td>195</td>
46391 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46392 <td>in_intr</td>
46393 <td>195</td>
46394 </tr>
46395 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46396 <td>209</td>
46397 <td>196</td>
46398 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46399 <td>in_intr</td>
46400 <td>196</td>
46401 </tr>
46402 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46403 <td>209</td>
46404 <td>197</td>
46405 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46406 <td>in_intr</td>
46407 <td>197</td>
46408 </tr>
46409 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46410 <td>209</td>
46411 <td>198</td>
46412 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46413 <td>in_intr</td>
46414 <td>198</td>
46415 </tr>
46416 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46417 <td>209</td>
46418 <td>199</td>
46419 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46420 <td>in_intr</td>
46421 <td>199</td>
46422 </tr>
46423 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46424 <td>209</td>
46425 <td>200</td>
46426 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46427 <td>in_intr</td>
46428 <td>200</td>
46429 </tr>
46430 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46431 <td>209</td>
46432 <td>201</td>
46433 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46434 <td>in_intr</td>
46435 <td>201</td>
46436 </tr>
46437 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46438 <td>209</td>
46439 <td>202</td>
46440 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46441 <td>in_intr</td>
46442 <td>202</td>
46443 </tr>
46444 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46445 <td>209</td>
46446 <td>203</td>
46447 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46448 <td>in_intr</td>
46449 <td>203</td>
46450 </tr>
46451 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46452 <td>209</td>
46453 <td>204</td>
46454 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46455 <td>in_intr</td>
46456 <td>204</td>
46457 </tr>
46458 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46459 <td>209</td>
46460 <td>205</td>
46461 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46462 <td>in_intr</td>
46463 <td>205</td>
46464 </tr>
46465 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46466 <td>209</td>
46467 <td>206</td>
46468 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46469 <td>in_intr</td>
46470 <td>206</td>
46471 </tr>
46472 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46473 <td>209</td>
46474 <td>207</td>
46475 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46476 <td>in_intr</td>
46477 <td>207</td>
46478 </tr>
46479 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46480 <td>209</td>
46481 <td>208</td>
46482 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46483 <td>in_intr</td>
46484 <td>208</td>
46485 </tr>
46486 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46487 <td>209</td>
46488 <td>209</td>
46489 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46490 <td>in_intr</td>
46491 <td>209</td>
46492 </tr>
46493 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46494 <td>209</td>
46495 <td>210</td>
46496 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46497 <td>in_intr</td>
46498 <td>210</td>
46499 </tr>
46500 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46501 <td>209</td>
46502 <td>211</td>
46503 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46504 <td>in_intr</td>
46505 <td>211</td>
46506 </tr>
46507 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46508 <td>209</td>
46509 <td>212</td>
46510 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46511 <td>in_intr</td>
46512 <td>212</td>
46513 </tr>
46514 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46515 <td>209</td>
46516 <td>213</td>
46517 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46518 <td>in_intr</td>
46519 <td>213</td>
46520 </tr>
46521 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46522 <td>209</td>
46523 <td>214</td>
46524 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46525 <td>in_intr</td>
46526 <td>214</td>
46527 </tr>
46528 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46529 <td>209</td>
46530 <td>215</td>
46531 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46532 <td>in_intr</td>
46533 <td>215</td>
46534 </tr>
46535 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46536 <td>209</td>
46537 <td>216</td>
46538 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46539 <td>in_intr</td>
46540 <td>216</td>
46541 </tr>
46542 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46543 <td>209</td>
46544 <td>217</td>
46545 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46546 <td>in_intr</td>
46547 <td>217</td>
46548 </tr>
46549 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46550 <td>209</td>
46551 <td>218</td>
46552 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46553 <td>in_intr</td>
46554 <td>218</td>
46555 </tr>
46556 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46557 <td>209</td>
46558 <td>219</td>
46559 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46560 <td>in_intr</td>
46561 <td>219</td>
46562 </tr>
46563 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46564 <td>209</td>
46565 <td>220</td>
46566 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46567 <td>in_intr</td>
46568 <td>220</td>
46569 </tr>
46570 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46571 <td>209</td>
46572 <td>221</td>
46573 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46574 <td>in_intr</td>
46575 <td>221</td>
46576 </tr>
46577 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46578 <td>209</td>
46579 <td>222</td>
46580 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46581 <td>in_intr</td>
46582 <td>222</td>
46583 </tr>
46584 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46585 <td>209</td>
46586 <td>223</td>
46587 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46588 <td>in_intr</td>
46589 <td>223</td>
46590 </tr>
46591 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46592 <td>209</td>
46593 <td>224</td>
46594 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46595 <td>in_intr</td>
46596 <td>224</td>
46597 </tr>
46598 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46599 <td>209</td>
46600 <td>225</td>
46601 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46602 <td>in_intr</td>
46603 <td>225</td>
46604 </tr>
46605 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46606 <td>209</td>
46607 <td>226</td>
46608 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46609 <td>in_intr</td>
46610 <td>226</td>
46611 </tr>
46612 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46613 <td>209</td>
46614 <td>227</td>
46615 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46616 <td>in_intr</td>
46617 <td>227</td>
46618 </tr>
46619 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46620 <td>209</td>
46621 <td>228</td>
46622 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46623 <td>in_intr</td>
46624 <td>228</td>
46625 </tr>
46626 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46627 <td>209</td>
46628 <td>229</td>
46629 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46630 <td>in_intr</td>
46631 <td>229</td>
46632 </tr>
46633 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46634 <td>209</td>
46635 <td>230</td>
46636 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46637 <td>in_intr</td>
46638 <td>230</td>
46639 </tr>
46640 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46641 <td>209</td>
46642 <td>231</td>
46643 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46644 <td>in_intr</td>
46645 <td>231</td>
46646 </tr>
46647 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46648 <td>209</td>
46649 <td>232</td>
46650 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46651 <td>in_intr</td>
46652 <td>232</td>
46653 </tr>
46654 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46655 <td>209</td>
46656 <td>233</td>
46657 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46658 <td>in_intr</td>
46659 <td>233</td>
46660 </tr>
46661 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46662 <td>209</td>
46663 <td>234</td>
46664 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46665 <td>in_intr</td>
46666 <td>234</td>
46667 </tr>
46668 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46669 <td>209</td>
46670 <td>235</td>
46671 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46672 <td>in_intr</td>
46673 <td>235</td>
46674 </tr>
46675 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46676 <td>209</td>
46677 <td>236</td>
46678 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46679 <td>in_intr</td>
46680 <td>236</td>
46681 </tr>
46682 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46683 <td>209</td>
46684 <td>237</td>
46685 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46686 <td>in_intr</td>
46687 <td>237</td>
46688 </tr>
46689 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46690 <td>209</td>
46691 <td>238</td>
46692 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46693 <td>in_intr</td>
46694 <td>238</td>
46695 </tr>
46696 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46697 <td>209</td>
46698 <td>239</td>
46699 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46700 <td>in_intr</td>
46701 <td>239</td>
46702 </tr>
46703 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46704 <td>209</td>
46705 <td>240</td>
46706 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46707 <td>in_intr</td>
46708 <td>240</td>
46709 </tr>
46710 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46711 <td>209</td>
46712 <td>241</td>
46713 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46714 <td>in_intr</td>
46715 <td>241</td>
46716 </tr>
46717 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46718 <td>209</td>
46719 <td>242</td>
46720 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46721 <td>in_intr</td>
46722 <td>242</td>
46723 </tr>
46724 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46725 <td>209</td>
46726 <td>243</td>
46727 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46728 <td>in_intr</td>
46729 <td>243</td>
46730 </tr>
46731 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46732 <td>209</td>
46733 <td>244</td>
46734 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46735 <td>in_intr</td>
46736 <td>244</td>
46737 </tr>
46738 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46739 <td>209</td>
46740 <td>245</td>
46741 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46742 <td>in_intr</td>
46743 <td>245</td>
46744 </tr>
46745 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46746 <td>209</td>
46747 <td>246</td>
46748 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46749 <td>in_intr</td>
46750 <td>246</td>
46751 </tr>
46752 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46753 <td>209</td>
46754 <td>247</td>
46755 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46756 <td>in_intr</td>
46757 <td>247</td>
46758 </tr>
46759 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46760 <td>209</td>
46761 <td>248</td>
46762 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46763 <td>in_intr</td>
46764 <td>248</td>
46765 </tr>
46766 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46767 <td>209</td>
46768 <td>249</td>
46769 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46770 <td>in_intr</td>
46771 <td>249</td>
46772 </tr>
46773 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46774 <td>209</td>
46775 <td>250</td>
46776 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46777 <td>in_intr</td>
46778 <td>250</td>
46779 </tr>
46780 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46781 <td>209</td>
46782 <td>251</td>
46783 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46784 <td>in_intr</td>
46785 <td>251</td>
46786 </tr>
46787 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46788 <td>209</td>
46789 <td>252</td>
46790 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46791 <td>in_intr</td>
46792 <td>252</td>
46793 </tr>
46794 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46795 <td>209</td>
46796 <td>253</td>
46797 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46798 <td>in_intr</td>
46799 <td>253</td>
46800 </tr>
46801 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46802 <td>209</td>
46803 <td>254</td>
46804 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46805 <td>in_intr</td>
46806 <td>254</td>
46807 </tr>
46808 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMASS_INTAGGR_0</td>
46809 <td>209</td>
46810 <td>255</td>
46811 <td>J721E_DEV_NAVSS0_INTR_ROUTER_0</td>
46812 <td>in_intr</td>
46813 <td>255</td>
46814 </tr>
46815 </tbody>
46816 </table>
46817 </div>
46818 <div class="section" id="mcu-navss0-udmass-inta-0-interrupt-aggregator-virtual-interrupt-destinations">
46819 <span id="pub-soc-j721e-mcu-navss0-udmass-inta-0-vint-output-dst-list"></span><h2>MCU_NAVSS0_UDMASS_INTA_0 Interrupt Aggregator Virtual Interrupt Destinations<a class="headerlink" href="#mcu-navss0-udmass-inta-0-interrupt-aggregator-virtual-interrupt-destinations" title="Permalink to this headline">¶</a></h2>
46820 <div class="admonition warning">
46821 <p class="first admonition-title">Warning</p>
46822 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
46823 host within the RM Board Configuration resource assignment array.  The RM
46824 Board Configuration is rejected if an overlap with a reserved resource is
46825 detected.</p>
46826 </div>
46827 <table border="1" class="docutils">
46828 <colgroup>
46829 <col width="25%" />
46830 <col width="11%" />
46831 <col width="12%" />
46832 <col width="20%" />
46833 <col width="17%" />
46834 <col width="15%" />
46835 </colgroup>
46836 <thead valign="bottom">
46837 <tr class="row-odd"><th class="head">IA Name</th>
46838 <th class="head">IA Device ID</th>
46839 <th class="head">IA VINT Index</th>
46840 <th class="head">Destination Name</th>
46841 <th class="head">Destination Interface</th>
46842 <th class="head">Destination Index</th>
46843 </tr>
46844 </thead>
46845 <tbody valign="top">
46846 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46847 (<strong>Reserved by System Firmware</strong>)</td>
46848 <td>233</td>
46849 <td>0</td>
46850 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46851 <td>in_intr</td>
46852 <td>0</td>
46853 </tr>
46854 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46855 (<strong>Reserved by System Firmware</strong>)</td>
46856 <td>233</td>
46857 <td>1</td>
46858 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46859 <td>in_intr</td>
46860 <td>1</td>
46861 </tr>
46862 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46863 (<strong>Reserved by System Firmware</strong>)</td>
46864 <td>233</td>
46865 <td>2</td>
46866 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46867 <td>in_intr</td>
46868 <td>2</td>
46869 </tr>
46870 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46871 (<strong>Reserved by System Firmware</strong>)</td>
46872 <td>233</td>
46873 <td>3</td>
46874 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46875 <td>in_intr</td>
46876 <td>3</td>
46877 </tr>
46878 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46879 (<strong>Reserved by System Firmware</strong>)</td>
46880 <td>233</td>
46881 <td>4</td>
46882 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46883 <td>in_intr</td>
46884 <td>4</td>
46885 </tr>
46886 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46887 (<strong>Reserved by System Firmware</strong>)</td>
46888 <td>233</td>
46889 <td>5</td>
46890 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46891 <td>in_intr</td>
46892 <td>5</td>
46893 </tr>
46894 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46895 (<strong>Reserved by System Firmware</strong>)</td>
46896 <td>233</td>
46897 <td>6</td>
46898 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46899 <td>in_intr</td>
46900 <td>6</td>
46901 </tr>
46902 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46903 (<strong>Reserved by System Firmware</strong>)</td>
46904 <td>233</td>
46905 <td>7</td>
46906 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46907 <td>in_intr</td>
46908 <td>7</td>
46909 </tr>
46910 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46911 (<strong>Reserved by System Firmware</strong>)</td>
46912 <td>233</td>
46913 <td>8</td>
46914 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46915 <td>in_intr</td>
46916 <td>8</td>
46917 </tr>
46918 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46919 (<strong>Reserved by System Firmware</strong>)</td>
46920 <td>233</td>
46921 <td>9</td>
46922 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46923 <td>in_intr</td>
46924 <td>9</td>
46925 </tr>
46926 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46927 (<strong>Reserved by System Firmware</strong>)</td>
46928 <td>233</td>
46929 <td>10</td>
46930 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46931 <td>in_intr</td>
46932 <td>10</td>
46933 </tr>
46934 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46935 (<strong>Reserved by System Firmware</strong>)</td>
46936 <td>233</td>
46937 <td>11</td>
46938 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46939 <td>in_intr</td>
46940 <td>11</td>
46941 </tr>
46942 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46943 (<strong>Reserved by System Firmware</strong>)</td>
46944 <td>233</td>
46945 <td>12</td>
46946 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46947 <td>in_intr</td>
46948 <td>12</td>
46949 </tr>
46950 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46951 (<strong>Reserved by System Firmware</strong>)</td>
46952 <td>233</td>
46953 <td>13</td>
46954 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46955 <td>in_intr</td>
46956 <td>13</td>
46957 </tr>
46958 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46959 (<strong>Reserved by System Firmware</strong>)</td>
46960 <td>233</td>
46961 <td>14</td>
46962 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46963 <td>in_intr</td>
46964 <td>14</td>
46965 </tr>
46966 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0
46967 (<strong>Reserved by System Firmware</strong>)</td>
46968 <td>233</td>
46969 <td>15</td>
46970 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46971 <td>in_intr</td>
46972 <td>15</td>
46973 </tr>
46974 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
46975 <td>233</td>
46976 <td>16</td>
46977 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46978 <td>in_intr</td>
46979 <td>16</td>
46980 </tr>
46981 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
46982 <td>233</td>
46983 <td>17</td>
46984 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46985 <td>in_intr</td>
46986 <td>17</td>
46987 </tr>
46988 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
46989 <td>233</td>
46990 <td>18</td>
46991 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46992 <td>in_intr</td>
46993 <td>18</td>
46994 </tr>
46995 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
46996 <td>233</td>
46997 <td>19</td>
46998 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
46999 <td>in_intr</td>
47000 <td>19</td>
47001 </tr>
47002 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47003 <td>233</td>
47004 <td>20</td>
47005 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47006 <td>in_intr</td>
47007 <td>20</td>
47008 </tr>
47009 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47010 <td>233</td>
47011 <td>21</td>
47012 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47013 <td>in_intr</td>
47014 <td>21</td>
47015 </tr>
47016 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47017 <td>233</td>
47018 <td>22</td>
47019 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47020 <td>in_intr</td>
47021 <td>22</td>
47022 </tr>
47023 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47024 <td>233</td>
47025 <td>23</td>
47026 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47027 <td>in_intr</td>
47028 <td>23</td>
47029 </tr>
47030 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47031 <td>233</td>
47032 <td>24</td>
47033 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47034 <td>in_intr</td>
47035 <td>24</td>
47036 </tr>
47037 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47038 <td>233</td>
47039 <td>25</td>
47040 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47041 <td>in_intr</td>
47042 <td>25</td>
47043 </tr>
47044 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47045 <td>233</td>
47046 <td>26</td>
47047 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47048 <td>in_intr</td>
47049 <td>26</td>
47050 </tr>
47051 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47052 <td>233</td>
47053 <td>27</td>
47054 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47055 <td>in_intr</td>
47056 <td>27</td>
47057 </tr>
47058 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47059 <td>233</td>
47060 <td>28</td>
47061 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47062 <td>in_intr</td>
47063 <td>28</td>
47064 </tr>
47065 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47066 <td>233</td>
47067 <td>29</td>
47068 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47069 <td>in_intr</td>
47070 <td>29</td>
47071 </tr>
47072 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47073 <td>233</td>
47074 <td>30</td>
47075 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47076 <td>in_intr</td>
47077 <td>30</td>
47078 </tr>
47079 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47080 <td>233</td>
47081 <td>31</td>
47082 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47083 <td>in_intr</td>
47084 <td>31</td>
47085 </tr>
47086 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47087 <td>233</td>
47088 <td>32</td>
47089 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47090 <td>in_intr</td>
47091 <td>32</td>
47092 </tr>
47093 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47094 <td>233</td>
47095 <td>33</td>
47096 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47097 <td>in_intr</td>
47098 <td>33</td>
47099 </tr>
47100 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47101 <td>233</td>
47102 <td>34</td>
47103 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47104 <td>in_intr</td>
47105 <td>34</td>
47106 </tr>
47107 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47108 <td>233</td>
47109 <td>35</td>
47110 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47111 <td>in_intr</td>
47112 <td>35</td>
47113 </tr>
47114 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47115 <td>233</td>
47116 <td>36</td>
47117 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47118 <td>in_intr</td>
47119 <td>36</td>
47120 </tr>
47121 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47122 <td>233</td>
47123 <td>37</td>
47124 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47125 <td>in_intr</td>
47126 <td>37</td>
47127 </tr>
47128 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47129 <td>233</td>
47130 <td>38</td>
47131 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47132 <td>in_intr</td>
47133 <td>38</td>
47134 </tr>
47135 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47136 <td>233</td>
47137 <td>39</td>
47138 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47139 <td>in_intr</td>
47140 <td>39</td>
47141 </tr>
47142 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47143 <td>233</td>
47144 <td>40</td>
47145 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47146 <td>in_intr</td>
47147 <td>40</td>
47148 </tr>
47149 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47150 <td>233</td>
47151 <td>41</td>
47152 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47153 <td>in_intr</td>
47154 <td>41</td>
47155 </tr>
47156 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47157 <td>233</td>
47158 <td>42</td>
47159 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47160 <td>in_intr</td>
47161 <td>42</td>
47162 </tr>
47163 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47164 <td>233</td>
47165 <td>43</td>
47166 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47167 <td>in_intr</td>
47168 <td>43</td>
47169 </tr>
47170 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47171 <td>233</td>
47172 <td>44</td>
47173 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47174 <td>in_intr</td>
47175 <td>44</td>
47176 </tr>
47177 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47178 <td>233</td>
47179 <td>45</td>
47180 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47181 <td>in_intr</td>
47182 <td>45</td>
47183 </tr>
47184 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47185 <td>233</td>
47186 <td>46</td>
47187 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47188 <td>in_intr</td>
47189 <td>46</td>
47190 </tr>
47191 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47192 <td>233</td>
47193 <td>47</td>
47194 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47195 <td>in_intr</td>
47196 <td>47</td>
47197 </tr>
47198 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47199 <td>233</td>
47200 <td>48</td>
47201 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47202 <td>in_intr</td>
47203 <td>48</td>
47204 </tr>
47205 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47206 <td>233</td>
47207 <td>49</td>
47208 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47209 <td>in_intr</td>
47210 <td>49</td>
47211 </tr>
47212 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47213 <td>233</td>
47214 <td>50</td>
47215 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47216 <td>in_intr</td>
47217 <td>50</td>
47218 </tr>
47219 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47220 <td>233</td>
47221 <td>51</td>
47222 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47223 <td>in_intr</td>
47224 <td>51</td>
47225 </tr>
47226 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47227 <td>233</td>
47228 <td>52</td>
47229 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47230 <td>in_intr</td>
47231 <td>52</td>
47232 </tr>
47233 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47234 <td>233</td>
47235 <td>53</td>
47236 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47237 <td>in_intr</td>
47238 <td>53</td>
47239 </tr>
47240 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47241 <td>233</td>
47242 <td>54</td>
47243 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47244 <td>in_intr</td>
47245 <td>54</td>
47246 </tr>
47247 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47248 <td>233</td>
47249 <td>55</td>
47250 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47251 <td>in_intr</td>
47252 <td>55</td>
47253 </tr>
47254 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47255 <td>233</td>
47256 <td>56</td>
47257 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47258 <td>in_intr</td>
47259 <td>56</td>
47260 </tr>
47261 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47262 <td>233</td>
47263 <td>57</td>
47264 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47265 <td>in_intr</td>
47266 <td>57</td>
47267 </tr>
47268 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47269 <td>233</td>
47270 <td>58</td>
47271 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47272 <td>in_intr</td>
47273 <td>58</td>
47274 </tr>
47275 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47276 <td>233</td>
47277 <td>59</td>
47278 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47279 <td>in_intr</td>
47280 <td>59</td>
47281 </tr>
47282 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47283 <td>233</td>
47284 <td>60</td>
47285 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47286 <td>in_intr</td>
47287 <td>60</td>
47288 </tr>
47289 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47290 <td>233</td>
47291 <td>61</td>
47292 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47293 <td>in_intr</td>
47294 <td>61</td>
47295 </tr>
47296 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47297 <td>233</td>
47298 <td>62</td>
47299 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47300 <td>in_intr</td>
47301 <td>62</td>
47302 </tr>
47303 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47304 <td>233</td>
47305 <td>63</td>
47306 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47307 <td>in_intr</td>
47308 <td>63</td>
47309 </tr>
47310 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47311 <td>233</td>
47312 <td>64</td>
47313 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47314 <td>in_intr</td>
47315 <td>64</td>
47316 </tr>
47317 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47318 <td>233</td>
47319 <td>65</td>
47320 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47321 <td>in_intr</td>
47322 <td>65</td>
47323 </tr>
47324 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47325 <td>233</td>
47326 <td>66</td>
47327 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47328 <td>in_intr</td>
47329 <td>66</td>
47330 </tr>
47331 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47332 <td>233</td>
47333 <td>67</td>
47334 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47335 <td>in_intr</td>
47336 <td>67</td>
47337 </tr>
47338 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47339 <td>233</td>
47340 <td>68</td>
47341 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47342 <td>in_intr</td>
47343 <td>68</td>
47344 </tr>
47345 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47346 <td>233</td>
47347 <td>69</td>
47348 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47349 <td>in_intr</td>
47350 <td>69</td>
47351 </tr>
47352 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47353 <td>233</td>
47354 <td>70</td>
47355 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47356 <td>in_intr</td>
47357 <td>70</td>
47358 </tr>
47359 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47360 <td>233</td>
47361 <td>71</td>
47362 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47363 <td>in_intr</td>
47364 <td>71</td>
47365 </tr>
47366 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47367 <td>233</td>
47368 <td>72</td>
47369 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47370 <td>in_intr</td>
47371 <td>72</td>
47372 </tr>
47373 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47374 <td>233</td>
47375 <td>73</td>
47376 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47377 <td>in_intr</td>
47378 <td>73</td>
47379 </tr>
47380 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47381 <td>233</td>
47382 <td>74</td>
47383 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47384 <td>in_intr</td>
47385 <td>74</td>
47386 </tr>
47387 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47388 <td>233</td>
47389 <td>75</td>
47390 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47391 <td>in_intr</td>
47392 <td>75</td>
47393 </tr>
47394 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47395 <td>233</td>
47396 <td>76</td>
47397 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47398 <td>in_intr</td>
47399 <td>76</td>
47400 </tr>
47401 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47402 <td>233</td>
47403 <td>77</td>
47404 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47405 <td>in_intr</td>
47406 <td>77</td>
47407 </tr>
47408 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47409 <td>233</td>
47410 <td>78</td>
47411 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47412 <td>in_intr</td>
47413 <td>78</td>
47414 </tr>
47415 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47416 <td>233</td>
47417 <td>79</td>
47418 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47419 <td>in_intr</td>
47420 <td>79</td>
47421 </tr>
47422 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47423 <td>233</td>
47424 <td>80</td>
47425 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47426 <td>in_intr</td>
47427 <td>80</td>
47428 </tr>
47429 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47430 <td>233</td>
47431 <td>81</td>
47432 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47433 <td>in_intr</td>
47434 <td>81</td>
47435 </tr>
47436 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47437 <td>233</td>
47438 <td>82</td>
47439 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47440 <td>in_intr</td>
47441 <td>82</td>
47442 </tr>
47443 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47444 <td>233</td>
47445 <td>83</td>
47446 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47447 <td>in_intr</td>
47448 <td>83</td>
47449 </tr>
47450 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47451 <td>233</td>
47452 <td>84</td>
47453 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47454 <td>in_intr</td>
47455 <td>84</td>
47456 </tr>
47457 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47458 <td>233</td>
47459 <td>85</td>
47460 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47461 <td>in_intr</td>
47462 <td>85</td>
47463 </tr>
47464 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47465 <td>233</td>
47466 <td>86</td>
47467 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47468 <td>in_intr</td>
47469 <td>86</td>
47470 </tr>
47471 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47472 <td>233</td>
47473 <td>87</td>
47474 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47475 <td>in_intr</td>
47476 <td>87</td>
47477 </tr>
47478 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47479 <td>233</td>
47480 <td>88</td>
47481 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47482 <td>in_intr</td>
47483 <td>88</td>
47484 </tr>
47485 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47486 <td>233</td>
47487 <td>89</td>
47488 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47489 <td>in_intr</td>
47490 <td>89</td>
47491 </tr>
47492 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47493 <td>233</td>
47494 <td>90</td>
47495 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47496 <td>in_intr</td>
47497 <td>90</td>
47498 </tr>
47499 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47500 <td>233</td>
47501 <td>91</td>
47502 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47503 <td>in_intr</td>
47504 <td>91</td>
47505 </tr>
47506 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47507 <td>233</td>
47508 <td>92</td>
47509 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47510 <td>in_intr</td>
47511 <td>92</td>
47512 </tr>
47513 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47514 <td>233</td>
47515 <td>93</td>
47516 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47517 <td>in_intr</td>
47518 <td>93</td>
47519 </tr>
47520 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47521 <td>233</td>
47522 <td>94</td>
47523 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47524 <td>in_intr</td>
47525 <td>94</td>
47526 </tr>
47527 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47528 <td>233</td>
47529 <td>95</td>
47530 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47531 <td>in_intr</td>
47532 <td>95</td>
47533 </tr>
47534 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47535 <td>233</td>
47536 <td>96</td>
47537 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47538 <td>in_intr</td>
47539 <td>96</td>
47540 </tr>
47541 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47542 <td>233</td>
47543 <td>97</td>
47544 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47545 <td>in_intr</td>
47546 <td>97</td>
47547 </tr>
47548 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47549 <td>233</td>
47550 <td>98</td>
47551 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47552 <td>in_intr</td>
47553 <td>98</td>
47554 </tr>
47555 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47556 <td>233</td>
47557 <td>99</td>
47558 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47559 <td>in_intr</td>
47560 <td>99</td>
47561 </tr>
47562 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47563 <td>233</td>
47564 <td>100</td>
47565 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47566 <td>in_intr</td>
47567 <td>100</td>
47568 </tr>
47569 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47570 <td>233</td>
47571 <td>101</td>
47572 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47573 <td>in_intr</td>
47574 <td>101</td>
47575 </tr>
47576 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47577 <td>233</td>
47578 <td>102</td>
47579 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47580 <td>in_intr</td>
47581 <td>102</td>
47582 </tr>
47583 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47584 <td>233</td>
47585 <td>103</td>
47586 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47587 <td>in_intr</td>
47588 <td>103</td>
47589 </tr>
47590 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47591 <td>233</td>
47592 <td>104</td>
47593 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47594 <td>in_intr</td>
47595 <td>104</td>
47596 </tr>
47597 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47598 <td>233</td>
47599 <td>105</td>
47600 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47601 <td>in_intr</td>
47602 <td>105</td>
47603 </tr>
47604 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47605 <td>233</td>
47606 <td>106</td>
47607 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47608 <td>in_intr</td>
47609 <td>106</td>
47610 </tr>
47611 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47612 <td>233</td>
47613 <td>107</td>
47614 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47615 <td>in_intr</td>
47616 <td>107</td>
47617 </tr>
47618 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47619 <td>233</td>
47620 <td>108</td>
47621 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47622 <td>in_intr</td>
47623 <td>108</td>
47624 </tr>
47625 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47626 <td>233</td>
47627 <td>109</td>
47628 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47629 <td>in_intr</td>
47630 <td>109</td>
47631 </tr>
47632 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47633 <td>233</td>
47634 <td>110</td>
47635 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47636 <td>in_intr</td>
47637 <td>110</td>
47638 </tr>
47639 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47640 <td>233</td>
47641 <td>111</td>
47642 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47643 <td>in_intr</td>
47644 <td>111</td>
47645 </tr>
47646 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47647 <td>233</td>
47648 <td>112</td>
47649 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47650 <td>in_intr</td>
47651 <td>112</td>
47652 </tr>
47653 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47654 <td>233</td>
47655 <td>113</td>
47656 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47657 <td>in_intr</td>
47658 <td>113</td>
47659 </tr>
47660 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47661 <td>233</td>
47662 <td>114</td>
47663 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47664 <td>in_intr</td>
47665 <td>114</td>
47666 </tr>
47667 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47668 <td>233</td>
47669 <td>115</td>
47670 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47671 <td>in_intr</td>
47672 <td>115</td>
47673 </tr>
47674 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47675 <td>233</td>
47676 <td>116</td>
47677 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47678 <td>in_intr</td>
47679 <td>116</td>
47680 </tr>
47681 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47682 <td>233</td>
47683 <td>117</td>
47684 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47685 <td>in_intr</td>
47686 <td>117</td>
47687 </tr>
47688 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47689 <td>233</td>
47690 <td>118</td>
47691 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47692 <td>in_intr</td>
47693 <td>118</td>
47694 </tr>
47695 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47696 <td>233</td>
47697 <td>119</td>
47698 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47699 <td>in_intr</td>
47700 <td>119</td>
47701 </tr>
47702 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47703 <td>233</td>
47704 <td>120</td>
47705 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47706 <td>in_intr</td>
47707 <td>120</td>
47708 </tr>
47709 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47710 <td>233</td>
47711 <td>121</td>
47712 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47713 <td>in_intr</td>
47714 <td>121</td>
47715 </tr>
47716 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47717 <td>233</td>
47718 <td>122</td>
47719 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47720 <td>in_intr</td>
47721 <td>122</td>
47722 </tr>
47723 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47724 <td>233</td>
47725 <td>123</td>
47726 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47727 <td>in_intr</td>
47728 <td>123</td>
47729 </tr>
47730 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47731 <td>233</td>
47732 <td>124</td>
47733 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47734 <td>in_intr</td>
47735 <td>124</td>
47736 </tr>
47737 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47738 <td>233</td>
47739 <td>125</td>
47740 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47741 <td>in_intr</td>
47742 <td>125</td>
47743 </tr>
47744 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47745 <td>233</td>
47746 <td>126</td>
47747 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47748 <td>in_intr</td>
47749 <td>126</td>
47750 </tr>
47751 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47752 <td>233</td>
47753 <td>127</td>
47754 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47755 <td>in_intr</td>
47756 <td>127</td>
47757 </tr>
47758 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47759 <td>233</td>
47760 <td>128</td>
47761 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47762 <td>in_intr</td>
47763 <td>128</td>
47764 </tr>
47765 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47766 <td>233</td>
47767 <td>129</td>
47768 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47769 <td>in_intr</td>
47770 <td>129</td>
47771 </tr>
47772 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47773 <td>233</td>
47774 <td>130</td>
47775 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47776 <td>in_intr</td>
47777 <td>130</td>
47778 </tr>
47779 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47780 <td>233</td>
47781 <td>131</td>
47782 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47783 <td>in_intr</td>
47784 <td>131</td>
47785 </tr>
47786 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47787 <td>233</td>
47788 <td>132</td>
47789 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47790 <td>in_intr</td>
47791 <td>132</td>
47792 </tr>
47793 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47794 <td>233</td>
47795 <td>133</td>
47796 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47797 <td>in_intr</td>
47798 <td>133</td>
47799 </tr>
47800 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47801 <td>233</td>
47802 <td>134</td>
47803 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47804 <td>in_intr</td>
47805 <td>134</td>
47806 </tr>
47807 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47808 <td>233</td>
47809 <td>135</td>
47810 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47811 <td>in_intr</td>
47812 <td>135</td>
47813 </tr>
47814 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47815 <td>233</td>
47816 <td>136</td>
47817 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47818 <td>in_intr</td>
47819 <td>136</td>
47820 </tr>
47821 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47822 <td>233</td>
47823 <td>137</td>
47824 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47825 <td>in_intr</td>
47826 <td>137</td>
47827 </tr>
47828 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47829 <td>233</td>
47830 <td>138</td>
47831 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47832 <td>in_intr</td>
47833 <td>138</td>
47834 </tr>
47835 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47836 <td>233</td>
47837 <td>139</td>
47838 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47839 <td>in_intr</td>
47840 <td>139</td>
47841 </tr>
47842 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47843 <td>233</td>
47844 <td>140</td>
47845 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47846 <td>in_intr</td>
47847 <td>140</td>
47848 </tr>
47849 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47850 <td>233</td>
47851 <td>141</td>
47852 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47853 <td>in_intr</td>
47854 <td>141</td>
47855 </tr>
47856 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47857 <td>233</td>
47858 <td>142</td>
47859 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47860 <td>in_intr</td>
47861 <td>142</td>
47862 </tr>
47863 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47864 <td>233</td>
47865 <td>143</td>
47866 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47867 <td>in_intr</td>
47868 <td>143</td>
47869 </tr>
47870 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47871 <td>233</td>
47872 <td>144</td>
47873 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47874 <td>in_intr</td>
47875 <td>144</td>
47876 </tr>
47877 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47878 <td>233</td>
47879 <td>145</td>
47880 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47881 <td>in_intr</td>
47882 <td>145</td>
47883 </tr>
47884 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47885 <td>233</td>
47886 <td>146</td>
47887 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47888 <td>in_intr</td>
47889 <td>146</td>
47890 </tr>
47891 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47892 <td>233</td>
47893 <td>147</td>
47894 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47895 <td>in_intr</td>
47896 <td>147</td>
47897 </tr>
47898 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47899 <td>233</td>
47900 <td>148</td>
47901 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47902 <td>in_intr</td>
47903 <td>148</td>
47904 </tr>
47905 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47906 <td>233</td>
47907 <td>149</td>
47908 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47909 <td>in_intr</td>
47910 <td>149</td>
47911 </tr>
47912 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47913 <td>233</td>
47914 <td>150</td>
47915 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47916 <td>in_intr</td>
47917 <td>150</td>
47918 </tr>
47919 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47920 <td>233</td>
47921 <td>151</td>
47922 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47923 <td>in_intr</td>
47924 <td>151</td>
47925 </tr>
47926 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47927 <td>233</td>
47928 <td>152</td>
47929 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47930 <td>in_intr</td>
47931 <td>152</td>
47932 </tr>
47933 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47934 <td>233</td>
47935 <td>153</td>
47936 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47937 <td>in_intr</td>
47938 <td>153</td>
47939 </tr>
47940 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47941 <td>233</td>
47942 <td>154</td>
47943 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47944 <td>in_intr</td>
47945 <td>154</td>
47946 </tr>
47947 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47948 <td>233</td>
47949 <td>155</td>
47950 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47951 <td>in_intr</td>
47952 <td>155</td>
47953 </tr>
47954 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47955 <td>233</td>
47956 <td>156</td>
47957 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47958 <td>in_intr</td>
47959 <td>156</td>
47960 </tr>
47961 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47962 <td>233</td>
47963 <td>157</td>
47964 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47965 <td>in_intr</td>
47966 <td>157</td>
47967 </tr>
47968 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47969 <td>233</td>
47970 <td>158</td>
47971 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47972 <td>in_intr</td>
47973 <td>158</td>
47974 </tr>
47975 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47976 <td>233</td>
47977 <td>159</td>
47978 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47979 <td>in_intr</td>
47980 <td>159</td>
47981 </tr>
47982 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47983 <td>233</td>
47984 <td>160</td>
47985 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47986 <td>in_intr</td>
47987 <td>160</td>
47988 </tr>
47989 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47990 <td>233</td>
47991 <td>161</td>
47992 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
47993 <td>in_intr</td>
47994 <td>161</td>
47995 </tr>
47996 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
47997 <td>233</td>
47998 <td>162</td>
47999 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48000 <td>in_intr</td>
48001 <td>162</td>
48002 </tr>
48003 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48004 <td>233</td>
48005 <td>163</td>
48006 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48007 <td>in_intr</td>
48008 <td>163</td>
48009 </tr>
48010 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48011 <td>233</td>
48012 <td>164</td>
48013 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48014 <td>in_intr</td>
48015 <td>164</td>
48016 </tr>
48017 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48018 <td>233</td>
48019 <td>165</td>
48020 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48021 <td>in_intr</td>
48022 <td>165</td>
48023 </tr>
48024 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48025 <td>233</td>
48026 <td>166</td>
48027 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48028 <td>in_intr</td>
48029 <td>166</td>
48030 </tr>
48031 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48032 <td>233</td>
48033 <td>167</td>
48034 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48035 <td>in_intr</td>
48036 <td>167</td>
48037 </tr>
48038 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48039 <td>233</td>
48040 <td>168</td>
48041 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48042 <td>in_intr</td>
48043 <td>168</td>
48044 </tr>
48045 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48046 <td>233</td>
48047 <td>169</td>
48048 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48049 <td>in_intr</td>
48050 <td>169</td>
48051 </tr>
48052 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48053 <td>233</td>
48054 <td>170</td>
48055 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48056 <td>in_intr</td>
48057 <td>170</td>
48058 </tr>
48059 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48060 <td>233</td>
48061 <td>171</td>
48062 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48063 <td>in_intr</td>
48064 <td>171</td>
48065 </tr>
48066 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48067 <td>233</td>
48068 <td>172</td>
48069 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48070 <td>in_intr</td>
48071 <td>172</td>
48072 </tr>
48073 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48074 <td>233</td>
48075 <td>173</td>
48076 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48077 <td>in_intr</td>
48078 <td>173</td>
48079 </tr>
48080 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48081 <td>233</td>
48082 <td>174</td>
48083 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48084 <td>in_intr</td>
48085 <td>174</td>
48086 </tr>
48087 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48088 <td>233</td>
48089 <td>175</td>
48090 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48091 <td>in_intr</td>
48092 <td>175</td>
48093 </tr>
48094 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48095 <td>233</td>
48096 <td>176</td>
48097 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48098 <td>in_intr</td>
48099 <td>176</td>
48100 </tr>
48101 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48102 <td>233</td>
48103 <td>177</td>
48104 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48105 <td>in_intr</td>
48106 <td>177</td>
48107 </tr>
48108 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48109 <td>233</td>
48110 <td>178</td>
48111 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48112 <td>in_intr</td>
48113 <td>178</td>
48114 </tr>
48115 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48116 <td>233</td>
48117 <td>179</td>
48118 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48119 <td>in_intr</td>
48120 <td>179</td>
48121 </tr>
48122 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48123 <td>233</td>
48124 <td>180</td>
48125 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48126 <td>in_intr</td>
48127 <td>180</td>
48128 </tr>
48129 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48130 <td>233</td>
48131 <td>181</td>
48132 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48133 <td>in_intr</td>
48134 <td>181</td>
48135 </tr>
48136 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48137 <td>233</td>
48138 <td>182</td>
48139 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48140 <td>in_intr</td>
48141 <td>182</td>
48142 </tr>
48143 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48144 <td>233</td>
48145 <td>183</td>
48146 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48147 <td>in_intr</td>
48148 <td>183</td>
48149 </tr>
48150 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48151 <td>233</td>
48152 <td>184</td>
48153 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48154 <td>in_intr</td>
48155 <td>184</td>
48156 </tr>
48157 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48158 <td>233</td>
48159 <td>185</td>
48160 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48161 <td>in_intr</td>
48162 <td>185</td>
48163 </tr>
48164 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48165 <td>233</td>
48166 <td>186</td>
48167 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48168 <td>in_intr</td>
48169 <td>186</td>
48170 </tr>
48171 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48172 <td>233</td>
48173 <td>187</td>
48174 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48175 <td>in_intr</td>
48176 <td>187</td>
48177 </tr>
48178 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48179 <td>233</td>
48180 <td>188</td>
48181 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48182 <td>in_intr</td>
48183 <td>188</td>
48184 </tr>
48185 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48186 <td>233</td>
48187 <td>189</td>
48188 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48189 <td>in_intr</td>
48190 <td>189</td>
48191 </tr>
48192 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48193 <td>233</td>
48194 <td>190</td>
48195 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48196 <td>in_intr</td>
48197 <td>190</td>
48198 </tr>
48199 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48200 <td>233</td>
48201 <td>191</td>
48202 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48203 <td>in_intr</td>
48204 <td>191</td>
48205 </tr>
48206 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48207 <td>233</td>
48208 <td>192</td>
48209 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48210 <td>in_intr</td>
48211 <td>192</td>
48212 </tr>
48213 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48214 <td>233</td>
48215 <td>193</td>
48216 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48217 <td>in_intr</td>
48218 <td>193</td>
48219 </tr>
48220 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48221 <td>233</td>
48222 <td>194</td>
48223 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48224 <td>in_intr</td>
48225 <td>194</td>
48226 </tr>
48227 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48228 <td>233</td>
48229 <td>195</td>
48230 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48231 <td>in_intr</td>
48232 <td>195</td>
48233 </tr>
48234 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48235 <td>233</td>
48236 <td>196</td>
48237 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48238 <td>in_intr</td>
48239 <td>196</td>
48240 </tr>
48241 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48242 <td>233</td>
48243 <td>197</td>
48244 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48245 <td>in_intr</td>
48246 <td>197</td>
48247 </tr>
48248 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48249 <td>233</td>
48250 <td>198</td>
48251 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48252 <td>in_intr</td>
48253 <td>198</td>
48254 </tr>
48255 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48256 <td>233</td>
48257 <td>199</td>
48258 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48259 <td>in_intr</td>
48260 <td>199</td>
48261 </tr>
48262 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48263 <td>233</td>
48264 <td>200</td>
48265 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48266 <td>in_intr</td>
48267 <td>200</td>
48268 </tr>
48269 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48270 <td>233</td>
48271 <td>201</td>
48272 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48273 <td>in_intr</td>
48274 <td>201</td>
48275 </tr>
48276 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48277 <td>233</td>
48278 <td>202</td>
48279 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48280 <td>in_intr</td>
48281 <td>202</td>
48282 </tr>
48283 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48284 <td>233</td>
48285 <td>203</td>
48286 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48287 <td>in_intr</td>
48288 <td>203</td>
48289 </tr>
48290 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48291 <td>233</td>
48292 <td>204</td>
48293 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48294 <td>in_intr</td>
48295 <td>204</td>
48296 </tr>
48297 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48298 <td>233</td>
48299 <td>205</td>
48300 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48301 <td>in_intr</td>
48302 <td>205</td>
48303 </tr>
48304 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48305 <td>233</td>
48306 <td>206</td>
48307 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48308 <td>in_intr</td>
48309 <td>206</td>
48310 </tr>
48311 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48312 <td>233</td>
48313 <td>207</td>
48314 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48315 <td>in_intr</td>
48316 <td>207</td>
48317 </tr>
48318 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48319 <td>233</td>
48320 <td>208</td>
48321 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48322 <td>in_intr</td>
48323 <td>208</td>
48324 </tr>
48325 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48326 <td>233</td>
48327 <td>209</td>
48328 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48329 <td>in_intr</td>
48330 <td>209</td>
48331 </tr>
48332 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48333 <td>233</td>
48334 <td>210</td>
48335 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48336 <td>in_intr</td>
48337 <td>210</td>
48338 </tr>
48339 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48340 <td>233</td>
48341 <td>211</td>
48342 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48343 <td>in_intr</td>
48344 <td>211</td>
48345 </tr>
48346 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48347 <td>233</td>
48348 <td>212</td>
48349 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48350 <td>in_intr</td>
48351 <td>212</td>
48352 </tr>
48353 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48354 <td>233</td>
48355 <td>213</td>
48356 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48357 <td>in_intr</td>
48358 <td>213</td>
48359 </tr>
48360 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48361 <td>233</td>
48362 <td>214</td>
48363 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48364 <td>in_intr</td>
48365 <td>214</td>
48366 </tr>
48367 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48368 <td>233</td>
48369 <td>215</td>
48370 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48371 <td>in_intr</td>
48372 <td>215</td>
48373 </tr>
48374 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48375 <td>233</td>
48376 <td>216</td>
48377 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48378 <td>in_intr</td>
48379 <td>216</td>
48380 </tr>
48381 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48382 <td>233</td>
48383 <td>217</td>
48384 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48385 <td>in_intr</td>
48386 <td>217</td>
48387 </tr>
48388 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48389 <td>233</td>
48390 <td>218</td>
48391 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48392 <td>in_intr</td>
48393 <td>218</td>
48394 </tr>
48395 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48396 <td>233</td>
48397 <td>219</td>
48398 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48399 <td>in_intr</td>
48400 <td>219</td>
48401 </tr>
48402 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48403 <td>233</td>
48404 <td>220</td>
48405 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48406 <td>in_intr</td>
48407 <td>220</td>
48408 </tr>
48409 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48410 <td>233</td>
48411 <td>221</td>
48412 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48413 <td>in_intr</td>
48414 <td>221</td>
48415 </tr>
48416 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48417 <td>233</td>
48418 <td>222</td>
48419 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48420 <td>in_intr</td>
48421 <td>222</td>
48422 </tr>
48423 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48424 <td>233</td>
48425 <td>223</td>
48426 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48427 <td>in_intr</td>
48428 <td>223</td>
48429 </tr>
48430 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48431 <td>233</td>
48432 <td>224</td>
48433 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48434 <td>in_intr</td>
48435 <td>224</td>
48436 </tr>
48437 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48438 <td>233</td>
48439 <td>225</td>
48440 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48441 <td>in_intr</td>
48442 <td>225</td>
48443 </tr>
48444 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48445 <td>233</td>
48446 <td>226</td>
48447 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48448 <td>in_intr</td>
48449 <td>226</td>
48450 </tr>
48451 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48452 <td>233</td>
48453 <td>227</td>
48454 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48455 <td>in_intr</td>
48456 <td>227</td>
48457 </tr>
48458 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48459 <td>233</td>
48460 <td>228</td>
48461 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48462 <td>in_intr</td>
48463 <td>228</td>
48464 </tr>
48465 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48466 <td>233</td>
48467 <td>229</td>
48468 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48469 <td>in_intr</td>
48470 <td>229</td>
48471 </tr>
48472 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48473 <td>233</td>
48474 <td>230</td>
48475 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48476 <td>in_intr</td>
48477 <td>230</td>
48478 </tr>
48479 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48480 <td>233</td>
48481 <td>231</td>
48482 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48483 <td>in_intr</td>
48484 <td>231</td>
48485 </tr>
48486 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48487 <td>233</td>
48488 <td>232</td>
48489 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48490 <td>in_intr</td>
48491 <td>232</td>
48492 </tr>
48493 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48494 <td>233</td>
48495 <td>233</td>
48496 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48497 <td>in_intr</td>
48498 <td>233</td>
48499 </tr>
48500 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48501 <td>233</td>
48502 <td>234</td>
48503 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48504 <td>in_intr</td>
48505 <td>234</td>
48506 </tr>
48507 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48508 <td>233</td>
48509 <td>235</td>
48510 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48511 <td>in_intr</td>
48512 <td>235</td>
48513 </tr>
48514 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48515 <td>233</td>
48516 <td>236</td>
48517 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48518 <td>in_intr</td>
48519 <td>236</td>
48520 </tr>
48521 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48522 <td>233</td>
48523 <td>237</td>
48524 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48525 <td>in_intr</td>
48526 <td>237</td>
48527 </tr>
48528 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48529 <td>233</td>
48530 <td>238</td>
48531 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48532 <td>in_intr</td>
48533 <td>238</td>
48534 </tr>
48535 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48536 <td>233</td>
48537 <td>239</td>
48538 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48539 <td>in_intr</td>
48540 <td>239</td>
48541 </tr>
48542 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48543 <td>233</td>
48544 <td>240</td>
48545 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48546 <td>in_intr</td>
48547 <td>240</td>
48548 </tr>
48549 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48550 <td>233</td>
48551 <td>241</td>
48552 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48553 <td>in_intr</td>
48554 <td>241</td>
48555 </tr>
48556 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48557 <td>233</td>
48558 <td>242</td>
48559 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48560 <td>in_intr</td>
48561 <td>242</td>
48562 </tr>
48563 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48564 <td>233</td>
48565 <td>243</td>
48566 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48567 <td>in_intr</td>
48568 <td>243</td>
48569 </tr>
48570 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48571 <td>233</td>
48572 <td>244</td>
48573 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48574 <td>in_intr</td>
48575 <td>244</td>
48576 </tr>
48577 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48578 <td>233</td>
48579 <td>245</td>
48580 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48581 <td>in_intr</td>
48582 <td>245</td>
48583 </tr>
48584 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48585 <td>233</td>
48586 <td>246</td>
48587 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48588 <td>in_intr</td>
48589 <td>246</td>
48590 </tr>
48591 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48592 <td>233</td>
48593 <td>247</td>
48594 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48595 <td>in_intr</td>
48596 <td>247</td>
48597 </tr>
48598 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48599 <td>233</td>
48600 <td>248</td>
48601 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48602 <td>in_intr</td>
48603 <td>248</td>
48604 </tr>
48605 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48606 <td>233</td>
48607 <td>249</td>
48608 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48609 <td>in_intr</td>
48610 <td>249</td>
48611 </tr>
48612 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48613 <td>233</td>
48614 <td>250</td>
48615 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48616 <td>in_intr</td>
48617 <td>250</td>
48618 </tr>
48619 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48620 <td>233</td>
48621 <td>251</td>
48622 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48623 <td>in_intr</td>
48624 <td>251</td>
48625 </tr>
48626 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48627 <td>233</td>
48628 <td>252</td>
48629 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48630 <td>in_intr</td>
48631 <td>252</td>
48632 </tr>
48633 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48634 <td>233</td>
48635 <td>253</td>
48636 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48637 <td>in_intr</td>
48638 <td>253</td>
48639 </tr>
48640 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48641 <td>233</td>
48642 <td>254</td>
48643 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48644 <td>in_intr</td>
48645 <td>254</td>
48646 </tr>
48647 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0</td>
48648 <td>233</td>
48649 <td>255</td>
48650 <td>J721E_DEV_MCU_NAVSS0_INTR_0</td>
48651 <td>in_intr</td>
48652 <td>255</td>
48653 </tr>
48654 </tbody>
48655 </table>
48656 </div>
48657 <div class="section" id="global-events">
48658 <span id="pub-soc-j721e-global-events"></span><h2>Global Events<a class="headerlink" href="#global-events" title="Permalink to this headline">¶</a></h2>
48659 <p>This section describes J721E global events.  The global events are used in
48660 interrupt management based TISCI messages.</p>
48661 <div class="admonition warning">
48662 <p class="first admonition-title">Warning</p>
48663 <p class="last">Resources marked as reserved for use by DMSC <strong>cannot</strong> be assigned to a
48664 host within the RM Board Configuration resource assignment array.  The RM
48665 Board Configuration is rejected if an overlap with a reserved resource is
48666 detected.</p>
48667 </div>
48668 <table border="1" class="docutils">
48669 <colgroup>
48670 <col width="61%" />
48671 <col width="39%" />
48672 </colgroup>
48673 <thead valign="bottom">
48674 <tr class="row-odd"><th class="head">Global Event Name</th>
48675 <th class="head">Global Event Range</th>
48676 </tr>
48677 </thead>
48678 <tbody valign="top">
48679 <tr class="row-even"><td>NAVSS0_UDMASS_INTAGGR_0 SEVT
48680 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
48681 <td>0 to 37</td>
48682 </tr>
48683 <tr class="row-odd"><td>NAVSS0_UDMASS_INTAGGR_0 SEVT</td>
48684 <td>38 to 4607</td>
48685 </tr>
48686 <tr class="row-even"><td>MCU_NAVSS0_UDMASS_INTA_0 SEVT
48687 (<strong>RESERVED BY SYSTEM FIRMWARE</strong>)</td>
48688 <td>16384 to 16399</td>
48689 </tr>
48690 <tr class="row-odd"><td>MCU_NAVSS0_UDMASS_INTA_0 SEVT</td>
48691 <td>16400 to 17919</td>
48692 </tr>
48693 <tr class="row-even"><td>NAVSS0_MODSS_INTAGGR_0 SEVT</td>
48694 <td>20480 to 21503</td>
48695 </tr>
48696 <tr class="row-odd"><td>NAVSS0_MODSS_INTAGGR_1 SEVT</td>
48697 <td>22528 to 23551</td>
48698 </tr>
48699 <tr class="row-even"><td>NAVSS0_UDMASS_INTAGGR_0 MEVT</td>
48700 <td>32768 to 33279</td>
48701 </tr>
48702 <tr class="row-odd"><td>MCU_NAVSS0_UDMASS_INTA_0 MEVT</td>
48703 <td>34816 to 34943</td>
48704 </tr>
48705 <tr class="row-even"><td>NAVSS0_UDMASS_INTAGGR_0 GEVT</td>
48706 <td>36864 to 37375</td>
48707 </tr>
48708 <tr class="row-odd"><td>MCU_NAVSS0_UDMASS_INTA_0 GEVT</td>
48709 <td>39936 to 40191</td>
48710 </tr>
48711 <tr class="row-even"><td>NAVSS0_UDMAP_0 TRIGGER</td>
48712 <td>49152 to 50175</td>
48713 </tr>
48714 <tr class="row-odd"><td>MCU_NAVSS0_UDMAP_0 TRIGGER</td>
48715 <td>56320 to 56575</td>
48716 </tr>
48717 </tbody>
48718 </table>
48719 </div>
48720 <div class="section" id="event-based-interrupt-source-ids">
48721 <span id="pub-soc-j721e-event-int-src-list"></span><h2>Event-Based Interrupt Source IDs<a class="headerlink" href="#event-based-interrupt-source-ids" title="Permalink to this headline">¶</a></h2>
48722 <table border="1" class="docutils">
48723 <colgroup>
48724 <col width="27%" />
48725 <col width="11%" />
48726 <col width="40%" />
48727 <col width="22%" />
48728 </colgroup>
48729 <thead valign="bottom">
48730 <tr class="row-odd"><th class="head">Device Name</th>
48731 <th class="head">Device ID</th>
48732 <th class="head">Interrupt Source Name</th>
48733 <th class="head">Interrupt Source Index</th>
48734 </tr>
48735 </thead>
48736 <tbody valign="top">
48737 <tr class="row-even"><td>J721E_DEV_NAVSS0_RINGACC_0</td>
48738 <td>211</td>
48739 <td>Ring events</td>
48740 <td>0 to 973</td>
48741 </tr>
48742 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_RINGACC0</td>
48743 <td>235</td>
48744 <td>Ring events</td>
48745 <td>0 to 255</td>
48746 </tr>
48747 <tr class="row-even"><td>J721E_DEV_NAVSS0_RINGACC_0</td>
48748 <td>211</td>
48749 <td>Ring monitor events</td>
48750 <td>1024 to 1055</td>
48751 </tr>
48752 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_RINGACC0</td>
48753 <td>235</td>
48754 <td>Ring monitor events</td>
48755 <td>1024 to 1055</td>
48756 </tr>
48757 <tr class="row-even"><td>J721E_DEV_NAVSS0_RINGACC_0</td>
48758 <td>211</td>
48759 <td>Ring global error event</td>
48760 <td>2048</td>
48761 </tr>
48762 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_RINGACC0</td>
48763 <td>235</td>
48764 <td>Ring global error event</td>
48765 <td>2048</td>
48766 </tr>
48767 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMAP_0</td>
48768 <td>212</td>
48769 <td>UDMA transmit channel OES events</td>
48770 <td>0 to 299</td>
48771 </tr>
48772 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMAP_0</td>
48773 <td>212</td>
48774 <td>UDMA transmit channel EOES events</td>
48775 <td>512 to 811</td>
48776 </tr>
48777 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMAP_0</td>
48778 <td>212</td>
48779 <td>UDMA receive channel OES events</td>
48780 <td>1024 to 1163</td>
48781 </tr>
48782 <tr class="row-odd"><td>J721E_DEV_NAVSS0_UDMAP_0</td>
48783 <td>212</td>
48784 <td>UDMA receive channel EOES events</td>
48785 <td>1280 to 1419</td>
48786 </tr>
48787 <tr class="row-even"><td>J721E_DEV_NAVSS0_UDMAP_0</td>
48788 <td>212</td>
48789 <td>UDMA global configuration invalid flow event</td>
48790 <td>1536</td>
48791 </tr>
48792 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMAP_0</td>
48793 <td>236</td>
48794 <td>UDMA transmit channel OES events</td>
48795 <td>0 to 47</td>
48796 </tr>
48797 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMAP_0</td>
48798 <td>236</td>
48799 <td>UDMA transmit channel EOES events</td>
48800 <td>512 to 559</td>
48801 </tr>
48802 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMAP_0</td>
48803 <td>236</td>
48804 <td>UDMA receive channel OES events</td>
48805 <td>1024 to 1071</td>
48806 </tr>
48807 <tr class="row-even"><td>J721E_DEV_MCU_NAVSS0_UDMAP_0</td>
48808 <td>236</td>
48809 <td>UDMA receive channel EOES events</td>
48810 <td>1280 to 1327</td>
48811 </tr>
48812 <tr class="row-odd"><td>J721E_DEV_MCU_NAVSS0_UDMAP_0</td>
48813 <td>236</td>
48814 <td>UDMA global configuration invalid flow event</td>
48815 <td>1536</td>
48816 </tr>
48817 </tbody>
48818 </table>
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