[processor-sdk/pdk.git] / packages / ti / drv / sciclient / soc / sysfw / binaries / system-firmware-public-documentation / searchindex.js
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3,ack:[2,5,6,7,13,16,20,23],acp:13,across:[0,6,23,24,120,122,128],action:[2,5,19],activ:[5,13,17,18,22,23,119,124,127,128],actual:[2,3,5,6,13,19,21,32,35,47,50,63,66,79,82,93,96,108,111,128],add:[8,19,27,119,120],addit:[2,5,6,7,12,13,19,23,24,27,119,120,122,123,124,126,129],addition:5,addr:27,addr_hi:11,addr_lo:11,address:[0,3,10,11,13,17,19,21,22,23,24,27,31,46,62,78,92,107,121,128],adjust:11,adpllljm_hsdiv_wrap_main_0:[49,65],adpllljm_hsdiv_wrap_main_2:[49,65],adpllljm_wrap_main_1:[49,65],adpllljm_wrap_main_3:[49,65],adpllljm_wrap_main_4:[49,65],adpllm_hsdiv_wrap_mcu_0:[49,65],adpllm_hsdiv_wrap_mcu_1:[49,65],adpllm_wrap_main_6:[49,65],adpllm_wrap_main_7:[49,65],advanc:[57,73,88,102,117],affect:13,aforement:27,after:[2,5,7,8,10,11,12,13,14,15,18,21,24,34,49,65,81,95,110,119,122,129],again:5,against:[11,19,27,120,128],aggreg:[0,2,8,23,27,126],agnost:0,aid:[45,60,77,91,106],aim:0,ainact:13,akin:2,align:[3,23],all:[0,2,6,9,13,15,16,18,19,21,22,23,24,27,47,63,120,124,126,128,129],alloc:[3,5,8,10,12,13,21,23,32,47,63,79,93,108],allow:[0,2,5,6,8,11,12,13,18,21,22,23,24,27,28,29,43,44,58,59,75,76,89,90,104,105,119,121,122,123,128,129],allow_debug_level_rsvd:24,allow_dkek_export_tisci:24,allow_jtag_unlock:[24,128],allow_wildcard_unlock:[24,128],allowed_atyp:23,allowed_orderid:23,allowed_prior:23,allowed_qo:23,allowed_sched_prior:23,along:[13,14,20,27,120,122,129],alongsid:15,alphabet:[28,43,58,75,89,104],alreadi:[6,11,13,119],also:[0,2,5,6,8,13,17,18,23,24,28,30,43,45,58,60,75,77,89,91,104,106,122,123,124,127,128,129],alter:6,altern:[13,23,120,124,128],although:[3,5,6,7,13,21,22,23,24],altough:6,alwai:[2,3,6,13,19,21,27,120,122,128],am64:[24,129],am64_main_sec_mmr_main_0:35,am64x:130,am64x_dev_a53ss0:[28,29,42],am64x_dev_a53ss0_core_0:[28,29,42],am64x_dev_a53ss0_core_1:[28,29,42],am64x_dev_adc0:[28,29,42],am64x_dev_board0:[28,29,42],am64x_dev_cmp_event_introuter0:[28,29,33,39,42],am64x_dev_compute_cluster0:[29,42],am64x_dev_compute_cluster0_pbist_0:[29,42],am64x_dev_cpsw0:[28,29,33,42],am64x_dev_cpt2_aggr0:[28,29,42],am64x_dev_cpts0:[28,29,33,42],am64x_dev_dbgsuspendrouter0:[28,29,42],am64x_dev_dcc0:[28,29,42],am64x_dev_dcc1:[28,29,42],am64x_dev_dcc2:[28,29,42],am64x_dev_dcc3:[28,29,42],am64x_dev_dcc4:[28,29,42],am64x_dev_dcc5:[28,29,42],am64x_dev_ddpa0:[28,29,42],am64x_dev_ddr16ss0:[28,29,42],am64x_dev_debugss_wrap0:[28,29,42],am64x_dev_dmass0:[29,37,42],am64x_dev_dmass0_bcdma_0:[28,29,30,38,39,42],am64x_dev_dmass0_cbass_0:[28,29,42],am64x_dev_dmass0_intaggr_0:[28,29,33,39,42],am64x_dev_dmass0_ipcss_0:[28,29,42],am64x_dev_dmass0_pktdma_0:[28,29,30,38,39,42],am64x_dev_dmass0_psilcfg_0:[28,29,42],am64x_dev_dmass0_psilss_0:[28,29,42],am64x_dev_dmass0_ringacc_0:[28,29,33,38,39],am64x_dev_dmsc0:[29,42],am64x_dev_ecap0:[28,29,42],am64x_dev_ecap1:[28,29,42],am64x_dev_ecap2:[28,29,42],am64x_dev_elm0:[28,29,42],am64x_dev_emif_data_0_vd:[29,42],am64x_dev_epwm0:[28,29,33,42],am64x_dev_epwm1:[28,29,42],am64x_dev_epwm2:[28,29,42],am64x_dev_epwm3:[28,29,33,42],am64x_dev_epwm4:[28,29,42],am64x_dev_epwm5:[28,29,42],am64x_dev_epwm6:[28,29,33,42],am64x_dev_epwm7:[28,29,42],am64x_dev_epwm8:[28,29,42],am64x_dev_eqep0:[28,29,42],am64x_dev_eqep1:[28,29,42],am64x_dev_eqep2:[28,29,42],am64x_dev_esm0:[28,29,42],am64x_dev_fsirx0:[28,29,42],am64x_dev_fsirx1:[28,29,42],am64x_dev_fsirx2:[28,29,42],am64x_dev_fsirx3:[28,29,42],am64x_dev_fsirx4:[28,29,42],am64x_dev_fsirx5:[28,29,42],am64x_dev_fsitx0:[28,29,42],am64x_dev_fsitx1:[28,29,42],am64x_dev_fss0:[29,42],am64x_dev_fss0_fsas_0:[28,29,42],am64x_dev_fss0_ospi_0:[28,29,42],am64x_dev_gicss0:[28,29,33,42],am64x_dev_gpio0:[28,29,33,42],am64x_dev_gpio1:[28,29,33,42],am64x_dev_gpmc0:[28,29,42],am64x_dev_gtc0:[28,29,33,42],am64x_dev_i2c0:[28,29,42],am64x_dev_i2c1:[28,29,42],am64x_dev_i2c2:[28,29,42],am64x_dev_i2c3:[28,29,42],am64x_dev_led0:[28,29,42],am64x_dev_mailbox0:[29,42],am64x_dev_main2mcu_vd:[29,42],am64x_dev_main_gpiomux_introuter0:[28,29,33,39,42],am64x_dev_mcan0:[28,29,42],am64x_dev_mcan1:[28,29,42],am64x_dev_mcspi0:[28,29,42],am64x_dev_mcspi1:[28,29,42],am64x_dev_mcspi2:[28,29,42],am64x_dev_mcspi3:[28,29,42],am64x_dev_mcspi4:[28,29,42],am64x_dev_mcu2main_vd:[29,42],am64x_dev_mcu_dcc0:[28,29,42],am64x_dev_mcu_esm0:[28,29,33,42],am64x_dev_mcu_gpio0:[28,29,33,42],am64x_dev_mcu_i2c0:[28,29,42],am64x_dev_mcu_i2c1:[28,29,42],am64x_dev_mcu_m4fss0:[29,42],am64x_dev_mcu_m4fss0_core0:[28,29,33,42],am64x_dev_mcu_mcrc64_0:[28,29,42],am64x_dev_mcu_mcspi0:[28,29,42],am64x_dev_mcu_mcspi1:[28,29,42],am64x_dev_mcu_mcu_gpiomux_introuter0:[28,29,33,39,42],am64x_dev_mcu_psc0:[28,29,42],am64x_dev_mcu_rti0:[28,29,42],am64x_dev_mcu_timer0:[28,29,42],am64x_dev_mcu_timer1:[28,29,42],am64x_dev_mcu_timer2:[28,29,42],am64x_dev_mcu_timer3:[28,29,42],am64x_dev_mcu_uart0:[28,29,42],am64x_dev_mcu_uart1:[28,29,42],am64x_dev_mmcsd0:[28,29,42],am64x_dev_mmcsd1:[28,29,42],am64x_dev_msram_256k0:[28,29,42],am64x_dev_msram_256k1:[28,29,42],am64x_dev_msram_256k2:[28,29,42],am64x_dev_msram_256k3:[28,29,42],am64x_dev_msram_256k4:[28,29,42],am64x_dev_msram_256k5:[28,29,42],am64x_dev_pbist0:[28,29,42],am64x_dev_pbist1:[28,29,42],am64x_dev_pbist2:[28,29,42],am64x_dev_pbist3:[28,29,42],am64x_dev_pcie0:[28,29,33,42],am64x_dev_postdiv1_16fft1:[28,29,42],am64x_dev_postdiv4_16ff0:[28,29,42],am64x_dev_postdiv4_16ff2:[28,29,42],am64x_dev_pru_icssg0:[28,29,33,42],am64x_dev_pru_icssg1:[28,29,33,42],am64x_dev_psc0:[28,29,42],am64x_dev_psramecc0:[28,29,42],am64x_dev_r5fss0:[29,42],am64x_dev_r5fss0_core0:[28,29,33,42],am64x_dev_r5fss0_core1:[28,29,33,42],am64x_dev_r5fss1:[29,42],am64x_dev_r5fss1_core0:[28,29,33,42],am64x_dev_r5fss1_core1:[28,29,33,42],am64x_dev_rti0:[28,29,42],am64x_dev_rti10:[28,29,42],am64x_dev_rti11:[28,29,42],am64x_dev_rti1:[28,29,42],am64x_dev_rti8:[28,29,42],am64x_dev_rti9:[28,29,42],am64x_dev_sa2_ul0:[28,29,42],am64x_dev_serdes_10g0:[28,29,42],am64x_dev_spinlock0:[28,29,42],am64x_dev_stm0:[28,29,42],am64x_dev_timer0:[28,29,33,42],am64x_dev_timer10:[28,29,42],am64x_dev_timer11:[28,29,42],am64x_dev_timer1:[28,29,33,42],am64x_dev_timer2:[28,29,33,42],am64x_dev_timer3:[28,29,33,42],am64x_dev_timer4:[28,29,42],am64x_dev_timer5:[28,29,42],am64x_dev_timer6:[28,29,42],am64x_dev_timer7:[28,29,42],am64x_dev_timer8:[28,29,42],am64x_dev_timer9:[28,29,42],am64x_dev_timermgr0:[28,29,42],am64x_dev_timesync_event_introuter0:[28,29,33,39,42],am64x_dev_uart0:[28,29,42],am64x_dev_uart1:[28,29,42],am64x_dev_uart2:[28,29,42],am64x_dev_uart3:[28,29,42],am64x_dev_uart4:[28,29,42],am64x_dev_uart5:[28,29,42],am64x_dev_uart6:[28,29,42],am64x_dev_usb0:[28,29,42],am64x_dev_vtm0:[28,29,42],am65x:[27,123,128,130],am65x_sr2:[23,74],am65xx:2,am6:[5,13,22,23,74],am6_dev_board0:[43,44,57,58,59,73],am6_dev_cal0:[43,44,48,57,58,59,64,73],am6_dev_cbass0:[43,44,48,57,58,59,64,73],am6_dev_cbass_debug0:[43,44,48,57,58,59,64,73],am6_dev_cbass_fw0:[43,44,48,57,58,59,64,73],am6_dev_cbass_infra0:[43,44,48,57,58,59,64,73],am6_dev_ccdebugss0:[43,44,48,57,58,59,64,73],am6_dev_cmpevent_intrtr0:[43,44,48,54,57,58,59,64,70,73],am6_dev_compute_cluster_a53_0:[43,44,57,58,59,73],am6_dev_compute_cluster_a53_1:[43,44,57,58,59,73],am6_dev_compute_cluster_a53_2:[43,44,57,58,59,73],am6_dev_compute_cluster_a53_3:[43,44,57,58,59,73],am6_dev_compute_cluster_cpac0:[44,57,58,59,73],am6_dev_compute_cluster_cpac1:[44,57,58,59,73],am6_dev_compute_cluster_cpac_pbist0:[44,57,59,73],am6_dev_compute_cluster_cpac_pbist1:[44,57,59,73],am6_dev_compute_cluster_msmc0:[43,44,57,58,59,73],am6_dev_compute_cluster_pbist0:[43,44,57,59,73],am6_dev_cpt2_aggr0:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_main_cal0_0:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_main_dss_2:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_main_navddrhi_5:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_main_navddrlo_6:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_main_navsramhi_3:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_main_navsramlo_4:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_mcu_export_slv_0:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_mcu_fss_s0_2:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_mcu_fss_s1_3:[43,44,57,58,59,73],am6_dev_cpt2_probe_vbusm_mcu_sram_slv_1:[43,44,57,58,59,73],am6_dev_ctrl_mmr0:[43,44,48,57,58,59,64,73],am6_dev_dcc0:[43,44,48,57,58,59,64,73],am6_dev_dcc1:[43,44,48,57,58,59,64,73],am6_dev_dcc2:[43,44,48,57,58,59,64,73],am6_dev_dcc3:[43,44,48,57,58,59,64,73],am6_dev_dcc4:[43,44,48,57,58,59,64,73],am6_dev_dcc5:[43,44,48,57,58,59,64,73],am6_dev_dcc6:[43,44,48,57,58,59,64,73],am6_dev_dcc7:[43,44,48,57,58,59,64,73],am6_dev_ddrss0:[43,44,48,57,58,59,64,73],am6_dev_debugss0:[43,44,48,57,58,59,64,73],am6_dev_debugss_wrap0:[43,44,57,58,59,73],am6_dev_debugsuspendrtr0:[43,44,57,58,59,73],am6_dev_dftss0:[43,44,57,58,59,73],am6_dev_dss0:[43,44,48,57,58,59,64,73],am6_dev_dummy_ip_lpsc_debug2dmsc_vd:[44,57,59,73],am6_dev_dummy_ip_lpsc_dmsc_vd:[44,57,59,73],am6_dev_dummy_ip_lpsc_emif_data_vd:[44,57,59,73],am6_dev_dummy_ip_lpsc_main2mcu_vd:[44,57,59,73],am6_dev_dummy_ip_lpsc_mcu2main_infra_vd:[44,57,59,73],am6_dev_dummy_ip_lpsc_mcu2main_vd:[44,57,59,73],am6_dev_dummy_ip_lpsc_mcu2wkup_vd:[44,57,59,73],am6_dev_dummy_ip_lpsc_wkup2main_infra_vd:[44,57,59,73],am6_dev_dummy_ip_lpsc_wkup2mcu_vd:[44,57,59,73],am6_dev_ecap0:[43,44,48,57,58,59,64,73],am6_dev_ecc_aggr0:[43,44,57,58,59,73],am6_dev_ecc_aggr1:[43,44,57,58,59,73],am6_dev_ecc_aggr2:[43,44,57,58,59,73],am6_dev_efuse0:[43,44,57,58,59,73],am6_dev_ehrpwm0:[43,44,48,57,58,59,64,73],am6_dev_ehrpwm1:[43,44,48,57,58,59,64,73],am6_dev_ehrpwm2:[43,44,48,57,58,59,64,73],am6_dev_ehrpwm3:[43,44,48,57,58,59,64,73],am6_dev_ehrpwm4:[43,44,48,57,58,59,64,73],am6_dev_ehrpwm5:[43,44,48,57,58,59,64,73],am6_dev_elm0:[43,44,48,57,58,59,64,73],am6_dev_eqep0:[43,44,48,57,58,59,64,73],am6_dev_eqep1:[43,44,48,57,58,59,64,73],am6_dev_eqep2:[43,44,48,57,58,59,64,73],am6_dev_esm0:[43,44,48,57,58,59,64,73],am6_dev_fss_mcu_0:[44,57],am6_dev_gic0:[43,44,48,57,58,59,64,73],am6_dev_gpio0:[43,44,48,57,58,59,64,73],am6_dev_gpio1:[43,44,48,57,58,59,64,73],am6_dev_gpiomux_intrtr0:[43,44,48,54,57,58,59,64,70,73],am6_dev_gpmc0:[43,44,48,57,58,59,64,73],am6_dev_gpu0:[43,44,48,57,58,59,64,73],am6_dev_gs80prg_mcu_wrap_wkup_0:[43,44,57,58,59,73],am6_dev_gs80prg_soc_wrap_wkup_0:[43,44,57,58,59,73],am6_dev_gtc0:[43,44,48,57,58,59,64,73],am6_dev_i2c0:[43,44,48,57,58,59,64,73],am6_dev_i2c1:[43,44,48,57,58,59,64,73],am6_dev_i2c2:[43,44,48,57,58,59,64,73],am6_dev_i2c3:[43,44,48,57,58,59,64,73],am6_dev_icemelter_wkup_0:[44,57,59,73],am6_dev_k3_arm_atb_funnel_3_32_mcu_0:[43,44,57,58,59,73],am6_dev_k3_led_main_0:[44,57,59,73],am6_dev_main2mcu_lvl_intrtr0:[43,44,48,54,57,58,59,64,70,73],am6_dev_main2mcu_pls_intrtr0:[43,44,48,54,57,58,59,64,70,73],am6_dev_mcasp0:[43,44,48,57,58,59,64,73],am6_dev_mcasp1:[43,44,48,57,58,59,64,73],am6_dev_mcasp2:[43,44,48,57,58,59,64,73],am6_dev_mcspi0:[43,44,48,57,58,59,64,73],am6_dev_mcspi1:[43,44,48,57,58,59,64,73],am6_dev_mcspi2:[43,44,48,57,58,59,64,73],am6_dev_mcspi3:[43,44,48,57,58,59,64,73],am6_dev_mcspi4:[43,44,57,58,59,73],am6_dev_mcu_adc0:[43,44,57,58,59,73],am6_dev_mcu_adc1:[43,44,57,58,59,73],am6_dev_mcu_armss0:[44,57,58,59,73],am6_dev_mcu_armss0_cpu0:[43,44,48,57,58,59,64,73],am6_dev_mcu_armss0_cpu1:[43,44,48,57,58,59,64,73],am6_dev_mcu_cbass0:[43,44,57,58,59,73],am6_dev_mcu_cbass_debug0:[43,44,57,58,59,73],am6_dev_mcu_cbass_fw0:[43,44,57,58,59,73],am6_dev_mcu_cpsw0:[43,44,48,57,58,59,64,73],am6_dev_mcu_cpt2_aggr0:[43,44,57,58,59,73],am6_dev_mcu_ctrl_mmr0:[43,44,57,58,59,73],am6_dev_mcu_dcc0:[43,44,57,58,59,73],am6_dev_mcu_dcc1:[43,44,57,58,59,73],am6_dev_mcu_dcc2:[43,44,57,58,59,73],am6_dev_mcu_debugss0:[43,44,57,58,59,73],am6_dev_mcu_ecc_aggr0:[43,44,57,58,59,73],am6_dev_mcu_ecc_aggr1:[43,44,57,58,59,73],am6_dev_mcu_efuse0:[43,44,57,58,59,73],am6_dev_mcu_esm0:[43,44,57,58,59,73],am6_dev_mcu_fss0_fsas_0:[44,57,59,73],am6_dev_mcu_fss0_hyperbus0:[43,44,57,58,59,73],am6_dev_mcu_fss0_ospi_0:[43,44,57,58,59,73],am6_dev_mcu_fss0_ospi_1:[43,44,57,58,59,73],am6_dev_mcu_i2c0:[43,44,57,58,59,73],am6_dev_mcu_mcan0:[43,44,57,58,59,73],am6_dev_mcu_mcan1:[43,44,57,58,59,73],am6_dev_mcu_mcspi0:[43,44,57,58,59,73],am6_dev_mcu_mcspi1:[43,44,57,58,59,73],am6_dev_mcu_mcspi2:[43,44,57,58,59,73],am6_dev_mcu_msram0:[43,44,57,58,59,73],am6_dev_mcu_navss0:[43,44,52,57,58,59,68,73],am6_dev_mcu_navss0_intr_aggr_0:[44,48,54,57,59,64,70,73],am6_dev_mcu_navss0_intr_router_0:[44,48,54,57,59,64,70,73],am6_dev_mcu_navss0_mcrc0:[44,48,57,59,64,73],am6_dev_mcu_navss0_proxy0:[44,51,54,57,59,67,70,73],am6_dev_mcu_navss0_ringacc0:[44,48,53,54,57,59,64,69,70,73],am6_dev_mcu_navss0_udmap0:[44,45,48,54,57,59,60,64,70,73],am6_dev_mcu_pbist0:[43,44,57,58,59,73],am6_dev_mcu_pdma0:[43,44,57,58,59,73],am6_dev_mcu_pdma1:[43,44,57,58,59,73],am6_dev_mcu_pll_mmr0:[43,44,57,58,59,73],am6_dev_mcu_psram0:[43,44,57,58,59,73],am6_dev_mcu_rom0:[43,44,57,58,59,73],am6_dev_mcu_rti0:[43,44,57,58,59,73],am6_dev_mcu_rti1:[43,44,57,58,59,73],am6_dev_mcu_sec_mmr0:[43,44,57,58,59,73],am6_dev_mcu_timer0:[43,44,57,58,59,73],am6_dev_mcu_timer1:[43,44,57,58,59,73],am6_dev_mcu_timer2:[43,44,57,58,59,73],am6_dev_mcu_timer3:[43,44,57,58,59,73],am6_dev_mcu_uart0:[43,44,57,58,59,73],am6_dev_mmcsd0:[43,44,48,57,58,59,64,73],am6_dev_mmcsd1:[43,44,48,57,58,59,64,73],am6_dev_mx_efuse_main_chain_main_0:[44,57,58,59,73],am6_dev_mx_efuse_mcu_chain_mcu_0:[44,57,58,59,73],am6_dev_mx_wakeup_reset_sync_wkup_0:[44,57,59,73],am6_dev_navss0:[43,44,48,52,57,58,59,64,68,73],am6_dev_navss0_cpts0:[44,48,57,59,64,73],am6_dev_navss0_intr_router_0:[44,48,54,57,59,64,70,73],am6_dev_navss0_mailbox0_cluster0:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster10:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster11:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster1:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster2:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster3:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster4:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster5:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster6:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster7:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster8:[44,48,57,59,64,73],am6_dev_navss0_mailbox0_cluster9:[44,48,57,59,64,73],am6_dev_navss0_mcrc0:[44,48,57,59,64,73],am6_dev_navss0_modss_inta0:[44,48,54,57,59,64,70,73],am6_dev_navss0_modss_inta1:[44,48,54,57,59,64,70,73],am6_dev_navss0_proxy0:[44,51,54,57,59,67,70,73],am6_dev_navss0_pvu0:[44,48,57,59,64,73],am6_dev_navss0_pvu1:[44,48,57,59,64,73],am6_dev_navss0_ringacc0:[44,48,53,54,57,59,64,69,70,73],am6_dev_navss0_timer_mgr0:[44,57,59,73],am6_dev_navss0_timer_mgr1:[44,57,59,73],am6_dev_navss0_udmap0:[44,45,48,54,57,59,60,64,70,73],am6_dev_navss0_udmass_inta0:[44,48,54,57,59,64,70,73],am6_dev_oldi_tx_core_main_0:[43,44,57,58,59,73],am6_dev_pbist0:[43,44,57,58,59,73],am6_dev_pbist1:[43,44,57,58,59,73],am6_dev_pcie0:[43,44,48,57,58,59,64,73],am6_dev_pcie1:[43,44,48,57,58,59,64,73],am6_dev_pdma0:[43,44,57,58,59,73],am6_dev_pdma1:[43,44,48,57,58,59,64,73],am6_dev_pdma_debug0:[43,44,57,58,59,73],am6_dev_pll_mmr0:[43,44,57,58,59,73],am6_dev_pllctrl0:[43,44,57,58,59,73],am6_dev_pru_icssg0:[43,44,48,57,58,59,64,73],am6_dev_pru_icssg1:[43,44,48,57,58,59,64,73],am6_dev_pru_icssg2:[43,44,48,57,58,59,64,73],am6_dev_psc0:[43,44,57,58,59,73],am6_dev_psramecc0:[43,44,57,58,59,73],am6_dev_rti0:[43,44,57,58,59,73],am6_dev_rti1:[43,44,57,58,59,73],am6_dev_rti2:[43,44,57,58,59,73],am6_dev_rti3:[43,44,57,58,59,73],am6_dev_sa2_ul0:[43,44,48,57,58,59,64,73,126],am6_dev_serdes0:[43,44,57,58,59,73],am6_dev_serdes1:[43,44,57,58,59,73],am6_dev_stm0:[43,44,57,58,59,73],am6_dev_timer0:[43,44,48,57,58,59,64,73],am6_dev_timer10:[43,44,48,57,58,59,64,73],am6_dev_timer11:[43,44,48,57,58,59,64,73],am6_dev_timer1:[43,44,48,57,58,59,64,73],am6_dev_timer2:[43,44,48,57,58,59,64,73],am6_dev_timer3:[43,44,48,57,58,59,64,73],am6_dev_timer4:[43,44,48,57,58,59,64,73],am6_dev_timer5:[43,44,48,57,58,59,64,73],am6_dev_timer6:[43,44,48,57,58,59,64,73],am6_dev_timer7:[43,44,48,57,58,59,64,73],am6_dev_timer8:[43,44,48,57,58,59,64,73],am6_dev_timer9:[43,44,48,57,58,59,64,73],am6_dev_timesync_intrtr0:[43,44,48,54,57,58,59,64,70,73],am6_dev_uart0:[43,44,48,57,58,59,64,73],am6_dev_uart1:[43,44,48,57,58,59,64,73],am6_dev_uart2:[43,44,48,57,58,59,64,73],am6_dev_usb3ss0:[43,44,48,57,58,59,64,73],am6_dev_usb3ss1:[43,44,48,57,58,59,64,73],am6_dev_vdc_data_vbusm_32b_ref_mcu2wkup:[44,57,59,73],am6_dev_vdc_data_vbusm_32b_ref_wkup2mcu:[44,57,59,73],am6_dev_vdc_data_vbusm_64b_ref_main2mcu:[44,57,59,73],am6_dev_vdc_data_vbusm_64b_ref_mcu2main:[44,57,59,73],am6_dev_vdc_dmsc_dbg_vbusp_32b_ref_dbg2dmsc:[44,57,59,73],am6_dev_vdc_infra_vbusp_32b_ref_mcu2main_infra:[44,57,59,73],am6_dev_vdc_infra_vbusp_32b_ref_wkup2main_infra:[44,57,59,73],am6_dev_vdc_mcu_dbg_vbusp_32b_ref_dbgmain2mcu:[44,57,59,73],am6_dev_vdc_nav_psil_128b_ref_main2mcu:[44,57,59,73],am6_dev_vdc_soc_fw_vbusp_32b_ref_fwmcu2main:[44,57,59,73],am6_dev_vdc_soc_fw_vbusp_32b_ref_fwwkup2mcu:[44,57,59,73],am6_dev_wkup_cbass0:[43,44,57,58,59,73],am6_dev_wkup_cbass_fw0:[43,44,57,58,59,73],am6_dev_wkup_ctrl_mmr0:[43,44,57,58,59,73],am6_dev_wkup_dmsc0:[44,57,58,59,73],am6_dev_wkup_dmsc0_cortex_m3_0:[44,48,57,59,64,73],am6_dev_wkup_ecc_aggr0:[43,44,57,58,59,73],am6_dev_wkup_esm0:[43,44,48,57,58,59,64,73],am6_dev_wkup_gpio0:[43,44,48,57,58,59,64,73],am6_dev_wkup_gpiomux_intrtr0:[43,44,48,54,57,58,59,64,70,73],am6_dev_wkup_i2c0:[43,44,57,58,59,73],am6_dev_wkup_pllctrl0:[43,44,57,58,59,73],am6_dev_wkup_psc0:[43,44,57,58,59,73],am6_dev_wkup_uart0:[43,44,57,58,59,73],am6_dev_wkup_vtm0:[43,44,57,58,59,73],am6x:[2,126],among:[5,129],amount:[19,27],ani:[0,2,5,6,8,10,11,12,13,19,22,23,24,27,36,119,120,122,126,128,129],anoth:[2,5,6,12,13,14,16,20,23,27,37,45,52,60,68,77,84,91,98,106,113,122,123],anti:19,api:[0,1,2,4,8,9,10,11,12,18,19,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,123,124,125,126,127,129,130],appdata:128,append:[5,19,23,124,127],appli:[5,13,15,18,19,30,123,127,128],applic:[3,5,8,10,11,12,13,16,17,18,19,21,22,23,30,34,45,49,60,65,77,81,91,95,106,110,119,120,122,124,128,129],approach:[0,124],appropri:[5,6,13,127],aqcmpintr_level:[48,64],arbitrari:27,arch32:13,architectur:[0,8,21,23,119],area:[24,61,122],argument:[7,23,123,128,129],arm0:34,arm:[0,27,49,65,81,95,110],arrai:[12,14,15,19,21,23,30,33,38,45,48,51,53,60,64,67,69,77,80,83,85,91,94,97,99,106,109,112,114,122,128],ascend:23,asel:11,asn1:[19,128],asn:19,assert:[6,13,18],assign:[9,11,12,16,21,27,30,33,38,45,47,48,51,53,60,63,64,67,69,74,77,80,83,85,91,94,97,99,106,109,112,114,122],associ:[16,18,21,22,28,43,58,75,89,104],assum:[9,11,12,23,120,128,129],assur:23,asymmetr:[17,124],atcm:13,atcm_en:13,atf:32,attack:13,attempt:[5,6,11,13,18,23,27,119],attribut:[19,23,120,123],atyp:[23,27],audio:[81,95,110],auth_in_plac:19,authent:[0,2,19,22,24,124,126],authenticate_and_start_imag:13,authinplac:19,author:128,automat:[3,5,18,123],avabl:126,avail:[2,3,5,12,13,14,15,17,18,20,22,23,24,27,120,122,129],availabler:126,avoid:[13,128,129],back:[2,3,9,10,11,15,21,32,47,63,79,93,108,123,126],backward:[5,7,22,23,103,118,121],bad:27,bad_devic:27,bank:129,base:[0,5,6,8,10,11,12,13,16,18,19,21,22,27,30,34,37,38,45,49,51,52,53,60,65,67,68,69,77,81,83,84,85,91,95,97,98,99,106,110,112,113,114,120,122,123,126,128],baseport:[7,21],basi:23,basic:[0,13,19],basicconstraint:[19,128],bc_lvl:[48,64],bcdma:[0,2],bcdma_chan_data_complet:33,bcdma_chan_error:33,bcdma_chan_ring_complet:33,bcdma_rx:37,bcdma_rx_chan_data_complet:33,bcdma_rx_chan_error:33,bcdma_rx_chan_ring_complet:33,bcdma_tx:37,bcdma_tx_chan_data_complet:33,bcdma_tx_chan_error:33,bcdma_tx_chan_ring_complet:33,bcfg:19,bcfg_hash:19,becaus:[11,13,18,23,30,119],becom:[121,122],been:[2,5,15,18,23,27,122,129],beenabl:126,befor:[2,5,10,13,18,19,21,23,24,27,123,124,127,128],begin:[3,19],behav:[103,118],behavior:[3,6,7,23],behaviour:123,behind:[23,126],being:[2,5,6,8,12,13,19,21,22,24,30,39,45,54,60,70,77,86,91,100,106,115,119,120,123,128],belong:[5,27],below:[0,2,5,6,13,14,16,18,19,20,21,22,23,24,27,31,46,62,78,92,107,120,122,123,124,127,128,129],ber:19,best:5,better:[5,13],between:[0,2,6,8,11,13,18,23],beyond:[2,12,23],big:19,binari:[13,19,23,120,123,124,125,130],binary_fil:23,bit:[2,3,5,6,8,9,10,11,12,13,15,16,18,19,21,22,23,24,27,39,54,61,70,86,100,115,119,120,121,122,123,128],bitfield:[6,8,9,10,11,12,23,119,121],blob:[2,19,21,23,124],block:[0,2,5,6,19,23,30,128],block_copy_chan:[30,38],block_everyon:[31,46,62,78,92,107],bmpk:128,board0:5,board:[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,20,26,27,28,29,30,31,32,33,34,35,36,37,38,40,41,42,43,44,45,46,47,48,49,50,51,52,53,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,87,88,89,90,91,92,93,94,95,96,97,98,99,101,102,103,104,105,106,107,108,109,110,111,112,113,114,116,117,118,119,120,121,122,123,125,126,127,130],boardcfg:[0,19,22,23,24,31,46,62,78,92,107,124],boardcfg_abi_maj:21,boardcfg_abi_min:21,boardcfg_abi_rev:[21,24],boardcfg_cfg:21,boardcfg_control_magic_num:21,boardcfg_dbg_cfg:27,boardcfg_dbg_cfg_magic_num:21,boardcfg_devgrp:21,boardcfg_dkek_cfg_magic_num:21,boardcfg_host_hierarchy_magic_num:21,boardcfg_max_main_host_count:21,boardcfg_max_mcu_host_count:21,boardcfg_msmc:3,boardcfg_msmc_magic_num:21,boardcfg_otp_cfg_magic_num:21,boardcfg_pm_devgrp:22,boardcfg_pm_siz:22,boardcfg_pmp_high:22,boardcfg_pmp_low:22,boardcfg_proc_acl_magic_num:21,boardcfg_rm_devgrp:23,boardcfg_rm_host_cfg:21,boardcfg_rm_host_cfg_magic_num:21,boardcfg_rm_resasg:21,boardcfg_rm_resasg_magic_num:21,boardcfg_rm_siz:23,boardcfg_rmp_high:23,boardcfg_rmp_low:23,boardcfg_sec:24,boardcfg_secproxy_magic_num:21,boardcfg_security_devgrp:24,boardcfg_security_s:24,boardcfg_securityp_high:24,boardcfg_securityp_low:24,boardcfg_siz:21,boardcfg_subhdr:21,boardcfghash:[19,124],boardcfgp_high:21,boardcfgp_low:21,boardconfig:[27,119],bodi:124,boot:[0,3,4,17,21,22,23,24,27,31,32,34,42,46,47,49,57,62,63,65,73,78,79,81,88,92,93,95,102,107,108,110,117,119,122,125,126,128,129,130],boot_seq:19,bootcor:19,bootcoreopts_clr:19,bootcoreopts_set:19,bootload:[0,3,34,49,65,81,95,110,119],bootpin:[34,49,65,81,95,110],bootvector:13,bootvector_hi:13,bootvector_lo:13,both:[2,5,8,10,13,19,21,22,23,24,30,123,124,128,129],boundari:23,bp_init_complet:27,brddat:128,bring:[7,119,127],broadcast:23,btcm:13,btcm_en:13,buffer:[12,19,21],build:[27,40,55,71],built:[22,27],burnt:120,burst:[12,27],bus:[11,12,13,23],bus_intr_64:[56,72],bus_intr_65:[56,72],bus_intr_66:[56,72],bus_intr_67:[56,72],bus_spi_64:[56,72],bus_spi_65:[56,72],bus_spi_66:[56,72],bus_spi_67:[56,72],bus_spi_68:[56,72],bus_spi_69:[56,72],bus_spi_70:[56,72],bus_spi_71:[56,72],bus_spi_72:[56,72],bus_spi_73:[56,72],bus_spi_74:[56,72],bus_spi_75:[56,72],bus_spi_76:[56,72],bus_spi_77:[56,72],bus_spi_78:[56,72],bus_spi_79:[56,72],c47d9ca8d1aae57b8e8784a12f636b2b:128,c66:[13,95,110],c66_event_in_sync:[94,109],c66_event_in_sync_4:[101,116],c66_event_in_sync_5:[101,116],c66_event_in_sync_6:[101,116],c66_event_in_sync_7:[101,116],c66ss0_core0:[96,101,111,116],c66ss1_core0:[96,101,111,116],c6x_0:[93,108],c6x_0_0:[93,101,108,116],c6x_0_1:[93,101,108,116],c6x_1:[93,108],c6x_1_0:[93,101,108,116],c6x_1_1:[93,101,108,116],c71ss0:[96,111],c7x:[93,95,108,110],c7x_0:[93,101,108,116],c7x_1:[93,101,108,116],cach:[3,21,31,46,62,78,92,107],cal0_rx:[52,68],calc_val:2,calcul:[11,17,124,127],call:[5,7,8,13,22,119,120,121,124,129],can:[0,2,5,6,7,8,10,11,12,13,16,18,20,21,22,23,24,27,28,29,31,34,43,44,45,46,49,58,59,60,62,65,75,76,77,78,81,89,90,91,92,95,104,105,106,107,110,119,120,121,122,126,128,129],cannot:[11,12,13,18,23,24,30,33,37,38,45,47,48,51,52,53,60,63,64,67,68,69,77,80,83,84,85,91,94,97,98,99,106,109,112,113,114,123,126,128],canon:19,capabl:[0,5,8,10,22,23,24,119],captur:[22,23],card:128,care:[6,22,119,124],carefulli:6,carri:[120,122],categori:[122,123],caus:[3,23],cba:0,cba_permission_0:[31,46,62,78,92,107],cba_permission_1:[31,46,62,78,92,107],cba_permission_2:[31,46,62,78,92,107],cba_permission_x:[31,46,62,78,92,107],cbc:[19,124,127],ccboard0:128,cccccccccccccccccccccccccccccccc:128,ccdc_intr_pend:[94,109],ccs1010:128,ccs:128,ccs_base:128,ccs_version:128,center:3,cer:19,certain:[2,5,6,7,20],certif:[4,13,17,18,24,127],certifi:120,certificate_address_hi:13,certificate_address_lo:13,cfg:[11,12,13,23,24],challeng:0,chang:[5,8,12,27,124,127],channel:[8,9,10,11,16,21,23,27,48,64,80,94,109,123],chapter:[0,5,6,8,9,10,11,12,13,14,15,16,17,20,28,29,30,31,32,33,34,35,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,122,123,130],charact:128,character:22,characterist:120,chart:5,check:[5,11,12,13,18,19,21,23,24,119,120,123,128],chip:124,choic:21,choos:[2,5,23,28,43,58,75,89,104,119,124,126,127,128],chose:2,chosen:[2,6,7,124,127],claim:[6,13,123,126],cleanup:13,clear:[6,8,10,12,13,18,19,22,27,129],clk32:5,clk:[5,27],clk_gate:13,clk_id:5,clk_stop:13,clkout:[34,49,65,81,95,110],clock:[0,4,13,27,34,49,65,74,81,95,110],clock_dis:27,clock_en:27,clock_set_par:27,clock_set_r:27,clockstatu:5,close:[5,18,128],closest:5,clstr_cfg:13,cluster:[13,35,50,66,82,96,111,128],cmac:120,cnt:11,code:[2,5,13,22,23,27,128,129],coher:[13,21,23],cold:122,collect:0,com:[19,23,128],combin:[0,3,8,11,18,19,22,23,31,46,62,78,92,107,128],come:[27,124],command:[4,5,13,17,128],common:[0,12,15,16,17,23,27,45,60,77,91,106,128],commun:[0,3,18,22,41,56,72,87,93,101,116,119,128],compact:[21,27],compait:[103,118],compar:[19,119,122,124,128],comparison:12,compat:[7,21,22,23,121],compatibl:2,complet:[2,6,8,11,12,13,18,21,22,23,24,27,34,49,65,81,95,110,119,120,127,129],complex:[0,127],complianc:6,complic:13,compon:[0,3],compos:128,comprehend:27,compulsorili:129,comput:[32,47,63,79,93,108,120],compute_cluster0_clec:[101,116],compute_cluster0_gic500ss:[87,101,116],compute_cluster0_msmc_1mb:87,compute_cluster0_msmc_en:87,compute_cluster_j7es_tb_vdc_main_0_dmsc_wrap:[96,111],compute_cluster_j7vcl_tb_vdc_main_0_msmc_en:82,compute_cluster_msmc0:[50,66,128],concaten:128,concept:[0,13,119,123],concern:119,condit:[0,13],config:[3,10,13,16,27,119,128],config_flags_1:13,config_flags_1_clear:13,config_flags_1_set:13,config_security_keystore_s:[40,55,71],configflags_clr:19,configflags_set:19,configur:[0,1,2,3,4,7,8,14,15,17,18,20,26,28,29,30,31,32,33,34,35,36,37,38,40,41,42,43,44,45,46,47,48,49,50,51,52,53,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,87,88,89,90,91,92,93,94,95,96,97,98,99,101,102,103,104,105,106,107,108,109,110,111,112,113,114,116,117,118,119,120,121,125,126,127,130],confirm:[5,13,126],confirugr:[40,55,71],conform:[23,123],confus:[35,50,66,82,96,111,119],conjunct:[6,13],connect:[5,8,22,33,34,48,49,64,65,80,81,94,95,109,110,128],consecut:13,consid:[2,3,9,11,12,13,22,23],consider:27,consist:[3,5,6,7,13,21,22,23,24],consol:[23,27],constant:12,constraint:13,consum:23,contact:122,contain:[0,2,3,5,6,7,13,14,17,18,19,21,22,23,24,36,120,121,122,128],content:[0,3,16,19,23,27,128],context:[2,6,14,32,47,63,79,93,108,120,122],context_loss_count:6,contigu:[12,23],continu:[13,23,129],control:[0,4,8,9,12,16,18,19,21,23,24,28,32,42,43,47,57,58,63,73,75,79,88,89,93,102,104,108,117,119,120,123,126,129,130],control_flags_1:13,control_flags_1_clear:13,control_flags_1_set:13,conveni:[119,128],convent:[27,128],convert:11,copi:[5,19,23,30],core:[0,3,13,19,20,24,27,120,121,122,123,127,128,129],core_halt:13,coredbgen:[19,128],coredbgsecen:[19,128],corepac:13,coresecdbgen:128,correct:[12,13],correctli:[2,24,129],correl:120,correspond:[2,5,8,9,11,12,13,28,31,43,46,58,62,75,78,89,92,104,107,119,121,123,124,128,129],corrupt:21,cortex:[32,47,63,79,93,108],could:[7,13,21,23,119,122],count:[10,11,12,22,27,122],counter:[6,11,120,124],cover:[9,10,11,126],cpsw2_rx:37,cpsw2_tx:37,cpsw:[49,65,81,95,110],cpsw_rx_chan:[30,38],cpsw_tx_chan:[30,38],cpts0_comp:[48,64,80,94,109],cpts0_genf0:[48,64,80,94,109],cpts0_genf1:[48,64,80,94,109],cpts0_genf2:[48,64,80,94,109],cpts0_genf3:[48,64,80,94,109],cpts0_genf4:[48,64,80,94,109],cpts0_genf5:[48,64,80,94,109],cpts0_hw1_push:[48,64,80,94,109],cpts0_hw2_push:[48,64,80,94,109],cpts0_hw3_push:[48,64,80,94,109],cpts0_hw4_push:[48,64,80,94,109],cpts0_hw5_push:[48,64,80,94,109],cpts0_hw6_push:[48,64,80,94,109],cpts0_hw7_push:[48,64,80,94,109],cpts0_hw8_push:[48,64,80,94,109],cpts0_sync:[48,64,80,94,109],cpts_comp:[33,48,64,80,94,109],cpts_genf0:[33,48,64,80,94,109],cpts_genf1:[33,48,64,80,94,109],cpts_genf2:33,cpts_genf3:33,cpts_genf4:33,cpts_genf5:33,cpts_hw1_push:[33,80,94,109],cpts_hw2_push:[33,80,94,109],cpts_hw3_push:[33,48,64,80,94,109],cpts_hw4_push:[33,48,64,80,94,109],cpts_hw5_push:[33,80,94,109],cpts_hw6_push:[33,80,94,109],cpts_hw7_push:[33,80,94,109],cpts_hw8_push:[33,80,94,109],cpts_sync:[33,48,64,80,94,109],cpu1:13,cpu:[0,13,120],creat:[3,5,6,7,13,21,22,23,24,120,124],credenti:[11,24],credit:[10,12,21,27],criteria:23,critic:[2,3,13,57,73,88,102,117,119],crypto:[0,2,126],cryptograph:126,crystal:[34,49,65,81,95,110],cs_dap:128,cs_dap_0:128,csi_err_irq:[94,109],csi_interrupt:[94,109],csi_irq:[94,109],csi_level:[94,109],csl_efail:5,ctm_level:[48,64],ctrl:22,ctrl_mmr:13,ctrlmmr_sec_clstrx_cfg:13,cumul:[22,23],current:[3,5,6,13,15,16,19,21,22,23,24,27,39,54,70,86,100,115,123,128],current_st:[5,6],custmpk:128,custom:[5,18,19,21,23,122,128],dat:128,data0_v:11,data1_v:11,data:[0,2,9,11,13,19,119,120,122,123,126,128,130],databas:120,dbg_en:13,dbg_niden:13,dbg_spiden:13,dbg_spniden:13,dbgauth:128,ddr:[34,49,65,81,95,110],ddrss_control:[80,94,109],ddrss_hs_phy_global_error:[80,94,109],ddrss_pll_freq_change_req:[80,94,109],ddrss_v2a_other_err_lvl:[80,94,109],ddrss_v2h_other_err_lvl:[48,64],deal:[119,122],deassert:13,debug:[0,4,13,18,31,46,62,78,92,107,119,125,130],debug_cert_addr:17,debug_cfg:21,debug_core_sel:19,debug_dis:19,debug_ful:[19,128],debug_preserv:19,debug_priv_level:[19,128],debug_publ:19,debug_public_us:19,debug_secure_us:19,debug_unlock_cert:128,debugctrl:19,debugg:[18,128],debugss:18,debugtyp:[19,128],debuguid:[19,128],decis:[19,128],decod:[19,27],decoupl:11,decrypt:[2,19,120,122,124,126,127],dedic:[21,126],defer:[24,27],defin:[0,2,7,8,9,10,11,12,16,19,21,22,23,24,27,28,29,40,43,44,47,55,58,59,63,71,75,76,89,90,103,104,105,118,119,120,121,123,124],definit:[2,7,21,23,128],deiniti:7,delai:[13,18],delay_before_iteration_loop_start_u:13,delay_per_iteration_u:13,deleg:[45,60,77,91,106],delegated_host:12,deliveri:122,demand:21,denot:121,dep:27,depend:[6,7,8,13,18,19,22,23,24,27,119,122,128],deprec:123,depth:[12,119],der:[19,128],deriv:[0,4,21,22,31,46,62,78,92,107,125,126,130],describ:[0,2,3,5,6,7,8,11,12,17,18,19,21,23,24,27,28,30,33,37,38,43,45,48,51,52,53,58,60,64,67,68,69,75,77,80,83,84,85,89,91,94,97,98,99,104,106,109,112,113,114,120,122,123,124,126,127,128,129],descript:[2,3,4,5,6,7,18,19,21,22,23,24,28,43,58,74,75,89,104,119,120,121,122,123,126,128,129],descriptor:[12,27],design:[3,5,24,27,129],desir:[2,5,6,8,13,24,119,120,123,124,129],desrib:0,destaddr:19,destin:[2,8,10,12,19,27],detail:[0,2,13,27,31,46,62,78,92,107,119,122,126],detect:[23,30,33,38,45,48,51,53,60,64,67,69,77,80,83,85,91,94,97,99,106,109,112,114,119],determin:[5,6,10,19,34,49,65,81,95,110,127,128],determinist:120,dev:[23,27],dev_a53ss0_a53_divh_clk4_obsclk_out_clk:28,dev_a53ss0_core_0_a53_core0_arm_clk_clk:28,dev_a53ss0_core_1_a53_core1_arm_clk_clk:28,dev_a53ss0_corepac_arm_clk_clk:28,dev_a53ss0_pll_ctrl_clk:28,dev_a72ss0_arm_clk_clk:[89,104],dev_a72ss0_core0_0_arm_clk_clk:75,dev_a72ss0_core0_1_arm_clk_clk:75,dev_a72ss0_core0_arm_clk_clk:[75,89,104],dev_a72ss0_core0_msmc_clk:75,dev_a72ss0_core0_pll_ctrl_clk:75,dev_a72ss0_core1_arm_clk_clk:[89,104],dev_a72ss0_msmc_clk:[89,104],dev_a72ss0_pll_ctrl_clk:[89,104],dev_aasrc0_rx0_sync:[89,104],dev_aasrc0_rx0_sync_parent_board_0_ext_refclk1_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp0_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp0_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp10_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp10_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp11_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp11_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp1_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp1_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp2_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp2_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp3_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp3_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp4_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp4_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp5_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp5_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp6_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp6_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp7_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp7_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp8_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp8_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp9_afsr_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcasp9_afsx_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mlb0_mlbclk_out:[89,104],dev_aasrc0_rx0_sync_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_aasrc0_rx0_sync_parent_hsdiv3_16fft_main_15_hsdivout3_clk:[89,104],dev_aasrc0_rx0_sync_parent_hsdiv3_16fft_main_4_hsdivout3_clk:[89,104],dev_aasrc0_rx0_sync_parent_mcasp_ahclko_mux_out0:[89,104],dev_aasrc0_rx0_sync_parent_mcasp_ahclko_mux_out1:[89,104],dev_aasrc0_rx0_sync_parent_mcasp_ahclko_mux_out2:[89,104],dev_aasrc0_rx0_sync_parent_mcasp_ahclko_mux_out3:[89,104],dev_aasrc0_rx0_sync_parent_mcu_adc_clk_sel_out0:[89,104],dev_aasrc0_rx0_sync_parent_mcu_adc_clk_sel_out1:[89,104],dev_aasrc0_rx1_sync:[89,104],dev_aasrc0_rx1_sync_parent_board_0_ext_refclk1_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp0_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp0_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp10_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp10_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp11_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp11_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp1_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp1_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp2_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp2_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp3_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp3_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp4_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp4_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp5_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp5_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp6_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp6_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp7_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp7_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp8_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp8_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp9_afsr_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcasp9_afsx_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mlb0_mlbclk_out:[89,104],dev_aasrc0_rx1_sync_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_aasrc0_rx1_sync_parent_hsdiv3_16fft_main_15_hsdivout3_clk:[89,104],dev_aasrc0_rx1_sync_parent_hsdiv3_16fft_main_4_hsdivout3_clk:[89,104],dev_aasrc0_rx1_sync_parent_mcasp_ahclko_mux_out0:[89,104],dev_aasrc0_rx1_sync_parent_mcasp_ahclko_mux_out1:[89,104],dev_aasrc0_rx1_sync_parent_mcasp_ahclko_mux_out2:[89,104],dev_aasrc0_rx1_sync_parent_mcasp_ahclko_mux_out3:[89,104],dev_aasrc0_rx1_sync_parent_mcu_adc_clk_sel_out0:[89,104],dev_aasrc0_rx1_sync_parent_mcu_adc_clk_sel_out1:[89,104],dev_aasrc0_rx2_sync:[89,104],dev_aasrc0_rx2_sync_parent_board_0_ext_refclk1_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp0_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp0_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp10_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp10_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp11_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp11_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp1_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp1_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp2_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp2_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp3_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp3_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp4_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp4_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp5_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp5_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp6_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp6_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp7_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp7_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp8_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp8_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp9_afsr_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcasp9_afsx_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mlb0_mlbclk_out:[89,104],dev_aasrc0_rx2_sync_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_aasrc0_rx2_sync_parent_hsdiv3_16fft_main_15_hsdivout3_clk:[89,104],dev_aasrc0_rx2_sync_parent_hsdiv3_16fft_main_4_hsdivout3_clk:[89,104],dev_aasrc0_rx2_sync_parent_mcasp_ahclko_mux_out0:[89,104],dev_aasrc0_rx2_sync_parent_mcasp_ahclko_mux_out1:[89,104],dev_aasrc0_rx2_sync_parent_mcasp_ahclko_mux_out2:[89,104],dev_aasrc0_rx2_sync_parent_mcasp_ahclko_mux_out3:[89,104],dev_aasrc0_rx2_sync_parent_mcu_adc_clk_sel_out0:[89,104],dev_aasrc0_rx2_sync_parent_mcu_adc_clk_sel_out1:[89,104],dev_aasrc0_rx3_sync:[89,104],dev_aasrc0_rx3_sync_parent_board_0_ext_refclk1_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp0_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp0_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp10_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp10_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp11_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp11_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp1_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp1_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp2_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp2_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp3_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp3_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp4_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp4_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp5_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp5_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp6_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp6_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp7_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp7_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp8_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp8_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp9_afsr_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcasp9_afsx_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mlb0_mlbclk_out:[89,104],dev_aasrc0_rx3_sync_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_aasrc0_rx3_sync_parent_hsdiv3_16fft_main_15_hsdivout3_clk:[89,104],dev_aasrc0_rx3_sync_parent_hsdiv3_16fft_main_4_hsdivout3_clk:[89,104],dev_aasrc0_rx3_sync_parent_mcasp_ahclko_mux_out0:[89,104],dev_aasrc0_rx3_sync_parent_mcasp_ahclko_mux_out1:[89,104],dev_aasrc0_rx3_sync_parent_mcasp_ahclko_mux_out2:[89,104],dev_aasrc0_rx3_sync_parent_mcasp_ahclko_mux_out3:[89,104],dev_aasrc0_rx3_sync_parent_mcu_adc_clk_sel_out0:[89,104],dev_aasrc0_rx3_sync_parent_mcu_adc_clk_sel_out1:[89,104],dev_aasrc0_sys_clk:[89,104],dev_aasrc0_tx0_sync:[89,104],dev_aasrc0_tx0_sync_parent_board_0_ext_refclk1_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp0_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp0_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp10_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp10_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp11_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp11_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp1_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp1_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp2_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp2_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp3_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp3_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp4_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp4_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp5_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp5_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp6_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp6_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp7_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp7_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp8_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp8_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp9_afsx_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcasp9_afsx_out_dup0:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mlb0_mlbclk_out:[89,104],dev_aasrc0_tx0_sync_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_aasrc0_tx0_sync_parent_hsdiv3_16fft_main_15_hsdivout3_clk:[89,104],dev_aasrc0_tx0_sync_parent_hsdiv3_16fft_main_4_hsdivout3_clk:[89,104],dev_aasrc0_tx0_sync_parent_mcasp_ahclko_mux_out0:[89,104],dev_aasrc0_tx0_sync_parent_mcasp_ahclko_mux_out1:[89,104],dev_aasrc0_tx0_sync_parent_mcasp_ahclko_mux_out2:[89,104],dev_aasrc0_tx0_sync_parent_mcasp_ahclko_mux_out3:[89,104],dev_aasrc0_tx0_sync_parent_mcu_adc_clk_sel_out0:[89,104],dev_aasrc0_tx0_sync_parent_mcu_adc_clk_sel_out1:[89,104],dev_aasrc0_tx1_sync:[89,104],dev_aasrc0_tx1_sync_parent_board_0_ext_refclk1_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp0_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp0_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp10_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp10_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp11_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp11_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp1_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp1_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp2_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp2_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp3_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp3_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp4_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp4_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp5_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp5_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp6_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp6_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp7_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp7_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp8_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp8_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp9_afsx_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcasp9_afsx_out_dup0:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mlb0_mlbclk_out:[89,104],dev_aasrc0_tx1_sync_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_aasrc0_tx1_sync_parent_hsdiv3_16fft_main_15_hsdivout3_clk:[89,104],dev_aasrc0_tx1_sync_parent_hsdiv3_16fft_main_4_hsdivout3_clk:[89,104],dev_aasrc0_tx1_sync_parent_mcasp_ahclko_mux_out0:[89,104],dev_aasrc0_tx1_sync_parent_mcasp_ahclko_mux_out1:[89,104],dev_aasrc0_tx1_sync_parent_mcasp_ahclko_mux_out2:[89,104],dev_aasrc0_tx1_sync_parent_mcasp_ahclko_mux_out3:[89,104],dev_aasrc0_tx1_sync_parent_mcu_adc_clk_sel_out0:[89,104],dev_aasrc0_tx1_sync_parent_mcu_adc_clk_sel_out1:[89,104],dev_aasrc0_tx2_sync:[89,104],dev_aasrc0_tx2_sync_parent_board_0_ext_refclk1_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp0_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp0_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp10_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp10_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp11_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp11_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp1_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp1_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp2_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp2_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp3_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp3_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp4_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp4_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp5_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp5_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp6_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp6_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp7_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp7_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp8_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp8_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp9_afsx_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcasp9_afsx_out_dup0:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mlb0_mlbclk_out:[89,104],dev_aasrc0_tx2_sync_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_aasrc0_tx2_sync_parent_hsdiv3_16fft_main_15_hsdivout3_clk:[89,104],dev_aasrc0_tx2_sync_parent_hsdiv3_16fft_main_4_hsdivout3_clk:[89,104],dev_aasrc0_tx2_sync_parent_mcasp_ahclko_mux_out0:[89,104],dev_aasrc0_tx2_sync_parent_mcasp_ahclko_mux_out1:[89,104],dev_aasrc0_tx2_sync_parent_mcasp_ahclko_mux_out2:[89,104],dev_aasrc0_tx2_sync_parent_mcasp_ahclko_mux_out3:[89,104],dev_aasrc0_tx2_sync_parent_mcu_adc_clk_sel_out0:[89,104],dev_aasrc0_tx2_sync_parent_mcu_adc_clk_sel_out1:[89,104],dev_aasrc0_tx3_sync:[89,104],dev_aasrc0_tx3_sync_parent_board_0_ext_refclk1_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp0_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp0_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp10_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp10_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp11_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp11_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp1_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp1_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp2_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp2_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp3_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp3_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp4_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp4_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp5_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp5_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp6_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp6_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp7_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp7_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp8_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp8_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp9_afsx_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcasp9_afsx_out_dup0:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mlb0_mlbclk_out:[89,104],dev_aasrc0_tx3_sync_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_aasrc0_tx3_sync_parent_hsdiv3_16fft_main_15_hsdivout3_clk:[89,104],dev_aasrc0_tx3_sync_parent_hsdiv3_16fft_main_4_hsdivout3_clk:[89,104],dev_aasrc0_tx3_sync_parent_mcasp_ahclko_mux_out0:[89,104],dev_aasrc0_tx3_sync_parent_mcasp_ahclko_mux_out1:[89,104],dev_aasrc0_tx3_sync_parent_mcasp_ahclko_mux_out2:[89,104],dev_aasrc0_tx3_sync_parent_mcasp_ahclko_mux_out3:[89,104],dev_aasrc0_tx3_sync_parent_mcu_adc_clk_sel_out0:[89,104],dev_aasrc0_tx3_sync_parent_mcu_adc_clk_sel_out1:[89,104],dev_aasrc0_vbusp_clk:[89,104],dev_adc0_adc_clk:28,dev_adc0_adc_clk_parent_board_0_ext_refclk1_out:28,dev_adc0_adc_clk_parent_gluelogic_hfosc0_clkout:28,dev_adc0_adc_clk_parent_postdiv1_16fft_main_1_hsdivout6_clk:28,dev_adc0_adc_clk_parent_postdiv4_16ff_main_2_hsdivout8_clk:28,dev_adc0_sys_clk:28,dev_adc0_vbus_clk:28,dev_atl0_atl_clk:[75,89,104],dev_atl0_atl_clk_parent_board_0_ext_refclk1_out:[75,89,104],dev_atl0_atl_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_atl0_atl_clk_parent_hsdiv2_16fft_main_4_hsdivout1_clk:75,dev_atl0_atl_clk_parent_hsdiv3_16fft_main_15_hsdivout1_clk:[89,104],dev_atl0_atl_clk_parent_hsdiv3_16fft_main_4_hsdivout1_clk:[89,104],dev_atl0_atl_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[75,89,104],dev_atl0_atl_clk_parent_postdiv2_16fft_main_0_hsdivout7_clk:75,dev_atl0_atl_clk_parent_postdiv3_16fft_main_0_hsdivout7_clk:[89,104],dev_atl0_atl_io_port_atclk_out:[75,89,104],dev_atl0_atl_io_port_atclk_out_1:[75,89,104],dev_atl0_atl_io_port_atclk_out_2:[75,89,104],dev_atl0_atl_io_port_atclk_out_3:[75,89,104],dev_atl0_vbus_clk:[75,89,104],dev_board0_audio_ext_refclk0_in:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_board_0_audio_ext_refclk0_out:[89,104],dev_board0_audio_ext_refclk0_in_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_board0_audio_ext_refclk0_in_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_board0_audio_ext_refclk0_in_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_0_mcasp_ahclkr_pout:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_0_mcasp_ahclkx_pout:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_10_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_10_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_11_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_11_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_1_mcasp_ahclkr_pout:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_1_mcasp_ahclkx_pout:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_2_mcasp_ahclkr_pout:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_2_mcasp_ahclkx_pout:[75,89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_3_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_3_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_4_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_4_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_5_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_5_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_6_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_6_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_7_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_7_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_8_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_8_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_9_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk0_in_parent_mcasp_main_9_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk0_out:[75,89,104],dev_board0_audio_ext_refclk1_in:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_board_0_audio_ext_refclk1_out:[89,104],dev_board0_audio_ext_refclk1_in_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_board0_audio_ext_refclk1_in_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_board0_audio_ext_refclk1_in_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_0_mcasp_ahclkr_pout:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_0_mcasp_ahclkx_pout:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_10_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_10_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_11_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_11_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_1_mcasp_ahclkr_pout:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_1_mcasp_ahclkx_pout:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_2_mcasp_ahclkr_pout:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_2_mcasp_ahclkx_pout:[75,89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_3_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_3_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_4_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_4_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_5_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_5_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_6_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_6_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_7_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_7_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_8_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_8_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_9_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk1_in_parent_mcasp_main_9_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk1_out:[75,89,104],dev_board0_audio_ext_refclk2_in:[89,104],dev_board0_audio_ext_refclk2_in_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_board0_audio_ext_refclk2_in_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_board0_audio_ext_refclk2_in_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_board0_audio_ext_refclk2_in_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_board0_audio_ext_refclk2_in_parent_board_0_audio_ext_refclk2_out:[89,104],dev_board0_audio_ext_refclk2_in_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_board0_audio_ext_refclk2_in_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_0_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_0_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_10_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_10_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_11_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_11_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_1_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_1_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_2_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_2_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_3_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_3_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_4_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_4_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_5_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_5_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_6_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_6_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_7_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_7_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_8_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_8_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_9_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk2_in_parent_mcasp_main_9_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk2_out:[89,104],dev_board0_audio_ext_refclk3_in:[89,104],dev_board0_audio_ext_refclk3_in_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_board0_audio_ext_refclk3_in_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_board0_audio_ext_refclk3_in_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_board0_audio_ext_refclk3_in_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_board0_audio_ext_refclk3_in_parent_board_0_audio_ext_refclk3_out:[89,104],dev_board0_audio_ext_refclk3_in_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_board0_audio_ext_refclk3_in_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_0_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_0_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_10_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_10_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_11_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_11_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_1_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_1_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_2_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_2_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_3_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_3_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_4_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_4_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_5_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_5_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_6_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_6_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_7_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_7_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_8_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_8_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_9_mcasp_ahclkr_pout:[89,104],dev_board0_audio_ext_refclk3_in_parent_mcasp_main_9_mcasp_ahclkx_pout:[89,104],dev_board0_audio_ext_refclk3_out:[89,104],dev_board0_bus_ccdc0_pclk_out:[43,58],dev_board0_bus_cpts_rft_clk_out:[43,58],dev_board0_bus_dss0extpclkin_out:[43,58],dev_board0_bus_dss0pclk_in:[43,58],dev_board0_bus_ext_refclk1_out:[43,58],dev_board0_bus_gpmcclk_out:[43,58],dev_board0_bus_mcasp0aclkr_out:[43,58],dev_board0_bus_mcasp0aclkx_out:[43,58],dev_board0_bus_mcasp0ahclkr_out:[43,58],dev_board0_bus_mcasp0ahclkx_out:[43,58],dev_board0_bus_mcasp1aclkr_out:[43,58],dev_board0_bus_mcasp1aclkx_out:[43,58],dev_board0_bus_mcasp1ahclkr_out:[43,58],dev_board0_bus_mcasp1ahclkx_out:[43,58],dev_board0_bus_mcasp2aclkr_out:[43,58],dev_board0_bus_mcasp2aclkx_out:[43,58],dev_board0_bus_mcasp2ahclkr_out:[43,58],dev_board0_bus_mcasp2ahclkx_out:[43,58],dev_board0_bus_mcu_clkout_in:[43,58],dev_board0_bus_mcu_clkout_in_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk10:[43,58],dev_board0_bus_mcu_clkout_in_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk5:[43,58],dev_board0_bus_mcu_cpts_rft_clk_out:[43,58],dev_board0_bus_mcu_ext_refclk0_out:[43,58],dev_board0_bus_mcu_hyperbus_clk_in:58,dev_board0_bus_mcu_hyperbus_nclk_in:58,dev_board0_bus_mcu_obsclk_in:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_0_bus_clkout_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_0_bus_clkout_clk_dup0:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout1_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout2_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout3_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout4_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout1_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout3_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout4_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_board0_bus_mcu_obsclk_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk_dup0:[43,58],dev_board0_bus_mcu_obsclk_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_board0_bus_mcu_obsclk_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_board0_bus_mcu_ospi0clk_in:[43,58],dev_board0_bus_mcu_ospi0dqs_out:[43,58],dev_board0_bus_mcu_ospi0lbclko_in:[43,58],dev_board0_bus_mcu_ospi1clk_in:[43,58],dev_board0_bus_mcu_ospi1dqs_out:[43,58],dev_board0_bus_mcu_ospi1lbclko_in:[43,58],dev_board0_bus_mcu_rgmii1_rclk_out:[43,58],dev_board0_bus_mcu_rgmii1_tclk_out:[43,58],dev_board0_bus_mcu_rmii1_refclk_out:[43,58],dev_board0_bus_mcu_scl0_in:58,dev_board0_bus_mcu_spi0clk_out:[43,58],dev_board0_bus_mcu_spi1clk_out:[43,58],dev_board0_bus_mcu_sysclkout_in:[43,58],dev_board0_bus_obsclk_in:[43,58],dev_board0_bus_obsclk_in_parent_adpllljm_hsdiv_wrap_main_0_bus_clkout_clk:[43,58],dev_board0_bus_obsclk_in_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout1_clk:[43,58],dev_board0_bus_obsclk_in_parent_adpllljm_hsdiv_wrap_main_2_bus_clkout_clk:[43,58],dev_board0_bus_obsclk_in_parent_adpllljm_wrap_main_1_bus_clkout_clk:[43,58],dev_board0_bus_obsclk_in_parent_adpllljm_wrap_main_3_bus_clkout_clk:[43,58],dev_board0_bus_obsclk_in_parent_adpllljm_wrap_main_4_bus_clkout_clk:[43,58],dev_board0_bus_obsclk_in_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk:[43,58],dev_board0_bus_obsclk_in_parent_adpllm_wrap_main_6_bus_clkout_clk:[43,58],dev_board0_bus_obsclk_in_parent_adpllm_wrap_main_7_bus_clkout_clk:[43,58],dev_board0_bus_obsclk_in_parent_board_0_hfosc1_clk_out:[43,58],dev_board0_bus_obsclk_in_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_board0_bus_obsclk_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_board0_bus_obsclk_in_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_board0_bus_obsclk_in_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_board0_bus_obsclk_in_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_board0_bus_obsclk_in_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_board0_bus_pcie1refclkm_out:58,dev_board0_bus_pcie1refclkp_out:58,dev_board0_bus_prg0_rgmii1_rclk_out:[43,58],dev_board0_bus_prg0_rgmii1_tclk_in:58,dev_board0_bus_prg0_rgmii1_tclk_out:43,dev_board0_bus_prg0_rgmii2_rclk_out:[43,58],dev_board0_bus_prg0_rgmii2_tclk_in:58,dev_board0_bus_prg0_rgmii2_tclk_out:43,dev_board0_bus_prg1_rgmii1_rclk_out:[43,58],dev_board0_bus_prg1_rgmii1_tclk_in:58,dev_board0_bus_prg1_rgmii1_tclk_out:43,dev_board0_bus_prg1_rgmii2_rclk_out:[43,58],dev_board0_bus_prg1_rgmii2_tclk_out:43,dev_board0_bus_prg2_rgmii1_rclk_out:[43,58],dev_board0_bus_prg2_rgmii1_tclk_in:58,dev_board0_bus_prg2_rgmii1_tclk_out:43,dev_board0_bus_prg2_rgmii2_rclk_out:[43,58],dev_board0_bus_prg2_rgmii2_tclk_in:58,dev_board0_bus_prg2_rgmii2_tclk_out:43,dev_board0_bus_refclk0m_in:58,dev_board0_bus_refclk0m_in_parent_adpllljm_hsdiv_wrap_main_0_bus_clkout_clk:58,dev_board0_bus_refclk0m_in_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout4_clk:58,dev_board0_bus_refclk0m_in_parent_board_0_hfosc1_clk_out:58,dev_board0_bus_refclk0m_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:58,dev_board0_bus_refclk0p_in:[43,58],dev_board0_bus_refclk0p_in_parent_adpllljm_hsdiv_wrap_main_0_bus_clkout_clk:[43,58],dev_board0_bus_refclk0p_in_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout4_clk:[43,58],dev_board0_bus_refclk0p_in_parent_board_0_hfosc1_clk_out:[43,58],dev_board0_bus_refclk0p_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_board0_bus_refclk1m_in:58,dev_board0_bus_refclk1m_in_parent_adpllljm_hsdiv_wrap_main_0_bus_clkout_clk:58,dev_board0_bus_refclk1m_in_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout4_clk:58,dev_board0_bus_refclk1m_in_parent_board_0_hfosc1_clk_out:58,dev_board0_bus_refclk1m_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:58,dev_board0_bus_refclk1p_in:[43,58],dev_board0_bus_refclk1p_in_parent_adpllljm_hsdiv_wrap_main_0_bus_clkout_clk:[43,58],dev_board0_bus_refclk1p_in_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout4_clk:[43,58],dev_board0_bus_refclk1p_in_parent_board_0_hfosc1_clk_out:[43,58],dev_board0_bus_refclk1p_in_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_board0_bus_scl0_in:58,dev_board0_bus_scl1_in:58,dev_board0_bus_scl2_in:58,dev_board0_bus_scl3_in:58,dev_board0_bus_spi0clk_out:[43,58],dev_board0_bus_spi1clk_out:[43,58],dev_board0_bus_spi2clk_out:[43,58],dev_board0_bus_spi3clk_out:[43,58],dev_board0_bus_sysclkout_in:[43,58],dev_board0_bus_usb0refclkm_out:58,dev_board0_bus_usb0refclkp_out:58,dev_board0_bus_wkup_scl0_in:58,dev_board0_bus_wkup_tck_out:[43,58],dev_board0_clkout_in:[75,89,104],dev_board0_clkout_in_parent_hsdiv4_16fft_main_3_hsdivout0_clk10:[75,89,104],dev_board0_clkout_in_parent_hsdiv4_16fft_main_3_hsdivout0_clk5:[75,89,104],dev_board0_cp_gemac_cpts0_rft_clk_out:28,dev_board0_cpts0_rft_clk_out:[28,75,89,104],dev_board0_ddr0_ck0_in:[89,104],dev_board0_ddr0_ck0_n_in:[89,104],dev_board0_dsi_txclkn_in:[89,104],dev_board0_dsi_txclkp_in:[89,104],dev_board0_ext_refclk1_out:[28,75,89,104],dev_board0_fsi_rx0_clk_out:28,dev_board0_fsi_rx1_clk_out:28,dev_board0_fsi_rx2_clk_out:28,dev_board0_fsi_rx3_clk_out:28,dev_board0_fsi_rx4_clk_out:28,dev_board0_fsi_rx5_clk_out:28,dev_board0_fsi_tx0_clk_in:28,dev_board0_fsi_tx1_clk_in:28,dev_board0_gpmc0_clk_in:[28,75,89,104],dev_board0_gpmc0_clk_out:[75,89,104],dev_board0_gpmc0_clklb_in:28,dev_board0_gpmc0_clklb_out:28,dev_board0_gpmc0_clkout_in:75,dev_board0_gpmc0_fclk_mux_in:[28,75,89,104],dev_board0_gpmc0_fclk_mux_in_parent_hsdiv4_16fft_main_0_hsdivout3_clk:28,dev_board0_gpmc0_fclk_mux_in_parent_postdiv4_16ff_main_2_hsdivout7_clk:28,dev_board0_hfosc1_clk_out:[43,58,75,89,104],dev_board0_i2c0_scl_in:28,dev_board0_i2c0_scl_out:[28,75,89,104],dev_board0_i2c1_scl_in:28,dev_board0_i2c1_scl_out:[28,75,89,104],dev_board0_i2c2_scl_in:28,dev_board0_i2c2_scl_out:[28,75,89,104],dev_board0_i2c3_scl_in:28,dev_board0_i2c3_scl_out:[28,75,89,104],dev_board0_i2c4_scl_out:[75,89,104],dev_board0_i2c5_scl_out:[75,89,104],dev_board0_i2c6_scl_out:[75,89,104],dev_board0_i3c0_scl_in:[75,89,104],dev_board0_i3c0_scl_out:[75,89,104],dev_board0_led_clk_out:[28,75,89,104],dev_board0_mcasp0_aclkr_in:[75,89,104],dev_board0_mcasp0_aclkr_out:[75,89,104],dev_board0_mcasp0_aclkx_in:[75,89,104],dev_board0_mcasp0_aclkx_out:[75,89,104],dev_board0_mcasp0_afsr_out:[89,104],dev_board0_mcasp0_afsx_out:[89,104],dev_board0_mcasp10_aclkr_in:[89,104],dev_board0_mcasp10_aclkr_out:[89,104],dev_board0_mcasp10_aclkx_in:[89,104],dev_board0_mcasp10_aclkx_out:[89,104],dev_board0_mcasp10_afsr_out:[89,104],dev_board0_mcasp10_afsx_out:[89,104],dev_board0_mcasp11_aclkr_in:[89,104],dev_board0_mcasp11_aclkr_out:[89,104],dev_board0_mcasp11_aclkx_in:[89,104],dev_board0_mcasp11_aclkx_out:[89,104],dev_board0_mcasp11_afsr_out:[89,104],dev_board0_mcasp11_afsx_out:[89,104],dev_board0_mcasp1_aclkr_in:[75,89,104],dev_board0_mcasp1_aclkr_out:[75,89,104],dev_board0_mcasp1_aclkx_in:[75,89,104],dev_board0_mcasp1_aclkx_out:[75,89,104],dev_board0_mcasp1_afsr_out:[89,104],dev_board0_mcasp1_afsx_out:[89,104],dev_board0_mcasp2_aclkr_in:[75,89,104],dev_board0_mcasp2_aclkr_out:[75,89,104],dev_board0_mcasp2_aclkx_in:[75,89,104],dev_board0_mcasp2_aclkx_out:[75,89,104],dev_board0_mcasp2_afsr_out:[89,104],dev_board0_mcasp2_afsx_out:[89,104],dev_board0_mcasp3_aclkr_in:[89,104],dev_board0_mcasp3_aclkr_out:[89,104],dev_board0_mcasp3_aclkx_in:[89,104],dev_board0_mcasp3_aclkx_out:[89,104],dev_board0_mcasp3_afsr_out:[89,104],dev_board0_mcasp3_afsx_out:[89,104],dev_board0_mcasp4_aclkr_in:[89,104],dev_board0_mcasp4_aclkr_out:[89,104],dev_board0_mcasp4_aclkx_in:[89,104],dev_board0_mcasp4_aclkx_out:[89,104],dev_board0_mcasp4_afsr_out:[89,104],dev_board0_mcasp4_afsx_out:[89,104],dev_board0_mcasp5_aclkr_in:[89,104],dev_board0_mcasp5_aclkr_out:[89,104],dev_board0_mcasp5_aclkx_in:[89,104],dev_board0_mcasp5_aclkx_out:[89,104],dev_board0_mcasp5_afsr_out:[89,104],dev_board0_mcasp5_afsx_out:[89,104],dev_board0_mcasp6_aclkr_in:[89,104],dev_board0_mcasp6_aclkr_out:[89,104],dev_board0_mcasp6_aclkx_in:[89,104],dev_board0_mcasp6_aclkx_out:[89,104],dev_board0_mcasp6_afsr_out:[89,104],dev_board0_mcasp6_afsx_out:[89,104],dev_board0_mcasp7_aclkr_in:[89,104],dev_board0_mcasp7_aclkr_out:[89,104],dev_board0_mcasp7_aclkx_in:[89,104],dev_board0_mcasp7_aclkx_out:[89,104],dev_board0_mcasp7_afsr_out:[89,104],dev_board0_mcasp7_afsx_out:[89,104],dev_board0_mcasp8_aclkr_in:[89,104],dev_board0_mcasp8_aclkr_out:[89,104],dev_board0_mcasp8_aclkx_in:[89,104],dev_board0_mcasp8_aclkx_out:[89,104],dev_board0_mcasp8_afsr_out:[89,104],dev_board0_mcasp8_afsx_out:[89,104],dev_board0_mcasp9_aclkr_in:[89,104],dev_board0_mcasp9_aclkr_out:[89,104],dev_board0_mcasp9_aclkx_in:[89,104],dev_board0_mcasp9_aclkx_out:[89,104],dev_board0_mcasp9_afsr_out:[89,104],dev_board0_mcasp9_afsx_out:[89,104],dev_board0_mcu_clkout0_in:[75,89,104],dev_board0_mcu_clkout0_in_parent_hsdiv4_16fft_mcu_2_hsdivout0_clk10:[75,89,104],dev_board0_mcu_clkout0_in_parent_hsdiv4_16fft_mcu_2_hsdivout0_clk5:[75,89,104],dev_board0_mcu_cpts0_rft_clk_out:[75,89,104],dev_board0_mcu_ext_refclk0_out:[28,75,89,104],dev_board0_mcu_hyperbus0_ck_in:[75,89,104],dev_board0_mcu_hyperbus0_ckn_in:[75,89,104],dev_board0_mcu_i2c0_scl_in:[28,75,89,104],dev_board0_mcu_i2c0_scl_out:[28,75,89,104],dev_board0_mcu_i2c1_scl_in:28,dev_board0_mcu_i2c1_scl_out:[28,75,89,104],dev_board0_mcu_i3c0_scl_in:[75,89,104],dev_board0_mcu_i3c0_scl_out:[75,89,104],dev_board0_mcu_i3c1_scl_in:[89,104],dev_board0_mcu_i3c1_scl_out:[89,104],dev_board0_mcu_mdio0_mdc_in:[75,89,104],dev_board0_mcu_obsclk0_in:[28,75,89,104],dev_board0_mcu_obsclk0_in_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_board0_mcu_obsclk0_in_parent_mcu_obsclk_div_out0:[28,75,89,104],dev_board0_mcu_ospi0_clk_in:[75,89,104],dev_board0_mcu_ospi0_dqs_out:[75,89,104],dev_board0_mcu_ospi0_lbclko_in:[75,89,104],dev_board0_mcu_ospi1_clk_in:[89,104],dev_board0_mcu_ospi1_dqs_out:[89,104],dev_board0_mcu_ospi1_lbclko_in:[89,104],dev_board0_mcu_rgmii1_rxc_out:[75,89,104],dev_board0_mcu_rgmii1_txc_in:[75,89,104],dev_board0_mcu_rgmii1_txc_out:[89,104],dev_board0_mcu_rmii1_ref_clk_out:[75,89,104],dev_board0_mcu_spi0_clk_in:[28,75,89,104],dev_board0_mcu_spi0_clk_out:28,dev_board0_mcu_spi1_clk_in:[28,75,89,104],dev_board0_mcu_spi1_clk_out:28,dev_board0_mcu_sysclkout0_in:[28,75,89,104],dev_board0_mcu_timer_io0_in:28,dev_board0_mcu_timer_io1_in:28,dev_board0_mcu_timer_io2_in:28,dev_board0_mcu_timer_io3_in:28,dev_board0_mdio0_mdc_in:[75,89,104],dev_board0_mlb0_mlbclk_out:[89,104],dev_board0_mlb0_mlbcp_out:[89,104],dev_board0_mmc0_clk_in:[89,104],dev_board0_mmc1_clk_in:[28,75,89,104],dev_board0_mmc1_clklb_out:28,dev_board0_mmc2_clk_in:[89,104],dev_board0_obsclk0_in:[28,75,89,104],dev_board0_obsclk0_in_parent_board_0_hfosc1_clk_out:[75,89,104],dev_board0_obsclk0_in_parent_board_0_wkup_lf_clkin_out:75,dev_board0_obsclk0_in_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_board0_obsclk0_in_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_board0_obsclk0_in_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_board0_obsclk0_in_parent_gluelogic_lpxosc_clkout:[89,104],dev_board0_obsclk0_in_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_board0_obsclk0_in_parent_gluelogic_rcosc_clkout:28,dev_board0_obsclk0_in_parent_hsdiv0_16fft_main_12_hsdivout0_clk:[28,75,89,104],dev_board0_obsclk0_in_parent_hsdiv0_16fft_main_24_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv0_16fft_main_6_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_board0_obsclk0_in_parent_hsdiv1_16fft_main_14_hsdivout0_clk:[28,75,89,104],dev_board0_obsclk0_in_parent_hsdiv1_16fft_main_16_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv1_16fft_main_17_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv1_16fft_main_18_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv1_16fft_main_19_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv1_16fft_main_23_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv1_16fft_main_25_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv2_16fft_main_4_hsdivout0_clk:75,dev_board0_obsclk0_in_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv3_16fft_main_5_hsdivout0_clk:[89,104],dev_board0_obsclk0_in_parent_hsdiv4_16fft_main_0_hsdivout0_clk:[28,75,89,104],dev_board0_obsclk0_in_parent_hsdiv4_16fft_main_0_hsdivout0_clk_dup0:[28,75,89,104],dev_board0_obsclk0_in_parent_hsdiv4_16fft_main_1_hsdivout0_clk:[28,75,89,104],dev_board0_obsclk0_in_parent_hsdiv4_16fft_main_2_hsdivout0_clk:[28,75,89,104],dev_board0_obsclk0_in_parent_hsdiv4_16fft_main_3_hsdivout0_clk:[75,89,104],dev_board0_obsclk0_in_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_board0_obsclk0_in_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_board0_obsclk0_in_parent_k3_cpts_main_0_cpts_genf1:28,dev_board0_obsclk0_in_parent_k3_cpts_main_0_cpts_genf2:28,dev_board0_obsclk0_in_parent_k3_cpts_main_0_cpts_genf3:28,dev_board0_obsclk0_in_parent_navss256vcl_main_0_cpts0_genf3:75,dev_board0_obsclk0_in_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_board0_obsclk0_in_parent_obsclk1_mux_out0:[75,89,104],dev_board0_obsclk0_in_parent_sam64_a53_256kb_wrap_main_0_arm_corepack_0_a53_divh_clk4_obsclk_out_clk:28,dev_board0_obsclk1_in:[75,89,104],dev_board0_obsclk1_in_parent_hsdiv0_16fft_main_7_hsdivout0_clk4:[89,104],dev_board0_obsclk1_in_parent_hsdiv0_16fft_main_8_hsdivout0_clk8:[89,104],dev_board0_obsclk1_in_parent_hsdiv3_16fft_main_13_hsdivout0_clk4:[89,104],dev_board0_obsclk2_in:75,dev_board0_ospi0_dqs_out:28,dev_board0_ospi0_lbclko_in:28,dev_board0_ospi0_lbclko_out:28,dev_board0_pcie_refclk0n_out:[89,104],dev_board0_pcie_refclk0p_out:[89,104],dev_board0_pcie_refclk1n_out:[89,104],dev_board0_pcie_refclk1p_out:[89,104],dev_board0_pcie_refclk2n_out:[89,104],dev_board0_pcie_refclk2p_out:[89,104],dev_board0_pcie_refclk3n_out:[89,104],dev_board0_pcie_refclk3p_out:[89,104],dev_board0_prg0_mdio0_mdc_in:[28,89,104],dev_board0_prg0_rgmii1_rxc_out:[28,89,104],dev_board0_prg0_rgmii1_txc_in:[28,89,104],dev_board0_prg0_rgmii1_txc_out:[28,89,104],dev_board0_prg0_rgmii2_rxc_out:[28,89,104],dev_board0_prg0_rgmii2_txc_in:[28,89,104],dev_board0_prg0_rgmii2_txc_out:[28,89,104],dev_board0_prg1_mdio0_mdc_in:[28,89,104],dev_board0_prg1_rgmii1_rxc_out:[28,89,104],dev_board0_prg1_rgmii1_txc_in:[28,89,104],dev_board0_prg1_rgmii1_txc_out:[28,89,104],dev_board0_prg1_rgmii2_rxc_out:[28,89,104],dev_board0_prg1_rgmii2_txc_in:[28,89,104],dev_board0_prg1_rgmii2_txc_out:[28,89,104],dev_board0_rgmii1_rxc_out:[28,75],dev_board0_rgmii1_txc_in:[28,75],dev_board0_rgmii1_txc_out:28,dev_board0_rgmii2_rxc_out:[28,75],dev_board0_rgmii2_txc_in:[28,75],dev_board0_rgmii2_txc_out:28,dev_board0_rgmii3_rxc_out:[75,89,104],dev_board0_rgmii3_txc_in:75,dev_board0_rgmii4_rxc_out:[75,89,104],dev_board0_rgmii4_txc_in:75,dev_board0_rgmii5_rxc_out:[89,104],dev_board0_rgmii6_rxc_out:[89,104],dev_board0_rgmii7_rxc_out:[89,104],dev_board0_rgmii8_rxc_out:[89,104],dev_board0_rmii_ref_clk_out:[28,75,89,104],dev_board0_spi0_clk_in:[28,75,89,104],dev_board0_spi0_clk_out:28,dev_board0_spi1_clk_in:[28,75,89,104],dev_board0_spi1_clk_out:28,dev_board0_spi2_clk_in:[28,75,89,104],dev_board0_spi2_clk_out:28,dev_board0_spi3_clk_in:[28,75,89,104],dev_board0_spi3_clk_out:28,dev_board0_spi4_clk_in:28,dev_board0_spi4_clk_out:28,dev_board0_spi5_clk_in:[75,89,104],dev_board0_spi6_clk_in:[75,89,104],dev_board0_spi7_clk_in:[75,89,104],dev_board0_sysclkout0_in:[28,75,89,104],dev_board0_tck_out:[28,75,89,104],dev_board0_timer_io0_in:28,dev_board0_timer_io10_in:28,dev_board0_timer_io11_in:28,dev_board0_timer_io1_in:28,dev_board0_timer_io2_in:28,dev_board0_timer_io3_in:28,dev_board0_timer_io4_in:28,dev_board0_timer_io5_in:28,dev_board0_timer_io6_in:28,dev_board0_timer_io7_in:28,dev_board0_timer_io8_in:28,dev_board0_timer_io9_in:28,dev_board0_trc_clk_in:[75,89,104],dev_board0_ufs0_ref_clk_in:[89,104],dev_board0_vout1_extpclkin_out:[89,104],dev_board0_vout1_pclk_in:[89,104],dev_board0_vout2_extpclkin_out:[89,104],dev_board0_vout2_pclk_in:[89,104],dev_board0_vpfe0_pclk_out:[89,104],dev_board0_wkup_i2c0_scl_in:[75,89,104],dev_board0_wkup_i2c0_scl_out:[75,89,104],dev_board0_wkup_lf_clkin_out:75,dev_c66ss0_core0_gem_clk2_out_clk:[89,104],dev_c66ss0_core0_gem_clkin_clk:[89,104],dev_c66ss0_core0_gem_pbist_rom_clk:[89,104],dev_c66ss0_core0_gem_trc_clk:[89,104],dev_c66ss0_introuter0_intr_clk:[89,104],dev_c66ss1_core0_gem_clk2_out_clk:[89,104],dev_c66ss1_core0_gem_clkin_clk:[89,104],dev_c66ss1_core0_gem_pbist_rom_clk:[89,104],dev_c66ss1_core0_gem_trc_clk:[89,104],dev_c66ss1_introuter0_intr_clk:[89,104],dev_c71ss0_c7x_clk:[89,104],dev_c71ss0_mma_mma_clk:[89,104],dev_c71ss0_mma_pll_ctrl_clk:[89,104],dev_c71ss0_pll_ctrl_clk:[89,104],dev_cal0_bus_clk:[43,58],dev_cal0_bus_cp_c_clk:[43,58],dev_cbass0_bus_main_sysclk0_2_clk:[43,58],dev_cbass0_bus_main_sysclk0_4_clk:[43,58],dev_cbass_debug0_bus_main_sysclk0_2_clk:[43,58],dev_cbass_debug0_bus_main_sysclk0_4_clk:[43,58],dev_cbass_fw0_bus_main_sysclk0_2_clk:[43,58],dev_cbass_fw0_bus_main_sysclk0_4_clk:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk_parent_board_0_bus_mcu_cpts_rft_clk_out:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk_parent_wiz8b2m4vsb_main_0_bus_ln0_txclk:[43,58],dev_cbass_infra0_bus_gtc_clock_1_clk_parent_wiz8b2m4vsb_main_1_bus_ln0_txclk:[43,58],dev_cbass_infra0_bus_main_sysclk0_2_clk:[43,58],dev_cbass_infra0_bus_main_sysclk0_4_clk:[43,58],dev_ccdebugss0_bus_atb0_clk:[43,58],dev_ccdebugss0_bus_atb1_clk:[43,58],dev_ccdebugss0_bus_cfg_clk:[43,58],dev_ccdebugss0_bus_dbg_clk:[43,58],dev_ccdebugss0_bus_sys_clk:[43,58],dev_cmp_event_introuter0_intr_clk:28,dev_cmpevent_intrtr0_bus_intr_clk:[43,58],dev_cmpevent_intrtr0_intr_clk:[75,89,104],dev_compute_cluster0_cfg_wrap_clk4_clk:[89,104],dev_compute_cluster0_clec_clk1_clk:[89,104],dev_compute_cluster0_clec_clk4_clk:[89,104],dev_compute_cluster0_core_core_clk1_clk:[89,104],dev_compute_cluster0_core_core_psil_leaf_clk:[89,104],dev_compute_cluster0_ddr32ss_emif0_ddr_pll_clk:75,dev_compute_cluster0_ddr32ss_emif0_ew_ddrss_ddr_pll_clk:[89,104],dev_compute_cluster0_ddr32ss_emif0_ew_pll_ctrl_clk:[89,104],dev_compute_cluster0_ddr32ss_emif0_pll_ctrl_clk:75,dev_compute_cluster0_debug_wrap_clk1_clk_clk:[89,104],dev_compute_cluster0_debug_wrap_clk2_clk_clk:[89,104],dev_compute_cluster0_dmsc_wrap_clk4_clk_clk:[89,104],dev_compute_cluster0_en_msmc_domain_msmc_clk1_clk:[89,104],dev_compute_cluster0_gic500ss_vclk_clk:[89,104],dev_compute_cluster0_pbist_wrap_divh_clk2_clk_clk:[89,104],dev_compute_cluster0_pbist_wrap_divh_clk4_clk_clk:[75,89,104],dev_compute_cluster0_pbist_wrap_divp_clk1_clk_clk:[89,104],dev_compute_cluster0_tb_soc_gic_clk:75,dev_compute_cluster0_tb_soc_vbusp_cfg_clk:75,dev_compute_cluster0_tb_soc_vbusp_dbg_clk:75,dev_compute_cluster0_tb_soc_vbusp_dmsc_clk:75,dev_compute_cluster_a53_0_bus_arm0_clk:[43,58],dev_compute_cluster_a53_1_bus_arm0_clk:[43,58],dev_compute_cluster_a53_2_bus_arm1_clk:[43,58],dev_compute_cluster_a53_3_bus_arm1_clk:[43,58],dev_compute_cluster_cpac0_bus_arm0_clk:58,dev_compute_cluster_cpac1_bus_arm1_clk:58,dev_compute_cluster_msmc0_bus_msmc_clk:[43,58],dev_compute_cluster_msmc0_bus_tb_soc_gic_clk:58,dev_compute_cluster_msmc0_bus_tb_soc_vbusp_cfg_clk:58,dev_compute_cluster_msmc0_bus_tb_soc_vbusp_dbg_clk:58,dev_compute_cluster_msmc0_bus_tb_soc_vbusp_dmsc_clk:58,dev_compute_cluster_pbist0_bus_divh_clk4_clk_clk:43,dev_compute_cluster_pbist0_bus_divp_clk1_clk_clk:43,dev_cpsw0_cppi_clk_clk:[28,75,89,104],dev_cpsw0_cpts_genf0:[28,75,89,104],dev_cpsw0_cpts_genf1:28,dev_cpsw0_cpts_rft_clk:[28,75,89,104],dev_cpsw0_cpts_rft_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_cpsw0_cpts_rft_clk_parent_board_0_cpts0_rft_clk_out:[28,75,89,104],dev_cpsw0_cpts_rft_clk_parent_board_0_ext_refclk1_out:[28,75,89,104],dev_cpsw0_cpts_rft_clk_parent_board_0_mcu_cpts0_rft_clk_out:[75,89,104],dev_cpsw0_cpts_rft_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_cpsw0_cpts_rft_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[75,89,104],dev_cpsw0_cpts_rft_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[75,89,104],dev_cpsw0_cpts_rft_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[28,75,89,104],dev_cpsw0_cpts_rft_clk_parent_postdiv2_16fft_main_0_hsdivout6_clk:75,dev_cpsw0_cpts_rft_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_cpsw0_cpts_rft_clk_parent_postdiv4_16ff_main_0_hsdivout6_clk:28,dev_cpsw0_cpts_rft_clk_parent_postdiv4_16ff_main_2_hsdivout5_clk:28,dev_cpsw0_cpts_rft_clk_parent_wiz16b2m4ct_main_0_ip1_ln0_txmclk:28,dev_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_3_ip2_ln0_txmclk:[89,104],dev_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_3_ip2_ln1_txmclk:[89,104],dev_cpsw0_cpts_rft_clk_parent_wiz16b8m4ct2_main_1_ip2_ln0_txmclk:75,dev_cpsw0_cpts_rft_clk_parent_wiz16b8m4ct2_main_1_ip2_ln1_txmclk:75,dev_cpsw0_cpts_rft_clk_parent_wiz16b8m4ct2_main_1_ip2_ln2_txmclk:75,dev_cpsw0_cpts_rft_clk_parent_wiz16b8m4ct2_main_1_ip2_ln3_txmclk:75,dev_cpsw0_gmii1_mr_clk:[28,75,89,104],dev_cpsw0_gmii1_mt_clk:[28,75,89,104],dev_cpsw0_gmii2_mr_clk:[28,75,89,104],dev_cpsw0_gmii2_mt_clk:[28,75,89,104],dev_cpsw0_gmii3_mr_clk:[75,89,104],dev_cpsw0_gmii3_mt_clk:[75,89,104],dev_cpsw0_gmii4_mr_clk:[75,89,104],dev_cpsw0_gmii4_mt_clk:[75,89,104],dev_cpsw0_gmii5_mr_clk:[89,104],dev_cpsw0_gmii5_mt_clk:[89,104],dev_cpsw0_gmii6_mr_clk:[89,104],dev_cpsw0_gmii6_mt_clk:[89,104],dev_cpsw0_gmii7_mr_clk:[89,104],dev_cpsw0_gmii7_mt_clk:[89,104],dev_cpsw0_gmii8_mr_clk:[89,104],dev_cpsw0_gmii8_mt_clk:[89,104],dev_cpsw0_gmii_rft_clk:[28,75,89,104],dev_cpsw0_mdio_mdclk_o:[75,89,104],dev_cpsw0_pre_rgmii1_tclk:75,dev_cpsw0_pre_rgmii2_tclk:75,dev_cpsw0_pre_rgmii3_tclk:75,dev_cpsw0_pre_rgmii4_tclk:75,dev_cpsw0_rgmii1_rxc_i:[28,75],dev_cpsw0_rgmii1_txc_i:28,dev_cpsw0_rgmii1_txc_o:28,dev_cpsw0_rgmii2_rxc_i:[28,75],dev_cpsw0_rgmii2_txc_i:28,dev_cpsw0_rgmii2_txc_o:28,dev_cpsw0_rgmii3_rxc_i:75,dev_cpsw0_rgmii4_rxc_i:75,dev_cpsw0_rgmii_mhz_250_clk:[28,75,89,104],dev_cpsw0_rgmii_mhz_50_clk:[28,75,89,104],dev_cpsw0_rgmii_mhz_5_clk:[28,75,89,104],dev_cpsw0_rmii_mhz_50_clk:[28,75,89,104],dev_cpsw0_serdes1_refclk:[75,89,104],dev_cpsw0_serdes1_rxclk:[75,89,104],dev_cpsw0_serdes1_rxfclk:[75,89,104],dev_cpsw0_serdes1_txclk:[75,89,104],dev_cpsw0_serdes1_txfclk:[75,89,104],dev_cpsw0_serdes1_txmclk:[75,89,104],dev_cpsw0_serdes2_refclk:[75,89,104],dev_cpsw0_serdes2_rxclk:[75,89,104],dev_cpsw0_serdes2_rxfclk:[75,89,104],dev_cpsw0_serdes2_txclk:[75,89,104],dev_cpsw0_serdes2_txfclk:[75,89,104],dev_cpsw0_serdes2_txmclk:[75,89,104],dev_cpsw0_serdes3_refclk:[75,89,104],dev_cpsw0_serdes3_rxclk:[75,89,104],dev_cpsw0_serdes3_rxfclk:[75,89,104],dev_cpsw0_serdes3_txclk:[75,89,104],dev_cpsw0_serdes3_txfclk:[75,89,104],dev_cpsw0_serdes3_txmclk:[75,89,104],dev_cpsw0_serdes4_refclk:[75,89,104],dev_cpsw0_serdes4_rxclk:[75,89,104],dev_cpsw0_serdes4_rxfclk:[75,89,104],dev_cpsw0_serdes4_txclk:[75,89,104],dev_cpsw0_serdes4_txfclk:[75,89,104],dev_cpsw0_serdes4_txmclk:[75,89,104],dev_cpsw0_serdes5_refclk:[89,104],dev_cpsw0_serdes5_rxclk:[89,104],dev_cpsw0_serdes5_rxfclk:[89,104],dev_cpsw0_serdes5_txclk:[89,104],dev_cpsw0_serdes5_txfclk:[89,104],dev_cpsw0_serdes5_txmclk:[89,104],dev_cpsw0_serdes6_refclk:[89,104],dev_cpsw0_serdes6_rxclk:[89,104],dev_cpsw0_serdes6_rxfclk:[89,104],dev_cpsw0_serdes6_txclk:[89,104],dev_cpsw0_serdes6_txfclk:[89,104],dev_cpsw0_serdes6_txmclk:[89,104],dev_cpsw0_serdes7_refclk:[89,104],dev_cpsw0_serdes7_rxclk:[89,104],dev_cpsw0_serdes7_rxfclk:[89,104],dev_cpsw0_serdes7_txclk:[89,104],dev_cpsw0_serdes7_txfclk:[89,104],dev_cpsw0_serdes7_txmclk:[89,104],dev_cpsw0_serdes8_refclk:[89,104],dev_cpsw0_serdes8_rxclk:[89,104],dev_cpsw0_serdes8_rxfclk:[89,104],dev_cpsw0_serdes8_txclk:[89,104],dev_cpsw0_serdes8_txfclk:[89,104],dev_cpsw0_serdes8_txmclk:[89,104],dev_cpsw_tx_rgmii0_io__rgmii1_txc__a:75,dev_cpsw_tx_rgmii0_io__rgmii2_txc__a:75,dev_cpsw_tx_rgmii0_io__rgmii3_txc__a:75,dev_cpsw_tx_rgmii0_io__rgmii4_txc__a:75,dev_cpsw_tx_rgmii0_pre_rgmii1_tclk:75,dev_cpsw_tx_rgmii0_pre_rgmii2_tclk:75,dev_cpsw_tx_rgmii0_pre_rgmii3_tclk:75,dev_cpsw_tx_rgmii0_pre_rgmii4_tclk:75,dev_cpt2_aggr0_bus_vclk_clk:[43,58],dev_cpt2_aggr0_vclk_clk:[28,75,89,104],dev_cpt2_aggr1_vclk_clk:[75,89,104],dev_cpt2_aggr2_vclk_clk:[75,89,104],dev_cpt2_aggr3_vclk_clk:75,dev_cpt2_probe_vbusm_main_cal0_0_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_main_cal0_0_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_main_dss_2_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_main_dss_2_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_main_navddrhi_5_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_main_navddrhi_5_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_main_navddrlo_6_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_main_navddrlo_6_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_main_navsramhi_3_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_main_navsramhi_3_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_main_navsramlo_4_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_main_navsramlo_4_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_mcu_export_slv_0_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_mcu_export_slv_0_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_mcu_fss_s0_2_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_mcu_fss_s0_2_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_mcu_fss_s1_3_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_mcu_fss_s1_3_bus_vbus_clk:[43,58],dev_cpt2_probe_vbusm_mcu_sram_slv_1_bus_probe_clk:[43,58],dev_cpt2_probe_vbusm_mcu_sram_slv_1_bus_vbus_clk:[43,58],dev_cpts0_cpts_genf1:28,dev_cpts0_cpts_genf2:28,dev_cpts0_cpts_genf3:28,dev_cpts0_cpts_genf4:28,dev_cpts0_cpts_rft_clk:28,dev_cpts0_cpts_rft_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_cpts0_cpts_rft_clk_parent_board_0_cpts0_rft_clk_out:28,dev_cpts0_cpts_rft_clk_parent_board_0_ext_refclk1_out:28,dev_cpts0_cpts_rft_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_cpts0_cpts_rft_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:28,dev_cpts0_cpts_rft_clk_parent_postdiv4_16ff_main_0_hsdivout6_clk:28,dev_cpts0_cpts_rft_clk_parent_postdiv4_16ff_main_2_hsdivout5_clk:28,dev_cpts0_cpts_rft_clk_parent_wiz16b2m4ct_main_0_ip1_ln0_txmclk:28,dev_cpts0_vbusp_clk:28,dev_csi_psilss0_main_clk:[89,104],dev_csi_rx_if0_main_clk_clk:[89,104],dev_csi_rx_if0_ppi_rx_byte_clk:[89,104],dev_csi_rx_if0_vbus_clk_clk:[89,104],dev_csi_rx_if0_vp_clk_clk:[89,104],dev_csi_rx_if1_main_clk_clk:[89,104],dev_csi_rx_if1_ppi_rx_byte_clk:[89,104],dev_csi_rx_if1_vbus_clk_clk:[89,104],dev_csi_rx_if1_vp_clk_clk:[89,104],dev_csi_tx_if0_dphy_txbyteclkhs_cl_clk:[89,104],dev_csi_tx_if0_esc_clk_clk:[89,104],dev_csi_tx_if0_main_clk_clk:[89,104],dev_csi_tx_if0_vbus_clk_clk:[89,104],dev_ctrl_mmr0_bus_vbusp_clk:[43,58],dev_dbgsuspendrouter0_intr_clk:28,dev_dcc0_bus_dcc_clksrc0_clk:[43,58],dev_dcc0_bus_dcc_clksrc1_clk:[43,58],dev_dcc0_bus_dcc_clksrc2_clk:[43,58],dev_dcc0_bus_dcc_clksrc3_clk:[43,58],dev_dcc0_bus_dcc_clksrc4_clk:[43,58],dev_dcc0_bus_dcc_clksrc5_clk:[43,58],dev_dcc0_bus_dcc_clksrc6_clk:[43,58],dev_dcc0_bus_dcc_input00_clk:[43,58],dev_dcc0_bus_dcc_input01_clk:[43,58],dev_dcc0_bus_dcc_input02_clk:[43,58],dev_dcc0_bus_dcc_input10_clk:[43,58],dev_dcc0_bus_vbus_clk:[43,58],dev_dcc0_dcc_clksrc0_clk:[28,75,89,104],dev_dcc0_dcc_clksrc1_clk:[28,75,89,104],dev_dcc0_dcc_clksrc2_clk:[28,75,89,104],dev_dcc0_dcc_clksrc3_clk:[28,75,89,104],dev_dcc0_dcc_clksrc4_clk:[28,75,89,104],dev_dcc0_dcc_clksrc5_clk:[28,75,89,104],dev_dcc0_dcc_clksrc6_clk:[28,75,89,104],dev_dcc0_dcc_clksrc7_clk:[28,89,104],dev_dcc0_dcc_input00_clk:[28,75,89,104],dev_dcc0_dcc_input01_clk:[28,75,89,104],dev_dcc0_dcc_input02_clk:[28,75,89,104],dev_dcc0_dcc_input10_clk:[28,75,89,104],dev_dcc0_vbus_clk:[28,75,89,104],dev_dcc10_dcc_clksrc0_clk:[89,104],dev_dcc10_dcc_clksrc1_clk:[89,104],dev_dcc10_dcc_clksrc2_clk:[89,104],dev_dcc10_dcc_clksrc3_clk:[89,104],dev_dcc10_dcc_clksrc4_clk:[89,104],dev_dcc10_dcc_clksrc5_clk:[89,104],dev_dcc10_dcc_clksrc6_clk:[89,104],dev_dcc10_dcc_clksrc7_clk:[89,104],dev_dcc10_dcc_input00_clk:[89,104],dev_dcc10_dcc_input01_clk:[89,104],dev_dcc10_dcc_input02_clk:[89,104],dev_dcc10_dcc_input10_clk:[89,104],dev_dcc10_vbus_clk:[89,104],dev_dcc11_dcc_clksrc0_clk:[89,104],dev_dcc11_dcc_clksrc1_clk:[89,104],dev_dcc11_dcc_clksrc2_clk:[89,104],dev_dcc11_dcc_clksrc3_clk:[89,104],dev_dcc11_dcc_clksrc4_clk:[89,104],dev_dcc11_dcc_clksrc5_clk:[89,104],dev_dcc11_dcc_clksrc6_clk:[89,104],dev_dcc11_dcc_clksrc7_clk:[89,104],dev_dcc11_dcc_input00_clk:[89,104],dev_dcc11_dcc_input01_clk:[89,104],dev_dcc11_dcc_input02_clk:[89,104],dev_dcc11_dcc_input10_clk:[89,104],dev_dcc11_vbus_clk:[89,104],dev_dcc12_dcc_clksrc0_clk:[89,104],dev_dcc12_dcc_clksrc1_clk:[89,104],dev_dcc12_dcc_clksrc2_clk:[89,104],dev_dcc12_dcc_clksrc3_clk:[89,104],dev_dcc12_dcc_clksrc4_clk:[89,104],dev_dcc12_dcc_clksrc5_clk:[89,104],dev_dcc12_dcc_clksrc6_clk:[89,104],dev_dcc12_dcc_clksrc7_clk:[89,104],dev_dcc12_dcc_input00_clk:[89,104],dev_dcc12_dcc_input01_clk:[89,104],dev_dcc12_dcc_input02_clk:[89,104],dev_dcc12_dcc_input10_clk:[89,104],dev_dcc12_vbus_clk:[89,104],dev_dcc1_bus_dcc_clksrc0_clk:[43,58],dev_dcc1_bus_dcc_clksrc1_clk:[43,58],dev_dcc1_bus_dcc_clksrc2_clk:[43,58],dev_dcc1_bus_dcc_clksrc3_clk:[43,58],dev_dcc1_bus_dcc_clksrc4_clk:[43,58],dev_dcc1_bus_dcc_clksrc5_clk:[43,58],dev_dcc1_bus_dcc_clksrc6_clk:[43,58],dev_dcc1_bus_dcc_clksrc7_clk:[43,58],dev_dcc1_bus_dcc_input00_clk:[43,58],dev_dcc1_bus_dcc_input01_clk:[43,58],dev_dcc1_bus_dcc_input02_clk:[43,58],dev_dcc1_bus_dcc_input10_clk:[43,58],dev_dcc1_bus_vbus_clk:[43,58],dev_dcc1_dcc_clksrc0_clk:[28,75,89,104],dev_dcc1_dcc_clksrc1_clk:[28,75,89,104],dev_dcc1_dcc_clksrc2_clk:[28,75,89,104],dev_dcc1_dcc_clksrc3_clk:[28,75,89,104],dev_dcc1_dcc_clksrc4_clk:[28,75,89,104],dev_dcc1_dcc_clksrc5_clk:[28,75,89,104],dev_dcc1_dcc_clksrc6_clk:[28,75,89,104],dev_dcc1_dcc_clksrc7_clk:[28,89,104],dev_dcc1_dcc_input00_clk:[28,75,89,104],dev_dcc1_dcc_input01_clk:[28,75,89,104],dev_dcc1_dcc_input02_clk:[28,75,89,104],dev_dcc1_dcc_input10_clk:[28,75,89,104],dev_dcc1_vbus_clk:[28,75,89,104],dev_dcc2_bus_dcc_clksrc0_clk:[43,58],dev_dcc2_bus_dcc_clksrc1_clk:[43,58],dev_dcc2_bus_dcc_clksrc2_clk:[43,58],dev_dcc2_bus_dcc_clksrc3_clk:[43,58],dev_dcc2_bus_dcc_clksrc4_clk:[43,58],dev_dcc2_bus_dcc_clksrc5_clk:[43,58],dev_dcc2_bus_dcc_clksrc6_clk:[43,58],dev_dcc2_bus_dcc_clksrc7_clk:[43,58],dev_dcc2_bus_dcc_input00_clk:[43,58],dev_dcc2_bus_dcc_input01_clk:[43,58],dev_dcc2_bus_dcc_input02_clk:[43,58],dev_dcc2_bus_dcc_input10_clk:[43,58],dev_dcc2_bus_vbus_clk:[43,58],dev_dcc2_dcc_clksrc0_clk:[28,75,89,104],dev_dcc2_dcc_clksrc1_clk:[28,89,104],dev_dcc2_dcc_clksrc2_clk:[28,75,89,104],dev_dcc2_dcc_clksrc3_clk:[28,75,89,104],dev_dcc2_dcc_clksrc4_clk:[28,75,89,104],dev_dcc2_dcc_clksrc5_clk:[28,75,89,104],dev_dcc2_dcc_clksrc6_clk:[28,75,89,104],dev_dcc2_dcc_clksrc7_clk:[28,75,89,104],dev_dcc2_dcc_input00_clk:[28,75,89,104],dev_dcc2_dcc_input01_clk:[28,75,89,104],dev_dcc2_dcc_input02_clk:[28,75,89,104],dev_dcc2_dcc_input10_clk:[28,75,89,104],dev_dcc2_vbus_clk:[28,75,89,104],dev_dcc3_bus_dcc_clksrc0_clk:[43,58],dev_dcc3_bus_dcc_clksrc1_clk:[43,58],dev_dcc3_bus_dcc_clksrc2_clk:[43,58],dev_dcc3_bus_dcc_clksrc3_clk:[43,58],dev_dcc3_bus_dcc_clksrc4_clk:[43,58],dev_dcc3_bus_dcc_clksrc5_clk:[43,58],dev_dcc3_bus_dcc_clksrc7_clk:[43,58],dev_dcc3_bus_dcc_input00_clk:[43,58],dev_dcc3_bus_dcc_input01_clk:[43,58],dev_dcc3_bus_dcc_input02_clk:[43,58],dev_dcc3_bus_dcc_input10_clk:[43,58],dev_dcc3_bus_vbus_clk:[43,58],dev_dcc3_dcc_clksrc0_clk:[28,75,89,104],dev_dcc3_dcc_clksrc1_clk:[28,89,104],dev_dcc3_dcc_clksrc2_clk:[28,75,89,104],dev_dcc3_dcc_clksrc3_clk:[28,75,89,104],dev_dcc3_dcc_clksrc4_clk:[28,75,89,104],dev_dcc3_dcc_clksrc5_clk:[28,75,89,104],dev_dcc3_dcc_clksrc6_clk:[28,75,89,104],dev_dcc3_dcc_clksrc7_clk:[28,75,89,104],dev_dcc3_dcc_input00_clk:[28,75,89,104],dev_dcc3_dcc_input01_clk:[28,75,89,104],dev_dcc3_dcc_input02_clk:[28,75,89,104],dev_dcc3_dcc_input10_clk:[28,75,89,104],dev_dcc3_vbus_clk:[28,75,89,104],dev_dcc4_bus_dcc_clksrc0_clk:[43,58],dev_dcc4_bus_dcc_clksrc2_clk:[43,58],dev_dcc4_bus_dcc_clksrc3_clk:[43,58],dev_dcc4_bus_dcc_clksrc4_clk:[43,58],dev_dcc4_bus_dcc_clksrc5_clk:[43,58],dev_dcc4_bus_dcc_clksrc6_clk:[43,58],dev_dcc4_bus_dcc_clksrc7_clk:[43,58],dev_dcc4_bus_dcc_input00_clk:[43,58],dev_dcc4_bus_dcc_input01_clk:[43,58],dev_dcc4_bus_dcc_input02_clk:[43,58],dev_dcc4_bus_dcc_input10_clk:[43,58],dev_dcc4_bus_vbus_clk:[43,58],dev_dcc4_dcc_clksrc0_clk:[28,75,89,104],dev_dcc4_dcc_clksrc0_clk_parent_hsdiv4_16fft_main_0_hsdivout3_clk:28,dev_dcc4_dcc_clksrc0_clk_parent_postdiv4_16ff_main_2_hsdivout7_clk:28,dev_dcc4_dcc_clksrc1_clk:[28,75,89,104],dev_dcc4_dcc_clksrc2_clk:[28,75,89,104],dev_dcc4_dcc_clksrc3_clk:[28,75,89,104],dev_dcc4_dcc_clksrc4_clk:[28,75,89,104],dev_dcc4_dcc_clksrc5_clk:[28,75,89,104],dev_dcc4_dcc_clksrc6_clk:[28,75,89,104],dev_dcc4_dcc_clksrc7_clk:[28,75,89,104],dev_dcc4_dcc_input00_clk:[28,75,89,104],dev_dcc4_dcc_input01_clk:[28,75,89,104],dev_dcc4_dcc_input02_clk:[28,75,89,104],dev_dcc4_dcc_input10_clk:[28,75,89,104],dev_dcc4_vbus_clk:[28,75,89,104],dev_dcc5_bus_dcc_clksrc0_clk:[43,58],dev_dcc5_bus_dcc_clksrc1_clk:[43,58],dev_dcc5_bus_dcc_clksrc2_clk:[43,58],dev_dcc5_bus_dcc_clksrc3_clk:[43,58],dev_dcc5_bus_dcc_clksrc4_clk:[43,58],dev_dcc5_bus_dcc_clksrc5_clk:[43,58],dev_dcc5_bus_dcc_clksrc6_clk:[43,58],dev_dcc5_bus_dcc_clksrc7_clk:[43,58],dev_dcc5_bus_dcc_input00_clk:[43,58],dev_dcc5_bus_dcc_input01_clk:[43,58],dev_dcc5_bus_dcc_input02_clk:[43,58],dev_dcc5_bus_dcc_input10_clk:[43,58],dev_dcc5_bus_vbus_clk:[43,58],dev_dcc5_dcc_clksrc0_clk:[28,75,89,104],dev_dcc5_dcc_clksrc1_clk:[28,75,89,104],dev_dcc5_dcc_clksrc2_clk:[28,89,104],dev_dcc5_dcc_clksrc3_clk:[28,89,104],dev_dcc5_dcc_clksrc4_clk:[28,75,89,104],dev_dcc5_dcc_clksrc5_clk:[28,89,104],dev_dcc5_dcc_clksrc6_clk:[28,75,89,104],dev_dcc5_dcc_clksrc7_clk:[28,89,104],dev_dcc5_dcc_input00_clk:[28,75,89,104],dev_dcc5_dcc_input01_clk:[28,75,89,104],dev_dcc5_dcc_input02_clk:[28,75,89,104],dev_dcc5_dcc_input10_clk:[28,75,89,104],dev_dcc5_vbus_clk:[28,75,89,104],dev_dcc6_bus_dcc_clksrc0_clk:[43,58],dev_dcc6_bus_dcc_clksrc1_clk:[43,58],dev_dcc6_bus_dcc_clksrc2_clk:[43,58],dev_dcc6_bus_dcc_clksrc3_clk:[43,58],dev_dcc6_bus_dcc_clksrc4_clk:[43,58],dev_dcc6_bus_dcc_clksrc5_clk:[43,58],dev_dcc6_bus_dcc_clksrc6_clk:[43,58],dev_dcc6_bus_dcc_clksrc7_clk:[43,58],dev_dcc6_bus_dcc_input00_clk:[43,58],dev_dcc6_bus_dcc_input01_clk:[43,58],dev_dcc6_bus_dcc_input02_clk:[43,58],dev_dcc6_bus_dcc_input10_clk:[43,58],dev_dcc6_bus_vbus_clk:[43,58],dev_dcc6_dcc_clksrc0_clk:[75,89,104],dev_dcc6_dcc_clksrc1_clk:[75,89,104],dev_dcc6_dcc_clksrc2_clk:[75,89,104],dev_dcc6_dcc_clksrc3_clk:[75,89,104],dev_dcc6_dcc_clksrc4_clk:[75,89,104],dev_dcc6_dcc_clksrc5_clk:[75,89,104],dev_dcc6_dcc_clksrc6_clk:[75,89,104],dev_dcc6_dcc_clksrc7_clk:[75,89,104],dev_dcc6_dcc_input00_clk:[75,89,104],dev_dcc6_dcc_input01_clk:[75,89,104],dev_dcc6_dcc_input02_clk:[75,89,104],dev_dcc6_dcc_input10_clk:[75,89,104],dev_dcc6_vbus_clk:[75,89,104],dev_dcc7_bus_dcc_clksrc0_clk:[43,58],dev_dcc7_bus_dcc_clksrc1_clk:[43,58],dev_dcc7_bus_dcc_clksrc2_clk:[43,58],dev_dcc7_bus_dcc_clksrc3_clk:[43,58],dev_dcc7_bus_dcc_clksrc4_clk:[43,58],dev_dcc7_bus_dcc_clksrc5_clk:[43,58],dev_dcc7_bus_dcc_clksrc6_clk:[43,58],dev_dcc7_bus_dcc_clksrc7_clk:[43,58],dev_dcc7_bus_dcc_input00_clk:[43,58],dev_dcc7_bus_dcc_input01_clk:[43,58],dev_dcc7_bus_dcc_input02_clk:[43,58],dev_dcc7_bus_dcc_input10_clk:[43,58],dev_dcc7_bus_vbus_clk:[43,58],dev_dcc7_dcc_clksrc0_clk:[89,104],dev_dcc7_dcc_clksrc1_clk:[89,104],dev_dcc7_dcc_clksrc2_clk:[89,104],dev_dcc7_dcc_clksrc3_clk:[89,104],dev_dcc7_dcc_clksrc4_clk:[89,104],dev_dcc7_dcc_clksrc5_clk:[89,104],dev_dcc7_dcc_clksrc6_clk:[89,104],dev_dcc7_dcc_clksrc7_clk:[89,104],dev_dcc7_dcc_input00_clk:[89,104],dev_dcc7_dcc_input01_clk:[89,104],dev_dcc7_dcc_input02_clk:[89,104],dev_dcc7_dcc_input10_clk:[89,104],dev_dcc7_vbus_clk:[89,104],dev_dcc8_dcc_clksrc0_clk:[89,104],dev_dcc8_dcc_clksrc1_clk:[89,104],dev_dcc8_dcc_clksrc2_clk:[89,104],dev_dcc8_dcc_clksrc3_clk:[89,104],dev_dcc8_dcc_clksrc4_clk:[89,104],dev_dcc8_dcc_clksrc5_clk:[89,104],dev_dcc8_dcc_clksrc6_clk:[89,104],dev_dcc8_dcc_clksrc7_clk:[89,104],dev_dcc8_dcc_input00_clk:[89,104],dev_dcc8_dcc_input01_clk:[89,104],dev_dcc8_dcc_input02_clk:[89,104],dev_dcc8_dcc_input10_clk:[89,104],dev_dcc8_vbus_clk:[89,104],dev_dcc9_dcc_clksrc0_clk:[89,104],dev_dcc9_dcc_clksrc1_clk:[89,104],dev_dcc9_dcc_clksrc2_clk:[89,104],dev_dcc9_dcc_clksrc3_clk:[89,104],dev_dcc9_dcc_clksrc4_clk:[89,104],dev_dcc9_dcc_clksrc5_clk:[89,104],dev_dcc9_dcc_clksrc6_clk:[89,104],dev_dcc9_dcc_clksrc7_clk:[89,104],dev_dcc9_dcc_input00_clk:[89,104],dev_dcc9_dcc_input01_clk:[89,104],dev_dcc9_dcc_input02_clk:[89,104],dev_dcc9_dcc_input10_clk:[89,104],dev_dcc9_vbus_clk:[89,104],dev_ddpa0_ddpa_clk:28,dev_ddr0_ddrss_cfg_clk:[89,104],dev_ddr0_ddrss_ddr_pll_clk:[75,89,104],dev_ddr0_ddrss_io_ck:[89,104],dev_ddr0_ddrss_io_ck_n:[89,104],dev_ddr0_ddrss_vbus_clk:[89,104],dev_ddr0_pll_ctrl_clk:[75,89,104],dev_ddr16ss0_ddrss_ddr_pll_clk:28,dev_ddr16ss0_pll_ctrl_clk:28,dev_ddrss0_bus_ddrss_byp_4x_clk:[43,58],dev_ddrss0_bus_ddrss_byp_clk_bus_in0_adpllljm_wrap_main_3_bus_clkout_clk:[43,58],dev_ddrss0_bus_ddrss_byp_clk_bus_in1_adpllljm_wrap_main_3_bus_clkout_clk:[43,58],dev_ddrss0_bus_ddrss_cfg_clk:[43,58],dev_ddrss0_bus_ddrss_ctl_clk_bus_in0_adpllljm_wrap_main_3_bus_clkout_clk:[43,58],dev_ddrss0_bus_ddrss_ctl_clk_bus_in1_adpllljm_wrap_main_3_bus_clkout_clk:[43,58],dev_ddrss0_bus_ddrss_phy_ctl_clk_bus_in0_adpllljm_wrap_main_3_bus_clkout_clk:[43,58],dev_ddrss0_bus_ddrss_phy_ctl_clk_bus_in1_adpllljm_wrap_main_3_bus_clkout_clk:[43,58],dev_ddrss0_bus_ddrss_tclk:[43,58],dev_ddrss0_bus_ddrss_vbus_clk:[43,58],dev_debugss0_bus_atb0_clk:[43,58],dev_debugss0_bus_atb1_clk:[43,58],dev_debugss0_bus_atb2_clk:[43,58],dev_debugss0_bus_atb3_clk:[43,58],dev_debugss0_bus_atb4_clk:[43,58],dev_debugss0_bus_atb5_clk:[43,58],dev_debugss0_bus_cfg_clk:[43,58],dev_debugss0_bus_dbg_clk:[43,58],dev_debugss0_bus_sys_clk:[43,58],dev_debugss_wrap0_atb_clk:[28,75,89,104],dev_debugss_wrap0_bus_atb_clk:[43,58],dev_debugss_wrap0_bus_core_clk:[43,58],dev_debugss_wrap0_bus_jtag_tck:[43,58],dev_debugss_wrap0_bus_trexpt_clk:[43,58],dev_debugss_wrap0_core_clk:[28,75,89,104],dev_debugss_wrap0_cstpiu_traceclk:[75,89,104],dev_debugss_wrap0_jtag_tck:[28,75,89,104],dev_debugss_wrap0_trexpt_clk:[28,75,89,104],dev_debugsuspendrtr0_bus_intr_clk:[43,58],dev_decoder0_sys_clk:[89,104],dev_dftss0_bus_vbusp_clk_clk:[43,58],dev_dmass0_bcdma_0_clk:28,dev_dmass0_cbass_0_clk:28,dev_dmass0_intaggr_0_clk:28,dev_dmass0_ipcss_0_clk:28,dev_dmass0_pktdma_0_clk:28,dev_dmass0_psilcfg_0_clk:28,dev_dmass0_psilss_0_pdma_main0_clk:28,dev_dmass0_psilss_0_pdma_main1_clk:28,dev_dmass0_psilss_0_vd2clk:28,dev_dmass0_ringacc_0_clk:28,dev_dmpac0_clk:[89,104],dev_dmpac0_pll_dco_clk:[89,104],dev_dmpac0_sde_0_clk:[89,104],dev_dphy_rx0_main_clk_clk:[89,104],dev_dphy_rx0_ppi_rx_byte_clk:[89,104],dev_dphy_rx1_main_clk_clk:[89,104],dev_dphy_rx1_ppi_rx_byte_clk:[89,104],dev_dphy_tx0_ck_m:[89,104],dev_dphy_tx0_ck_p:[89,104],dev_dphy_tx0_clk:[89,104],dev_dphy_tx0_dphy_ref_clk:[89,104],dev_dphy_tx0_dphy_ref_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_dphy_tx0_dphy_ref_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_dphy_tx0_dphy_ref_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_dphy_tx0_dphy_ref_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_dphy_tx0_ip1_ppi_m_rxclkesc_clk:[89,104],dev_dphy_tx0_ip1_ppi_m_txclkesc_clk:[89,104],dev_dphy_tx0_ip1_ppi_txbyteclkhs_cl_clk:[89,104],dev_dphy_tx0_ip2_ppi_txbyteclkhs_cl_clk:[89,104],dev_dphy_tx0_psm_clk:[89,104],dev_dss0_bus_dpi_0_in_clk_bus_in0_clockdivider_dss_bus_out0:58,dev_dss0_bus_dpi_0_in_clk_bus_in0_dss_bus_out0:43,dev_dss0_bus_dpi_0_in_clk_bus_in1_clockdivider_dss_bus_out0:58,dev_dss0_bus_dpi_0_in_clk_bus_in1_dss_bus_out0:43,dev_dss0_bus_dpi_1_in_clk:[43,58],dev_dss0_bus_dpi_1_in_clk_parent_board_0_bus_dss0extpclkin_out:[43,58],dev_dss0_bus_dpi_1_in_clk_parent_clockdivider_dss_bus_out07:58,dev_dss0_bus_dpi_1_in_clk_parent_clockdivider_dss_bus_out1:58,dev_dss0_bus_dpi_1_in_clk_parent_dss_bus_out07:43,dev_dss0_bus_dpi_1_in_clk_parent_dss_bus_out1:43,dev_dss0_bus_dpi_1_out_clk:[43,58],dev_dss0_bus_dss_func_clk:[43,58],dev_dss0_dpi0_ext_clksel:[89,104],dev_dss0_dpi0_ext_clksel_parent_board_0_vout1_extpclkin_out:[89,104],dev_dss0_dpi0_ext_clksel_parent_hsdiv1_16fft_main_19_hsdivout0_clk:[89,104],dev_dss0_dpi1_ext_clksel:[89,104],dev_dss0_dpi1_ext_clksel_parent_board_0_vout2_extpclkin_out:[89,104],dev_dss0_dpi1_ext_clksel_parent_hsdiv1_16fft_main_23_hsdivout0_clk:[89,104],dev_dss0_dss_func_clk:[89,104],dev_dss0_dss_inst0_dpi_0_in_2x_clk:[89,104],dev_dss0_dss_inst0_dpi_0_in_2x_clk_parent_dpi_1_pclk_sel_out0:[89,104],dev_dss0_dss_inst0_dpi_0_in_2x_clk_parent_hsdiv1_16fft_main_16_hsdivout0_clk:[89,104],dev_dss0_dss_inst0_dpi_0_out_2x_clk:[89,104],dev_dss0_dss_inst0_dpi_0_out_clk:[89,104],dev_dss0_dss_inst0_dpi_1_in_2x_clk:[89,104],dev_dss0_dss_inst0_dpi_1_in_2x_clk_parent_dpi0_ext_clksel_out0:[89,104],dev_dss0_dss_inst0_dpi_1_in_2x_clk_parent_dpi1_ext_clksel_out0:[89,104],dev_dss0_dss_inst0_dpi_1_in_2x_clk_parent_hsdiv1_16fft_main_16_hsdivout0_clk:[89,104],dev_dss0_dss_inst0_dpi_1_in_2x_clk_parent_hsdiv1_16fft_main_17_hsdivout0_clk:[89,104],dev_dss0_dss_inst0_dpi_1_out_clk:[89,104],dev_dss0_dss_inst0_dpi_2_in_2x_clk:[89,104],dev_dss0_dss_inst0_dpi_2_in_2x_clk_parent_dpi0_ext_clksel_out0:[89,104],dev_dss0_dss_inst0_dpi_2_in_2x_clk_parent_hsdiv1_16fft_main_16_hsdivout0_clk:[89,104],dev_dss0_dss_inst0_dpi_2_in_2x_clk_parent_hsdiv1_16fft_main_18_hsdivout0_clk:[89,104],dev_dss0_dss_inst0_dpi_2_out_clk:[89,104],dev_dss0_dss_inst0_dpi_3_in_2x_clk:[89,104],dev_dss0_dss_inst0_dpi_3_in_2x_clk_parent_dpi0_ext_clksel_out0:[89,104],dev_dss0_dss_inst0_dpi_3_in_2x_clk_parent_dpi1_ext_clksel_out0:[89,104],dev_dss0_dss_inst0_dpi_3_in_2x_clk_parent_hsdiv1_16fft_main_16_hsdivout1_clk:[89,104],dev_dss0_dss_inst0_dpi_3_in_2x_clk_parent_hsdiv1_16fft_main_17_hsdivout1_clk:[89,104],dev_dss0_dss_inst0_dpi_3_in_2x_clk_parent_hsdiv1_16fft_main_18_hsdivout1_clk:[89,104],dev_dss0_dss_inst0_dpi_3_out_clk:[89,104],dev_dss_dsi0_dphy_0_rx_esc_clk:[89,104],dev_dss_dsi0_dphy_0_tx_esc_clk:[89,104],dev_dss_dsi0_dpi_0_clk:[89,104],dev_dss_dsi0_pll_ctrl_clk:[89,104],dev_dss_dsi0_ppi_0_txbyteclkhs_cl_clk:[89,104],dev_dss_dsi0_sys_clk:[89,104],dev_dss_edp0_aif_i2s_clk:[89,104],dev_dss_edp0_dpi_2_2x_clk:[89,104],dev_dss_edp0_dpi_2_clk:[89,104],dev_dss_edp0_dpi_3_clk:[89,104],dev_dss_edp0_dpi_4_clk:[89,104],dev_dss_edp0_dpi_5_clk:[89,104],dev_dss_edp0_dptx_mod_clk:[89,104],dev_dss_edp0_phy_ln0_refclk:[89,104],dev_dss_edp0_phy_ln0_rxclk:[89,104],dev_dss_edp0_phy_ln0_rxfclk:[89,104],dev_dss_edp0_phy_ln0_txclk:[89,104],dev_dss_edp0_phy_ln0_txfclk:[89,104],dev_dss_edp0_phy_ln0_txmclk:[89,104],dev_dss_edp0_phy_ln1_refclk:[89,104],dev_dss_edp0_phy_ln1_rxclk:[89,104],dev_dss_edp0_phy_ln1_rxfclk:[89,104],dev_dss_edp0_phy_ln1_txclk:[89,104],dev_dss_edp0_phy_ln1_txfclk:[89,104],dev_dss_edp0_phy_ln1_txmclk:[89,104],dev_dss_edp0_phy_ln2_refclk:[89,104],dev_dss_edp0_phy_ln2_rxclk:[89,104],dev_dss_edp0_phy_ln2_rxfclk:[89,104],dev_dss_edp0_phy_ln2_txclk:[89,104],dev_dss_edp0_phy_ln2_txfclk:[89,104],dev_dss_edp0_phy_ln2_txmclk:[89,104],dev_dss_edp0_phy_ln3_refclk:[89,104],dev_dss_edp0_phy_ln3_rxclk:[89,104],dev_dss_edp0_phy_ln3_rxfclk:[89,104],dev_dss_edp0_phy_ln3_txclk:[89,104],dev_dss_edp0_phy_ln3_txfclk:[89,104],dev_dss_edp0_phy_ln3_txmclk:[89,104],dev_dss_edp0_pll_ctrl_clk:[89,104],dev_ecap0_bus_vbus_clk:[43,58],dev_ecap0_vbus_clk:[28,75,89,104],dev_ecap1_vbus_clk:[28,75,89,104],dev_ecap2_vbus_clk:[28,75,89,104],dev_ecc_aggr0_bus_aggr_clk:[43,58],dev_ecc_aggr1_bus_aggr_clk:[43,58],dev_ecc_aggr2_bus_aggr_clk:[43,58],dev_efuse0_bus_efc0_ctl_fclk:58,dev_efuse0_bus_efc1_ctl_fclk:58,dev_efuse0_bus_vbusp_pll_clk_clk:[43,58],dev_ehrpwm0_bus_vbusp_clk:[43,58],dev_ehrpwm0_vbusp_clk:[75,89,104],dev_ehrpwm1_bus_vbusp_clk:[43,58],dev_ehrpwm1_vbusp_clk:[75,89,104],dev_ehrpwm2_bus_vbusp_clk:[43,58],dev_ehrpwm2_vbusp_clk:[75,89,104],dev_ehrpwm3_bus_vbusp_clk:[43,58],dev_ehrpwm3_vbusp_clk:[75,89,104],dev_ehrpwm4_bus_vbusp_clk:[43,58],dev_ehrpwm4_vbusp_clk:[75,89,104],dev_ehrpwm5_bus_vbusp_clk:[43,58],dev_ehrpwm5_vbusp_clk:[75,89,104],dev_elm0_bus_vbusp_clk:[43,58],dev_elm0_vbusp_clk:[28,75,89,104],dev_encoder0_sys_clk:[89,104],dev_epwm0_vbusp_clk:28,dev_epwm1_vbusp_clk:28,dev_epwm2_vbusp_clk:28,dev_epwm3_vbusp_clk:28,dev_epwm4_vbusp_clk:28,dev_epwm5_vbusp_clk:28,dev_epwm6_vbusp_clk:28,dev_epwm7_vbusp_clk:28,dev_epwm8_vbusp_clk:28,dev_eqep0_bus_vbus_clk:[43,58],dev_eqep0_vbus_clk:[28,75,89,104],dev_eqep1_bus_vbus_clk:[43,58],dev_eqep1_vbus_clk:[28,75,89,104],dev_eqep2_bus_vbus_clk:[43,58],dev_eqep2_vbus_clk:[28,75,89,104],dev_esm0_bus_clk:[43,58],dev_esm0_clk:[28,75,89,104],dev_fsirx0_fsi_rx_ck:28,dev_fsirx0_fsi_rx_lpbk_ck:28,dev_fsirx0_fsi_rx_vbus_clk:28,dev_fsirx1_fsi_rx_ck:28,dev_fsirx1_fsi_rx_lpbk_ck:28,dev_fsirx1_fsi_rx_vbus_clk:28,dev_fsirx2_fsi_rx_ck:28,dev_fsirx2_fsi_rx_lpbk_ck:28,dev_fsirx2_fsi_rx_vbus_clk:28,dev_fsirx3_fsi_rx_ck:28,dev_fsirx3_fsi_rx_lpbk_ck:28,dev_fsirx3_fsi_rx_vbus_clk:28,dev_fsirx4_fsi_rx_ck:28,dev_fsirx4_fsi_rx_lpbk_ck:28,dev_fsirx4_fsi_rx_vbus_clk:28,dev_fsirx5_fsi_rx_ck:28,dev_fsirx5_fsi_rx_lpbk_ck:28,dev_fsirx5_fsi_rx_vbus_clk:28,dev_fsitx0_fsi_tx_ck:28,dev_fsitx0_fsi_tx_pll_clk:28,dev_fsitx0_fsi_tx_vbus_clk:28,dev_fsitx1_fsi_tx_ck:28,dev_fsitx1_fsi_tx_pll_clk:28,dev_fsitx1_fsi_tx_vbus_clk:28,dev_fss0_fsas_0_gclk:28,dev_fss0_ospi_0_ospi_dqs_clk:28,dev_fss0_ospi_0_ospi_hclk_clk:28,dev_fss0_ospi_0_ospi_iclk_clk:28,dev_fss0_ospi_0_ospi_iclk_clk_parent_board_0_ospi0_dqs_out:28,dev_fss0_ospi_0_ospi_iclk_clk_parent_board_0_ospi0_lbclko_out:28,dev_fss0_ospi_0_ospi_oclk_clk:28,dev_fss0_ospi_0_ospi_pclk_clk:28,dev_fss0_ospi_0_ospi_rclk_clk:28,dev_fss0_ospi_0_ospi_rclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:28,dev_fss0_ospi_0_ospi_rclk_clk_parent_postdiv1_16fft_main_1_hsdivout5_clk:28,dev_gic0_bus_vclk_clk:[43,58],dev_gicss0_vclk_clk:28,dev_gpio0_bus_mmr_clk:[43,58],dev_gpio0_mmr_clk:[28,75,89,104],dev_gpio1_bus_mmr_clk:[43,58],dev_gpio1_mmr_clk:[28,89,104],dev_gpio2_mmr_clk:[75,89,104],dev_gpio3_mmr_clk:[89,104],dev_gpio4_mmr_clk:[75,89,104],dev_gpio5_mmr_clk:[89,104],dev_gpio6_mmr_clk:[75,89,104],dev_gpio7_mmr_clk:[89,104],dev_gpiomux_intrtr0_bus_intr_clk:[43,58],dev_gpiomux_intrtr0_intr_clk:[75,89,104],dev_gpmc0_bus_func_clk:[43,58],dev_gpmc0_bus_func_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_clkout_clk2:[43,58],dev_gpmc0_bus_func_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_clkout_clk3:[43,58],dev_gpmc0_bus_func_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout3_clk:[43,58],dev_gpmc0_bus_func_clk_parent_k3_pll_ctrl_wrap_main_0_bus_chip_div1_clk_clk4:[43,58],dev_gpmc0_bus_pi_gpmc_ret_clk:[43,58],dev_gpmc0_bus_po_gpmc_dev_clk:[43,58],dev_gpmc0_bus_vbusp_clk:[43,58],dev_gpmc0_func_clk:[28,75,89,104],dev_gpmc0_func_clk_parent_hsdiv4_16fft_main_0_hsdivout3_clk:[28,75,89,104],dev_gpmc0_func_clk_parent_hsdiv4_16fft_main_2_hsdivout1_clk4:[75,89,104],dev_gpmc0_func_clk_parent_hsdiv4_16fft_main_2_hsdivout1_clk6:[75,89,104],dev_gpmc0_func_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk4:[75,89,104],dev_gpmc0_func_clk_parent_postdiv4_16ff_main_2_hsdivout7_clk:28,dev_gpmc0_pi_gpmc_ret_clk:[28,75,89,104],dev_gpmc0_po_gpmc_dev_clk:[28,75,89,104],dev_gpmc0_vbusm_clk:28,dev_gpmc0_vbusp_clk:[75,89,104],dev_gpu0_bus_hyd_core_clk:[43,58],dev_gpu0_bus_mem_clk:[43,58],dev_gpu0_bus_sgx_core_clk:[43,58],dev_gpu0_bus_sys_clk:[43,58],dev_gpu0_gpu_0_gpu_pll_clk:[89,104],dev_gs80prg_mcu_wrap_wkup_0_bus_clk:[43,58],dev_gs80prg_mcu_wrap_wkup_0_bus_osc_clk:[43,58],dev_gs80prg_soc_wrap_wkup_0_bus_clk:[43,58],dev_gs80prg_soc_wrap_wkup_0_bus_osc_clk:[43,58],dev_gtc0_bus_vbusp_clk:[43,58],dev_gtc0_bus_vbusp_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_gtc0_bus_vbusp_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_gtc0_bus_vbusp_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_gtc0_bus_vbusp_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_gtc0_bus_vbusp_clk_parent_board_0_bus_mcu_cpts_rft_clk_out:[43,58],dev_gtc0_bus_vbusp_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_gtc0_bus_vbusp_clk_parent_wiz8b2m4vsb_main_0_bus_ln0_txclk:[43,58],dev_gtc0_bus_vbusp_clk_parent_wiz8b2m4vsb_main_1_bus_ln0_txclk:[43,58],dev_gtc0_gtc_clk:[28,75,89,104],dev_gtc0_gtc_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_gtc0_gtc_clk_parent_board_0_cpts0_rft_clk_out:[28,75,89,104],dev_gtc0_gtc_clk_parent_board_0_ext_refclk1_out:[28,75,89,104],dev_gtc0_gtc_clk_parent_board_0_mcu_cpts0_rft_clk_out:[75,89,104],dev_gtc0_gtc_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_gtc0_gtc_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[75,89,104],dev_gtc0_gtc_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[75,89,104],dev_gtc0_gtc_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[28,75,89,104],dev_gtc0_gtc_clk_parent_postdiv2_16fft_main_0_hsdivout6_clk:75,dev_gtc0_gtc_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_gtc0_gtc_clk_parent_postdiv4_16ff_main_0_hsdivout6_clk:28,dev_gtc0_gtc_clk_parent_postdiv4_16ff_main_2_hsdivout5_clk:28,dev_gtc0_gtc_clk_parent_wiz16b2m4ct_main_0_ip1_ln0_txmclk:28,dev_gtc0_gtc_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_gtc0_gtc_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_gtc0_gtc_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_gtc0_gtc_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_gtc0_gtc_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_gtc0_gtc_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_gtc0_gtc_clk_parent_wiz16b4m4cs_main_3_ip2_ln0_txmclk:[89,104],dev_gtc0_gtc_clk_parent_wiz16b4m4cs_main_3_ip2_ln1_txmclk:[89,104],dev_gtc0_gtc_clk_parent_wiz16b8m4ct2_main_1_ip2_ln0_txmclk:75,dev_gtc0_gtc_clk_parent_wiz16b8m4ct2_main_1_ip2_ln1_txmclk:75,dev_gtc0_gtc_clk_parent_wiz16b8m4ct2_main_1_ip2_ln2_txmclk:75,dev_gtc0_gtc_clk_parent_wiz16b8m4ct2_main_1_ip2_ln3_txmclk:75,dev_gtc0_vbusp_clk:[28,75,89,104],dev_i2c0_bus_clk:[43,58],dev_i2c0_bus_piscl:58,dev_i2c0_bus_pisys_clk:[43,58],dev_i2c0_clk:[28,75,89,104],dev_i2c0_piscl:[28,75,89,104],dev_i2c0_pisys_clk:[28,75,89,104],dev_i2c0_porscl:[28,75],dev_i2c1_bus_clk:[43,58],dev_i2c1_bus_piscl:58,dev_i2c1_bus_pisys_clk:[43,58],dev_i2c1_clk:[28,75,89,104],dev_i2c1_piscl:[28,75,89,104],dev_i2c1_pisys_clk:[28,75,89,104],dev_i2c1_porscl:[28,75],dev_i2c2_bus_clk:[43,58],dev_i2c2_bus_piscl:58,dev_i2c2_bus_pisys_clk:[43,58],dev_i2c2_clk:[28,75,89,104],dev_i2c2_piscl:[28,75,89,104],dev_i2c2_pisys_clk:[28,75,89,104],dev_i2c2_porscl:[28,75],dev_i2c3_bus_clk:[43,58],dev_i2c3_bus_piscl:58,dev_i2c3_bus_pisys_clk:[43,58],dev_i2c3_clk:[28,75,89,104],dev_i2c3_piscl:[28,75,89,104],dev_i2c3_pisys_clk:[28,75,89,104],dev_i2c3_porscl:[28,75],dev_i2c4_clk:[75,89,104],dev_i2c4_piscl:[75,89,104],dev_i2c4_pisys_clk:[75,89,104],dev_i2c4_porscl:75,dev_i2c5_clk:[75,89,104],dev_i2c5_piscl:[75,89,104],dev_i2c5_pisys_clk:[75,89,104],dev_i2c5_porscl:75,dev_i2c6_clk:[75,89,104],dev_i2c6_piscl:[75,89,104],dev_i2c6_pisys_clk:[75,89,104],dev_i2c6_porscl:75,dev_i3c0_i3c_pclk_clk:[75,89,104],dev_i3c0_i3c_scl_di:[75,89,104],dev_i3c0_i3c_scl_do:[75,89,104],dev_i3c0_i3c_sclk_clk:[75,89,104],dev_id:12,dev_k3_arm_atb_funnel_3_32_mcu_0_bus_dbg_clk:[43,58],dev_led0_led_clk:[28,75,89,104],dev_led0_vbus_clk:[75,89,104],dev_led0_vbusp_clk:28,dev_main2mcu_lvl_intrtr0_bus_intr_clk:[43,58],dev_main2mcu_lvl_intrtr0_intr_clk:[89,104],dev_main2mcu_pls_intrtr0_bus_intr_clk:[43,58],dev_main2mcu_pls_intrtr0_intr_clk:[89,104],dev_main_gpiomux_introuter0_intr_clk:28,dev_mcan0_mcanss_cclk_clk:[28,75,89,104],dev_mcan0_mcanss_cclk_clk_parent_board_0_ext_refclk1_out:28,dev_mcan0_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan0_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_mcan0_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_mcan0_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout2_clk:28,dev_mcan0_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan0_mcanss_hclk_clk:[28,75,89,104],dev_mcan10_mcanss_cclk_clk:[75,89,104],dev_mcan10_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan10_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan10_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan10_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan10_mcanss_hclk_clk:[75,89,104],dev_mcan11_mcanss_cclk_clk:[75,89,104],dev_mcan11_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan11_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan11_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan11_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan11_mcanss_hclk_clk:[75,89,104],dev_mcan12_mcanss_cclk_clk:[75,89,104],dev_mcan12_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan12_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan12_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan12_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan12_mcanss_hclk_clk:[75,89,104],dev_mcan13_mcanss_cclk_clk:[75,89,104],dev_mcan13_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan13_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan13_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan13_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan13_mcanss_hclk_clk:[75,89,104],dev_mcan14_mcanss_cclk_clk:75,dev_mcan14_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:75,dev_mcan14_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:75,dev_mcan14_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:75,dev_mcan14_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:75,dev_mcan14_mcanss_hclk_clk:75,dev_mcan15_mcanss_cclk_clk:75,dev_mcan15_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:75,dev_mcan15_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:75,dev_mcan15_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:75,dev_mcan15_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:75,dev_mcan15_mcanss_hclk_clk:75,dev_mcan16_mcanss_cclk_clk:75,dev_mcan16_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:75,dev_mcan16_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:75,dev_mcan16_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:75,dev_mcan16_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:75,dev_mcan16_mcanss_hclk_clk:75,dev_mcan17_mcanss_cclk_clk:75,dev_mcan17_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:75,dev_mcan17_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:75,dev_mcan17_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:75,dev_mcan17_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:75,dev_mcan17_mcanss_hclk_clk:75,dev_mcan1_mcanss_cclk_clk:[28,75,89,104],dev_mcan1_mcanss_cclk_clk_parent_board_0_ext_refclk1_out:28,dev_mcan1_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan1_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_mcan1_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_mcan1_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout2_clk:28,dev_mcan1_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan1_mcanss_hclk_clk:[28,75,89,104],dev_mcan2_mcanss_cclk_clk:[75,89,104],dev_mcan2_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan2_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan2_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan2_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan2_mcanss_hclk_clk:[75,89,104],dev_mcan3_mcanss_cclk_clk:[75,89,104],dev_mcan3_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan3_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan3_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan3_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan3_mcanss_hclk_clk:[75,89,104],dev_mcan4_mcanss_cclk_clk:[75,89,104],dev_mcan4_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan4_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan4_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan4_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan4_mcanss_hclk_clk:[75,89,104],dev_mcan5_mcanss_cclk_clk:[75,89,104],dev_mcan5_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan5_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan5_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan5_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan5_mcanss_hclk_clk:[75,89,104],dev_mcan6_mcanss_cclk_clk:[75,89,104],dev_mcan6_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan6_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan6_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan6_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan6_mcanss_hclk_clk:[75,89,104],dev_mcan7_mcanss_cclk_clk:[75,89,104],dev_mcan7_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan7_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan7_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan7_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan7_mcanss_hclk_clk:[75,89,104],dev_mcan8_mcanss_cclk_clk:[75,89,104],dev_mcan8_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan8_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan8_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan8_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan8_mcanss_hclk_clk:[75,89,104],dev_mcan9_mcanss_cclk_clk:[75,89,104],dev_mcan9_mcanss_cclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcan9_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcan9_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcan9_mcanss_cclk_clk_parent_hsdiv4_16fft_main_0_hsdivout4_clk:[75,89,104],dev_mcan9_mcanss_hclk_clk:[75,89,104],dev_mcasp0_aux_clk:[75,89,104],dev_mcasp0_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp0_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp0_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp0_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp0_aux_clk_parent_hsdiv2_16fft_main_4_hsdivout0_clk:75,dev_mcasp0_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp0_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp0_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[75,89,104],dev_mcasp0_bus_aux_clk:[43,58],dev_mcasp0_bus_aux_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_mcasp0_bus_aux_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_mcasp0_bus_aux_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcasp0_bus_aux_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_mcasp0_bus_aux_clk_parent_board_0_hfosc1_clk_out_dup0:[43,58],dev_mcasp0_bus_aux_clk_parent_board_0_hfosc1_clk_out_dup1:[43,58],dev_mcasp0_bus_aux_clk_parent_clockdivider_mcasp_arm1_pll_div_bus_out0:58,dev_mcasp0_bus_aux_clk_parent_mcasp_arm1_pll_div_bus_out0:43,dev_mcasp0_bus_aux_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcasp0_bus_mcasp_ahclkr_pin:58,dev_mcasp0_bus_mcasp_ahclkx_pin:58,dev_mcasp0_bus_vbusp_clk:[43,58],dev_mcasp0_mcasp_aclkr_pin:[75,89,104],dev_mcasp0_mcasp_aclkr_pout:[75,89,104],dev_mcasp0_mcasp_aclkx_pin:[75,89,104],dev_mcasp0_mcasp_aclkx_pout:[75,89,104],dev_mcasp0_mcasp_ahclkr_pin:[75,89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_board_0_audio_ext_refclk0_out:75,dev_mcasp0_mcasp_ahclkr_pin_parent_board_0_audio_ext_refclk1_out:75,dev_mcasp0_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp0_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp0_mcasp_ahclkr_pout:[75,89,104],dev_mcasp0_mcasp_ahclkx_pin:[75,89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_board_0_audio_ext_refclk0_out:75,dev_mcasp0_mcasp_ahclkx_pin_parent_board_0_audio_ext_refclk1_out:75,dev_mcasp0_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp0_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp0_mcasp_ahclkx_pout:[75,89,104],dev_mcasp0_vbusp_clk:[75,89,104],dev_mcasp10_aux_clk:[89,104],dev_mcasp10_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp10_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp10_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp10_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp10_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp10_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp10_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp10_mcasp_aclkr_pin:[89,104],dev_mcasp10_mcasp_aclkr_pout:[89,104],dev_mcasp10_mcasp_aclkx_pin:[89,104],dev_mcasp10_mcasp_aclkx_pout:[89,104],dev_mcasp10_mcasp_ahclkr_pin:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp10_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp10_mcasp_ahclkr_pout:[89,104],dev_mcasp10_mcasp_ahclkx_pin:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp10_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp10_mcasp_ahclkx_pout:[89,104],dev_mcasp10_vbusp_clk:[89,104],dev_mcasp11_aux_clk:[89,104],dev_mcasp11_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp11_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp11_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp11_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp11_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp11_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp11_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp11_mcasp_aclkr_pin:[89,104],dev_mcasp11_mcasp_aclkr_pout:[89,104],dev_mcasp11_mcasp_aclkx_pin:[89,104],dev_mcasp11_mcasp_aclkx_pout:[89,104],dev_mcasp11_mcasp_ahclkr_pin:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp11_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp11_mcasp_ahclkr_pout:[89,104],dev_mcasp11_mcasp_ahclkx_pin:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp11_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp11_mcasp_ahclkx_pout:[89,104],dev_mcasp11_vbusp_clk:[89,104],dev_mcasp1_aux_clk:[75,89,104],dev_mcasp1_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp1_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp1_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp1_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp1_aux_clk_parent_hsdiv2_16fft_main_4_hsdivout0_clk:75,dev_mcasp1_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp1_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp1_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[75,89,104],dev_mcasp1_bus_aux_clk:[43,58],dev_mcasp1_bus_aux_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_mcasp1_bus_aux_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_mcasp1_bus_aux_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcasp1_bus_aux_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_mcasp1_bus_aux_clk_parent_board_0_hfosc1_clk_out_dup0:[43,58],dev_mcasp1_bus_aux_clk_parent_board_0_hfosc1_clk_out_dup1:[43,58],dev_mcasp1_bus_aux_clk_parent_clockdivider_mcasp_arm1_pll_div_bus_out1:58,dev_mcasp1_bus_aux_clk_parent_mcasp_arm1_pll_div_bus_out1:43,dev_mcasp1_bus_aux_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcasp1_bus_mcasp_ahclkr_pin:58,dev_mcasp1_bus_mcasp_ahclkx_pin:58,dev_mcasp1_bus_vbusp_clk:[43,58],dev_mcasp1_mcasp_aclkr_pin:[75,89,104],dev_mcasp1_mcasp_aclkr_pout:[75,89,104],dev_mcasp1_mcasp_aclkx_pin:[75,89,104],dev_mcasp1_mcasp_aclkx_pout:[75,89,104],dev_mcasp1_mcasp_ahclkr_pin:[75,89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_board_0_audio_ext_refclk0_out:75,dev_mcasp1_mcasp_ahclkr_pin_parent_board_0_audio_ext_refclk1_out:75,dev_mcasp1_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp1_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp1_mcasp_ahclkr_pout:[75,89,104],dev_mcasp1_mcasp_ahclkx_pin:[75,89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_board_0_audio_ext_refclk0_out:75,dev_mcasp1_mcasp_ahclkx_pin_parent_board_0_audio_ext_refclk1_out:75,dev_mcasp1_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp1_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp1_mcasp_ahclkx_pout:[75,89,104],dev_mcasp1_vbusp_clk:[75,89,104],dev_mcasp2_aux_clk:[75,89,104],dev_mcasp2_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp2_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp2_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp2_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp2_aux_clk_parent_hsdiv2_16fft_main_4_hsdivout0_clk:75,dev_mcasp2_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp2_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp2_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[75,89,104],dev_mcasp2_bus_aux_clk:[43,58],dev_mcasp2_bus_aux_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_mcasp2_bus_aux_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_mcasp2_bus_aux_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcasp2_bus_aux_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_mcasp2_bus_aux_clk_parent_board_0_hfosc1_clk_out_dup0:[43,58],dev_mcasp2_bus_aux_clk_parent_board_0_hfosc1_clk_out_dup1:[43,58],dev_mcasp2_bus_aux_clk_parent_clockdivider_mcasp_arm1_pll_div_bus_out2:58,dev_mcasp2_bus_aux_clk_parent_mcasp_arm1_pll_div_bus_out2:43,dev_mcasp2_bus_aux_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcasp2_bus_mcasp_ahclkr_pin:58,dev_mcasp2_bus_mcasp_ahclkx_pin:58,dev_mcasp2_bus_vbusp_clk:[43,58],dev_mcasp2_mcasp_aclkr_pin:[75,89,104],dev_mcasp2_mcasp_aclkr_pout:[75,89,104],dev_mcasp2_mcasp_aclkx_pin:[75,89,104],dev_mcasp2_mcasp_aclkx_pout:[75,89,104],dev_mcasp2_mcasp_ahclkr_pin:[75,89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_board_0_audio_ext_refclk0_out:75,dev_mcasp2_mcasp_ahclkr_pin_parent_board_0_audio_ext_refclk1_out:75,dev_mcasp2_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp2_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp2_mcasp_ahclkr_pout:[75,89,104],dev_mcasp2_mcasp_ahclkx_pin:[75,89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[75,89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[75,89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[75,89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[75,89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_board_0_audio_ext_refclk0_out:75,dev_mcasp2_mcasp_ahclkx_pin_parent_board_0_audio_ext_refclk1_out:75,dev_mcasp2_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[75,89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp2_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp2_mcasp_ahclkx_pout:[75,89,104],dev_mcasp2_vbusp_clk:[75,89,104],dev_mcasp3_aux_clk:[89,104],dev_mcasp3_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp3_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp3_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp3_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp3_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp3_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp3_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp3_mcasp_aclkr_pin:[89,104],dev_mcasp3_mcasp_aclkr_pout:[89,104],dev_mcasp3_mcasp_aclkx_pin:[89,104],dev_mcasp3_mcasp_aclkx_pout:[89,104],dev_mcasp3_mcasp_ahclkr_pin:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp3_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp3_mcasp_ahclkr_pout:[89,104],dev_mcasp3_mcasp_ahclkx_pin:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp3_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp3_mcasp_ahclkx_pout:[89,104],dev_mcasp3_vbusp_clk:[89,104],dev_mcasp4_aux_clk:[89,104],dev_mcasp4_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp4_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp4_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp4_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp4_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp4_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp4_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp4_mcasp_aclkr_pin:[89,104],dev_mcasp4_mcasp_aclkr_pout:[89,104],dev_mcasp4_mcasp_aclkx_pin:[89,104],dev_mcasp4_mcasp_aclkx_pout:[89,104],dev_mcasp4_mcasp_ahclkr_pin:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp4_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp4_mcasp_ahclkr_pout:[89,104],dev_mcasp4_mcasp_ahclkx_pin:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp4_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp4_mcasp_ahclkx_pout:[89,104],dev_mcasp4_vbusp_clk:[89,104],dev_mcasp5_aux_clk:[89,104],dev_mcasp5_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp5_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp5_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp5_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp5_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp5_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp5_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp5_mcasp_aclkr_pin:[89,104],dev_mcasp5_mcasp_aclkr_pout:[89,104],dev_mcasp5_mcasp_aclkx_pin:[89,104],dev_mcasp5_mcasp_aclkx_pout:[89,104],dev_mcasp5_mcasp_ahclkr_pin:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp5_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp5_mcasp_ahclkr_pout:[89,104],dev_mcasp5_mcasp_ahclkx_pin:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp5_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp5_mcasp_ahclkx_pout:[89,104],dev_mcasp5_vbusp_clk:[89,104],dev_mcasp6_aux_clk:[89,104],dev_mcasp6_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp6_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp6_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp6_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp6_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp6_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp6_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp6_mcasp_aclkr_pin:[89,104],dev_mcasp6_mcasp_aclkr_pout:[89,104],dev_mcasp6_mcasp_aclkx_pin:[89,104],dev_mcasp6_mcasp_aclkx_pout:[89,104],dev_mcasp6_mcasp_ahclkr_pin:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp6_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp6_mcasp_ahclkr_pout:[89,104],dev_mcasp6_mcasp_ahclkx_pin:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp6_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp6_mcasp_ahclkx_pout:[89,104],dev_mcasp6_vbusp_clk:[89,104],dev_mcasp7_aux_clk:[89,104],dev_mcasp7_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp7_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp7_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp7_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp7_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp7_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp7_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp7_mcasp_aclkr_pin:[89,104],dev_mcasp7_mcasp_aclkr_pout:[89,104],dev_mcasp7_mcasp_aclkx_pin:[89,104],dev_mcasp7_mcasp_aclkx_pout:[89,104],dev_mcasp7_mcasp_ahclkr_pin:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp7_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp7_mcasp_ahclkr_pout:[89,104],dev_mcasp7_mcasp_ahclkx_pin:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp7_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp7_mcasp_ahclkx_pout:[89,104],dev_mcasp7_vbusp_clk:[89,104],dev_mcasp8_aux_clk:[89,104],dev_mcasp8_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp8_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp8_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp8_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp8_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp8_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp8_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp8_mcasp_aclkr_pin:[89,104],dev_mcasp8_mcasp_aclkr_pout:[89,104],dev_mcasp8_mcasp_aclkx_pin:[89,104],dev_mcasp8_mcasp_aclkx_pout:[89,104],dev_mcasp8_mcasp_ahclkr_pin:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp8_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp8_mcasp_ahclkr_pout:[89,104],dev_mcasp8_mcasp_ahclkx_pin:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp8_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp8_mcasp_ahclkx_pout:[89,104],dev_mcasp8_vbusp_clk:[89,104],dev_mcasp9_aux_clk:[89,104],dev_mcasp9_aux_clk_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp9_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp9_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp9_aux_clk_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp9_aux_clk_parent_hsdiv3_16fft_main_15_hsdivout0_clk:[89,104],dev_mcasp9_aux_clk_parent_hsdiv3_16fft_main_4_hsdivout0_clk:[89,104],dev_mcasp9_aux_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mcasp9_mcasp_aclkr_pin:[89,104],dev_mcasp9_mcasp_aclkr_pout:[89,104],dev_mcasp9_mcasp_aclkx_pin:[89,104],dev_mcasp9_mcasp_aclkx_pout:[89,104],dev_mcasp9_mcasp_ahclkr_pin:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp9_mcasp_ahclkr_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp9_mcasp_ahclkr_pout:[89,104],dev_mcasp9_mcasp_ahclkx_pin:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_1:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_2:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_atl_main_0_atl_io_port_atclk_out_3:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_board_0_hfosc1_clk_out:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbclk_out:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_board_0_mlb0_mlbcp_out2:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out0:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out1:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out2:[89,104],dev_mcasp9_mcasp_ahclkx_pin_parent_mcasp_ahclko_mux_out3:[89,104],dev_mcasp9_mcasp_ahclkx_pout:[89,104],dev_mcasp9_vbusp_clk:[89,104],dev_mcspi0_bus_clkspiref_clk:[43,58],dev_mcspi0_bus_io_clkspii_clk:[43,58],dev_mcspi0_bus_io_clkspio_clk:[43,58],dev_mcspi0_bus_vbusp_clk:[43,58],dev_mcspi0_clkspiref_clk:[28,75,89,104],dev_mcspi0_io_clkspii_clk:28,dev_mcspi0_io_clkspii_clk_parent_board_0_spi0_clk_out:28,dev_mcspi0_io_clkspii_clk_parent_spi_main_0_io_clkspio_clk:28,dev_mcspi0_io_clkspio_clk:[28,75,89,104],dev_mcspi0_vbusp_clk:[28,75,89,104],dev_mcspi1_bus_clkspiref_clk:[43,58],dev_mcspi1_bus_io_clkspii_clk:[43,58],dev_mcspi1_bus_io_clkspio_clk:[43,58],dev_mcspi1_bus_vbusp_clk:[43,58],dev_mcspi1_clkspiref_clk:[28,75,89,104],dev_mcspi1_io_clkspii_clk:28,dev_mcspi1_io_clkspii_clk_parent_board_0_spi1_clk_out:28,dev_mcspi1_io_clkspii_clk_parent_spi_main_1_io_clkspio_clk:28,dev_mcspi1_io_clkspio_clk:[28,75,89,104],dev_mcspi1_vbusp_clk:[28,75,89,104],dev_mcspi2_bus_clkspiref_clk:[43,58],dev_mcspi2_bus_io_clkspii_clk:[43,58],dev_mcspi2_bus_io_clkspio_clk:[43,58],dev_mcspi2_bus_vbusp_clk:[43,58],dev_mcspi2_clkspiref_clk:[28,75,89,104],dev_mcspi2_io_clkspii_clk:28,dev_mcspi2_io_clkspii_clk_parent_board_0_spi2_clk_out:28,dev_mcspi2_io_clkspii_clk_parent_spi_main_2_io_clkspio_clk:28,dev_mcspi2_io_clkspio_clk:[28,75,89,104],dev_mcspi2_vbusp_clk:[28,75,89,104],dev_mcspi3_bus_clkspiref_clk:[43,58],dev_mcspi3_bus_io_clkspii_clk:[43,58],dev_mcspi3_bus_io_clkspio_clk:[43,58],dev_mcspi3_bus_vbusp_clk:[43,58],dev_mcspi3_clkspiref_clk:[28,75,89,104],dev_mcspi3_io_clkspii_clk:[28,75,89,104],dev_mcspi3_io_clkspii_clk_parent_board_0_spi3_clk_out:28,dev_mcspi3_io_clkspii_clk_parent_spi_main_3_io_clkspio_clk:[28,75,89,104],dev_mcspi3_io_clkspio_clk:[28,75,89,104],dev_mcspi3_vbusp_clk:[28,75,89,104],dev_mcspi4_bus_clkspiref_clk:[43,58],dev_mcspi4_bus_io_clkspii_clk:43,dev_mcspi4_bus_io_clkspio_clk:43,dev_mcspi4_bus_vbusp_clk:[43,58],dev_mcspi4_clkspiref_clk:[28,75,89,104],dev_mcspi4_io_clkspii_clk:[28,75,89,104],dev_mcspi4_io_clkspii_clk_parent_board_0_spi4_clk_out:28,dev_mcspi4_io_clkspii_clk_parent_spi_main_4_io_clkspio_clk:28,dev_mcspi4_io_clkspio_clk:[28,75,89,104],dev_mcspi4_vbusp_clk:[28,75,89,104],dev_mcspi5_clkspiref_clk:[75,89,104],dev_mcspi5_io_clkspio_clk:[75,89,104],dev_mcspi5_vbusp_clk:[75,89,104],dev_mcspi6_clkspiref_clk:[75,89,104],dev_mcspi6_io_clkspio_clk:[75,89,104],dev_mcspi6_vbusp_clk:[75,89,104],dev_mcspi7_clkspiref_clk:[75,89,104],dev_mcspi7_io_clkspio_clk:[75,89,104],dev_mcspi7_vbusp_clk:[75,89,104],dev_mcu_adc0_adc_clk:75,dev_mcu_adc0_adc_clk_parent_board_0_mcu_ext_refclk0_out:75,dev_mcu_adc0_adc_clk_parent_gluelogic_hfosc0_clkout:75,dev_mcu_adc0_adc_clk_parent_hsdiv1_16fft_mcu_0_hsdivout1_clk:75,dev_mcu_adc0_adc_clk_parent_hsdiv4_16fft_mcu_1_hsdivout1_clk:75,dev_mcu_adc0_bus_adc_clk:[43,58],dev_mcu_adc0_bus_adc_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout1_clk:[43,58],dev_mcu_adc0_bus_adc_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout3_clk:[43,58],dev_mcu_adc0_bus_adc_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcu_adc0_bus_adc_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_adc0_bus_sys_clk:[43,58],dev_mcu_adc0_bus_vbus_clk:[43,58],dev_mcu_adc0_sys_clk:75,dev_mcu_adc0_vbus_clk:75,dev_mcu_adc12_16ffc0_adc_clk:[89,104],dev_mcu_adc12_16ffc0_adc_clk_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_mcu_adc12_16ffc0_adc_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcu_adc12_16ffc0_adc_clk_parent_hsdiv1_16fft_mcu_0_hsdivout1_clk:[89,104],dev_mcu_adc12_16ffc0_adc_clk_parent_hsdiv4_16fft_mcu_1_hsdivout1_clk:[89,104],dev_mcu_adc12_16ffc0_sys_clk:[89,104],dev_mcu_adc12_16ffc0_vbus_clk:[89,104],dev_mcu_adc12_16ffc1_adc_clk:[89,104],dev_mcu_adc12_16ffc1_adc_clk_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_mcu_adc12_16ffc1_adc_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_mcu_adc12_16ffc1_adc_clk_parent_hsdiv1_16fft_mcu_0_hsdivout1_clk:[89,104],dev_mcu_adc12_16ffc1_adc_clk_parent_hsdiv4_16fft_mcu_1_hsdivout1_clk:[89,104],dev_mcu_adc12_16ffc1_sys_clk:[89,104],dev_mcu_adc12_16ffc1_vbus_clk:[89,104],dev_mcu_adc1_adc_clk:75,dev_mcu_adc1_adc_clk_parent_board_0_mcu_ext_refclk0_out:75,dev_mcu_adc1_adc_clk_parent_gluelogic_hfosc0_clkout:75,dev_mcu_adc1_adc_clk_parent_hsdiv1_16fft_mcu_0_hsdivout1_clk:75,dev_mcu_adc1_adc_clk_parent_hsdiv4_16fft_mcu_1_hsdivout1_clk:75,dev_mcu_adc1_bus_adc_clk:[43,58],dev_mcu_adc1_bus_adc_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout1_clk:[43,58],dev_mcu_adc1_bus_adc_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout3_clk:[43,58],dev_mcu_adc1_bus_adc_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcu_adc1_bus_adc_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_adc1_bus_sys_clk:[43,58],dev_mcu_adc1_bus_vbus_clk:[43,58],dev_mcu_adc1_sys_clk:75,dev_mcu_adc1_vbus_clk:75,dev_mcu_armss0_bus_interface_clk:58,dev_mcu_armss0_cpu0_bus_cpu_clk:[43,58],dev_mcu_armss0_cpu0_bus_cpu_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk2:[43,58],dev_mcu_armss0_cpu0_bus_cpu_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk:[43,58],dev_mcu_armss0_cpu0_bus_interface_clk:[43,58],dev_mcu_armss0_cpu0_bus_interface_phas:[43,58],dev_mcu_armss0_cpu0_bus_interface_phase_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk2:[43,58],dev_mcu_armss0_cpu1_bus_cpu_clk:[43,58],dev_mcu_armss0_cpu1_bus_cpu_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk2:[43,58],dev_mcu_armss0_cpu1_bus_cpu_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk:[43,58],dev_mcu_armss0_cpu1_bus_interface_clk:[43,58],dev_mcu_armss0_cpu1_bus_interface_phas:[43,58],dev_mcu_armss0_cpu1_bus_interface_phase_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk2:[43,58],dev_mcu_cbass0_bus_mcu_sysclk0_2_clk:[43,58],dev_mcu_cbass0_bus_mcu_sysclk0_4_clk:[43,58],dev_mcu_cbass0_bus_mcu_sysclk0_8_clk:[43,58],dev_mcu_cbass_debug0_bus_mcu_sysclk0_2_clk:[43,58],dev_mcu_cbass_fw0_bus_mcu_sysclk0_2_clk:[43,58],dev_mcu_cbass_fw0_bus_mcu_sysclk0_4_clk:[43,58],dev_mcu_cpsw0_bus_cppi_clk_clk:[43,58],dev_mcu_cpsw0_bus_cpts_genf0_0:58,dev_mcu_cpsw0_bus_cpts_rft_clk:[43,58],dev_mcu_cpsw0_bus_gmii1_mr_clk:[43,58],dev_mcu_cpsw0_bus_gmii1_mt_clk:[43,58],dev_mcu_cpsw0_bus_gmii_rft_clk:[43,58],dev_mcu_cpsw0_bus_rgmii_mhz_250_clk:[43,58],dev_mcu_cpsw0_bus_rgmii_mhz_50_clk:[43,58],dev_mcu_cpsw0_bus_rgmii_mhz_5_clk:[43,58],dev_mcu_cpsw0_bus_rmii_mhz_50_clk:[43,58],dev_mcu_cpsw0_bus_rmii_mhz_50_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk5:[43,58],dev_mcu_cpsw0_bus_rmii_mhz_50_clk_parent_board_0_bus_mcu_rmii1_refclk_out:[43,58],dev_mcu_cpsw0_cppi_clk_clk:[75,89,104],dev_mcu_cpsw0_cpts_genf0:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_board_0_cpts0_rft_clk_out:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_board_0_ext_refclk1_out:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_board_0_mcu_cpts0_rft_clk_out:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk2:[75,89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_postdiv2_16fft_main_0_hsdivout6_clk:75,dev_mcu_cpsw0_cpts_rft_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_3_ip2_ln0_txmclk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b4m4cs_main_3_ip2_ln1_txmclk:[89,104],dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b8m4ct2_main_1_ip2_ln0_txmclk:75,dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b8m4ct2_main_1_ip2_ln1_txmclk:75,dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b8m4ct2_main_1_ip2_ln2_txmclk:75,dev_mcu_cpsw0_cpts_rft_clk_parent_wiz16b8m4ct2_main_1_ip2_ln3_txmclk:75,dev_mcu_cpsw0_gmii1_mr_clk:[75,89,104],dev_mcu_cpsw0_gmii1_mt_clk:[75,89,104],dev_mcu_cpsw0_gmii_rft_clk:[75,89,104],dev_mcu_cpsw0_mdio_mdclk_o:[75,89,104],dev_mcu_cpsw0_rgmii1_rxc_i:[75,89,104],dev_mcu_cpsw0_rgmii1_txc_i:[89,104],dev_mcu_cpsw0_rgmii1_txc_o:[75,89,104],dev_mcu_cpsw0_rgmii_mhz_250_clk:[75,89,104],dev_mcu_cpsw0_rgmii_mhz_50_clk:[75,89,104],dev_mcu_cpsw0_rgmii_mhz_5_clk:[75,89,104],dev_mcu_cpsw0_rmii_mhz_50_clk:[75,89,104],dev_mcu_cpt2_aggr0_bus_vclk_clk:[43,58],dev_mcu_cpt2_aggr0_vclk_clk:[75,89,104],dev_mcu_ctrl_mmr0_bus_vbusp_clk:[43,58],dev_mcu_dcc0_bus_dcc_clksrc0_clk:[43,58],dev_mcu_dcc0_bus_dcc_clksrc1_clk:[43,58],dev_mcu_dcc0_bus_dcc_clksrc2_clk:[43,58],dev_mcu_dcc0_bus_dcc_clksrc3_clk:[43,58],dev_mcu_dcc0_bus_dcc_clksrc4_clk:[43,58],dev_mcu_dcc0_bus_dcc_clksrc5_clk:[43,58],dev_mcu_dcc0_bus_dcc_clksrc6_clk:[43,58],dev_mcu_dcc0_bus_dcc_clksrc7_clk:[43,58],dev_mcu_dcc0_bus_dcc_input00_clk:[43,58],dev_mcu_dcc0_bus_dcc_input01_clk:[43,58],dev_mcu_dcc0_bus_dcc_input02_clk:[43,58],dev_mcu_dcc0_bus_dcc_input10_clk:[43,58],dev_mcu_dcc0_bus_vbus_clk:[43,58],dev_mcu_dcc0_dcc_clksrc0_clk:[28,75,89,104],dev_mcu_dcc0_dcc_clksrc1_clk:[28,75,89,104],dev_mcu_dcc0_dcc_clksrc2_clk:[28,75,89,104],dev_mcu_dcc0_dcc_clksrc3_clk:[28,75,89,104],dev_mcu_dcc0_dcc_clksrc4_clk:[28,75,89,104],dev_mcu_dcc0_dcc_clksrc5_clk:[28,75,89,104],dev_mcu_dcc0_dcc_clksrc6_clk:[28,75,89,104],dev_mcu_dcc0_dcc_clksrc7_clk:[28,75,89,104],dev_mcu_dcc0_dcc_input00_clk:[28,75,89,104],dev_mcu_dcc0_dcc_input01_clk:[28,75,89,104],dev_mcu_dcc0_dcc_input02_clk:[28,75,89,104],dev_mcu_dcc0_dcc_input10_clk:[28,75,89,104],dev_mcu_dcc0_vbus_clk:[28,75,89,104],dev_mcu_dcc1_bus_dcc_clksrc0_clk:[43,58],dev_mcu_dcc1_bus_dcc_clksrc1_clk:[43,58],dev_mcu_dcc1_bus_dcc_clksrc2_clk:[43,58],dev_mcu_dcc1_bus_dcc_clksrc3_clk:[43,58],dev_mcu_dcc1_bus_dcc_clksrc4_clk:[43,58],dev_mcu_dcc1_bus_dcc_clksrc5_clk:[43,58],dev_mcu_dcc1_bus_dcc_clksrc6_clk:[43,58],dev_mcu_dcc1_bus_dcc_clksrc7_clk:[43,58],dev_mcu_dcc1_bus_dcc_input00_clk:[43,58],dev_mcu_dcc1_bus_dcc_input01_clk:[43,58],dev_mcu_dcc1_bus_dcc_input02_clk:[43,58],dev_mcu_dcc1_bus_dcc_input10_clk:[43,58],dev_mcu_dcc1_bus_vbus_clk:[43,58],dev_mcu_dcc1_dcc_clksrc0_clk:[75,89,104],dev_mcu_dcc1_dcc_clksrc1_clk:[75,89,104],dev_mcu_dcc1_dcc_clksrc2_clk:[75,89,104],dev_mcu_dcc1_dcc_clksrc3_clk:[75,89,104],dev_mcu_dcc1_dcc_clksrc4_clk:[75,89,104],dev_mcu_dcc1_dcc_clksrc5_clk:[75,89,104],dev_mcu_dcc1_dcc_clksrc6_clk:[75,89,104],dev_mcu_dcc1_dcc_clksrc7_clk:[75,89,104],dev_mcu_dcc1_dcc_input00_clk:[75,89,104],dev_mcu_dcc1_dcc_input01_clk:[75,89,104],dev_mcu_dcc1_dcc_input02_clk:[75,89,104],dev_mcu_dcc1_dcc_input10_clk:[75,89,104],dev_mcu_dcc1_vbus_clk:[75,89,104],dev_mcu_dcc2_bus_dcc_clksrc0_clk:[43,58],dev_mcu_dcc2_bus_dcc_clksrc1_clk:[43,58],dev_mcu_dcc2_bus_dcc_clksrc2_clk:[43,58],dev_mcu_dcc2_bus_dcc_clksrc3_clk:[43,58],dev_mcu_dcc2_bus_dcc_clksrc4_clk:[43,58],dev_mcu_dcc2_bus_dcc_clksrc5_clk:[43,58],dev_mcu_dcc2_bus_dcc_clksrc6_clk:[43,58],dev_mcu_dcc2_bus_dcc_clksrc7_clk:[43,58],dev_mcu_dcc2_bus_dcc_input00_clk:[43,58],dev_mcu_dcc2_bus_dcc_input01_clk:[43,58],dev_mcu_dcc2_bus_dcc_input02_clk:[43,58],dev_mcu_dcc2_bus_dcc_input10_clk:[43,58],dev_mcu_dcc2_bus_vbus_clk:[43,58],dev_mcu_dcc2_dcc_clksrc0_clk:[75,89,104],dev_mcu_dcc2_dcc_clksrc1_clk:[75,89,104],dev_mcu_dcc2_dcc_clksrc3_clk:[75,89,104],dev_mcu_dcc2_dcc_clksrc4_clk:[89,104],dev_mcu_dcc2_dcc_clksrc6_clk:[75,89,104],dev_mcu_dcc2_dcc_clksrc7_clk:[75,89,104],dev_mcu_dcc2_dcc_input00_clk:[75,89,104],dev_mcu_dcc2_dcc_input01_clk:[75,89,104],dev_mcu_dcc2_dcc_input02_clk:[75,89,104],dev_mcu_dcc2_dcc_input10_clk:[75,89,104],dev_mcu_dcc2_vbus_clk:[75,89,104],dev_mcu_debugss0_bus_atb0_clk:[43,58],dev_mcu_debugss0_bus_atb1_clk:[43,58],dev_mcu_debugss0_bus_atb2_clk:[43,58],dev_mcu_debugss0_bus_atb3_clk:[43,58],dev_mcu_debugss0_bus_cfg_clk:[43,58],dev_mcu_debugss0_bus_dbg_clk:[43,58],dev_mcu_debugss0_bus_sys_clk:[43,58],dev_mcu_ecc_aggr0_bus_aggr_clk:[43,58],dev_mcu_ecc_aggr1_bus_aggr_clk:[43,58],dev_mcu_efuse0_bus_efc0_ctl_fclk:58,dev_mcu_efuse0_bus_efc1_ctl_fclk:58,dev_mcu_efuse0_bus_efc2_ctl_fclk:58,dev_mcu_efuse0_bus_efc3_ctl_fclk:58,dev_mcu_efuse0_bus_vbusp_clk_clk:[43,58],dev_mcu_esm0_bus_clk:[43,58],dev_mcu_esm0_clk:[28,75,89,104],dev_mcu_fss0_fsas_0_gclk:[75,89,104],dev_mcu_fss0_hyperbus0_bus_cba_clk:[43,58],dev_mcu_fss0_hyperbus0_bus_hpb_clkx1_clk:[43,58],dev_mcu_fss0_hyperbus0_bus_hpb_clkx1_inv_clk:[43,58],dev_mcu_fss0_hyperbus0_bus_hpb_clkx2_clk:[43,58],dev_mcu_fss0_hyperbus0_bus_hpb_clkx2_inv_clk:58,dev_mcu_fss0_hyperbus0_hpb_out_clk_n:58,dev_mcu_fss0_hyperbus0_hpb_out_clk_p:58,dev_mcu_fss0_hyperbus1p0_0_cba_clk:[75,89,104],dev_mcu_fss0_hyperbus1p0_0_hpb_clkx1_clk:[75,89,104],dev_mcu_fss0_hyperbus1p0_0_hpb_clkx1_inv_clk:[75,89,104],dev_mcu_fss0_hyperbus1p0_0_hpb_clkx2_clk:[75,89,104],dev_mcu_fss0_hyperbus1p0_0_hpb_clkx2_inv_clk:[75,89,104],dev_mcu_fss0_hyperbus1p0_0_hpb_out_clk_n:[75,89,104],dev_mcu_fss0_hyperbus1p0_0_hpb_out_clk_p:[75,89,104],dev_mcu_fss0_ospi_0_bus_ospi0_dqs_clk:58,dev_mcu_fss0_ospi_0_bus_ospi0_hclk_clk:58,dev_mcu_fss0_ospi_0_bus_ospi0_iclk_clk:58,dev_mcu_fss0_ospi_0_bus_ospi0_iclk_clk_parent_board_0_bus_mcu_ospi0dqs_out:58,dev_mcu_fss0_ospi_0_bus_ospi0_iclk_clk_parent_fss_mcu_0_ospi_0_bus_ospi0_oclk_clk:58,dev_mcu_fss0_ospi_0_bus_ospi0_oclk_clk:58,dev_mcu_fss0_ospi_0_bus_ospi0_pclk_clk:58,dev_mcu_fss0_ospi_0_bus_ospi0_rclk_clk:58,dev_mcu_fss0_ospi_0_bus_ospi0_rclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout4_clk:58,dev_mcu_fss0_ospi_0_bus_ospi0_rclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout4_clk:58,dev_mcu_fss0_ospi_0_bus_ospi_dqs_clk:43,dev_mcu_fss0_ospi_0_bus_ospi_hclk_clk:43,dev_mcu_fss0_ospi_0_bus_ospi_iclk_clk:43,dev_mcu_fss0_ospi_0_bus_ospi_iclk_clk_parent_board_0_bus_mcu_ospi0dqs_out:43,dev_mcu_fss0_ospi_0_bus_ospi_iclk_clk_parent_fss_mcu_0_ospi_0_bus_ospi_oclk_clk:43,dev_mcu_fss0_ospi_0_bus_ospi_oclk_clk:43,dev_mcu_fss0_ospi_0_bus_ospi_pclk_clk:43,dev_mcu_fss0_ospi_0_bus_ospi_rclk_clk:43,dev_mcu_fss0_ospi_0_bus_ospi_rclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout4_clk:43,dev_mcu_fss0_ospi_0_bus_ospi_rclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout4_clk:43,dev_mcu_fss0_ospi_0_ospi_dqs_clk:[75,89,104],dev_mcu_fss0_ospi_0_ospi_hclk_clk:[75,89,104],dev_mcu_fss0_ospi_0_ospi_iclk_clk:[75,89,104],dev_mcu_fss0_ospi_0_ospi_iclk_clk_parent_board_0_mcu_ospi0_dqs_out:[75,89,104],dev_mcu_fss0_ospi_0_ospi_iclk_clk_parent_fss_mcu_0_ospi_0_ospi_oclk_clk:[75,89,104],dev_mcu_fss0_ospi_0_ospi_oclk_clk:[75,89,104],dev_mcu_fss0_ospi_0_ospi_pclk_clk:[75,89,104],dev_mcu_fss0_ospi_0_ospi_rclk_clk:[75,89,104],dev_mcu_fss0_ospi_0_ospi_rclk_clk_parent_hsdiv4_16fft_mcu_1_hsdivout4_clk:[75,89,104],dev_mcu_fss0_ospi_0_ospi_rclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout4_clk:[75,89,104],dev_mcu_fss0_ospi_1_bus_ospi1_dqs_clk:58,dev_mcu_fss0_ospi_1_bus_ospi1_hclk_clk:58,dev_mcu_fss0_ospi_1_bus_ospi1_iclk_clk:58,dev_mcu_fss0_ospi_1_bus_ospi1_iclk_clk_parent_board_0_bus_mcu_ospi1dqs_out:58,dev_mcu_fss0_ospi_1_bus_ospi1_iclk_clk_parent_fss_mcu_0_ospi_1_bus_ospi1_oclk_clk:58,dev_mcu_fss0_ospi_1_bus_ospi1_oclk_clk:58,dev_mcu_fss0_ospi_1_bus_ospi1_pclk_clk:58,dev_mcu_fss0_ospi_1_bus_ospi1_rclk_clk:58,dev_mcu_fss0_ospi_1_bus_ospi1_rclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout4_clk:58,dev_mcu_fss0_ospi_1_bus_ospi1_rclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout4_clk:58,dev_mcu_fss0_ospi_1_bus_ospi_dqs_clk:43,dev_mcu_fss0_ospi_1_bus_ospi_hclk_clk:43,dev_mcu_fss0_ospi_1_bus_ospi_iclk_clk:43,dev_mcu_fss0_ospi_1_bus_ospi_iclk_clk_parent_board_0_bus_mcu_ospi1dqs_out:43,dev_mcu_fss0_ospi_1_bus_ospi_iclk_clk_parent_fss_mcu_0_ospi_1_bus_ospi_oclk_clk:43,dev_mcu_fss0_ospi_1_bus_ospi_oclk_clk:43,dev_mcu_fss0_ospi_1_bus_ospi_pclk_clk:43,dev_mcu_fss0_ospi_1_bus_ospi_rclk_clk:43,dev_mcu_fss0_ospi_1_bus_ospi_rclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout4_clk:43,dev_mcu_fss0_ospi_1_bus_ospi_rclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout4_clk:43,dev_mcu_fss0_ospi_1_ospi_dqs_clk:[89,104],dev_mcu_fss0_ospi_1_ospi_hclk_clk:[75,89,104],dev_mcu_fss0_ospi_1_ospi_iclk_clk:[89,104],dev_mcu_fss0_ospi_1_ospi_iclk_clk_parent_board_0_mcu_ospi1_dqs_out:[89,104],dev_mcu_fss0_ospi_1_ospi_iclk_clk_parent_fss_mcu_0_ospi_1_ospi_oclk_clk:[89,104],dev_mcu_fss0_ospi_1_ospi_oclk_clk:[89,104],dev_mcu_fss0_ospi_1_ospi_pclk_clk:[75,89,104],dev_mcu_fss0_ospi_1_ospi_rclk_clk:[75,89,104],dev_mcu_fss0_ospi_1_ospi_rclk_clk_parent_hsdiv4_16fft_mcu_1_hsdivout4_clk:[89,104],dev_mcu_fss0_ospi_1_ospi_rclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout4_clk:[89,104],dev_mcu_gpio0_mmr_clk:28,dev_mcu_i2c0_bus_clk:[43,58],dev_mcu_i2c0_bus_piscl:58,dev_mcu_i2c0_bus_pisys_clk:[43,58],dev_mcu_i2c0_clk:[28,75,89,104],dev_mcu_i2c0_piscl:[28,75,89,104],dev_mcu_i2c0_pisys_clk:[28,75,89,104],dev_mcu_i2c0_porscl:[28,89,104],dev_mcu_i2c1_clk:[28,75,89,104],dev_mcu_i2c1_piscl:[28,75,89,104],dev_mcu_i2c1_pisys_clk:[28,75,89,104],dev_mcu_i2c1_porscl:[28,75],dev_mcu_i3c0_i3c_pclk_clk:[75,89,104],dev_mcu_i3c0_i3c_scl_di:[75,89,104],dev_mcu_i3c0_i3c_scl_do:[75,89,104],dev_mcu_i3c0_i3c_sclk_clk:[75,89,104],dev_mcu_i3c1_i3c_pclk_clk:[75,89,104],dev_mcu_i3c1_i3c_scl_di:[89,104],dev_mcu_i3c1_i3c_scl_do:[89,104],dev_mcu_i3c1_i3c_sclk_clk:[75,89,104],dev_mcu_m4fss0_core0_dap_clk:28,dev_mcu_m4fss0_core0_vbus_clk:28,dev_mcu_m4fss0_core0_vbus_clk_parent_k3_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk2:28,dev_mcu_m4fss0_core0_vbus_clk_parent_k3_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk:28,dev_mcu_mcan0_bus_mcanss_cclk_clk:[43,58],dev_mcu_mcan0_bus_mcanss_cclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout2_clk2:[43,58],dev_mcu_mcan0_bus_mcanss_cclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout2_clk:[43,58],dev_mcu_mcan0_bus_mcanss_cclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout3_clk2:[43,58],dev_mcu_mcan0_bus_mcanss_cclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_mcan0_bus_mcanss_hclk_clk:[43,58],dev_mcu_mcan0_mcanss_cclk_clk:[75,89,104],dev_mcu_mcan0_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcu_mcan0_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcu_mcan0_mcanss_cclk_clk_parent_hsdiv4_16fft_mcu_1_hsdivout2_clk:[75,89,104],dev_mcu_mcan0_mcanss_cclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout3_clk:[75,89,104],dev_mcu_mcan0_mcanss_hclk_clk:[75,89,104],dev_mcu_mcan1_bus_mcanss_cclk_clk:[43,58],dev_mcu_mcan1_bus_mcanss_cclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout2_clk2:[43,58],dev_mcu_mcan1_bus_mcanss_cclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout2_clk:[43,58],dev_mcu_mcan1_bus_mcanss_cclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout3_clk2:[43,58],dev_mcu_mcan1_bus_mcanss_cclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_mcan1_bus_mcanss_hclk_clk:[43,58],dev_mcu_mcan1_mcanss_cclk_clk:[75,89,104],dev_mcu_mcan1_mcanss_cclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcu_mcan1_mcanss_cclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcu_mcan1_mcanss_cclk_clk_parent_hsdiv4_16fft_mcu_1_hsdivout2_clk:[75,89,104],dev_mcu_mcan1_mcanss_cclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout3_clk:[75,89,104],dev_mcu_mcan1_mcanss_hclk_clk:[75,89,104],dev_mcu_mcrc64_0_clk:28,dev_mcu_mcspi0_bus_clkspiref_clk:[43,58],dev_mcu_mcspi0_bus_io_clkspii_clk:[43,58],dev_mcu_mcspi0_bus_io_clkspio_clk:[43,58],dev_mcu_mcspi0_bus_vbusp_clk:[43,58],dev_mcu_mcspi0_clkspiref_clk:[28,75,89,104],dev_mcu_mcspi0_io_clkspii_clk:28,dev_mcu_mcspi0_io_clkspii_clk_parent_board_0_mcu_spi0_clk_out:28,dev_mcu_mcspi0_io_clkspii_clk_parent_spi_mcu_0_io_clkspio_clk:28,dev_mcu_mcspi0_io_clkspio_clk:[28,75,89,104],dev_mcu_mcspi0_vbusp_clk:[28,75,89,104],dev_mcu_mcspi1_bus_clkspiref_clk:[43,58],dev_mcu_mcspi1_bus_io_clkspii_clk:[43,58],dev_mcu_mcspi1_bus_io_clkspio_clk:[43,58],dev_mcu_mcspi1_bus_vbusp_clk:[43,58],dev_mcu_mcspi1_clkspiref_clk:[28,75,89,104],dev_mcu_mcspi1_io_clkspii_clk:[28,75,89,104],dev_mcu_mcspi1_io_clkspii_clk_parent_board_0_mcu_spi1_clk_out:28,dev_mcu_mcspi1_io_clkspii_clk_parent_spi_main_3_io_clkspio_clk:[75,89,104],dev_mcu_mcspi1_io_clkspii_clk_parent_spi_mcu_1_io_clkspio_clk:28,dev_mcu_mcspi1_io_clkspio_clk:[28,75,89,104],dev_mcu_mcspi1_vbusp_clk:[28,75,89,104],dev_mcu_mcspi2_bus_clkspiref_clk:[43,58],dev_mcu_mcspi2_bus_io_clkspii_clk:43,dev_mcu_mcspi2_bus_io_clkspio_clk:43,dev_mcu_mcspi2_bus_vbusp_clk:[43,58],dev_mcu_mcspi2_clkspiref_clk:[75,89,104],dev_mcu_mcspi2_io_clkspii_clk:[75,89,104],dev_mcu_mcspi2_io_clkspio_clk:[75,89,104],dev_mcu_mcspi2_vbusp_clk:[75,89,104],dev_mcu_mcu_gpiomux_introuter0_intr_clk:28,dev_mcu_msram0_bus_cclk_clk:[43,58],dev_mcu_msram0_bus_vclk_clk:[43,58],dev_mcu_navss0_bus_cpsw0clk:[43,58],dev_mcu_navss0_bus_modss_vd2clk:[43,58],dev_mcu_navss0_bus_pdma_mcu1clk:[43,58],dev_mcu_navss0_bus_udmass_vd2clk:58,dev_mcu_navss0_intr_0_intr_clk:[75,89,104],dev_mcu_navss0_mcrc_0_clk:[75,89,104],dev_mcu_navss0_modss_vd2clk:[75,89,104],dev_mcu_navss0_proxy0_clk_clk:[75,89,104],dev_mcu_navss0_ringacc0_sys_clk:[75,89,104],dev_mcu_navss0_udmap_0_sys_clk:[75,89,104],dev_mcu_navss0_udmass_inta_0_sys_clk:[75,89,104],dev_mcu_navss0_udmass_vd2clk:[75,89,104],dev_mcu_pbist0_bus_clk1_clk:[43,58],dev_mcu_pbist0_bus_clk2_clk:[43,58],dev_mcu_pbist0_bus_clk4_clk:[43,58],dev_mcu_pbist0_clk1_clk:75,dev_mcu_pbist0_clk2_clk:75,dev_mcu_pbist0_clk3_clk:75,dev_mcu_pbist0_clk4_clk:75,dev_mcu_pbist0_clk5_clk:75,dev_mcu_pbist0_clk6_clk:75,dev_mcu_pbist0_clk7_clk:75,dev_mcu_pbist0_clk8_clk:75,dev_mcu_pbist1_clk1_clk:75,dev_mcu_pbist1_clk2_clk:75,dev_mcu_pbist1_clk3_clk:75,dev_mcu_pbist1_clk4_clk:75,dev_mcu_pbist1_clk5_clk:75,dev_mcu_pbist1_clk6_clk:75,dev_mcu_pbist1_clk7_clk:75,dev_mcu_pbist1_clk8_clk:75,dev_mcu_pbist2_clk1_clk:75,dev_mcu_pbist2_clk2_clk:75,dev_mcu_pbist2_clk3_clk:75,dev_mcu_pbist2_clk4_clk:75,dev_mcu_pbist2_clk5_clk:75,dev_mcu_pbist2_clk6_clk:75,dev_mcu_pbist2_clk7_clk:75,dev_mcu_pbist2_clk8_clk:75,dev_mcu_pdma0_bus_vclk:[43,58],dev_mcu_pdma1_bus_vclk:[43,58],dev_mcu_pll_mmr0_bus_vbusp_clk:[43,58],dev_mcu_psc0_clk:28,dev_mcu_psc0_slow_clk:28,dev_mcu_psram0_bus_clk_clk:[43,58],dev_mcu_r5fss0_core0_cpu_clk:[75,89,104],dev_mcu_r5fss0_core0_cpu_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk3:[75,89,104],dev_mcu_r5fss0_core0_cpu_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk:[75,89,104],dev_mcu_r5fss0_core0_interface_clk:[75,89,104],dev_mcu_r5fss0_core0_interface_phas:[75,89,104],dev_mcu_r5fss0_core1_cpu_clk:[75,89,104],dev_mcu_r5fss0_core1_cpu_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk3:[75,89,104],dev_mcu_r5fss0_core1_cpu_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk:[75,89,104],dev_mcu_r5fss0_core1_interface_clk:[75,89,104],dev_mcu_r5fss0_core1_interface_phas:[75,89,104],dev_mcu_rom0_bus_clk_clk:[43,58],dev_mcu_rti0_bus_rti_clk:[43,58],dev_mcu_rti0_bus_rti_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_mcu_rti0_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_rti0_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_mcu_rti0_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_mcu_rti0_bus_vbusp_clk:[43,58],dev_mcu_rti0_rti_clk:[28,75,89,104],dev_mcu_rti0_rti_clk_parent_board_0_wkup_lf_clkin_out:75,dev_mcu_rti0_rti_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_mcu_rti0_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_mcu_rti0_rti_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_mcu_rti0_rti_clk_parent_gluelogic_rcosc_clkout:28,dev_mcu_rti0_rti_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_mcu_rti0_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_mcu_rti0_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_mcu_rti0_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_mcu_rti0_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_mcu_rti0_vbusp_clk:[28,75,89,104],dev_mcu_rti1_bus_rti_clk:[43,58],dev_mcu_rti1_bus_rti_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_mcu_rti1_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_rti1_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_mcu_rti1_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_mcu_rti1_bus_vbusp_clk:[43,58],dev_mcu_rti1_rti_clk:[75,89,104],dev_mcu_rti1_rti_clk_parent_board_0_wkup_lf_clkin_out:75,dev_mcu_rti1_rti_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcu_rti1_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_mcu_rti1_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_mcu_rti1_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_mcu_rti1_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_mcu_rti1_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_mcu_rti1_vbusp_clk:[75,89,104],dev_mcu_sa2_ul0_pka_in_clk:[75,89,104],dev_mcu_sa2_ul0_x1_clk:[75,89,104],dev_mcu_sa2_ul0_x2_clk:[75,89,104],dev_mcu_sec_mmr0_bus_vbusp_clk:[43,58],dev_mcu_timer0_bus_timer_hclk_clk:[43,58],dev_mcu_timer0_bus_timer_tclk_clk:[43,58],dev_mcu_timer0_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk:[43,58],dev_mcu_timer0_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcu_timer0_bus_timer_tclk_clk_parent_cpsw_2guss_mcu_0_bus_cpts_genf0_0:58,dev_mcu_timer0_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_mcu_timer0_bus_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk2:[43,58],dev_mcu_timer0_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_timer0_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_mcu_timer0_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_mcu_timer0_timer_hclk_clk:[28,75,89,104],dev_mcu_timer0_timer_pwm:[28,75,89,104],dev_mcu_timer0_timer_tclk_clk:[28,75,89,104],dev_mcu_timer0_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_mcu_timer0_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_mcu_timer0_timer_tclk_clk_parent_cpsw_2guss_mcu_0_cpts_genf0:[75,89,104],dev_mcu_timer0_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_mcu_timer0_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_mcu_timer0_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_mcu_timer0_timer_tclk_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_mcu_timer0_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_mcu_timer0_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_mcu_timer0_timer_tclk_clk_parent_hsdiv4_16fft_mcu_0_hsdivout3_clk:28,dev_mcu_timer0_timer_tclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout2_clk:[75,89,104],dev_mcu_timer0_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_mcu_timer0_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_mcu_timer0_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_mcu_timer0_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_mcu_timer0_timer_tclk_clk_parent_k3_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk4:28,dev_mcu_timer0_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk16:75,dev_mcu_timer0_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6:[89,104],dev_mcu_timer1_bus_timer_hclk_clk:[43,58],dev_mcu_timer1_bus_timer_tclk_clk:[43,58],dev_mcu_timer1_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk:[43,58],dev_mcu_timer1_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcu_timer1_bus_timer_tclk_clk_parent_cpsw_2guss_mcu_0_bus_cpts_genf0_0:58,dev_mcu_timer1_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_mcu_timer1_bus_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk2:[43,58],dev_mcu_timer1_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_timer1_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_mcu_timer1_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_mcu_timer1_timer_hclk_clk:[28,75,89,104],dev_mcu_timer1_timer_pwm:28,dev_mcu_timer1_timer_tclk_clk:[28,75,89,104],dev_mcu_timer1_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_mcu_timer1_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_mcu_timer1_timer_tclk_clk_parent_dmtimer_dmc1ms_mcu_0_timer_pwm:[75,89,104],dev_mcu_timer1_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:28,dev_mcu_timer1_timer_tclk_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_mcu_timer1_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_mcu_timer1_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_mcu_timer1_timer_tclk_clk_parent_hsdiv4_16fft_mcu_0_hsdivout3_clk:28,dev_mcu_timer1_timer_tclk_clk_parent_k3_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk4:28,dev_mcu_timer1_timer_tclk_clk_parent_mcu_timer_clksel_out1:[75,89,104],dev_mcu_timer2_bus_timer_hclk_clk:[43,58],dev_mcu_timer2_bus_timer_tclk_clk:[43,58],dev_mcu_timer2_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk:[43,58],dev_mcu_timer2_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcu_timer2_bus_timer_tclk_clk_parent_cpsw_2guss_mcu_0_bus_cpts_genf0_0:58,dev_mcu_timer2_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_mcu_timer2_bus_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk2:[43,58],dev_mcu_timer2_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_timer2_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_mcu_timer2_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_mcu_timer2_timer_hclk_clk:[28,75,89,104],dev_mcu_timer2_timer_pwm:[28,75,89,104],dev_mcu_timer2_timer_tclk_clk:[28,75,89,104],dev_mcu_timer2_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_mcu_timer2_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_mcu_timer2_timer_tclk_clk_parent_cpsw_2guss_mcu_0_cpts_genf0:[75,89,104],dev_mcu_timer2_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_mcu_timer2_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_mcu_timer2_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_mcu_timer2_timer_tclk_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_mcu_timer2_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_mcu_timer2_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_mcu_timer2_timer_tclk_clk_parent_hsdiv4_16fft_mcu_0_hsdivout3_clk:28,dev_mcu_timer2_timer_tclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout2_clk:[75,89,104],dev_mcu_timer2_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_mcu_timer2_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_mcu_timer2_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_mcu_timer2_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_mcu_timer2_timer_tclk_clk_parent_k3_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk4:28,dev_mcu_timer2_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk16:75,dev_mcu_timer2_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6:[89,104],dev_mcu_timer3_bus_timer_hclk_clk:[43,58],dev_mcu_timer3_bus_timer_tclk_clk:[43,58],dev_mcu_timer3_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_clkout_clk:[43,58],dev_mcu_timer3_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_mcu_timer3_bus_timer_tclk_clk_parent_cpsw_2guss_mcu_0_bus_cpts_genf0_0:58,dev_mcu_timer3_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_mcu_timer3_bus_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk2:[43,58],dev_mcu_timer3_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_mcu_timer3_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_mcu_timer3_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_mcu_timer3_timer_hclk_clk:[28,75,89,104],dev_mcu_timer3_timer_pwm:28,dev_mcu_timer3_timer_tclk_clk:[28,75,89,104],dev_mcu_timer3_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_mcu_timer3_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_mcu_timer3_timer_tclk_clk_parent_dmtimer_dmc1ms_mcu_2_timer_pwm:[75,89,104],dev_mcu_timer3_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:28,dev_mcu_timer3_timer_tclk_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_mcu_timer3_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_mcu_timer3_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_mcu_timer3_timer_tclk_clk_parent_hsdiv4_16fft_mcu_0_hsdivout3_clk:28,dev_mcu_timer3_timer_tclk_clk_parent_k3_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk4:28,dev_mcu_timer3_timer_tclk_clk_parent_mcu_timer_clksel_out3:[75,89,104],dev_mcu_timer4_timer_hclk_clk:[75,89,104],dev_mcu_timer4_timer_pwm:[75,89,104],dev_mcu_timer4_timer_tclk_clk:[75,89,104],dev_mcu_timer4_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcu_timer4_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_mcu_timer4_timer_tclk_clk_parent_cpsw_2guss_mcu_0_cpts_genf0:[75,89,104],dev_mcu_timer4_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcu_timer4_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_mcu_timer4_timer_tclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout2_clk:[75,89,104],dev_mcu_timer4_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_mcu_timer4_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_mcu_timer4_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_mcu_timer4_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_mcu_timer4_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk16:75,dev_mcu_timer4_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6:[89,104],dev_mcu_timer5_timer_hclk_clk:[75,89,104],dev_mcu_timer5_timer_tclk_clk:[75,89,104],dev_mcu_timer5_timer_tclk_clk_parent_dmtimer_dmc1ms_mcu_4_timer_pwm:[75,89,104],dev_mcu_timer5_timer_tclk_clk_parent_mcu_timer_clksel_out5:[75,89,104],dev_mcu_timer6_timer_hclk_clk:[75,89,104],dev_mcu_timer6_timer_pwm:[75,89,104],dev_mcu_timer6_timer_tclk_clk:[75,89,104],dev_mcu_timer6_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcu_timer6_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_mcu_timer6_timer_tclk_clk_parent_cpsw_2guss_mcu_0_cpts_genf0:[75,89,104],dev_mcu_timer6_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcu_timer6_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_mcu_timer6_timer_tclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout2_clk:[75,89,104],dev_mcu_timer6_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_mcu_timer6_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_mcu_timer6_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_mcu_timer6_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_mcu_timer6_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk16:75,dev_mcu_timer6_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6:[89,104],dev_mcu_timer7_timer_hclk_clk:[75,89,104],dev_mcu_timer7_timer_tclk_clk:[75,89,104],dev_mcu_timer7_timer_tclk_clk_parent_dmtimer_dmc1ms_mcu_6_timer_pwm:[75,89,104],dev_mcu_timer7_timer_tclk_clk_parent_mcu_timer_clksel_out7:[75,89,104],dev_mcu_timer8_timer_hclk_clk:[75,89,104],dev_mcu_timer8_timer_pwm:[75,89,104],dev_mcu_timer8_timer_tclk_clk:[75,89,104],dev_mcu_timer8_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_mcu_timer8_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_mcu_timer8_timer_tclk_clk_parent_cpsw_2guss_mcu_0_cpts_genf0:[75,89,104],dev_mcu_timer8_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_mcu_timer8_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_mcu_timer8_timer_tclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout2_clk:[75,89,104],dev_mcu_timer8_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_mcu_timer8_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_mcu_timer8_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_mcu_timer8_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_mcu_timer8_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk16:75,dev_mcu_timer8_timer_tclk_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6:[89,104],dev_mcu_timer9_timer_hclk_clk:[75,89,104],dev_mcu_timer9_timer_tclk_clk:[75,89,104],dev_mcu_timer9_timer_tclk_clk_parent_dmtimer_dmc1ms_mcu_8_timer_pwm:[75,89,104],dev_mcu_timer9_timer_tclk_clk_parent_mcu_timer_clksel_out9:[75,89,104],dev_mcu_uart0_bus_fclk_clk:[43,58],dev_mcu_uart0_bus_fclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_mcu_uart0_bus_fclk_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout3_clk:[43,58],dev_mcu_uart0_bus_vbusp_clk:[43,58],dev_mcu_uart0_fclk_clk:[28,75,89,104],dev_mcu_uart0_fclk_clk_parent_hsdiv4_16fft_mcu_1_hsdivout3_clk:[75,89,104],dev_mcu_uart0_fclk_clk_parent_postdiv2_16fft_main_1_hsdivout5_clk:75,dev_mcu_uart0_fclk_clk_parent_postdiv3_16fft_main_1_hsdivout5_clk:[89,104],dev_mcu_uart0_vbusp_clk:[28,75,89,104],dev_mcu_uart1_fclk_clk:28,dev_mcu_uart1_vbusp_clk:28,dev_mlb0_mlbss_amlb_clk:[89,104],dev_mlb0_mlbss_hclk_clk:[89,104],dev_mlb0_mlbss_mlb_clk:[89,104],dev_mlb0_mlbss_pclk_clk:[89,104],dev_mlb0_mlbss_sclk_clk:[89,104],dev_mmcsd0_bus_emmcsdss_vbus_clk:[43,58],dev_mmcsd0_bus_emmcsdss_xin_clk:[43,58],dev_mmcsd0_emmcss_io_clk:[89,104],dev_mmcsd0_emmcss_vbus_clk:[28,75,89,104],dev_mmcsd0_emmcss_xin_clk:[28,75,89,104],dev_mmcsd0_emmcss_xin_clk_parent_hsdiv4_16fft_main_0_hsdivout2_clk:[75,89,104],dev_mmcsd0_emmcss_xin_clk_parent_hsdiv4_16fft_main_1_hsdivout2_clk:[75,89,104],dev_mmcsd0_emmcss_xin_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[28,89,104],dev_mmcsd0_emmcss_xin_clk_parent_hsdiv4_16fft_main_3_hsdivout2_clk:[75,89,104],dev_mmcsd0_emmcss_xin_clk_parent_hsdiv4_16fft_main_3_hsdivout2_clk_dup0:75,dev_mmcsd0_emmcss_xin_clk_parent_postdiv4_16ff_main_0_hsdivout5_clk:28,dev_mmcsd1_bus_emmcsdss_vbus_clk:[43,58],dev_mmcsd1_bus_emmcsdss_xin_clk:[43,58],dev_mmcsd1_emmcsdss_io_clk_i:[28,75,89,104],dev_mmcsd1_emmcsdss_io_clk_i_parent_board_0_mmc1_clklb_out:28,dev_mmcsd1_emmcsdss_io_clk_i_parent_emmcsd4ss_main_0_emmcsdss_io_clk_o:28,dev_mmcsd1_emmcsdss_io_clk_o:[28,75,89,104],dev_mmcsd1_emmcsdss_vbus_clk:[28,75,89,104],dev_mmcsd1_emmcsdss_xin_clk:[28,75,89,104],dev_mmcsd1_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_0_hsdivout2_clk:[75,89,104],dev_mmcsd1_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_1_hsdivout2_clk:[75,89,104],dev_mmcsd1_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[28,89,104],dev_mmcsd1_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_3_hsdivout2_clk:[75,89,104],dev_mmcsd1_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_3_hsdivout2_clk_dup0:75,dev_mmcsd1_emmcsdss_xin_clk_parent_postdiv4_16ff_main_0_hsdivout5_clk:28,dev_mmcsd2_emmcsdss_io_clk_i:[89,104],dev_mmcsd2_emmcsdss_io_clk_o:[89,104],dev_mmcsd2_emmcsdss_vbus_clk:[89,104],dev_mmcsd2_emmcsdss_xin_clk:[89,104],dev_mmcsd2_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_0_hsdivout2_clk:[89,104],dev_mmcsd2_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_1_hsdivout2_clk:[89,104],dev_mmcsd2_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_2_hsdivout2_clk:[89,104],dev_mmcsd2_emmcsdss_xin_clk_parent_hsdiv4_16fft_main_3_hsdivout2_clk:[89,104],dev_msram_256k0_cclk_clk:28,dev_msram_256k0_vclk_clk:28,dev_msram_256k1_cclk_clk:28,dev_msram_256k1_vclk_clk:28,dev_msram_256k2_cclk_clk:28,dev_msram_256k2_vclk_clk:28,dev_msram_256k3_cclk_clk:28,dev_msram_256k3_vclk_clk:28,dev_msram_256k4_cclk_clk:28,dev_msram_256k4_vclk_clk:28,dev_msram_256k5_cclk_clk:28,dev_msram_256k5_vclk_clk:28,dev_mx_efuse_main_chain_main_0_bus_undefinedchain0_fclk:58,dev_mx_efuse_main_chain_main_0_bus_undefinedchain1_fclk:58,dev_mx_efuse_mcu_chain_mcu_0_bus_undefinedchain0_fclk:58,dev_mx_efuse_mcu_chain_mcu_0_bus_undefinedchain1_fclk:58,dev_mx_efuse_mcu_chain_mcu_0_bus_undefinedchain2_fclk:58,dev_navss0_bus_cpts0_genf2_0:58,dev_navss0_bus_cpts0_genf3_0:58,dev_navss0_bus_cpts0_genf4_0:58,dev_navss0_bus_cpts0_genf5_0:58,dev_navss0_bus_icss_g0clk:[43,58],dev_navss0_bus_icss_g1clk:[43,58],dev_navss0_bus_icss_g2clk:[43,58],dev_navss0_bus_modss_vd2clk:58,dev_navss0_bus_msmc0clk:[43,58],dev_navss0_bus_nbss_vclk:[43,58],dev_navss0_bus_nbss_vd2clk:[43,58],dev_navss0_bus_pdma_main1clk:[43,58],dev_navss0_bus_rclk_bus_in0_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_navss0_bus_rclk_bus_in1_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_navss0_bus_rclk_bus_in2_board_0_bus_mcu_cpts_rft_clk_out:[43,58],dev_navss0_bus_rclk_bus_in3_board_0_bus_cpts_rft_clk_out:[43,58],dev_navss0_bus_rclk_bus_in4_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_navss0_bus_rclk_bus_in5_board_0_bus_ext_refclk1_out:[43,58],dev_navss0_bus_udmass_vd2clk:58,dev_navss0_cpts0_genf2:[75,89,104],dev_navss0_cpts0_genf3:[75,89,104],dev_navss0_cpts0_genf4:75,dev_navss0_cpts_0_rclk:[75,89,104],dev_navss0_cpts_0_rclk_parent_board_0_cpts0_rft_clk_out:[75,89,104],dev_navss0_cpts_0_rclk_parent_board_0_ext_refclk1_out:[75,89,104],dev_navss0_cpts_0_rclk_parent_board_0_mcu_cpts0_rft_clk_out:[75,89,104],dev_navss0_cpts_0_rclk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_navss0_cpts_0_rclk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[75,89,104],dev_navss0_cpts_0_rclk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[75,89,104],dev_navss0_cpts_0_rclk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[75,89,104],dev_navss0_cpts_0_rclk_parent_postdiv2_16fft_main_0_hsdivout6_clk:75,dev_navss0_cpts_0_rclk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b4m4cs_main_3_ip2_ln0_txmclk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b4m4cs_main_3_ip2_ln1_txmclk:[89,104],dev_navss0_cpts_0_rclk_parent_wiz16b8m4ct2_main_1_ip2_ln0_txmclk:75,dev_navss0_cpts_0_rclk_parent_wiz16b8m4ct2_main_1_ip2_ln1_txmclk:75,dev_navss0_cpts_0_rclk_parent_wiz16b8m4ct2_main_1_ip2_ln2_txmclk:75,dev_navss0_cpts_0_rclk_parent_wiz16b8m4ct2_main_1_ip2_ln3_txmclk:75,dev_navss0_cpts_0_ts_genf0:[75,89,104],dev_navss0_cpts_0_ts_genf1:[75,89,104],dev_navss0_cpts_0_vbusp_gclk:[75,89,104],dev_navss0_dti_0_clk_clk:[75,89,104],dev_navss0_dti_0_ext0_dti_clk_clk:[89,104],dev_navss0_dti_0_ext1_dti_clk_clk:[89,104],dev_navss0_dti_0_ext2_dti_clk_clk:[89,104],dev_navss0_dti_0_ext3_dti_clk_clk:[89,104],dev_navss0_intr_router_0_intr_clk:[75,89,104],dev_navss0_mailbox_0_vclk_clk:[75,89,104],dev_navss0_mailbox_10_vclk_clk:[75,89,104],dev_navss0_mailbox_11_vclk_clk:[75,89,104],dev_navss0_mailbox_1_vclk_clk:[75,89,104],dev_navss0_mailbox_2_vclk_clk:[75,89,104],dev_navss0_mailbox_3_vclk_clk:[75,89,104],dev_navss0_mailbox_4_vclk_clk:[75,89,104],dev_navss0_mailbox_5_vclk_clk:[75,89,104],dev_navss0_mailbox_6_vclk_clk:[75,89,104],dev_navss0_mailbox_7_vclk_clk:[75,89,104],dev_navss0_mailbox_8_vclk_clk:[75,89,104],dev_navss0_mailbox_9_vclk_clk:[75,89,104],dev_navss0_mcrc_0_clk:[75,89,104],dev_navss0_modss_inta_0_sys_clk:75,dev_navss0_modss_inta_1_sys_clk:75,dev_navss0_modss_intaggr_0_sys_clk:[89,104],dev_navss0_modss_intaggr_1_sys_clk:[89,104],dev_navss0_modss_vd2clk:[75,89,104],dev_navss0_proxy_0_clk_clk:[75,89,104],dev_navss0_ringacc_0_sys_clk:[75,89,104],dev_navss0_spinlock_0_clk:[75,89,104],dev_navss0_tbu_0_clk_clk:[75,89,104],dev_navss0_tcu_0_clk_clk:[89,104],dev_navss0_timermgr_0_eon_tick_evt:[75,89,104],dev_navss0_timermgr_0_vclk_clk:[75,89,104],dev_navss0_timermgr_1_eon_tick_evt:[75,89,104],dev_navss0_timermgr_1_vclk_clk:[75,89,104],dev_navss0_udmap_0_sys_clk:[75,89,104],dev_navss0_udmass_inta_0_sys_clk:75,dev_navss0_udmass_intaggr_0_sys_clk:[89,104],dev_navss0_udmass_vd2clk:[75,89,104],dev_navss0_virtss_vd2clk:[75,89,104],dev_oldi_tx_core_main_0_bus_oldi_0_fwd_p_clk_bus_in0_clockdivider_dss_bus_out0:58,dev_oldi_tx_core_main_0_bus_oldi_0_fwd_p_clk_bus_in0_dss_bus_out0:43,dev_oldi_tx_core_main_0_bus_oldi_0_fwd_p_clk_bus_in1_clockdivider_dss_bus_out0:58,dev_oldi_tx_core_main_0_bus_oldi_0_fwd_p_clk_bus_in1_dss_bus_out0:43,dev_oldi_tx_core_main_0_bus_oldi_pll_clk:[43,58],dev_pbist0_bus_clk1_clk:[43,58],dev_pbist0_bus_clk2_clk:[43,58],dev_pbist0_bus_clk4_clk:[43,58],dev_pbist0_clk1_clk:75,dev_pbist0_clk2_clk:75,dev_pbist0_clk3_clk:75,dev_pbist0_clk4_clk:75,dev_pbist0_clk5_clk:75,dev_pbist0_clk6_clk:75,dev_pbist0_clk7_clk:75,dev_pbist0_clk8_clk:[28,75],dev_pbist1_bus_clk1_clk:[43,58],dev_pbist1_bus_clk2_clk:[43,58],dev_pbist1_bus_clk4_clk:[43,58],dev_pbist1_clk1_clk:75,dev_pbist1_clk2_clk:75,dev_pbist1_clk3_clk:75,dev_pbist1_clk4_clk:75,dev_pbist1_clk5_clk:75,dev_pbist1_clk6_clk:75,dev_pbist1_clk7_clk:75,dev_pbist1_clk8_clk:[28,75],dev_pbist2_clk1_clk:75,dev_pbist2_clk2_clk:75,dev_pbist2_clk3_clk:75,dev_pbist2_clk4_clk:75,dev_pbist2_clk5_clk:75,dev_pbist2_clk6_clk:75,dev_pbist2_clk7_clk:75,dev_pbist2_clk8_clk:[28,75],dev_pbist3_clk8_clk:28,dev_pcie0_bus_pcie_cba_clk:[43,58],dev_pcie0_bus_pcie_cpts_rclk_clk_bus_in0_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_pcie0_bus_pcie_cpts_rclk_clk_bus_in1_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_pcie0_bus_pcie_cpts_rclk_clk_bus_in2_board_0_bus_mcu_cpts_rft_clk_out:[43,58],dev_pcie0_bus_pcie_cpts_rclk_clk_bus_in3_board_0_bus_cpts_rft_clk_out:[43,58],dev_pcie0_bus_pcie_cpts_rclk_clk_bus_in4_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_pcie0_bus_pcie_cpts_rclk_clk_bus_in5_board_0_bus_ext_refclk1_out:[43,58],dev_pcie0_bus_pcie_txi0_clk:[43,58],dev_pcie0_bus_pcie_txr0_clk:[43,58],dev_pcie0_bus_pcie_txr1_clk:[43,58],dev_pcie0_pcie_cba_clk:[28,89,104],dev_pcie0_pcie_cpts_rclk_clk:[28,89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_pcie0_pcie_cpts_rclk_clk_parent_board_0_cpts0_rft_clk_out:[28,89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_board_0_ext_refclk1_out:[28,89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_board_0_mcu_cpts0_rft_clk_out:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[28,89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_postdiv4_16ff_main_0_hsdivout6_clk:28,dev_pcie0_pcie_cpts_rclk_clk_parent_postdiv4_16ff_main_2_hsdivout5_clk:28,dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b2m4ct_main_0_ip1_ln0_txmclk:28,dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk_dup0:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_pcie0_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk_dup0:[89,104],dev_pcie0_pcie_lane0_refclk:[28,89,104],dev_pcie0_pcie_lane0_rxclk:[28,89,104],dev_pcie0_pcie_lane0_rxfclk:[28,89,104],dev_pcie0_pcie_lane0_txclk:[28,89,104],dev_pcie0_pcie_lane0_txfclk:[28,89,104],dev_pcie0_pcie_lane0_txmclk:[28,89,104],dev_pcie0_pcie_lane1_refclk:[89,104],dev_pcie0_pcie_lane1_rxclk:[89,104],dev_pcie0_pcie_lane1_rxfclk:[89,104],dev_pcie0_pcie_lane1_txclk:[89,104],dev_pcie0_pcie_lane1_txfclk:[89,104],dev_pcie0_pcie_lane1_txmclk:[89,104],dev_pcie0_pcie_pm_clk:[28,89,104],dev_pcie1_bus_pcie_cba_clk:[43,58],dev_pcie1_bus_pcie_cpts_rclk_clk_bus_in0_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_pcie1_bus_pcie_cpts_rclk_clk_bus_in1_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_pcie1_bus_pcie_cpts_rclk_clk_bus_in2_board_0_bus_mcu_cpts_rft_clk_out:[43,58],dev_pcie1_bus_pcie_cpts_rclk_clk_bus_in3_board_0_bus_cpts_rft_clk_out:[43,58],dev_pcie1_bus_pcie_cpts_rclk_clk_bus_in4_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_pcie1_bus_pcie_cpts_rclk_clk_bus_in5_board_0_bus_ext_refclk1_out:[43,58],dev_pcie1_bus_pcie_txi0_clk:[43,58],dev_pcie1_bus_pcie_txr0_clk:[43,58],dev_pcie1_pcie_cba_clk:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_board_0_cpts0_rft_clk_out:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_board_0_ext_refclk1_out:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_board_0_mcu_cpts0_rft_clk_out:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[75,89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_postdiv2_16fft_main_0_hsdivout6_clk:75,dev_pcie1_pcie_cpts_rclk_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk_dup0:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk_dup0:[89,104],dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b8m4ct2_main_1_ip2_ln0_txmclk:75,dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b8m4ct2_main_1_ip2_ln1_txmclk:75,dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b8m4ct2_main_1_ip2_ln2_txmclk:75,dev_pcie1_pcie_cpts_rclk_clk_parent_wiz16b8m4ct2_main_1_ip2_ln3_txmclk:75,dev_pcie1_pcie_lane0_refclk:[75,89,104],dev_pcie1_pcie_lane0_rxclk:[75,89,104],dev_pcie1_pcie_lane0_rxfclk:[75,89,104],dev_pcie1_pcie_lane0_txclk:[75,89,104],dev_pcie1_pcie_lane0_txfclk:[75,89,104],dev_pcie1_pcie_lane0_txmclk:[75,89,104],dev_pcie1_pcie_lane1_refclk:[75,89,104],dev_pcie1_pcie_lane1_rxclk:[75,89,104],dev_pcie1_pcie_lane1_rxfclk:[75,89,104],dev_pcie1_pcie_lane1_txclk:[75,89,104],dev_pcie1_pcie_lane1_txfclk:[75,89,104],dev_pcie1_pcie_lane1_txmclk:[75,89,104],dev_pcie1_pcie_lane2_refclk:75,dev_pcie1_pcie_lane2_rxclk:75,dev_pcie1_pcie_lane2_rxfclk:75,dev_pcie1_pcie_lane2_txclk:75,dev_pcie1_pcie_lane2_txfclk:75,dev_pcie1_pcie_lane2_txmclk:75,dev_pcie1_pcie_lane3_refclk:75,dev_pcie1_pcie_lane3_rxclk:75,dev_pcie1_pcie_lane3_rxfclk:75,dev_pcie1_pcie_lane3_txclk:75,dev_pcie1_pcie_lane3_txfclk:75,dev_pcie1_pcie_lane3_txmclk:75,dev_pcie1_pcie_pm_clk:[75,89,104],dev_pcie2_pcie_cba_clk:[89,104],dev_pcie2_pcie_cpts_rclk_clk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_board_0_cpts0_rft_clk_out:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_board_0_ext_refclk1_out:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_board_0_mcu_cpts0_rft_clk_out:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk_dup0:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_pcie2_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk_dup0:[89,104],dev_pcie2_pcie_lane0_refclk:[89,104],dev_pcie2_pcie_lane0_rxclk:[89,104],dev_pcie2_pcie_lane0_rxfclk:[89,104],dev_pcie2_pcie_lane0_txclk:[89,104],dev_pcie2_pcie_lane0_txfclk:[89,104],dev_pcie2_pcie_lane0_txmclk:[89,104],dev_pcie2_pcie_lane1_refclk:[89,104],dev_pcie2_pcie_lane1_rxclk:[89,104],dev_pcie2_pcie_lane1_rxfclk:[89,104],dev_pcie2_pcie_lane1_txclk:[89,104],dev_pcie2_pcie_lane1_txfclk:[89,104],dev_pcie2_pcie_lane1_txmclk:[89,104],dev_pcie2_pcie_pm_clk:[89,104],dev_pcie3_pcie_cba_clk:[89,104],dev_pcie3_pcie_cpts_rclk_clk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_board_0_cpts0_rft_clk_out:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_board_0_ext_refclk1_out:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_board_0_mcu_cpts0_rft_clk_out:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_board_0_mcu_ext_refclk0_out:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk_dup0:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_pcie3_pcie_cpts_rclk_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk_dup0:[89,104],dev_pcie3_pcie_lane0_refclk:[89,104],dev_pcie3_pcie_lane0_rxclk:[89,104],dev_pcie3_pcie_lane0_rxfclk:[89,104],dev_pcie3_pcie_lane0_txclk:[89,104],dev_pcie3_pcie_lane0_txfclk:[89,104],dev_pcie3_pcie_lane0_txmclk:[89,104],dev_pcie3_pcie_lane1_refclk:[89,104],dev_pcie3_pcie_lane1_rxclk:[89,104],dev_pcie3_pcie_lane1_rxfclk:[89,104],dev_pcie3_pcie_lane1_txclk:[89,104],dev_pcie3_pcie_lane1_txfclk:[89,104],dev_pcie3_pcie_lane1_txmclk:[89,104],dev_pcie3_pcie_pm_clk:[89,104],dev_pdma0_bus_vclk:[43,58],dev_pdma1_bus_vclk:[43,58],dev_pdma_debug0_bus_vclk:[43,58],dev_pll_mmr0_bus_vbusp_clk:[43,58],dev_pllctrl0_bus_pll_clkout_clk:[43,58],dev_pllctrl0_bus_pll_refclk_clk:[43,58],dev_pllctrl0_bus_pll_refclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_pllctrl0_bus_pll_refclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_pllctrl0_bus_vbus_slv_refclk_clk:[43,58],dev_postdiv1_16fft1_fref_clk:28,dev_postdiv1_16fft1_hsdivout5_clk:28,dev_postdiv1_16fft1_hsdivout6_clk:28,dev_postdiv1_16fft1_postdiv_clkin_clk:28,dev_postdiv4_16ff0_fref_clk:28,dev_postdiv4_16ff0_hsdivout5_clk:28,dev_postdiv4_16ff0_hsdivout6_clk:28,dev_postdiv4_16ff0_hsdivout7_clk:28,dev_postdiv4_16ff0_hsdivout8_clk:28,dev_postdiv4_16ff0_hsdivout9_clk:28,dev_postdiv4_16ff0_postdiv_clkin_clk:28,dev_postdiv4_16ff2_fref_clk:28,dev_postdiv4_16ff2_hsdivout5_clk:28,dev_postdiv4_16ff2_hsdivout6_clk:28,dev_postdiv4_16ff2_hsdivout7_clk:28,dev_postdiv4_16ff2_hsdivout8_clk:28,dev_postdiv4_16ff2_hsdivout9_clk:28,dev_postdiv4_16ff2_postdiv_clkin_clk:28,dev_pru_icssg0_bus_core_clk:[43,58],dev_pru_icssg0_bus_core_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout1_clk:[43,58],dev_pru_icssg0_bus_core_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_pru_icssg0_bus_iep_clk:[43,58],dev_pru_icssg0_bus_iep_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_pru_icssg0_bus_iep_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_pru_icssg0_bus_iep_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_pru_icssg0_bus_iep_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_pru_icssg0_bus_iep_clk_parent_board_0_bus_mcu_cpts_rft_clk_out:[43,58],dev_pru_icssg0_bus_iep_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_pru_icssg0_bus_iep_clk_parent_wiz8b2m4vsb_main_0_bus_ln0_txclk:[43,58],dev_pru_icssg0_bus_iep_clk_parent_wiz8b2m4vsb_main_1_bus_ln0_txclk:[43,58],dev_pru_icssg0_bus_pr1_rgmii0_rxc_i:58,dev_pru_icssg0_bus_pr1_rgmii0_txc_i:58,dev_pru_icssg0_bus_pr1_rgmii1_rxc_i:58,dev_pru_icssg0_bus_pr1_rgmii1_txc_i:58,dev_pru_icssg0_bus_rgmii_mhz_250_clk:[43,58],dev_pru_icssg0_bus_rgmii_mhz_50_clk:[43,58],dev_pru_icssg0_bus_rgmii_mhz_5_clk:[43,58],dev_pru_icssg0_bus_uclk_clk:[43,58],dev_pru_icssg0_bus_vclk_clk:[43,58],dev_pru_icssg0_bus_wiz0_rx_slv_clk:[43,58],dev_pru_icssg0_bus_wiz0_tx_slv_clk:[43,58],dev_pru_icssg0_bus_wiz1_rx_slv_clk:[43,58],dev_pru_icssg0_bus_wiz1_tx_slv_clk:[43,58],dev_pru_icssg0_core_clk:[28,89,104],dev_pru_icssg0_core_clk_parent_hsdiv4_16fft_main_2_hsdivout0_clk:[28,89,104],dev_pru_icssg0_core_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[89,104],dev_pru_icssg0_core_clk_parent_postdiv4_16ff_main_0_hsdivout9_clk:28,dev_pru_icssg0_iep_clk:[28,89,104],dev_pru_icssg0_iep_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_pru_icssg0_iep_clk_parent_board_0_cpts0_rft_clk_out:[28,89,104],dev_pru_icssg0_iep_clk_parent_board_0_ext_refclk1_out:[28,89,104],dev_pru_icssg0_iep_clk_parent_board_0_mcu_cpts0_rft_clk_out:[89,104],dev_pru_icssg0_iep_clk_parent_board_0_mcu_ext_refclk0_out:[28,89,104],dev_pru_icssg0_iep_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[89,104],dev_pru_icssg0_iep_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[89,104],dev_pru_icssg0_iep_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[28,89,104],dev_pru_icssg0_iep_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_pru_icssg0_iep_clk_parent_postdiv4_16ff_main_0_hsdivout6_clk:28,dev_pru_icssg0_iep_clk_parent_postdiv4_16ff_main_2_hsdivout5_clk:28,dev_pru_icssg0_iep_clk_parent_wiz16b2m4ct_main_0_ip1_ln0_txmclk:28,dev_pru_icssg0_iep_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_pru_icssg0_iep_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_pru_icssg0_iep_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_pru_icssg0_iep_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_pru_icssg0_iep_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_pru_icssg0_iep_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_pru_icssg0_iep_clk_parent_wiz16b4m4cs_main_3_ip2_ln0_txmclk:[89,104],dev_pru_icssg0_iep_clk_parent_wiz16b4m4cs_main_3_ip2_ln1_txmclk:[89,104],dev_pru_icssg0_pr1_mdio_mdclk_o:[28,89,104],dev_pru_icssg0_pr1_rgmii0_rxc_i:[28,89,104],dev_pru_icssg0_pr1_rgmii0_txc_i:[28,89,104],dev_pru_icssg0_pr1_rgmii0_txc_o:[28,89,104],dev_pru_icssg0_pr1_rgmii1_rxc_i:[28,89,104],dev_pru_icssg0_pr1_rgmii1_txc_i:[28,89,104],dev_pru_icssg0_pr1_rgmii1_txc_o:[28,89,104],dev_pru_icssg0_rgmii_mhz_250_clk:[28,89,104],dev_pru_icssg0_rgmii_mhz_50_clk:[28,89,104],dev_pru_icssg0_rgmii_mhz_5_clk:[28,89,104],dev_pru_icssg0_uclk_clk:[28,89,104],dev_pru_icssg0_vclk_clk:[28,89,104],dev_pru_icssg1_bus_core_clk:[43,58],dev_pru_icssg1_bus_core_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout1_clk:[43,58],dev_pru_icssg1_bus_core_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_pru_icssg1_bus_iep_clk:[43,58],dev_pru_icssg1_bus_iep_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_pru_icssg1_bus_iep_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_pru_icssg1_bus_iep_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_pru_icssg1_bus_iep_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_pru_icssg1_bus_iep_clk_parent_board_0_bus_mcu_cpts_rft_clk_out:[43,58],dev_pru_icssg1_bus_iep_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_pru_icssg1_bus_iep_clk_parent_wiz8b2m4vsb_main_0_bus_ln0_txclk:[43,58],dev_pru_icssg1_bus_iep_clk_parent_wiz8b2m4vsb_main_1_bus_ln0_txclk:[43,58],dev_pru_icssg1_bus_pr1_rgmii0_rxc_i:58,dev_pru_icssg1_bus_pr1_rgmii0_txc_i:58,dev_pru_icssg1_bus_pr1_rgmii1_rxc_i:58,dev_pru_icssg1_bus_pr1_rgmii1_txc_i:58,dev_pru_icssg1_bus_rgmii_mhz_250_clk:[43,58],dev_pru_icssg1_bus_rgmii_mhz_50_clk:[43,58],dev_pru_icssg1_bus_rgmii_mhz_5_clk:[43,58],dev_pru_icssg1_bus_uclk_clk:[43,58],dev_pru_icssg1_bus_vclk_clk:[43,58],dev_pru_icssg1_bus_wiz0_rx_slv_clk:[43,58],dev_pru_icssg1_bus_wiz0_tx_slv_clk:[43,58],dev_pru_icssg1_bus_wiz1_rx_slv_clk:[43,58],dev_pru_icssg1_bus_wiz1_tx_slv_clk:[43,58],dev_pru_icssg1_core_clk:[28,89,104],dev_pru_icssg1_core_clk_parent_hsdiv4_16fft_main_2_hsdivout0_clk:[28,89,104],dev_pru_icssg1_core_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[89,104],dev_pru_icssg1_core_clk_parent_postdiv4_16ff_main_0_hsdivout9_clk:28,dev_pru_icssg1_iep_clk:[28,89,104],dev_pru_icssg1_iep_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_pru_icssg1_iep_clk_parent_board_0_cpts0_rft_clk_out:[28,89,104],dev_pru_icssg1_iep_clk_parent_board_0_ext_refclk1_out:[28,89,104],dev_pru_icssg1_iep_clk_parent_board_0_mcu_cpts0_rft_clk_out:[89,104],dev_pru_icssg1_iep_clk_parent_board_0_mcu_ext_refclk0_out:[28,89,104],dev_pru_icssg1_iep_clk_parent_hsdiv4_16fft_main_3_hsdivout1_clk:[89,104],dev_pru_icssg1_iep_clk_parent_hsdiv4_16fft_mcu_2_hsdivout1_clk:[89,104],dev_pru_icssg1_iep_clk_parent_k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk:[28,89,104],dev_pru_icssg1_iep_clk_parent_postdiv3_16fft_main_0_hsdivout6_clk:[89,104],dev_pru_icssg1_iep_clk_parent_postdiv4_16ff_main_0_hsdivout6_clk:28,dev_pru_icssg1_iep_clk_parent_postdiv4_16ff_main_2_hsdivout5_clk:28,dev_pru_icssg1_iep_clk_parent_wiz16b2m4ct_main_0_ip1_ln0_txmclk:28,dev_pru_icssg1_iep_clk_parent_wiz16b4m4cs_main_0_ip2_ln0_txmclk:[89,104],dev_pru_icssg1_iep_clk_parent_wiz16b4m4cs_main_0_ip2_ln1_txmclk:[89,104],dev_pru_icssg1_iep_clk_parent_wiz16b4m4cs_main_1_ip2_ln0_txmclk:[89,104],dev_pru_icssg1_iep_clk_parent_wiz16b4m4cs_main_1_ip2_ln1_txmclk:[89,104],dev_pru_icssg1_iep_clk_parent_wiz16b4m4cs_main_2_ip2_ln0_txmclk:[89,104],dev_pru_icssg1_iep_clk_parent_wiz16b4m4cs_main_2_ip2_ln1_txmclk:[89,104],dev_pru_icssg1_iep_clk_parent_wiz16b4m4cs_main_3_ip2_ln0_txmclk:[89,104],dev_pru_icssg1_iep_clk_parent_wiz16b4m4cs_main_3_ip2_ln1_txmclk:[89,104],dev_pru_icssg1_pr1_mdio_mdclk_o:[28,89,104],dev_pru_icssg1_pr1_rgmii0_rxc_i:[28,89,104],dev_pru_icssg1_pr1_rgmii0_txc_i:[28,89,104],dev_pru_icssg1_pr1_rgmii0_txc_o:[28,89,104],dev_pru_icssg1_pr1_rgmii1_rxc_i:[28,89,104],dev_pru_icssg1_pr1_rgmii1_txc_i:[28,89,104],dev_pru_icssg1_pr1_rgmii1_txc_o:[28,89,104],dev_pru_icssg1_rgmii_mhz_250_clk:[28,89,104],dev_pru_icssg1_rgmii_mhz_50_clk:[28,89,104],dev_pru_icssg1_rgmii_mhz_5_clk:[28,89,104],dev_pru_icssg1_serdes0_refclk:[89,104],dev_pru_icssg1_serdes0_refclk_parent_wiz16b4m4cs_main_1_ip4_ln0_refclk:[89,104],dev_pru_icssg1_serdes0_refclk_parent_wiz16b4m4cs_main_2_ip4_ln0_refclk:[89,104],dev_pru_icssg1_serdes0_rxclk:[89,104],dev_pru_icssg1_serdes0_rxclk_parent_wiz16b4m4cs_main_1_ip4_ln0_rxclk:[89,104],dev_pru_icssg1_serdes0_rxclk_parent_wiz16b4m4cs_main_2_ip4_ln0_rxclk:[89,104],dev_pru_icssg1_serdes0_rxfclk:[89,104],dev_pru_icssg1_serdes0_rxfclk_parent_wiz16b4m4cs_main_1_ip4_ln0_rxfclk:[89,104],dev_pru_icssg1_serdes0_rxfclk_parent_wiz16b4m4cs_main_2_ip4_ln0_rxfclk:[89,104],dev_pru_icssg1_serdes0_txclk:[89,104],dev_pru_icssg1_serdes0_txfclk:[89,104],dev_pru_icssg1_serdes0_txfclk_parent_wiz16b4m4cs_main_1_ip4_ln0_txfclk:[89,104],dev_pru_icssg1_serdes0_txfclk_parent_wiz16b4m4cs_main_2_ip4_ln0_txfclk:[89,104],dev_pru_icssg1_serdes0_txmclk:[89,104],dev_pru_icssg1_serdes0_txmclk_parent_wiz16b4m4cs_main_1_ip4_ln0_txmclk:[89,104],dev_pru_icssg1_serdes0_txmclk_parent_wiz16b4m4cs_main_2_ip4_ln0_txmclk:[89,104],dev_pru_icssg1_serdes1_refclk:[89,104],dev_pru_icssg1_serdes1_refclk_parent_wiz16b4m4cs_main_1_ip4_ln1_refclk:[89,104],dev_pru_icssg1_serdes1_refclk_parent_wiz16b4m4cs_main_2_ip4_ln1_refclk:[89,104],dev_pru_icssg1_serdes1_rxclk:[89,104],dev_pru_icssg1_serdes1_rxclk_parent_wiz16b4m4cs_main_1_ip4_ln1_rxclk:[89,104],dev_pru_icssg1_serdes1_rxclk_parent_wiz16b4m4cs_main_2_ip4_ln1_rxclk:[89,104],dev_pru_icssg1_serdes1_rxfclk:[89,104],dev_pru_icssg1_serdes1_rxfclk_parent_wiz16b4m4cs_main_1_ip4_ln1_rxfclk:[89,104],dev_pru_icssg1_serdes1_rxfclk_parent_wiz16b4m4cs_main_2_ip4_ln1_rxfclk:[89,104],dev_pru_icssg1_serdes1_txclk:[89,104],dev_pru_icssg1_serdes1_txfclk:[89,104],dev_pru_icssg1_serdes1_txfclk_parent_wiz16b4m4cs_main_1_ip4_ln1_txfclk:[89,104],dev_pru_icssg1_serdes1_txfclk_parent_wiz16b4m4cs_main_2_ip4_ln1_txfclk:[89,104],dev_pru_icssg1_serdes1_txmclk:[89,104],dev_pru_icssg1_serdes1_txmclk_parent_wiz16b4m4cs_main_1_ip4_ln1_txmclk:[89,104],dev_pru_icssg1_serdes1_txmclk_parent_wiz16b4m4cs_main_2_ip4_ln1_txmclk:[89,104],dev_pru_icssg1_uclk_clk:[28,89,104],dev_pru_icssg1_vclk_clk:[28,89,104],dev_pru_icssg2_bus_core_clk:[43,58],dev_pru_icssg2_bus_core_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout1_clk:[43,58],dev_pru_icssg2_bus_core_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_pru_icssg2_bus_iep_clk:[43,58],dev_pru_icssg2_bus_iep_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_pru_icssg2_bus_iep_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_pru_icssg2_bus_iep_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_pru_icssg2_bus_iep_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_pru_icssg2_bus_iep_clk_parent_board_0_bus_mcu_cpts_rft_clk_out:[43,58],dev_pru_icssg2_bus_iep_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_pru_icssg2_bus_iep_clk_parent_wiz8b2m4vsb_main_0_bus_ln0_txclk:[43,58],dev_pru_icssg2_bus_iep_clk_parent_wiz8b2m4vsb_main_1_bus_ln0_txclk:[43,58],dev_pru_icssg2_bus_pr1_rgmii0_rxc_i:58,dev_pru_icssg2_bus_pr1_rgmii0_txc_i:58,dev_pru_icssg2_bus_pr1_rgmii1_rxc_i:58,dev_pru_icssg2_bus_pr1_rgmii1_txc_i:58,dev_pru_icssg2_bus_rgmii_mhz_250_clk:[43,58],dev_pru_icssg2_bus_rgmii_mhz_50_clk:[43,58],dev_pru_icssg2_bus_rgmii_mhz_5_clk:[43,58],dev_pru_icssg2_bus_uclk_clk:[43,58],dev_pru_icssg2_bus_vclk_clk:[43,58],dev_pru_icssg2_bus_wiz0_rx_slv_clk:[43,58],dev_pru_icssg2_bus_wiz0_tx_mst_clk:[43,58],dev_pru_icssg2_bus_wiz0_tx_slv_clk:[43,58],dev_pru_icssg2_bus_wiz1_rx_slv_clk:[43,58],dev_pru_icssg2_bus_wiz1_tx_mst_clk:[43,58],dev_pru_icssg2_bus_wiz1_tx_slv_clk:[43,58],dev_psc0_bus_clk:[43,58],dev_psc0_bus_slow_clk:[43,58],dev_psc0_clk:[28,75,89,104],dev_psc0_slow_clk:[28,75,89,104],dev_psramecc0_bus_clk_clk:[43,58],dev_psramecc0_clk_clk:28,dev_r5fss0_core0_cpu_clk:[28,75,89,104],dev_r5fss0_core0_interface_clk:[28,75,89,104],dev_r5fss0_core0_interface_phas:[75,89,104],dev_r5fss0_core1_cpu_clk:[28,75,89,104],dev_r5fss0_core1_interface_clk:[28,75,89,104],dev_r5fss0_core1_interface_phas:[75,89,104],dev_r5fss0_introuter0_intr_clk:[89,104],dev_r5fss1_core0_cpu_clk:[28,89,104],dev_r5fss1_core0_interface_clk:[28,89,104],dev_r5fss1_core0_interface_phas:[89,104],dev_r5fss1_core1_cpu_clk:[28,89,104],dev_r5fss1_core1_interface_clk:[28,89,104],dev_r5fss1_core1_interface_phas:[89,104],dev_r5fss1_introuter0_intr_clk:[89,104],dev_rti0_bus_rti_clk:[43,58],dev_rti0_bus_rti_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_rti0_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[43,58],dev_rti0_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[43,58],dev_rti0_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[43,58],dev_rti0_bus_rti_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_rti0_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_rti0_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_rti0_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_rti0_bus_vbusp_clk:[43,58],dev_rti0_rti_clk:[28,75,89,104],dev_rti0_rti_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_rti0_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[75,89,104],dev_rti0_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[75,89,104],dev_rti0_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[75,89,104],dev_rti0_rti_clk_parent_board_0_wkup_lf_clkin_out:75,dev_rti0_rti_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_rti0_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti0_rti_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_rti0_rti_clk_parent_gluelogic_rcosc_clkout:28,dev_rti0_rti_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_rti0_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti0_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti0_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_rti0_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_rti0_vbusp_clk:[28,75,89,104],dev_rti10_rti_clk:28,dev_rti10_rti_clk_parent_gluelogic_hfosc0_clkout:28,dev_rti10_rti_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_rti10_rti_clk_parent_gluelogic_rcosc_clkout:28,dev_rti10_rti_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_rti10_vbusp_clk:28,dev_rti11_rti_clk:28,dev_rti11_rti_clk_parent_gluelogic_hfosc0_clkout:28,dev_rti11_rti_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_rti11_rti_clk_parent_gluelogic_rcosc_clkout:28,dev_rti11_rti_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_rti11_vbusp_clk:28,dev_rti15_rti_clk:[89,104],dev_rti15_rti_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_rti15_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[89,104],dev_rti15_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[89,104],dev_rti15_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[89,104],dev_rti15_rti_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_rti15_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti15_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti15_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti15_vbusp_clk:[89,104],dev_rti16_rti_clk:[89,104],dev_rti16_rti_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_rti16_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[89,104],dev_rti16_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[89,104],dev_rti16_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[89,104],dev_rti16_rti_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_rti16_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti16_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti16_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti16_vbusp_clk:[89,104],dev_rti1_bus_rti_clk:[43,58],dev_rti1_bus_rti_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_rti1_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[43,58],dev_rti1_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[43,58],dev_rti1_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[43,58],dev_rti1_bus_rti_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_rti1_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_rti1_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_rti1_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_rti1_bus_vbusp_clk:[43,58],dev_rti1_rti_clk:[28,75,89,104],dev_rti1_rti_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_rti1_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[75,89,104],dev_rti1_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[75,89,104],dev_rti1_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[75,89,104],dev_rti1_rti_clk_parent_board_0_wkup_lf_clkin_out:75,dev_rti1_rti_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_rti1_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti1_rti_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_rti1_rti_clk_parent_gluelogic_rcosc_clkout:28,dev_rti1_rti_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_rti1_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti1_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti1_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_rti1_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_rti1_vbusp_clk:[28,75,89,104],dev_rti24_rti_clk:[89,104],dev_rti24_rti_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_rti24_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[89,104],dev_rti24_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[89,104],dev_rti24_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[89,104],dev_rti24_rti_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_rti24_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti24_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti24_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti24_vbusp_clk:[89,104],dev_rti25_rti_clk:[89,104],dev_rti25_rti_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_rti25_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[89,104],dev_rti25_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[89,104],dev_rti25_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[89,104],dev_rti25_rti_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_rti25_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti25_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti25_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti25_vbusp_clk:[89,104],dev_rti28_rti_clk:[75,89,104],dev_rti28_rti_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_rti28_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[75,89,104],dev_rti28_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[75,89,104],dev_rti28_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[75,89,104],dev_rti28_rti_clk_parent_board_0_wkup_lf_clkin_out:75,dev_rti28_rti_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_rti28_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti28_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti28_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti28_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_rti28_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_rti28_vbusp_clk:[75,89,104],dev_rti29_rti_clk:[75,89,104],dev_rti29_rti_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_rti29_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[75,89,104],dev_rti29_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[75,89,104],dev_rti29_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[75,89,104],dev_rti29_rti_clk_parent_board_0_wkup_lf_clkin_out:75,dev_rti29_rti_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_rti29_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti29_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti29_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti29_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_rti29_rti_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_rti29_vbusp_clk:[75,89,104],dev_rti2_bus_rti_clk:[43,58],dev_rti2_bus_rti_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_rti2_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[43,58],dev_rti2_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[43,58],dev_rti2_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[43,58],dev_rti2_bus_rti_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_rti2_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_rti2_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_rti2_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_rti2_bus_vbusp_clk:[43,58],dev_rti30_rti_clk:[89,104],dev_rti30_rti_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_rti30_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[89,104],dev_rti30_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[89,104],dev_rti30_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[89,104],dev_rti30_rti_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_rti30_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti30_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti30_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti30_vbusp_clk:[89,104],dev_rti31_rti_clk:[89,104],dev_rti31_rti_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_rti31_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[89,104],dev_rti31_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[89,104],dev_rti31_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[89,104],dev_rti31_rti_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_rti31_rti_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_rti31_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_rti31_rti_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:[89,104],dev_rti31_vbusp_clk:[89,104],dev_rti3_bus_rti_clk:[43,58],dev_rti3_bus_rti_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_rti3_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup0:[43,58],dev_rti3_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup1:[43,58],dev_rti3_bus_rti_clk_parent_board_0_hfosc1_clk_out_dup2:[43,58],dev_rti3_bus_rti_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_rti3_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_rti3_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_rti3_bus_rti_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_rti3_bus_vbusp_clk:[43,58],dev_rti8_rti_clk:28,dev_rti8_rti_clk_parent_gluelogic_hfosc0_clkout:28,dev_rti8_rti_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_rti8_rti_clk_parent_gluelogic_rcosc_clkout:28,dev_rti8_rti_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_rti8_vbusp_clk:28,dev_rti9_rti_clk:28,dev_rti9_rti_clk_parent_gluelogic_hfosc0_clkout:28,dev_rti9_rti_clk_parent_gluelogic_rcosc_clk_1p0v_97p65k3:28,dev_rti9_rti_clk_parent_gluelogic_rcosc_clkout:28,dev_rti9_rti_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_rti9_vbusp_clk:28,dev_sa2_ul0_bus_pka_in_clk:[43,58],dev_sa2_ul0_bus_x1_clk:[43,58],dev_sa2_ul0_bus_x2_clk:[43,58],dev_sa2_ul0_pka_in_clk:[28,89,104],dev_sa2_ul0_x1_clk:[28,89,104],dev_sa2_ul0_x2_clk:[28,89,104],dev_serdes0_bus_clk:[43,58],dev_serdes0_bus_ip2_ln0_txrclk:[43,58],dev_serdes0_bus_ip3_ln0_txrclk:[43,58],dev_serdes0_bus_li_refclk:[43,58],dev_serdes0_bus_li_refclk_parent_adpllljm_hsdiv_wrap_main_0_bus_clkout_clk:[43,58],dev_serdes0_bus_li_refclk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout4_clk:[43,58],dev_serdes0_bus_li_refclk_parent_board_0_hfosc1_clk_out:[43,58],dev_serdes0_bus_li_refclk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_serdes0_bus_ln0_rxclk:[43,58],dev_serdes0_bus_ln0_txclk:[43,58],dev_serdes0_bus_refclkpn:58,dev_serdes0_bus_refclkpp:58,dev_serdes1_bus_clk:[43,58],dev_serdes1_bus_ip1_ln0_txrclk:[43,58],dev_serdes1_bus_ip2_ln0_txrclk:[43,58],dev_serdes1_bus_ip3_ln0_txrclk:[43,58],dev_serdes1_bus_ln0_rxclk:[43,58],dev_serdes1_bus_ln0_txclk:[43,58],dev_serdes1_bus_refclkpn:58,dev_serdes1_bus_refclkpp:58,dev_serdes1_bus_ri_refclk:[43,58],dev_serdes1_bus_ri_refclk_parent_adpllljm_hsdiv_wrap_main_0_bus_clkout_clk:[43,58],dev_serdes1_bus_ri_refclk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout4_clk:[43,58],dev_serdes1_bus_ri_refclk_parent_board_0_hfosc1_clk_out:[43,58],dev_serdes1_bus_ri_refclk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_serdes_10g0_clk:[28,89,104],dev_serdes_10g0_core_ref_clk:[28,89,104],dev_serdes_10g0_core_ref_clk_parent_board_0_ext_refclk1_out:28,dev_serdes_10g0_core_ref_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_10g0_core_ref_clk_parent_gluelogic_hfosc0_clkout:[28,89,104],dev_serdes_10g0_core_ref_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[28,89,104],dev_serdes_10g0_core_ref_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_10g0_core_ref_clk_parent_postdiv4_16ff_main_0_hsdivout8_clk:28,dev_serdes_10g0_ip1_ln0_refclk:[28,89,104],dev_serdes_10g0_ip1_ln0_rxclk:[28,89,104],dev_serdes_10g0_ip1_ln0_rxfclk:[28,89,104],dev_serdes_10g0_ip1_ln0_txclk:[28,89,104],dev_serdes_10g0_ip1_ln0_txfclk:[28,89,104],dev_serdes_10g0_ip1_ln0_txmclk:[28,89,104],dev_serdes_10g0_ip1_ln1_refclk:[89,104],dev_serdes_10g0_ip1_ln1_rxclk:[89,104],dev_serdes_10g0_ip1_ln1_rxfclk:[89,104],dev_serdes_10g0_ip1_ln1_txclk:[89,104],dev_serdes_10g0_ip1_ln1_txfclk:[89,104],dev_serdes_10g0_ip1_ln1_txmclk:[89,104],dev_serdes_10g0_ip1_ln2_refclk:[89,104],dev_serdes_10g0_ip1_ln2_rxclk:[89,104],dev_serdes_10g0_ip1_ln2_rxfclk:[89,104],dev_serdes_10g0_ip1_ln2_txclk:[89,104],dev_serdes_10g0_ip1_ln2_txfclk:[89,104],dev_serdes_10g0_ip1_ln2_txmclk:[89,104],dev_serdes_10g0_ip1_ln3_refclk:[89,104],dev_serdes_10g0_ip1_ln3_rxclk:[89,104],dev_serdes_10g0_ip1_ln3_rxfclk:[89,104],dev_serdes_10g0_ip1_ln3_txclk:[89,104],dev_serdes_10g0_ip1_ln3_txfclk:[89,104],dev_serdes_10g0_ip1_ln3_txmclk:[89,104],dev_serdes_10g0_ip2_ln0_refclk:28,dev_serdes_10g0_ip2_ln0_rxclk:28,dev_serdes_10g0_ip2_ln0_rxfclk:28,dev_serdes_10g0_ip2_ln0_txclk:28,dev_serdes_10g0_ip2_ln0_txfclk:28,dev_serdes_10g0_ip2_ln0_txmclk:28,dev_serdes_10g0_ip3_ln0_refclk:[89,104],dev_serdes_10g0_ip3_ln0_rxclk:[89,104],dev_serdes_10g0_ip3_ln0_rxfclk:[89,104],dev_serdes_10g0_ip3_ln0_txclk:[89,104],dev_serdes_10g0_ip3_ln0_txfclk:[89,104],dev_serdes_10g0_ip3_ln0_txmclk:[89,104],dev_serdes_10g0_ip3_ln1_refclk:[89,104],dev_serdes_10g0_ip3_ln1_rxclk:[89,104],dev_serdes_10g0_ip3_ln1_rxfclk:[89,104],dev_serdes_10g0_ip3_ln1_txclk:[89,104],dev_serdes_10g0_ip3_ln1_txfclk:[89,104],dev_serdes_10g0_ip3_ln1_txmclk:[89,104],dev_serdes_10g0_ip3_ln2_refclk:[89,104],dev_serdes_10g0_ip3_ln2_rxclk:[89,104],dev_serdes_10g0_ip3_ln2_rxfclk:[89,104],dev_serdes_10g0_ip3_ln2_txclk:[89,104],dev_serdes_10g0_ip3_ln2_txfclk:[89,104],dev_serdes_10g0_ip3_ln2_txmclk:[89,104],dev_serdes_10g0_ip3_ln3_refclk:[89,104],dev_serdes_10g0_ip3_ln3_rxclk:[89,104],dev_serdes_10g0_ip3_ln3_rxfclk:[89,104],dev_serdes_10g0_ip3_ln3_txclk:[89,104],dev_serdes_10g0_ip3_ln3_txfclk:[89,104],dev_serdes_10g0_ip3_ln3_txmclk:[89,104],dev_serdes_10g0_ref_out_clk:[28,89,104],dev_serdes_10g1_clk:75,dev_serdes_10g1_core_ref_clk:75,dev_serdes_10g1_core_ref_clk_parent_board_0_hfosc1_clk_out:75,dev_serdes_10g1_core_ref_clk_parent_gluelogic_hfosc0_clkout:75,dev_serdes_10g1_core_ref_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:75,dev_serdes_10g1_core_ref_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:75,dev_serdes_10g1_ip1_ln0_refclk:75,dev_serdes_10g1_ip1_ln0_rxclk:75,dev_serdes_10g1_ip1_ln0_rxfclk:75,dev_serdes_10g1_ip1_ln0_txclk:75,dev_serdes_10g1_ip1_ln0_txfclk:75,dev_serdes_10g1_ip1_ln0_txmclk:75,dev_serdes_10g1_ip1_ln1_refclk:75,dev_serdes_10g1_ip1_ln1_rxclk:75,dev_serdes_10g1_ip1_ln1_rxfclk:75,dev_serdes_10g1_ip1_ln1_txclk:75,dev_serdes_10g1_ip1_ln1_txfclk:75,dev_serdes_10g1_ip1_ln1_txmclk:75,dev_serdes_10g1_ip1_ln2_refclk:75,dev_serdes_10g1_ip1_ln2_rxclk:75,dev_serdes_10g1_ip1_ln2_rxfclk:75,dev_serdes_10g1_ip1_ln2_txclk:75,dev_serdes_10g1_ip1_ln2_txfclk:75,dev_serdes_10g1_ip1_ln2_txmclk:75,dev_serdes_10g1_ip1_ln3_refclk:75,dev_serdes_10g1_ip1_ln3_rxclk:75,dev_serdes_10g1_ip1_ln3_rxfclk:75,dev_serdes_10g1_ip1_ln3_txclk:75,dev_serdes_10g1_ip1_ln3_txfclk:75,dev_serdes_10g1_ip1_ln3_txmclk:75,dev_serdes_10g1_ip2_ln0_refclk:75,dev_serdes_10g1_ip2_ln0_rxclk:75,dev_serdes_10g1_ip2_ln0_rxfclk:75,dev_serdes_10g1_ip2_ln0_txclk:75,dev_serdes_10g1_ip2_ln0_txfclk:75,dev_serdes_10g1_ip2_ln0_txmclk:75,dev_serdes_10g1_ip2_ln1_refclk:75,dev_serdes_10g1_ip2_ln1_rxclk:75,dev_serdes_10g1_ip2_ln1_rxfclk:75,dev_serdes_10g1_ip2_ln1_txclk:75,dev_serdes_10g1_ip2_ln1_txfclk:75,dev_serdes_10g1_ip2_ln1_txmclk:75,dev_serdes_10g1_ip2_ln2_refclk:75,dev_serdes_10g1_ip2_ln2_rxclk:75,dev_serdes_10g1_ip2_ln2_rxfclk:75,dev_serdes_10g1_ip2_ln2_txclk:75,dev_serdes_10g1_ip2_ln2_txfclk:75,dev_serdes_10g1_ip2_ln2_txmclk:75,dev_serdes_10g1_ip2_ln3_refclk:75,dev_serdes_10g1_ip2_ln3_rxclk:75,dev_serdes_10g1_ip2_ln3_rxfclk:75,dev_serdes_10g1_ip2_ln3_txclk:75,dev_serdes_10g1_ip2_ln3_txfclk:75,dev_serdes_10g1_ip2_ln3_txmclk:75,dev_serdes_10g1_ip3_ln1_refclk:75,dev_serdes_10g1_ip3_ln1_rxclk:75,dev_serdes_10g1_ip3_ln1_rxfclk:75,dev_serdes_10g1_ip3_ln1_txclk:75,dev_serdes_10g1_ip3_ln1_txfclk:75,dev_serdes_10g1_ip3_ln1_txmclk:75,dev_serdes_10g1_ip3_ln3_refclk:75,dev_serdes_10g1_ip3_ln3_rxclk:75,dev_serdes_10g1_ip3_ln3_rxfclk:75,dev_serdes_10g1_ip3_ln3_txclk:75,dev_serdes_10g1_ip3_ln3_txfclk:75,dev_serdes_10g1_ip3_ln3_txmclk:75,dev_serdes_16g0_clk:[89,104],dev_serdes_16g0_cmn_refclk1_m:[89,104],dev_serdes_16g0_cmn_refclk1_p:[89,104],dev_serdes_16g0_core_ref1_clk:[89,104],dev_serdes_16g0_core_ref1_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_16g0_core_ref1_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_serdes_16g0_core_ref1_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_serdes_16g0_core_ref1_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_16g0_core_ref_clk:[89,104],dev_serdes_16g0_core_ref_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_16g0_core_ref_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_serdes_16g0_core_ref_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_serdes_16g0_core_ref_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_16g0_ip1_ln0_refclk:[89,104],dev_serdes_16g0_ip1_ln0_rxclk:[89,104],dev_serdes_16g0_ip1_ln0_rxfclk:[89,104],dev_serdes_16g0_ip1_ln0_txclk:[89,104],dev_serdes_16g0_ip1_ln0_txfclk:[89,104],dev_serdes_16g0_ip1_ln0_txmclk:[89,104],dev_serdes_16g0_ip1_ln1_refclk:[89,104],dev_serdes_16g0_ip1_ln1_rxclk:[89,104],dev_serdes_16g0_ip1_ln1_rxfclk:[89,104],dev_serdes_16g0_ip1_ln1_txclk:[89,104],dev_serdes_16g0_ip1_ln1_txfclk:[89,104],dev_serdes_16g0_ip1_ln1_txmclk:[89,104],dev_serdes_16g0_ip2_ln0_refclk:[89,104],dev_serdes_16g0_ip2_ln0_rxclk:[89,104],dev_serdes_16g0_ip2_ln0_rxfclk:[89,104],dev_serdes_16g0_ip2_ln0_txclk:[89,104],dev_serdes_16g0_ip2_ln0_txfclk:[89,104],dev_serdes_16g0_ip2_ln0_txmclk:[89,104],dev_serdes_16g0_ip2_ln1_refclk:[89,104],dev_serdes_16g0_ip2_ln1_rxclk:[89,104],dev_serdes_16g0_ip2_ln1_rxfclk:[89,104],dev_serdes_16g0_ip2_ln1_txclk:[89,104],dev_serdes_16g0_ip2_ln1_txfclk:[89,104],dev_serdes_16g0_ip2_ln1_txmclk:[89,104],dev_serdes_16g0_ip3_ln1_refclk:[89,104],dev_serdes_16g0_ip3_ln1_rxclk:[89,104],dev_serdes_16g0_ip3_ln1_rxfclk:[89,104],dev_serdes_16g0_ip3_ln1_txclk:[89,104],dev_serdes_16g0_ip3_ln1_txfclk:[89,104],dev_serdes_16g0_ip3_ln1_txmclk:[89,104],dev_serdes_16g0_ref1_out_clk:[89,104],dev_serdes_16g0_ref_out_clk:[89,104],dev_serdes_16g1_clk:[89,104],dev_serdes_16g1_cmn_refclk1_m:[89,104],dev_serdes_16g1_cmn_refclk1_p:[89,104],dev_serdes_16g1_core_ref1_clk:[89,104],dev_serdes_16g1_core_ref1_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_16g1_core_ref1_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_serdes_16g1_core_ref1_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_serdes_16g1_core_ref1_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_16g1_core_ref_clk:[89,104],dev_serdes_16g1_core_ref_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_16g1_core_ref_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_serdes_16g1_core_ref_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_serdes_16g1_core_ref_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_16g1_ip1_ln0_refclk:[89,104],dev_serdes_16g1_ip1_ln0_rxclk:[89,104],dev_serdes_16g1_ip1_ln0_rxfclk:[89,104],dev_serdes_16g1_ip1_ln0_txclk:[89,104],dev_serdes_16g1_ip1_ln0_txfclk:[89,104],dev_serdes_16g1_ip1_ln0_txmclk:[89,104],dev_serdes_16g1_ip1_ln1_refclk:[89,104],dev_serdes_16g1_ip1_ln1_rxclk:[89,104],dev_serdes_16g1_ip1_ln1_rxfclk:[89,104],dev_serdes_16g1_ip1_ln1_txclk:[89,104],dev_serdes_16g1_ip1_ln1_txfclk:[89,104],dev_serdes_16g1_ip1_ln1_txmclk:[89,104],dev_serdes_16g1_ip2_ln0_refclk:[89,104],dev_serdes_16g1_ip2_ln0_rxclk:[89,104],dev_serdes_16g1_ip2_ln0_rxfclk:[89,104],dev_serdes_16g1_ip2_ln0_txclk:[89,104],dev_serdes_16g1_ip2_ln0_txfclk:[89,104],dev_serdes_16g1_ip2_ln0_txmclk:[89,104],dev_serdes_16g1_ip2_ln1_refclk:[89,104],dev_serdes_16g1_ip2_ln1_rxclk:[89,104],dev_serdes_16g1_ip2_ln1_rxfclk:[89,104],dev_serdes_16g1_ip2_ln1_txclk:[89,104],dev_serdes_16g1_ip2_ln1_txfclk:[89,104],dev_serdes_16g1_ip2_ln1_txmclk:[89,104],dev_serdes_16g1_ip3_ln1_refclk:[89,104],dev_serdes_16g1_ip3_ln1_rxclk:[89,104],dev_serdes_16g1_ip3_ln1_rxfclk:[89,104],dev_serdes_16g1_ip3_ln1_txclk:[89,104],dev_serdes_16g1_ip3_ln1_txfclk:[89,104],dev_serdes_16g1_ip3_ln1_txmclk:[89,104],dev_serdes_16g1_ip4_ln0_refclk:[89,104],dev_serdes_16g1_ip4_ln0_rxclk:[89,104],dev_serdes_16g1_ip4_ln0_rxfclk:[89,104],dev_serdes_16g1_ip4_ln0_txclk:[89,104],dev_serdes_16g1_ip4_ln0_txfclk:[89,104],dev_serdes_16g1_ip4_ln0_txmclk:[89,104],dev_serdes_16g1_ip4_ln1_refclk:[89,104],dev_serdes_16g1_ip4_ln1_rxclk:[89,104],dev_serdes_16g1_ip4_ln1_rxfclk:[89,104],dev_serdes_16g1_ip4_ln1_txclk:[89,104],dev_serdes_16g1_ip4_ln1_txfclk:[89,104],dev_serdes_16g1_ip4_ln1_txmclk:[89,104],dev_serdes_16g1_ref1_out_clk:[89,104],dev_serdes_16g1_ref_out_clk:[89,104],dev_serdes_16g2_clk:[89,104],dev_serdes_16g2_cmn_refclk1_m:[89,104],dev_serdes_16g2_cmn_refclk1_p:[89,104],dev_serdes_16g2_core_ref1_clk:[89,104],dev_serdes_16g2_core_ref1_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_16g2_core_ref1_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_serdes_16g2_core_ref1_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_serdes_16g2_core_ref1_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_16g2_core_ref_clk:[89,104],dev_serdes_16g2_core_ref_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_16g2_core_ref_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_serdes_16g2_core_ref_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_serdes_16g2_core_ref_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_16g2_ip2_ln0_refclk:[89,104],dev_serdes_16g2_ip2_ln0_rxclk:[89,104],dev_serdes_16g2_ip2_ln0_rxfclk:[89,104],dev_serdes_16g2_ip2_ln0_txclk:[89,104],dev_serdes_16g2_ip2_ln0_txfclk:[89,104],dev_serdes_16g2_ip2_ln0_txmclk:[89,104],dev_serdes_16g2_ip2_ln1_refclk:[89,104],dev_serdes_16g2_ip2_ln1_rxclk:[89,104],dev_serdes_16g2_ip2_ln1_rxfclk:[89,104],dev_serdes_16g2_ip2_ln1_txclk:[89,104],dev_serdes_16g2_ip2_ln1_txfclk:[89,104],dev_serdes_16g2_ip2_ln1_txmclk:[89,104],dev_serdes_16g2_ip3_ln1_refclk:[89,104],dev_serdes_16g2_ip3_ln1_rxclk:[89,104],dev_serdes_16g2_ip3_ln1_rxfclk:[89,104],dev_serdes_16g2_ip3_ln1_txclk:[89,104],dev_serdes_16g2_ip3_ln1_txfclk:[89,104],dev_serdes_16g2_ip3_ln1_txmclk:[89,104],dev_serdes_16g2_ip4_ln0_refclk:[89,104],dev_serdes_16g2_ip4_ln0_rxclk:[89,104],dev_serdes_16g2_ip4_ln0_rxfclk:[89,104],dev_serdes_16g2_ip4_ln0_txclk:[89,104],dev_serdes_16g2_ip4_ln0_txfclk:[89,104],dev_serdes_16g2_ip4_ln0_txmclk:[89,104],dev_serdes_16g2_ip4_ln1_refclk:[89,104],dev_serdes_16g2_ip4_ln1_rxclk:[89,104],dev_serdes_16g2_ip4_ln1_rxfclk:[89,104],dev_serdes_16g2_ip4_ln1_txclk:[89,104],dev_serdes_16g2_ip4_ln1_txfclk:[89,104],dev_serdes_16g2_ip4_ln1_txmclk:[89,104],dev_serdes_16g2_ref1_out_clk:[89,104],dev_serdes_16g2_ref_out_clk:[89,104],dev_serdes_16g3_clk:[89,104],dev_serdes_16g3_cmn_refclk1_m:[89,104],dev_serdes_16g3_cmn_refclk1_p:[89,104],dev_serdes_16g3_core_ref1_clk:[89,104],dev_serdes_16g3_core_ref1_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_16g3_core_ref1_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_serdes_16g3_core_ref1_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_serdes_16g3_core_ref1_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_16g3_core_ref_clk:[89,104],dev_serdes_16g3_core_ref_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_serdes_16g3_core_ref_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_serdes_16g3_core_ref_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:[89,104],dev_serdes_16g3_core_ref_clk_parent_hsdiv4_16fft_main_3_hsdivout4_clk:[89,104],dev_serdes_16g3_ip2_ln0_refclk:[89,104],dev_serdes_16g3_ip2_ln0_rxclk:[89,104],dev_serdes_16g3_ip2_ln0_rxfclk:[89,104],dev_serdes_16g3_ip2_ln0_txclk:[89,104],dev_serdes_16g3_ip2_ln0_txfclk:[89,104],dev_serdes_16g3_ip2_ln0_txmclk:[89,104],dev_serdes_16g3_ip2_ln1_refclk:[89,104],dev_serdes_16g3_ip2_ln1_rxclk:[89,104],dev_serdes_16g3_ip2_ln1_rxfclk:[89,104],dev_serdes_16g3_ip2_ln1_txclk:[89,104],dev_serdes_16g3_ip2_ln1_txfclk:[89,104],dev_serdes_16g3_ip2_ln1_txmclk:[89,104],dev_serdes_16g3_ip3_ln1_refclk:[89,104],dev_serdes_16g3_ip3_ln1_rxclk:[89,104],dev_serdes_16g3_ip3_ln1_rxfclk:[89,104],dev_serdes_16g3_ip3_ln1_txclk:[89,104],dev_serdes_16g3_ip3_ln1_txfclk:[89,104],dev_serdes_16g3_ip3_ln1_txmclk:[89,104],dev_serdes_16g3_ref1_out_clk:[89,104],dev_serdes_16g3_ref_out_clk:[89,104],dev_spinlock0_vclk_clk:28,dev_stm0_atb_clk:[28,75,89,104],dev_stm0_bus_atb_clk:[43,58],dev_stm0_bus_core_clk:[43,58],dev_stm0_bus_vbusp_clk:[43,58],dev_stm0_core_clk:[28,75,89,104],dev_stm0_vbusp_clk:[28,75,89,104],dev_timer0_bus_timer_hclk_clk:[43,58],dev_timer0_bus_timer_tclk_clk:[43,58],dev_timer0_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer0_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer0_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer0_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer0_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer0_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer0_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer0_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer0_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer0_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer0_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer0_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer0_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer0_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer0_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer0_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer0_timer_hclk_clk:[28,75,89,104],dev_timer0_timer_pwm:[28,75,89,104],dev_timer0_timer_tclk_clk:[28,75,89,104],dev_timer0_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer0_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[28,75,89,104],dev_timer0_timer_tclk_clk_parent_board_0_ext_refclk1_out:[28,75,89,104],dev_timer0_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer0_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_timer0_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer0_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer0_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer0_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer0_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer0_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_timer0_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer0_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer0_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer0_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer0_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer0_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer0_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer0_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[28,75,89,104],dev_timer0_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer0_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer0_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer0_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer0_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer0_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer0_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer0_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer0_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer0_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer0_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer0_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer0_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer0_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer0_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer10_bus_timer_hclk_clk:[43,58],dev_timer10_bus_timer_tclk_clk:[43,58],dev_timer10_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer10_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer10_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer10_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer10_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer10_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer10_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer10_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer10_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer10_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer10_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer10_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer10_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer10_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer10_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer10_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer10_timer_hclk_clk:[28,75,89,104],dev_timer10_timer_pwm:[28,75,89,104],dev_timer10_timer_tclk_clk:[28,75,89,104],dev_timer10_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer10_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[28,75,89,104],dev_timer10_timer_tclk_clk_parent_board_0_ext_refclk1_out:[28,75,89,104],dev_timer10_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer10_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_timer10_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer10_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer10_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer10_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer10_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer10_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_timer10_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer10_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer10_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer10_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer10_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer10_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer10_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer10_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[28,75,89,104],dev_timer10_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer10_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer10_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer10_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer10_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer10_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer10_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer10_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer10_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer10_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer10_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer10_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer10_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer10_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer10_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer11_bus_timer_hclk_clk:[43,58],dev_timer11_bus_timer_tclk_clk:[43,58],dev_timer11_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer11_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer11_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer11_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer11_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer11_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer11_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer11_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer11_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer11_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer11_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer11_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer11_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer11_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer11_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer11_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer11_timer_hclk_clk:[28,75,89,104],dev_timer11_timer_pwm:28,dev_timer11_timer_tclk_clk:[28,75,89,104],dev_timer11_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer11_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:28,dev_timer11_timer_tclk_clk_parent_board_0_ext_refclk1_out:28,dev_timer11_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_timer11_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer11_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer11_timer_tclk_clk_parent_dmtimer_dmc1ms_main_10_timer_pwm:[75,89,104],dev_timer11_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:28,dev_timer11_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer11_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer11_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:28,dev_timer11_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer11_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer11_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer11_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer11_timer_tclk_clk_parent_main_timer_clksel_out11:[75,89,104],dev_timer11_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer11_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer12_timer_hclk_clk:[75,89,104],dev_timer12_timer_pwm:[75,89,104],dev_timer12_timer_tclk_clk:[75,89,104],dev_timer12_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[75,89,104],dev_timer12_timer_tclk_clk_parent_board_0_ext_refclk1_out:[75,89,104],dev_timer12_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer12_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_timer12_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer12_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer12_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer12_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_timer12_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer12_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer12_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer12_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer12_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer12_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[75,89,104],dev_timer12_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer12_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer12_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer12_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer12_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer12_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer12_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer12_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer12_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer13_timer_hclk_clk:[75,89,104],dev_timer13_timer_tclk_clk:[75,89,104],dev_timer13_timer_tclk_clk_parent_dmtimer_dmc1ms_main_12_timer_pwm:[75,89,104],dev_timer13_timer_tclk_clk_parent_main_timer_clksel_out13:[75,89,104],dev_timer14_timer_hclk_clk:[75,89,104],dev_timer14_timer_pwm:[75,89,104],dev_timer14_timer_tclk_clk:[75,89,104],dev_timer14_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[75,89,104],dev_timer14_timer_tclk_clk_parent_board_0_ext_refclk1_out:[75,89,104],dev_timer14_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer14_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_timer14_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer14_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer14_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer14_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_timer14_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer14_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer14_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer14_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer14_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer14_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[75,89,104],dev_timer14_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer14_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer14_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer14_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer14_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer14_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer14_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer14_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer14_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer15_timer_hclk_clk:[75,89,104],dev_timer15_timer_tclk_clk:[75,89,104],dev_timer15_timer_tclk_clk_parent_dmtimer_dmc1ms_main_14_timer_pwm:[75,89,104],dev_timer15_timer_tclk_clk_parent_main_timer_clksel_out15:[75,89,104],dev_timer16_timer_hclk_clk:[75,89,104],dev_timer16_timer_pwm:[75,89,104],dev_timer16_timer_tclk_clk:[75,89,104],dev_timer16_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[75,89,104],dev_timer16_timer_tclk_clk_parent_board_0_ext_refclk1_out:[75,89,104],dev_timer16_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer16_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_timer16_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer16_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer16_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer16_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_timer16_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer16_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer16_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer16_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer16_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer16_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[75,89,104],dev_timer16_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer16_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer16_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer16_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer16_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer16_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer16_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer16_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer16_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer17_timer_hclk_clk:[75,89,104],dev_timer17_timer_tclk_clk:[75,89,104],dev_timer17_timer_tclk_clk_parent_dmtimer_dmc1ms_main_16_timer_pwm:[75,89,104],dev_timer17_timer_tclk_clk_parent_main_timer_clksel_out17:[75,89,104],dev_timer18_timer_hclk_clk:[75,89,104],dev_timer18_timer_pwm:[75,89,104],dev_timer18_timer_tclk_clk:[75,89,104],dev_timer18_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[75,89,104],dev_timer18_timer_tclk_clk_parent_board_0_ext_refclk1_out:[75,89,104],dev_timer18_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer18_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[75,89,104],dev_timer18_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer18_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer18_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer18_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_timer18_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer18_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer18_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer18_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer18_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer18_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[75,89,104],dev_timer18_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer18_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer18_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer18_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer18_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer18_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer18_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer18_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer18_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer19_timer_hclk_clk:[75,89,104],dev_timer19_timer_tclk_clk:[75,89,104],dev_timer19_timer_tclk_clk_parent_dmtimer_dmc1ms_main_18_timer_pwm:[75,89,104],dev_timer19_timer_tclk_clk_parent_main_timer_clksel_out19:[75,89,104],dev_timer1_bus_timer_hclk_clk:[43,58],dev_timer1_bus_timer_tclk_clk:[43,58],dev_timer1_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer1_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer1_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer1_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer1_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer1_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer1_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer1_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer1_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer1_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer1_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer1_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer1_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer1_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer1_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer1_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer1_timer_hclk_clk:[28,75,89,104],dev_timer1_timer_pwm:28,dev_timer1_timer_tclk_clk:[28,75,89,104],dev_timer1_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer1_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:28,dev_timer1_timer_tclk_clk_parent_board_0_ext_refclk1_out:28,dev_timer1_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_timer1_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer1_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer1_timer_tclk_clk_parent_dmtimer_dmc1ms_main_0_timer_pwm:[75,89,104],dev_timer1_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:28,dev_timer1_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer1_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer1_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:28,dev_timer1_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer1_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer1_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer1_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer1_timer_tclk_clk_parent_main_timer_clksel_out1:[75,89,104],dev_timer1_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer1_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer2_bus_timer_hclk_clk:[43,58],dev_timer2_bus_timer_tclk_clk:[43,58],dev_timer2_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer2_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer2_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer2_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer2_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer2_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer2_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer2_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer2_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer2_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer2_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer2_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer2_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer2_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer2_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer2_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer2_timer_hclk_clk:[28,75,89,104],dev_timer2_timer_pwm:[28,75,89,104],dev_timer2_timer_tclk_clk:[28,75,89,104],dev_timer2_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer2_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[28,75,89,104],dev_timer2_timer_tclk_clk_parent_board_0_ext_refclk1_out:[28,75,89,104],dev_timer2_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer2_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_timer2_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer2_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer2_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer2_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer2_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer2_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_timer2_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer2_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer2_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer2_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer2_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer2_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer2_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer2_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[28,75,89,104],dev_timer2_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer2_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer2_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer2_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer2_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer2_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer2_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer2_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer2_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer2_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer2_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer2_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer2_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer2_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer2_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer3_bus_timer_hclk_clk:[43,58],dev_timer3_bus_timer_tclk_clk:[43,58],dev_timer3_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer3_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer3_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer3_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer3_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer3_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer3_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer3_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer3_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer3_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer3_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer3_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer3_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer3_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer3_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer3_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer3_timer_hclk_clk:[28,75,89,104],dev_timer3_timer_pwm:28,dev_timer3_timer_tclk_clk:[28,75,89,104],dev_timer3_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer3_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:28,dev_timer3_timer_tclk_clk_parent_board_0_ext_refclk1_out:28,dev_timer3_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_timer3_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer3_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer3_timer_tclk_clk_parent_dmtimer_dmc1ms_main_2_timer_pwm:[75,89,104],dev_timer3_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:28,dev_timer3_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer3_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer3_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:28,dev_timer3_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer3_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer3_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer3_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer3_timer_tclk_clk_parent_main_timer_clksel_out3:[75,89,104],dev_timer3_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer3_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer4_bus_timer_hclk_clk:[43,58],dev_timer4_bus_timer_tclk_clk:[43,58],dev_timer4_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer4_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer4_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer4_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer4_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer4_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer4_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer4_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer4_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer4_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer4_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer4_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer4_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer4_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer4_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer4_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer4_timer_hclk_clk:[28,75,89,104],dev_timer4_timer_pwm:[28,75,89,104],dev_timer4_timer_tclk_clk:[28,75,89,104],dev_timer4_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer4_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[28,75,89,104],dev_timer4_timer_tclk_clk_parent_board_0_ext_refclk1_out:[28,75,89,104],dev_timer4_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer4_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_timer4_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer4_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer4_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer4_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer4_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer4_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_timer4_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer4_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer4_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer4_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer4_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer4_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer4_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer4_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[28,75,89,104],dev_timer4_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer4_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer4_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer4_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer4_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer4_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer4_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer4_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer4_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer4_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer4_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer4_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer4_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer4_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer4_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer5_bus_timer_hclk_clk:[43,58],dev_timer5_bus_timer_tclk_clk:[43,58],dev_timer5_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer5_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer5_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer5_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer5_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer5_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer5_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer5_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer5_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer5_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer5_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer5_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer5_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer5_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer5_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer5_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer5_timer_hclk_clk:[28,75,89,104],dev_timer5_timer_pwm:28,dev_timer5_timer_tclk_clk:[28,75,89,104],dev_timer5_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer5_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:28,dev_timer5_timer_tclk_clk_parent_board_0_ext_refclk1_out:28,dev_timer5_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_timer5_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer5_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer5_timer_tclk_clk_parent_dmtimer_dmc1ms_main_4_timer_pwm:[75,89,104],dev_timer5_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:28,dev_timer5_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer5_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer5_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:28,dev_timer5_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer5_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer5_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer5_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer5_timer_tclk_clk_parent_main_timer_clksel_out5:[75,89,104],dev_timer5_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer5_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer6_bus_timer_hclk_clk:[43,58],dev_timer6_bus_timer_tclk_clk:[43,58],dev_timer6_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer6_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer6_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer6_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer6_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer6_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer6_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer6_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer6_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer6_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer6_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer6_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer6_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer6_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer6_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer6_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer6_timer_hclk_clk:[28,75,89,104],dev_timer6_timer_pwm:[28,75,89,104],dev_timer6_timer_tclk_clk:[28,75,89,104],dev_timer6_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer6_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[28,75,89,104],dev_timer6_timer_tclk_clk_parent_board_0_ext_refclk1_out:[28,75,89,104],dev_timer6_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer6_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_timer6_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer6_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer6_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer6_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer6_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer6_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_timer6_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer6_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer6_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer6_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer6_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer6_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer6_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer6_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[28,75,89,104],dev_timer6_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer6_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer6_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer6_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer6_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer6_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer6_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer6_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer6_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer6_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer6_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer6_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer6_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer6_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer6_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer7_bus_timer_hclk_clk:[43,58],dev_timer7_bus_timer_tclk_clk:[43,58],dev_timer7_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer7_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer7_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer7_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer7_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer7_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer7_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer7_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer7_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer7_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer7_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer7_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer7_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer7_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer7_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer7_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer7_timer_hclk_clk:[28,75,89,104],dev_timer7_timer_pwm:28,dev_timer7_timer_tclk_clk:[28,75,89,104],dev_timer7_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer7_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:28,dev_timer7_timer_tclk_clk_parent_board_0_ext_refclk1_out:28,dev_timer7_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_timer7_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer7_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer7_timer_tclk_clk_parent_dmtimer_dmc1ms_main_6_timer_pwm:[75,89,104],dev_timer7_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:28,dev_timer7_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer7_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer7_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:28,dev_timer7_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer7_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer7_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer7_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer7_timer_tclk_clk_parent_main_timer_clksel_out7:[75,89,104],dev_timer7_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer7_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer8_bus_timer_hclk_clk:[43,58],dev_timer8_bus_timer_tclk_clk:[43,58],dev_timer8_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer8_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer8_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer8_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer8_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer8_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer8_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer8_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer8_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer8_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer8_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer8_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer8_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer8_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer8_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer8_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer8_timer_hclk_clk:[28,75,89,104],dev_timer8_timer_pwm:[28,75,89,104],dev_timer8_timer_tclk_clk:[28,75,89,104],dev_timer8_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer8_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:[28,75,89,104],dev_timer8_timer_tclk_clk_parent_board_0_ext_refclk1_out:[28,75,89,104],dev_timer8_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_timer8_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:[28,75,89,104],dev_timer8_timer_tclk_clk_parent_board_0_wkup_lf_clkin_out:75,dev_timer8_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer8_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer8_timer_tclk_clk_parent_cpsw_5xuss_main_0_cpts_genf0:75,dev_timer8_timer_tclk_clk_parent_cpsw_9xuss_main_0_cpts_genf0:[89,104],dev_timer8_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_timer8_timer_tclk_clk_parent_gluelogic_lpxosc_clkout:[89,104],dev_timer8_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer8_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer8_timer_tclk_clk_parent_hsdiv2_16fft_main_4_hsdivout2_clk:75,dev_timer8_timer_tclk_clk_parent_hsdiv3_16fft_main_15_hsdivout2_clk:[89,104],dev_timer8_timer_tclk_clk_parent_hsdiv3_16fft_main_4_hsdivout2_clk:[89,104],dev_timer8_timer_tclk_clk_parent_hsdiv4_16fft_main_0_hsdivout1_clk:[75,89,104],dev_timer8_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:[28,75,89,104],dev_timer8_timer_tclk_clk_parent_hsdiv4_16fft_main_3_hsdivout3_clk:[75,89,104],dev_timer8_timer_tclk_clk_parent_j7_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:[89,104],dev_timer8_timer_tclk_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_timer8_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer8_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer8_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer8_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer8_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf2:75,dev_timer8_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf3:75,dev_timer8_timer_tclk_clk_parent_navss256vcl_main_0_cpts0_genf4:75,dev_timer8_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf2:[89,104],dev_timer8_timer_tclk_clk_parent_navss512l_main_0_cpts0_genf3:[89,104],dev_timer8_timer_tclk_clk_parent_postdiv2_16fft_main_2_hsdivout6_clk:[75,89,104],dev_timer8_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer8_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timer9_bus_timer_hclk_clk:[43,58],dev_timer9_bus_timer_tclk_clk:[43,58],dev_timer9_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_0_bus_hsdiv_clkout3_clk:[43,58],dev_timer9_bus_timer_tclk_clk_parent_adpllljm_hsdiv_wrap_main_2_bus_hsdiv_clkout2_clk:[43,58],dev_timer9_bus_timer_tclk_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk5:[43,58],dev_timer9_bus_timer_tclk_clk_parent_adpllm_hsdiv_wrap_mcu_1_bus_hsdiv_clkout2_clk:[43,58],dev_timer9_bus_timer_tclk_clk_parent_board_0_bus_cpts_rft_clk_out:[43,58],dev_timer9_bus_timer_tclk_clk_parent_board_0_bus_ext_refclk1_out:[43,58],dev_timer9_bus_timer_tclk_clk_parent_board_0_bus_mcu_ext_refclk0_out:[43,58],dev_timer9_bus_timer_tclk_clk_parent_board_0_hfosc1_clk_out:[43,58],dev_timer9_bus_timer_tclk_clk_parent_gluelogic_lfosc_clk_bus_out:[43,58],dev_timer9_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_timer9_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_timer9_bus_timer_tclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_timer9_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf2_0:58,dev_timer9_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf3_0:58,dev_timer9_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf4_0:58,dev_timer9_bus_timer_tclk_clk_parent_navss256l_main_0_bus_cpts0_genf5_0:58,dev_timer9_timer_hclk_clk:[28,75,89,104],dev_timer9_timer_pwm:28,dev_timer9_timer_tclk_clk:[28,75,89,104],dev_timer9_timer_tclk_clk_parent_board_0_cp_gemac_cpts0_rft_clk_out:28,dev_timer9_timer_tclk_clk_parent_board_0_cpts0_rft_clk_out:28,dev_timer9_timer_tclk_clk_parent_board_0_ext_refclk1_out:28,dev_timer9_timer_tclk_clk_parent_board_0_mcu_ext_refclk0_out:28,dev_timer9_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf0:28,dev_timer9_timer_tclk_clk_parent_cpsw_3guss_main_0_cpts_genf1:28,dev_timer9_timer_tclk_clk_parent_dmtimer_dmc1ms_main_8_timer_pwm:[75,89,104],dev_timer9_timer_tclk_clk_parent_gluelogic_hfosc0_clkout:28,dev_timer9_timer_tclk_clk_parent_gluelogic_rcosc_clkout:28,dev_timer9_timer_tclk_clk_parent_hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk8:28,dev_timer9_timer_tclk_clk_parent_hsdiv4_16fft_main_1_hsdivout3_clk:28,dev_timer9_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf1:28,dev_timer9_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf2:28,dev_timer9_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf3:28,dev_timer9_timer_tclk_clk_parent_k3_cpts_main_0_cpts_genf4:28,dev_timer9_timer_tclk_clk_parent_main_timer_clksel_out9:[75,89,104],dev_timer9_timer_tclk_clk_parent_postdiv4_16ff_main_0_hsdivout7_clk:28,dev_timer9_timer_tclk_clk_parent_postdiv4_16ff_main_2_hsdivout6_clk:28,dev_timermgr0_vclk_clk:28,dev_timesync_event_introuter0_intr_clk:28,dev_timesync_intrtr0_bus_intr_clk:[43,58],dev_timesync_intrtr0_intr_clk:[89,104],dev_uart0_bus_fclk_clk:[43,58],dev_uart0_bus_vbusp_clk:[43,58],dev_uart0_fclk_clk:[28,75,89,104],dev_uart0_fclk_clk_parent_hsdiv4_16fft_main_1_hsdivout1_clk:28,dev_uart0_fclk_clk_parent_usart_programmable_clock_divider_out0:28,dev_uart0_vbusp_clk:[28,75,89,104],dev_uart1_bus_fclk_clk:[43,58],dev_uart1_bus_vbusp_clk:[43,58],dev_uart1_fclk_clk:[28,75,89,104],dev_uart1_fclk_clk_parent_hsdiv4_16fft_main_1_hsdivout1_clk:28,dev_uart1_fclk_clk_parent_usart_programmable_clock_divider_out1:28,dev_uart1_vbusp_clk:[28,75,89,104],dev_uart2_bus_fclk_clk:[43,58],dev_uart2_bus_vbusp_clk:[43,58],dev_uart2_fclk_clk:[28,75,89,104],dev_uart2_fclk_clk_parent_hsdiv4_16fft_main_1_hsdivout1_clk:28,dev_uart2_fclk_clk_parent_usart_programmable_clock_divider_out2:28,dev_uart2_vbusp_clk:[28,75,89,104],dev_uart3_fclk_clk:[28,75,89,104],dev_uart3_fclk_clk_parent_hsdiv4_16fft_main_1_hsdivout1_clk:28,dev_uart3_fclk_clk_parent_usart_programmable_clock_divider_out3:28,dev_uart3_vbusp_clk:[28,75,89,104],dev_uart4_fclk_clk:[28,75,89,104],dev_uart4_fclk_clk_parent_hsdiv4_16fft_main_1_hsdivout1_clk:28,dev_uart4_fclk_clk_parent_usart_programmable_clock_divider_out4:28,dev_uart4_vbusp_clk:[28,75,89,104],dev_uart5_fclk_clk:[28,75,89,104],dev_uart5_fclk_clk_parent_hsdiv4_16fft_main_1_hsdivout1_clk:28,dev_uart5_fclk_clk_parent_usart_programmable_clock_divider_out5:28,dev_uart5_vbusp_clk:[28,75,89,104],dev_uart6_fclk_clk:[28,75,89,104],dev_uart6_fclk_clk_parent_hsdiv4_16fft_main_1_hsdivout1_clk:28,dev_uart6_fclk_clk_parent_usart_programmable_clock_divider_out6:28,dev_uart6_vbusp_clk:[28,75,89,104],dev_uart7_fclk_clk:[75,89,104],dev_uart7_vbusp_clk:[75,89,104],dev_uart8_fclk_clk:[75,89,104],dev_uart8_vbusp_clk:[75,89,104],dev_uart9_fclk_clk:[75,89,104],dev_uart9_vbusp_clk:[75,89,104],dev_ufs0_ufshci_hclk_clk:[89,104],dev_ufs0_ufshci_mclk_clk:[89,104],dev_ufs0_ufshci_mclk_clk_parent_board_0_ext_refclk1_out:[89,104],dev_ufs0_ufshci_mclk_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_ufs0_ufshci_mclk_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_ufs0_ufshci_mclk_clk_parent_postdiv3_16fft_main_1_hsdivout6_clk:[89,104],dev_ufs0_ufshci_mphy_refclk:[89,104],dev_usb0_aclk_clk:[28,75,89,104],dev_usb0_buf_clk:[75,89,104],dev_usb0_clk_lpm_clk:[28,75,89,104],dev_usb0_pclk_clk:[28,75,89,104],dev_usb0_pipe_refclk:[28,75,89,104],dev_usb0_pipe_refclk_parent_wiz16b4m4cs_main_0_ip3_ln1_refclk:[89,104],dev_usb0_pipe_refclk_parent_wiz16b4m4cs_main_3_ip3_ln1_refclk:[89,104],dev_usb0_pipe_refclk_parent_wiz16b8m4ct2_main_1_ip3_ln1_refclk:75,dev_usb0_pipe_refclk_parent_wiz16b8m4ct2_main_1_ip3_ln3_refclk:75,dev_usb0_pipe_rxclk:[28,75,89,104],dev_usb0_pipe_rxclk_parent_wiz16b4m4cs_main_0_ip3_ln1_rxclk:[89,104],dev_usb0_pipe_rxclk_parent_wiz16b4m4cs_main_3_ip3_ln1_rxclk:[89,104],dev_usb0_pipe_rxfclk:[28,75,89,104],dev_usb0_pipe_rxfclk_parent_wiz16b4m4cs_main_0_ip3_ln1_rxfclk:[89,104],dev_usb0_pipe_rxfclk_parent_wiz16b4m4cs_main_3_ip3_ln1_rxfclk:[89,104],dev_usb0_pipe_txclk:[28,75,89,104],dev_usb0_pipe_txfclk:[28,75,89,104],dev_usb0_pipe_txfclk_parent_wiz16b4m4cs_main_0_ip3_ln1_txfclk:[89,104],dev_usb0_pipe_txfclk_parent_wiz16b4m4cs_main_3_ip3_ln1_txfclk:[89,104],dev_usb0_pipe_txmclk:[28,75,89,104],dev_usb0_pipe_txmclk_parent_wiz16b4m4cs_main_0_ip3_ln1_txmclk:[89,104],dev_usb0_pipe_txmclk_parent_wiz16b4m4cs_main_3_ip3_ln1_txmclk:[89,104],dev_usb0_usb2_apb_pclk_clk:[28,75,89,104],dev_usb0_usb2_refclock_clk:[28,75,89,104],dev_usb0_usb2_refclock_clk_parent_board_0_hfosc1_clk_out:[75,89,104],dev_usb0_usb2_refclock_clk_parent_gluelogic_hfosc0_clkout:[28,75,89,104],dev_usb0_usb2_refclock_clk_parent_hsdiv4_16fft_main_2_hsdivout4_clk:28,dev_usb1_aclk_clk:[89,104],dev_usb1_buf_clk:[89,104],dev_usb1_clk_lpm_clk:[89,104],dev_usb1_pclk_clk:[89,104],dev_usb1_pipe_refclk:[89,104],dev_usb1_pipe_refclk_parent_wiz16b4m4cs_main_1_ip3_ln1_refclk:[89,104],dev_usb1_pipe_refclk_parent_wiz16b4m4cs_main_2_ip3_ln1_refclk:[89,104],dev_usb1_pipe_rxclk:[89,104],dev_usb1_pipe_rxclk_parent_wiz16b4m4cs_main_1_ip3_ln1_rxclk:[89,104],dev_usb1_pipe_rxclk_parent_wiz16b4m4cs_main_2_ip3_ln1_rxclk:[89,104],dev_usb1_pipe_rxfclk:[89,104],dev_usb1_pipe_rxfclk_parent_wiz16b4m4cs_main_1_ip3_ln1_rxfclk:[89,104],dev_usb1_pipe_rxfclk_parent_wiz16b4m4cs_main_2_ip3_ln1_rxfclk:[89,104],dev_usb1_pipe_txclk:[89,104],dev_usb1_pipe_txfclk:[89,104],dev_usb1_pipe_txfclk_parent_wiz16b4m4cs_main_1_ip3_ln1_txfclk:[89,104],dev_usb1_pipe_txfclk_parent_wiz16b4m4cs_main_2_ip3_ln1_txfclk:[89,104],dev_usb1_pipe_txmclk:[89,104],dev_usb1_pipe_txmclk_parent_wiz16b4m4cs_main_1_ip3_ln1_txmclk:[89,104],dev_usb1_pipe_txmclk_parent_wiz16b4m4cs_main_2_ip3_ln1_txmclk:[89,104],dev_usb1_usb2_apb_pclk_clk:[89,104],dev_usb1_usb2_refclock_clk:[89,104],dev_usb1_usb2_refclock_clk_parent_board_0_hfosc1_clk_out:[89,104],dev_usb1_usb2_refclock_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_usb3ss0_bus_bus_clk:[43,58],dev_usb3ss0_bus_hsic_clk_clk:[43,58],dev_usb3ss0_bus_phy2_refclk960m_clk:[43,58],dev_usb3ss0_bus_pipe3_txb_clk:[43,58],dev_usb3ss0_bus_pipe3_txb_clk_parent_clockmux_usb0_pipe3_clk_sel_div_bus_wkup_rcosc_12p5m_clk:58,dev_usb3ss0_bus_pipe3_txb_clk_parent_usb0_pipe3_clk_sel_div_bus_wkup_rcosc_12p5m_clk:43,dev_usb3ss0_bus_pipe3_txb_clk_parent_wiz8b2m4vsb_main_0_bus_ln0_txclk:[43,58],dev_usb3ss0_bus_ref_clk:[43,58],dev_usb3ss0_bus_ref_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk48:[43,58],dev_usb3ss0_bus_ref_clk_parent_clockmux_hfosc_sel_bus_out0:58,dev_usb3ss0_bus_ref_clk_parent_hfosc_sel_bus_out0:43,dev_usb3ss0_bus_susp_clk:[43,58],dev_usb3ss0_bus_utmi_clk_clk:[43,58],dev_usb3ss1_bus_bus_clk:[43,58],dev_usb3ss1_bus_hsic_clk_clk:[43,58],dev_usb3ss1_bus_phy2_refclk960m_clk:[43,58],dev_usb3ss1_bus_pipe3_txb_clk:[43,58],dev_usb3ss1_bus_ref_clk:[43,58],dev_usb3ss1_bus_ref_clk_parent_adpllljm_wrap_main_1_bus_clkout_clk48:[43,58],dev_usb3ss1_bus_ref_clk_parent_clockmux_hfosc_sel_bus_out0:58,dev_usb3ss1_bus_ref_clk_parent_hfosc_sel_bus_out0:43,dev_usb3ss1_bus_susp_clk:[43,58],dev_usb3ss1_bus_utmi_clk_clk:[43,58],dev_vpac0_clk:[89,104],dev_vpac0_pll_dco_clk:[89,104],dev_vpfe0_ccd_pclk_clk:[89,104],dev_vpfe0_vpfe_clk:[89,104],dev_vtm0_fix_ref2_clk:28,dev_vtm0_fix_ref_clk:28,dev_vtm0_vbusp_clk:28,dev_wkup_cbass0_bus_wkup_mcu_pll_out_2_clk:[43,58],dev_wkup_cbass0_bus_wkup_mcu_pll_out_4_clk:[43,58],dev_wkup_cbass_fw0_bus_wkup_mcu_pll_out_2_clk:[43,58],dev_wkup_ctrl_mmr0_bus_vbusp_clk:[43,58],dev_wkup_ddpa0_ddpa_clk:[75,89,104],dev_wkup_dmsc0_bus_dap_clk:58,dev_wkup_dmsc0_bus_ext_clk:58,dev_wkup_dmsc0_bus_func_32k_rc_clk:58,dev_wkup_dmsc0_bus_func_32k_rt_clk:58,dev_wkup_dmsc0_bus_func_mosc_clk:58,dev_wkup_dmsc0_bus_sec_efc_fclk:58,dev_wkup_dmsc0_bus_vbus_clk:58,dev_wkup_ecc_aggr0_bus_aggr_clk:[43,58],dev_wkup_esm0_bus_clk:[43,58],dev_wkup_esm0_clk:[75,89,104],dev_wkup_gpio0_bus_mmr_clk:[43,58],dev_wkup_gpio0_bus_mmr_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk4:[43,58],dev_wkup_gpio0_bus_mmr_clk_parent_k3_pll_ctrl_wrap_wkup_0_bus_chip_div1_clk_clk4_dup0:[43,58],dev_wkup_gpio0_bus_mmr_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_12p5m_clk:[43,58],dev_wkup_gpio0_bus_mmr_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_rcosc_32k_clk:[43,58],dev_wkup_gpio0_mmr_clk:[75,89,104],dev_wkup_gpio0_mmr_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_wkup_gpio0_mmr_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_wkup_gpio0_mmr_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6:75,dev_wkup_gpio0_mmr_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6_dup0:75,dev_wkup_gpio1_mmr_clk:[75,89,104],dev_wkup_gpio1_mmr_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_12p5m_clk:75,dev_wkup_gpio1_mmr_clk_parent_j7vc_wakeup_16ff_wkup_0_wkup_rcosc_32k_clk:75,dev_wkup_gpio1_mmr_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6:75,dev_wkup_gpio1_mmr_clk_parent_k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk6_dup0:75,dev_wkup_gpiomux_intrtr0_bus_intr_clk:[43,58],dev_wkup_gpiomux_intrtr0_intr_clk:[89,104],dev_wkup_i2c0_bus_clk:[43,58],dev_wkup_i2c0_bus_piscl:58,dev_wkup_i2c0_bus_pisys_clk:[43,58],dev_wkup_i2c0_bus_pisys_clk_parent_adpllm_hsdiv_wrap_mcu_0_bus_hsdiv_clkout3_clk:[43,58],dev_wkup_i2c0_bus_pisys_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_wkup_i2c0_clk:[75,89,104],dev_wkup_i2c0_piscl:[75,89,104],dev_wkup_i2c0_pisys_clk:[75,89,104],dev_wkup_i2c0_pisys_clk_parent_gluelogic_hfosc0_clkout:[89,104],dev_wkup_i2c0_pisys_clk_parent_hsdiv4_16fft_mcu_1_hsdivout3_clk:[89,104],dev_wkup_i2c0_porscl:[75,89,104],dev_wkup_pllctrl0_bus_pll_clkout_clk:[43,58],dev_wkup_pllctrl0_bus_pll_refclk_clk:[43,58],dev_wkup_pllctrl0_bus_vbus_slv_refclk_clk:[43,58],dev_wkup_porz_sync0_clk_12m_rc_clk:[75,89,104],dev_wkup_psc0_bus_clk:[43,58],dev_wkup_psc0_bus_slow_clk:[43,58],dev_wkup_psc0_clk:[75,89,104],dev_wkup_psc0_slow_clk:[75,89,104],dev_wkup_uart0_bus_fclk_clk:[43,58],dev_wkup_uart0_bus_fclk_clk_parent_clockmux_wkupusart_clk_sel_bus_out0:58,dev_wkup_uart0_bus_fclk_clk_parent_mx_wakeup_gs80_wkup_0_bus_wkup_osc0_clk:[43,58],dev_wkup_uart0_bus_fclk_clk_parent_wkupusart_clk_sel_bus_out0:43,dev_wkup_uart0_bus_vbusp_clk:[43,58],dev_wkup_uart0_fclk_clk:[75,89,104],dev_wkup_uart0_fclk_clk_parent_gluelogic_hfosc0_clkout:[75,89,104],dev_wkup_uart0_fclk_clk_parent_wkupusart_clk_sel_out0:[75,89,104],dev_wkup_uart0_vbusp_clk:[75,89,104],dev_wkup_vtm0_bus_fix_ref_clk:[43,58],dev_wkup_vtm0_bus_vbusp_clk:[43,58],dev_wkup_vtm0_fix_ref2_clk:[75,89,104],dev_wkup_vtm0_fix_ref_clk:[75,89,104],dev_wkup_vtm0_vbusp_clk:[75,89,104],dev_wkup_wakeup0_pll_ctrl_wkup_clk24_clk:75,dev_wkup_wakeup0_wkup_rcosc_12p5m_clk:75,dev_wkup_wakeup0_wkup_rcosc_32k_clk:75,develop:128,devgrp:[22,23,24,27],devgrp_00:[42,57,73,88,102,117,119],devgrp_01:[42,57,73,88,102,117,119],devgrp_02:119,devgrp_03:119,devgrp_04:119,devgrp_05:119,devgrp_06:119,devgrp_al:119,devgrp_boardcfg:27,devgrp_devic:27,devgrp_t:[21,22,23,24,119],devgrp_valid:27,devic:[4,5,7,8,9,10,11,12,13,14,15,17,18,19,21,24,27,32,39,40,47,54,55,63,70,71,74,79,86,93,100,115,121,123,125,126,129,130],device_id:[5,27],device_off:27,device_on:27,devstat:[22,34,49,65,81,95,110],df2ff3b26e37396b932efde77b1a4bea:128,diagram:[0,2,124,129],did:121,dies:13,differ:[0,2,5,11,18,19,21,22,23,32,34,47,49,63,65,79,81,93,95,108,110,120,121,122,123,124],differenti:[2,121,123],direct:[28,41,43,56,58,72,75,87,89,101,104,116,123,126],directli:[2,8,11,12,120],directori:[19,128],dirstring_typ:[19,128],disabl:[5,6,8,10,12,13,19,21,27,123,128],disable_main_nav_secure_proxi:21,discard:[11,18],discoveri:23,discuss:[21,119],dispc_intr_req_0:[48,64],dispc_intr_req_1:[48,64],disregard:2,distinct:128,distinguish:[13,19,128],distinguished_nam:[19,128],distribut:129,div2:13,div3:13,div4:13,divid:[5,11,13,22],dkek:24,dkek_allowed_host:24,dkek_config:24,dm2dmsc:[93,101],dma:[0,2,12,74,120],dma_event_intr:[48,64,80,94,109],dma_pvu0_exp_intr:80,dmass0_bcdma_0:[30,33,38],dmass0_pktdma_0:[30,38],dmass0_ringacc_0:38,dmsc2dm:[93,101],dmsc:[0,3,9,11,13,16,18,23,24,29,30,31,32,33,37,38,44,45,46,47,48,51,52,53,59,60,62,63,64,67,68,69,76,77,78,79,80,83,84,85,90,91,92,93,94,97,98,99,105,106,107,108,109,112,113,114,120,129],document:[0,13,14,15,17,18,20,23,24,28,34,41,43,49,56,58,65,72,75,81,87,89,95,101,104,110,116,119,120,121,122,123,124,127,128,129,130],doe:[0,3,5,7,8,12,13,19,23,24,36,119,120,122,123,126,128],domain:[0,6,7,8,42,57,73,74,88,102,117,119,125,130],domgrp:[103,118],domgrp_00:[103,118,121],domgrp_01:[103,118,121],domgrp_02:121,domgrp_03:121,domgrp_04:121,domgrp_05:121,domgrp_06:121,domgrp_compat:[7,103,118,121],domgrp_t:[7,121],don:[6,119],done:[5,13,34,49,65,81,95,110,120,123],doorbel:11,doubl:21,down:[13,119],dqhgyaq2y4gffcq0t1yabcyxex9eaxt71f:[19,128],drbit:128,driven:0,driver:[5,6,8,10,22,23,27],dru:23,dsi_0_func_intr:[94,109],dsp:[0,6],dss:[49,65,95,110],dss_inst0_dispc_func_irq_proc0:[94,109],dss_inst0_dispc_func_irq_proc1:[94,109],dss_inst0_dispc_safety_error_irq_proc0:[94,109],dss_inst0_dispc_safety_error_irq_proc1:[94,109],dss_inst0_dispc_secure_irq_proc0:[94,109],dss_inst0_dispc_secure_irq_proc1:[94,109],dst_host_irq:8,dst_id:8,dst_thread:10,dual:[13,23],due:[2,5,6,12,13,21,27,120,122,124],dump:123,durat:13,dure:[12,13,19,23,27,34,40,42,49,55,57,65,71,73,81,88,95,102,110,117,119,122,128,129],each:[0,2,5,8,11,13,16,18,21,22,23,24,27,30,31,37,38,45,46,52,53,60,62,68,69,77,78,84,85,91,92,98,99,106,107,113,114,119,120,121,122,123,124,126,128],earli:[27,121],earlier:119,earliest:27,early_can:121,eas:[28,43,58,75,89,104],easili:[27,122],eavesdropp:126,ecap_int:[48,64,80,94,109],ecc:[0,126],ecc_intr_err_pend:[94,109],edit:23,editor:128,effect:[24,27,119,128],effici:[0,121],efus:[0,15,120,122,124,128],egress:126,einval:5,either:[2,11,13],el2:32,element:[8,11,21,23,24],elm_porocpsinterrupt_lvl:[48,64,80,94,109],els:5,elsiz:11,emailaddress:[19,128],emmcsdss_intr:[48,64,80,94,109],emmcss_intr:[80,94,109],empti:[3,5,6,7,13,21,22,23,24],emu_ctrl:12,emu_ctrl_fre:12,emu_ctrl_soft:12,emul:12,emupack:128,enabl:[0,2,3,5,6,8,10,11,12,13,15,17,19,21,22,24,27,123,126,128],encod:[11,13,19,23,120,128],encrypt:[14,21,22,23,24,120,122],end:[3,5,19,23,27,31,46,62,78,92,107,119,128],end_address:16,endian:[13,19,128],enforc:[13,24,122,124,126,127,128],engin:[0,120,126],enodev:5,ensur:[0,5,19,21,22,23,24,124,129],entir:[27,103,118,119],entiti:[0,5,6,10,13,21,23,24,32,39,41,47,54,56,63,70,72,79,86,87,93,100,101,108,115,116,123],entitl:0,entri:[11,12,23,39,54,70,86,100,115,122,129],enumer:[2,19,22,23,28,43,58,75,89,104],eoe:[12,48,64,80,94,109],epwm_etint:[48,64,80,94,109],epwm_synco_o:33,epwm_tripzint:[48,64,80,94,109],eqep_int:[48,64,80,94,109],equal:[5,10,119,128],equival:[0,7],eras:14,err_level:[94,109],errataid:11,error:[7,9,11,12,23,27,33,41,48,56,64,72,80,87,94,101,109,116],esd:23,esm_int_cfg_lvl:[94,109],esm_int_hi_lvl:[94,109],esm_int_low_lvl:[94,109],esm_pls_event0:[33,48,64,80,94,109],esm_pls_event1:[33,48,64,80,94,109],esm_pls_event2:[33,48,64,80,94,109],especi:27,essenti:[3,5,6,7,13,21,22,23,24],establish:[13,124],etc:[0,13,27,119,123],evalu:5,even:[2,11,12,24,32,47,63,79,93,108,119,120,122,128],event:[0,7,8,9,11,12,13,22,23,27],event_pend_intr:[48,64,80,94,109],everi:[0,13,23,123],everyon:[31,46,62,78,92,107],everyth:119,evm:128,evnt_pend:[80,94,109],exact:[21,34,49,65,81,95,110],exactli:21,exampl:[2,3,6,19,21,22,23,119,121,123,126],exceed:5,except:[3,13,123,129],exchang:6,exclus:[6,27,119,124],exclusive_busi:27,exclusive_devic:27,exe:128,execut:[0,5,8,11,13,27,122,128],exist:[9,10,11,12,22,23],exit:[23,128],exp_intr:[48,64],expans:[9,10],expect:[2,13,21,22,23,119,122,128],explain:13,explicitli:[22,23,124],expon:27,expos:120,extboot_statu:3,extend:[0,3,4,5,12,19,21,27,74,125,130],extens:[2,17,18,124,127],extern:[5,12,18,22],extra:5,extract:[17,122],extrem:[3,13,23],fact:6,factor:21,factori:[120,122],fail:[5,6,13,16,18,20,22,23,27],failur:[2,5,13,16,23],fals:[15,23,31,46,62,78,92,107],famili:[0,5,6,13,23,122,123,126,128,130],familiar:[119,120],faq:[125,130],far:[3,8],fashion:128,fast:[13,27],faster:[23,57,73,88,102,117],fault:21,favour:123,fdepth:[12,27],fdq0:27,fdq1:27,fdq2:27,fdq3:27,featur:[0,2,5,21,23,126,129],fed:120,fenc:[21,23],fetch:[3,12,27],few:[0,19],field:[2,5,6,8,10,13,14,16,17,18,21,23,24,27,119,120,121,122,124,129],fieldvalid:19,fifo:12,figur:124,file:[23,128],fill:[17,18,19,128],filter:27,finalstatu:5,find:[5,8,128],finer:5,firewal:[2,3,4,8,9,10,11,12,21,23,24,27,74,120,125,126,128,129,130],firmwar:[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,20,22,23,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,125,126,127,129,130],first:[2,13,22,23,24,119,127,128],fix:[21,22,23,24,122,124],flag:[5,6,7,19,22,23,24,42,57,73,88,102,103,117,118,120,128],flagsvalid:19,flat:24,flexbl:[17,18],flexibl:124,flow:[5,23,27,48,64,80,94,109,119,124,127],flow_index:12,flow_start:12,flowid_cnt:12,flowid_start:12,flush:13,fly:8,focu:121,folder:128,follow:[2,3,6,8,11,12,13,16,18,19,21,22,23,24,27,28,34,40,43,49,55,58,65,71,75,81,89,95,104,110,119,120,121,123,124,126,127,128],forc:13,form:[23,31,46,62,78,92,107],format:[0,2,10,13,17,18,19,21,22,23,24,119,121,123,128],formula:11,forward:5,found:[5,23,27,123,128],foundpar:5,four:128,fraction:[21,34,49,65,81,95,110],fragment:121,framework:19,free:[8,12,13,129],freed:[8,10],freeli:126,freq:[5,34,49,65,81,95,110],freq_hz:5,frequenc:[2,22,27,34,49,65,81,95,110],from:[2,3,5,6,7,8,10,11,12,13,15,16,17,18,19,21,22,23,24,27,28,31,34,43,46,49,58,62,65,75,78,81,89,92,95,104,107,110,120,121,122,123,124,126,127,128,129],ftbool:21,full:[3,5,6,7,13,19,21,22,23,24,119,124,126,128],fulli:10,fundament:13,further:[18,41,56,72,87,101,116,119,122,126,128],futur:[2,9,10,19,21,24,27],fwl:123,fwl_id:16,gain:126,gcfg:[12,27],gen_ign_bootvector:13,gen_level:[94,109],gener:[0,6,8,11,12,14,16,20,23,27,42,57,73,88,102,103,117,118,119,120,121,122,124,126,128,130],generic_debug:27,generic_ipc:38,get:[2,3,5,6,22,27,119],get_clock_par:5,get_freq_req:5,get_freq_resp:5,get_processor_config:13,get_processor_control:13,get_processor_wake_reason:13,get_reset_cfg:27,getuid:128,gevt:[33,48,64,80,94,109],gic500ss_main_0:[56,72],gic_output_waker_gic_pwr0_wake_request:[94,109],gic_spi_64:87,gic_spi_65:87,gic_spi_66:87,gic_spi_67:87,gic_spi_68:87,gic_spi_69:87,gic_spi_70:87,gic_spi_71:87,gic_spi_72:87,gic_spi_73:87,gicss0:41,give:[2,5,9,13,34,49,65,81,95,110],given:[5,22,119,120],glitch:[13,22],global:[8,11,27],global_ev:8,global_soft_lock:15,goe:[2,13],going:13,gpio:[23,33,48,64],gpio_bank:[33,48,64,80,94,109],gpmc_sinterrupt:[48,64,80,94,109],gpu:[95,110],gpu_0:[46,47,56,62,63,72,92,93,101,107,108,116],gpu_1:[47,56,63,72],gpu_irq:[48,64],gqe843yqv0sag:[19,128],grant:[8,11,12],granular:[13,27,28,43,58,75,89,104,122],greater:[5,10,11,12,23],group:[21,24,27,74,125,130],gtc_push_ev:[33,48,64,80,94,109],guarante:[5,23,27],guid:[0,13,23,31,46,62,78,92,107,126],guidanc:[119,121],guidelin:23,had:[0,13],halt:13,hand:[13,20,129],handl:[0,6,7,8,12,13,19,27,31,46,62,78,92,107],handler:[22,23,27],handov:[4,125,130],handover_msg_send:24,handover_processor:13,handover_to_host_id:[24,129],handshak:6,happen:[2,128],hard:13,hardwar:[0,3,5,6,7,12,13,15,18,119,120,123],has:[0,2,5,6,13,15,18,20,23,24,27,28,43,58,75,89,104,119,120,122,123,124,126,129],hash:[19,124,127,128],have:[0,2,3,5,6,8,10,13,21,23,24,27,28,31,42,43,46,57,58,62,73,75,78,88,89,92,102,104,107,117,120,121,122,123,126,128],hdr:[3,5,6,7,8,9,10,11,12,13,14,15,16,17,20,21,22,23,24],header:[3,5,6,7,8,9,10,11,12,13,14,15,16,17,20,22,23,24,120,123],help:[13,23,123,128],henc:13,henceforth:0,here:[13,24,28,43,58,75,89,104,119,124],heterogen:0,hex:[19,123,128],hexadecim:128,hfosc:[22,34,49,65,81,95,110],hierarchi:21,high:[2,3,11,12,21,22,24,119,124,126,128],high_prior:[56,72,87,101,116],higher:[13,128],highli:21,his:[19,128],hit:13,hlo:[8,119],hold:[5,13],holder:[19,128],hole:21,home:[23,128],hop:8,host:[0,2,3,5,6,7,8,9,10,11,12,13,16,20,21,22,23,27,30,31,33,35,38,41,45,46,48,50,51,53,56,60,62,64,66,67,69,72,74,77,78,80,82,83,85,87,91,92,94,96,97,99,101,106,107,109,111,112,114,116,120,122,126,128,129],host_cfg:23,host_cfg_entri:23,host_hierarchi:24,host_hierarchy_entri:24,host_id:[13,23,24,35,50,66,82,96,111],host_id_al:[23,47,63],host_perm:24,host_system_error:[80,94,109],how:[0,6,12,13,19,21,22,23,24,27,122,124,126,128],howev:[0,2,6,11,13,18,21,22,23,27,28,43,58,75,89,104,124,129],hpb_intr:[94,109],hsdiv0:[34,81,95,110],hsdiv1:[34,49,65,81,95,110],hsdiv2:[34,49,65,81,95,110],hsdiv3:[34,49,65,81,95,110],hsdiv4:[34,49,65,81,95,110],hsdiv5:[34,81,95,110],hsdiv6:[34,81,95,110],hsdiv7:[34,81,95,110],hsdiv8:[34,81,95,110],html:23,http:[19,23],huge:27,human:[3,27],hw_read_lock:15,hw_write_lock:15,hyp:32,hypervisor:11,hypothet:[5,13],i00_lvl:[48,64],i01_lvl:[48,64],i02_lvl:[48,64],i03_lvl:[48,64],i04_lvl:[48,64],i05_lvl:[48,64],i06_lvl:[48,64],i07_lvl:[48,64],i08_lvl:[48,64],i09_lvl:[48,64],i10_lvl:[48,64],i11_lvl:[48,64],i12_lvl:[48,64],i13_lvl:[48,64],i14_lvl:[48,64],i15_lvl:[48,64],i2023:11,i2c:119,i3c__int:[80,94,109],ia_global_ev:27,ia_id:8,ia_vint:27,ia_vint_status_bit:27,icss:[6,47,63],icssg0_rx:[37,52,68],icssg0_tx:[37,52,68],icssg1_rx:[37,52,68],icssg1_tx:[37,52,68],icssg2_rx:[52,68],icssg2_tx:[52,68],icssg:[32,46,62,93,108],icssg_0:[32,41,47,56,63,72,93,101,108,116],icssg_0_rx_chan:[30,38],icssg_0_tx_chan:[30,38],icssg_1:[47,56,63,72],icssg_1_rx_chan:[30,38],icssg_1_tx_chan:[30,38],icssg_2:[47,56,63,72],identif:[32,41,47,56,63,72,79,87,93,101,108,116,119,121],identifi:[2,5,6,13,17,19,22,23,27,31,46,62,74,78,92,103,107,118,120,121,123,128],ids:[27,123],iec:19,ignor:[5,6,11,12,15,24,27,120,128],imag:[3,124,127],image_address_hi:13,image_address_lo:13,image_s:13,images:19,immedi:[21,27],impact:[13,27,119],implement:[0,2,3,5,6,7,8,11,13,21,22,23,24,28,43,58,75,89,104,123],impli:[13,22,28,31,43,46,58,62,75,78,89,92,104,107,119,122],improv:124,in_intr:[48,64,80,94,109],inact:21,includ:[0,2,5,6,8,12,19,119,123,128,129],inclus:23,incom:[28,43,58,75,89,104],increas:[11,119,124,127],increment:128,indefinit:126,independ:[3,6,13,24,122,124],index:[8,9,10,11,12,15,16,23,27,30,33,38,45,48,51,53,60,64,67,69,77,80,83,85,91,94,97,99,106,109,112,114],indic:[2,3,5,6,12,13,15,16,18,19,20,24,27,32,47,63,79,93,108,119,128],individu:[6,9,11,12,34,49,65,81,95,110,122,128],infifo_level:[94,109],info:[3,12,16,27],inform:[0,3,5,6,8,9,10,11,12,13,14,15,17,19,20,23,27,28,29,30,31,32,33,34,35,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,128,129],infrastructur:3,ingress:126,ingroup_level:[94,109],init:[27,34,42,49,57,65,73,81,88,95,102,110,117],init_err:[48,64],initalvector:19,initi:[2,3,5,13,19,24,27,42,57,73,88,102,117,120,123,124,127,129],initialvector:[19,124],inlin:23,inline_sort:23,input:[5,8,11,12,14,22,23,27,28,30,34,37,38,43,45,49,51,52,53,58,60,65,67,68,69,75,77,81,83,84,85,89,91,95,97,98,99,104,106,110,112,113,114,120,121,127],insecur:21,insert:2,insid:[27,120,128],instal:128,instanc:[13,14,22,23,119,121,126],instead:[5,23,119,120,122,124,127],instrument:[0,4,128,130],insur:6,int_cal_l:[48,64],intact:2,intaggr_levi_pend:[33,80,94,109],intaggr_vintr_pend:[48,64,80,94,109],integ:[19,128],integ_check:2,integr:[21,23,24,124,127],intend:[3,24,32,47,63,79,93,108],intent:[2,16],intention:21,interact:[0,3,13],interchang:0,interconnect:[19,31,46,62,78,92,107,123],interest:[5,27,119],interfac:[0,4,13,17,27,33,48,64,80,94,109,120,123,130],intern:[5,8,11,12,13,16,23,31,46,62,78,92,107,129],interpret:[0,2,5,12,19,27,130],interrupt:[0,2,8,13,27,74],intput:23,intr:[33,48,64,80,94,109],intr_224:[87,101,116],intr_225:[87,101,116],intr_226:[87,101,116],intr_227:[87,101,116],intr_64:[41,87,101,116],intr_65:[41,87,101,116],intr_66:[41,87,101,116],intr_67:[41,87,101,116],intr_70:101,intr_71:101,intr_72:101,intr_73:101,intr_74:101,intr_75:101,intr_done_level:[48,64,80,94,109],intr_pend:[48,64,80,94,109],intr_spi:[48,64,80,94,109],intr_wwd:[94,109],introduc:[0,119,123],introduct:130,invalid:[5,12,15,19,21,23,27,48,64,80,94,109,119],invalid_st:27,invas:13,invoc:13,invok:[6,13,22,119,120,121,129],involv:[13,18,22,23],invovl:13,io_pvu0_exp_intr:80,io_tbu0_ras_intr:[94,109],ir_input:27,ir_inst:23,ir_output:27,iram:129,irbit:128,irq:[4,6,11,12,27,41,56,72,80,87,94,101,109,116,123],irq_dst_host_irq:27,irq_dst_id:27,irq_global_ev:27,irq_ia_id:27,irq_ia_init:27,irq_ia_map_vint:27,irq_ia_oes_get:27,irq_ia_oes_set:27,irq_ia_unmap_vint:27,irq_init:27,irq_ir_cfg:27,irq_ir_clr:27,irq_ir_init:27,irq_releaes_respons:8,irq_releas:[8,27],irq_secondary_host:27,irq_set:[8,27],irq_set_respons:8,irq_src_id:27,irq_src_index:27,irq_vint:27,irq_vint_status_bit_index:27,irrespect:122,isc:[11,129],islana:32,island:[32,47,63,79,93,108],iso:19,isol:[6,21,22,24],issu:[5,7,120],iter:[11,13],iterationcnt:[19,124],itm:[21,27],its:[2,5,9,11,12,13,19,120,126,128],itself:[13,126],itu:19,j7200:[13,130],j7200_dev_a72ss0_core0:[75,76,88],j7200_dev_a72ss0_core0_0:[75,76,88],j7200_dev_a72ss0_core0_1:[75,76,88],j7200_dev_atl0:[75,76,88],j7200_dev_board0:[75,76,88],j7200_dev_cmpevent_intrtr0:[75,76,80,86,88],j7200_dev_compute_cluster0:[75,76,88],j7200_dev_compute_cluster0_cfg_wrap:[76,88],j7200_dev_compute_cluster0_clec:[76,88],j7200_dev_compute_cluster0_core_cor:[76,88],j7200_dev_compute_cluster0_debug_wrap:[76,88],j7200_dev_compute_cluster0_divh2_divh0:[76,88],j7200_dev_compute_cluster0_divp_tft0:[76,88],j7200_dev_compute_cluster0_dmsc_wrap:[76,88],j7200_dev_compute_cluster0_en_msmc_domain:[76,88],j7200_dev_compute_cluster0_gic500ss:[76,80,88],j7200_dev_compute_cluster0_pbist_wrap:[75,76,88],j7200_dev_cpsw0:[75,76,80,88],j7200_dev_cpsw_tx_rgmii0:[75,76,88],j7200_dev_cpt2_aggr0:[75,76,88],j7200_dev_cpt2_aggr1:[75,76,88],j7200_dev_cpt2_aggr2:[75,76,88],j7200_dev_cpt2_aggr3:[75,76,88],j7200_dev_dcc0:[75,76,80,88],j7200_dev_dcc1:[75,76,80,88],j7200_dev_dcc2:[75,76,80,88],j7200_dev_dcc3:[75,76,80,88],j7200_dev_dcc4:[75,76,80,88],j7200_dev_dcc5:[75,76,80,88],j7200_dev_dcc6:[75,76,80,88],j7200_dev_ddr0:[75,76,80,88],j7200_dev_debugss_wrap0:[75,76,88],j7200_dev_ecap0:[75,76,80,88],j7200_dev_ecap1:[75,76,80,88],j7200_dev_ecap2:[75,76,80,88],j7200_dev_ehrpwm0:[75,76,80,88],j7200_dev_ehrpwm1:[75,76,80,88],j7200_dev_ehrpwm2:[75,76,80,88],j7200_dev_ehrpwm3:[75,76,80,88],j7200_dev_ehrpwm4:[75,76,80,88],j7200_dev_ehrpwm5:[75,76,80,88],j7200_dev_elm0:[75,76,80,88],j7200_dev_emif_data_0_vd:[76,88],j7200_dev_eqep0:[75,76,80,88],j7200_dev_eqep1:[75,76,80,88],j7200_dev_eqep2:[75,76,80,88],j7200_dev_esm0:[75,76,80,88],j7200_dev_ffi_main_infra_cbass_vd:[76,88],j7200_dev_ffi_main_ip_cbass_vd:[76,88],j7200_dev_ffi_main_rc_cbass_vd:[76,88],j7200_dev_gpio0:[75,76,80,88],j7200_dev_gpio2:[75,76,80,88],j7200_dev_gpio4:[75,76,80,88],j7200_dev_gpio6:[75,76,80,88],j7200_dev_gpiomux_intrtr0:[75,76,80,86,88],j7200_dev_gpmc0:[75,76,80,88],j7200_dev_gtc0:[75,76,80,88],j7200_dev_i2c0:[75,76,80,88],j7200_dev_i2c1:[75,76,80,88],j7200_dev_i2c2:[75,76,80,88],j7200_dev_i2c3:[75,76,80,88],j7200_dev_i2c4:[75,76,80,88],j7200_dev_i2c5:[75,76,80,88],j7200_dev_i2c6:[75,76,80,88],j7200_dev_i3c0:[75,76,80,88],j7200_dev_led0:[75,76,88],j7200_dev_main0:[76,88],j7200_dev_main2mcu_lvl_intrtr0:[76,80,86,88],j7200_dev_main2mcu_pls_intrtr0:[76,80,86,88],j7200_dev_main2wkupmcu_vd:[76,88],j7200_dev_mcan0:[75,76,80,88],j7200_dev_mcan10:[75,76,80,88],j7200_dev_mcan11:[75,76,80,88],j7200_dev_mcan12:[75,76,80,88],j7200_dev_mcan13:[75,76,80,88],j7200_dev_mcan14:[75,76,80,88],j7200_dev_mcan15:[75,76,80,88],j7200_dev_mcan16:[75,76,80,88],j7200_dev_mcan17:[75,76,80,88],j7200_dev_mcan1:[75,76,80,88],j7200_dev_mcan2:[75,76,80,88],j7200_dev_mcan3:[75,76,80,88],j7200_dev_mcan4:[75,76,80,88],j7200_dev_mcan5:[75,76,80,88],j7200_dev_mcan6:[75,76,80,88],j7200_dev_mcan7:[75,76,80,88],j7200_dev_mcan8:[75,76,80,88],j7200_dev_mcan9:[75,76,80,88],j7200_dev_mcasp0:[75,76,80,88],j7200_dev_mcasp1:[75,76,80,88],j7200_dev_mcasp2:[75,76,80,88],j7200_dev_mcspi0:[75,76,80,88],j7200_dev_mcspi1:[75,76,80,88],j7200_dev_mcspi2:[75,76,80,88],j7200_dev_mcspi3:[75,76,80,88],j7200_dev_mcspi4:[75,76,80,88],j7200_dev_mcspi5:[75,76,80,88],j7200_dev_mcspi6:[75,76,80,88],j7200_dev_mcspi7:[75,76,80,88],j7200_dev_mcu_adc0:[75,76,88],j7200_dev_mcu_adc1:[75,76,88],j7200_dev_mcu_cpsw0:[75,76,80,88],j7200_dev_mcu_cpt2_aggr0:[75,76,88],j7200_dev_mcu_dcc0:[75,76,88],j7200_dev_mcu_dcc1:[75,76,88],j7200_dev_mcu_dcc2:[75,76,88],j7200_dev_mcu_esm0:[75,76,88],j7200_dev_mcu_fss0:[76,88],j7200_dev_mcu_fss0_fsas_0:[75,76,88],j7200_dev_mcu_fss0_hyperbus1p0_0:[75,76,88],j7200_dev_mcu_fss0_ospi_0:[75,76,88],j7200_dev_mcu_fss0_ospi_1:[75,76,88],j7200_dev_mcu_i2c0:[75,76,88],j7200_dev_mcu_i2c1:[75,76,88],j7200_dev_mcu_i3c0:[75,76,88],j7200_dev_mcu_i3c1:[75,76,88],j7200_dev_mcu_mcan0:[75,76,88],j7200_dev_mcu_mcan1:[75,76,88],j7200_dev_mcu_mcspi0:[75,76,88],j7200_dev_mcu_mcspi1:[75,76,88],j7200_dev_mcu_mcspi2:[75,76,88],j7200_dev_mcu_navss0:[76,84,88],j7200_dev_mcu_navss0_intr_0:[75,76,80,86,88],j7200_dev_mcu_navss0_mcrc_0:[75,76,80,88],j7200_dev_mcu_navss0_modss:[75,76,88],j7200_dev_mcu_navss0_proxy0:[75,76,83,86,88],j7200_dev_mcu_navss0_ringacc0:[75,76,80,85,86,88],j7200_dev_mcu_navss0_udmap_0:[75,76,77,80,86,88],j7200_dev_mcu_navss0_udmass:[75,76,88],j7200_dev_mcu_navss0_udmass_inta_0:[75,76,80,86,88],j7200_dev_mcu_pbist0:[75,76,88],j7200_dev_mcu_pbist1:[75,76,88],j7200_dev_mcu_pbist2:[75,76,88],j7200_dev_mcu_r5fss0:[76,88],j7200_dev_mcu_r5fss0_core0:[75,76,80,88],j7200_dev_mcu_r5fss0_core1:[75,76,80,88],j7200_dev_mcu_rti0:[75,76,88],j7200_dev_mcu_rti1:[75,76,88],j7200_dev_mcu_sa2_ul0:[75,76,88],j7200_dev_mcu_timer0:[75,76,88],j7200_dev_mcu_timer1:[75,76,88],j7200_dev_mcu_timer2:[75,76,88],j7200_dev_mcu_timer3:[75,76,88],j7200_dev_mcu_timer4:[75,76,88],j7200_dev_mcu_timer5:[75,76,88],j7200_dev_mcu_timer6:[75,76,88],j7200_dev_mcu_timer7:[75,76,88],j7200_dev_mcu_timer8:[75,76,88],j7200_dev_mcu_timer9:[75,76,88],j7200_dev_mcu_uart0:[75,76,88],j7200_dev_mmcsd0:[75,76,80,88],j7200_dev_mmcsd1:[75,76,80,88],j7200_dev_navss0:[75,76,80,84,88],j7200_dev_navss0_cpts_0:[75,76,80,88],j7200_dev_navss0_dti_0:[75,76,88],j7200_dev_navss0_intr_router_0:[75,76,80,86,88],j7200_dev_navss0_mailbox_0:[75,76,80,88],j7200_dev_navss0_mailbox_10:[75,76,80,88],j7200_dev_navss0_mailbox_11:[75,76,80,88],j7200_dev_navss0_mailbox_1:[75,76,80,88],j7200_dev_navss0_mailbox_2:[75,76,80,88],j7200_dev_navss0_mailbox_3:[75,76,80,88],j7200_dev_navss0_mailbox_4:[75,76,80,88],j7200_dev_navss0_mailbox_5:[75,76,80,88],j7200_dev_navss0_mailbox_6:[75,76,80,88],j7200_dev_navss0_mailbox_7:[75,76,80,88],j7200_dev_navss0_mailbox_8:[75,76,80,88],j7200_dev_navss0_mailbox_9:[75,76,80,88],j7200_dev_navss0_mcrc_0:[75,76,80,88],j7200_dev_navss0_modss:[75,76,88],j7200_dev_navss0_modss_inta_0:[75,76,80,86,88],j7200_dev_navss0_modss_inta_1:[75,76,80,86,88],j7200_dev_navss0_proxy_0:[75,76,83,86,88],j7200_dev_navss0_ringacc_0:[75,76,80,85,86,88],j7200_dev_navss0_spinlock_0:[75,76,88],j7200_dev_navss0_tbu_0:[75,76,88],j7200_dev_navss0_timermgr_0:[75,76,88],j7200_dev_navss0_timermgr_1:[75,76,88],j7200_dev_navss0_udmap_0:[75,76,77,80,86,88],j7200_dev_navss0_udmass:[75,76,88],j7200_dev_navss0_udmass_inta_0:[75,76,80,86,88],j7200_dev_navss0_virtss:[75,76,80,88],j7200_dev_pbist0:[75,76,88],j7200_dev_pbist1:[75,76,88],j7200_dev_pbist2:[75,76,88],j7200_dev_pcie1:[75,76,80,88],j7200_dev_psc0:[75,76,88],j7200_dev_r5fss0:[76,88],j7200_dev_r5fss0_core0:[75,76,80,88],j7200_dev_r5fss0_core1:[75,76,80,88],j7200_dev_rti0:[75,76,88],j7200_dev_rti1:[75,76,88],j7200_dev_rti28:[75,76,88],j7200_dev_rti29:[75,76,88],j7200_dev_serdes_10g1:[75,76,88],j7200_dev_stm0:[75,76,88],j7200_dev_timer0:[75,76,80,88],j7200_dev_timer10:[75,76,80,88],j7200_dev_timer11:[75,76,80,88],j7200_dev_timer12:[75,76,80,88],j7200_dev_timer13:[75,76,80,88],j7200_dev_timer14:[75,76,80,88],j7200_dev_timer15:[75,76,80,88],j7200_dev_timer16:[75,76,80,88],j7200_dev_timer17:[75,76,80,88],j7200_dev_timer18:[75,76,80,88],j7200_dev_timer19:[75,76,80,88],j7200_dev_timer1:[75,76,80,88],j7200_dev_timer2:[75,76,80,88],j7200_dev_timer3:[75,76,80,88],j7200_dev_timer4:[75,76,80,88],j7200_dev_timer5:[75,76,80,88],j7200_dev_timer6:[75,76,80,88],j7200_dev_timer7:[75,76,80,88],j7200_dev_timer8:[75,76,80,88],j7200_dev_timer9:[75,76,80,88],j7200_dev_timesync_intrtr0:[76,80,86,88],j7200_dev_uart0:[75,76,80,88],j7200_dev_uart1:[75,76,80,88],j7200_dev_uart2:[75,76,80,88],j7200_dev_uart3:[75,76,80,88],j7200_dev_uart4:[75,76,80,88],j7200_dev_uart5:[75,76,80,88],j7200_dev_uart6:[75,76,80,88],j7200_dev_uart7:[75,76,80,88],j7200_dev_uart8:[75,76,80,88],j7200_dev_uart9:[75,76,80,88],j7200_dev_usb0:[75,76,80,88],j7200_dev_wkup_ddpa0:[75,76,88],j7200_dev_wkup_dmsc0:[76,88],j7200_dev_wkup_esm0:[75,76,80,88],j7200_dev_wkup_gpio0:[75,76,80,88],j7200_dev_wkup_gpio1:[75,76,80,88],j7200_dev_wkup_gpiomux_intrtr0:[76,80,86,88],j7200_dev_wkup_i2c0:[75,76,88],j7200_dev_wkup_porz_sync0:[75,76,88],j7200_dev_wkup_psc0:[75,76,88],j7200_dev_wkup_uart0:[75,76,88],j7200_dev_wkup_vtm0:[75,76,88],j7200_dev_wkup_wakeup0:[75,76,88],j7200_dev_wkupmcu2main_vd:[76,88],j721e:[13,23,27,126,130],j721e_dev_a72ss0:[89,90,102,104,105,117],j721e_dev_a72ss0_core0:[89,90,102,104,105,117],j721e_dev_a72ss0_core1:[89,90,102,104,105,117],j721e_dev_aasrc0:[89,90,94,102,104,105,109,117],j721e_dev_atl0:[89,90,102,104,105,117],j721e_dev_board0:[89,90,102,104,105,117],j721e_dev_c66ss0:[90,102,105,117],j721e_dev_c66ss0_core0:[89,90,94,102,104,105,109,117],j721e_dev_c66ss0_introuter0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_c66ss0_pbist0:[90,102,105,117],j721e_dev_c66ss1:[90,102,105,117],j721e_dev_c66ss1_core0:[89,90,94,102,104,105,109,117],j721e_dev_c66ss1_introuter0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_c66ss1_pbist0:[90,102,105,117],j721e_dev_c71ss0:[89,90,102,104,105,117],j721e_dev_c71ss0_mma:[89,90,102,104,105,117],j721e_dev_c71x_0_pbist_vd:[90,102,105,117],j721e_dev_cmpevent_intrtr0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_compute_cluster0:[90,94,102,105,109,117],j721e_dev_compute_cluster0_cfg_wrap:[89,90,102,104,105,117],j721e_dev_compute_cluster0_clec:[89,90,94,102,104,105,109,117],j721e_dev_compute_cluster0_core_cor:[89,90,102,104,105,117],j721e_dev_compute_cluster0_ddr32ss_emif0_ew:[89,90,102,104,105,117],j721e_dev_compute_cluster0_debug_wrap:[89,90,102,104,105,117],j721e_dev_compute_cluster0_divh2_divh0:[90,102,105,117],j721e_dev_compute_cluster0_divp_tft0:[90,102,105,117],j721e_dev_compute_cluster0_dmsc_wrap:[89,90,102,104,105,117],j721e_dev_compute_cluster0_en_msmc_domain:[89,90,102,104,105,117],j721e_dev_compute_cluster0_gic500ss:[89,90,94,102,104,105,109,117],j721e_dev_compute_cluster0_pbist_wrap:[89,90,102,104,105,117],j721e_dev_cpsw0:[89,90,94,102,104,105,109,117],j721e_dev_cpt2_aggr0:[89,90,102,104,105,117],j721e_dev_cpt2_aggr1:[89,90,102,104,105,117],j721e_dev_cpt2_aggr2:[89,90,102,104,105,117],j721e_dev_csi_psilss0:[89,90,102,104,105,117],j721e_dev_csi_rx_if0:[89,90,94,102,104,105,109,117],j721e_dev_csi_rx_if1:[89,90,94,102,104,105,109,117],j721e_dev_csi_tx_if0:[89,90,94,102,104,105,109,117],j721e_dev_dcc0:[89,90,94,102,104,105,109,117],j721e_dev_dcc10:[89,90,94,102,104,105,109,117],j721e_dev_dcc11:[89,90,94,102,104,105,109,117],j721e_dev_dcc12:[89,90,94,102,104,105,109,117],j721e_dev_dcc1:[89,90,94,102,104,105,109,117],j721e_dev_dcc2:[89,90,94,102,104,105,109,117],j721e_dev_dcc3:[89,90,94,102,104,105,109,117],j721e_dev_dcc4:[89,90,94,102,104,105,109,117],j721e_dev_dcc5:[89,90,94,102,104,105,109,117],j721e_dev_dcc6:[89,90,94,102,104,105,109,117],j721e_dev_dcc7:[89,90,94,102,104,105,109,117],j721e_dev_dcc8:[89,90,94,102,104,105,109,117],j721e_dev_dcc9:[89,90,94,102,104,105,109,117],j721e_dev_ddr0:[89,90,94,102,104,105,109,117],j721e_dev_debugss_wrap0:[89,90,102,104,105,117],j721e_dev_decoder0:[89,90,94,102,104,105,109,117],j721e_dev_dmpac0:[89,90,102,104,105,117],j721e_dev_dmpac0_sde_0:[89,90,102,104,105,117],j721e_dev_dphy_rx0:[89,90,102,104,105,117],j721e_dev_dphy_rx1:[89,90,102,104,105,117],j721e_dev_dphy_tx0:[89,90,102,104,105,117],j721e_dev_dss0:[89,90,94,102,104,105,109,117],j721e_dev_dss_dsi0:[89,90,94,102,104,105,109,117],j721e_dev_dss_edp0:[89,90,94,102,104,105,109,117],j721e_dev_ecap0:[89,90,94,102,104,105,109,117],j721e_dev_ecap1:[89,90,94,102,104,105,109,117],j721e_dev_ecap2:[89,90,94,102,104,105,109,117],j721e_dev_ehrpwm0:[89,90,94,102,104,105,109,117],j721e_dev_ehrpwm1:[89,90,94,102,104,105,109,117],j721e_dev_ehrpwm2:[89,90,94,102,104,105,109,117],j721e_dev_ehrpwm3:[89,90,94,102,104,105,109,117],j721e_dev_ehrpwm4:[89,90,94,102,104,105,109,117],j721e_dev_ehrpwm5:[89,90,94,102,104,105,109,117],j721e_dev_elm0:[89,90,94,102,104,105,109,117],j721e_dev_emif_data_0_vd:[90,102,105,117],j721e_dev_encoder0:[89,90,94,102,104,105,109,117],j721e_dev_eqep0:[89,90,94,102,104,105,109,117],j721e_dev_eqep1:[89,90,94,102,104,105,109,117],j721e_dev_eqep2:[89,90,94,102,104,105,109,117],j721e_dev_esm0:[89,90,94,102,104,105,109,117],j721e_dev_gpio0:[89,90,94,102,104,105,109,117],j721e_dev_gpio1:[89,90,94,102,104,105,109,117],j721e_dev_gpio2:[89,90,94,102,104,105,109,117],j721e_dev_gpio3:[89,90,94,102,104,105,109,117],j721e_dev_gpio4:[89,90,94,102,104,105,109,117],j721e_dev_gpio5:[89,90,94,102,104,105,109,117],j721e_dev_gpio6:[89,90,94,102,104,105,109,117],j721e_dev_gpio7:[89,90,94,102,104,105,109,117],j721e_dev_gpiomux_intrtr0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_gpmc0:[89,90,94,102,104,105,109,117],j721e_dev_gpu0:[90,102,105,117],j721e_dev_gpu0_dft_pbist_0:[90,102,105,117],j721e_dev_gpu0_gpu_0:[89,90,102,104,105,117],j721e_dev_gpu0_gpucore_0:[90,102,105,117],j721e_dev_gtc0:[89,90,94,102,104,105,109,117],j721e_dev_i2c0:[89,90,94,102,104,105,109,117],j721e_dev_i2c1:[89,90,94,102,104,105,109,117],j721e_dev_i2c2:[89,90,94,102,104,105,109,117],j721e_dev_i2c3:[89,90,94,102,104,105,109,117],j721e_dev_i2c4:[89,90,94,102,104,105,109,117],j721e_dev_i2c5:[89,90,94,102,104,105,109,117],j721e_dev_i2c6:[89,90,94,102,104,105,109,117],j721e_dev_i3c0:[89,90,94,102,104,105,109,117],j721e_dev_led0:[89,90,102,104,105,117],j721e_dev_main2mcu_lvl_intrtr0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_main2mcu_pls_intrtr0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_main2wkupmcu_vd:[90,102,105,117],j721e_dev_mcan0:[89,90,94,102,104,105,109,117],j721e_dev_mcan10:[89,90,94,102,104,105,109,117],j721e_dev_mcan11:[89,90,94,102,104,105,109,117],j721e_dev_mcan12:[89,90,94,102,104,105,109,117],j721e_dev_mcan13:[89,90,94,102,104,105,109,117],j721e_dev_mcan1:[89,90,94,102,104,105,109,117],j721e_dev_mcan2:[89,90,94,102,104,105,109,117],j721e_dev_mcan3:[89,90,94,102,104,105,109,117],j721e_dev_mcan4:[89,90,94,102,104,105,109,117],j721e_dev_mcan5:[89,90,94,102,104,105,109,117],j721e_dev_mcan6:[89,90,94,102,104,105,109,117],j721e_dev_mcan7:[89,90,94,102,104,105,109,117],j721e_dev_mcan8:[89,90,94,102,104,105,109,117],j721e_dev_mcan9:[89,90,94,102,104,105,109,117],j721e_dev_mcasp0:[89,90,94,102,104,105,109,117],j721e_dev_mcasp10:[89,90,94,102,104,105,109,117],j721e_dev_mcasp11:[89,90,94,102,104,105,109,117],j721e_dev_mcasp1:[89,90,94,102,104,105,109,117],j721e_dev_mcasp2:[89,90,94,102,104,105,109,117],j721e_dev_mcasp3:[89,90,94,102,104,105,109,117],j721e_dev_mcasp4:[89,90,94,102,104,105,109,117],j721e_dev_mcasp5:[89,90,94,102,104,105,109,117],j721e_dev_mcasp6:[89,90,94,102,104,105,109,117],j721e_dev_mcasp7:[89,90,94,102,104,105,109,117],j721e_dev_mcasp8:[89,90,94,102,104,105,109,117],j721e_dev_mcasp9:[89,90,94,102,104,105,109,117],j721e_dev_mcspi0:[89,90,94,102,104,105,109,117],j721e_dev_mcspi1:[89,90,94,102,104,105,109,117],j721e_dev_mcspi2:[89,90,94,102,104,105,109,117],j721e_dev_mcspi3:[89,90,94,102,104,105,109,117],j721e_dev_mcspi4:[89,90,94,102,104,105,109,117],j721e_dev_mcspi5:[89,90,94,102,104,105,109,117],j721e_dev_mcspi6:[89,90,94,102,104,105,109,117],j721e_dev_mcspi7:[89,90,94,102,104,105,109,117],j721e_dev_mcu_adc12_16ffc0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_adc12_16ffc1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_cpsw0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_cpt2_aggr0:[89,90,102,104,105,117],j721e_dev_mcu_dcc0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_dcc1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_dcc2:[89,90,94,102,104,105,109,117],j721e_dev_mcu_esm0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_fss0:[90,102,105,117],j721e_dev_mcu_fss0_fsas_0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_fss0_hyperbus1p0_0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_fss0_ospi_0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_fss0_ospi_1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_i2c0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_i2c1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_i3c0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_i3c1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_mcan0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_mcan1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_mcspi0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_mcspi1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_mcspi2:[89,90,94,102,104,105,109,117],j721e_dev_mcu_navss0:[90,98,102,105,113,117],j721e_dev_mcu_navss0_intr_0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_mcu_navss0_mcrc_0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_navss0_modss:[89,90,102,104,105,117],j721e_dev_mcu_navss0_proxy0:[89,90,97,100,102,104,105,112,115,117],j721e_dev_mcu_navss0_ringacc0:[89,90,94,99,100,102,104,105,109,114,115,117],j721e_dev_mcu_navss0_udmap_0:[89,90,91,94,100,102,104,105,106,109,115,117],j721e_dev_mcu_navss0_udmass:[89,90,102,104,105,117],j721e_dev_mcu_navss0_udmass_inta_0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_mcu_pbist0:[90,102,105,117],j721e_dev_mcu_pbist1:[90,102,105,117],j721e_dev_mcu_r5fss0:[90,102,105,117],j721e_dev_mcu_r5fss0_core0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_r5fss0_core1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_rti0:[89,90,102,104,105,117],j721e_dev_mcu_rti1:[89,90,102,104,105,117],j721e_dev_mcu_sa2_ul0:[89,90,94,102,104,105,109,117,126],j721e_dev_mcu_timer0:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer1:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer2:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer3:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer4:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer5:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer6:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer7:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer8:[89,90,94,102,104,105,109,117],j721e_dev_mcu_timer9:[89,90,94,102,104,105,109,117],j721e_dev_mcu_uart0:[89,90,94,102,104,105,109,117],j721e_dev_mlb0:[89,90,94,102,104,105,109,117],j721e_dev_mmcsd0:[89,90,94,102,104,105,109,117],j721e_dev_mmcsd1:[89,90,94,102,104,105,109,117],j721e_dev_mmcsd2:[89,90,94,102,104,105,109,117],j721e_dev_navss0:[89,90,94,98,102,104,105,109,113,117],j721e_dev_navss0_cpts_0:[89,90,94,102,104,105,109,117],j721e_dev_navss0_dti_0:[89,90,102,104,105,117],j721e_dev_navss0_intr_router_0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_navss0_mailbox_0:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_10:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_11:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_1:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_2:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_3:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_4:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_5:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_6:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_7:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_8:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mailbox_9:[89,90,94,102,104,105,109,117],j721e_dev_navss0_mcrc_0:[89,90,94,102,104,105,109,117],j721e_dev_navss0_modss:[89,90,102,104,105,117],j721e_dev_navss0_modss_intaggr_0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_navss0_modss_intaggr_1:[89,90,94,100,102,104,105,109,115,117],j721e_dev_navss0_proxy_0:[89,90,97,100,102,104,105,112,115,117],j721e_dev_navss0_ringacc_0:[89,90,94,99,100,102,104,105,109,114,115,117],j721e_dev_navss0_spinlock_0:[89,90,102,104,105,117],j721e_dev_navss0_tbu_0:[89,90,94,102,104,105,109,117],j721e_dev_navss0_tcu_0:[89,90,94,102,104,105,109,117],j721e_dev_navss0_timermgr_0:[89,90,102,104,105,117],j721e_dev_navss0_timermgr_1:[89,90,102,104,105,117],j721e_dev_navss0_udmap_0:[89,90,91,94,100,102,104,105,106,109,115,117],j721e_dev_navss0_udmass:[89,90,102,104,105,117],j721e_dev_navss0_udmass_intaggr_0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_navss0_virtss:[89,90,102,104,105,117],j721e_dev_pbist0:[90,102,105,117],j721e_dev_pbist10:[90,102,105,117],j721e_dev_pbist1:[90,102,105,117],j721e_dev_pbist2:[90,102,105,117],j721e_dev_pbist3:[90,102,105,117],j721e_dev_pbist4:[90,102,105,117],j721e_dev_pbist5:[90,102,105,117],j721e_dev_pbist6:[90,102,105,117],j721e_dev_pbist7:[90,102,105,117],j721e_dev_pbist9:[90,102,105,117],j721e_dev_pcie0:[89,90,94,102,104,105,109,117],j721e_dev_pcie1:[89,90,94,102,104,105,109,117],j721e_dev_pcie2:[89,90,94,102,104,105,109,117],j721e_dev_pcie3:[89,90,94,102,104,105,109,117],j721e_dev_pru_icssg0:[89,90,94,102,104,105,109,117],j721e_dev_pru_icssg1:[89,90,94,102,104,105,109,117],j721e_dev_psc0:[89,90,102,104,105,117],j721e_dev_r5fss0:[90,102,105,117],j721e_dev_r5fss0_core0:[89,90,94,102,104,105,109,117],j721e_dev_r5fss0_core1:[89,90,94,102,104,105,109,117],j721e_dev_r5fss0_introuter0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_r5fss1:[90,102,105,117],j721e_dev_r5fss1_core0:[89,90,94,102,104,105,109,117],j721e_dev_r5fss1_core1:[89,90,94,102,104,105,109,117],j721e_dev_r5fss1_introuter0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_rti0:[89,90,102,104,105,117],j721e_dev_rti15:[89,90,102,104,105,117],j721e_dev_rti16:[89,90,102,104,105,117],j721e_dev_rti1:[89,90,102,104,105,117],j721e_dev_rti24:[89,90,94,102,104,105,109,117],j721e_dev_rti25:[89,90,94,102,104,105,109,117],j721e_dev_rti28:[89,90,102,104,105,117],j721e_dev_rti29:[89,90,102,104,105,117],j721e_dev_rti30:[89,90,102,104,105,117],j721e_dev_rti31:[89,90,102,104,105,117],j721e_dev_sa2_ul0:[89,90,94,102,104,105,109,117,126],j721e_dev_serdes_10g0:[89,90,102,104,105,117],j721e_dev_serdes_16g0:[89,90,102,104,105,117],j721e_dev_serdes_16g1:[89,90,102,104,105,117],j721e_dev_serdes_16g2:[89,90,102,104,105,117],j721e_dev_serdes_16g3:[89,90,102,104,105,117],j721e_dev_stm0:[89,90,102,104,105,117],j721e_dev_timer0:[89,90,94,102,104,105,109,117],j721e_dev_timer10:[89,90,94,102,104,105,109,117],j721e_dev_timer11:[89,90,94,102,104,105,109,117],j721e_dev_timer12:[89,90,94,102,104,105,109,117],j721e_dev_timer13:[89,90,94,102,104,105,109,117],j721e_dev_timer14:[89,90,94,102,104,105,109,117],j721e_dev_timer15:[89,90,94,102,104,105,109,117],j721e_dev_timer16:[89,90,94,102,104,105,109,117],j721e_dev_timer17:[89,90,94,102,104,105,109,117],j721e_dev_timer18:[89,90,94,102,104,105,109,117],j721e_dev_timer19:[89,90,94,102,104,105,109,117],j721e_dev_timer1:[89,90,94,102,104,105,109,117],j721e_dev_timer2:[89,90,94,102,104,105,109,117],j721e_dev_timer3:[89,90,94,102,104,105,109,117],j721e_dev_timer4:[89,90,94,102,104,105,109,117],j721e_dev_timer5:[89,90,94,102,104,105,109,117],j721e_dev_timer6:[89,90,94,102,104,105,109,117],j721e_dev_timer7:[89,90,94,102,104,105,109,117],j721e_dev_timer8:[89,90,94,102,104,105,109,117],j721e_dev_timer9:[89,90,94,102,104,105,109,117],j721e_dev_timesync_intrtr0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_uart0:[89,90,94,102,104,105,109,117],j721e_dev_uart1:[89,90,94,102,104,105,109,117],j721e_dev_uart2:[89,90,94,102,104,105,109,117],j721e_dev_uart3:[89,90,94,102,104,105,109,117],j721e_dev_uart4:[89,90,94,102,104,105,109,117],j721e_dev_uart5:[89,90,94,102,104,105,109,117],j721e_dev_uart6:[89,90,94,102,104,105,109,117],j721e_dev_uart7:[89,90,94,102,104,105,109,117],j721e_dev_uart8:[89,90,94,102,104,105,109,117],j721e_dev_uart9:[89,90,94,102,104,105,109,117],j721e_dev_ufs0:[89,90,94,102,104,105,109,117],j721e_dev_usb0:[89,90,94,102,104,105,109,117],j721e_dev_usb1:[89,90,94,102,104,105,109,117],j721e_dev_vpac0:[89,90,102,104,105,117],j721e_dev_vpfe0:[89,90,94,102,104,105,109,117],j721e_dev_wkup_ddpa0:[89,90,102,104,105,117],j721e_dev_wkup_dmsc0:[90,102,105,117],j721e_dev_wkup_esm0:[89,90,94,102,104,105,109,117],j721e_dev_wkup_gpio0:[89,90,94,102,104,105,109,117],j721e_dev_wkup_gpio1:[89,90,94,102,104,105,109,117],j721e_dev_wkup_gpiomux_intrtr0:[89,90,94,100,102,104,105,109,115,117],j721e_dev_wkup_i2c0:[89,90,94,102,104,105,109,117],j721e_dev_wkup_porz_sync0:[89,90,102,104,105,117],j721e_dev_wkup_psc0:[89,90,102,104,105,117],j721e_dev_wkup_uart0:[89,90,94,102,104,105,109,117],j721e_dev_wkup_vtm0:[89,90,94,102,104,105,109,117],j721e_dev_wkupmcu2main_vd:[90,102,105,117],j721e_legaci:74,j7_main_sec_mmr_main_0:[96,111],j7_mcu_sec_mmr_mcu_0:[96,111],j7vcl_main_sec_mmr_main_0:82,j7vcl_mcu_sec_mmr_mcu_0:82,jitter:5,job:8,json:23,jtag:[17,19,21,24],jtag_unlock_host:[24,128],judgement:13,judici:23,just:[13,32,47,63,79,93,108,126],kdf:14,kdf_context_len:14,kdf_label_and_context:14,kdf_label_and_context_len_max:14,kdf_label_len:14,keep:[2,3,6,23,27],kei:[0,2,14,17,18,19,21,22,23,122,124,126,127,128],kek:[4,21,125,130],kept:5,keyston:128,keystor:[18,74],kfp5ugcgwxxcfxi:[19,128],knob:[13,18],know:[3,5,119],knowledg:0,known:[7,10,23,45,60,77,91,106],l2_access_latency_valu:13,l2_pipeline_latency_valu:13,l2flush_don:13,l2flushreq:13,label:[14,120,129],lack:[0,5],larg:119,larger:5,last:[6,13,19,22,23,128,129],latenc:[13,119],later:[3,119,124,128],latest:23,launch:128,layer:[2,26,130],layout:2,lead:7,least:13,leav:[2,7],left:[8,12,27,129],legaci:130,legal:12,length:[2,14,18,19,23,120,124,127],less:5,lesser:119,let:[3,13],level:[2,13,19,24,128],levent_in:[48,64],levt:33,like:[2,6,13,18,126],limit:[2,5,13,14,18,21,23,119,120,123,126,128,129],line:[6,19,128],link:[3,32,37,47,52,63,68,79,84,93,98,108,113,123],linux:[0,2,128],list:[2,5,9,11,12,13,14,16,18,20,21,23,27,119,120,123,126,127,128,129],lite:2,littl:[13,128],load:[3,6,13,124,127],loader:128,local:[6,11,23,27,128],local_rm_boardcfg:23,locat:[2,9,11,12,13,19,21,22,23,24,35,50,66,82,96,111,124,127,128],lock:[19,22,122,128],lockstep:13,lockstep_permit:13,log2:11,log:[13,22,23,27],log_output_consol:23,log_output_fil:23,logic:[13,119],longer:13,look:[2,34,49,65,81,95,110,128],loop:[5,13,22],lost:6,low:[2,3,6,11,12,21,22,23,24],low_prior:[41,56,72,87,101,116],lower:[13,19,27,120],lpsc:[13,27],lpsc_main_debug_err_intr:[48,64],lpsc_main_infra_err_intr:[48,64],lpsc_per_common_err_intr:[48,64],lrst:6,lsb:[2,11,18,23],m4_0:[31,32,41],machin:[27,32,47,63,79,93,108],macro:21,made:[5,21,23,32,47,63,79,93,108,120],magic:[23,24],mai:[2,5,6,7,12,13,19,22,32,47,63,79,93,108,119,121,126],main2mcu:23,main:[19,21,22,23,24,32,34,47,49,63,65,79,81,93,95,103,108,110,118,121],main_0_c6x_0_nonsecur:[92,107],main_0_c6x_0_secur:[92,107],main_0_c6x_1_nonsecur:[92,107],main_0_c6x_1_secur:[92,107],main_0_c7x_0_nonsecur:[92,107],main_0_c7x_0_secur:[92,107],main_0_icssg_0:[31,92,107],main_0_r5_0:[32,41,79,87,93,101,108,116],main_0_r5_0_nonsecur:[31,78,92,107],main_0_r5_0_secur:[31,78,92,107],main_0_r5_1:[32,41,79,87,93,101,108,116],main_0_r5_1_nonsecur:[31,78,92,107],main_0_r5_1_secur:[31,78,92,107],main_0_r5_2:[32,41,79,87,93,101,108,116],main_0_r5_3:[32,41,79,87,93,101,108,116],main_1_r5_0:[32,41,93,101,108,116],main_1_r5_0_nonsecur:[31,92,107],main_1_r5_0_secur:[31,92,107],main_1_r5_1:[32,41,93,101,108,116],main_1_r5_1_nonsecur:[31,92,107],main_1_r5_1_secur:[31,92,107],main_1_r5_2:[32,41,93,101,108,116],main_1_r5_3:[32,41,93,101,108,116],main_isolation_en:21,main_isolation_hostid:21,maintain:[0,2,7,34,49,65,81,95,110,120,122,123,129],major:[2,3,21,27],make:[2,5,8,9,11,12,13,19,22,23,24,119,128],manag:[3,7,14,15,16,19,21,25,28,29,31,32,43,44,46,47,58,59,62,63,74,75,76,78,79,89,90,92,93,104,105,107,120,129,130],mandatori:[2,17,18,24,32,41,47,56,63,72,79,87,93,101,108,116,128],mani:[5,6,12,13,22,27],manipul:8,manner:[2,16,119,120,128],manual:[6,13,123],manufactur:120,map:[8,10,11,12,22,23,24,27,28,33,43,58,75,89,104,122,123],mark:[2,5,13,24,28,30,33,37,38,43,45,48,51,52,53,58,60,64,67,68,69,75,77,80,83,84,85,89,91,94,97,98,99,104,106,109,112,113,114,120,122,123],mask:[15,122],maskabl:13,master:[13,24,31,46,62,78,92,107],match:[5,13,21,23,24,128],materi:120,max:5,max_cpu_cor:19,max_freq_hz:5,max_hz:5,maximum:[2,5,11,12,14,18,21,23,39,54,70,86,100,115,122],mcanss_ext_ts_rollover_lvl_int:[80,94,109],mcanss_mcan_lvl_int:[80,94,109],mcu0:[49,65],mcu:[13,21,23,24,34,42,47,57,63,73,79,88,93,102,103,108,117,118,121],mcu_0_r5_0:[79,87,93,101,108,116],mcu_0_r5_1:[79,87,93,101,108,116],mcu_0_r5_2:[79,87,93,101,108,116],mcu_0_r5_3:[79,87,93,101,108,116],mcu_armss0_cpu0:[56,72],mcu_armss0_cpu1:[56,72],mcu_cpsw:[81,95,110],mcu_m4fss0_core0:35,mcu_navss0_ringacc0:[53,69,85,99,114],mcu_navss0_udmap0:[45,48,60,64],mcu_navss0_udmap_0:[77,80,91,94,106,109],mcu_per:[81,95,110],mcu_pulsar:[81,95,110],mcu_r5:13,mcu_r5fss0_core0:[82,87,96,101,111,116],mcu_r5fss0_core1:[82,87,96,101,111,116],mcu_sec_mmr0:[50,66,128],mcusram:129,mdio_pend:[80,94,109],mean:[3,6,13,19,21,23,27],meant:[5,13,121],meanwhil:3,mechan:[2,12,23],mek:[124,127],mem_init_di:13,member:[19,24],memori:[2,3,16,21,22,23,24,32,47,63,79,93,108,120,122,124,126,127,128,129],memset:5,mention:119,messag:[0,13,27,28,29,30,33,34,37,38,41,43,44,45,48,49,51,52,53,56,58,59,60,64,65,67,68,69,72,75,76,77,80,81,83,84,85,87,89,90,91,94,95,97,98,99,101,104,105,106,109,110,112,113,114,116,120,122,123,127,128,129,130],method:[17,18,123],mevt:[33,48,64,80,94,109],mhz:[34,49,65,81,95,110],micro:13,might:[5,13,32,47,63,79,93,108],milli:13,millisecond:124,min:5,min_cert_rev:[24,128],min_freq_hz:5,min_hz:5,mind:[3,6,32,47,63,79,93,108],minim:11,minimum:[5,13,24,128],minor:[3,21,27,127],misc_lvl:[48,64],misconfigur:21,mismatch:21,mitig:[0,120],mix:119,mlbss_mlb_ahb_int:[94,109],mlbss_mlb_int:[94,109],mmr:[22,24,61,122,126],mmr_idx:15,mmr_val:15,mmra:126,mmu:[0,2,13],mode:[2,11,13,27,119,120,124,127,128],modif:122,modifi:[5,6,11,13,18,27,29,44,59,76,90,105,122,126,127,128],modul:[0,2,5,6,13,21,22,27,34,49,65,81,95,110,126],module_get:27,module_put:27,moduleclockparentchang:5,moment:[9,10],monitor:[27,48,53,64,69,80,85,94,99,109,114],monoton:6,more:[0,2,12,17,19,22,23,27,31,39,42,46,54,57,62,70,73,78,86,88,92,100,102,103,107,115,117,118,119,122,123,126],most:[5,11,18,23,122,129],motiv:119,mount:[28,43,58,75,89,104],move:[19,22],movement:0,mpk:[124,127],mpu:[2,21],mrst:6,msb:[2,11,18],msd:27,msg_device_sw_state_auto_off:6,msg_device_sw_state_on:6,msg_flag_clock_allow_freq_chang:5,msg_param_dev_clk_id:27,msg_param_v:27,msg_receiv:27,msmc0_rx:[52,68],msmc0_tx:[52,68],msmc:21,msmc_cache_s:[3,21],msmc_end_high:3,msmc_end_low:3,msmc_start_high:3,msmc_start_low:3,multi:5,multipl:[0,2,5,6,22,23,27,120,122,123,124,126,127,128,129],multipli:5,must:[2,3,5,6,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,30,119,120,122,123,124,126,127,128,129],mutlipl:128,mutual:119,mux:[8,28,43,58,75,89,104],n_permission_reg:16,nack:[5,10,12,16,20,22,23,39,54,70,86,100,115,129],nak:[2,5,6,7,13,21],name:[5,6,8,9,10,11,12,13,14,15,16,17,19,20,21,27,28,29,30,31,32,33,34,35,37,38,39,41,42,43,44,45,46,47,48,49,50,51,52,53,54,56,57,58,59,60,62,63,64,65,66,67,68,69,70,72,73,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,104,105,106,107,108,109,110,111,112,113,114,115,116,117,119,128,129],natur:2,nav:21,nav_id:[9,10,11,12],navig:[0,2,9,10,11,12],navss0_ringacc0:[53,69],navss0_ringacc_0:[85,99,114],navss0_udmap0:[45,48,60,64],navss0_udmap_0:[77,80,91,94,106,109],navss:[16,27,123],navss_main_cpsw5_rx:84,navss_main_cpsw5_tx:84,navss_main_cpsw9_rx:[98,113],navss_main_cpsw9_tx:[98,113],navss_main_csi_rx:[84,98,113],navss_main_csi_tx:[84,98,113],navss_main_dmpac_tc0_cc_rx:[84,98,113],navss_main_dmpac_tc0_cc_tx:[84,98,113],navss_main_icssg0_rx:[84,98,113],navss_main_icssg0_tx:[84,98,113],navss_main_icssg1_rx:[84,98,113],navss_main_icssg1_tx:[84,98,113],navss_main_msmc0_rx:[84,98,113],navss_main_msmc0_tx:[84,98,113],navss_main_pdma_main_aasrc_rx:[84,98,113],navss_main_pdma_main_aasrc_tx:[84,98,113],navss_main_pdma_main_debug_ccmcu_rx:[84,98,113],navss_main_pdma_main_debug_mainc66_rx:[84,98,113],navss_main_pdma_main_mcan_rx:[84,98,113],navss_main_pdma_main_mcan_tx:[84,98,113],navss_main_pdma_main_mcasp_g0_rx:[84,98,113],navss_main_pdma_main_mcasp_g0_tx:[84,98,113],navss_main_pdma_main_mcasp_g1_rx:[84,98,113],navss_main_pdma_main_mcasp_g1_tx:[84,98,113],navss_main_pdma_main_misc_g0_rx:[98,113],navss_main_pdma_main_misc_g0_tx:[98,113],navss_main_pdma_main_misc_g1_rx:[84,98,113],navss_main_pdma_main_misc_g1_tx:[84,98,113],navss_main_pdma_main_misc_g2_rx:[84,98,113],navss_main_pdma_main_misc_g2_tx:[84,98,113],navss_main_pdma_main_misc_g3_rx:[84,98,113],navss_main_pdma_main_misc_g3_tx:[84,98,113],navss_main_pdma_main_spi_g0_rx:84,navss_main_pdma_main_spi_g0_tx:84,navss_main_pdma_main_spi_g1_rx:84,navss_main_pdma_main_spi_g1_tx:84,navss_main_pdma_main_usart_g0_rx:[84,98,113],navss_main_pdma_main_usart_g0_tx:[84,98,113],navss_main_pdma_main_usart_g1_rx:[84,98,113],navss_main_pdma_main_usart_g1_tx:[84,98,113],navss_main_pdma_main_usart_g2_rx:[84,98,113],navss_main_pdma_main_usart_g2_tx:[84,98,113],navss_main_saul0_rx:[84,98,113],navss_main_saul0_tx:[84,98,113],navss_main_udmap0_rx:[84,98,113],navss_main_udmap0_tx:[84,98,113],navss_main_vpac_tc0_cc_rx:[84,98,113],navss_main_vpac_tc0_cc_tx:[84,98,113],navss_main_vpac_tc1_cc_rx:[84,98,113],navss_main_vpac_tc1_cc_tx:[84,98,113],navss_mcu_pdma_adc_rx:[84,98,113],navss_mcu_pdma_adc_tx:[84,98,113],navss_mcu_pdma_cpsw0_rx:[84,98,113],navss_mcu_pdma_cpsw0_tx:[84,98,113],navss_mcu_pdma_mcu0_rx:[84,98,113],navss_mcu_pdma_mcu0_tx:[84,98,113],navss_mcu_pdma_mcu1_rx:[84,98,113],navss_mcu_pdma_mcu1_tx:[84,98,113],navss_mcu_pdma_mcu2_rx:[84,98,113],navss_mcu_pdma_mcu2_tx:[84,98,113],navss_mcu_saul0_rx:[84,98,113],navss_mcu_saul0_tx:[84,98,113],navss_mcu_udmap0_rx:[84,98,113],navss_mcu_udmap0_tx:[84,98,113],necessari:[7,13,24,27,122],need:[2,3,9,10,11,13,18,19,21,22,23,119,124,127,128,129],never:122,newer:5,next:[2,22,23,122,128],nich:23,nist:120,nmfi_en:13,nobmp:[19,128],node:128,non:[10,11,12,13,15,19,23,24,31,32,46,47,57,62,63,73,78,79,88,92,93,102,107,108,117,120,122,123,128],none:[21,23,31,46,62,78,92,107,123,126],nonsec_a72_2_notify_tx:101,nonsec_a72_2_response_tx:101,nonsec_a72_3_notify_tx:101,nonsec_a72_3_response_tx:101,nonsec_a72_4_notify_tx:101,nonsec_a72_4_response_tx:101,nonsec_c6x_0_1_notify_tx:101,nonsec_c6x_0_1_response_tx:101,nonsec_c6x_1_1_notify_tx:101,nonsec_c6x_1_1_response_tx:101,nonsec_c7x_1_notify_tx:101,nonsec_c7x_1_response_tx:101,nonsec_dmsc2dm_notify_tx:101,nonsec_dmsc2dm_response_tx:101,nonsec_gpu_0_notify_tx:101,nonsec_gpu_0_response_tx:101,nonsec_high_priority_rx:101,nonsec_icssg_0_notify_tx:101,nonsec_icssg_0_response_tx:101,nonsec_low_priority_rx:101,nonsec_main_0_r5_0_notify_tx:101,nonsec_main_0_r5_0_response_tx:101,nonsec_main_0_r5_2_notify_tx:101,nonsec_main_0_r5_2_response_tx:101,nonsec_main_1_r5_0_notify_tx:101,nonsec_main_1_r5_0_response_tx:101,nonsec_main_1_r5_2_notify_tx:101,nonsec_main_1_r5_2_response_tx:101,nonsec_mcu_0_r5_0_notify_tx:101,nonsec_mcu_0_r5_0_response_tx:101,nonsec_mcu_0_r5_2_notify_tx:101,nonsec_mcu_0_r5_2_response_tx:101,nonsec_notify_resp_rx:101,normal:[3,5,6,7,8,9,10,11,12,13,14,16,19,20,21,22,23,24,124,128],notat:19,note:[5,6,8,13,18,24,27,28,30,35,43,45,50,58,60,66,75,77,82,89,91,96,104,106,111,123,128],notif:[2,3,21,22,23,24],notifi:[3,23,56,72,87,101,116],notify_resp:[56,72,87,101,116],now:[15,19,22,23,119,124],num:5,num_match_iter:13,num_par:5,num_parents32:5,num_resourc:23,num_wait_iter:13,number:[2,3,5,6,8,11,12,13,14,15,16,18,22,23,24,27,39,41,54,56,61,70,72,86,87,100,101,115,116,119,122,126,128],numpar:5,nvic:[33,48,64],obtain:[17,19,120,123,126,128],occup:11,occur:[12,13,18,27,123],ocmc:[21,23,24],oct:[19,128],octet:19,oes_reg_index:27,ofc:22,off:[5,6,13,27],offer:[2,122,124],offici:22,offset:[12,13,27,30],often:[2,122],oid:19,old:5,older:[5,128],onc:[5,6,13,18,22,23,27,34,49,65,81,95,110,120,122,128,129],one:[0,5,11,13,14,15,18,21,22,23,24,28,43,58,75,89,104,119,120,122,123,124,126,128],onetim:0,onli:[2,3,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,27,119,120,122,123,124,126,127,128,129],onto:21,open:[19,23,126,128,129],openssl:128,oper:[0,2,5,6,10,12,13,15,16,18,19,22,23,24,27,119,120,122,124,127,128],opt:128,optim:119,option:[0,2,5,8,11,12,13,18,19,21,23,24,28,42,43,57,58,73,75,88,89,102,104,117,120,121,128],order:[2,6,11,12,13,21,22,23,24,27,45,60,77,91,106,119,123,126,127],order_id:11,orderid:[11,12],organ:[28,43,58,75,89,104,119,122,124],origin:[5,11,12,22,124],origpar:5,os1:32,os2:32,osal:27,ospi_lvl_intr:[94,109],otfa_intr_err_pend:[94,109],otg_lvl:[48,64],otgirq:[80,94,109],other:[0,2,5,6,8,11,12,13,15,17,18,19,21,23,24,27,119,120,122,123,126,127,128,129],otherwis:[2,5,8,12,23,24,128],otp:[4,21,74,125,130],otp_config:24,otp_entri:24,out:[6,13,120,123,124,127,128,129],outer:19,outfifo_level:[94,109],outform:128,outgo:[28,43,58,75,89,104],outgroup_level:[94,109],outl_intr:[48,64,94,109],outp:[80,94,109],output:[5,8,12,19,23,27,28,43,58,75,89,104,124,127,128],output_binary_fil:23,outsid:[125,130],over:[2,13,20,24,27,119,129],overal:[6,13,21,23],overhead:13,overlap:[23,30,33,38,45,48,51,53,60,64,67,69,77,80,83,85,91,94,97,99,106,109,112,114,121],overrid:[13,123],overridden:123,overview:[2,126],own:[5,10,11,12,13,21,23,31,45,46,60,62,77,78,91,92,106,107,120,122,123,126],owner:[10,11,12,13,23,27,31,46,62,78,92,107,122,123,126],owner_index:16,owner_permission_bit:16,owner_privid:16,ownership:[13,16,24,119,126],packet:[12,27],pad:[124,127],page:0,pair:[27,126],parallel:0,paramet:[2,3,5,6,7,13,14,15,16,17,18,19,20,21,22,23,24,28,29,30,33,37,38,43,44,45,48,51,52,53,58,59,60,64,67,68,69,75,76,77,80,83,84,85,89,90,91,94,97,98,99,104,105,106,109,112,113,114,121,124],paramt:21,parent32:5,parent:[5,27,28,43,58,75,89,104],pars:27,parser:19,part:[7,11,12,13,19,22,27,30,33,37,38,45,48,51,52,53,60,64,67,68,69,77,80,83,84,85,91,94,97,98,99,106,109,112,113,114,119,128],particular:[13,28,29,43,44,58,59,75,76,89,90,104,105],partit:[0,27,121],pass:[5,6,7,9,11,12,19,21,22,23,24,128],patch:[3,27],patch_vers:3,path:[5,41,56,72,87,101,116,123,128],paus:[12,27],payload:[2,18,19,127],pcie0_pend:[48,64],pcie10_pend:[48,64],pcie11_pend:[48,64],pcie12_pend:[48,64],pcie13_pend:[48,64],pcie14_pend:[48,64],pcie1_pend:[48,64],pcie2_pend:[48,64],pcie3_pend:[48,64],pcie4_pend:[48,64],pcie5_pend:[48,64],pcie6_pend:[48,64],pcie7_pend:[48,64],pcie8_pend:[48,64],pcie9_pend:[48,64],pcie_cpts_comp:[33,48,64,80,94,109],pcie_cpts_genf0:[33,48,64,80,94,109],pcie_cpts_hw1_push:[33,48,64,80,94,109],pcie_cpts_hw2_push:[33,48,64,80,94,109],pcie_cpts_pend:[48,64,80,94,109],pcie_cpts_sync:[33,48,64,80,94,109],pcie_downstream_puls:[80,94,109],pcie_dpa_puls:80,pcie_error_puls:[80,94,109],pcie_flr_puls:[80,94,109],pcie_hot_reset_puls:[80,94,109],pcie_legacy_puls:[80,94,109],pcie_link_state_puls:[80,94,109],pcie_local_level:[80,94,109],pcie_phy_level:[80,94,109],pcie_ptm_valid_puls:[33,80,94,109],pcie_pwr_state_puls:[80,94,109],pd_get:27,pd_init:27,pd_inv_dep_data:27,pd_put:27,pd_rstdne_timeout:27,pd_trans_timeout:27,pdma_cpsw0_rx:[52,68],pdma_cpsw0_tx:[52,68],pdma_debug_cc_rx:[52,68],pdma_debug_main_rx:[52,68],pdma_debug_mcu_rx:[52,68],pdma_main0_mcasp0_rx:[52,68],pdma_main0_mcasp0_tx:[52,68],pdma_main0_mcasp1_rx:[52,68],pdma_main0_mcasp1_tx:[52,68],pdma_main0_mcasp2_rx:[52,68],pdma_main0_mcasp2_tx:[52,68],pdma_main0_mcspi0_rx:37,pdma_main0_mcspi0_tx:37,pdma_main0_mcspi1_rx:37,pdma_main0_mcspi1_tx:37,pdma_main0_mcspi2_rx:37,pdma_main0_mcspi2_tx:37,pdma_main0_mcspi3_rx:37,pdma_main0_mcspi3_tx:37,pdma_main0_uart0_rx:37,pdma_main0_uart0_tx:37,pdma_main0_uart1_rx:37,pdma_main0_uart1_tx:37,pdma_main1_adc0_rx:37,pdma_main1_mcan0_rx:37,pdma_main1_mcan0_tx:37,pdma_main1_mcan1_rx:37,pdma_main1_mcan1_tx:37,pdma_main1_mcspi4_rx:37,pdma_main1_mcspi4_tx:37,pdma_main1_spi0_rx:[52,68],pdma_main1_spi0_tx:[52,68],pdma_main1_spi1_rx:[52,68],pdma_main1_spi1_tx:[52,68],pdma_main1_spi2_rx:[52,68],pdma_main1_spi2_tx:[52,68],pdma_main1_spi3_rx:[52,68],pdma_main1_spi3_tx:[52,68],pdma_main1_spi4_rx:[52,68],pdma_main1_spi4_tx:[52,68],pdma_main1_uart2_rx:37,pdma_main1_uart2_tx:37,pdma_main1_uart3_rx:37,pdma_main1_uart3_tx:37,pdma_main1_uart4_rx:37,pdma_main1_uart4_tx:37,pdma_main1_uart5_rx:37,pdma_main1_uart5_tx:37,pdma_main1_uart6_rx:37,pdma_main1_uart6_tx:37,pdma_main1_usart0_rx:[52,68],pdma_main1_usart0_tx:[52,68],pdma_main1_usart1_rx:[52,68],pdma_main1_usart1_tx:[52,68],pdma_main1_usart2_rx:[52,68],pdma_main1_usart2_tx:[52,68],pdma_mcu0_adc12_rx:[52,68],pdma_mcu0_adc12_tx:[52,68],pdma_mcu1_mcan0_rx:[52,68],pdma_mcu1_mcan0_tx:[52,68],pdma_mcu1_mcan1_rx:[52,68],pdma_mcu1_mcan1_tx:[52,68],pdma_mcu1_spi0_rx:[52,68],pdma_mcu1_spi0_tx:[52,68],pdma_mcu1_spi1_rx:[52,68],pdma_mcu1_spi1_tx:[52,68],pdma_mcu1_spi2_rx:[52,68],pdma_mcu1_spi2_tx:[52,68],pdma_mcu1_usart0_rx:[52,68],pdma_mcu1_usart0_tx:[52,68],peer:27,pem:128,pend:6,pend_intr:[48,64,80,94,109],per0:[34,49,65,81,95,110],per1:[34,49,65,95,110],per:[2,11,12,13,21,22,23,24,27,28,43,58,61,75,89,104,120,123,128],perf_ctrl:12,perf_ctrl_timeout_cnt:12,perform:[2,7,10,11,12,13,15,16,17,18,19,20,22,23,24,27,103,118,119,120,122,123,124,125,126,130],peripher:[0,8,22,23,42,57,73,88,102,117,119,121],perman:122,permiss:[11,16,24,31,46,62,78,92,107,122,126],permit:[13,21,29,32,35,39,41,42,44,47,50,54,56,57,59,63,66,70,72,73,76,79,82,86,87,88,90,93,96,100,101,102,103,105,108,111,115,116,117,118,119],perspect:[28,43,58,75,89,104,123],physic:[2,3,13,17,21,22,23,24,30,35,50,66,82,96,111,119,128],pick:19,piec:[3,122],pin:22,pinmux:22,pipelin:13,piyali:23,pka:[0,126],pkh:124,pktdma:[0,2],pktdma_rx:37,pktdma_rx_chan_error:33,pktdma_rx_flow_complet:33,pktdma_rx_flow_firewal:33,pktdma_rx_flow_starv:33,pktdma_tx:37,pktdma_tx_chan_error:33,pktdma_tx_flow_complet:33,place:[2,5,10,13,19,21,23,24,124,128],placement:2,plain:[13,21,23],platform:[20,121],pleas:[6,13,18,19,21,22,23,24,119,121,122,123,126,127,128,129],pll:[22,74],pllfrac2_ssmod_16fft_main_0:[95,110],pllfrac2_ssmod_16fft_main_13:[95,110],pllfrac2_ssmod_16fft_main_14:[95,110],pllfrac2_ssmod_16fft_main_15:[95,110],pllfrac2_ssmod_16fft_main_16:[95,110],pllfrac2_ssmod_16fft_main_17:[95,110],pllfrac2_ssmod_16fft_main_18:[95,110],pllfrac2_ssmod_16fft_main_19:[95,110],pllfrac2_ssmod_16fft_main_1:[95,110],pllfrac2_ssmod_16fft_main_23:[95,110],pllfrac2_ssmod_16fft_main_25:[95,110],pllfrac2_ssmod_16fft_main_2:[95,110],pllfrac2_ssmod_16fft_main_3:[95,110],pllfrac2_ssmod_16fft_main_4:[95,110],pllfrac2_ssmod_16fft_main_5:[95,110],pllfrac2_ssmod_16fft_main_6:[95,110],pllfrac2_ssmod_16fft_main_7:[95,110],pllfrac2_ssmod_16fft_main_8:[95,110],pllfrac2_ssmod_16fft_mcu_0:[95,110],pllfrac2_ssmod_16fft_mcu_1:[95,110],pllfrac2_ssmod_16fft_mcu_2:[95,110],pllfracf_ssmod_16fft_main_0:[34,81],pllfracf_ssmod_16fft_main_12:[34,81,95,110],pllfracf_ssmod_16fft_main_14:[34,81],pllfracf_ssmod_16fft_main_1:[34,81],pllfracf_ssmod_16fft_main_2:34,pllfracf_ssmod_16fft_main_3:81,pllfracf_ssmod_16fft_main_4:81,pllfracf_ssmod_16fft_main_8:[34,81],pllfracf_ssmod_16fft_mcu_0:[34,81],pllfracf_ssmod_16fft_mcu_1:81,pllfracf_ssmod_16fft_mcu_2:81,plu:12,pm_bcfg_hash:19,pm_dev_init:27,pm_init:27,pm_sys_reset:27,pmboardcfghash:[19,124],pme_gen_lvl:[48,64],pmmc:5,point:[3,13,18,22,23,27,119,128],pointer:[5,11,12,21,22,23,24,124],pointrpend:[48,64,80,94,109],polic:[2,13],polici:126,poll:[5,18],pool:13,popul:[2,17,22,23,24,120,124,127],por:122,port:[17,18,19,123,128],portion:[23,24,126,129],posit:[6,27],possess:120,possibl:[3,5,6,11,13,23,120],post:[23,27],potenti:27,power:[0,3,6,7,13,21,25,28,29,43,44,58,59,75,76,89,90,104,105,128,130],powerdomain:27,pppp:128,pr1_edc0_latch0_in:[33,48,64,94,109],pr1_edc0_latch1_in:[33,48,64,94,109],pr1_edc0_sync0_out:[33,48,64,94,109],pr1_edc0_sync1_out:[33,48,64,94,109],pr1_edc1_latch0_in:[33,48,64,94,109],pr1_edc1_latch1_in:[33,48,64,94,109],pr1_edc1_sync0_out:[33,48,64,94,109],pr1_edc1_sync1_out:[33,48,64,94,109],pr1_host_intr_pend:[48,64,94,109],pr1_host_intr_req:[33,48,64,94,109],pr1_iep0_cap_intr_req:[33,48,64,94,109],pr1_iep0_cmp_intr_req:[33,48,64,94,109],pr1_iep1_cap_intr_req:[33,48,64,94,109],pr1_iep1_cmp_intr_req:[33,48,64,94,109],pr1_rx_sof_intr_req:[48,64,94,109],pr1_slv_intr:[33,48,64,94,109],pr1_tx_sof_intr_req:[48,64,94,109],precaut:21,preclud:23,predefin:[119,121,122],prefix:2,prepar:2,prepend:2,present:[2,3,5,12,18,24,27,120,128],preserv:19,presum:21,prevent:[6,13,15,22,23,119,122,123,126,128],previou:119,previous:13,prf:120,primari:[2,17,18,23,24,119,126],primer:[125,130],print:[27,128],print_freq:5,printf:5,prior:[5,6,8,12,13,27],prioriti:[2,12,21,23,27],priv:[16,27],privat:[124,127],privid:120,priviledg:2,privileg:[2,19,31,46,62,78,92,107,123,128],privilig:120,probabl:13,proc_access_list:24,proc_access_mast:24,proc_access_secondari:24,proc_auth_load_config:[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130],proc_id:13,proce:128,procedur:[120,128],proceess:17,process:[0,2,3,5,6,7,8,9,11,12,13,16,17,18,19,21,24,32,39,41,47,54,56,63,70,72,79,86,87,93,100,101,108,115,116,121,122,127,128,129],processor:[0,2,4,8,19,21,23,32,41,47,56,63,72,74,79,87,93,101,108,116,128,129],processor_access_list:24,processor_acl_list:24,processor_id:[13,24],produc:120,product:[22,119,128],profil:21,program:[2,6,8,9,10,11,12,16,19,22,23,24,27,30,34,49,65,81,95,110,129],programm:[11,15,122],programmed_st:[5,6],progress:27,project:23,prompt:[19,128],proper:[2,22],properli:[22,27],protect:[0,22,24,119,120,122,123,124,127,129],protocol:[2,12,128],provid:[0,2,3,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,27,28,29,30,31,32,33,34,35,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,128],proxi:[0,2,4,5,8,10,12,16,21,24,27,74,123],proxy_cfg:[9,27],proxy_cfg_respons:9,proxy_init:27,proxy_oes_get:27,proxy_oes_set:27,psc:[6,13,22,27],psc_inv_data:27,pseudo:[5,120],pseudorandom:120,psi:[0,2,4,12,27,74],psil:[10,126],psil_dst_thread:27,psil_init:27,psil_pair:27,psil_read:27,psil_src_thread:27,psil_src_thread_p:27,psil_thread:27,psil_thread_cfg_reg_addr:27,psil_thread_cfg_reg_val_hi:27,psil_thread_cfg_reg_val_lo:27,psil_thread_dis:27,psil_thread_en:27,psil_to:12,psil_to_tout:12,psil_to_tout_cnt:12,psil_unpair:27,psil_writ:27,psinfo:27,psuedo:5,pub_boardcfg_rm_tisci:23,pulsar_0:[46,62,78,92,107],pulsar_1:[46,62,78,92,107],purpos:[13,19,27,32,47,63,79,93,108,120,121,122,124,126,128],put:27,qmode:11,qos:12,qqqq:128,queri:[5,15,16,23,122],query_freq_resp:5,question:16,queue:[0,2,3,5,6,7,8,9,10,11,12,13,14,15,16,20,21,22,23,24,27],quick:[119,121],quietli:[11,12],quirk:0,r5_0:[32,47,56,63,72,79,93,108],r5_1:[32,47,56,63,72,93,108],r5_2:[47,56,63,72],r5_3:[47,56,63,72],r5_cl0_c0:[50,66,128],r5_cl0_c1:[50,66,128],r5_lpsc:13,r5_reset:13,r5f:[13,34,81,95,110],r5fss0_core0:[35,41,82,87,96,101,111,116],r5fss0_core1:[35,41,82,87,96,101,111,116],r5fss1_core0:[35,41,96,101,111,116],r5fss1_core1:[35,41,96,101,111,116],ra_init:27,ra_inst:23,ram:[3,9,13],random:[19,120,124,127,128],randomli:120,randomstr:[19,124],rang:[3,5,9,11,12,18,21,27,30,33,37,38,39,45,47,48,51,52,53,54,60,63,64,67,68,69,70,77,80,83,84,85,86,91,94,97,98,99,100,106,109,112,113,114,115],range_num:23,range_num_sec:23,range_start:23,range_start_sec:23,rapidli:5,rare:5,rat:13,rat_exp_intr:[94,109],rate:[5,13],rather:5,rational:13,raw:124,rchan_rcfg:12,rchan_rcq:12,rchan_rflow_rng:12,rchan_rpri_ctrl:12,rchan_rst_sch:12,rchan_thrd_id:10,read:[2,3,9,11,12,13,14,18,20,22,24,27,31,34,41,46,49,56,62,65,72,78,81,87,92,95,101,107,110,116,119,120,123,126,128,129],readabl:[3,27,28,43,58,75,89,104],readback:123,readi:[3,13],real:[5,8,10,11,12,23],realli:119,reamin:24,reason:[11,13,21,22,23,119,122],reboot:[27,120,122],rec_intr_pend:[48,64,80,94,109],receipt:[22,24],receiv:[2,3,5,10,13,21,24,27,30,45,48,60,64,77,80,91,94,106,109,120,129],recept:23,recommend:[21,22,23,119,120],reconfigur:[7,21,22],record:11,recov:13,recoveri:[7,13,24],reduc:[23,24,124],ref:[8,10,11,12,23],refer:[0,2,5,6,13,21,22,23,24,31,34,46,49,62,65,78,81,92,95,107,110,119,121,122,123,126,127,128],reflect:[19,22,23,128],refresh:122,regard:[0,2,6,12],regardless:[5,6],region:[0,9,10,11,12,27,121,122,126,129],regist:[2,5,8,9,11,12,13,14,15,16,18,19,22,23,24,27,34,49,65,81,95,110,120,122],regular:[21,23],reject:[12,21,23,30,33,38,45,48,51,53,60,64,67,69,77,80,83,85,91,94,97,99,106,109,112,114],rel:5,relat:[12,120,126],relationship:3,releas:[2,6,23,120,126,129],release_processor:13,relev:[13,19,119],reli:124,relinquish:13,reloc:3,remain:[3,5,18,22,24,119,123,124,128],remot:10,remov:[21,129],reorder:128,repeat:[18,119],replac:[11,19,121],report:[13,23,27,128],repres:[5,23,27,28,29,32,35,39,41,43,44,47,50,54,56,58,59,63,66,70,72,75,76,79,82,86,87,89,90,93,96,100,101,104,105,108,111,115,116],represent:19,reprogram:123,req:[19,128],req_distinguished_nam:[19,128],request:[3,5,6,7,10,14,15,16,17,20,21,22,23,24,27,30,33,37,38,45,48,51,52,53,60,64,67,68,69,77,80,83,84,85,91,94,97,98,99,106,109,112,113,114,120,129],request_processor:13,requir:[0,2,5,6,8,11,13,16,17,18,19,21,22,23,24,27,30,33,37,38,45,48,51,52,53,60,64,67,68,69,77,80,83,84,85,91,94,97,98,99,106,109,112,113,114,119,120,121,123,124,126,127,128,129],requisit:5,resasg:23,resasg_entri:23,resasg_entries_s:23,resasg_firewall_cfg:27,resasg_fwl_ch:27,resasg_fwl_id:27,resasg_subtype_bcdma_block_copy_chan:39,resasg_subtype_bcdma_ring_block_copy_chan:39,resasg_subtype_bcdma_ring_split_tr_rx_chan:39,resasg_subtype_bcdma_ring_split_tr_tx_chan:39,resasg_subtype_bcdma_split_tr_rx_chan:39,resasg_subtype_bcdma_split_tr_tx_chan:39,resasg_subtype_global_event_sevt:[39,54,70,86,100,115],resasg_subtype_global_event_trigg:[39,54,70,86,100,115],resasg_subtype_ia_bcdma_chan_data_completion_o:39,resasg_subtype_ia_bcdma_chan_error_o:39,resasg_subtype_ia_bcdma_chan_ring_completion_o:39,resasg_subtype_ia_bcdma_rx_chan_data_completion_o:39,resasg_subtype_ia_bcdma_rx_chan_error_o:39,resasg_subtype_ia_bcdma_rx_chan_ring_completion_o:39,resasg_subtype_ia_bcdma_tx_chan_data_completion_o:39,resasg_subtype_ia_bcdma_tx_chan_error_o:39,resasg_subtype_ia_bcdma_tx_chan_ring_completion_o:39,resasg_subtype_ia_pktdma_rx_chan_error_o:39,resasg_subtype_ia_pktdma_rx_flow_completion_o:39,resasg_subtype_ia_pktdma_rx_flow_firewall_o:39,resasg_subtype_ia_pktdma_rx_flow_starvation_o:39,resasg_subtype_ia_pktdma_tx_chan_error_o:39,resasg_subtype_ia_pktdma_tx_flow_completion_o:39,resasg_subtype_ia_timermgr_evt_o:39,resasg_subtype_ia_vint:[39,54,70,86,100,115],resasg_subtype_ir_output:[39,54,70,86,100,115],resasg_subtype_pktdma_cpsw_rx_chan:39,resasg_subtype_pktdma_cpsw_tx_chan:39,resasg_subtype_pktdma_flow_cpsw_rx_chan:39,resasg_subtype_pktdma_flow_icssg_0_rx_chan:39,resasg_subtype_pktdma_flow_icssg_1_rx_chan:39,resasg_subtype_pktdma_flow_saul_rx_0_chan:39,resasg_subtype_pktdma_flow_saul_rx_1_chan:39,resasg_subtype_pktdma_flow_saul_rx_2_chan:39,resasg_subtype_pktdma_flow_saul_rx_3_chan:39,resasg_subtype_pktdma_flow_unmapped_rx_chan:39,resasg_subtype_pktdma_icssg_0_rx_chan:39,resasg_subtype_pktdma_icssg_0_tx_chan:39,resasg_subtype_pktdma_icssg_1_rx_chan:39,resasg_subtype_pktdma_icssg_1_tx_chan:39,resasg_subtype_pktdma_ring_cpsw_rx_chan:39,resasg_subtype_pktdma_ring_cpsw_tx_chan:39,resasg_subtype_pktdma_ring_icssg_0_rx_chan:39,resasg_subtype_pktdma_ring_icssg_0_tx_chan:39,resasg_subtype_pktdma_ring_icssg_1_rx_chan:39,resasg_subtype_pktdma_ring_icssg_1_tx_chan:39,resasg_subtype_pktdma_ring_saul_rx_0_chan:39,resasg_subtype_pktdma_ring_saul_rx_1_chan:39,resasg_subtype_pktdma_ring_saul_rx_2_chan:39,resasg_subtype_pktdma_ring_saul_rx_3_chan:39,resasg_subtype_pktdma_ring_saul_tx_0_chan:39,resasg_subtype_pktdma_ring_saul_tx_1_chan:39,resasg_subtype_pktdma_ring_unmapped_rx_chan:39,resasg_subtype_pktdma_ring_unmapped_tx_chan:39,resasg_subtype_pktdma_saul_rx_0_chan:39,resasg_subtype_pktdma_saul_rx_1_chan:39,resasg_subtype_pktdma_saul_rx_2_chan:39,resasg_subtype_pktdma_saul_rx_3_chan:39,resasg_subtype_pktdma_saul_tx_0_chan:39,resasg_subtype_pktdma_saul_tx_1_chan:39,resasg_subtype_pktdma_unmapped_rx_chan:39,resasg_subtype_pktdma_unmapped_tx_chan:39,resasg_subtype_proxy_proxi:[54,70,86,100,115],resasg_subtype_ra_error_o:[39,54,70,86,100,115],resasg_subtype_ra_generic_ipc:39,resasg_subtype_ra_gp:[54,70,86,100,115],resasg_subtype_ra_monitor:[54,70,86,100,115],resasg_subtype_ra_udmap_rx:[54,70,86,100,115],resasg_subtype_ra_udmap_rx_h:[54,70,86,100,115],resasg_subtype_ra_udmap_rx_uh:[86,100,115],resasg_subtype_ra_udmap_tx:[54,70,86,100,115],resasg_subtype_ra_udmap_tx_ext:[54,70,100,115],resasg_subtype_ra_udmap_tx_h:[54,70,86,100,115],resasg_subtype_ra_udmap_tx_uh:[86,100,115],resasg_subtype_ra_virtid:[39,54,70,86,100,115],resasg_subtype_udmap_global_config:[39,54,70,86,100,115],resasg_subtype_udmap_invalid_flow_o:[54,70,86,100,115],resasg_subtype_udmap_rx_chan:[54,70,86,100,115],resasg_subtype_udmap_rx_flow_common:[54,70,86,100,115],resasg_subtype_udmap_rx_hchan:[54,70,86,100,115],resasg_subtype_udmap_rx_uhchan:[86,100,115],resasg_subtype_udmap_tx_chan:[54,70,86,100,115],resasg_subtype_udmap_tx_echan:[54,70,100,115],resasg_subtype_udmap_tx_hchan:[54,70,86,100,115],resasg_subtype_udmap_tx_uhchan:[86,100,115],resasg_utyp:27,resasg_validate_host:27,resasg_validate_resourc:27,resend:[7,18],resent:18,reserv:[2,3,5,6,11,12,13,19,22,23,27,30,33,37,38,45,48,51,52,53,60,64,67,68,69,77,80,83,84,85,91,94,97,98,99,106,109,112,113,114,126,128],reserved_cfg_entri:24,reset:[2,4,5,6,13,18,19,27,103,118,121,122,127],resetdon:27,resetvec:19,resid:8,resourc:[0,3,6,7,13,16,21,24,25,29,30,31,33,38,42,44,45,46,47,48,51,53,57,59,60,62,63,64,67,69,73,74,76,77,78,80,83,85,88,90,91,92,94,97,99,102,105,106,107,109,112,114,117,119,129,130],resource_get:27,resource_get_range_num:27,resource_get_range_start:27,resource_get_secondary_host:27,resource_get_subtyp:27,resource_get_typ:27,respect:124,respfreq_hz:5,respon:15,respond:[3,5],respons:[0,3,5,6,7,10,13,14,16,17,18,20,21,22,23,24,27,41,56,72,87,101,116,119,120,121,122,129],rest:[2,13,123,124,128],restor:[5,13],restrict:[12,27,123,126],result:[2,5,8,9,11,12,23,27,39,54,70,86,100,115,120,123],ret:5,retain:120,retent:[5,6,27],retention_get:27,retention_put:27,retriev:[3,6,11,16,23,27],reus:19,rev:23,revers:5,review:18,revis:[23,24,122,124,127],rflow_rf:12,rflow_rfa:12,rflow_rfb:12,rflow_rfc:12,rflow_rfd:12,rflow_rff:12,rflow_rfg:12,rflow_rfh:12,rflowfwstat:12,rflowfwstat_pend:12,rgx:[93,108],right:[5,23],ring:[0,2,4,8,12,21,27,33,48,64,74,80,94,109,123,129],ring_ba_hi:11,ring_ba_lo:11,ring_ba_lo_hi:27,ring_ba_lo_lo:27,ring_configur:27,ring_control2:11,ring_count_hi:27,ring_count_lo:27,ring_get_cfg:27,ring_mod:27,ring_mon_cfg:[11,27],ring_mon_cfg_respons:11,ring_monitor_mod:27,ring_monitor_queu:27,ring_monitor_sourc:27,ring_oes_get:27,ring_oes_set:27,ring_orderid:[11,27],ring_siz:[11,27],ring_validate_index:27,ring_virtid:27,ringacc:11,ringacc_control:11,ringacc_data0:11,ringacc_data1:11,ringacc_occ_j:11,ringacc_queu:11,rm_bcfg_hash:19,rm_boardcfg:23,rm_core_init:27,rm_init:27,rmboardcfghash:[19,124],role:21,rollback:[0,19,24,124,127],rom:[17,19,22,34,49,65,81,95,110,124,128],root:[0,2,17,21,23,122,123,124,128],round:21,rout:[12,23,27],router:[0,2,8,23],routin:120,row:[61,122],row_idx:15,row_mask:15,row_soft_lock:15,row_val:15,rsa:0,rsdv2:19,rsdv3:19,rsvd1:19,rsvd2:19,rsvd3:19,rsvd:[2,24],rto:[0,2],rule:[19,23],rules_fil:23,run:[0,3,5,13,18,23,119,120,122,123,128,129],runtim:[4,18,23,24,27,42,57,73,74,88,102,117,127,128],rwcd:[31,46,62,78,92,107],rwd:[31,46,62,78,92,107],rx_atyp:12,rx_burst_siz:12,rx_chan:[45,60,77,91,106],rx_chan_typ:12,rx_desc_typ:12,rx_dest_qnum:12,rx_dest_tag_hi:12,rx_dest_tag_hi_sel:12,rx_dest_tag_lo:12,rx_dest_tag_lo_sel:12,rx_einfo_pres:12,rx_error_handl:12,rx_fdq0_sz0_qnum:12,rx_fdq0_sz1_qnum:12,rx_fdq0_sz2_qnum:12,rx_fdq0_sz3_qnum:12,rx_fdq1_qnum:12,rx_fdq1_sz0_qnum:12,rx_fdq2_qnum:12,rx_fdq2_sz0_qnum:12,rx_fdq3_qnum:12,rx_fdq3_sz0_qnum:12,rx_fetch_siz:12,rx_hchan:[45,60,77,91,106],rx_ignore_long:12,rx_ignore_short:12,rx_orderid:12,rx_pause_on_err:12,rx_prioriti:12,rx_ps_locat:12,rx_psinfo_pres:12,rx_qo:12,rx_sched_prior:12,rx_size_thresh0:12,rx_size_thresh1:12,rx_size_thresh2:12,rx_size_thresh_en:12,rx_sop_offset:12,rx_src_tag_hi:12,rx_src_tag_hi_sel:12,rx_src_tag_lo:12,rx_src_tag_lo_sel:12,rx_uhchan:[77,91,106],rxcq_qnum:12,sa2:2,sa2ul:[14,125,129,130],sa2ul_dkek_key_len:14,sa2ul_inst:14,sa_ul_pka:[48,64,94,109],sa_ul_trng:[48,64,94,109],safeti:121,salt:[19,124],same:[0,2,5,6,11,18,23,24,27,32,47,63,79,93,103,108,118,120,122,124,128],sane:13,satisfi:5,saul0_rx:[37,52,68],saul0_tx:[37,52,68],saul_rx_0_chan:[30,38],saul_rx_1_chan:[30,38],saul_rx_2_chan:[30,38],saul_rx_3_chan:[30,38],saul_tx_0_chan:[30,38],saul_tx_1_chan:[30,38],save:11,scalabl:23,scale:21,scaling_factor:21,scaling_profil:21,scan:13,scenario:[0,13],schedul:[12,23,27],scheme:119,sci:[2,15,16,17,21,22,24,27],script:23,sdbg_debug_ctrl:19,sdk:2,search:5,sec:[18,128],sec_bcfg_enc_iv:19,sec_bcfg_enc_r:19,sec_bcfg_hash:19,sec_bcfg_key_derive_index:19,sec_bcfg_key_derive_salt:19,sec_bcfg_ver:19,sec_boot_ctrl:19,sec_debug_core_sel:19,secboardcfghash:[19,124],secboardcfgv:[19,124],second:[13,23],secondari:[8,23,27],secondary_host:[8,23],secproxi:21,secreci:120,secret:[22,24,129],section:[2,11,12,13,19,23,24,28,30,31,33,37,38,43,45,46,48,51,52,53,58,60,62,64,67,68,69,75,77,78,80,83,84,85,89,91,92,94,97,98,99,104,106,107,109,112,113,114,119,120,123,126,127,128],secur:[1,3,5,6,7,8,9,10,11,12,13,14,15,16,17,21,22,23,25,26,28,29,30,31,32,33,34,35,36,37,38,39,40,42,43,44,45,46,47,48,49,50,51,52,53,54,55,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,73,74,75,76,77,78,79,80,81,82,83,84,85,86,88,89,90,91,92,93,94,95,96,97,98,99,100,102,103,104,105,106,107,108,109,110,111,112,113,114,115,117,118,119,120,121,122,123,125,126,130],see:[3,5,6,12,13,14,17,18,19,23,24,27,41,56,72,87,101,116,120,122,123,124,128],select:[5,11,21,27,128],selector:[12,27],self:13,send:[2,3,5,11,21,22,23,24,27,39,54,70,86,100,115,123],send_receive_with_timeout:5,sender:[2,129],sensit:[119,126],sent:[2,3,5,20,21,22,23,24,27,34,49,65,81,95,110,123,124,129],separ:[0,2,11,13,21,23,24,120,124],seq:2,sequenc:[2,3,5,19,22,23,42,57,73,88,102,117,119,128,129],serv:[21,23],servic:[2,23,24,119,126],set:[0,2,3,5,6,9,10,11,12,15,18,19,21,22,23,24,27,34,42,49,57,65,73,81,88,95,102,110,117,119,120,122,123,124,126,128,129],set_clock_freq:5,set_clock_par:5,set_devic:6,set_freq_req:5,set_local_reset:27,set_processor_config:[13,19],set_processor_control:13,set_processor_suspend_readi:13,setup:[5,9,13,122],sever:3,sevt:[33,48,64,80,94,109],sfals:8,sgx544:[47,63],sha2:[0,19,124,127],sha512:128,shall:[13,119],share:[3,6,23,45,60,77,91,106,120,128],shatyp:19,shavalu:19,shift:12,should:[2,5,13,17,18,19,23,27,35,50,66,82,96,111,119,128],show:[19,23,124,128,129],shown:[2,19,23,123,124,127,128],shutdown:13,side:[14,20,119,120,122,129],sign:[17,18,21,22,23,24,125,128,130],signatur:[18,128],significand:27,signing_config:128,silicon:[13,22],similar:[2,13,119,123,128],similarli:5,simpl:16,simplest:119,simplifi:5,simutan:21,sinc:[2,6,13,21,22,119],singl:[0,13,23,27,120,122,124,128],single_cor:13,singlecore_onli:13,situat:120,size:[3,11,13,14,18,19,21,22,23,24,27,120],size_byt:11,sizeof:[5,21],skip:128,slave:[2,123],slight:0,slightli:6,slot:[31,46,62,78,92,107],small:5,smaller:122,smpk:128,snapshot:5,snippet:5,snoop:13,soc:[0,2,3,5,6,7,8,9,10,11,12,13,18,19,21,22,23,24,27,29,30,32,33,34,35,37,38,39,40,41,42,44,45,47,48,49,50,51,52,53,54,55,56,57,59,60,61,63,64,65,66,67,68,69,70,71,72,73,76,77,79,80,81,82,83,84,85,86,87,88,90,91,93,94,95,96,97,98,99,100,101,102,103,105,106,108,109,110,111,112,113,114,115,116,117,118,119,121,122,123,126,129,130],soc_doc_am6_public_host_desc_host_list:21,soc_events_in:[94,109],soc_events_in_64:[101,116],soc_events_in_65:[101,116],soc_events_in_66:[101,116],soc_events_in_67:[101,116],soc_events_in_68:[101,116],soc_events_in_69:[101,116],soc_events_in_70:[101,116],soc_events_in_71:[101,116],soc_events_in_72:[101,116],soc_events_in_732:[101,116],soc_events_in_733:[101,116],soc_events_in_734:[101,116],soc_events_in_735:[101,116],soc_events_in_73:[101,116],soc_events_out_level:[94,109],soc_phys_addr_t:16,soc_uid:17,soft:122,softwar:[0,3,7,18,21,22,23,119,120,122,123,124,126,127,128],some:[5,6,8,9,11,12,13,21,29,30,32,33,37,38,44,45,47,48,51,52,53,59,60,63,64,67,68,69,76,77,79,80,83,84,85,90,91,93,94,97,98,99,105,106,108,109,112,113,114,123,127,129],soon:120,sop:27,sort:23,sound:119,sourc:[5,6,8,10,11,12,27,28,43,58,75,89,104,124],space:5,span:[119,123],special:[6,13,28,43,58,75,89,104,128],specif:[0,2,3,5,6,12,14,15,17,19,20,21,22,23,27,30,33,37,38,42,45,48,51,52,53,57,60,64,67,68,69,73,77,80,83,84,85,88,91,94,97,98,99,102,103,106,109,112,113,114,117,118,119,120,121,122,123,128,129,130],specifi:[8,10,11,12,13,15,16,17,18,19,20,21,22,23,24,27,28,29,32,43,44,47,58,59,63,75,76,79,89,90,93,104,105,108,122,124,128,129],spectrum:5,speed:119,spi:[33,48,64,80,94,109],spi_64:[41,87,101,116],spi_65:[41,87,101,116],spi_66:[41,87,101,116],spi_67:[41,87,101,116],spi_68:[87,101,116],spi_69:[87,101,116],spi_70:[87,101,116],spi_71:[87,101,116],spi_72:[87,101,116],spi_732:[101,116],spi_733:[101,116],spi_734:[101,116],spi_735:[101,116],spi_73:[87,101,116],split:13,split_tr_rx_chan:[30,38],split_tr_tx_chan:[30,38],spread:5,sproxi:[41,56,72,87,101,116],sproxy_priv:[31,46,62,78,92,107],sr1:[123,130],sr2:130,sram:[3,13,21,23,24],src_id:8,src_index:8,src_thread:10,ss_device_id:27,ssc:5,ssclk_mode_div_clk_mode_valu:13,stabil:0,stabl:13,stack:0,stage:[13,42,57,73,88,102,117,119],stai:6,standalon:[24,122],standard:[0,2,6,8,9,10,11,12,13,22,23,24,27,123],standbywfil2:13,start:[3,6,10,12,13,15,16,19,22,23,27,30,31,39,46,54,62,70,78,86,92,100,107,115,119,128],start_address:16,start_resourc:23,startup:[3,13,16,119],stat_pend:[80,94,109],state:[0,3,5,6,7,11,13,22,23,27,119,122,129],state_on:6,state_retent:6,statu:[3,5,8,9,11,12,27,32,47,63,79,93,108,122,126,128],status_flags_1:13,status_flags_1_clr_all_wait:13,status_flags_1_clr_any_wait:13,status_flags_1_set_all_wait:13,status_flags_1_set_any_wait:13,steadi:129,steer:[8,23],step:[11,13,18,22,23,119,124,127,128,129],still:[2,5,22,23,128],stop:13,storag:23,store:[2,5,12,14,22,24,120,122],str:3,stream:0,stricter:126,string:[3,19,27,120,124,127,128],strongli:[22,119],struct:[2,3,5,6,7,8,9,10,11,12,13,14,15,16,17,19,20,21,22,23,24],structur:[13,19,124,128],strue:8,studio:128,sub:3,sub_vers:3,subhdr:[21,23,24],subject:8,subordin:[11,12],subpath:128,subsect:[2,123],subsequ:[18,23,24],subset:[12,20,119],substructur:[22,23],subsystem:[0,2,8,9,10,11,12,27,28,29,43,44,58,59,75,76,89,90,104,105,126],subtyp:[23,27,39,54,70,86,100,115],subvers:27,succe:[5,21],succeed:2,succes:[16,128],success:[2,5,6,10,13,18,19,20,124,127],successfulli:[16,128],suffic:[5,128],superset:124,superstructur:21,supervisor:[10,11,12,21,24],supervisor_host_id:24,supervisori:24,suppli:[28,43,58,75,89,104,123,124,128],support:[0,2,5,11,12,13,14,17,18,19,21,22,23,27,39,54,70,86,100,115,122,124,126,127,128,129],suppress:[12,27],sure:[8,12,13,22,23,119],suspend:13,sw_main_warmrst:[103,118],sw_mcu_warmrst:[103,118],swrev:19,swrstdisabl:6,swrv:[19,128],symmetr:[0,120],synchron:11,syncreset:6,syntax:19,sysfw:[0,13,19,23,119,121,124,125,130],sysfw_boardcfg_rul:23,sysfw_boardcfg_valid:23,sysfw_boot_seq:19,sysfw_hs_boardcfg:19,sysfw_image_integr:19,sysfw_image_load:19,sysfw_vers:27,sysreset:121,system:[0,1,3,4,5,6,8,9,10,11,12,13,14,15,16,17,18,20,22,23,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,125,126,127,129,130],systemresetwhileconnect:128,sz0:27,sz1:27,sz2:27,sz3:27,tabl:[2,6,8,11,12,19,21,22,28,31,34,43,46,49,58,62,65,75,78,81,89,92,95,104,107,110,124,126,128],taddr:10,tag:[12,27],take:[0,10,11,21,23,24,27,30,31,33,37,38,45,46,48,51,52,53,60,62,64,67,68,69,77,78,80,83,84,85,91,92,94,97,98,99,106,107,109,112,113,114,119,122,123,128,129],taken:[2,22],target:[5,9,17,18,19,27,124,127,128,129],target_err:[48,64],target_freq_hz:5,task:[11,21],tchan_tcfg:12,tchan_tcq:12,tchan_tcredit:12,tchan_tfifo_depth:12,tchan_thrd_id:10,tchan_tpri_ctrl:12,tchan_tst_sch:12,tcm:13,tcm_rstbase:13,tcu_cmd_sync_ns_intr:[94,109],tcu_cmd_sync_s_intr:[94,109],tcu_event_q_ns_intr:[94,109],tcu_event_q_s_intr:[94,109],tcu_global_ns_intr:[94,109],tcu_global_s_intr:[94,109],tcu_ras_intr:[94,109],tdtype:12,te_init:13,teardown:[12,27],technic:[6,13,123],technolog:19,term:119,termin:[5,23],test_image_enc_iv:19,test_image_enc_r:19,test_image_key_derive_index:19,test_image_key_derive_salt:19,test_image_length:19,test_image_sha512:19,tester:120,texa:[0,4,128,130],text:[21,23,128],than:[5,10,11,12,23,39,54,70,86,100,115,119,128,129],thei:[2,5,11,12,23,27,122,123,124,128,129],them:[27,28,43,45,58,60,75,77,89,91,104,106,128],themselv:13,theorit:18,therefor:[10,11,21,23,122],therm_lvl_gt_th1_intr:[94,109],therm_lvl_gt_th2_intr:[94,109],therm_lvl_lt_th0_intr:[94,109],thi:[0,2,3,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,27,28,29,30,31,32,33,34,35,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,126,127,128,129],thing:[32,47,63,79,93,108],those:3,though:[24,32,47,63,79,93,108,119,128],thrd_id:10,thread:[2,23,24,27,126],three:16,threshold:[11,27,41,56,72,87,101,116],through:[2,8,10,11,12,17,18,22,23,24,120,122,123,126,128],throughout:27,throughput:120,thu:[8,21,23],thumb:13,ti_bcfg_info:19,ti_enc_info:19,ti_load_info:19,tied:[17,122],tif:13,till:22,time:[6,8,10,11,12,13,15,18,22,23,24,31,46,62,78,92,107,119,120,122],timedout:13,timeout:[12,13,27],timer_pwm:[33,80,94,109],timermgr_evt:33,tisci:[0,18,19,27,28,29,30,31,33,37,38,43,44,45,46,48,51,52,53,58,59,60,62,64,67,68,69,75,76,77,78,80,83,84,85,89,90,91,92,94,97,98,99,104,105,106,107,109,112,113,114,122,123,127,129],tisci_head:[2,3,5,6,7,8,9,10,11,12,13,14,15,16,17,20,21,22,23,24],tisci_msg_:2,tisci_msg_board_config:[21,23,27,119],tisci_msg_board_config_pm:[21,22,119],tisci_msg_board_config_pm_handl:22,tisci_msg_board_config_pm_req:22,tisci_msg_board_config_pm_resp:22,tisci_msg_board_config_req:21,tisci_msg_board_config_resp:21,tisci_msg_board_config_rm:[23,119],tisci_msg_board_config_rm_handl:23,tisci_msg_board_config_rm_req:23,tisci_msg_board_config_rm_resp:23,tisci_msg_board_config_secur:[24,119,124],tisci_msg_board_config_security_req:24,tisci_msg_board_config_security_resp:24,tisci_msg_boot_notification_req:3,tisci_msg_boot_notification_resp:3,tisci_msg_change_fwl_own:[123,126],tisci_msg_data:5,tisci_msg_flag_:2,tisci_msg_flag_ack:[2,5],tisci_msg_flag_aop:[2,5],tisci_msg_flag_clock_allow_freq_chang:5,tisci_msg_flag_clock_allow_ssc:5,tisci_msg_flag_clock_input_term:5,tisci_msg_flag_clock_ssc_act:5,tisci_msg_flag_device_exclus:6,tisci_msg_flag_device_reset_iso:6,tisci_msg_flag_device_wake_en:6,tisci_msg_flag_reserved0:2,tisci_msg_fwl_change_owner_info_req:16,tisci_msg_fwl_change_owner_info_resp:16,tisci_msg_fwl_get_firewall_region_req:16,tisci_msg_fwl_get_firewall_region_resp:16,tisci_msg_fwl_set_firewall_region_req:16,tisci_msg_fwl_set_firewall_region_resp:16,tisci_msg_get_clock:22,tisci_msg_get_clock_par:22,tisci_msg_get_clock_parent_req:5,tisci_msg_get_clock_parent_resp:5,tisci_msg_get_clock_req:5,tisci_msg_get_clock_resp:5,tisci_msg_get_devic:[13,22],tisci_msg_get_device_req:6,tisci_msg_get_device_resp:6,tisci_msg_get_freq:22,tisci_msg_get_freq_req:5,tisci_msg_get_freq_resp:5,tisci_msg_get_fwl_region:123,tisci_msg_get_num_clock_par:22,tisci_msg_get_num_clock_parents_req:5,tisci_msg_get_num_clock_parents_resp:5,tisci_msg_get_otp_row_lock_statu:122,tisci_msg_get_otp_row_lock_status_req:15,tisci_msg_get_otp_row_lock_status_resp:15,tisci_msg_get_soc_uid:128,tisci_msg_get_soc_uid_req:17,tisci_msg_get_soc_uid_resp:17,tisci_msg_lock_otp_row:122,tisci_msg_lock_otp_row_req:15,tisci_msg_lock_otp_row_resp:15,tisci_msg_open_debug_fwl:128,tisci_msg_open_debug_fwls_req:17,tisci_msg_open_debug_fwls_resp:17,tisci_msg_pm_board_config_pm:22,tisci_msg_proc_auth_boot:[127,129],tisci_msg_proc_auth_boot_req:13,tisci_msg_proc_auth_boot_resp:13,tisci_msg_proc_get_statu:129,tisci_msg_proc_get_status_req:13,tisci_msg_proc_get_status_resp:13,tisci_msg_proc_handov:129,tisci_msg_proc_handover_req:13,tisci_msg_proc_handover_resp:13,tisci_msg_proc_releas:129,tisci_msg_proc_release_req:13,tisci_msg_proc_release_resp:13,tisci_msg_proc_request:129,tisci_msg_proc_request_req:13,tisci_msg_proc_request_resp:13,tisci_msg_proc_set_config:129,tisci_msg_proc_set_config_req:13,tisci_msg_proc_set_config_resp:13,tisci_msg_proc_set_control:129,tisci_msg_proc_set_control_req:13,tisci_msg_proc_set_control_resp:13,tisci_msg_proc_status_wait_req:13,tisci_msg_proc_status_wait_resp:13,tisci_msg_proc_wait_statu:129,tisci_msg_query_freq:[22,34,49,65,81,95,110],tisci_msg_query_freq_req:5,tisci_msg_query_freq_resp:5,tisci_msg_queue_nonsec_high_tx:5,tisci_msg_read_otp_mmr:122,tisci_msg_read_otp_mmr_req:15,tisci_msg_read_otp_mmr_resp:15,tisci_msg_receiv:27,tisci_msg_rm_board_config_rm:23,tisci_msg_rm_get_resource_rang:23,tisci_msg_rm_get_resource_range_req:23,tisci_msg_rm_get_resource_range_resp:23,tisci_msg_rm_irq_releas:23,tisci_msg_rm_irq_release_req:8,tisci_msg_rm_irq_release_resp:8,tisci_msg_rm_irq_set:23,tisci_msg_rm_irq_set_req:8,tisci_msg_rm_irq_set_resp:8,tisci_msg_rm_proxy_cfg:23,tisci_msg_rm_proxy_cfg_req:9,tisci_msg_rm_proxy_cfg_resp:9,tisci_msg_rm_psil_pair:[23,126],tisci_msg_rm_psil_pair_req:10,tisci_msg_rm_psil_pair_resp:10,tisci_msg_rm_psil_read:23,tisci_msg_rm_psil_read_req:10,tisci_msg_rm_psil_read_resp:10,tisci_msg_rm_psil_unpair:23,tisci_msg_rm_psil_unpair_req:10,tisci_msg_rm_psil_unpair_resp:10,tisci_msg_rm_psil_writ:[23,126],tisci_msg_rm_psil_write_req:10,tisci_msg_rm_psil_write_resp:10,tisci_msg_rm_ring_cfg:23,tisci_msg_rm_ring_cfg_req:11,tisci_msg_rm_ring_cfg_resp:11,tisci_msg_rm_ring_mon_cfg:23,tisci_msg_rm_ring_mon_cfg_req:11,tisci_msg_rm_ring_mon_cfg_resp:11,tisci_msg_rm_udmap_flow_cfg:23,tisci_msg_rm_udmap_flow_cfg_req:12,tisci_msg_rm_udmap_flow_cfg_resp:12,tisci_msg_rm_udmap_flow_deleg:[45,60,77,91,106],tisci_msg_rm_udmap_flow_delegate_req:12,tisci_msg_rm_udmap_flow_delegate_resp:12,tisci_msg_rm_udmap_flow_size_thresh_cfg:23,tisci_msg_rm_udmap_flow_size_thresh_cfg_req:12,tisci_msg_rm_udmap_flow_size_thresh_cfg_resp:12,tisci_msg_rm_udmap_gcfg_cfg:23,tisci_msg_rm_udmap_gcfg_cfg_req:12,tisci_msg_rm_udmap_gcfg_cfg_resp:12,tisci_msg_rm_udmap_rx_ch_cfg:23,tisci_msg_rm_udmap_rx_ch_cfg_req:12,tisci_msg_rm_udmap_rx_ch_cfg_resp:12,tisci_msg_rm_udmap_tx_ch_cfg:[23,30],tisci_msg_rm_udmap_tx_ch_cfg_req:12,tisci_msg_rm_udmap_tx_ch_cfg_resp:12,tisci_msg_sa2ul_get_dkek:120,tisci_msg_sa2ul_get_dkek_req:14,tisci_msg_sa2ul_get_dkek_resp:14,tisci_msg_sa2ul_release_dkek:120,tisci_msg_sa2ul_release_dkek_req:14,tisci_msg_sa2ul_release_dkek_resp:14,tisci_msg_sa2ul_set_dkek:120,tisci_msg_sa2ul_set_dkek_req:14,tisci_msg_sa2ul_set_dkek_resp:14,tisci_msg_sec_handov:129,tisci_msg_security_handover_req:20,tisci_msg_security_handover_resp:20,tisci_msg_sender_host_id:27,tisci_msg_set_clock:22,tisci_msg_set_clock_par:22,tisci_msg_set_clock_parent_req:5,tisci_msg_set_clock_parent_resp:5,tisci_msg_set_clock_req:5,tisci_msg_set_clock_resp:5,tisci_msg_set_devic:22,tisci_msg_set_device_req:6,tisci_msg_set_device_reset:22,tisci_msg_set_device_resets_req:6,tisci_msg_set_device_resets_resp:6,tisci_msg_set_device_resp:6,tisci_msg_set_freq:[22,34,49,65,81,95,110],tisci_msg_set_freq_req:5,tisci_msg_set_freq_resp:5,tisci_msg_set_fwl_region:[123,126],tisci_msg_soft_lock_otp_write_glob:122,tisci_msg_soft_lock_otp_write_global_req:15,tisci_msg_soft_lock_otp_write_global_resp:15,tisci_msg_sys_reset:[22,121],tisci_msg_sys_reset_req:7,tisci_msg_sys_reset_resp:7,tisci_msg_value_clock_hw_state_not_readi:5,tisci_msg_value_clock_hw_state_readi:5,tisci_msg_value_clock_sw_state_auto:5,tisci_msg_value_clock_sw_state_req:5,tisci_msg_value_clock_sw_state_unreq:5,tisci_msg_value_device_hw_state_off:6,tisci_msg_value_device_hw_state_on:6,tisci_msg_value_device_hw_state_tran:6,tisci_msg_value_device_sw_state_auto_off:6,tisci_msg_value_device_sw_state_on:6,tisci_msg_value_device_sw_state_retent:6,tisci_msg_value_rm_dst_host_irq_valid:8,tisci_msg_value_rm_dst_id_valid:8,tisci_msg_value_rm_global_event_valid:8,tisci_msg_value_rm_ia_id_valid:8,tisci_msg_value_rm_mon_data0_val_valid:11,tisci_msg_value_rm_mon_data1_val_valid:11,tisci_msg_value_rm_mon_mode_dis:11,tisci_msg_value_rm_mon_mode_push_pop:11,tisci_msg_value_rm_mon_mode_starv:11,tisci_msg_value_rm_mon_mode_threshold:11,tisci_msg_value_rm_mon_mode_valid:11,tisci_msg_value_rm_mon_mode_watermark:11,tisci_msg_value_rm_mon_queue_valid:11,tisci_msg_value_rm_mon_source_valid:11,tisci_msg_value_rm_mon_src_accum_q_s:11,tisci_msg_value_rm_mon_src_elem_cnt:11,tisci_msg_value_rm_mon_src_head_pkt_s:11,tisci_msg_value_rm_ring_addr_hi_valid:11,tisci_msg_value_rm_ring_addr_lo_valid:11,tisci_msg_value_rm_ring_asel_valid:11,tisci_msg_value_rm_ring_count_valid:11,tisci_msg_value_rm_ring_mode_credenti:11,tisci_msg_value_rm_ring_mode_messag:11,tisci_msg_value_rm_ring_mode_qm:11,tisci_msg_value_rm_ring_mode_r:11,tisci_msg_value_rm_ring_mode_valid:11,tisci_msg_value_rm_ring_order_id_valid:11,tisci_msg_value_rm_ring_size_128b:11,tisci_msg_value_rm_ring_size_16b:11,tisci_msg_value_rm_ring_size_256b:11,tisci_msg_value_rm_ring_size_32b:11,tisci_msg_value_rm_ring_size_4b:11,tisci_msg_value_rm_ring_size_64b:11,tisci_msg_value_rm_ring_size_8b:11,tisci_msg_value_rm_ring_size_valid:11,tisci_msg_value_rm_ring_virtid_valid:11,tisci_msg_value_rm_udmap_ch_atype_intermedi:12,tisci_msg_value_rm_udmap_ch_atype_phi:12,tisci_msg_value_rm_udmap_ch_atype_valid:12,tisci_msg_value_rm_udmap_ch_atype_virtu:12,tisci_msg_value_rm_udmap_ch_burst_size_128_byt:12,tisci_msg_value_rm_udmap_ch_burst_size_256_byt:12,tisci_msg_value_rm_udmap_ch_burst_size_64_byt:12,tisci_msg_value_rm_udmap_ch_burst_size_valid:12,tisci_msg_value_rm_udmap_ch_chan_type_valid:12,tisci_msg_value_rm_udmap_ch_cq_qnum_valid:12,tisci_msg_value_rm_udmap_ch_fetch_size_max:12,tisci_msg_value_rm_udmap_ch_fetch_size_valid:12,tisci_msg_value_rm_udmap_ch_order_id_max:12,tisci_msg_value_rm_udmap_ch_order_id_valid:12,tisci_msg_value_rm_udmap_ch_pause_on_err_valid:12,tisci_msg_value_rm_udmap_ch_pause_on_error_dis:12,tisci_msg_value_rm_udmap_ch_pause_on_error_en:12,tisci_msg_value_rm_udmap_ch_priority_max:12,tisci_msg_value_rm_udmap_ch_priority_valid:12,tisci_msg_value_rm_udmap_ch_qos_max:12,tisci_msg_value_rm_udmap_ch_qos_valid:12,tisci_msg_value_rm_udmap_ch_rx_flowid_cnt_valid:12,tisci_msg_value_rm_udmap_ch_rx_flowid_start_valid:12,tisci_msg_value_rm_udmap_ch_rx_ignore_long_valid:12,tisci_msg_value_rm_udmap_ch_rx_ignore_short_valid:12,tisci_msg_value_rm_udmap_ch_sched_prior_high:12,tisci_msg_value_rm_udmap_ch_sched_prior_low:12,tisci_msg_value_rm_udmap_ch_sched_prior_medhigh:12,tisci_msg_value_rm_udmap_ch_sched_prior_medlow:12,tisci_msg_value_rm_udmap_ch_sched_priority_valid:12,tisci_msg_value_rm_udmap_ch_tx_credit_count_valid:12,tisci_msg_value_rm_udmap_ch_tx_fdepth_valid:12,tisci_msg_value_rm_udmap_ch_tx_filt_einfo_valid:12,tisci_msg_value_rm_udmap_ch_tx_filt_pswords_valid:12,tisci_msg_value_rm_udmap_ch_tx_supr_tdpkt_valid:12,tisci_msg_value_rm_udmap_ch_tx_tdtype_valid:12,tisci_msg_value_rm_udmap_ch_type_3p_block_ref:12,tisci_msg_value_rm_udmap_ch_type_3p_block_v:12,tisci_msg_value_rm_udmap_ch_type_3p_dma_ref:12,tisci_msg_value_rm_udmap_ch_type_3p_dma_v:12,tisci_msg_value_rm_udmap_ch_type_packet:12,tisci_msg_value_rm_udmap_ch_type_packet_single_buf:12,tisci_msg_value_rm_udmap_flow_delegate_clear:12,tisci_msg_value_rm_udmap_flow_delegate_clear_valid:12,tisci_msg_value_rm_udmap_flow_delegate_host_valid:12,tisci_msg_value_rm_udmap_flow_desc_type_valid:12,tisci_msg_value_rm_udmap_flow_dest_qnum_valid:12,tisci_msg_value_rm_udmap_flow_dest_tag_hi_sel_valid:12,tisci_msg_value_rm_udmap_flow_dest_tag_hi_valid:12,tisci_msg_value_rm_udmap_flow_dest_tag_lo_sel_valid:12,tisci_msg_value_rm_udmap_flow_dest_tag_lo_valid:12,tisci_msg_value_rm_udmap_flow_einfo_present_valid:12,tisci_msg_value_rm_udmap_flow_error_handling_valid:12,tisci_msg_value_rm_udmap_flow_fdq0_sz0_qnum_valid:12,tisci_msg_value_rm_udmap_flow_fdq0_sz1_qnum_valid:12,tisci_msg_value_rm_udmap_flow_fdq0_sz2_qnum_valid:12,tisci_msg_value_rm_udmap_flow_fdq0_sz3_qnum_valid:12,tisci_msg_value_rm_udmap_flow_fdq1_qnum_valid:12,tisci_msg_value_rm_udmap_flow_fdq2_qnum_valid:12,tisci_msg_value_rm_udmap_flow_fdq3_qnum_valid:12,tisci_msg_value_rm_udmap_flow_ps_location_valid:12,tisci_msg_value_rm_udmap_flow_psinfo_present_valid:12,tisci_msg_value_rm_udmap_flow_size_thresh0_valid:12,tisci_msg_value_rm_udmap_flow_size_thresh1_valid:12,tisci_msg_value_rm_udmap_flow_size_thresh2_valid:12,tisci_msg_value_rm_udmap_flow_size_thresh_en_valid:12,tisci_msg_value_rm_udmap_flow_sop_offset_valid:12,tisci_msg_value_rm_udmap_flow_src_tag_hi_sel_valid:12,tisci_msg_value_rm_udmap_flow_src_tag_hi_valid:12,tisci_msg_value_rm_udmap_flow_src_tag_lo_sel_valid:12,tisci_msg_value_rm_udmap_flow_src_tag_lo_valid:12,tisci_msg_value_rm_udmap_gcfg_emu_ctrl_valid:12,tisci_msg_value_rm_udmap_gcfg_perf_ctrl_valid:12,tisci_msg_value_rm_udmap_gcfg_psil_to_valid:12,tisci_msg_value_rm_udmap_gcfg_rflowfwstat_valid:12,tisci_msg_value_rm_udmap_rx_ch_packet_except:12,tisci_msg_value_rm_udmap_rx_ch_packet_ignor:12,tisci_msg_value_rm_udmap_rx_flow_desc_host:12,tisci_msg_value_rm_udmap_rx_flow_desc_mono:12,tisci_msg_value_rm_udmap_rx_flow_dest_select_cfg_tag:12,tisci_msg_value_rm_udmap_rx_flow_dest_select_dest_tag_hi:12,tisci_msg_value_rm_udmap_rx_flow_dest_select_dest_tag_lo:12,tisci_msg_value_rm_udmap_rx_flow_dest_select_flow_id:12,tisci_msg_value_rm_udmap_rx_flow_dest_select_non:12,tisci_msg_value_rm_udmap_rx_flow_einfo_not_pres:12,tisci_msg_value_rm_udmap_rx_flow_einfo_pres:12,tisci_msg_value_rm_udmap_rx_flow_err_drop:12,tisci_msg_value_rm_udmap_rx_flow_err_retri:12,tisci_msg_value_rm_udmap_rx_flow_ps_begin_db:12,tisci_msg_value_rm_udmap_rx_flow_ps_end_pd:12,tisci_msg_value_rm_udmap_rx_flow_psinfo_not_pres:12,tisci_msg_value_rm_udmap_rx_flow_psinfo_pres:12,tisci_msg_value_rm_udmap_rx_flow_size_thresh_max:12,tisci_msg_value_rm_udmap_rx_flow_sop_max:12,tisci_msg_value_rm_udmap_rx_flow_src_select_cfg_tag:12,tisci_msg_value_rm_udmap_rx_flow_src_select_flow_id:12,tisci_msg_value_rm_udmap_rx_flow_src_select_non:12,tisci_msg_value_rm_udmap_rx_flow_src_select_src_tag:12,tisci_msg_value_rm_udmap_tx_ch_credit_cnt_max:12,tisci_msg_value_rm_udmap_tx_ch_filt_einfo_dis:12,tisci_msg_value_rm_udmap_tx_ch_filt_einfo_en:12,tisci_msg_value_rm_udmap_tx_ch_filt_pswords_dis:12,tisci_msg_value_rm_udmap_tx_ch_filt_pswords_en:12,tisci_msg_value_rm_udmap_tx_ch_suppress_td_dis:12,tisci_msg_value_rm_udmap_tx_ch_suppress_td_en:12,tisci_msg_value_rm_udmap_tx_ch_tdtype_immedi:12,tisci_msg_value_rm_udmap_tx_ch_tdtype_wait:12,tisci_msg_value_rm_unused_secondary_host:23,tisci_msg_value_rm_vint_status_bit_index_valid:8,tisci_msg_value_rm_vint_valid:8,tisci_msg_version_req:3,tisci_msg_version_resp:3,tisci_msg_write_otp_row:122,tisci_msg_write_otp_row_req:15,tisci_msg_write_otp_row_resp:15,tisci_query_msmc_req:3,tisci_query_msmc_resp:3,tisci_sec_head:2,todo:124,togeth:12,toler:[5,21],tool:[23,128],top:[13,24],topic:[0,130],total:[11,13,14,61,120,126],toward:129,trace:[0,8,21,123,130],trace_data_vers:27,trace_dst:21,trace_dst_en:21,trace_dst_itm:21,trace_dst_mem:21,trace_dst_uart0:21,trace_src:21,trace_src_bas:21,trace_src_en:21,trace_src_pm:21,trace_src_rm:21,trace_src_sec:21,trace_src_supr:21,trace_src_us:21,track:[2,119],tradit:0,transact:[18,120,123],transfer:[2,12,16,24,123,128],transit:[6,27,126],translat:8,transmit:[2,10,27,30,48,64,80,94,109],transmitt:2,travers:123,treatment:12,tree:[22,24],tremend:0,tri:13,tricki:120,trigger:[8,33,48,64,80,94,109],tripl:21,trivial:13,trm:[12,13,16,31,46,62,78,92,107,123,126],trng:126,trust:[0,2,17,18,21,122,124,128],tune:24,turn:[6,13,27],tweak:[22,34,49,65,81,95,110],two:[2,13,18,21,23,119,122,123,124,128,129],tx_atyp:12,tx_burst_siz:12,tx_chan:[45,60,77,91,106],tx_chan_typ:12,tx_credit_count:12,tx_echan:[45,60,91,106],tx_fetch_siz:12,tx_filt_einfo:12,tx_filt_psword:12,tx_hchan:[45,60,77,91,106],tx_orderid:12,tx_pause_on_err:12,tx_prioriti:12,tx_qo:12,tx_sched_prior:12,tx_supr_tdpkt:12,tx_tdtype:12,tx_uhchan:[77,91,106],txcq_qnum:12,txt:128,type:[2,3,5,6,7,8,9,10,11,12,13,14,15,16,17,20,21,22,23,24,27,30,37,38,45,52,53,60,68,69,74,77,84,85,91,98,99,106,113,114,119,121,124],typic:[5,6,11,13,32,47,63,79,93,108,119,128],u16:[2,3,8,9,10,11,12,16,19,21,22,23,24],u32:[2,3,5,6,8,9,10,11,12,13,15,16,17,19,21,22,23,24,27],u64:[5,17,19],uart0:21,uart:[22,27,119],udma:[0,48,64,80,94,109,123],udma_ch_atyp:27,udma_ch_burst_s:27,udma_ch_cq_qnum:27,udma_ch_fetch_s:27,udma_ch_orderid:27,udma_ch_pause_on_err:27,udma_ch_prior:27,udma_ch_qo:27,udma_ch_sched_prior:27,udma_ch_thread_id:27,udma_ch_typ:27,udma_flow_desc_typ:27,udma_flow_dest_tag_sel:27,udma_flow_rx_dest_qnum:27,udma_flow_rx_einfo_pres:27,udma_flow_rx_error_handl:27,udma_flow_rx_fdq0_sz0_qnum:27,udma_flow_rx_fdq0_sz1_qnum:27,udma_flow_rx_fdq0_sz2_qnum:27,udma_flow_rx_fdq0_sz3_qnum:27,udma_flow_rx_fdq1_qnum:27,udma_flow_rx_fdq2_qnum:27,udma_flow_rx_fdq3_qnum:27,udma_flow_rx_ps_loc:27,udma_flow_rx_psinfo_pres:27,udma_flow_rx_size_thresh_en:27,udma_flow_rx_sop_offset:27,udma_flow_src_tag_sel:27,udma_rx_ch_flow_id_count:27,udma_rx_ch_flow_id_start:27,udma_rx_ch_ignore_long:27,udma_rx_ch_ignore_short:27,udma_tx_ch_credit_count:27,udma_tx_ch_fdepth:27,udma_tx_ch_filt_einfo:27,udma_tx_ch_filt_psword:27,udma_tx_ch_supr_tdpkt:27,udma_tx_ch_tdtyp:27,udma_utc_ctrl:23,udmap0_cfgstrm_tx:[52,68,84,98,113],udmap0_rx:[52,68],udmap0_trstrm_tx:[52,68,84,98,113],udmap0_tx:[52,68],udmap:[2,4,8,10,11,23,27],udmap_flow_cfg:27,udmap_flow_get_cfg:27,udmap_flow_sz_cfg:27,udmap_flow_sz_get_cfg:27,udmap_gcfg_cfg:[12,27],udmap_gcfg_cfg_respons:12,udmap_gcfg_get_cfg:27,udmap_init:27,udmap_oes_get:27,udmap_oes_set:27,udmap_rx:[52,53,68,69,85,99,114],udmap_rx_ch_cfg:27,udmap_rx_ch_get_cfg:27,udmap_rx_ch_set_thrd_id:27,udmap_rx_h:[53,69,85,99,114],udmap_rx_uh:[85,99,114],udmap_tx:[52,53,68,69,85,99,114],udmap_tx_ch_cfg:27,udmap_tx_ch_get_cfg:27,udmap_tx_ch_set_thrd_id:27,udmap_tx_ext:[53,69,99,114],udmap_tx_h:[53,69,85,99,114],udmap_tx_uh:[85,99,114],ufs_intr:[94,109],uid:[19,24],uid_len_word:17,uint32_t:5,unabl:128,unavail:129,unawar:2,undefin:[23,123],under:[2,22,23,123],underli:[5,122,123],understand:[2,3,24,119],understood:[34,49,65,81,95,110],unifi:0,uniqu:[0,17,18,19,21,22,23,27,31,39,46,54,62,70,78,86,92,100,107,115,120],unit:[0,12,21],unknown:12,unless:[5,13,128],unlock:[0,17,18,19,22],unmap:[8,27],unmapped_rx_chan:[30,38],unmapped_tx_chan:[30,38],unown:126,unpair:[27,126],unprivileg:123,unrel:123,unsign:[21,23,124],unsuccess:18,unsupport:24,until:[3,13,18,22,23,24,27,120,122,124,127],unus:[5,9,10,16,23,24,27],updat:[13,19,22,23,124,126,128],upfront:119,upon:[23,24,119],upper:[11,19,27],upto:13,url:23,usag:[2,14,16,20,27,120,121],usart_irq:[48,64,80,94,109],uscif:128,use:[2,3,6,7,9,10,11,12,13,19,21,23,24,27,30,32,33,37,38,42,45,47,48,51,52,53,57,60,63,64,67,68,69,73,77,79,80,83,84,85,88,91,93,94,97,98,99,102,106,108,109,112,113,114,117,119,120,121,122,123,124,126,128,129],use_dkek:120,useabl:[47,63],usecas:[3,5,13,19,21,22,34,49,65,81,95,110,127,129],used:[0,2,3,5,6,7,8,9,10,11,12,13,16,17,18,19,21,22,23,24,27,28,32,33,37,38,42,43,47,48,51,52,53,57,58,63,64,67,68,69,73,75,79,80,83,84,85,88,89,93,94,97,98,99,102,103,104,108,109,112,113,114,117,118,119,120,121,122,124,126,127,128,129],useful:27,user:[0,2,5,7,12,13,19,21,22,23,27,28,29,31,34,43,44,46,49,58,59,62,65,75,76,78,81,89,90,92,95,104,105,107,110,119,120,121,129],uses:[2,3,8,19,120,129],using:[0,10,12,13,16,17,18,21,22,23,27,45,60,77,91,106,119,120,122,123,124,127,128],usual:[2,5],utc_chan_start:12,util:[0,8,10,27,57,73,88,102,117],v3_ca:[19,128],valid:[2,3,5,10,13,19,21,27,30,33,37,38,45,48,51,52,53,60,64,67,68,69,77,80,83,84,85,91,94,97,98,99,106,109,112,113,114,119,129],valid_param:[8,9,10,11,12,27],valid_param_hi:27,valid_param_lo:27,valu:[2,3,5,7,8,9,10,11,12,13,14,15,18,19,21,22,23,24,27,30,33,34,37,38,42,45,48,49,51,52,53,57,60,61,64,65,67,68,69,73,77,80,81,83,84,85,88,91,94,95,97,98,99,102,103,106,109,110,112,113,114,117,118,120,122,123,126,127,128],vari:[6,7,13,23,119,122],variabl:23,variant:[19,128],variat:0,variou:[0,2,5,6,13,18,19,24,27,119,123,124,126,127],vector:[13,19,124,127],veri:[5,13],verifi:[2,10,12,18,19,22,23,124,127,128],version:[3,5,19,21,23,24,27,124,128],via:[0,2,3,5,8,9,10,11,12,13,14,17,18,21,23,24,28,29,30,43,44,58,59,75,76,89,90,104,105,123,129],video:[95,110],view:[0,5,6],vint:[8,33,48,64,80,94,109],vint_status_bit_index:8,virt:[11,27],virtid:11,virtual:[0,8,23,27,32,47,63,79,93,108],vision:[95,110],vm2:32,voltag:119,vshs9c9qqwgrb:[19,128],wai:[2,19,27,120,124,128],wait:[18,27],wake:[6,121],wake_arm:27,wake_handl:27,wakeup:[13,27,57,73,88,102,117],wakeupss:21,warm:[7,122],warn:[2,13,39,54,70,86,100,115],well:[2,5,11,18,21,22,23,24,27,124,128],wfe:13,wfi:13,what:[5,8,10,21,23,34,49,65,81,95,110,119,121],whatev:2,when:[2,3,5,6,7,8,9,11,12,13,18,19,21,23,24,27,30,34,49,65,81,95,110,119,120,121,123,124,127,128,129],whenev:23,where:[5,8,9,11,12,18,19,22,23,24,31,46,62,78,92,107,119,120,126,127,128],wherev:120,whether:[2,9,11,12,19,23,24],which:[0,2,5,6,8,10,11,12,13,19,21,22,23,24,27,28,32,34,41,43,47,49,56,58,63,65,72,75,79,81,87,89,93,95,101,104,108,110,116,119,120,122,126,128],who:[11,12,23,24,120,129],whole:[22,23],whose:[10,23],wide:[5,6,7,11,22,24,27,128],wider:119,width:[10,122],wild:128,wildcard:[24,128],window:128,wipe:129,wish:24,within:[5,6,8,9,10,11,12,13,18,23,24,27,30,33,38,45,48,51,53,60,64,67,69,77,80,83,85,91,94,97,99,106,109,112,114],without:2,wkup:[22,103,118,121],word:[10,12,17,18,23,27,123,128],work:[12,23,24,122],workaround:[0,11],worst:13,would:[5,7,13,21,22,23,28,43,58,75,89,104,126,128],wrap:[2,11],writabl:123,write:[2,3,9,11,12,13,18,24,27,31,41,46,56,62,72,78,87,92,101,107,116,120,126,128],write_host:[24,122],writeback:[21,23],writer:122,written:[10,11,15,18,27,120,122],x0fsqgtpwbgpuiv:[19,128],x509:[4,13,17,18,24,124,127,128],x509_extens:[19,128],xds110:128,xmit_intr_pend:[48,64,80,94,109],xyz:[28,43,58,75,89,104],yes:13,yet:[5,8,18,19],you:[2,13,24,119,128],your:[5,6,13],zero:[2,5,8,11,12,13,15,16,18,19,22,23,30,124,127,128]},titles:["Introduction","Chapter 1: Introduction","Texas Instruments System Controller Interface (TISCI)","TISCI General Message API Documentation","Chapter 2: TISCI Message Documentation","TISCI PM Clock API Documentation","TISCI PM Device API Documentation","TISCI PM System Reset API Documentation","Resource Management IRQ TISCI Message Description","Resource Management Proxy TISCI Message Description","Resource Management PSI-L TISCI Message Description","Resource Management Ring Accelerator TISCI Message Description","Resource Management UDMAP TISCI Message Description","Processor Boot Management TISCI Description","Derived KEK TISCI Description","Extended OTP TISCI Description","Firewall TISCI Description","Runtime Debug TISCI Description","Secure AP Command Interface","Security X509 Certificate Documentation","Security Handover Message Description","Board Configuration","Power Management Board Configuration","Resource Management Board Configuration","Security Board Configuration","Chapter 3: Board Configuration","Chapter 4: Interpreting Trace Data","Trace Layer","AM64X Clock Identifiers","AM64X Devices Descriptions","AM64X DMA Device Descriptions","AM64X Firewall Descriptions","AM64X Host Descriptions","AM64X Interrupt Management Device Descriptions","AM64X PLL Defaults","AM64X Processor Descriptions","AM64X Proxy Device Descriptions","AM64X PSI-L Device Descriptions","AM64X Ring Accelerator Device Descriptions","AM64X Board Configuration Resource Assignment Type Descriptions","AM6 Runtime Keystore","AM64X Secure Proxy Descriptions","AM64X Device Group descriptions","AM6 Clock Identifiers","AM6 Devices Descriptions","AM65X_SR2 DMA Device Descriptions","AM6 Firewall Descriptions","AM6 Host Descriptions","AM65X_SR2 Interrupt Management Device Descriptions","AM6 PLL Defaults","AM6 Processor Descriptions","AM65X_SR2 Proxy Device Descriptions","AM65X_SR2 PSI-L Device Descriptions","AM65X_SR2 Ring Accelerator Device Descriptions","AM65X_SR2 Board Configuration Resource Assignment Type Descriptions","AM6 Runtime Keystore","AM6 Secure Proxy Descriptions","AM6 Device Group descriptions","AM6 Clock Identifiers","AM6 Devices Descriptions","AM6 DMA Device Descriptions","AM65x Extended OTP Information","AM6 Firewall Descriptions","AM6 Host Descriptions","AM6 Interrupt Management Device Descriptions","AM6 PLL Defaults","AM6 Processor Descriptions","AM6 Proxy Device Descriptions","AM6 PSI-L Device Descriptions","AM6 Ring Accelerator Device Descriptions","AM6 Board Configuration Resource Assignment Type Descriptions","AM6 Runtime Keystore","AM6 Secure Proxy Descriptions","AM6 Device Group descriptions","Chapter 5: SoC Family Specific Documentation","J7200 Clock Identifiers","J7200 Devices Descriptions","J7200 DMA Device Descriptions","J7200 Firewall Descriptions","J7200 Host Descriptions","J7200 Interrupt Management Device Descriptions","J7200 PLL Defaults","J7200 Processor Descriptions","J7200 Proxy Device Descriptions","J7200 PSI-L Device Descriptions","J7200 Ring Accelerator Device Descriptions","J7200 Board Configuration Resource Assignment Type Descriptions","J7200 Secure Proxy Descriptions","J7200 Device Group descriptions","J721E Clock Identifiers","J721E Devices Descriptions","J721E DMA Device Descriptions","J721E Firewall Descriptions","J721E Host Descriptions","J721E Interrupt Management Device Descriptions","J721E PLL Defaults","J721E Processor Descriptions","J721E Proxy Device Descriptions","J721E PSI-L Device Descriptions","J721E Ring Accelerator Device Descriptions","J721E Board Configuration Resource Assignment Type Descriptions","J721E Secure Proxy Descriptions","J721E Device Group descriptions","J721E Domain Group descriptions","J721E Clock Identifiers","J721E Devices Descriptions","J721E_LEGACY DMA Device Descriptions","J721E Firewall Descriptions","J721E Host Descriptions","J721E_LEGACY Interrupt Management Device Descriptions","J721E PLL Defaults","J721E Processor Descriptions","J721E_LEGACY Proxy Device Descriptions","J721E_LEGACY PSI-L Device Descriptions","J721E_LEGACY Ring Accelerator Device Descriptions","J721E_LEGACY Board Configuration Resource Assignment Type Descriptions","J721E Secure Proxy Descriptions","J721E Device Group descriptions","J721E Domain Group descriptions","Device Group Primer","Using Derived KEK on HS devices","Domain Group Primer","Using Extended OTP on HS devices","Firewall FAQ","Signing Board Configuration on HS devices","Chapter 6: Topic User Guides","SA2UL Access Outside of SYSFW","Signing binaries for Secure Boot on HS Devices","Secure Debug User Guide","Performing Security Handover","TISCI User Guide"],titleterms:{"default":[34,49,65,81,95,110,128],"function":21,"static":23,Are:123,IDs:[27,29,30,32,33,35,37,38,42,44,45,47,48,50,51,52,53,57,59,60,63,64,66,67,68,69,73,76,77,79,80,82,83,84,85,88,90,91,93,94,96,97,98,99,102,103,105,106,108,109,111,112,113,114,117,118],Used:[5,6,7],Using:[120,122,128],a53ss0:28,a53ss0_core_0:28,a53ss0_core_1:28,a72ss0:[89,104],a72ss0_core0:[75,89,104],a72ss0_core0_0:75,a72ss0_core0_1:75,a72ss0_core1:[89,104],aasrc0:[89,104],abi:21,acceler:[11,23,38,53,69,85,99,114],access:[13,24,42,57,73,88,102,117,126],action:27,adc0:28,after:[22,23],aggreg:[33,48,64,80,94,109],all:[119,123],alloc:[41,56,72,87,101,116],am64x:[28,29,30,31,32,33,34,35,36,37,38,39,41,42,74],am65x:[61,74],am65x_sr2:[45,48,51,52,53,54],am6:[40,43,44,46,47,49,50,55,56,57,58,59,60,62,63,64,65,66,67,68,69,70,71,72,73],ani:123,api:[3,5,6,7,13,14,15,16,17,20,21,22,23,24,122,128],approach:120,arm:13,armv8:13,arrai:24,assign:[23,39,54,70,86,100,115],atl0:[75,89,104],authent:13,avail:126,background:[16,123],base:[23,31,33,46,48,62,64,78,80,92,94,107,109],baseport:27,between:123,binari:127,board0:[28,43,58,75,89,104],board:[19,21,22,23,24,25,39,54,70,86,100,115,124,128,129],boardcfg:21,boardcfg_control:21,boardcfg_dbg_cfg:21,boardcfg_dbg_dst_port:21,boardcfg_dbg_src:21,boardcfg_host_hierarchi:24,boardcfg_msmc:21,boardcfg_pm:22,boardcfg_proc:24,boardcfg_rm:23,boardcfg_rm_host_cfg:23,boardcfg_rm_host_cfg_entri:23,boardcfg_rm_resasg:23,boardcfg_rm_resasg_entri:23,boardcfg_secproxi:21,book:13,boot:[13,19,124,127],buffer:27,c66ss0:[89,104],c66ss0_core0:[89,104],c66ss0_introuter0:[89,94,104,109],c66ss0_pbist0:[89,104],c66ss1:[89,104],c66ss1_core0:[89,104],c66ss1_introuter0:[89,94,104,109],c66ss1_pbist0:[89,104],c6x:13,c71ss0:[89,104],c71ss0_mma:[89,104],c71x_0_pbist_vd:[89,104],c7x:13,cal0:[43,58],calcul:2,can:123,caveat:120,cbass0:[43,58],cbass_debug0:[43,58],cbass_fw0:[43,58],cbass_infra0:[43,58],ccdebugss0:[43,58],central:0,certif:[19,124,128],chang:16,channel:[12,30,31,45,46,60,62,77,78,91,92,106,107],chapter:[1,4,25,26,74,125],check:2,clock:[2,5,22,28,43,58,75,89,104],cmp_event_introuter0:[28,33],cmpevent_intrtr0:[43,48,58,64,75,80,89,94,104,109],command:18,commun:2,compar:120,comparison:120,compat:5,compil:21,compute_cluster0:[28,75,89,104],compute_cluster0_cfg_wrap:[75,89,104],compute_cluster0_clec:[75,89,104],compute_cluster0_core_cor:[75,89,104],compute_cluster0_ddr32ss_emif0_ew:[89,104],compute_cluster0_debug_wrap:[75,89,104],compute_cluster0_dmsc_wrap:[75,89,104],compute_cluster0_en_msmc_domain:[75,89,104],compute_cluster0_gic500ss:[75,89,104],compute_cluster0_pbist_0:28,compute_cluster0_pbist_wrap:[75,89,104],compute_cluster_a53_0:[43,58],compute_cluster_a53_1:[43,58],compute_cluster_a53_2:[43,58],compute_cluster_a53_3:[43,58],compute_cluster_cpac0:[43,58],compute_cluster_cpac1:[43,58],compute_cluster_cpac_pbist0:[43,58],compute_cluster_cpac_pbist1:[43,58],compute_cluster_msmc0:[43,58],compute_cluster_pbist0:[43,58],config:[21,22,23,24],configur:[5,6,9,10,11,12,13,16,19,21,22,23,24,25,27,39,54,70,86,100,115,122,123,124,128,129],consol:21,control:[2,5,6,13,128],core:[22,23,124],cpsw0:[28,75,89,104],cpsw_tx_rgmii0:75,cpt2_aggr0:[28,43,58,75,89,104],cpt2_aggr1:[75,89,104],cpt2_aggr2:[75,89,104],cpt2_aggr3:75,cpt2_probe_vbusm_main_cal0_0:[43,58],cpt2_probe_vbusm_main_dss_2:[43,58],cpt2_probe_vbusm_main_navddrhi_5:[43,58],cpt2_probe_vbusm_main_navddrlo_6:[43,58],cpt2_probe_vbusm_main_navsramhi_3:[43,58],cpt2_probe_vbusm_main_navsramlo_4:[43,58],cpt2_probe_vbusm_mcu_export_slv_0:[43,58],cpt2_probe_vbusm_mcu_fss_s0_2:[43,58],cpt2_probe_vbusm_mcu_fss_s1_3:[43,58],cpt2_probe_vbusm_mcu_sram_slv_1:[43,58],cpts0:28,creat:128,csi_psilss0:[89,104],csi_rx_if0:[89,104],csi_rx_if1:[89,104],csi_tx_if0:[89,104],ctrl_mmr0:[43,58],data:[3,5,6,7,10,18,21,22,23,24,26,27],dbgsuspendrouter0:28,dcc0:[28,43,58,75,89,104],dcc10:[89,104],dcc11:[89,104],dcc12:[89,104],dcc1:[28,43,58,75,89,104],dcc2:[28,43,58,75,89,104],dcc3:[28,43,58,75,89,104],dcc4:[28,43,58,75,89,104],dcc5:[28,43,58,75,89,104],dcc6:[43,58,75,89,104],dcc7:[43,58,89,104],dcc8:[89,104],dcc9:[89,104],ddpa0:28,ddr0:[75,89,104],ddr16ss0:28,ddrss0:[43,58],debug:[17,19,21,24,27,123,128],debugss0:[43,58],debugss_wrap0:[28,43,58,75,89,104],debugsuspendrtr0:[43,58],decoder0:[89,104],definit:[13,119,121],deleg:12,deriv:[14,24,120],descript:[8,9,10,11,12,13,14,15,16,17,20,29,30,31,32,33,35,36,37,38,39,41,42,44,45,46,47,48,50,51,52,53,54,56,57,59,60,62,63,64,66,67,68,69,70,72,73,76,77,78,79,80,82,83,84,85,86,87,88,90,91,92,93,94,96,97,98,99,100,101,102,103,105,106,107,108,109,111,112,113,114,115,116,117,118],design:[21,23],destin:[33,37,48,52,64,68,80,84,94,98,109,113],detail:[21,23],develop:124,devgrp:[42,57,73,88,102,117,119],devic:[0,2,6,22,23,28,29,30,33,34,36,37,38,42,43,44,45,48,49,51,52,53,57,58,59,60,64,65,67,68,69,73,75,76,77,80,81,83,84,85,88,89,90,91,94,95,97,98,99,102,104,105,106,109,110,112,113,114,117,119,120,122,124,127,128],dftss0:[43,58],directli:123,dkek:[14,120],dma:[23,30,45,60,77,91,106],dmass0:28,dmass0_bcdma_0:28,dmass0_cbass_0:28,dmass0_intaggr_0:[28,33],dmass0_ipcss_0:28,dmass0_pktdma_0:28,dmass0_psilcfg_0:28,dmass0_psilss_0:28,dmass0_ringacc_0:28,dmass0_sec_proxy_0:41,dmpac0:[89,104],dmpac0_sde_0:[89,104],dmsc0:28,dmsc:[22,123],document:[3,4,5,6,7,19,74],domain:[27,103,118,121],domgrp:121,done:128,dphy_rx0:[89,104],dphy_rx1:[89,104],dphy_tx0:[89,104],dsp:13,dss0:[43,58,89,104],dss_dsi0:[89,104],dss_edp0:[89,104],dummy_ip_lpsc_debug2dmsc_vd:[43,58],dummy_ip_lpsc_dmsc_vd:[43,58],dummy_ip_lpsc_emif_data_vd:[43,58],dummy_ip_lpsc_main2mcu_vd:[43,58],dummy_ip_lpsc_mcu2main_infra_vd:[43,58],dummy_ip_lpsc_mcu2main_vd:[43,58],dummy_ip_lpsc_mcu2wkup_vd:[43,58],dummy_ip_lpsc_wkup2main_infra_vd:[43,58],dummy_ip_lpsc_wkup2mcu_vd:[43,58],dure:[18,124],ecap0:[28,43,58,75,89,104],ecap1:[28,75,89,104],ecap2:[28,75,89,104],ecc_aggr0:[43,58],ecc_aggr1:[43,58],ecc_aggr2:[43,58],efuse0:[43,58],ehrpwm0:[43,58,75,89,104],ehrpwm1:[43,58,75,89,104],ehrpwm2:[43,58,75,89,104],ehrpwm3:[43,58,75,89,104],ehrpwm4:[43,58,75,89,104],ehrpwm5:[43,58,75,89,104],elig:2,elm0:[28,43,58,75,89,104],emif_data_0_vd:[28,75,89,104],enabl:119,encoder0:[89,104],encrypt:[19,124,127],entiti:2,entri:24,enumer:[21,24,29,32,35,41,42,44,47,50,56,57,59,63,66,72,73,76,79,82,87,88,90,93,96,101,102,103,105,108,111,116,117,118],epwm0:28,epwm1:28,epwm2:28,epwm3:28,epwm4:28,epwm5:28,epwm6:28,epwm7:28,epwm8:28,eqep0:[28,43,58,75,89,104],eqep1:[28,43,58,75,89,104],eqep2:[28,43,58,75,89,104],esm0:[28,43,58,75,89,104],event:[33,48,64,80,94,109],exampl:[5,13,128],extend:[15,24,61,122],extens:[19,128],famili:74,faq:123,ffi_main_infra_cbass_vd:75,ffi_main_ip_cbass_vd:75,ffi_main_rc_cbass_vd:75,field:[9,11,12,19,128],firewal:[16,17,31,46,62,78,92,107,123],firmwar:[19,21,24,124,128],flag:[2,13],flow:[12,30,45,60,77,91,106],foreground:123,format:[27,124],foundat:[0,2],frequenc:5,fsirx0:28,fsirx1:28,fsirx2:28,fsirx3:28,fsirx4:28,fsirx5:28,fsitx0:28,fsitx1:28,fss0:28,fss0_fsas_0:28,fss0_ospi_0:28,fss_mcu_0:43,further:0,gener:[2,3,4,13],get:[13,14,15,16,17,18,23],gic0:[43,58],gicss0:28,global:[12,15,33,48,64,80,94,109],goal:21,gpio0:[28,43,58,75,89,104],gpio1:[28,43,58,89,104],gpio2:[75,89,104],gpio3:[89,104],gpio4:[75,89,104],gpio5:[89,104],gpio6:[75,89,104],gpio7:[89,104],gpiomux_intrtr0:[43,48,58,64,75,80,89,94,104,109],gpmc0:[28,43,58,75,89,104],gpu0:[43,58,89,104],gpu0_dft_pbist_0:[89,104],gpu0_gpu_0:[89,104],gpu0_gpucore_0:[89,104],group:[22,23,42,57,73,88,102,103,117,118,119,121],gs80prg_mcu_wrap_wkup_0:[43,58],gs80prg_soc_wrap_wkup_0:[43,58],gtc0:[28,43,58,75,89,104],guid:[125,128,130],handov:[13,20,24,129],hardwar:122,header:[2,21],hierarchi:24,high:23,host:[24,32,47,63,79,93,108,123],how:123,i2c0:[28,43,58,75,89,104],i2c1:[28,43,58,75,89,104],i2c2:[28,43,58,75,89,104],i2c3:[28,43,58,75,89,104],i2c4:[75,89,104],i2c5:[75,89,104],i2c6:[75,89,104],i3c0:[75,89,104],icemelter_wkup_0:[43,58],identifi:[28,43,58,75,89,104],ids:[31,46,62,78,92,107],imag:[13,19],includ:124,increment:119,index:5,indic:[30,38,45,51,53,60,67,69,77,83,85,91,97,99,106,112,114],inform:[16,61,124],init:[22,23],initi:[16,22,23,119],input:[33,48,64,80,94,109],instrument:2,integr:[2,19],interfac:[2,18,128],interpret:26,interrupt:[23,33,48,64,80,94,109],introduct:[0,1,5,6,8,9,10,11,12,13,17,18,19,22,23,29,30,31,32,33,35,37,38,39,40,41,42,44,45,46,47,48,50,51,52,53,54,55,56,57,59,60,61,62,63,64,66,67,68,69,70,71,72,73,76,77,78,79,80,82,83,84,85,86,87,88,90,91,92,93,94,96,97,98,99,100,101,102,103,105,106,107,108,109,111,112,113,114,115,116,117,118,119,121,126,128],irq:[8,23],issu:123,j7200:[74,75,76,77,78,79,80,81,82,83,84,85,86,87,88],j721e:[74,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,107,108,110,111,116,117,118],j721e_legaci:[106,109,112,113,114,115],jtag:[18,128],k3_arm_atb_funnel_3_32_mcu_0:[43,58],k3_led_main_0:[43,58],keep:13,kei:120,kek:[14,24,120],keystor:[40,55,71],know:123,larg:5,layer:27,led0:[28,75,89,104],legaci:74,level:23,list:[24,28,31,43,46,58,62,75,78,89,92,104,107],load:19,locat:27,lock:15,m4f:13,macro:[5,6,7],magic:21,mailbox0:28,main0:75,main2mcu_lvl_intrtr0:[43,48,58,64,75,80,89,94,104,109],main2mcu_pls_intrtr0:[43,48,58,64,75,80,89,94,104,109],main2mcu_vd:28,main2wkupmcu_vd:[75,89,104],main:[42,57,73,88,102,117],main_gpiomux_introuter0:[28,33],main_sec_proxy0:[56,72],manag:[0,2,4,5,8,9,10,11,12,13,22,23,24,27,33,48,64,80,94,109,123],mcan0:[28,75,89,104],mcan10:[75,89,104],mcan11:[75,89,104],mcan12:[75,89,104],mcan13:[75,89,104],mcan14:75,mcan15:75,mcan16:75,mcan17:75,mcan1:[28,75,89,104],mcan2:[75,89,104],mcan3:[75,89,104],mcan4:[75,89,104],mcan5:[75,89,104],mcan6:[75,89,104],mcan7:[75,89,104],mcan8:[75,89,104],mcan9:[75,89,104],mcasp0:[43,58,75,89,104],mcasp10:[89,104],mcasp11:[89,104],mcasp1:[43,58,75,89,104],mcasp2:[43,58,75,89,104],mcasp3:[89,104],mcasp4:[89,104],mcasp5:[89,104],mcasp6:[89,104],mcasp7:[89,104],mcasp8:[89,104],mcasp9:[89,104],mcspi0:[28,43,58,75,89,104],mcspi1:[28,43,58,75,89,104],mcspi2:[28,43,58,75,89,104],mcspi3:[28,43,58,75,89,104],mcspi4:[28,43,58,75,89,104],mcspi5:[75,89,104],mcspi6:[75,89,104],mcspi7:[75,89,104],mcu2main_vd:28,mcu_adc0:[43,58,75],mcu_adc12_16ffc0:[89,104],mcu_adc12_16ffc1:[89,104],mcu_adc1:[43,58,75],mcu_armss0:[43,58],mcu_armss0_cpu0:[43,58],mcu_armss0_cpu1:[43,58],mcu_cbass0:[43,58],mcu_cbass_debug0:[43,58],mcu_cbass_fw0:[43,58],mcu_cpsw0:[43,58,75,89,104],mcu_cpt2_aggr0:[43,58,75,89,104],mcu_ctrl_mmr0:[43,58],mcu_dcc0:[28,43,58,75,89,104],mcu_dcc1:[43,58,75,89,104],mcu_dcc2:[43,58,75,89,104],mcu_debugss0:[43,58],mcu_ecc_aggr0:[43,58],mcu_ecc_aggr1:[43,58],mcu_efuse0:[43,58],mcu_esm0:[28,43,58,75,89,104],mcu_fss0:[75,89,104],mcu_fss0_fsas_0:[43,58,75,89,104],mcu_fss0_hyperbus0:[43,58],mcu_fss0_hyperbus1p0_0:[75,89,104],mcu_fss0_ospi_0:[43,58,75,89,104],mcu_fss0_ospi_1:[43,58,75,89,104],mcu_gpio0:28,mcu_i2c0:[28,43,58,75,89,104],mcu_i2c1:[28,75,89,104],mcu_i3c0:[75,89,104],mcu_i3c1:[75,89,104],mcu_m4fss0:28,mcu_m4fss0_core0:28,mcu_mcan0:[43,58,75,89,104],mcu_mcan1:[43,58,75,89,104],mcu_mcrc64_0:28,mcu_mcspi0:[28,43,58,75,89,104],mcu_mcspi1:[28,43,58,75,89,104],mcu_mcspi2:[43,58,75,89,104],mcu_mcu_gpiomux_introuter0:[28,33],mcu_msram0:[43,58],mcu_navss0:[43,58,75,89,104],mcu_navss0_intr_0:[75,80,89,94,104,109],mcu_navss0_intr_aggr_0:[43,48,58,64],mcu_navss0_intr_router_0:[43,48,58,64],mcu_navss0_mcrc0:[43,58],mcu_navss0_mcrc_0:[75,89,104],mcu_navss0_modss:[75,89,104],mcu_navss0_proxy0:[43,58,75,89,104],mcu_navss0_ringacc0:[43,58,75,89,104],mcu_navss0_sec_proxy0:[87,101,116],mcu_navss0_udmap0:[43,58],mcu_navss0_udmap_0:[75,89,104],mcu_navss0_udmass:[75,89,104],mcu_navss0_udmass_inta_0:[75,80,89,94,104,109],mcu_pbist0:[43,58,75,89,104],mcu_pbist1:[75,89,104],mcu_pbist2:75,mcu_pdma0:[43,58],mcu_pdma1:[43,58],mcu_pll_mmr0:[43,58],mcu_psc0:28,mcu_psram0:[43,58],mcu_r5fss0:[75,89,104],mcu_r5fss0_core0:[75,89,104],mcu_r5fss0_core1:[75,89,104],mcu_rom0:[43,58],mcu_rti0:[28,43,58,75,89,104],mcu_rti1:[43,58,75,89,104],mcu_sa2_ul0:[75,89,104],mcu_sec_mmr0:[43,58],mcu_sec_proxy0:[56,72],mcu_timer0:[28,43,58,75,89,104],mcu_timer1:[28,43,58,75,89,104],mcu_timer2:[28,43,58,75,89,104],mcu_timer3:[28,43,58,75,89,104],mcu_timer4:[75,89,104],mcu_timer5:[75,89,104],mcu_timer6:[75,89,104],mcu_timer7:[75,89,104],mcu_timer8:[75,89,104],mcu_timer9:[75,89,104],mcu_uart0:[28,43,58,75,89,104],mcu_uart1:28,mcu_wakeup:[42,57,73,88,102,117],memori:27,messag:[2,3,4,5,6,7,8,9,10,11,12,14,15,16,17,20,21,22,23,24,124],method:120,mlb0:[89,104],mmcsd0:[28,43,58,75,89,104],mmcsd1:[28,43,58,75,89,104],mmcsd2:[89,104],mmr:15,model:119,monitor:11,msmc:3,msram_256k0:28,msram_256k1:28,msram_256k2:28,msram_256k3:28,msram_256k4:28,msram_256k5:28,multiplex:5,mux:5,mx_efuse_main_chain_main_0:[43,58],mx_efuse_mcu_chain_mcu_0:[43,58],mx_wakeup_reset_sync_wkup_0:[43,58],navss0:[43,58,75,89,104],navss0_cpts0:[43,58],navss0_cpts_0:[75,89,104],navss0_dti_0:[75,89,104],navss0_intr_router_0:[43,48,58,64,75,80,89,94,104,109],navss0_mailbox0_cluster0:[43,58],navss0_mailbox0_cluster10:[43,58],navss0_mailbox0_cluster11:[43,58],navss0_mailbox0_cluster1:[43,58],navss0_mailbox0_cluster2:[43,58],navss0_mailbox0_cluster3:[43,58],navss0_mailbox0_cluster4:[43,58],navss0_mailbox0_cluster5:[43,58],navss0_mailbox0_cluster6:[43,58],navss0_mailbox0_cluster7:[43,58],navss0_mailbox0_cluster8:[43,58],navss0_mailbox0_cluster9:[43,58],navss0_mailbox_0:[75,89,104],navss0_mailbox_10:[75,89,104],navss0_mailbox_11:[75,89,104],navss0_mailbox_1:[75,89,104],navss0_mailbox_2:[75,89,104],navss0_mailbox_3:[75,89,104],navss0_mailbox_4:[75,89,104],navss0_mailbox_5:[75,89,104],navss0_mailbox_6:[75,89,104],navss0_mailbox_7:[75,89,104],navss0_mailbox_8:[75,89,104],navss0_mailbox_9:[75,89,104],navss0_mcrc0:[43,58],navss0_mcrc_0:[75,89,104],navss0_modss:[75,89,104],navss0_modss_inta0:[43,48,58,64],navss0_modss_inta1:[43,48,58,64],navss0_modss_inta_0:[75,80],navss0_modss_inta_1:[75,80],navss0_modss_intaggr_0:[89,94,104,109],navss0_modss_intaggr_1:[89,94,104,109],navss0_proxy0:[43,58],navss0_proxy_0:[75,89,104],navss0_pvu0:[43,58],navss0_pvu1:[43,58],navss0_ringacc0:[43,58],navss0_ringacc_0:[75,89,104],navss0_sec_proxy_0:[87,101,116],navss0_spinlock_0:[75,89,104],navss0_tbu_0:[75,89,104],navss0_tcu_0:[89,104],navss0_timer_mgr0:[43,58],navss0_timer_mgr1:[43,58],navss0_timermgr_0:[75,89,104],navss0_timermgr_1:[75,89,104],navss0_udmap0:[43,58],navss0_udmap_0:[75,89,104],navss0_udmass:[75,89,104],navss0_udmass_inta0:[43,48,58,64],navss0_udmass_inta_0:[75,80],navss0_udmass_intaggr_0:[89,94,104,109],navss0_virtss:[75,89,104],non:2,normal:129,note:14,number:21,object:[3,5,6,7],oldi_tx_core_main_0:[43,58],open:[17,18],oper:129,optim:124,option:27,osal:[22,23],otp:[15,24,61,122],outer:124,output:[33,48,64,80,94,109],outsid:126,over:128,overlap:123,overview:27,owner:16,ownership:123,pair:10,paramet:[8,9,10,11,12,61],part:23,path:2,payload:124,pbist0:[28,43,58,75,89,104],pbist10:[89,104],pbist1:[28,43,58,75,89,104],pbist2:[28,75,89,104],pbist3:[28,89,104],pbist4:[89,104],pbist5:[89,104],pbist6:[89,104],pbist7:[89,104],pbist9:[89,104],pcie0:[28,43,58,89,104],pcie1:[43,58,75,89,104],pcie2:[89,104],pcie3:[89,104],pdma0:[43,58],pdma1:[43,58],pdma_debug0:[43,58],per:[41,56,72,87,101,116],perform:[128,129],permiss:123,pll:[34,49,65,81,95,110],pll_mmr0:[43,58],pllctrl0:[43,58],popul:[19,128],post:129,postdiv1_16fft1:28,postdiv4_16ff0:28,postdiv4_16ff2:28,power:[2,4,5,22,27],pre:23,primer:[119,121],priv:[31,46,62,78,92,107,123],procedu:124,procedur:[11,124],process:23,processor:[13,24,35,50,66,82,96,111],program:[5,120,122,123],programm:123,protocol:18,proxi:[9,23,36,37,41,51,52,56,67,68,72,83,84,87,97,98,101,112,113,116],pru_icssg0:[28,43,58,89,104],pru_icssg1:[28,43,58,89,104],pru_icssg2:[43,58],psc0:[28,43,58,75,89,104],psi:[10,37,52,68,84,98,113],psil:23,psramecc0:[28,43,58],queri:3,r5fss0:[28,75,89,104],r5fss0_core0:[28,75,89,104],r5fss0_core1:[28,75,89,104],r5fss0_introuter0:[89,94,104,109],r5fss1:[28,89,104],r5fss1_core0:[28,89,104],r5fss1_core1:[28,89,104],r5fss1_introuter0:[89,94,104,109],rang:23,read:[0,10,15,122],receiv:[12,18,22,23],refer:19,region:[16,31,46,62,78,92,107,123],regist:[10,123],relationship:123,releas:[8,13,14],request:[2,9,11,12,13],reserv:24,reset:[7,11],resourc:[2,4,8,9,10,11,12,23,27,39,54,70,86,100,115,123,126],respons:[2,8,9,11,12],retriev:128,revis:[19,21,128],ring:[11,23,38,53,69,85,99,114],rout:8,router:[33,48,64,80,94,109],row:[15,24],rti0:[28,43,58,75,89,104],rti10:28,rti11:28,rti15:[89,104],rti16:[89,104],rti1:[28,43,58,75,89,104],rti24:[89,104],rti25:[89,104],rti28:[75,89,104],rti29:[75,89,104],rti2:[43,58],rti30:[89,104],rti31:[89,104],rti3:[43,58],rti8:28,rti9:28,runtim:[17,40,55,71,129],sa2_ul0:[28,43,58,89,104],sa2ul:[120,126],same:123,sampl:19,sci:23,secur:[0,2,4,18,19,20,24,27,41,56,72,87,101,116,124,127,128,129],send:128,sequenc:13,serdes0:[43,58],serdes1:[43,58],serdes_10g0:[28,89,104],serdes_10g1:75,serdes_16g0:[89,104],serdes_16g1:[89,104],serdes_16g2:[89,104],serdes_16g3:[89,104],set:[8,13,14,16],sign:[124,127],size:[12,40,55,71],soc:[17,28,43,58,74,75,89,104,128],soft:15,softwar:19,sourc:[33,37,48,52,64,68,80,84,94,98,109,113],specif:[13,74],specifi:123,spinlock0:28,sr1:74,sr2:74,state:128,statu:[13,15],stm0:[28,43,58,75,89,104],structur:[3,5,6,7,10,21,22,23,24],sub:27,substructur:[21,24],subsystem:[22,23],suppli:120,support:123,sysfw:126,system:[2,7,19,21,24,124,128],templat:19,texa:2,thi:[5,6,7],thread:[10,37,41,52,56,68,72,84,87,98,101,113,116],threshold:12,time:[21,124],timeout:18,timer0:[28,43,58,75,89,104],timer10:[28,43,58,75,89,104],timer11:[28,43,58,75,89,104],timer12:[75,89,104],timer13:[75,89,104],timer14:[75,89,104],timer15:[75,89,104],timer16:[75,89,104],timer17:[75,89,104],timer18:[75,89,104],timer19:[75,89,104],timer1:[28,43,58,75,89,104],timer2:[28,43,58,75,89,104],timer3:[28,43,58,75,89,104],timer4:[28,43,58,75,89,104],timer5:[28,43,58,75,89,104],timer6:[28,43,58,75,89,104],timer7:[28,43,58,75,89,104],timer8:[28,43,58,75,89,104],timer9:[28,43,58,75,89,104],timermgr0:28,timesync_event_introuter0:[28,33],timesync_intrtr0:[43,48,58,64,75,80,89,94,104,109],tisci:[2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,20,21,22,23,24,120,124,128,130],tisci_msg_board_config:3,tisci_msg_board_config_pm:3,tisci_msg_board_config_rm:3,tisci_msg_board_config_secur:3,tisci_msg_boot_notif:3,tisci_msg_change_fwl_own:16,tisci_msg_get_clock:5,tisci_msg_get_clock_par:5,tisci_msg_get_devic:6,tisci_msg_get_freq:5,tisci_msg_get_fwl_region:16,tisci_msg_get_num_clock_par:5,tisci_msg_get_otp_row_lock_statu:15,tisci_msg_get_soc_uid:17,tisci_msg_lock_otp_row:15,tisci_msg_open_debug_fwl:17,tisci_msg_proc_auth_boot:13,tisci_msg_proc_get_statu:13,tisci_msg_proc_handov:13,tisci_msg_proc_releas:13,tisci_msg_proc_request:13,tisci_msg_proc_set_config:13,tisci_msg_proc_set_control:13,tisci_msg_proc_wait_statu:13,tisci_msg_query_freq:5,tisci_msg_query_msmc:3,tisci_msg_read_otp_mmr:15,tisci_msg_rm_irq_releas:8,tisci_msg_rm_irq_set:8,tisci_msg_rm_proxy_cfg:9,tisci_msg_rm_psil_pair:10,tisci_msg_rm_psil_read:10,tisci_msg_rm_psil_unpair:10,tisci_msg_rm_psil_writ:10,tisci_msg_rm_ring_cfg:11,tisci_msg_rm_ring_mon_cfg:11,tisci_msg_rm_udmap_flow_cfg:12,tisci_msg_rm_udmap_flow_deleg:12,tisci_msg_rm_udmap_flow_size_thresh_cfg:12,tisci_msg_rm_udmap_gcfg_cfg:12,tisci_msg_rm_udmap_rx_ch_cfg:12,tisci_msg_rm_udmap_tx_ch_cfg:12,tisci_msg_sa2ul_get_dkek:14,tisci_msg_sa2ul_release_dkek:14,tisci_msg_sa2ul_set_dkek:14,tisci_msg_sec_handov:20,tisci_msg_set_clock:5,tisci_msg_set_clock_par:5,tisci_msg_set_devic:6,tisci_msg_set_device_reset:6,tisci_msg_set_freq:5,tisci_msg_set_fwl_region:16,tisci_msg_soft_lock_otp_write_glob:15,tisci_msg_sys_reset:7,tisci_msg_vers:3,tisci_msg_write_otp_row:15,topic:125,trace:[26,27],transfer:18,transmit:[12,18],transport:2,trigger:129,two:120,type:[39,54,70,86,100,115,128],uart0:[28,43,58,75,89,104],uart1:[28,43,58,75,89,104],uart2:[28,43,58,75,89,104],uart3:[28,75,89,104],uart4:[28,75,89,104],uart5:[28,75,89,104],uart6:[28,75,89,104],uart7:[75,89,104],uart8:[75,89,104],uart9:[75,89,104],uart:128,udmap:12,ufs0:[89,104],uid:[17,18,128],unencrypt:127,unlock:[24,128],unpair:10,usag:[3,5,6,7,8,9,10,11,12,13,15,21,22,23,24,119],usb0:[28,75,89,104],usb1:[89,104],usb3ss0:[43,58],usb3ss1:[43,58],user:[123,125,128,130],valid:[8,9,11,12,22,23,128],valu:[119,121],variou:128,vdc_data_vbusm_32b_ref_mcu2wkup:[43,58],vdc_data_vbusm_32b_ref_wkup2mcu:[43,58],vdc_data_vbusm_64b_ref_main2mcu:[43,58],vdc_data_vbusm_64b_ref_mcu2main:[43,58],vdc_dmsc_dbg_vbusp_32b_ref_dbg2dmsc:[43,58],vdc_infra_vbusp_32b_ref_mcu2main_infra:[43,58],vdc_infra_vbusp_32b_ref_wkup2main_infra:[43,58],vdc_mcu_dbg_vbusp_32b_ref_dbgmain2mcu:[43,58],vdc_nav_psil_128b_ref_main2mcu:[43,58],vdc_soc_fw_vbusp_32b_ref_fwmcu2main:[43,58],vdc_soc_fw_vbusp_32b_ref_fwwkup2mcu:[43,58],via:[120,128],virtual:[33,48,64,80,94,109],vpac0:[89,104],vpfe0:[89,104],vtm0:28,wait:13,what:123,which:123,wise:[28,43,58,75,89,104],without:5,wkup_cbass0:[43,58],wkup_cbass_fw0:[43,58],wkup_ctrl_mmr0:[43,58],wkup_ddpa0:[75,89,104],wkup_dmsc0:[43,58,75,89,104],wkup_dmsc0_cortex_m3_0:[43,58],wkup_ecc_aggr0:[43,58],wkup_esm0:[43,58,75,89,104],wkup_gpio0:[43,58,75,89,104],wkup_gpio1:[75,89,104],wkup_gpiomux_intrtr0:[43,48,58,64,75,80,89,94,104,109],wkup_i2c0:[43,58,75,89,104],wkup_pllctrl0:[43,58],wkup_porz_sync0:[75,89,104],wkup_psc0:[43,58,75,89,104],wkup_uart0:[43,58,75,89,104],wkup_vtm0:[43,58,75,89,104],wkup_wakeup0:75,wkupmcu2main_vd:[75,89,104],write:[10,15,122,123],x509:19}})