[processor-sdk/pdk.git] / packages / ti / drv / sciclient / soc / sysfw / include / j7200 / tisci_sec_proxy.h
1 /*
2 * Copyright (C) 2017-2020 Texas Instruments Incorporated
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
33 /**
34 * \ingroup TISCI
35 * \defgroup tisci_sec_proxy tisci_sec_proxy
36 *
37 * DMSC controls the power management, security and resource management
38 * of the device.
39 *
40 *
41 * @{
42 */
43 /**
44 *
45 * \brief This file contains:
46 *
47 * WARNING!!: Autogenerated file from SYSFW. DO NOT MODIFY!!
48 * System Firmware Source File
49 *
50 * Secure Proxy indices for J7200 device
51 *
52 * Data version: 200730_091422
53 *
54 */
55 #ifndef J7200_TISCI_SEC_PROXY_H
56 #define J7200_TISCI_SEC_PROXY_H
58 /*
59 * Secure Proxy configurations for MCU_0_R5_0 host
60 */
62 /** Thread ID macro for MCU_0_R5_0 notify */
63 #define TISCI_SEC_PROXY_MCU_0_R5_0_READ_NOTIFY_THREAD_ID (0U)
64 /** Num messages macro for MCU_0_R5_0 notify */
65 #define TISCI_SEC_PROXY_MCU_0_R5_0_READ_NOTIFY_NUM_MESSAGES (2U)
67 /** Thread ID macro for MCU_0_R5_0 response */
68 #define TISCI_SEC_PROXY_MCU_0_R5_0_READ_RESPONSE_THREAD_ID (1U)
69 /** Num messages macro for MCU_0_R5_0 response */
70 #define TISCI_SEC_PROXY_MCU_0_R5_0_READ_RESPONSE_NUM_MESSAGES (20U)
72 /** Thread ID macro for MCU_0_R5_0 high_priority */
73 #define TISCI_SEC_PROXY_MCU_0_R5_0_WRITE_HIGH_PRIORITY_THREAD_ID (2U)
74 /** Num messages macro for MCU_0_R5_0 high_priority */
75 #define TISCI_SEC_PROXY_MCU_0_R5_0_WRITE_HIGH_PRIORITY_NUM_MESSAGES (10U)
77 /** Thread ID macro for MCU_0_R5_0 low_priority */
78 #define TISCI_SEC_PROXY_MCU_0_R5_0_WRITE_LOW_PRIORITY_THREAD_ID (3U)
79 /** Num messages macro for MCU_0_R5_0 low_priority */
80 #define TISCI_SEC_PROXY_MCU_0_R5_0_WRITE_LOW_PRIORITY_NUM_MESSAGES (10U)
82 /** Thread ID macro for MCU_0_R5_0 notify_resp */
83 #define TISCI_SEC_PROXY_MCU_0_R5_0_WRITE_NOTIFY_RESP_THREAD_ID (4U)
84 /** Num messages macro for MCU_0_R5_0 notify_resp */
85 #define TISCI_SEC_PROXY_MCU_0_R5_0_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
87 /*
88 * Secure Proxy configurations for MCU_0_R5_1 host
89 */
91 /** Thread ID macro for MCU_0_R5_1 notify */
92 #define TISCI_SEC_PROXY_MCU_0_R5_1_READ_NOTIFY_THREAD_ID (5U)
93 /** Num messages macro for MCU_0_R5_1 notify */
94 #define TISCI_SEC_PROXY_MCU_0_R5_1_READ_NOTIFY_NUM_MESSAGES (2U)
96 /** Thread ID macro for MCU_0_R5_1 response */
97 #define TISCI_SEC_PROXY_MCU_0_R5_1_READ_RESPONSE_THREAD_ID (6U)
98 /** Num messages macro for MCU_0_R5_1 response */
99 #define TISCI_SEC_PROXY_MCU_0_R5_1_READ_RESPONSE_NUM_MESSAGES (20U)
101 /** Thread ID macro for MCU_0_R5_1 high_priority */
102 #define TISCI_SEC_PROXY_MCU_0_R5_1_WRITE_HIGH_PRIORITY_THREAD_ID (7U)
103 /** Num messages macro for MCU_0_R5_1 high_priority */
104 #define TISCI_SEC_PROXY_MCU_0_R5_1_WRITE_HIGH_PRIORITY_NUM_MESSAGES (10U)
106 /** Thread ID macro for MCU_0_R5_1 low_priority */
107 #define TISCI_SEC_PROXY_MCU_0_R5_1_WRITE_LOW_PRIORITY_THREAD_ID (8U)
108 /** Num messages macro for MCU_0_R5_1 low_priority */
109 #define TISCI_SEC_PROXY_MCU_0_R5_1_WRITE_LOW_PRIORITY_NUM_MESSAGES (10U)
111 /** Thread ID macro for MCU_0_R5_1 notify_resp */
112 #define TISCI_SEC_PROXY_MCU_0_R5_1_WRITE_NOTIFY_RESP_THREAD_ID (9U)
113 /** Num messages macro for MCU_0_R5_1 notify_resp */
114 #define TISCI_SEC_PROXY_MCU_0_R5_1_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
116 /*
117 * Secure Proxy configurations for MCU_0_R5_2 host
118 */
120 /** Thread ID macro for MCU_0_R5_2 notify */
121 #define TISCI_SEC_PROXY_MCU_0_R5_2_READ_NOTIFY_THREAD_ID (10U)
122 /** Num messages macro for MCU_0_R5_2 notify */
123 #define TISCI_SEC_PROXY_MCU_0_R5_2_READ_NOTIFY_NUM_MESSAGES (1U)
125 /** Thread ID macro for MCU_0_R5_2 response */
126 #define TISCI_SEC_PROXY_MCU_0_R5_2_READ_RESPONSE_THREAD_ID (11U)
127 /** Num messages macro for MCU_0_R5_2 response */
128 #define TISCI_SEC_PROXY_MCU_0_R5_2_READ_RESPONSE_NUM_MESSAGES (2U)
130 /** Thread ID macro for MCU_0_R5_2 high_priority */
131 #define TISCI_SEC_PROXY_MCU_0_R5_2_WRITE_HIGH_PRIORITY_THREAD_ID (12U)
132 /** Num messages macro for MCU_0_R5_2 high_priority */
133 #define TISCI_SEC_PROXY_MCU_0_R5_2_WRITE_HIGH_PRIORITY_NUM_MESSAGES (1U)
135 /** Thread ID macro for MCU_0_R5_2 low_priority */
136 #define TISCI_SEC_PROXY_MCU_0_R5_2_WRITE_LOW_PRIORITY_THREAD_ID (13U)
137 /** Num messages macro for MCU_0_R5_2 low_priority */
138 #define TISCI_SEC_PROXY_MCU_0_R5_2_WRITE_LOW_PRIORITY_NUM_MESSAGES (1U)
140 /** Thread ID macro for MCU_0_R5_2 notify_resp */
141 #define TISCI_SEC_PROXY_MCU_0_R5_2_WRITE_NOTIFY_RESP_THREAD_ID (14U)
142 /** Num messages macro for MCU_0_R5_2 notify_resp */
143 #define TISCI_SEC_PROXY_MCU_0_R5_2_WRITE_NOTIFY_RESP_NUM_MESSAGES (1U)
145 /*
146 * Secure Proxy configurations for MCU_0_R5_3 host
147 */
149 /** Thread ID macro for MCU_0_R5_3 notify */
150 #define TISCI_SEC_PROXY_MCU_0_R5_3_READ_NOTIFY_THREAD_ID (15U)
151 /** Num messages macro for MCU_0_R5_3 notify */
152 #define TISCI_SEC_PROXY_MCU_0_R5_3_READ_NOTIFY_NUM_MESSAGES (1U)
154 /** Thread ID macro for MCU_0_R5_3 response */
155 #define TISCI_SEC_PROXY_MCU_0_R5_3_READ_RESPONSE_THREAD_ID (16U)
156 /** Num messages macro for MCU_0_R5_3 response */
157 #define TISCI_SEC_PROXY_MCU_0_R5_3_READ_RESPONSE_NUM_MESSAGES (2U)
159 /** Thread ID macro for MCU_0_R5_3 high_priority */
160 #define TISCI_SEC_PROXY_MCU_0_R5_3_WRITE_HIGH_PRIORITY_THREAD_ID (17U)
161 /** Num messages macro for MCU_0_R5_3 high_priority */
162 #define TISCI_SEC_PROXY_MCU_0_R5_3_WRITE_HIGH_PRIORITY_NUM_MESSAGES (1U)
164 /** Thread ID macro for MCU_0_R5_3 low_priority */
165 #define TISCI_SEC_PROXY_MCU_0_R5_3_WRITE_LOW_PRIORITY_THREAD_ID (18U)
166 /** Num messages macro for MCU_0_R5_3 low_priority */
167 #define TISCI_SEC_PROXY_MCU_0_R5_3_WRITE_LOW_PRIORITY_NUM_MESSAGES (1U)
169 /** Thread ID macro for MCU_0_R5_3 notify_resp */
170 #define TISCI_SEC_PROXY_MCU_0_R5_3_WRITE_NOTIFY_RESP_THREAD_ID (19U)
171 /** Num messages macro for MCU_0_R5_3 notify_resp */
172 #define TISCI_SEC_PROXY_MCU_0_R5_3_WRITE_NOTIFY_RESP_NUM_MESSAGES (1U)
174 /*
175 * Secure Proxy configurations for A72_0 host
176 */
178 /** Thread ID macro for A72_0 notify */
179 #define TISCI_SEC_PROXY_A72_0_READ_NOTIFY_THREAD_ID (0U)
180 /** Num messages macro for A72_0 notify */
181 #define TISCI_SEC_PROXY_A72_0_READ_NOTIFY_NUM_MESSAGES (2U)
183 /** Thread ID macro for A72_0 response */
184 #define TISCI_SEC_PROXY_A72_0_READ_RESPONSE_THREAD_ID (1U)
185 /** Num messages macro for A72_0 response */
186 #define TISCI_SEC_PROXY_A72_0_READ_RESPONSE_NUM_MESSAGES (30U)
188 /** Thread ID macro for A72_0 high_priority */
189 #define TISCI_SEC_PROXY_A72_0_WRITE_HIGH_PRIORITY_THREAD_ID (2U)
190 /** Num messages macro for A72_0 high_priority */
191 #define TISCI_SEC_PROXY_A72_0_WRITE_HIGH_PRIORITY_NUM_MESSAGES (10U)
193 /** Thread ID macro for A72_0 low_priority */
194 #define TISCI_SEC_PROXY_A72_0_WRITE_LOW_PRIORITY_THREAD_ID (3U)
195 /** Num messages macro for A72_0 low_priority */
196 #define TISCI_SEC_PROXY_A72_0_WRITE_LOW_PRIORITY_NUM_MESSAGES (20U)
198 /** Thread ID macro for A72_0 notify_resp */
199 #define TISCI_SEC_PROXY_A72_0_WRITE_NOTIFY_RESP_THREAD_ID (4U)
200 /** Num messages macro for A72_0 notify_resp */
201 #define TISCI_SEC_PROXY_A72_0_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
203 /*
204 * Secure Proxy configurations for A72_1 host
205 */
207 /** Thread ID macro for A72_1 notify */
208 #define TISCI_SEC_PROXY_A72_1_READ_NOTIFY_THREAD_ID (5U)
209 /** Num messages macro for A72_1 notify */
210 #define TISCI_SEC_PROXY_A72_1_READ_NOTIFY_NUM_MESSAGES (2U)
212 /** Thread ID macro for A72_1 response */
213 #define TISCI_SEC_PROXY_A72_1_READ_RESPONSE_THREAD_ID (6U)
214 /** Num messages macro for A72_1 response */
215 #define TISCI_SEC_PROXY_A72_1_READ_RESPONSE_NUM_MESSAGES (30U)
217 /** Thread ID macro for A72_1 high_priority */
218 #define TISCI_SEC_PROXY_A72_1_WRITE_HIGH_PRIORITY_THREAD_ID (7U)
219 /** Num messages macro for A72_1 high_priority */
220 #define TISCI_SEC_PROXY_A72_1_WRITE_HIGH_PRIORITY_NUM_MESSAGES (10U)
222 /** Thread ID macro for A72_1 low_priority */
223 #define TISCI_SEC_PROXY_A72_1_WRITE_LOW_PRIORITY_THREAD_ID (8U)
224 /** Num messages macro for A72_1 low_priority */
225 #define TISCI_SEC_PROXY_A72_1_WRITE_LOW_PRIORITY_NUM_MESSAGES (20U)
227 /** Thread ID macro for A72_1 notify_resp */
228 #define TISCI_SEC_PROXY_A72_1_WRITE_NOTIFY_RESP_THREAD_ID (9U)
229 /** Num messages macro for A72_1 notify_resp */
230 #define TISCI_SEC_PROXY_A72_1_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
232 /*
233 * Secure Proxy configurations for A72_2 host
234 */
236 /** Thread ID macro for A72_2 notify */
237 #define TISCI_SEC_PROXY_A72_2_READ_NOTIFY_THREAD_ID (10U)
238 /** Num messages macro for A72_2 notify */
239 #define TISCI_SEC_PROXY_A72_2_READ_NOTIFY_NUM_MESSAGES (2U)
241 /** Thread ID macro for A72_2 response */
242 #define TISCI_SEC_PROXY_A72_2_READ_RESPONSE_THREAD_ID (11U)
243 /** Num messages macro for A72_2 response */
244 #define TISCI_SEC_PROXY_A72_2_READ_RESPONSE_NUM_MESSAGES (22U)
246 /** Thread ID macro for A72_2 high_priority */
247 #define TISCI_SEC_PROXY_A72_2_WRITE_HIGH_PRIORITY_THREAD_ID (12U)
248 /** Num messages macro for A72_2 high_priority */
249 #define TISCI_SEC_PROXY_A72_2_WRITE_HIGH_PRIORITY_NUM_MESSAGES (2U)
251 /** Thread ID macro for A72_2 low_priority */
252 #define TISCI_SEC_PROXY_A72_2_WRITE_LOW_PRIORITY_THREAD_ID (13U)
253 /** Num messages macro for A72_2 low_priority */
254 #define TISCI_SEC_PROXY_A72_2_WRITE_LOW_PRIORITY_NUM_MESSAGES (20U)
256 /** Thread ID macro for A72_2 notify_resp */
257 #define TISCI_SEC_PROXY_A72_2_WRITE_NOTIFY_RESP_THREAD_ID (14U)
258 /** Num messages macro for A72_2 notify_resp */
259 #define TISCI_SEC_PROXY_A72_2_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
261 /*
262 * Secure Proxy configurations for A72_3 host
263 */
265 /** Thread ID macro for A72_3 notify */
266 #define TISCI_SEC_PROXY_A72_3_READ_NOTIFY_THREAD_ID (15U)
267 /** Num messages macro for A72_3 notify */
268 #define TISCI_SEC_PROXY_A72_3_READ_NOTIFY_NUM_MESSAGES (2U)
270 /** Thread ID macro for A72_3 response */
271 #define TISCI_SEC_PROXY_A72_3_READ_RESPONSE_THREAD_ID (16U)
272 /** Num messages macro for A72_3 response */
273 #define TISCI_SEC_PROXY_A72_3_READ_RESPONSE_NUM_MESSAGES (7U)
275 /** Thread ID macro for A72_3 high_priority */
276 #define TISCI_SEC_PROXY_A72_3_WRITE_HIGH_PRIORITY_THREAD_ID (17U)
277 /** Num messages macro for A72_3 high_priority */
278 #define TISCI_SEC_PROXY_A72_3_WRITE_HIGH_PRIORITY_NUM_MESSAGES (2U)
280 /** Thread ID macro for A72_3 low_priority */
281 #define TISCI_SEC_PROXY_A72_3_WRITE_LOW_PRIORITY_THREAD_ID (18U)
282 /** Num messages macro for A72_3 low_priority */
283 #define TISCI_SEC_PROXY_A72_3_WRITE_LOW_PRIORITY_NUM_MESSAGES (5U)
285 /** Thread ID macro for A72_3 notify_resp */
286 #define TISCI_SEC_PROXY_A72_3_WRITE_NOTIFY_RESP_THREAD_ID (19U)
287 /** Num messages macro for A72_3 notify_resp */
288 #define TISCI_SEC_PROXY_A72_3_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
290 /*
291 * Secure Proxy configurations for A72_4 host
292 */
294 /** Thread ID macro for A72_4 notify */
295 #define TISCI_SEC_PROXY_A72_4_READ_NOTIFY_THREAD_ID (20U)
296 /** Num messages macro for A72_4 notify */
297 #define TISCI_SEC_PROXY_A72_4_READ_NOTIFY_NUM_MESSAGES (2U)
299 /** Thread ID macro for A72_4 response */
300 #define TISCI_SEC_PROXY_A72_4_READ_RESPONSE_THREAD_ID (21U)
301 /** Num messages macro for A72_4 response */
302 #define TISCI_SEC_PROXY_A72_4_READ_RESPONSE_NUM_MESSAGES (7U)
304 /** Thread ID macro for A72_4 high_priority */
305 #define TISCI_SEC_PROXY_A72_4_WRITE_HIGH_PRIORITY_THREAD_ID (22U)
306 /** Num messages macro for A72_4 high_priority */
307 #define TISCI_SEC_PROXY_A72_4_WRITE_HIGH_PRIORITY_NUM_MESSAGES (2U)
309 /** Thread ID macro for A72_4 low_priority */
310 #define TISCI_SEC_PROXY_A72_4_WRITE_LOW_PRIORITY_THREAD_ID (23U)
311 /** Num messages macro for A72_4 low_priority */
312 #define TISCI_SEC_PROXY_A72_4_WRITE_LOW_PRIORITY_NUM_MESSAGES (5U)
314 /** Thread ID macro for A72_4 notify_resp */
315 #define TISCI_SEC_PROXY_A72_4_WRITE_NOTIFY_RESP_THREAD_ID (24U)
316 /** Num messages macro for A72_4 notify_resp */
317 #define TISCI_SEC_PROXY_A72_4_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
319 /*
320 * Secure Proxy configurations for MAIN_0_R5_0 host
321 */
323 /** Thread ID macro for MAIN_0_R5_0 notify */
324 #define TISCI_SEC_PROXY_MAIN_0_R5_0_READ_NOTIFY_THREAD_ID (25U)
325 /** Num messages macro for MAIN_0_R5_0 notify */
326 #define TISCI_SEC_PROXY_MAIN_0_R5_0_READ_NOTIFY_NUM_MESSAGES (2U)
328 /** Thread ID macro for MAIN_0_R5_0 response */
329 #define TISCI_SEC_PROXY_MAIN_0_R5_0_READ_RESPONSE_THREAD_ID (26U)
330 /** Num messages macro for MAIN_0_R5_0 response */
331 #define TISCI_SEC_PROXY_MAIN_0_R5_0_READ_RESPONSE_NUM_MESSAGES (7U)
333 /** Thread ID macro for MAIN_0_R5_0 high_priority */
334 #define TISCI_SEC_PROXY_MAIN_0_R5_0_WRITE_HIGH_PRIORITY_THREAD_ID (27U)
335 /** Num messages macro for MAIN_0_R5_0 high_priority */
336 #define TISCI_SEC_PROXY_MAIN_0_R5_0_WRITE_HIGH_PRIORITY_NUM_MESSAGES (2U)
338 /** Thread ID macro for MAIN_0_R5_0 low_priority */
339 #define TISCI_SEC_PROXY_MAIN_0_R5_0_WRITE_LOW_PRIORITY_THREAD_ID (28U)
340 /** Num messages macro for MAIN_0_R5_0 low_priority */
341 #define TISCI_SEC_PROXY_MAIN_0_R5_0_WRITE_LOW_PRIORITY_NUM_MESSAGES (5U)
343 /** Thread ID macro for MAIN_0_R5_0 notify_resp */
344 #define TISCI_SEC_PROXY_MAIN_0_R5_0_WRITE_NOTIFY_RESP_THREAD_ID (29U)
345 /** Num messages macro for MAIN_0_R5_0 notify_resp */
346 #define TISCI_SEC_PROXY_MAIN_0_R5_0_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
348 /*
349 * Secure Proxy configurations for MAIN_0_R5_1 host
350 */
352 /** Thread ID macro for MAIN_0_R5_1 notify */
353 #define TISCI_SEC_PROXY_MAIN_0_R5_1_READ_NOTIFY_THREAD_ID (30U)
354 /** Num messages macro for MAIN_0_R5_1 notify */
355 #define TISCI_SEC_PROXY_MAIN_0_R5_1_READ_NOTIFY_NUM_MESSAGES (2U)
357 /** Thread ID macro for MAIN_0_R5_1 response */
358 #define TISCI_SEC_PROXY_MAIN_0_R5_1_READ_RESPONSE_THREAD_ID (31U)
359 /** Num messages macro for MAIN_0_R5_1 response */
360 #define TISCI_SEC_PROXY_MAIN_0_R5_1_READ_RESPONSE_NUM_MESSAGES (7U)
362 /** Thread ID macro for MAIN_0_R5_1 high_priority */
363 #define TISCI_SEC_PROXY_MAIN_0_R5_1_WRITE_HIGH_PRIORITY_THREAD_ID (32U)
364 /** Num messages macro for MAIN_0_R5_1 high_priority */
365 #define TISCI_SEC_PROXY_MAIN_0_R5_1_WRITE_HIGH_PRIORITY_NUM_MESSAGES (2U)
367 /** Thread ID macro for MAIN_0_R5_1 low_priority */
368 #define TISCI_SEC_PROXY_MAIN_0_R5_1_WRITE_LOW_PRIORITY_THREAD_ID (33U)
369 /** Num messages macro for MAIN_0_R5_1 low_priority */
370 #define TISCI_SEC_PROXY_MAIN_0_R5_1_WRITE_LOW_PRIORITY_NUM_MESSAGES (5U)
372 /** Thread ID macro for MAIN_0_R5_1 notify_resp */
373 #define TISCI_SEC_PROXY_MAIN_0_R5_1_WRITE_NOTIFY_RESP_THREAD_ID (34U)
374 /** Num messages macro for MAIN_0_R5_1 notify_resp */
375 #define TISCI_SEC_PROXY_MAIN_0_R5_1_WRITE_NOTIFY_RESP_NUM_MESSAGES (2U)
377 /*
378 * Secure Proxy configurations for MAIN_0_R5_2 host
379 */
381 /** Thread ID macro for MAIN_0_R5_2 notify */
382 #define TISCI_SEC_PROXY_MAIN_0_R5_2_READ_NOTIFY_THREAD_ID (35U)
383 /** Num messages macro for MAIN_0_R5_2 notify */
384 #define TISCI_SEC_PROXY_MAIN_0_R5_2_READ_NOTIFY_NUM_MESSAGES (1U)
386 /** Thread ID macro for MAIN_0_R5_2 response */
387 #define TISCI_SEC_PROXY_MAIN_0_R5_2_READ_RESPONSE_THREAD_ID (36U)
388 /** Num messages macro for MAIN_0_R5_2 response */
389 #define TISCI_SEC_PROXY_MAIN_0_R5_2_READ_RESPONSE_NUM_MESSAGES (2U)
391 /** Thread ID macro for MAIN_0_R5_2 high_priority */
392 #define TISCI_SEC_PROXY_MAIN_0_R5_2_WRITE_HIGH_PRIORITY_THREAD_ID (37U)
393 /** Num messages macro for MAIN_0_R5_2 high_priority */
394 #define TISCI_SEC_PROXY_MAIN_0_R5_2_WRITE_HIGH_PRIORITY_NUM_MESSAGES (1U)
396 /** Thread ID macro for MAIN_0_R5_2 low_priority */
397 #define TISCI_SEC_PROXY_MAIN_0_R5_2_WRITE_LOW_PRIORITY_THREAD_ID (38U)
398 /** Num messages macro for MAIN_0_R5_2 low_priority */
399 #define TISCI_SEC_PROXY_MAIN_0_R5_2_WRITE_LOW_PRIORITY_NUM_MESSAGES (1U)
401 /** Thread ID macro for MAIN_0_R5_2 notify_resp */
402 #define TISCI_SEC_PROXY_MAIN_0_R5_2_WRITE_NOTIFY_RESP_THREAD_ID (39U)
403 /** Num messages macro for MAIN_0_R5_2 notify_resp */
404 #define TISCI_SEC_PROXY_MAIN_0_R5_2_WRITE_NOTIFY_RESP_NUM_MESSAGES (1U)
406 /*
407 * Secure Proxy configurations for MAIN_0_R5_3 host
408 */
410 /** Thread ID macro for MAIN_0_R5_3 notify */
411 #define TISCI_SEC_PROXY_MAIN_0_R5_3_READ_NOTIFY_THREAD_ID (40U)
412 /** Num messages macro for MAIN_0_R5_3 notify */
413 #define TISCI_SEC_PROXY_MAIN_0_R5_3_READ_NOTIFY_NUM_MESSAGES (1U)
415 /** Thread ID macro for MAIN_0_R5_3 response */
416 #define TISCI_SEC_PROXY_MAIN_0_R5_3_READ_RESPONSE_THREAD_ID (41U)
417 /** Num messages macro for MAIN_0_R5_3 response */
418 #define TISCI_SEC_PROXY_MAIN_0_R5_3_READ_RESPONSE_NUM_MESSAGES (2U)
420 /** Thread ID macro for MAIN_0_R5_3 high_priority */
421 #define TISCI_SEC_PROXY_MAIN_0_R5_3_WRITE_HIGH_PRIORITY_THREAD_ID (42U)
422 /** Num messages macro for MAIN_0_R5_3 high_priority */
423 #define TISCI_SEC_PROXY_MAIN_0_R5_3_WRITE_HIGH_PRIORITY_NUM_MESSAGES (1U)
425 /** Thread ID macro for MAIN_0_R5_3 low_priority */
426 #define TISCI_SEC_PROXY_MAIN_0_R5_3_WRITE_LOW_PRIORITY_THREAD_ID (43U)
427 /** Num messages macro for MAIN_0_R5_3 low_priority */
428 #define TISCI_SEC_PROXY_MAIN_0_R5_3_WRITE_LOW_PRIORITY_NUM_MESSAGES (1U)
430 /** Thread ID macro for MAIN_0_R5_3 notify_resp */
431 #define TISCI_SEC_PROXY_MAIN_0_R5_3_WRITE_NOTIFY_RESP_THREAD_ID (44U)
432 /** Num messages macro for MAIN_0_R5_3 notify_resp */
433 #define TISCI_SEC_PROXY_MAIN_0_R5_3_WRITE_NOTIFY_RESP_NUM_MESSAGES (1U)
436 #endif /* J7200_TISCI_SEC_PROXY_H */
438 /* @} */