1 /*
2 * Copyright (C) 2020 Texas Instruments Incorporated
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
34 /**
35 * \file sciclient_rm_priv.h
36 *
37 * \brief This file contains macros and structures used internally by sciclient_rm.
38 */
39 #ifndef SCICLIENT_PRIV_RM_H_
40 #define SCICLIENT_PRIV_RM_H_
42 /* ========================================================================== */
43 /* Include Files */
44 /* ========================================================================== */
46 #include <stdint.h>
47 #include <ti/csl/hw_types.h>
49 #include <ti/drv/sciclient/sciclient.h>
50 #include <ti/drv/sciclient/src/sciclient/sciclient_priv.h>
51 #include <ti/drv/sciclient/soc/sciclient_soc_priv.h>
53 #ifdef __cplusplus
54 extern "C" {
55 #endif
57 /* ========================================================================== */
58 /* Macros & Typedefs */
59 /* ========================================================================== */
61 /* NULL device */
62 #define SCICLIENT_RM_DEV_NONE 255
64 #define SCICLIENT_RM_IA_GENERIC_EVT_RESETVAL 0xFFFF
66 #define SCICLIENT_RM_IR_MAPPING_FREE 0xFFFF
68 /* ========================================================================== */
69 /* Structure Declarations */
70 /* ========================================================================== */
72 /**
73 * \brief
74 * Describes the IA events used by ROM and if they've been cleared back to
75 * hardware reset values
76 *
77 * \param event
78 * IA event used by ROM
79 *
80 * \param cleared
81 * Boolean storing whether or not the event and the IA VINT status bit its
82 * been mapped to has been cleared
83 */
84 struct Sciclient_rmIaUsedMapping {
85 uint16_t event;
86 bool cleared;
87 };
89 /**
90 * \brief Interrupt aggregator instance containing data required to manage interrupt
91 * route discovery using an IA.
92 *
93 * \param dev_id
94 * Device ID of NavSS IA
95 *
96 * \param imap
97 * IA subsystem's event interrupt mapping MMR region
98 *
99 * \param sevt_offset
100 * SEVI global event offset for IA
101 *
102 * \param n_sevt
103 * Number of IA SEVIs
104 *
105 * \param n_vint
106 * Number of IA virtual interrupts
107 *
108 * \param vint_usage_count
109 * Number of VINT status bits used for event mapping. The usage count for
110 * each VINT cannot exceed the number of maximum supported event mappings.
111 *
112 * \param v0_b0_evt
113 * A standalone element is needed to track usage of VINT 0 bit 0. The INTMAP
114 * registers are read to determine VINT bit usage. The default state for
115 * INTMAP registers is 0x0000 which translates to the INTMAP using VINT 0 bit
116 * 0. This field allows the IA driver to determine if VINT 0 bit 0 is truly
117 * mapped to an IA event.
118 *
119 * \param rom_usage
120 * IA event to VINT mappings used by ROM during boot that need to be reset
121 * to hardware reset values
122 *
123 * \param n_rom_usage
124 * Number of entries in the rom_usage array
125 */
126 struct Sciclient_rmIaInst {
127 const uint16_t dev_id;
128 const uint32_t imap;
129 const uint16_t sevt_offset;
130 const uint16_t n_sevt;
131 const uint16_t n_vint;
132 uint8_t *vint_usage_count;
133 uint16_t v0_b0_evt;
134 struct Sciclient_rmIaUsedMapping *const rom_usage;
135 const uint8_t n_rom_usage;
136 };
138 /**
139 * \brief
140 * Describes a range of IR input to output mappings used by ROM and if they've
141 * been cleared back to hardware reset values
142 *
143 * \param inp_start
144 * Start of IR input range
145 *
146 * \param outp_start
147 * Start of IR output range
148 *
149 * \param length
150 * Length of the mapping range
151 *
152 * \param cleared
153 * Boolean storing whether or not the mapped range has been cleared
154 */
155 struct Sciclient_rmIrUsedMapping {
156 uint16_t inp_start;
157 uint16_t outp_start;
158 uint16_t length;
159 bool cleared;
160 };
162 /**
163 * \brief Interrupt router instance containing data required to manage interrupt
164 * route discovery using an IR.
165 *
166 * \param dev_id
167 * Device ID of IR
168 *
169 * \param cfg
170 * IR subsystem's config MMR region
171 *
172 * \param n_inp
173 * Number of IR inputs
174 *
175 * \param n_outp
176 * Number of IR outputs
177 *
178 * \param inp0_mapping
179 * A standalone element is needed to track usage of IR input 0. The CONTROL
180 * registers are read to determine IR input and output usage. The default
181 * state for the output CONTROL registers is 0x0000 which translates to use of
182 * IR input zero. This field allows the IR driver to determine which IR
183 * output input zero has been mapped to.
184 *
185 * \param rom_usage
186 * IR inputs and outputs used by ROM during boot that need to be reset to defaults
187 *
188 * \param n_rom_usage
189 * Number of entries in the rom_usage array
190 */
191 struct Sciclient_rmIrInst {
192 const uint16_t dev_id;
193 const uint32_t cfg;
194 const uint16_t n_inp;
195 const uint16_t n_outp;
196 uint16_t inp0_mapping;
197 struct Sciclient_rmIrUsedMapping *const rom_usage;
198 const uint8_t n_rom_usage;
199 };
201 /**
202 * \brief IRQ connection interface
203 *
204 * Defines a single or contiguous block of outgoing interrupt connections
205 * destined for a SoC subsystem within the interrupt interconnection tree.
206 *
207 * \param lbase
208 * Local subsystem's outgoing interrupt interface base
209 *
210 * \param rbase
211 * Remote subsystem's incoming interrupt interface base
212 *
213 * \param len
214 * Number of contiguous interrupt interface connections between the two subsystems
215 *
216 * \param rid
217 * Remote subsystem ID
218 */
219 struct Sciclient_rmIrqIf {
220 uint16_t lbase;
221 uint16_t rbase;
222 uint16_t len;
223 uint16_t rid;
224 };
226 /**
227 * \struct irq_node
228 *
229 * \brief IRQ interconnection tree node
230 *
231 * Defines a node in the SoC IRQ interconnection tree. The node documents the
232 * subsystem ID and all outgoing interrupt interfaces from the subsystem.
233 *
234 * \param id
235 * subsystem ID
236 *
237 * \param n_if
238 * Number of outgoing interrupt interfaces from the subsystem
239 *
240 * \param p_if
241 * Pointer to array of outgoing interrupt interface data structures
242 */
243 struct Sciclient_rmIrqNode {
244 uint16_t id;
245 uint16_t n_if;
246 const struct Sciclient_rmIrqIf *const *p_if;
247 };
250 /* ========================================================================== */
251 /* Function Declarations */
252 /* ========================================================================== */
254 /**
255 * \brief Finds and programs an available interrupt route via System Firmware
256 * based on the input parameters.
257 *
258 * \param req Pointer to interrupt route set payload
259 *
260 * \param resp Pointer to interrupt route set response payload
261 *
262 * \param timeout Gives a sense of how long to wait for the operation.
263 * Refer \ref Sciclient_ServiceOperationTimeout.
264 *
265 * \return r CSL_EFAIL: If the route is not programmed.
266 * CSL_PASS: If the route is programmed.
267 */
268 int32_t Sciclient_rmProgramInterruptRoute (const struct tisci_msg_rm_irq_set_req *req,
269 const struct tisci_msg_rm_irq_set_resp *resp,
270 uint32_t timeout);
272 /**
273 * \brief Mapping resources from AM65xx PG2.0 to AM65xx PG1.0.
274 * NOTE: Not all the PG2.0 resources are mapped to PG1.0. Due to this
275 * the API is programmed to return failure if a match is not
276 * found.
277 *
278 * \param req Pointer to interrupt route release payload
279 *
280 * \param resp Pointer to interrupt route release response payload
281 *
282 * \param timeout Gives a sense of how long to wait for the operation.
283 * Refer \ref Sciclient_ServiceOperationTimeout.
284 *
285 * \return r CSL_EFAIL: If the route is not cleared.
286 * CSL_PASS: If the route is cleared.
287 */
288 int32_t Sciclient_rmClearInterruptRoute (const struct tisci_msg_rm_irq_release_req *req,
289 const struct tisci_msg_rm_irq_release_resp *resp,
290 uint32_t timeout);
292 /**
293 * \brief Translates an interrupt router or aggregator output to the
294 * peripheral input or IR input it's connected to.
295 * The primary use of the function is to retrieve the processor
296 * input IRQ or IR input an interrupt router or aggregator
297 * output is connected to.
298 *
299 * \param src_dev_id Interrupt router or aggregator device ID
300 *
301 * \param src_output Interrupt router or aggregator output index
302 *
303 * \param dst_dev_id Device ID of entity connected to interrupt router
304 * or aggregator output
305 *
306 * \param dst_input Pointer to returned input index of entity connected
307 * to interrupt router or aggregator output
308 *
309 * \return CSL_PASS on successful translation, else failure
310 */
311 int32_t Sciclient_rmTranslateIntOutput(uint16_t src_dev_id,
312 uint16_t src_output,
313 uint16_t dst_dev_id,
314 uint16_t *dst_input);
316 /**
317 * \brief Translates a peripheral input to the connected interrupt router
318 * or aggregator output.
319 * The primary use of the function is to retrieve the interrupt router
320 * or aggregator output connected to a processor input IRQ.
321 *
322 * \param dst_dev_id Device ID of entity connected to interrupt router
323 * or aggregator output
324 *
325 * \param dst_input Input index of entity connected to interrupt router
326 * or aggregator output
327 *
328 * \param src_dev_id Interrupt router or aggregator device ID
329 *
330 * \param src_output Pointer to returned Interrupt router or
331 * aggregator output index
332 *
333 * \return CSL_PASS on successful translation, else failure
334 */
335 int32_t Sciclient_rmTranslateIrqInput(uint16_t dst_dev_id,
336 uint16_t dst_input,
337 uint16_t src_dev_id,
338 uint16_t *src_output);
340 /* ========================================================================== */
341 /* Global Variables */
342 /* ========================================================================== */
344 /**
345 * \anchor Sciclient_proxyMap
346 * \name Sciclient map structure
347 * @{
348 * Map structure for R5F,A53,GPU and ICSSG \n
349 * in different contexts.
350 */
351 extern const Sciclient_MapStruct_t gSciclientMap[SCICLIENT_CONTEXT_MAX_NUM];
352 /* @} */
354 extern struct Sciclient_rmIaInst gRmIaInstances[SCICLIENT_RM_IA_NUM_INST];
356 extern struct Sciclient_rmIrInst gRmIrInstances[SCICLIENT_RM_IR_NUM_INST];
358 /**
359 * Extern IRQ interconnection tree defined in SoC-specific irq_tree.c. The
360 * IRQ tree can be referenced by including this header.
361 */
362 extern const struct Sciclient_rmIrqNode *const gRmIrqTree[];
364 /**
365 * Extern IRQ interconnection tree array size defined in SoC-specific
366 * irq_tree.c. The IRQ tree size can be referenced by including this header.
367 */
368 extern const uint32_t gRmIrqTreeCount;
370 #ifdef __cplusplus
371 }
372 #endif
374 #endif /* #ifndef SCICLIENT_PRIV_RM_H_*/