packages/ti/drv/uart/example/sample/am574x/m4/bios/uart_m4_idkAM574x.cfg

   1 /**
   2  *  \file   uart_m4_idkAM574x.cfg
   3  *
   4  *  \brief  Sysbios config file for uart M4 example project on AM574X IDK EVM.
   5  *
   6  */
   7
   8 /*
   9  * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  *
  15  * Redistributions of source code must retain the above copyright
  16  * notice, this list of conditions and the following disclaimer.
  17  *
  18  * Redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the
  21  * distribution.
  22  *
  23  * Neither the name of Texas Instruments Incorporated nor the names of
  24  * its contributors may be used to endorse or promote products derived
  25  * from this software without specific prior written permission.
  26  *
  27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  32  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  33  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  34  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  35  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  36  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  37  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38  *
  39  */
  40 /* ================ General configuration ================ */
  41 var Main                        = xdc.useModule('xdc.runtime.Main');
  42 var System                      = xdc.useModule('xdc.runtime.System');
  43 var Task                        = xdc.useModule('ti.sysbios.knl.Task');
  44 var Mailbox = xdc.useModule('ti.sysbios.knl.Mailbox');
  45 var Semaphore           = xdc.useModule('ti.sysbios.knl.Semaphore');
  46 var Timer = xdc.useModule('ti.sysbios.hal.Timer');
  47
  48 /* ================ BIOS configuration ================ */
  49 var BIOS                = xdc.useModule('ti.sysbios.BIOS');
  50 /*
  51  * Create and install logger for the whole system
  52  */
  53 BIOS.libType = BIOS.LibType_Custom;
  54 /*
  55  * The BIOS module will create the default heap for the system.
  56  * Specify the size of this default heap.
  57  */
  58 BIOS.heapSize = 0xA0000;
  59
  60 /* ================ Driver configuration ================ */
  61
  62 /* Load the OSAL package */
  63 var osType = "tirtos"
  64 var Osal = xdc.useModule('ti.osal.Settings');
  65 Osal.osType = osType;
  66
  67 /*use CSL package*/
  68 var socType           = "am574x";
  69 var Csl = xdc.loadPackage('ti.csl');
  70 Csl.Settings.deviceType = socType;
  71
  72 var Uart              = xdc.loadPackage('ti.drv.uart');
  73 Uart.Settings.socType = socType;
  74
  75 var I2c                         = xdc.loadPackage('ti.drv.i2c');
  76 I2c.Settings.socType = socType;
  77
  78 /* Load the board package */
  79 var Board = xdc.loadPackage('ti.board');
  80 Board.Settings.boardName = "idkAM574x";
  81
  82 /* ================ Cache and MMU configuration ================ */
  83
  84 /* Enable cache */
  85 var Cache       = xdc.useModule('ti.sysbios.hal.unicache.Cache');
  86 Cache.enableCache = true;
  87
  88 /* Use AMMU module */
  89 var AMMU            = xdc.useModule('ti.sysbios.hal.ammu.AMMU');
  90
  91 /* Large PAGE */
  92 AMMU.largePages[0].pageEnabled = AMMU.Enable_YES;
  93 AMMU.largePages[0].logicalAddress = 0x40000000;
  94 AMMU.largePages[0].translatedAddress = 0x40000000;
  95 AMMU.largePages[0].translationEnabled = AMMU.Enable_YES;
  96 AMMU.largePages[0].size = AMMU.Large_512M;
  97 AMMU.largePages[0].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
  98 AMMU.largePages[0].L1_posted = AMMU.PostedPolicy_NON_POSTED;
  99 AMMU.largePages[0].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 100 AMMU.largePages[0].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 101
 102 AMMU.largePages[1].pageEnabled = AMMU.Enable_YES;
 103 AMMU.largePages[1].logicalAddress = 0x80000000;
 104 AMMU.largePages[1].translatedAddress = 0x80000000;
 105 AMMU.largePages[1].translationEnabled = AMMU.Enable_YES;
 106 AMMU.largePages[1].size = AMMU.Large_512M;
 107 AMMU.largePages[1].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK;
 108 AMMU.largePages[1].L1_allocate = AMMU.AllocatePolicy_ALLOCATE;
 109 AMMU.largePages[1].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
 110 AMMU.largePages[1].L1_posted = AMMU.PostedPolicy_POSTED;
 111 AMMU.largePages[1].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 112 AMMU.largePages[1].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 113
 114 AMMU.largePages[2].pageEnabled = AMMU.Enable_YES;
 115 AMMU.largePages[2].logicalAddress = 0xA0000000;
 116 AMMU.largePages[2].translatedAddress = 0xA0000000;
 117 AMMU.largePages[2].translationEnabled = AMMU.Enable_YES;
 118 AMMU.largePages[2].size = AMMU.Large_512M;
 119 AMMU.largePages[2].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 120 AMMU.largePages[2].L1_posted = AMMU.PostedPolicy_NON_POSTED;
 121 AMMU.largePages[2].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 122 AMMU.largePages[2].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 123
 124 AMMU.largePages[3].pageEnabled = AMMU.Enable_YES;
 125 AMMU.largePages[3].logicalAddress = 0x60000000;
 126 AMMU.largePages[3].translatedAddress = 0x40000000;
 127 AMMU.largePages[3].translationEnabled = AMMU.Enable_YES;
 128 AMMU.largePages[3].size = AMMU.Large_512M;
 129 AMMU.largePages[3].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 130 AMMU.largePages[3].L1_posted = AMMU.PostedPolicy_NON_POSTED;
 131 AMMU.largePages[3].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 132 AMMU.largePages[3].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 133
 134 /* Medium Page */
 135 AMMU.mediumPages[0].pageEnabled = AMMU.Enable_YES;
 136 AMMU.mediumPages[0].logicalAddress = 0x00300000;
 137 AMMU.mediumPages[0].translatedAddress = 0x40300000;
 138 AMMU.mediumPages[0].translationEnabled = AMMU.Enable_YES;
 139 AMMU.mediumPages[0].size = AMMU.Medium_256K;
 140
 141 AMMU.mediumPages[1].pageEnabled = AMMU.Enable_YES;
 142 AMMU.mediumPages[1].logicalAddress = 0x00400000;
 143 AMMU.mediumPages[1].translatedAddress = 0x40400000;
 144 AMMU.mediumPages[1].translationEnabled = AMMU.Enable_YES;
 145 AMMU.mediumPages[1].size = AMMU.Medium_256K;
 146 AMMU.mediumPages[1].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 147 AMMU.mediumPages[1].L1_posted = AMMU.PostedPolicy_POSTED;
 148 AMMU.mediumPages[1].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 149 AMMU.mediumPages[1].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 150
 151 /* Small Page */
 152 AMMU.smallPages[0].pageEnabled = AMMU.Enable_YES;
 153 AMMU.smallPages[0].logicalAddress = 0x00000000;
 154 AMMU.smallPages[0].translatedAddress = 0x55020000;
 155 AMMU.smallPages[0].translationEnabled = AMMU.Enable_YES;
 156 AMMU.smallPages[0].size = AMMU.Small_16K;
 157 AMMU.smallPages[0].volatileQualifier = AMMU.Volatile_FOLLOW;
 158 AMMU.smallPages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
 159 AMMU.smallPages[0].L1_posted = AMMU.PostedPolicy_NON_POSTED;
 160 AMMU.smallPages[0].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 161 AMMU.smallPages[0].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 162
 163 AMMU.smallPages[1].pageEnabled = AMMU.Enable_YES;
 164 AMMU.smallPages[1].logicalAddress = 0x40000000;
 165 AMMU.smallPages[1].translatedAddress = 0x55080000;
 166 AMMU.smallPages[1].translationEnabled = AMMU.Enable_YES;
 167 AMMU.smallPages[1].size = AMMU.Small_16K;
 168 AMMU.smallPages[1].volatileQualifier = AMMU.Volatile_FOLLOW;
 169 AMMU.smallPages[1].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 170 AMMU.smallPages[1].L1_posted = AMMU.PostedPolicy_NON_POSTED;
 171 AMMU.smallPages[1].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 172 AMMU.smallPages[1].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 173
 174 AMMU.smallPages[2].pageEnabled = AMMU.Enable_YES;
 175 AMMU.smallPages[2].logicalAddress = 0x00004000;
 176 AMMU.smallPages[2].translatedAddress = 0x55024000;
 177 AMMU.smallPages[2].translationEnabled = AMMU.Enable_YES;
 178 AMMU.smallPages[2].size = AMMU.Small_16K;
 179 AMMU.smallPages[2].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
 180 AMMU.smallPages[2].L1_posted = AMMU.PostedPolicy_NON_POSTED;
 181 AMMU.smallPages[2].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 182 AMMU.smallPages[2].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 183
 184 AMMU.smallPages[3].pageEnabled = AMMU.Enable_YES;
 185 AMMU.smallPages[3].logicalAddress = 0x00008000;
 186 AMMU.smallPages[3].translatedAddress = 0x55028000;
 187 AMMU.smallPages[3].translationEnabled = AMMU.Enable_YES;
 188 AMMU.smallPages[3].size = AMMU.Small_16K;
 189 AMMU.smallPages[3].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 190 AMMU.smallPages[3].L1_posted = AMMU.PostedPolicy_NON_POSTED;
 191 AMMU.smallPages[3].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 192 AMMU.smallPages[3].L2_posted = AMMU.PostedPolicy_NON_POSTED;
 193
 194 AMMU.smallPages[4].pageEnabled = AMMU.Enable_YES;
 195 AMMU.smallPages[4].logicalAddress = 0x20000000;
 196 AMMU.smallPages[4].translatedAddress = 0x55020000;
 197 AMMU.smallPages[4].translationEnabled = AMMU.Enable_YES;
 198 AMMU.smallPages[4].size = AMMU.Small_16K;
 199 AMMU.smallPages[4].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 200 AMMU.smallPages[4].L1_posted = AMMU.PostedPolicy_NON_POSTED;
 201 AMMU.smallPages[4].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
 202 AMMU.smallPages[4].L2_posted = AMMU.PostedPolicy_NON_POSTED;